From 74fad8bd2dd69889a1f8d4058c12a4702c933daf Mon Sep 17 00:00:00 2001 From: Hai Pham Date: Mon, 27 Feb 2023 23:59:32 +0100 Subject: ARM: renesas: Remove defines for USB on Eagle/Condor The Eagle board based on R-Car V3M, which does not support any USB interfaces. The same applies for the Condor board based on R-Car V3H. Remove the defines. Reviewed-by: Marek Vasut Signed-off-by: Hai Pham Signed-off-by: Marek Vasut --- configs/r8a77970_eagle_defconfig | 6 ------ configs/r8a77980_condor_defconfig | 6 ------ 2 files changed, 12 deletions(-) diff --git a/configs/r8a77970_eagle_defconfig b/configs/r8a77970_eagle_defconfig index efbfd6559e7..37af576493b 100644 --- a/configs/r8a77970_eagle_defconfig +++ b/configs/r8a77970_eagle_defconfig @@ -37,7 +37,6 @@ CONFIG_CMD_DFU=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_SPI=y -CONFIG_CMD_USB=y CONFIG_CMD_DHCP=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y @@ -82,9 +81,4 @@ CONFIG_DM_SPI=y CONFIG_RENESAS_RPC_SPI=y CONFIG_TEE=y CONFIG_OPTEE=y -CONFIG_USB=y -CONFIG_USB_XHCI_HCD=y -CONFIG_USB_EHCI_HCD=y -CONFIG_USB_EHCI_GENERIC=y -CONFIG_USB_STORAGE=y CONFIG_OF_LIBFDT_OVERLAY=y diff --git a/configs/r8a77980_condor_defconfig b/configs/r8a77980_condor_defconfig index e1b3dc5d38a..687a894d80c 100644 --- a/configs/r8a77980_condor_defconfig +++ b/configs/r8a77980_condor_defconfig @@ -39,7 +39,6 @@ CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_SPI=y -CONFIG_CMD_USB=y CONFIG_CMD_DHCP=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y @@ -91,9 +90,4 @@ CONFIG_RENESAS_RPC_SPI=y CONFIG_SYSINFO=y CONFIG_TEE=y CONFIG_OPTEE=y -CONFIG_USB=y -CONFIG_USB_XHCI_HCD=y -CONFIG_USB_EHCI_HCD=y -CONFIG_USB_EHCI_GENERIC=y -CONFIG_USB_STORAGE=y CONFIG_OF_LIBFDT_OVERLAY=y -- cgit v1.2.3 From ca9299747f0f5072ddcb469b7afb4303fe31e6cf Mon Sep 17 00:00:00 2001 From: Hai Pham Date: Tue, 28 Feb 2023 00:00:01 +0100 Subject: ARM: renesas: Demote overlap memory nodes message to debug on Gen3 The R-Car DTs might contains multiple /memory@* nodes from various sources, i.e. prior firmware, u-boot itself or the OS The duplicates are likely to happen so the messages are not meaningful in the default setting since we have already handled that. Reduce the message to debug level. Reviewed-by: Marek Vasut Signed-off-by: Hai Pham Signed-off-by: Marek Vasut --- board/renesas/rcar-common/common.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/board/renesas/rcar-common/common.c b/board/renesas/rcar-common/common.c index daa1beb14f8..0ddae95e230 100644 --- a/board/renesas/rcar-common/common.c +++ b/board/renesas/rcar-common/common.c @@ -73,9 +73,9 @@ static int is_mem_overlap(void *blob, int first_mem_node, int curr_mem_node) if (curr_mem_res.start >= first_mem_res.end) continue; - printf("Overlap found: 0x%llx..0x%llx / 0x%llx..0x%llx\n", - first_mem_res.start, first_mem_res.end, - curr_mem_res.start, curr_mem_res.end); + log_debug("Overlap found: 0x%llx..0x%llx / 0x%llx..0x%llx\n", + first_mem_res.start, first_mem_res.end, + curr_mem_res.start, curr_mem_res.end); return 1; } -- cgit v1.2.3 From 143bd4e31536e4aee2902925224eef27fdee0167 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Tue, 28 Feb 2023 00:00:19 +0100 Subject: ARM: renesas: Enable DTO support by default on R-Car Gen3 All R-Car Gen3 defconfigs present in U-Boot do enable DTO support, enable it for all of R-Car Gen3 by default in Kconfig instead, so that no new boards would miss this functionality. Signed-off-by: Marek Vasut --- arch/arm/mach-rmobile/Kconfig.64 | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm/mach-rmobile/Kconfig.64 b/arch/arm/mach-rmobile/Kconfig.64 index 8e617e58244..554130b435b 100644 --- a/arch/arm/mach-rmobile/Kconfig.64 +++ b/arch/arm/mach-rmobile/Kconfig.64 @@ -204,4 +204,7 @@ config SYS_MALLOC_F_LEN config DM_RESET default y if RCAR_GEN3 +config OF_LIBFDT_OVERLAY + default y if RCAR_GEN3 + endif -- cgit v1.2.3 From 72eb1f5e19320ea4919f62341ce077a521d9c278 Mon Sep 17 00:00:00 2001 From: Hai Pham Date: Tue, 28 Feb 2023 00:02:18 +0100 Subject: ARM: renesas: falcon: Initialize ARM generic timer and GICv3 if EL3 U-Boot executes at EL3 is required to initalize those settings. In other cases, they will be done by prior-stage firmware instead. This fixes crash when U-Boot is at non-secure exception level. Reviewed-by: Marek Vasut Signed-off-by: Hai Pham Signed-off-by: Marek Vasut --- board/renesas/falcon/falcon.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/board/renesas/falcon/falcon.c b/board/renesas/falcon/falcon.c index b0cb4e747b6..b7e7fd9003a 100644 --- a/board/renesas/falcon/falcon.c +++ b/board/renesas/falcon/falcon.c @@ -14,6 +14,7 @@ #include #include #include +#include DECLARE_GLOBAL_DATA_PTR; @@ -69,7 +70,8 @@ static void init_gic_v3(void) void s_init(void) { - init_generic_timer(); + if (current_el() == 3) + init_generic_timer(); } int board_early_init_f(void) @@ -86,7 +88,8 @@ int board_init(void) /* address of boot parameters */ gd->bd->bi_boot_params = CONFIG_TEXT_BASE + 0x50000; - init_gic_v3(); + if (current_el() == 3) + init_gic_v3(); return 0; } -- cgit v1.2.3 From 33c3ec22d4d96336d4c0ad9f5e8183a3f3680bfd Mon Sep 17 00:00:00 2001 From: Hai Pham Date: Tue, 28 Feb 2023 00:02:19 +0100 Subject: ARM: renesas: falcon: Enable RWDT reset for V3U Falcon Enable RWDT reset on Reset Controller so that it can be used as reset trigger source for V3U Falcon. Reviewed-by: Marek Vasut Signed-off-by: Hai Pham Signed-off-by: Marek Vasut # Use one current_el() in board_init --- board/renesas/falcon/falcon.c | 16 +++++++++++----- 1 file changed, 11 insertions(+), 5 deletions(-) diff --git a/board/renesas/falcon/falcon.c b/board/renesas/falcon/falcon.c index b7e7fd9003a..ab7464d0ee3 100644 --- a/board/renesas/falcon/falcon.c +++ b/board/renesas/falcon/falcon.c @@ -83,21 +83,27 @@ int board_early_init_f(void) return 0; } +#define RST_BASE 0xE6160000 /* Domain0 */ +#define RST_SRESCR0 (RST_BASE + 0x18) +#define RST_SPRES 0x5AA58000 +#define RST_WDTRSTCR (RST_BASE + 0x10) +#define RST_RWDT 0xA55A8002 + int board_init(void) { /* address of boot parameters */ gd->bd->bi_boot_params = CONFIG_TEXT_BASE + 0x50000; - if (current_el() == 3) + if (current_el() == 3) { init_gic_v3(); + /* Enable RWDT reset */ + writel(RST_RWDT, RST_WDTRSTCR); + } + return 0; } -#define RST_BASE 0xE6160000 /* Domain0 */ -#define RST_SRESCR0 (RST_BASE + 0x18) -#define RST_SPRES 0x5AA58000 - void reset_cpu(void) { writel(RST_SPRES, RST_SRESCR0); -- cgit v1.2.3 From 7fe9d7d1ba2a8bda472777401e0edc27ffd48982 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Tue, 28 Feb 2023 07:27:51 +0100 Subject: ARM: rmobile: Convert ifdef in rmobile_get_prr() to IS_ENABLED() Switch ifdef in rmobile_get_prr() to IS_ENABLED() macro. The CONFIG_RCAR_GEN3 will never have SPL counterpart, so the IS_ENABLED() macro is the right one here. No functional change, except for improved build test coverage. Signed-off-by: Marek Vasut --- arch/arm/mach-rmobile/cpu_info-rcar.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/arch/arm/mach-rmobile/cpu_info-rcar.c b/arch/arm/mach-rmobile/cpu_info-rcar.c index 5bde24ae0e7..ac9c623eda7 100644 --- a/arch/arm/mach-rmobile/cpu_info-rcar.c +++ b/arch/arm/mach-rmobile/cpu_info-rcar.c @@ -14,11 +14,10 @@ static u32 rmobile_get_prr(void) { -#ifdef CONFIG_RCAR_GEN3 - return readl(0xFFF00044); -#else + if (IS_ENABLED(CONFIG_RCAR_GEN3)) + return readl(0xFFF00044); + return readl(0xFF000044); -#endif } u32 rmobile_get_cpu_type(void) -- cgit v1.2.3 From 6f152a713cdc2b34baa16f6303053a47c47c5f61 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Tue, 28 Feb 2023 07:28:54 +0100 Subject: ARM: rmobile: Sort R-Car Gen3 Kconfig lists Sort the 'imply' and 'select' lists in R-Car Gen3 Kconfig options. No functional change. Signed-off-by: Marek Vasut --- arch/arm/mach-rmobile/Kconfig | 10 +++++----- arch/arm/mach-rmobile/Kconfig.64 | 22 +++++++++++----------- 2 files changed, 16 insertions(+), 16 deletions(-) diff --git a/arch/arm/mach-rmobile/Kconfig b/arch/arm/mach-rmobile/Kconfig index 0e9c0fa9962..9ff45f46313 100644 --- a/arch/arm/mach-rmobile/Kconfig +++ b/arch/arm/mach-rmobile/Kconfig @@ -11,19 +11,18 @@ config RCAR_32 config RCAR_GEN3 bool "Renesas ARM SoCs R-Car Gen3 (64bit)" select ARM64 - select PHY select CMD_CACHE select OF_BOARD_SETUP - select PINCTRL + select PHY select PINCONF + select PINCTRL select PINCTRL_PFC select POSITION_INDEPENDENT select SUPPORT_SPL imply CMD_FS_UUID imply CMD_GPT - imply CMD_UUID imply CMD_MMC_SWRITE if MMC - imply SUPPORT_EMMC_RPMB if MMC + imply CMD_UUID imply SPL imply SPL_BOARD_INIT imply SPL_GZIP @@ -32,8 +31,9 @@ config RCAR_GEN3 imply SPL_SERIAL imply SPL_SYS_MALLOC_SIMPLE imply SPL_TINY_MEMSET - imply SPL_YMODEM_SUPPORT imply SPL_USE_TINY_PRINTF + imply SPL_YMODEM_SUPPORT + imply SUPPORT_EMMC_RPMB if MMC config RZA1 prompt "Renesas ARM SoCs RZ/A1 (32bit)" diff --git a/arch/arm/mach-rmobile/Kconfig.64 b/arch/arm/mach-rmobile/Kconfig.64 index 554130b435b..33fd776f8af 100644 --- a/arch/arm/mach-rmobile/Kconfig.64 +++ b/arch/arm/mach-rmobile/Kconfig.64 @@ -87,17 +87,17 @@ choice config TARGET_BEACON_RZG2M bool "Beacon EmbeddedWorks RZ/G2 Dev Kit" + select PINCTRL_PFC_R8A774A1 + select PINCTRL_PFC_R8A774B1 + select PINCTRL_PFC_R8A774E1 select R8A774A1 select R8A774B1 select R8A774E1 select RZ_G2 - select PINCTRL_PFC_R8A774A1 - select PINCTRL_PFC_R8A774B1 - select PINCTRL_PFC_R8A774E1 + imply CLK_CCF + imply CLK_VERSACLOCK imply MULTI_DTB_FIT imply MULTI_DTB_FIT_USER_DEFINED_AREA - imply CLK_VERSACLOCK - imply CLK_CCF config TARGET_CONDOR bool "Condor board" @@ -131,13 +131,13 @@ config TARGET_FALCON config TARGET_HIHOPE_RZG2 bool "HiHope RZ/G2 board" + imply MULTI_DTB_FIT + imply MULTI_DTB_FIT_USER_DEFINED_AREA imply R8A774A1 imply R8A774B1 imply R8A774E1 imply RZ_G2 imply SYS_MALLOC_F - imply MULTI_DTB_FIT - imply MULTI_DTB_FIT_USER_DEFINED_AREA help Support for RZG2 HiHope platform @@ -150,23 +150,23 @@ config TARGET_SILINUX_EK874 config TARGET_SALVATOR_X bool "Salvator-X board" + imply MULTI_DTB_FIT + imply MULTI_DTB_FIT_USER_DEFINED_AREA imply R8A7795 imply R8A7796 imply R8A77965 imply SYS_MALLOC_F - imply MULTI_DTB_FIT - imply MULTI_DTB_FIT_USER_DEFINED_AREA help Support for Renesas R-Car Gen3 platform config TARGET_ULCB bool "ULCB board" + imply MULTI_DTB_FIT + imply MULTI_DTB_FIT_USER_DEFINED_AREA imply R8A7795 imply R8A7796 imply R8A77965 imply SYS_MALLOC_F - imply MULTI_DTB_FIT - imply MULTI_DTB_FIT_USER_DEFINED_AREA help Support for Renesas R-Car Gen3 ULCB platform -- cgit v1.2.3 From dec699bea7fead80328ed1fd252be97ccae4b982 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Tue, 28 Feb 2023 07:28:55 +0100 Subject: ARM: rmobile: Factor out SYS_SOC Kconfig option Pull the SYS_SOC Kconfig option to avoid duplication of this option in Kconfig.{32,64,rza1} . The default value is the same, so just set it in one location. Signed-off-by: Marek Vasut --- arch/arm/mach-rmobile/Kconfig | 3 +++ arch/arm/mach-rmobile/Kconfig.32 | 3 --- arch/arm/mach-rmobile/Kconfig.64 | 3 --- arch/arm/mach-rmobile/Kconfig.rza1 | 3 --- 4 files changed, 3 insertions(+), 9 deletions(-) diff --git a/arch/arm/mach-rmobile/Kconfig b/arch/arm/mach-rmobile/Kconfig index 9ff45f46313..b69ccaee0a0 100644 --- a/arch/arm/mach-rmobile/Kconfig +++ b/arch/arm/mach-rmobile/Kconfig @@ -41,6 +41,9 @@ config RZA1 endchoice +config SYS_SOC + default "rmobile" if ARCH_RMOBILE + source "arch/arm/mach-rmobile/Kconfig.32" source "arch/arm/mach-rmobile/Kconfig.64" source "arch/arm/mach-rmobile/Kconfig.rza1" diff --git a/arch/arm/mach-rmobile/Kconfig.32 b/arch/arm/mach-rmobile/Kconfig.32 index 31badc5a47d..1ac31c29d82 100644 --- a/arch/arm/mach-rmobile/Kconfig.32 +++ b/arch/arm/mach-rmobile/Kconfig.32 @@ -125,9 +125,6 @@ endchoice config TMU_TIMER bool -config SYS_SOC - default "rmobile" - config RMOBILE_EXTRAM_BOOT bool "Enable boot from RAM" depends on TARGET_ALT || TARGET_BLANCHE || TARGET_KOELSCH || TARGET_LAGER || TARGET_PORTER || TARGET_SILK || TARGET_STOUT diff --git a/arch/arm/mach-rmobile/Kconfig.64 b/arch/arm/mach-rmobile/Kconfig.64 index 33fd776f8af..3ed5099c36e 100644 --- a/arch/arm/mach-rmobile/Kconfig.64 +++ b/arch/arm/mach-rmobile/Kconfig.64 @@ -172,9 +172,6 @@ config TARGET_ULCB endchoice -config SYS_SOC - default "rmobile" - source "board/renesas/condor/Kconfig" source "board/renesas/draak/Kconfig" source "board/renesas/eagle/Kconfig" diff --git a/arch/arm/mach-rmobile/Kconfig.rza1 b/arch/arm/mach-rmobile/Kconfig.rza1 index 8cf033fb13c..e88f9a2eedb 100644 --- a/arch/arm/mach-rmobile/Kconfig.rza1 +++ b/arch/arm/mach-rmobile/Kconfig.rza1 @@ -19,9 +19,6 @@ config TARGET_GRPEACH endchoice -config SYS_SOC - default "rmobile" - # Renesas Supported Boards source "board/renesas/grpeach/Kconfig" -- cgit v1.2.3 From ef72c1ef294f06a675206117e7573c6307169311 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Tue, 28 Feb 2023 07:28:56 +0100 Subject: ARM: rmobile: Introduce CONFIG_RCAR_64 symbol Introduce common Kconfig symbol for 64bit R-Car platforms and move common configuration options into it. This is preparatory patch to prevent duplication of Kconfig lists later on, when Gen4 is added. Signed-off-by: Marek Vasut --- arch/arm/mach-rmobile/Kconfig | 29 +++++++++++++++++------------ 1 file changed, 17 insertions(+), 12 deletions(-) diff --git a/arch/arm/mach-rmobile/Kconfig b/arch/arm/mach-rmobile/Kconfig index b69ccaee0a0..921153a8d9e 100644 --- a/arch/arm/mach-rmobile/Kconfig +++ b/arch/arm/mach-rmobile/Kconfig @@ -1,15 +1,8 @@ if ARCH_RMOBILE -choice - prompt "Target Renesas SoC select" - default RCAR_32 - -config RCAR_32 - bool "Renesas ARM SoCs R-Car Gen1/Gen2 (32bit)" - select CPU_V7A - -config RCAR_GEN3 - bool "Renesas ARM SoCs R-Car Gen3 (64bit)" +# Renesas ARM SoCs R-Car Gen3/Gen4 (64bit) +config RCAR_64 + bool select ARM64 select CMD_CACHE select OF_BOARD_SETUP @@ -18,11 +11,24 @@ config RCAR_GEN3 select PINCTRL select PINCTRL_PFC select POSITION_INDEPENDENT - select SUPPORT_SPL imply CMD_FS_UUID imply CMD_GPT imply CMD_MMC_SWRITE if MMC imply CMD_UUID + imply SUPPORT_EMMC_RPMB if MMC + +choice + prompt "Target Renesas SoC select" + default RCAR_32 + +config RCAR_32 + bool "Renesas ARM SoCs R-Car Gen1/Gen2 (32bit)" + select CPU_V7A + +config RCAR_GEN3 + bool "Renesas ARM SoCs R-Car Gen3 (64bit)" + select RCAR_64 + select SUPPORT_SPL imply SPL imply SPL_BOARD_INIT imply SPL_GZIP @@ -33,7 +39,6 @@ config RCAR_GEN3 imply SPL_TINY_MEMSET imply SPL_USE_TINY_PRINTF imply SPL_YMODEM_SUPPORT - imply SUPPORT_EMMC_RPMB if MMC config RZA1 prompt "Renesas ARM SoCs RZ/A1 (32bit)" -- cgit v1.2.3 From f54eb0bad6d0622bd0a050fb741ec40516658be7 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Tue, 28 Feb 2023 07:28:57 +0100 Subject: ARM: rmobile: Split R-Car Gen3 into separate Kconfig from common 64bit options There are multiple shared Kconfig options between R-Car Gen3 and Gen4. Keep the common options in Kconfig.64 and move the R-Car Gen3 specific options into separate Kconfig.rcar3 . The Kconfig.rcar3 contains SoC and board list, which is limited to R-Car Gen3. Signed-off-by: Marek Vasut --- arch/arm/mach-rmobile/Kconfig.64 | 206 +----------------------------------- arch/arm/mach-rmobile/Kconfig.rcar3 | 201 +++++++++++++++++++++++++++++++++++ 2 files changed, 206 insertions(+), 201 deletions(-) create mode 100644 arch/arm/mach-rmobile/Kconfig.rcar3 diff --git a/arch/arm/mach-rmobile/Kconfig.64 b/arch/arm/mach-rmobile/Kconfig.64 index 3ed5099c36e..3b14721dab5 100644 --- a/arch/arm/mach-rmobile/Kconfig.64 +++ b/arch/arm/mach-rmobile/Kconfig.64 @@ -1,207 +1,11 @@ -if RCAR_GEN3 - -menu "Select Target SoC" - -config R8A774A1 - bool "Renesas SoC R8A774A1" - select GICV2 - imply CLK_R8A774A1 - imply PINCTRL_PFC_R8A774A1 - -config R8A774B1 - bool "Renesas SoC R8A774B1" - select GICV2 - imply CLK_R8A774B1 - imply PINCTRL_PFC_R8A774B1 - -config R8A774C0 - bool "Renesas SoC R8A774C0" - select GICV2 - imply CLK_R8A774C0 - imply PINCTRL_PFC_R8A774C0 - -config R8A774E1 - bool "Renesas SoC R8A774E1" - select GICV2 - imply CLK_R8A774E1 - imply PINCTRL_PFC_R8A774E1 - -config R8A7795 - bool "Renesas SoC R8A7795" - select GICV2 - imply CLK_R8A7795 - imply PINCTRL_PFC_R8A77951 - -config R8A7796 - bool "Renesas SoC R8A7796" - select GICV2 - imply CLK_R8A77960 - imply CLK_R8A77961 - imply PINCTRL_PFC_R8A77960 - imply PINCTRL_PFC_R8A77961 - -config R8A77965 - bool "Renesas SoC R8A77965" - select GICV2 - imply CLK_R8A77965 - imply PINCTRL_PFC_R8A77965 - -config R8A77970 - bool "Renesas SoC R8A77970" - select GICV2 - imply CLK_R8A77970 - imply PINCTRL_PFC_R8A77970 - -config R8A77980 - bool "Renesas SoC R8A77980" - select GICV2 - imply CLK_R8A77980 - imply PINCTRL_PFC_R8A77980 - -config R8A77990 - bool "Renesas SoC R8A77990" - select GICV2 - imply CLK_R8A77990 - imply PINCTRL_PFC_R8A77990 - -config R8A77995 - bool "Renesas SoC R8A77995" - select GICV2 - imply CLK_R8A77995 - imply PINCTRL_PFC_R8A77995 - -config R8A779A0 - bool "Renesas SoC R8A779A0" - select GICV3 - imply CLK_R8A779A0 - imply PINCTRL_PFC_R8A779A0 - -config RZ_G2 - bool "Renesas ARM SoCs RZ/G2 (64bit)" - -endmenu - -choice - prompt "Renesas ARM64 SoCs board select" - optional - -config TARGET_BEACON_RZG2M - bool "Beacon EmbeddedWorks RZ/G2 Dev Kit" - select PINCTRL_PFC_R8A774A1 - select PINCTRL_PFC_R8A774B1 - select PINCTRL_PFC_R8A774E1 - select R8A774A1 - select R8A774B1 - select R8A774E1 - select RZ_G2 - imply CLK_CCF - imply CLK_VERSACLOCK - imply MULTI_DTB_FIT - imply MULTI_DTB_FIT_USER_DEFINED_AREA - -config TARGET_CONDOR - bool "Condor board" - imply R8A77980 - help - Support for Renesas R-Car Gen3 Condor platform - -config TARGET_DRAAK - bool "Draak board" - imply R8A77995 - help - Support for Renesas R-Car Gen3 Draak platform - -config TARGET_EAGLE - bool "Eagle board" - imply R8A77970 - help - Support for Renesas R-Car Gen3 Eagle platform - -config TARGET_EBISU - bool "Ebisu board" - imply R8A77990 - help - Support for Renesas R-Car Gen3 Ebisu platform - -config TARGET_FALCON - bool "Falcon board" - imply R8A779A0 - help - Support for Renesas R-Car Gen3 Falcon platform - -config TARGET_HIHOPE_RZG2 - bool "HiHope RZ/G2 board" - imply MULTI_DTB_FIT - imply MULTI_DTB_FIT_USER_DEFINED_AREA - imply R8A774A1 - imply R8A774B1 - imply R8A774E1 - imply RZ_G2 - imply SYS_MALLOC_F - help - Support for RZG2 HiHope platform - -config TARGET_SILINUX_EK874 - bool "Silicon Linux EK874 board" - imply R8A774C0 - imply RZ_G2 - help - Support for Silicon Linux EK874 platform - -config TARGET_SALVATOR_X - bool "Salvator-X board" - imply MULTI_DTB_FIT - imply MULTI_DTB_FIT_USER_DEFINED_AREA - imply R8A7795 - imply R8A7796 - imply R8A77965 - imply SYS_MALLOC_F - help - Support for Renesas R-Car Gen3 platform - -config TARGET_ULCB - bool "ULCB board" - imply MULTI_DTB_FIT - imply MULTI_DTB_FIT_USER_DEFINED_AREA - imply R8A7795 - imply R8A7796 - imply R8A77965 - imply SYS_MALLOC_F - help - Support for Renesas R-Car Gen3 ULCB platform - -endchoice - -source "board/renesas/condor/Kconfig" -source "board/renesas/draak/Kconfig" -source "board/renesas/eagle/Kconfig" -source "board/renesas/ebisu/Kconfig" -source "board/renesas/falcon/Kconfig" -source "board/renesas/salvator-x/Kconfig" -source "board/renesas/ulcb/Kconfig" -source "board/beacon/beacon-rzg2m/Kconfig" -source "board/hoperun/hihope-rzg2/Kconfig" -source "board/silinux/ek874/Kconfig" - -config MULTI_DTB_FIT_UNCOMPRESS_SZ - default 0x80000 if TARGET_BEACON_RZG2M - default 0x80000 if TARGET_HIHOPE_RZG2 - default 0x80000 if TARGET_SALVATOR_X - default 0x80000 if TARGET_ULCB - -config MULTI_DTB_FIT_USER_DEF_ADDR - default 0x49000000 if TARGET_BEACON_RZG2M - default 0x49000000 if TARGET_HIHOPE_RZG2 - default 0x49000000 if TARGET_SALVATOR_X - default 0x49000000 if TARGET_ULCB +if RCAR_64 config SYS_MALLOC_F_LEN - default 0x8000 if RCAR_GEN3 - -config DM_RESET - default y if RCAR_GEN3 + default 0x8000 if RCAR_64 config OF_LIBFDT_OVERLAY - default y if RCAR_GEN3 + default y if RCAR_64 + +source "arch/arm/mach-rmobile/Kconfig.rcar3" endif diff --git a/arch/arm/mach-rmobile/Kconfig.rcar3 b/arch/arm/mach-rmobile/Kconfig.rcar3 new file mode 100644 index 00000000000..680aa455160 --- /dev/null +++ b/arch/arm/mach-rmobile/Kconfig.rcar3 @@ -0,0 +1,201 @@ +if RCAR_GEN3 + +menu "Select Target SoC" + +config R8A774A1 + bool "Renesas SoC R8A774A1" + select GICV2 + imply CLK_R8A774A1 + imply PINCTRL_PFC_R8A774A1 + +config R8A774B1 + bool "Renesas SoC R8A774B1" + select GICV2 + imply CLK_R8A774B1 + imply PINCTRL_PFC_R8A774B1 + +config R8A774C0 + bool "Renesas SoC R8A774C0" + select GICV2 + imply CLK_R8A774C0 + imply PINCTRL_PFC_R8A774C0 + +config R8A774E1 + bool "Renesas SoC R8A774E1" + select GICV2 + imply CLK_R8A774E1 + imply PINCTRL_PFC_R8A774E1 + +config R8A7795 + bool "Renesas SoC R8A7795" + select GICV2 + imply CLK_R8A7795 + imply PINCTRL_PFC_R8A77951 + +config R8A7796 + bool "Renesas SoC R8A7796" + select GICV2 + imply CLK_R8A77960 + imply CLK_R8A77961 + imply PINCTRL_PFC_R8A77960 + imply PINCTRL_PFC_R8A77961 + +config R8A77965 + bool "Renesas SoC R8A77965" + select GICV2 + imply CLK_R8A77965 + imply PINCTRL_PFC_R8A77965 + +config R8A77970 + bool "Renesas SoC R8A77970" + select GICV2 + imply CLK_R8A77970 + imply PINCTRL_PFC_R8A77970 + +config R8A77980 + bool "Renesas SoC R8A77980" + select GICV2 + imply CLK_R8A77980 + imply PINCTRL_PFC_R8A77980 + +config R8A77990 + bool "Renesas SoC R8A77990" + select GICV2 + imply CLK_R8A77990 + imply PINCTRL_PFC_R8A77990 + +config R8A77995 + bool "Renesas SoC R8A77995" + select GICV2 + imply CLK_R8A77995 + imply PINCTRL_PFC_R8A77995 + +config R8A779A0 + bool "Renesas SoC R8A779A0" + select GICV3 + imply CLK_R8A779A0 + imply PINCTRL_PFC_R8A779A0 + +config RZ_G2 + bool "Renesas ARM SoCs RZ/G2 (64bit)" + +endmenu + +choice + prompt "Renesas ARM64 SoCs board select" + optional + +config TARGET_BEACON_RZG2M + bool "Beacon EmbeddedWorks RZ/G2 Dev Kit" + select PINCTRL_PFC_R8A774A1 + select PINCTRL_PFC_R8A774B1 + select PINCTRL_PFC_R8A774E1 + select R8A774A1 + select R8A774B1 + select R8A774E1 + select RZ_G2 + imply CLK_CCF + imply CLK_VERSACLOCK + imply MULTI_DTB_FIT + imply MULTI_DTB_FIT_USER_DEFINED_AREA + +config TARGET_CONDOR + bool "Condor board" + imply R8A77980 + help + Support for Renesas R-Car Gen3 Condor platform + +config TARGET_DRAAK + bool "Draak board" + imply R8A77995 + help + Support for Renesas R-Car Gen3 Draak platform + +config TARGET_EAGLE + bool "Eagle board" + imply R8A77970 + help + Support for Renesas R-Car Gen3 Eagle platform + +config TARGET_EBISU + bool "Ebisu board" + imply R8A77990 + help + Support for Renesas R-Car Gen3 Ebisu platform + +config TARGET_FALCON + bool "Falcon board" + imply R8A779A0 + help + Support for Renesas R-Car Gen3 Falcon platform + +config TARGET_HIHOPE_RZG2 + bool "HiHope RZ/G2 board" + imply MULTI_DTB_FIT + imply MULTI_DTB_FIT_USER_DEFINED_AREA + imply R8A774A1 + imply R8A774B1 + imply R8A774E1 + imply RZ_G2 + imply SYS_MALLOC_F + help + Support for RZG2 HiHope platform + +config TARGET_SILINUX_EK874 + bool "Silicon Linux EK874 board" + imply R8A774C0 + imply RZ_G2 + help + Support for Silicon Linux EK874 platform + +config TARGET_SALVATOR_X + bool "Salvator-X board" + imply MULTI_DTB_FIT + imply MULTI_DTB_FIT_USER_DEFINED_AREA + imply R8A7795 + imply R8A7796 + imply R8A77965 + imply SYS_MALLOC_F + help + Support for Renesas R-Car Gen3 platform + +config TARGET_ULCB + bool "ULCB board" + imply MULTI_DTB_FIT + imply MULTI_DTB_FIT_USER_DEFINED_AREA + imply R8A7795 + imply R8A7796 + imply R8A77965 + imply SYS_MALLOC_F + help + Support for Renesas R-Car Gen3 ULCB platform + +endchoice + +source "board/renesas/condor/Kconfig" +source "board/renesas/draak/Kconfig" +source "board/renesas/eagle/Kconfig" +source "board/renesas/ebisu/Kconfig" +source "board/renesas/falcon/Kconfig" +source "board/renesas/salvator-x/Kconfig" +source "board/renesas/ulcb/Kconfig" +source "board/beacon/beacon-rzg2m/Kconfig" +source "board/hoperun/hihope-rzg2/Kconfig" +source "board/silinux/ek874/Kconfig" + +config MULTI_DTB_FIT_UNCOMPRESS_SZ + default 0x80000 if TARGET_BEACON_RZG2M + default 0x80000 if TARGET_HIHOPE_RZG2 + default 0x80000 if TARGET_SALVATOR_X + default 0x80000 if TARGET_ULCB + +config MULTI_DTB_FIT_USER_DEF_ADDR + default 0x49000000 if TARGET_BEACON_RZG2M + default 0x49000000 if TARGET_HIHOPE_RZG2 + default 0x49000000 if TARGET_SALVATOR_X + default 0x49000000 if TARGET_ULCB + +config DM_RESET + default y if RCAR_GEN3 + +endif -- cgit v1.2.3 From 99c7e031196d9057669bb07e8ad427119993997f Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Tue, 28 Feb 2023 07:25:11 +0100 Subject: clk: renesas: rcar-gen3: Replace SSCG caching with MDSEL/PE caching Do not cache the single CPG MODE register bit 12, instead cache the entire register value, and only pick the matching bit from the cached value when core clock of type MDSEL or PE are used. Both MDSEL and PE clock type currently define .offset field as 12 on Gen3, which means this code will use bit 12 on Gen3 again, however there are additional clock on Gen4 which use different bits, and having this flexibility in place now will be useful when adding Gen4. No functional change. Signed-off-by: Marek Vasut --- drivers/clk/renesas/clk-rcar-gen3.c | 18 +++++++++--------- drivers/clk/renesas/rcar-gen3-cpg.h | 2 +- 2 files changed, 10 insertions(+), 10 deletions(-) diff --git a/drivers/clk/renesas/clk-rcar-gen3.c b/drivers/clk/renesas/clk-rcar-gen3.c index d778db6569d..9545e0a1435 100644 --- a/drivers/clk/renesas/clk-rcar-gen3.c +++ b/drivers/clk/renesas/clk-rcar-gen3.c @@ -55,6 +55,7 @@ static int gen3_clk_get_parent(struct gen3_clk_priv *priv, struct clk *clk, struct cpg_mssr_info *info, struct clk *parent) { const struct cpg_core_clk *core; + u8 shift; int ret; if (!renesas_clk_is_mod(clk)) { @@ -63,8 +64,9 @@ static int gen3_clk_get_parent(struct gen3_clk_priv *priv, struct clk *clk, return ret; if (core->type == CLK_TYPE_GEN3_MDSEL) { + shift = priv->cpg_mode & BIT(core->offset) ? 16 : 0; parent->dev = clk->dev; - parent->id = core->parent >> (priv->sscg ? 16 : 0); + parent->id = core->parent >> shift; parent->id &= 0xffff; return 0; } @@ -183,6 +185,7 @@ static u64 gen3_clk_get_rate64(struct clk *clk) priv->cpg_pll_config; u32 value, div; u64 rate = 0; + u8 shift; int ret; debug("%s[%i] Clock: id=%lu\n", __func__, __LINE__, clk->id); @@ -277,11 +280,11 @@ static u64 gen3_clk_get_rate64(struct clk *clk) "FIXED"); case CLK_TYPE_GEN3_MDSEL: - div = (core->div >> (priv->sscg ? 16 : 0)) & 0xffff; + shift = priv->cpg_mode & BIT(core->offset) ? 16 : 0; + div = (core->div >> shift) & 0xffff; rate = gen3_clk_get_rate64(&parent) / div; debug("%s[%i] PE clk: parent=%i div=%u => rate=%llu\n", - __func__, __LINE__, - (core->parent >> (priv->sscg ? 16 : 0)) & 0xffff, + __func__, __LINE__, (core->parent >> shift) & 0xffff, div, rate); return rate; @@ -407,7 +410,6 @@ static int gen3_clk_probe(struct udevice *dev) struct cpg_mssr_info *info = (struct cpg_mssr_info *)dev_get_driver_data(dev); fdt_addr_t rst_base; - u32 cpg_mode; int ret; priv->base = dev_read_addr_ptr(dev); @@ -423,15 +425,13 @@ static int gen3_clk_probe(struct udevice *dev) if (rst_base == FDT_ADDR_T_NONE) return -EINVAL; - cpg_mode = readl(rst_base + info->reset_modemr_offset); + priv->cpg_mode = readl(rst_base + info->reset_modemr_offset); priv->cpg_pll_config = - (struct rcar_gen3_cpg_pll_config *)info->get_pll_config(cpg_mode); + (struct rcar_gen3_cpg_pll_config *)info->get_pll_config(priv->cpg_mode); if (!priv->cpg_pll_config->extal_div) return -EINVAL; - priv->sscg = !(cpg_mode & BIT(12)); - if (info->reg_layout == CLK_REG_LAYOUT_RCAR_GEN2_AND_GEN3) { priv->info->status_regs = mstpsr; priv->info->control_regs = smstpcr; diff --git a/drivers/clk/renesas/rcar-gen3-cpg.h b/drivers/clk/renesas/rcar-gen3-cpg.h index 200e4adb906..894e3765495 100644 --- a/drivers/clk/renesas/rcar-gen3-cpg.h +++ b/drivers/clk/renesas/rcar-gen3-cpg.h @@ -132,7 +132,7 @@ struct gen3_clk_priv { struct cpg_mssr_info *info; struct clk clk_extal; struct clk clk_extalr; - bool sscg; + u32 cpg_mode; const struct rcar_gen3_cpg_pll_config *cpg_pll_config; }; -- cgit v1.2.3 From 61eb551f3abdf7ab002b33e0baec51885d6509cc Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Tue, 28 Feb 2023 00:03:45 +0100 Subject: i2c: rcar_iic: Sort Kconfig depends list ascending Sort the list of "depends" symbols in ascending order. No functional change. Signed-off-by: Marek Vasut Reviewed-by: Heiko Schocher --- drivers/i2c/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/i2c/Kconfig b/drivers/i2c/Kconfig index 1077c331c30..77a93d8d9ec 100644 --- a/drivers/i2c/Kconfig +++ b/drivers/i2c/Kconfig @@ -502,7 +502,7 @@ config SYS_I2C_RCAR_I2C config SYS_I2C_RCAR_IIC bool "Renesas RCar Gen3 IIC driver" - depends on (RCAR_GEN3 || RCAR_GEN2) && DM_I2C + depends on (RCAR_GEN2 || RCAR_GEN3) && DM_I2C help Support for Renesas RCar Gen3 IIC controller. -- cgit v1.2.3 From 495211a48902c657bc63ea60f8ca4263ffabb0d3 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Tue, 28 Feb 2023 00:03:46 +0100 Subject: i2c: rcar_i2c: Sort Kconfig depends list ascending Sort the list of "depends" symbols in ascending order. No functional change. Signed-off-by: Marek Vasut Reviewed-by: Heiko Schocher --- drivers/i2c/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/i2c/Kconfig b/drivers/i2c/Kconfig index 77a93d8d9ec..2eae33cd54c 100644 --- a/drivers/i2c/Kconfig +++ b/drivers/i2c/Kconfig @@ -496,7 +496,7 @@ config SYS_I2C_OMAP24XX config SYS_I2C_RCAR_I2C bool "Renesas RCar I2C driver" - depends on (RCAR_GEN3 || RCAR_GEN2) && DM_I2C + depends on (RCAR_GEN2 || RCAR_GEN3) && DM_I2C help Support for Renesas RCar I2C controller. -- cgit v1.2.3 From d797a8ccb2d0ea2e90b01b72e61cee3f248a343a Mon Sep 17 00:00:00 2001 From: Mikhail Lappo Date: Tue, 28 Feb 2023 00:04:11 +0100 Subject: net: ravb: Support fixed PHY in R-Car Calling old U-Boot API doesn't allow to use fixed PHY. Searching by mask is the part of new function, after scanning FDT for a fixed PHY definition Fixes: e821a7bdb13 ("net: ravb: Detect PHY correctly") Reviewed-by: Marek Vasut Signed-off-by: Mikhail Lappo Signed-off-by: Hai Pham [Hai Pham: Drop phy_connect_dev since it's called in phy_connect] Signed-off-by: Marek Vasut [Marek: Use mask -1 instead of 0 to reinstate the search behavior over all PHY addresses. Add Fixes tag, sort the tag list.] --- drivers/net/ravb.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/net/ravb.c b/drivers/net/ravb.c index 5a835cc06ff..0bc50dc7335 100644 --- a/drivers/net/ravb.c +++ b/drivers/net/ravb.c @@ -310,7 +310,7 @@ static int ravb_phy_config(struct udevice *dev) struct ravb_priv *eth = dev_get_priv(dev); struct eth_pdata *pdata = dev_get_plat(dev); struct phy_device *phydev; - int mask = 0xffffffff, reg; + int reg; if (dm_gpio_is_valid(ð->reset_gpio)) { dm_gpio_set_value(ð->reset_gpio, 1); @@ -319,12 +319,10 @@ static int ravb_phy_config(struct udevice *dev) mdelay(1); } - phydev = phy_find_by_mask(eth->bus, mask); + phydev = phy_connect(eth->bus, -1, dev, pdata->phy_interface); if (!phydev) return -ENODEV; - phy_connect_dev(phydev, dev, pdata->phy_interface); - eth->phydev = phydev; phydev->supported &= SUPPORTED_100baseT_Full | -- cgit v1.2.3 From 517f8e8aee5402ac67f4e09b0ff4d68cce8e601a Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Tue, 28 Feb 2023 07:25:52 +0100 Subject: pinctrl: renesas: Replace ifdeffery with IS_ENABLED() Switch ifdef in sh_gpio_get_value() to IS_ENABLED() macro. The CONFIG_RCAR_GEN3 will never have SPL counterpart, so the IS_ENABLED() macro is the right one here. No functional change, except for improved build test coverage. Signed-off-by: Marek Vasut --- drivers/gpio/sh_pfc.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/gpio/sh_pfc.c b/drivers/gpio/sh_pfc.c index 988f7e9bbad..92522b63bbe 100644 --- a/drivers/gpio/sh_pfc.c +++ b/drivers/gpio/sh_pfc.c @@ -568,10 +568,10 @@ static int sh_gpio_get_value(struct pinmux_info *gpioc, unsigned gpio) if (!gpioc || get_data_reg(gpioc, gpio, &dr, &bit) != 0) return -1; -#if defined(CONFIG_RCAR_GEN3) - if ((gpioc->gpios[gpio].flags & PINMUX_FLAG_TYPE) == PINMUX_TYPE_INPUT) + + if (IS_ENABLED(CONFIG_RCAR_GEN3) && + ((gpioc->gpios[gpio].flags & PINMUX_FLAG_TYPE) == PINMUX_TYPE_INPUT)) offset += 4; -#endif return gpio_read_bit(dr, offset, bit); } -- cgit v1.2.3 From 5e12d7d00b1e8460689e8b9b2d7713630830c43c Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Tue, 28 Feb 2023 22:17:21 +0100 Subject: serial: sh: Rename CONFIG_SCI and CONFIG_SCIF_USE_EXT_CLK to CFG_ variants Both CONFIG_SCI and CONFIG_SCIF_USE_EXT_CLK options do not have a matching Kconfig entry because they are internal to the SCIF driver. Change their prefix to CFG_, i.e. CFG_SCIF_USE_EXT_CLK and CFG_SCI, to reflect that and avoid interferring with Kconfig symbols. Since neither of those options are defined elsewhere, no functional change. Signed-off-by: Marek Vasut --- drivers/serial/serial_sh.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/serial/serial_sh.c b/drivers/serial/serial_sh.c index 4671217b59a..c3e3f257c65 100644 --- a/drivers/serial/serial_sh.c +++ b/drivers/serial/serial_sh.c @@ -276,7 +276,7 @@ U_BOOT_DRIVER(serial_sh) = { #if defined(CFG_SCIF_A) #define SCIF_BASE_PORT PORT_SCIFA -#elif defined(CONFIG_SCI) +#elif defined(CFG_SCI) #define SCIF_BASE_PORT PORT_SCI #else #define SCIF_BASE_PORT PORT_SCIF @@ -286,7 +286,7 @@ static struct uart_port sh_sci = { .membase = (unsigned char *)SCIF_BASE, .mapbase = SCIF_BASE, .type = SCIF_BASE_PORT, -#ifdef CONFIG_SCIF_USE_EXT_CLK +#ifdef CFG_SCIF_USE_EXT_CLK .clk_mode = EXT_CLK, #endif }; -- cgit v1.2.3 From 836d1bfffafb2cd1cdb9f2ee66dd764de223a5eb Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Tue, 28 Feb 2023 22:17:22 +0100 Subject: serial: sh: Add DEBUG_UART support Add support for debug output very early during boot using the DEBUG_UART mechanism. This uses a static fixed UART port configuration selected via Kconfig options and dedicated print functions from debug_uart.h. This is useful e.g. when debugging problems so early during boot, that not even the DM is initialized at that point, and thus DM_SERIAL is not available either. This functionality is disabled by default. To activate it, define the following Kconfig options and select SCIF type using CFG_SCI/CFG_SCIF_A/ CFG_HSCIF/: CONFIG_DEBUG_UART=y CONFIG_DEBUG_UART_SCIF=y CONFIG_DEBUG_UART_BASE=0xe6540000 CONFIG_DEBUG_UART_CLOCK=24000000 The later two options define the SCIF physical base address and SCIF input clock in Hz. Optionally, to validate DEBUG_UART works, enable the following as well to get early serial output message by default: CONFIG_DEBUG_UART_ANNOUNCE=y Signed-off-by: Marek Vasut --- drivers/serial/Kconfig | 8 +++++ drivers/serial/serial_sh.c | 85 ++++++++++++++++++++++++++++++++-------------- 2 files changed, 68 insertions(+), 25 deletions(-) diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig index bb5083201b3..10d07daf277 100644 --- a/drivers/serial/Kconfig +++ b/drivers/serial/Kconfig @@ -415,6 +415,14 @@ config DEBUG_UART_SEMIHOSTING start up driver model. The driver will be available until the real driver model serial is running. +config DEBUG_UART_SCIF + bool "Renesas SCIF UART" + depends on SH || ARCH_RMOBILE + help + Select this to enable a debug UART using the serial_sh driver. You + will need to provide parameters to make this work. The driver will + be available until the real driver-model serial is running. + config DEBUG_UART_SIFIVE bool "SiFive UART" depends on SIFIVE_SERIAL diff --git a/drivers/serial/serial_sh.c b/drivers/serial/serial_sh.c index c3e3f257c65..e08bdcadc9c 100644 --- a/drivers/serial/serial_sh.c +++ b/drivers/serial/serial_sh.c @@ -249,9 +249,40 @@ U_BOOT_DRIVER(serial_sh) = { #endif .priv_auto = sizeof(struct uart_port), }; +#endif + +#if !CONFIG_IS_ENABLED(DM_SERIAL) || IS_ENABLED(CONFIG_DEBUG_UART_SCIF) -#else /* CONFIG_DM_SERIAL */ +#if defined(CFG_SCIF_A) + #define SCIF_BASE_PORT PORT_SCIFA +#elif defined(CFG_SCI) + #define SCIF_BASE_PORT PORT_SCI +#else + #define SCIF_BASE_PORT PORT_SCIF +#endif + +static void sh_serial_init_nodm(struct uart_port *port) +{ + sh_serial_init_generic(port); + serial_setbrg(); +} + +static void sh_serial_putc_nondm(struct uart_port *port, const char c) +{ + if (c == '\n') { + while (1) { + if (serial_raw_putc(port, '\r') != -EAGAIN) + break; + } + } + while (1) { + if (serial_raw_putc(port, c) != -EAGAIN) + break; + } +} +#endif +#if !CONFIG_IS_ENABLED(DM_SERIAL) #if defined(CONFIG_CONS_SCIF0) # define SCIF_BASE SCIF0_BASE #elif defined(CONFIG_CONS_SCIF1) @@ -274,14 +305,6 @@ U_BOOT_DRIVER(serial_sh) = { # error "Default SCIF doesn't set....." #endif -#if defined(CFG_SCIF_A) - #define SCIF_BASE_PORT PORT_SCIFA -#elif defined(CFG_SCI) - #define SCIF_BASE_PORT PORT_SCI -#else - #define SCIF_BASE_PORT PORT_SCIF -#endif - static struct uart_port sh_sci = { .membase = (unsigned char *)SCIF_BASE, .mapbase = SCIF_BASE, @@ -301,28 +324,14 @@ static void sh_serial_setbrg(void) static int sh_serial_init(void) { - struct uart_port *port = &sh_sci; - - sh_serial_init_generic(port); - serial_setbrg(); + sh_serial_init_nodm(&sh_sci); return 0; } static void sh_serial_putc(const char c) { - struct uart_port *port = &sh_sci; - - if (c == '\n') { - while (1) { - if (serial_raw_putc(port, '\r') != -EAGAIN) - break; - } - } - while (1) { - if (serial_raw_putc(port, c) != -EAGAIN) - break; - } + sh_serial_putc_nondm(&sh_sci, c); } static int sh_serial_tstc(void) @@ -367,3 +376,29 @@ __weak struct serial_device *default_serial_console(void) return &sh_serial_drv; } #endif /* CONFIG_DM_SERIAL */ + +#ifdef CONFIG_DEBUG_UART_SCIF +#include + +static struct uart_port debug_uart_sci = { + .membase = (unsigned char *)CONFIG_DEBUG_UART_BASE, + .mapbase = CONFIG_DEBUG_UART_BASE, + .type = SCIF_BASE_PORT, +#ifdef CFG_SCIF_USE_EXT_CLK + .clk_mode = EXT_CLK, +#endif +}; + +static inline void _debug_uart_init(void) +{ + sh_serial_init_nodm(&debug_uart_sci); +} + +static inline void _debug_uart_putc(int c) +{ + sh_serial_putc_nondm(&debug_uart_sci, c); +} + +DEBUG_UART_FUNCS + +#endif -- cgit v1.2.3 From 6254c5f7e176311eb8bd57817f85d1eed1c362cb Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Tue, 28 Feb 2023 22:19:30 +0100 Subject: serial: sh: Make indent consistent Make the indent of these macro elements consistent with the rest of this table. No functional change. Signed-off-by: Marek Vasut --- drivers/serial/serial_sh.h | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/serial/serial_sh.h b/drivers/serial/serial_sh.h index 660aaab6638..eb8523dde55 100644 --- a/drivers/serial/serial_sh.h +++ b/drivers/serial/serial_sh.h @@ -406,13 +406,13 @@ SCIF_FNS(SCSPTR, 0, 0, 0x24, 16) SCIF_FNS(SCLSR, 0, 0, 0x28, 16) #else -SCIF_FNS(SCFDR, 0x0e, 16, 0x1C, 16) +SCIF_FNS(SCFDR, 0x0e, 16, 0x1C, 16) #if defined(CONFIG_CPU_SH7722) -SCIF_FNS(SCSPTR, 0, 0, 0, 0) +SCIF_FNS(SCSPTR, 0, 0, 0, 0) #else -SCIF_FNS(SCSPTR, 0, 0, 0x20, 16) +SCIF_FNS(SCSPTR, 0, 0, 0x20, 16) #endif -SCIF_FNS(SCLSR, 0, 0, 0x24, 16) +SCIF_FNS(SCLSR, 0, 0, 0x24, 16) #endif SCIF_FNS(DL, 0, 0, 0x0, 0) /* dummy */ #endif -- cgit v1.2.3