From 3b7653db7b638c6033ad24f87325a6b4a4895dee Mon Sep 17 00:00:00 2001 From: Rasmus Villemoes Date: Wed, 10 Jul 2024 09:16:08 +0200 Subject: arm64: dts: imx8mp: rename DHCOM SoM overlays to .dtso Distinguish more clearly between source files meant for producing .dtb from those meant for producing .dtbo. No functional change, as we currently have rules for producing a foo.dtbo from either foo.dts or foo.dtso. Note that in the linux tree, all device tree overlay sources have been renamed to .dtso, and the .dts->.dtbo rule is gone since v6.5 (commit 81d362732bac). So this is also a step towards staying closer to linux with respect to both Kbuild and device tree sources. Cc: Marek Vasut Signed-off-by: Rasmus Villemoes Reviewed-by: Marek Vasut --- .../arm/dts/imx8mp-dhcom-pdk-overlay-eth2xfast.dts | 10 -- .../dts/imx8mp-dhcom-pdk-overlay-eth2xfast.dtso | 10 ++ arch/arm/dts/imx8mp-dhcom-pdk3-overlay-rev100.dts | 10 -- arch/arm/dts/imx8mp-dhcom-pdk3-overlay-rev100.dtso | 10 ++ .../arm/dts/imx8mp-dhcom-som-overlay-eth1xfast.dts | 43 ------- .../dts/imx8mp-dhcom-som-overlay-eth1xfast.dtso | 43 +++++++ .../arm/dts/imx8mp-dhcom-som-overlay-eth2xfast.dts | 24 ---- .../dts/imx8mp-dhcom-som-overlay-eth2xfast.dtso | 24 ++++ arch/arm/dts/imx8mp-dhcom-som-overlay-rev100.dts | 133 --------------------- arch/arm/dts/imx8mp-dhcom-som-overlay-rev100.dtso | 133 +++++++++++++++++++++ 10 files changed, 220 insertions(+), 220 deletions(-) delete mode 100644 arch/arm/dts/imx8mp-dhcom-pdk-overlay-eth2xfast.dts create mode 100644 arch/arm/dts/imx8mp-dhcom-pdk-overlay-eth2xfast.dtso delete mode 100644 arch/arm/dts/imx8mp-dhcom-pdk3-overlay-rev100.dts create mode 100644 arch/arm/dts/imx8mp-dhcom-pdk3-overlay-rev100.dtso delete mode 100644 arch/arm/dts/imx8mp-dhcom-som-overlay-eth1xfast.dts create mode 100644 arch/arm/dts/imx8mp-dhcom-som-overlay-eth1xfast.dtso delete mode 100644 arch/arm/dts/imx8mp-dhcom-som-overlay-eth2xfast.dts create mode 100644 arch/arm/dts/imx8mp-dhcom-som-overlay-eth2xfast.dtso delete mode 100644 arch/arm/dts/imx8mp-dhcom-som-overlay-rev100.dts create mode 100644 arch/arm/dts/imx8mp-dhcom-som-overlay-rev100.dtso diff --git a/arch/arm/dts/imx8mp-dhcom-pdk-overlay-eth2xfast.dts b/arch/arm/dts/imx8mp-dhcom-pdk-overlay-eth2xfast.dts deleted file mode 100644 index 3b397776920..00000000000 --- a/arch/arm/dts/imx8mp-dhcom-pdk-overlay-eth2xfast.dts +++ /dev/null @@ -1,10 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) -/* - * Copyright (C) 2023 Marek Vasut - */ -/dts-v1/; -/plugin/; - -ðphypdk { /* Micrel KSZ9131RNXI */ - status = "disabled"; -}; diff --git a/arch/arm/dts/imx8mp-dhcom-pdk-overlay-eth2xfast.dtso b/arch/arm/dts/imx8mp-dhcom-pdk-overlay-eth2xfast.dtso new file mode 100644 index 00000000000..3b397776920 --- /dev/null +++ b/arch/arm/dts/imx8mp-dhcom-pdk-overlay-eth2xfast.dtso @@ -0,0 +1,10 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) +/* + * Copyright (C) 2023 Marek Vasut + */ +/dts-v1/; +/plugin/; + +ðphypdk { /* Micrel KSZ9131RNXI */ + status = "disabled"; +}; diff --git a/arch/arm/dts/imx8mp-dhcom-pdk3-overlay-rev100.dts b/arch/arm/dts/imx8mp-dhcom-pdk3-overlay-rev100.dts deleted file mode 100644 index f27e6429abe..00000000000 --- a/arch/arm/dts/imx8mp-dhcom-pdk3-overlay-rev100.dts +++ /dev/null @@ -1,10 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) -/* - * Copyright (C) 2023 Marek Vasut - */ -/dts-v1/; -/plugin/; - -ðphy0g { - reg = <7>; -}; diff --git a/arch/arm/dts/imx8mp-dhcom-pdk3-overlay-rev100.dtso b/arch/arm/dts/imx8mp-dhcom-pdk3-overlay-rev100.dtso new file mode 100644 index 00000000000..f27e6429abe --- /dev/null +++ b/arch/arm/dts/imx8mp-dhcom-pdk3-overlay-rev100.dtso @@ -0,0 +1,10 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) +/* + * Copyright (C) 2023 Marek Vasut + */ +/dts-v1/; +/plugin/; + +ðphy0g { + reg = <7>; +}; diff --git a/arch/arm/dts/imx8mp-dhcom-som-overlay-eth1xfast.dts b/arch/arm/dts/imx8mp-dhcom-som-overlay-eth1xfast.dts deleted file mode 100644 index bb5a2b68175..00000000000 --- a/arch/arm/dts/imx8mp-dhcom-som-overlay-eth1xfast.dts +++ /dev/null @@ -1,43 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) -/* - * Copyright (C) 2023 Marek Vasut - */ -/dts-v1/; -/plugin/; - -#include - -&eqos { /* First ethernet */ - pinctrl-0 = <&pinctrl_eqos_rmii>; - phy-handle = <ðphy0f>; - phy-mode = "rmii"; - - assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_266M>, - <&clk IMX8MP_SYS_PLL2_100M>, - <&clk IMX8MP_SYS_PLL2_50M>; - assigned-clock-rates = <0>, <100000000>, <50000000>; -}; - -ðphy0g { /* Micrel KSZ9131RNXI */ - status = "disabled"; -}; - -ðphy0f { /* SMSC LAN8740Ai */ - status = "okay"; -}; - -&fec { /* Second ethernet -- HS connector not populated on 1x RMII PHY SoM */ - status = "disabled"; -}; - -/* No WiFi/BT chipset on this SoM variant. */ - -&uart2 { - bluetooth { - status = "disabled"; - }; -}; - -&usdhc1 { - status = "disabled"; -}; diff --git a/arch/arm/dts/imx8mp-dhcom-som-overlay-eth1xfast.dtso b/arch/arm/dts/imx8mp-dhcom-som-overlay-eth1xfast.dtso new file mode 100644 index 00000000000..bb5a2b68175 --- /dev/null +++ b/arch/arm/dts/imx8mp-dhcom-som-overlay-eth1xfast.dtso @@ -0,0 +1,43 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) +/* + * Copyright (C) 2023 Marek Vasut + */ +/dts-v1/; +/plugin/; + +#include + +&eqos { /* First ethernet */ + pinctrl-0 = <&pinctrl_eqos_rmii>; + phy-handle = <ðphy0f>; + phy-mode = "rmii"; + + assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_266M>, + <&clk IMX8MP_SYS_PLL2_100M>, + <&clk IMX8MP_SYS_PLL2_50M>; + assigned-clock-rates = <0>, <100000000>, <50000000>; +}; + +ðphy0g { /* Micrel KSZ9131RNXI */ + status = "disabled"; +}; + +ðphy0f { /* SMSC LAN8740Ai */ + status = "okay"; +}; + +&fec { /* Second ethernet -- HS connector not populated on 1x RMII PHY SoM */ + status = "disabled"; +}; + +/* No WiFi/BT chipset on this SoM variant. */ + +&uart2 { + bluetooth { + status = "disabled"; + }; +}; + +&usdhc1 { + status = "disabled"; +}; diff --git a/arch/arm/dts/imx8mp-dhcom-som-overlay-eth2xfast.dts b/arch/arm/dts/imx8mp-dhcom-som-overlay-eth2xfast.dts deleted file mode 100644 index 82dadcea96c..00000000000 --- a/arch/arm/dts/imx8mp-dhcom-som-overlay-eth2xfast.dts +++ /dev/null @@ -1,24 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) -/* - * Copyright (C) 2023 Marek Vasut - */ -#include "imx8mp-dhcom-som-overlay-eth1xfast.dts" - -/* Dual RMII 100/Full Fast ethernet on this SoM variant. */ - -&fec { /* Second ethernet */ - pinctrl-0 = <&pinctrl_fec_rmii>; - phy-handle = <ðphy1f>; - phy-mode = "rmii"; - status = "okay"; - - assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_266M>, - <&clk IMX8MP_SYS_PLL2_100M>, - <&clk IMX8MP_SYS_PLL2_50M>, - <&clk IMX8MP_SYS_PLL2_50M>; - assigned-clock-rates = <0>, <100000000>, <50000000>, <0>; -}; - -ðphy1f { /* SMSC LAN8740Ai */ - status = "okay"; -}; diff --git a/arch/arm/dts/imx8mp-dhcom-som-overlay-eth2xfast.dtso b/arch/arm/dts/imx8mp-dhcom-som-overlay-eth2xfast.dtso new file mode 100644 index 00000000000..f2d768cdf91 --- /dev/null +++ b/arch/arm/dts/imx8mp-dhcom-som-overlay-eth2xfast.dtso @@ -0,0 +1,24 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) +/* + * Copyright (C) 2023 Marek Vasut + */ +#include "imx8mp-dhcom-som-overlay-eth1xfast.dtso" + +/* Dual RMII 100/Full Fast ethernet on this SoM variant. */ + +&fec { /* Second ethernet */ + pinctrl-0 = <&pinctrl_fec_rmii>; + phy-handle = <ðphy1f>; + phy-mode = "rmii"; + status = "okay"; + + assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_266M>, + <&clk IMX8MP_SYS_PLL2_100M>, + <&clk IMX8MP_SYS_PLL2_50M>, + <&clk IMX8MP_SYS_PLL2_50M>; + assigned-clock-rates = <0>, <100000000>, <50000000>, <0>; +}; + +ðphy1f { /* SMSC LAN8740Ai */ + status = "okay"; +}; diff --git a/arch/arm/dts/imx8mp-dhcom-som-overlay-rev100.dts b/arch/arm/dts/imx8mp-dhcom-som-overlay-rev100.dts deleted file mode 100644 index b2154d57e48..00000000000 --- a/arch/arm/dts/imx8mp-dhcom-som-overlay-rev100.dts +++ /dev/null @@ -1,133 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) -/* - * Copyright (C) 2023 Marek Vasut - */ -/dts-v1/; -/plugin/; - -#include -#include - -#include "imx8mp-pinfunc.h" - -&brcmf { - reset-gpios = <&gpio1 13 GPIO_ACTIVE_LOW>; -}; - -&eeprom0 { /* EEPROM with EQoS MAC address */ - compatible = "atmel,24c02"; - pagesize = <16>; -}; - -&eeprom1 { /* EEPROM with FEC MAC address */ - compatible = "atmel,24c02"; - pagesize = <16>; -}; - -&eeprom0wl { - status = "disabled"; -}; - -&eeprom1wl { - status = "disabled"; -}; - -ðphy0f { /* SMSC LAN8740Ai */ - pinctrl-0 = <&pinctrl_ethphy0 &pinctrl_ioexp>; - reset-gpios = <&gpio3 20 GPIO_ACTIVE_LOW>; - reg = <0>; -}; - -ðphy0g { /* Micrel KSZ9131RNXI */ - pinctrl-0 = <&pinctrl_ethphy0 &pinctrl_ioexp>; - reset-gpios = <&gpio3 20 GPIO_ACTIVE_LOW>; -}; - -ðphy1f { /* SMSC LAN8740Ai */ - reg = <1>; -}; - -&i2c3 { - adc@48 { - compatible = "ti,tla2024"; - interrupts-extended; - }; -}; - -&ioexp { - status = "disabled"; -}; - -®_eth_vio { - gpio = <&gpio2 10 GPIO_ACTIVE_LOW>; - pinctrl-0 = <&pinctrl_enet_vio>; - pinctrl-names = "default"; -}; - -&rv3032 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_rtc>; - interrupts-extended = <&gpio5 5 IRQ_TYPE_LEVEL_LOW>; -}; - -&uart2 { - bluetooth { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart2_bt>; - shutdown-gpios = <&gpio1 12 GPIO_ACTIVE_HIGH>; - }; -}; - -&usb_dwc3_0 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usb0_vbus>; -}; - -&usdhc1 { - pinctrl-0 = <&pinctrl_usdhc1 &pinctrl_usdhc1_wl_reg_en>; - pinctrl-1 = <&pinctrl_usdhc1_100mhz &pinctrl_usdhc1_wl_reg_en>; - pinctrl-2 = <&pinctrl_usdhc1_200mhz &pinctrl_usdhc1_wl_reg_en>; -}; - -&iomuxc { - pinctrl-0 = <&pinctrl_hog_base - &pinctrl_dhcom_a &pinctrl_dhcom_b &pinctrl_dhcom_c - &pinctrl_dhcom_d &pinctrl_dhcom_e &pinctrl_dhcom_f - &pinctrl_dhcom_g &pinctrl_dhcom_h &pinctrl_dhcom_i - &pinctrl_dhcom_j &pinctrl_dhcom_k &pinctrl_dhcom_l - /* GPIO_M is connected to CLKOUT2 */ - &pinctrl_dhcom_int>; - - pinctrl_enet_vio: dhcom-enet-vio-grp { - fsl,pins = < - MX8MP_IOMUXC_SD1_RESET_B__GPIO2_IO10 0x22 - >; - }; - - pinctrl_rtc: dhcom-rtc-grp { - fsl,pins = < - /* RTC_#INT Interrupt */ - MX8MP_IOMUXC_SPDIF_EXT_CLK__GPIO5_IO05 0x400001c6 - >; - }; - - pinctrl_uart2_bt: dhcom-uart2-bt-grp { - fsl,pins = < - /* BT_REG_EN */ - MX8MP_IOMUXC_GPIO1_IO12__GPIO1_IO12 0x144 - >; - }; - - pinctrl_usb0_vbus: dhcom-usb0-grp { - fsl,pins = < - MX8MP_IOMUXC_GPIO1_IO10__USB1_OTG_ID 0x0 - >; - }; - - pinctrl_usdhc1_wl_reg_en: dhcom-usdhc1-wl-reg-en-grp { - fsl,pins = < - /* WL_REG_EN */ - MX8MP_IOMUXC_GPIO1_IO13__GPIO1_IO13 0x144 - >; - }; -}; diff --git a/arch/arm/dts/imx8mp-dhcom-som-overlay-rev100.dtso b/arch/arm/dts/imx8mp-dhcom-som-overlay-rev100.dtso new file mode 100644 index 00000000000..b2154d57e48 --- /dev/null +++ b/arch/arm/dts/imx8mp-dhcom-som-overlay-rev100.dtso @@ -0,0 +1,133 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) +/* + * Copyright (C) 2023 Marek Vasut + */ +/dts-v1/; +/plugin/; + +#include +#include + +#include "imx8mp-pinfunc.h" + +&brcmf { + reset-gpios = <&gpio1 13 GPIO_ACTIVE_LOW>; +}; + +&eeprom0 { /* EEPROM with EQoS MAC address */ + compatible = "atmel,24c02"; + pagesize = <16>; +}; + +&eeprom1 { /* EEPROM with FEC MAC address */ + compatible = "atmel,24c02"; + pagesize = <16>; +}; + +&eeprom0wl { + status = "disabled"; +}; + +&eeprom1wl { + status = "disabled"; +}; + +ðphy0f { /* SMSC LAN8740Ai */ + pinctrl-0 = <&pinctrl_ethphy0 &pinctrl_ioexp>; + reset-gpios = <&gpio3 20 GPIO_ACTIVE_LOW>; + reg = <0>; +}; + +ðphy0g { /* Micrel KSZ9131RNXI */ + pinctrl-0 = <&pinctrl_ethphy0 &pinctrl_ioexp>; + reset-gpios = <&gpio3 20 GPIO_ACTIVE_LOW>; +}; + +ðphy1f { /* SMSC LAN8740Ai */ + reg = <1>; +}; + +&i2c3 { + adc@48 { + compatible = "ti,tla2024"; + interrupts-extended; + }; +}; + +&ioexp { + status = "disabled"; +}; + +®_eth_vio { + gpio = <&gpio2 10 GPIO_ACTIVE_LOW>; + pinctrl-0 = <&pinctrl_enet_vio>; + pinctrl-names = "default"; +}; + +&rv3032 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_rtc>; + interrupts-extended = <&gpio5 5 IRQ_TYPE_LEVEL_LOW>; +}; + +&uart2 { + bluetooth { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart2_bt>; + shutdown-gpios = <&gpio1 12 GPIO_ACTIVE_HIGH>; + }; +}; + +&usb_dwc3_0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usb0_vbus>; +}; + +&usdhc1 { + pinctrl-0 = <&pinctrl_usdhc1 &pinctrl_usdhc1_wl_reg_en>; + pinctrl-1 = <&pinctrl_usdhc1_100mhz &pinctrl_usdhc1_wl_reg_en>; + pinctrl-2 = <&pinctrl_usdhc1_200mhz &pinctrl_usdhc1_wl_reg_en>; +}; + +&iomuxc { + pinctrl-0 = <&pinctrl_hog_base + &pinctrl_dhcom_a &pinctrl_dhcom_b &pinctrl_dhcom_c + &pinctrl_dhcom_d &pinctrl_dhcom_e &pinctrl_dhcom_f + &pinctrl_dhcom_g &pinctrl_dhcom_h &pinctrl_dhcom_i + &pinctrl_dhcom_j &pinctrl_dhcom_k &pinctrl_dhcom_l + /* GPIO_M is connected to CLKOUT2 */ + &pinctrl_dhcom_int>; + + pinctrl_enet_vio: dhcom-enet-vio-grp { + fsl,pins = < + MX8MP_IOMUXC_SD1_RESET_B__GPIO2_IO10 0x22 + >; + }; + + pinctrl_rtc: dhcom-rtc-grp { + fsl,pins = < + /* RTC_#INT Interrupt */ + MX8MP_IOMUXC_SPDIF_EXT_CLK__GPIO5_IO05 0x400001c6 + >; + }; + + pinctrl_uart2_bt: dhcom-uart2-bt-grp { + fsl,pins = < + /* BT_REG_EN */ + MX8MP_IOMUXC_GPIO1_IO12__GPIO1_IO12 0x144 + >; + }; + + pinctrl_usb0_vbus: dhcom-usb0-grp { + fsl,pins = < + MX8MP_IOMUXC_GPIO1_IO10__USB1_OTG_ID 0x0 + >; + }; + + pinctrl_usdhc1_wl_reg_en: dhcom-usdhc1-wl-reg-en-grp { + fsl,pins = < + /* WL_REG_EN */ + MX8MP_IOMUXC_GPIO1_IO13__GPIO1_IO13 0x144 + >; + }; +}; -- cgit v1.2.3