From 997992201541dcec67cf1ed568e442efd57cbac4 Mon Sep 17 00:00:00 2001 From: Alison Wang Date: Tue, 18 Aug 2015 11:22:05 +0800 Subject: armv8: fsl-lsch3: Rewrite MMU translation table entries This patch rewrites MMU translation table entries. To start, all table entries are written as "invalid", then "device-ngnrnr" and "normal" are written to the entries to enable access to specific addresses. Signed-off-by: Alison Wang Signed-off-by: York Sun --- arch/arm/cpu/armv8/cache_v8.c | 17 +++++++++++++---- 1 file changed, 13 insertions(+), 4 deletions(-) (limited to 'arch/arm/cpu/armv8/cache_v8.c') diff --git a/arch/arm/cpu/armv8/cache_v8.c b/arch/arm/cpu/armv8/cache_v8.c index 835f6a6525e..6bde1cf6a00 100644 --- a/arch/arm/cpu/armv8/cache_v8.c +++ b/arch/arm/cpu/armv8/cache_v8.c @@ -12,13 +12,22 @@ DECLARE_GLOBAL_DATA_PTR; #ifndef CONFIG_SYS_DCACHE_OFF -void set_pgtable_section(u64 *page_table, u64 index, u64 section, - u64 memory_type) +inline void set_pgtable_section(u64 *page_table, u64 index, u64 section, + u64 memory_type, u64 share) { u64 value; value = section | PMD_TYPE_SECT | PMD_SECT_AF; value |= PMD_ATTRINDX(memory_type); + value |= share; + page_table[index] = value; +} + +inline void set_pgtable_table(u64 *page_table, u64 index, u64 *table_addr) +{ + u64 value; + + value = (u64)table_addr | PMD_TYPE_TABLE; page_table[index] = value; } @@ -32,7 +41,7 @@ static void mmu_setup(void) /* Setup an identity-mapping for all spaces */ for (i = 0; i < (PGTABLE_SIZE >> 3); i++) { set_pgtable_section(page_table, i, i << SECTION_SHIFT, - MT_DEVICE_NGNRNE); + MT_DEVICE_NGNRNE, PMD_SECT_NON_SHARE); } /* Setup an identity-mapping for all RAM space */ @@ -42,7 +51,7 @@ static void mmu_setup(void) for (j = start >> SECTION_SHIFT; j < end >> SECTION_SHIFT; j++) { set_pgtable_section(page_table, j, j << SECTION_SHIFT, - MT_NORMAL); + MT_NORMAL, PMD_SECT_NON_SHARE); } } -- cgit v1.2.3