From 5e46f83cc3569b95cef68dfd0722663260af91d0 Mon Sep 17 00:00:00 2001 From: Chander Kashyap Date: Sun, 5 Feb 2012 23:01:45 +0000 Subject: Exynos: Clock.c: Use CONFIG_SYS_CLK_FREQ macro CONFIG_SYS_CLK_FREQ_C210 macro giving notion of S5PC2XX (Exynos4) architecture. Replace CONFIG_SYS_CLK_FREQ_C210 with CONFIG_SYS_CLK_FREQ to make it generic for exynos architecture. Signed-off-by: Chander Kashyap Signed-off-by: Minkyu Kang --- arch/arm/cpu/armv7/exynos/clock.c | 6 +----- 1 file changed, 1 insertion(+), 5 deletions(-) (limited to 'arch/arm/cpu') diff --git a/arch/arm/cpu/armv7/exynos/clock.c b/arch/arm/cpu/armv7/exynos/clock.c index 0c199cdab3d..4d92c53b954 100644 --- a/arch/arm/cpu/armv7/exynos/clock.c +++ b/arch/arm/cpu/armv7/exynos/clock.c @@ -26,10 +26,6 @@ #include #include -#ifndef CONFIG_SYS_CLK_FREQ_C210 -#define CONFIG_SYS_CLK_FREQ_C210 24000000 -#endif - /* exynos4: return pll clock frequency */ static unsigned long exynos4_get_pll_clk(int pllreg) { @@ -76,7 +72,7 @@ static unsigned long exynos4_get_pll_clk(int pllreg) /* SDIV [2:0] */ s = r & 0x7; - freq = CONFIG_SYS_CLK_FREQ_C210; + freq = CONFIG_SYS_CLK_FREQ; if (pllreg == EPLL) { k = k & 0xffff; -- cgit v1.2.3