From d1eee7eed90b8dc3053ddbe223cf4b3e75567b41 Mon Sep 17 00:00:00 2001 From: Ye Li Date: Mon, 20 Apr 2020 20:12:54 -0700 Subject: imx8mp: Add fused parts support iMX8MP has 6 fused parts in each qualification tier, with core, VPU, ISP, NPU or DSP fused respectively. The configuration tables for enabled modules: MIMX8ML8DVNLZAA Quad Core, VPU, NPU, ISP, DSP MIMX8ML7DVNLZAA Quad Core, NPU, ISP MIMX8ML6DVNLZAA Quad Core, VPU, ISP MIMX8ML5DVNLZAA Quad Core, VPU MIMX8ML4DVNLZAA Quad Lite MIMX8ML3DVNLZAA Dual Core, VPU, NPU, ISP, DSP Add the support in U-Boot Reviewed-by: Peng Fan Signed-off-by: Ye Li Signed-off-by: Peng Fan --- arch/arm/mach-imx/cpu.c | 12 +++++++++++- arch/arm/mach-imx/imx8m/soc.c | 34 +++++++++++++++++++++++++++++++++- 2 files changed, 44 insertions(+), 2 deletions(-) (limited to 'arch/arm/mach-imx') diff --git a/arch/arm/mach-imx/cpu.c b/arch/arm/mach-imx/cpu.c index f2070c97143..b89d27ffd23 100644 --- a/arch/arm/mach-imx/cpu.c +++ b/arch/arm/mach-imx/cpu.c @@ -96,7 +96,17 @@ const char *get_imx_type(u32 imxtype) { switch (imxtype) { case MXC_CPU_IMX8MP: - return "8MP"; /* Quad-core version of the imx8mp */ + return "8MP[8]"; /* Quad-core version of the imx8mp */ + case MXC_CPU_IMX8MPD: + return "8MP Dual[3]"; /* Dual-core version of the imx8mp */ + case MXC_CPU_IMX8MPL: + return "8MP Lite[4]"; /* Quad-core Lite version of the imx8mp */ + case MXC_CPU_IMX8MP7: + return "8MP[7]"; /* Quad-core version of the imx8mp, VPU fused */ + case MXC_CPU_IMX8MP6: + return "8MP[6]"; /* Quad-core version of the imx8mp, NPU fused */ + case MXC_CPU_IMX8MP5: + return "8MP[5]"; /* Quad-core version of the imx8mp, ISP fused */ case MXC_CPU_IMX8MN: return "8MNano Quad"; /* Quad-core version */ case MXC_CPU_IMX8MND: diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-imx/imx8m/soc.c index 9caf08e86cf..c103bc3ad10 100644 --- a/arch/arm/mach-imx/imx8m/soc.c +++ b/arch/arm/mach-imx/imx8m/soc.c @@ -211,6 +211,38 @@ static u32 get_cpu_variant_type(u32 type) return MXC_CPU_IMX8MNL; break; } + } else if (type == MXC_CPU_IMX8MP) { + u32 value0 = readl(&fuse->tester3); + u32 flag = 0; + + if ((value0 & 0xc0000) == 0x80000) + return MXC_CPU_IMX8MPD; + + /* vpu disabled */ + if ((value0 & 0x43000000) == 0x43000000) + flag = 1; + + /* npu disabled*/ + if ((value & 0x8) == 0x8) + flag |= (1 << 1); + + /* isp disabled */ + if ((value & 0x3) == 0x3) + flag |= (1 << 2); + + switch (flag) { + case 7: + return MXC_CPU_IMX8MPL; + case 6: + return MXC_CPU_IMX8MP5; + case 2: + return MXC_CPU_IMX8MP6; + case 1: + return MXC_CPU_IMX8MP7; + default: + break; + } + } return type; @@ -228,7 +260,7 @@ u32 get_cpu_rev(void) /* iMX8MP */ if (major_low == 0x43) { - return (MXC_CPU_IMX8MP << 12) | reg; + type = get_cpu_variant_type(MXC_CPU_IMX8MP); } else if (major_low == 0x42) { /* iMX8MN */ type = get_cpu_variant_type(MXC_CPU_IMX8MN); -- cgit v1.2.3