From 2514c2d0e6abe98157c1de83bce5c8bb69ac3a77 Mon Sep 17 00:00:00 2001
From: Patrick Delaunay
Date: Mon, 12 Mar 2018 10:46:10 +0100
Subject: arm: stm32: add new architecture for STM32MP family

- add new arch stm32mp for STM32 MPU/Soc based on Cortex A
- support for stm32mp157 SOC
- SPL is used as first boot stage loader
- using driver model for all the drivers, even in SPL
- all security feature are deactivated (ETZC and TZC)
- reused STM32 MCU drivers when it is possible

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
---
 arch/arm/mach-stm32mp/spl.c | 60 +++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 60 insertions(+)
 create mode 100644 arch/arm/mach-stm32mp/spl.c

(limited to 'arch/arm/mach-stm32mp/spl.c')

diff --git a/arch/arm/mach-stm32mp/spl.c b/arch/arm/mach-stm32mp/spl.c
new file mode 100644
index 00000000000..8f5962a9351
--- /dev/null
+++ b/arch/arm/mach-stm32mp/spl.c
@@ -0,0 +1,60 @@
+/*
+ * Copyright (C) 2018, STMicroelectronics - All Rights Reserved
+ *
+ * SPDX-License-Identifier:	GPL-2.0+	BSD-3-Clause
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <spl.h>
+
+u32 spl_boot_device(void)
+{
+	return BOOT_DEVICE_MMC1;
+}
+
+u32 spl_boot_mode(const u32 boot_device)
+{
+	return MMCSD_MODE_RAW;
+}
+
+void board_init_f(ulong dummy)
+{
+	struct udevice *dev;
+	int ret;
+
+	arch_cpu_init();
+
+	ret = spl_early_init();
+	if (ret) {
+		debug("spl_early_init() failed: %d\n", ret);
+		hang();
+	}
+
+	ret = uclass_get_device(UCLASS_CLK, 0, &dev);
+	if (ret) {
+		debug("Clock init failed: %d\n", ret);
+		return;
+	}
+
+	ret = uclass_get_device(UCLASS_RESET, 0, &dev);
+	if (ret) {
+		debug("Reset init failed: %d\n", ret);
+		return;
+	}
+
+	ret = uclass_get_device(UCLASS_PINCTRL, 0, &dev);
+	if (ret) {
+		debug("%s: Cannot find pinctrl device\n", __func__);
+		return;
+	}
+
+	/* enable console uart printing */
+	preloader_console_init();
+
+	ret = uclass_get_device(UCLASS_RAM, 0, &dev);
+	if (ret) {
+		debug("DRAM init failed: %d\n", ret);
+		return;
+	}
+}
-- 
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