From 185f812c419f1b4f0d10d9787d59cf9f11a2a600 Mon Sep 17 00:00:00 2001 From: Heinrich Schuchardt Date: Wed, 19 Jan 2022 18:05:50 +0100 Subject: doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt --- arch/arm/mach-tegra/clock.c | 10 +++++----- arch/arm/mach-tegra/tegra114/clock.c | 4 ++-- arch/arm/mach-tegra/tegra124/clock.c | 6 +++--- arch/arm/mach-tegra/tegra20/clock.c | 4 ++-- arch/arm/mach-tegra/tegra20/emc.c | 4 ++-- arch/arm/mach-tegra/tegra210/clock.c | 4 ++-- arch/arm/mach-tegra/tegra30/clock.c | 4 ++-- 7 files changed, 18 insertions(+), 18 deletions(-) (limited to 'arch/arm/mach-tegra') diff --git a/arch/arm/mach-tegra/clock.c b/arch/arm/mach-tegra/clock.c index 18c19dbf606..77c8ad978e5 100644 --- a/arch/arm/mach-tegra/clock.c +++ b/arch/arm/mach-tegra/clock.c @@ -243,7 +243,7 @@ void clock_ll_set_source(enum periph_id periph_id, unsigned source) * @param divider_bits number of divider bits (8 or 16) * @param parent_rate clock rate of parent clock in Hz * @param rate required clock rate for this clock - * @return divider which should be used + * Return: divider which should be used */ static int clk_get_divider(unsigned divider_bits, unsigned long parent_rate, unsigned long rate) @@ -297,7 +297,7 @@ int clock_set_pllout(enum clock_id clkid, enum pll_out_id pllout, unsigned rate) * * @param parent_rate clock rate of parent clock in Hz * @param divider which should be used in 7.1 format - * @return effective clock rate of peripheral + * Return: effective clock rate of peripheral */ static unsigned long get_rate_from_divider(unsigned long parent_rate, int divider) @@ -365,7 +365,7 @@ unsigned long clock_get_periph_rate(enum periph_id periph_id, * @param rate required clock rate for this clock * @param extra_div value for the second-stage divisor (not set if this * function returns -1. - * @return divider which should be used, or -1 if nothing is valid + * Return: divider which should be used, or -1 if nothing is valid * */ static int find_best_divider(unsigned divider_bits, unsigned long parent_rate, @@ -403,7 +403,7 @@ static int find_best_divider(unsigned divider_bits, unsigned long parent_rate, * @param source Source number (0-3 or 0-7) * @param mux_bits Number of mux bits (2 or 4) * @param divider Required divider in 7.1 or 15.1 format - * @return 0 if ok, -1 on error (requesting a parent clock which is not valid + * Return: 0 if ok, -1 on error (requesting a parent clock which is not valid * for this peripheral) */ static int adjust_periph_pll(enum periph_id periph_id, int source, @@ -586,7 +586,7 @@ unsigned clock_get_rate(enum clock_id clkid) * @param m PLL input divider(DIVN) * @param p post divider(DIVP) * @param cpcon base PLL charge pump(CPCON) - * @return 0 if ok, -1 on error (the requested PLL is incorrect and cannot + * Return: 0 if ok, -1 on error (the requested PLL is incorrect and cannot * be overridden), 1 if PLL is already correct */ int clock_set_rate(enum clock_id clkid, u32 n, u32 m, u32 p, u32 cpcon) diff --git a/arch/arm/mach-tegra/tegra114/clock.c b/arch/arm/mach-tegra/tegra114/clock.c index 167589d1bb7..703a2314e70 100644 --- a/arch/arm/mach-tegra/tegra114/clock.c +++ b/arch/arm/mach-tegra/tegra114/clock.c @@ -553,7 +553,7 @@ enum clock_id get_periph_clock_id(enum periph_id periph_id, int source) * @param source PLL id of required parent clock * @param mux_bits Set to number of bits in mux register: 2 or 4 * @param divider_bits Set to number of divider bits (8 or 16) - * @return mux value (0-4, or -1 if not found) + * Return: mux value (0-4, or -1 if not found) */ int get_periph_clock_source(enum periph_id periph_id, enum clock_id parent, int *mux_bits, int *divider_bits) @@ -623,7 +623,7 @@ void reset_set_enable(enum periph_id periph_id, int enable) * provided. * * @param clk_id Clock ID according to tegra114 device tree binding - * @return peripheral ID, or PERIPH_ID_NONE if the clock ID is invalid + * Return: peripheral ID, or PERIPH_ID_NONE if the clock ID is invalid */ enum periph_id clk_id_to_periph_id(int clk_id) { diff --git a/arch/arm/mach-tegra/tegra124/clock.c b/arch/arm/mach-tegra/tegra124/clock.c index 79e67f5194e..bbfe1846526 100644 --- a/arch/arm/mach-tegra/tegra124/clock.c +++ b/arch/arm/mach-tegra/tegra124/clock.c @@ -699,7 +699,7 @@ enum clock_id get_periph_clock_id(enum periph_id periph_id, int source) * @param source PLL id of required parent clock * @param mux_bits Set to number of bits in mux register: 2 or 4 * @param divider_bits Set to number of divider bits (8 or 16) - * @return mux value (0-4, or -1 if not found) + * Return: mux value (0-4, or -1 if not found) */ int get_periph_clock_source(enum periph_id periph_id, enum clock_id parent, int *mux_bits, int *divider_bits) @@ -773,7 +773,7 @@ void reset_set_enable(enum periph_id periph_id, int enable) * provided. * * @param clk_id Clock ID according to tegra124 device tree binding - * @return peripheral ID, or PERIPH_ID_NONE if the clock ID is invalid + * Return: peripheral ID, or PERIPH_ID_NONE if the clock ID is invalid */ enum periph_id clk_id_to_periph_id(int clk_id) { @@ -899,7 +899,7 @@ void clock_early_init(void) * Check a register that we set up to see if clock_early_init() has already * been called. * - * @return true if clock_early_init() was called, false if not + * Return: true if clock_early_init() was called, false if not */ bool clock_early_init_done(void) { diff --git a/arch/arm/mach-tegra/tegra20/clock.c b/arch/arm/mach-tegra/tegra20/clock.c index 24e8a13b1f9..3b50a811942 100644 --- a/arch/arm/mach-tegra/tegra20/clock.c +++ b/arch/arm/mach-tegra/tegra20/clock.c @@ -476,7 +476,7 @@ enum clock_id get_periph_clock_id(enum periph_id periph_id, int source) * @param source PLL id of required parent clock * @param mux_bits Set to number of bits in mux register: 2 or 4 * @param divider_bits Set to number of divider bits (8 or 16) - * @return mux value (0-4, or -1 if not found) + * Return: mux value (0-4, or -1 if not found) */ int get_periph_clock_source(enum periph_id periph_id, enum clock_id parent, int *mux_bits, int *divider_bits) @@ -548,7 +548,7 @@ void reset_set_enable(enum periph_id periph_id, int enable) * provided. * * @param clk_id Clock ID according to tegra20 device tree binding - * @return peripheral ID, or PERIPH_ID_NONE if the clock ID is invalid + * Return: peripheral ID, or PERIPH_ID_NONE if the clock ID is invalid */ enum periph_id clk_id_to_periph_id(int clk_id) { diff --git a/arch/arm/mach-tegra/tegra20/emc.c b/arch/arm/mach-tegra/tegra20/emc.c index d55b09b4ac8..fb5e699c940 100644 --- a/arch/arm/mach-tegra/tegra20/emc.c +++ b/arch/arm/mach-tegra/tegra20/emc.c @@ -113,7 +113,7 @@ enum { * @param blob Device tree blob * @param node EMC node (nvidia,tegra20-emc compatible string) * @param ram_code RAM code to select (0-3, or -1 if unknown) - * @return 0 if ok, otherwise a -ve ERR_ code (see enum above) + * Return: 0 if ok, otherwise a -ve ERR_ code (see enum above) */ static int find_emc_tables(const void *blob, int node, int ram_code) { @@ -167,7 +167,7 @@ static int find_emc_tables(const void *blob, int node, int ram_code) * @param tablep Returns pointer to table to program into EMC. There are * TEGRA_EMC_NUM_REGS entries, destined for offsets as per the * emc_reg_addr array. - * @return 0 if ok, otherwise a -ve error code which will allow someone to + * Return: 0 if ok, otherwise a -ve error code which will allow someone to * figure out roughly what went wrong by looking at this code. */ static int decode_emc(const void *blob, unsigned rate, struct emc_ctlr **emcp, diff --git a/arch/arm/mach-tegra/tegra210/clock.c b/arch/arm/mach-tegra/tegra210/clock.c index ccc64eb77b4..10c2478df7f 100644 --- a/arch/arm/mach-tegra/tegra210/clock.c +++ b/arch/arm/mach-tegra/tegra210/clock.c @@ -791,7 +791,7 @@ enum clock_id get_periph_clock_id(enum periph_id periph_id, int source) * @param source PLL id of required parent clock * @param mux_bits Set to number of bits in mux register: 2 or 4 * @param divider_bits Set to number of divider bits (8 or 16) - * @return mux value (0-4, or -1 if not found) + * Return: mux value (0-4, or -1 if not found) */ int get_periph_clock_source(enum periph_id periph_id, enum clock_id parent, int *mux_bits, int *divider_bits) @@ -871,7 +871,7 @@ void reset_set_enable(enum periph_id periph_id, int enable) * provided. * * @param clk_id Clock ID according to tegra210 device tree binding - * @return peripheral ID, or PERIPH_ID_NONE if the clock ID is invalid + * Return: peripheral ID, or PERIPH_ID_NONE if the clock ID is invalid */ enum periph_id clk_id_to_periph_id(int clk_id) { diff --git a/arch/arm/mach-tegra/tegra30/clock.c b/arch/arm/mach-tegra/tegra30/clock.c index b0641c6a41a..c835cd0d47b 100644 --- a/arch/arm/mach-tegra/tegra30/clock.c +++ b/arch/arm/mach-tegra/tegra30/clock.c @@ -533,7 +533,7 @@ enum clock_id get_periph_clock_id(enum periph_id periph_id, int source) * @param source PLL id of required parent clock * @param mux_bits Set to number of bits in mux register: 2 or 4 * @param divider_bits Set to number of divider bits (8 or 16) - * @return mux value (0-4, or -1 if not found) + * Return: mux value (0-4, or -1 if not found) */ int get_periph_clock_source(enum periph_id periph_id, enum clock_id parent, int *mux_bits, int *divider_bits) @@ -603,7 +603,7 @@ void reset_set_enable(enum periph_id periph_id, int enable) * provided. * * @param clk_id Clock ID according to tegra30 device tree binding - * @return peripheral ID, or PERIPH_ID_NONE if the clock ID is invalid + * Return: peripheral ID, or PERIPH_ID_NONE if the clock ID is invalid */ enum periph_id clk_id_to_periph_id(int clk_id) { -- cgit v1.2.3