From 25a91f300578d5905029d5f44799ef71a755ff02 Mon Sep 17 00:00:00 2001 From: Jorge Ramirez-Ortiz Date: Wed, 13 Oct 2021 19:04:47 +0200 Subject: arm64: zynqmp: Print the secure boot status information Output the secure boot configuration to the console. Signed-off-by: Jorge Ramirez-Ortiz Link: https://lore.kernel.org/r/20211013170447.10414-1-jorge@foundries.io Signed-off-by: Michal Simek --- arch/arm/mach-zynqmp/include/mach/hardware.h | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/mach-zynqmp/include/mach/hardware.h b/arch/arm/mach-zynqmp/include/mach/hardware.h index e6a3ee4a57e..a70d6d611b8 100644 --- a/arch/arm/mach-zynqmp/include/mach/hardware.h +++ b/arch/arm/mach-zynqmp/include/mach/hardware.h @@ -152,8 +152,12 @@ struct apu_regs { #define CSU_JTAG_CHAIN_WR_SETUP GENMASK(1, 0) #define CSU_PCAP_PROG_RELEASE_PL BIT(0) +#define ZYNQMP_CSU_STATUS_AUTHENTICATED BIT(0) +#define ZYNQMP_CSU_STATUS_ENCRYPTED BIT(1) + struct csu_regs { - u32 reserved0[4]; + u32 status; + u32 reserved0[3]; u32 multi_boot; u32 reserved1[7]; u32 jtag_chain_status_wr; -- cgit v1.2.3 From af98bf62fab8f074822a225d7c2fb2a02a7734a8 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Wed, 19 Jan 2022 12:01:51 +0100 Subject: arm64: zynqmp: Remove SOM *u-boot.dtsi Disable mmc from u-boot.dtsi file because it was there only for kv260 board. With kr260 this is not needed because we will switch to full DT per board with SD/EMMC there too. Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/3440d9f94361b4800658f313a5785f43ee84ecf3.1642590109.git.michal.simek@xilinx.com --- arch/arm/dts/zynqmp-sm-k26-revA-u-boot.dtsi | 21 --------------------- arch/arm/dts/zynqmp-smk-k26-revA-u-boot.dtsi | 21 --------------------- 2 files changed, 42 deletions(-) delete mode 100644 arch/arm/dts/zynqmp-sm-k26-revA-u-boot.dtsi delete mode 100644 arch/arm/dts/zynqmp-smk-k26-revA-u-boot.dtsi (limited to 'arch') diff --git a/arch/arm/dts/zynqmp-sm-k26-revA-u-boot.dtsi b/arch/arm/dts/zynqmp-sm-k26-revA-u-boot.dtsi deleted file mode 100644 index 467df9f23a1..00000000000 --- a/arch/arm/dts/zynqmp-sm-k26-revA-u-boot.dtsi +++ /dev/null @@ -1,21 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * dts file for Xilinx ZynqMP K26/KV260 SD wiring - * - * (C) Copyright 2020 - 2021, Xilinx, Inc. - * - * Michal Simek - */ - -/* SD0 only supports 3.3V, no level shifter */ -&sdhci1 { /* on CC - MIO 39 - 51 */ - status = "okay"; - no-1-8-v; - disable-wp; - broken-cd; - xlnx,mio-bank = <1>; - /* Do not run SD in HS mode from bootloader */ - sdhci-caps-mask = <0 0x200000>; - sdhci-caps = <0 0>; - max-frequency = <19000000>; -}; diff --git a/arch/arm/dts/zynqmp-smk-k26-revA-u-boot.dtsi b/arch/arm/dts/zynqmp-smk-k26-revA-u-boot.dtsi deleted file mode 100644 index 34e6328fb66..00000000000 --- a/arch/arm/dts/zynqmp-smk-k26-revA-u-boot.dtsi +++ /dev/null @@ -1,21 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * dts file for Xilinx ZynqMP Z2-VSOM - * - * (C) Copyright 2020 - 2021, Xilinx, Inc. - * - * Michal Simek - */ - -/* SD0 only supports 3.3V, no level shifter */ -&sdhci1 { /* FIXME - on CC - MIO 39 - 51 */ - status = "okay"; - no-1-8-v; - disable-wp; - broken-cd; - xlnx,mio-bank = <1>; - /* Do not run SD in HS mode from bootloader */ - sdhci-caps-mask = <0 0x200000>; - sdhci-caps = <0 0>; - max-frequency = <19000000>; -}; -- cgit v1.2.3 From 753a29522c87833fd943e260d6d6748462c23d48 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Fri, 4 Feb 2022 08:40:48 +0100 Subject: xilinx: Remove GPIO_EXTRA_HEADER selection Platform specific headers are empty that's why there is no need to include them. That's why remove them for Zynq/ZynqMP and Versal. Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/625b1be0b813e2b9a5323c0529f9c567bfe13e75.1643960446.git.michal.simek@xilinx.com --- arch/arm/Kconfig | 4 ---- arch/arm/mach-versal/include/mach/gpio.h | 6 ------ arch/arm/mach-zynq/include/mach/gpio.h | 10 ---------- arch/arm/mach-zynqmp/include/mach/gpio.h | 11 ----------- 4 files changed, 31 deletions(-) delete mode 100644 arch/arm/mach-versal/include/mach/gpio.h delete mode 100644 arch/arm/mach-zynq/include/mach/gpio.h delete mode 100644 arch/arm/mach-zynqmp/include/mach/gpio.h (limited to 'arch') diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 6b11c3a50d9..ae5002c9e4d 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1138,7 +1138,6 @@ config ARCH_VERSAL select DM_MMC if MMC select DM_SERIAL select GICV3 - select GPIO_EXTRA_HEADER select OF_CONTROL select SOC_DEVICE imply BOARD_LATE_INIT @@ -1164,7 +1163,6 @@ config ARCH_ZYNQ select DM_SERIAL select DM_SPI select DM_SPI_FLASH - select GPIO_EXTRA_HEADER select OF_CONTROL select SPI select SPL_BOARD_INIT if SPL @@ -1191,7 +1189,6 @@ config ARCH_ZYNQMP_R5 select DM_ETH if NET select DM_MMC if MMC select DM_SERIAL - select GPIO_EXTRA_HEADER select OF_CONTROL imply CMD_DM imply DM_USB_GADGET @@ -1209,7 +1206,6 @@ config ARCH_ZYNQMP select DM_SPI_FLASH if DM_SPI imply FIRMWARE select GICV2 - select GPIO_EXTRA_HEADER select OF_CONTROL select SPL_BOARD_INIT if SPL select SPL_CLK if SPL diff --git a/arch/arm/mach-versal/include/mach/gpio.h b/arch/arm/mach-versal/include/mach/gpio.h deleted file mode 100644 index 677facba5ef..00000000000 --- a/arch/arm/mach-versal/include/mach/gpio.h +++ /dev/null @@ -1,6 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright 2016 - 2018 Xilinx, Inc. - */ - -/* Empty file - for compilation */ diff --git a/arch/arm/mach-zynq/include/mach/gpio.h b/arch/arm/mach-zynq/include/mach/gpio.h deleted file mode 100644 index 6143e24563b..00000000000 --- a/arch/arm/mach-zynq/include/mach/gpio.h +++ /dev/null @@ -1,10 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright (c) 2013 Xilinx, Inc. - * Copyright (c) 2015 DAVE Embedded Systems - */ - -#ifndef _ZYNQ_GPIO_H -#define _ZYNQ_GPIO_H - -#endif /* _ZYNQ_GPIO_H */ diff --git a/arch/arm/mach-zynqmp/include/mach/gpio.h b/arch/arm/mach-zynqmp/include/mach/gpio.h deleted file mode 100644 index 542a5fc3e94..00000000000 --- a/arch/arm/mach-zynqmp/include/mach/gpio.h +++ /dev/null @@ -1,11 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright 2015 Xilinx, Inc. - */ - -#ifndef __ARCH_ZYNQMP_GPIO_H -#define __ARCH_ZYNQMP_GPIO_H - -/* Empty file - sdhci requires this. */ - -#endif -- cgit v1.2.3 From 4fef0a7b7ede545774d024d44c5a1cfe3d5bb383 Mon Sep 17 00:00:00 2001 From: Ovidiu Panait Date: Sun, 13 Feb 2022 10:09:19 +0200 Subject: microblaze: exception: move privileged instruction exception out of v5 ifdef The privileged instruction exception seems to have been introduced in microblaze v7.00 along with MMU support, so having it wrapped in MICROBLAZE_v5 ifdefs seems incorrect. Move it out of the ifdef, since all recent microblaze versions support it. Signed-off-by: Ovidiu Panait Link: https://lore.kernel.org/r/20220213080925.1548411-1-ovidiu.panait@windriver.com Signed-off-by: Michal Simek --- arch/microblaze/cpu/exception.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/microblaze/cpu/exception.c b/arch/microblaze/cpu/exception.c index e9476abedbd..f60f1fc6936 100644 --- a/arch/microblaze/cpu/exception.c +++ b/arch/microblaze/cpu/exception.c @@ -37,10 +37,10 @@ void _hw_exception_handler (void) case 0x5: puts("Divide by zero exception\n"); break; -#ifdef MICROBLAZE_V5 case 0x7: puts("Priviledged or stack protection violation exception\n"); break; +#ifdef MICROBLAZE_V5 case 0x1000: puts("Exception in delay slot\n"); break; -- cgit v1.2.3 From 1669b3d1a0b56178ec8123c48fbf6dabe46b23a4 Mon Sep 17 00:00:00 2001 From: Ovidiu Panait Date: Sun, 13 Feb 2022 10:09:20 +0200 Subject: microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek --- arch/microblaze/cpu/exception.c | 2 +- board/xilinx/microblaze-generic/Kconfig | 9 +++++++++ include/configs/microblaze-generic.h | 3 --- 3 files changed, 10 insertions(+), 4 deletions(-) (limited to 'arch') diff --git a/arch/microblaze/cpu/exception.c b/arch/microblaze/cpu/exception.c index f60f1fc6936..5601dde5b47 100644 --- a/arch/microblaze/cpu/exception.c +++ b/arch/microblaze/cpu/exception.c @@ -40,7 +40,7 @@ void _hw_exception_handler (void) case 0x7: puts("Priviledged or stack protection violation exception\n"); break; -#ifdef MICROBLAZE_V5 +#if CONFIG_IS_ENABLED(XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP) case 0x1000: puts("Exception in delay slot\n"); break; diff --git a/board/xilinx/microblaze-generic/Kconfig b/board/xilinx/microblaze-generic/Kconfig index e31257d3351..117b476f3f4 100644 --- a/board/xilinx/microblaze-generic/Kconfig +++ b/board/xilinx/microblaze-generic/Kconfig @@ -47,6 +47,15 @@ config XILINX_MICROBLAZE0_USR_EXCEP the exception vector table. The user exception vector is located at C_BASE_VECTORS + 0x8 address. +config XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP + bool "MicroBlaze delay slot exception support" + default y + help + Enable this option if the MicroBlaze processor supports exceptions + caused by delay slot instructions (processor version >= v5.00). When + enabled, the hw exception handler will print a message indicating + whether the exception was triggered by a delay slot instruction. + config XILINX_MICROBLAZE0_VECTOR_BASE_ADDR hex "Location of MicroBlaze vectors" default 0x0 diff --git a/include/configs/microblaze-generic.h b/include/configs/microblaze-generic.h index ca749ed18ac..fd5a9cf8b8e 100644 --- a/include/configs/microblaze-generic.h +++ b/include/configs/microblaze-generic.h @@ -11,9 +11,6 @@ /* Microblaze is microblaze_0 */ #define XILINX_FSL_NUMBER 3 -/* MicroBlaze CPU */ -#define MICROBLAZE_V5 1 - #define CONFIG_SYS_BOOTM_LEN (64 * 1024 * 1024) /* uart */ -- cgit v1.2.3 From 7422b411757faa2a01487b43138f29b4fdde3c74 Mon Sep 17 00:00:00 2001 From: Ovidiu Panait Date: Sun, 13 Feb 2022 10:09:21 +0200 Subject: microblaze: exception: fix delay slot exception handling The switch statement in _hw_exception_handler() only covers the rightmost 5 bits that encode the exception cause: switch (state & 0x1f) { ... } For this reason, the "0x1000" case will never be reached, because the 13th bit was zeroed out. To fix this, move delay slot exception handling before the switch statement (delay slot (DS) bit in Exception Status Register is independent of the exception cause (EC)). Signed-off-by: Ovidiu Panait Link: https://lore.kernel.org/r/20220213080925.1548411-3-ovidiu.panait@windriver.com Signed-off-by: Michal Simek --- arch/microblaze/cpu/exception.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) (limited to 'arch') diff --git a/arch/microblaze/cpu/exception.c b/arch/microblaze/cpu/exception.c index 5601dde5b47..64d5fe4a80c 100644 --- a/arch/microblaze/cpu/exception.c +++ b/arch/microblaze/cpu/exception.c @@ -21,6 +21,11 @@ void _hw_exception_handler (void) printf("Hardware exception at 0x%x address\n", address); R17(address); printf("Return address from exception 0x%x\n", address); + + if (CONFIG_IS_ENABLED(XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP) && + (state & 0x1000)) + puts("Exception in delay slot\n"); + switch (state & 0x1f) { /* mask on exception cause */ case 0x1: puts("Unaligned data access exception\n"); @@ -40,11 +45,6 @@ void _hw_exception_handler (void) case 0x7: puts("Priviledged or stack protection violation exception\n"); break; -#if CONFIG_IS_ENABLED(XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP) - case 0x1000: - puts("Exception in delay slot\n"); - break; -#endif default: puts("Undefined cause\n"); break; -- cgit v1.2.3 From ee8161f7d182e57ea828f77a6b246c884c70b7cd Mon Sep 17 00:00:00 2001 From: Ovidiu Panait Date: Sun, 13 Feb 2022 10:09:22 +0200 Subject: microblaze: exception: fix return address for delay slot exceptions According to the MicroBlaze reference manual (xilinx2021.2/ug984/page-37): """ If an exception is caused by an instruction in a delay slot (that is, ESR[DS]=1), the exception handler should return execution to the address stored in BTR instead of the normal exception return address stored in R17. """ Adjust the code to print the proper return address for delay slot exceptions. Signed-off-by: Ovidiu Panait Link: https://lore.kernel.org/r/20220213080925.1548411-4-ovidiu.panait@windriver.com Signed-off-by: Michal Simek --- arch/microblaze/cpu/exception.c | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) (limited to 'arch') diff --git a/arch/microblaze/cpu/exception.c b/arch/microblaze/cpu/exception.c index 64d5fe4a80c..f79e465e1fb 100644 --- a/arch/microblaze/cpu/exception.c +++ b/arch/microblaze/cpu/exception.c @@ -20,11 +20,17 @@ void _hw_exception_handler (void) MFS(state, resr); printf("Hardware exception at 0x%x address\n", address); R17(address); - printf("Return address from exception 0x%x\n", address); if (CONFIG_IS_ENABLED(XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP) && - (state & 0x1000)) + (state & 0x1000)) { + /* + * For exceptions in delay slots, the return address is stored + * in the Branch Target Register (BTR), rather than R17. + */ + MFS(address, rbtr); + puts("Exception in delay slot\n"); + } switch (state & 0x1f) { /* mask on exception cause */ case 0x1: @@ -49,6 +55,8 @@ void _hw_exception_handler (void) puts("Undefined cause\n"); break; } + + printf("Return address from exception 0x%x\n", address); printf("Unaligned %sword access\n", ((state & 0x800) ? "" : "half")); printf("Unaligned %s access\n", ((state & 0x400) ? "store" : "load")); printf("Register R%x\n", (state & 0x3E) >> 5); -- cgit v1.2.3 From 339f489d524e8daa40a4ab0c64bfe65ef30f5fc6 Mon Sep 17 00:00:00 2001 From: Ovidiu Panait Date: Sun, 13 Feb 2022 10:09:23 +0200 Subject: microblaze: exception: move unaligned access printfs inside switch case The unaligned access messages are only valid in the case of an unaligned data access exception. Do not print them for other types of hw exceptions. Signed-off-by: Ovidiu Panait Link: https://lore.kernel.org/r/20220213080925.1548411-5-ovidiu.panait@windriver.com Signed-off-by: Michal Simek --- arch/microblaze/cpu/exception.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) (limited to 'arch') diff --git a/arch/microblaze/cpu/exception.c b/arch/microblaze/cpu/exception.c index f79e465e1fb..d37f04364ad 100644 --- a/arch/microblaze/cpu/exception.c +++ b/arch/microblaze/cpu/exception.c @@ -35,6 +35,10 @@ void _hw_exception_handler (void) switch (state & 0x1f) { /* mask on exception cause */ case 0x1: puts("Unaligned data access exception\n"); + + printf("Unaligned %sword access\n", ((state & 0x800) ? "" : "half")); + printf("Unaligned %s access\n", ((state & 0x400) ? "store" : "load")); + printf("Register R%x\n", (state & 0x3E) >> 5); break; case 0x2: puts("Illegal op-code exception\n"); @@ -57,9 +61,6 @@ void _hw_exception_handler (void) } printf("Return address from exception 0x%x\n", address); - printf("Unaligned %sword access\n", ((state & 0x800) ? "" : "half")); - printf("Unaligned %s access\n", ((state & 0x400) ? "store" : "load")); - printf("Register R%x\n", (state & 0x3E) >> 5); hang(); } -- cgit v1.2.3 From d1114b83405ceaccd46bce96001e6da4fab3ae40 Mon Sep 17 00:00:00 2001 From: Ovidiu Panait Date: Sun, 13 Feb 2022 10:09:24 +0200 Subject: microblaze: exception: fix unaligned data access register mask The correct mask for getting the source/destination register from ESR in the case of an unaligned access exception is 0x3E0. With this change, a dummy unaligned store produces the expected info: """ >> swi r5, r0, 0x111 ... Hardware exception at 0x111 address Unaligned data access exception Unaligned word access Unaligned store access Register R5 Return address from exception 0x7f99dfc ### ERROR ### Please RESET the board ### """ Signed-off-by: Ovidiu Panait Link: https://lore.kernel.org/r/20220213080925.1548411-6-ovidiu.panait@windriver.com Signed-off-by: Michal Simek --- arch/microblaze/cpu/exception.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/microblaze/cpu/exception.c b/arch/microblaze/cpu/exception.c index d37f04364ad..d3640d3903b 100644 --- a/arch/microblaze/cpu/exception.c +++ b/arch/microblaze/cpu/exception.c @@ -38,7 +38,7 @@ void _hw_exception_handler (void) printf("Unaligned %sword access\n", ((state & 0x800) ? "" : "half")); printf("Unaligned %s access\n", ((state & 0x400) ? "store" : "load")); - printf("Register R%x\n", (state & 0x3E) >> 5); + printf("Register R%x\n", (state & 0x3E0) >> 5); break; case 0x2: puts("Illegal op-code exception\n"); -- cgit v1.2.3 From 27703ba06ded72b735ad92214857d7628a273429 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Thu, 17 Feb 2022 14:28:39 +0100 Subject: arm64: zynqmp: Build psu_spl_init for SPL all the time ZYNQMP_PSU_INIT_ENABLED specifically saying that has connection to full U-Boot not SPL that's why build psu_spl_init for SPL all the time. Also disable ZYNQMP_PSU_INIT_ENABLED because it ends up in situation that psu_init() is called twice which is wrong. By default only SPL should call it. Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/bf1e5d9a163f8853c7d951ad42965114ab0b1f50.1645104518.git.michal.simek@xilinx.com --- arch/arm/mach-zynqmp/Makefile | 2 +- configs/xilinx_zynqmp_virt_defconfig | 1 - 2 files changed, 1 insertion(+), 2 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-zynqmp/Makefile b/arch/arm/mach-zynqmp/Makefile index eb6c5112b37..4f9f6b56a98 100644 --- a/arch/arm/mach-zynqmp/Makefile +++ b/arch/arm/mach-zynqmp/Makefile @@ -6,6 +6,6 @@ obj-y += clk.o obj-y += cpu.o obj-$(CONFIG_MP) += mp.o -obj-$(CONFIG_SPL_BUILD) += spl.o handoff.o +obj-$(CONFIG_SPL_BUILD) += spl.o handoff.o psu_spl_init.o obj-$(CONFIG_SPL_ZYNQMP_DRAM_ECC_INIT) += ecc_spl_init.o obj-$(CONFIG_ZYNQMP_PSU_INIT_ENABLED) += psu_spl_init.o diff --git a/configs/xilinx_zynqmp_virt_defconfig b/configs/xilinx_zynqmp_virt_defconfig index 133a5638a8b..5cdfa6c2798 100644 --- a/configs/xilinx_zynqmp_virt_defconfig +++ b/configs/xilinx_zynqmp_virt_defconfig @@ -18,7 +18,6 @@ CONFIG_ZYNQ_MAC_IN_EEPROM=y CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET=0x20 CONFIG_CMD_FRU=y CONFIG_ZYNQMP_USB=y -CONFIG_ZYNQMP_PSU_INIT_ENABLED=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_LOAD_ADDR=0x8000000 -- cgit v1.2.3 From 83d2941fe9750f7d98d560d7782edcf31b574d3d Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Thu, 17 Feb 2022 14:28:40 +0100 Subject: arm64: zynqmp: Fix dependencies around ZYNQMP_PSU_INIT_ENABLED ZYNQMP_PSU_INIT_ENABLED is called only when BOARD_EARLY_INIT_F is defined that's why cover this dependency in Kconfig. board_early_init_f() is only part related to CONFIG_ZYNQMP_PSU_INIT_ENABLED which is disabled now that's why disable BOARD_EARLY_INIT_F and also build board_early_init_f() only when CONFIG_BOARD_EARLY_INIT_F is enabled. Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/d89253ec1590cd513dcd4bfbedebae618bd6d605.1645104518.git.michal.simek@xilinx.com --- arch/arm/mach-zynqmp/Kconfig | 1 + board/xilinx/zynqmp/zynqmp.c | 2 ++ configs/xilinx_zynqmp_virt_defconfig | 1 - 3 files changed, 3 insertions(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/mach-zynqmp/Kconfig b/arch/arm/mach-zynqmp/Kconfig index f8b5906039d..66045067d2f 100644 --- a/arch/arm/mach-zynqmp/Kconfig +++ b/arch/arm/mach-zynqmp/Kconfig @@ -140,6 +140,7 @@ config DEFINE_TCM_OCM_MMAP config ZYNQMP_PSU_INIT_ENABLED bool "Include psu_init" + select BOARD_EARLY_INIT_F help Include psu_init to full u-boot. SPL include psu_init by default. diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c index 242e143cbfd..3a10ed859d2 100644 --- a/board/xilinx/zynqmp/zynqmp.c +++ b/board/xilinx/zynqmp/zynqmp.c @@ -313,6 +313,7 @@ static char *zynqmp_get_silicon_idcode_name(void) } #endif +#if defined(CONFIG_BOARD_EARLY_INIT_F) int board_early_init_f(void) { #if defined(CONFIG_ZYNQMP_PSU_INIT_ENABLED) @@ -345,6 +346,7 @@ int board_early_init_f(void) return 0; } +#endif static int multi_boot(void) { diff --git a/configs/xilinx_zynqmp_virt_defconfig b/configs/xilinx_zynqmp_virt_defconfig index 5cdfa6c2798..7b295282e37 100644 --- a/configs/xilinx_zynqmp_virt_defconfig +++ b/configs/xilinx_zynqmp_virt_defconfig @@ -28,7 +28,6 @@ CONFIG_SPL_LOAD_FIT_ADDRESS=0x10000000 # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set CONFIG_USE_PREBOOT=y CONFIG_PREBOOT="run scsi_init;usb start" -CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_SPL_STACK_R=y CONFIG_SPL_FPGA=y -- cgit v1.2.3 From 05f0f269b7a6e5c9b65e88bb8b691e28cb49da84 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Thu, 17 Feb 2022 14:28:41 +0100 Subject: ARM: zynq: Fix debug uart initialization The commit 0dba45864b2a ("arm: Init the debug UART") calls debug_uart_init() from crt0.S but it won't work because SOC is not configured yet. That's why create board_debug_uart_init() which calls ps7_init() earlier before the first access to UART. Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/18e67e02a0c7190839a1ef3a11f3fd6babcf34cc.1645104518.git.michal.simek@xilinx.com --- arch/arm/Kconfig | 1 + arch/arm/mach-zynq/spl.c | 15 +++++++++------ board/xilinx/zynq/board.c | 7 +++++++ 3 files changed, 17 insertions(+), 6 deletions(-) (limited to 'arch') diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index ae5002c9e4d..c5b21cd06e7 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1157,6 +1157,7 @@ config ARCH_ZYNQ select CLK select CLK_ZYNQ select CPU_V7A + select DEBUG_UART_BOARD_INIT if SPL && DEBUG_UART select DM select DM_ETH if NET select DM_MMC if MMC diff --git a/arch/arm/mach-zynq/spl.c b/arch/arm/mach-zynq/spl.c index b1a5184b689..fea1c9b12ad 100644 --- a/arch/arm/mach-zynq/spl.c +++ b/arch/arm/mach-zynq/spl.c @@ -16,17 +16,20 @@ #include #include +#if defined(CONFIG_DEBUG_UART_BOARD_INIT) +void board_debug_uart_init(void) +{ + ps7_init(); +} +#endif + void board_init_f(ulong dummy) { +#if !defined(CONFIG_DEBUG_UART_BOARD_INIT) ps7_init(); +#endif arch_cpu_init(); - -#ifdef CONFIG_DEBUG_UART - /* Uart debug for sure */ - debug_uart_init(); - puts("Debug uart enabled\n"); /* or printch() */ -#endif } #ifdef CONFIG_SPL_BOARD_INIT diff --git a/board/xilinx/zynq/board.c b/board/xilinx/zynq/board.c index 1111ad6fca9..26ef0488358 100644 --- a/board/xilinx/zynq/board.c +++ b/board/xilinx/zynq/board.c @@ -25,6 +25,13 @@ DECLARE_GLOBAL_DATA_PTR; +#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_DEBUG_UART_BOARD_INIT) +void board_debug_uart_init(void) +{ + /* Add initialization sequence if UART is not configured */ +} +#endif + int board_init(void) { if (IS_ENABLED(CONFIG_SPL_BUILD)) -- cgit v1.2.3 From 11381fba99dcadf9fa59dec08d78b730042ab134 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Thu, 17 Feb 2022 14:28:42 +0100 Subject: arm64: zynqmp: Fix debug uart initialization The commit 0dba45864b2a ("arm: Init the debug UART") calls debug_uart_init() from crt0.S but it won't work because SOC is not configured yet. That's why create board_debug_uart_init() which calls psu_init() via new psu_uboot_init() earlier before the first access to UART in SPL. In full U-Boot call psu_uboot_init() only when CONFIG_ZYNQMP_PSU_INIT_ENABLED is enabled. Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/878dc2daaa8685346f889989fbfb98b2e44da7fb.1645104518.git.michal.simek@xilinx.com --- arch/arm/Kconfig | 1 + arch/arm/mach-zynqmp/include/mach/psu_init_gpl.h | 1 + arch/arm/mach-zynqmp/spl.c | 12 ++++++++- board/xilinx/zynqmp/zynqmp.c | 32 ++++++++++++++++-------- 4 files changed, 35 insertions(+), 11 deletions(-) (limited to 'arch') diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index c5b21cd06e7..5e237d86211 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1199,6 +1199,7 @@ config ARCH_ZYNQMP select ARM64 select CLK select DM + select DEBUG_UART_BOARD_INIT if SPL && DEBUG_UART select DM_ETH if NET select DM_MAILBOX select DM_MMC if MMC diff --git a/arch/arm/mach-zynqmp/include/mach/psu_init_gpl.h b/arch/arm/mach-zynqmp/include/mach/psu_init_gpl.h index e37acda2f89..434a7fa20e4 100644 --- a/arch/arm/mach-zynqmp/include/mach/psu_init_gpl.h +++ b/arch/arm/mach-zynqmp/include/mach/psu_init_gpl.h @@ -22,5 +22,6 @@ void prog_reg(unsigned long addr, unsigned long mask, int psu_init(void); unsigned long psu_post_config_data(void); +int psu_uboot_init(void); #endif /* _PSU_INIT_GPL_H_ */ diff --git a/arch/arm/mach-zynqmp/spl.c b/arch/arm/mach-zynqmp/spl.c index 6b836cbff2d..b428fd53121 100644 --- a/arch/arm/mach-zynqmp/spl.c +++ b/arch/arm/mach-zynqmp/spl.c @@ -19,9 +19,19 @@ #include #include +#if defined(CONFIG_DEBUG_UART_BOARD_INIT) +void board_debug_uart_init(void) +{ + psu_uboot_init(); +} +#endif + void board_init_f(ulong dummy) { - board_early_init_f(); +#if !defined(CONFIG_DEBUG_UART_BOARD_INIT) + psu_uboot_init(); +#endif + board_early_init_r(); #ifdef CONFIG_SPL_ZYNQMP_DRAM_ECC_INIT zynqmp_ecc_init(); diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c index 3a10ed859d2..70b3c81f128 100644 --- a/board/xilinx/zynqmp/zynqmp.c +++ b/board/xilinx/zynqmp/zynqmp.c @@ -313,10 +313,8 @@ static char *zynqmp_get_silicon_idcode_name(void) } #endif -#if defined(CONFIG_BOARD_EARLY_INIT_F) -int board_early_init_f(void) +int __maybe_unused psu_uboot_init(void) { -#if defined(CONFIG_ZYNQMP_PSU_INIT_ENABLED) int ret; ret = psu_init(); @@ -336,16 +334,30 @@ int board_early_init_f(void) /* Delay is required for clocks to be propagated */ udelay(1000000); -#endif + + return 0; +} -#ifdef CONFIG_DEBUG_UART - /* Uart debug for sure */ - debug_uart_init(); - puts("Debug uart enabled\n"); /* or printch() */ -#endif +#if !defined(CONFIG_SPL_BUILD) +# if defined(CONFIG_DEBUG_UART_BOARD_INIT) +void board_debug_uart_init(void) +{ +# if defined(CONFIG_ZYNQMP_PSU_INIT_ENABLED) + psu_uboot_init(); +# endif +} +# endif - return 0; +# if defined(CONFIG_BOARD_EARLY_INIT_F) +int board_early_init_f(void) +{ + int ret = 0; +# if defined(CONFIG_ZYNQMP_PSU_INIT_ENABLED) && !defined(CONFIG_DEBUG_UART_BOARD_INIT) + ret = psu_uboot_init(); +# endif + return ret; } +# endif #endif static int multi_boot(void) -- cgit v1.2.3 From 9bd4232f958b94fdd700e44897fb61bdc898b787 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Tue, 15 Feb 2022 08:57:52 +0100 Subject: arm64: zynqmp: Remove additional gpio header from dlc21 This header shouldn't be in this file and there is already pointer to dt-bindings/gpio/gpio.h. Fixes: d2d14383bae4 ("arm64: zynqmp: Add support for DLC21 (Smartlynq+) board") Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/266bc91073f1149f3f60b1c9c0ba509c48470e2e.1644911870.git.michal.simek@xilinx.com --- arch/arm/dts/zynqmp-dlc21-revA.dts | 1 - 1 file changed, 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/dts/zynqmp-dlc21-revA.dts b/arch/arm/dts/zynqmp-dlc21-revA.dts index cf0aadf03ca..0461219ca3e 100644 --- a/arch/arm/dts/zynqmp-dlc21-revA.dts +++ b/arch/arm/dts/zynqmp-dlc21-revA.dts @@ -12,7 +12,6 @@ #include "zynqmp-clk-ccf.dtsi" #include #include -#include / { model = "Smartlynq+ DLC21 RevA"; -- cgit v1.2.3