From e0ae64880b61fdeaf261fddd747efa80fa53d386 Mon Sep 17 00:00:00 2001 From: George McCollister Date: Wed, 21 Oct 2015 08:05:33 -0500 Subject: x86: Add support for Advantech SOM-6896 Advantech SOM-6896 is a Broadwell U based COM Express Compact Module Type 6. This patch adds support for it as a coreboot payload. On board SATA and SPI are functional. On board Ethernet isn't functional but since it's optional and ties up a PCIe x4 that is otherwise brought out, this isn't a concern at the moment. USB doesn't work since the xHCI driver appears to be broken. Signed-off-by: George McCollister Reviewed-by: Bin Meng Acked-by: Simon Glass Reviewed-by: Tom Rini --- arch/x86/dts/Makefile | 3 ++- arch/x86/dts/broadwell_som-6896.dts | 43 +++++++++++++++++++++++++++++++++++++ 2 files changed, 45 insertions(+), 1 deletion(-) create mode 100644 arch/x86/dts/broadwell_som-6896.dts (limited to 'arch') diff --git a/arch/x86/dts/Makefile b/arch/x86/dts/Makefile index 71595c79fb7..83a2b8c1cf0 100644 --- a/arch/x86/dts/Makefile +++ b/arch/x86/dts/Makefile @@ -6,7 +6,8 @@ dtb-y += bayleybay.dtb \ galileo.dtb \ minnowmax.dtb \ qemu-x86_i440fx.dtb \ - qemu-x86_q35.dtb + qemu-x86_q35.dtb \ + broadwell_som-6896.dtb targets += $(dtb-y) diff --git a/arch/x86/dts/broadwell_som-6896.dts b/arch/x86/dts/broadwell_som-6896.dts new file mode 100644 index 00000000000..a6b5d0f4a59 --- /dev/null +++ b/arch/x86/dts/broadwell_som-6896.dts @@ -0,0 +1,43 @@ +/dts-v1/; + +/include/ "skeleton.dtsi" +/include/ "serial.dtsi" +/include/ "rtc.dtsi" + +/ { + model = "Advantech SOM-6896"; + compatible = "advantech,som-6896", "intel,broadwell"; + + aliases { + spi0 = "/spi"; + }; + + config { + silent_console = <0>; + }; + + chosen { + stdout-path = "/serial"; + }; + + pci { + compatible = "pci-x86"; + #address-cells = <3>; + #size-cells = <2>; + u-boot,dm-pre-reloc; + ranges = <0x02000000 0x0 0xe0000000 0xe0000000 0 0x10000000 + 0x42000000 0x0 0xd0000000 0xd0000000 0 0x10000000 + 0x01000000 0x0 0x2000 0x2000 0 0xe000>; + }; + + spi { + #address-cells = <1>; + #size-cells = <0>; + compatible = "intel,ich-spi"; + spi-flash@0 { + reg = <0>; + compatible = "winbond,w25q128", "spi-flash"; + memory-map = <0xff000000 0x01000000>; + }; + }; +}; -- cgit v1.2.3