From 038b965c2b403c8087ca0515f907b730be57d739 Mon Sep 17 00:00:00 2001
From: York Sun
Date: Tue, 26 Jun 2018 14:48:29 -0700
Subject: armv8: ls1046ardb: Add falcon mode for for QSPI boot

A new defconfig is introduced to support SPL boot from QSPI NOR
flash. This is to support falcon mode for faster booting into
Linux.

Signed-off-by: York Sun <york.sun@nxp.com>
---
 board/freescale/ls1046ardb/ls1046ardb_qspi_pbi.cfg | 26 ++++++++++++++++++++++
 board/freescale/ls1046ardb/ls1046ardb_rcw_qspi.cfg |  7 ++++++
 2 files changed, 33 insertions(+)
 create mode 100644 board/freescale/ls1046ardb/ls1046ardb_qspi_pbi.cfg
 create mode 100644 board/freescale/ls1046ardb/ls1046ardb_rcw_qspi.cfg

(limited to 'board')

diff --git a/board/freescale/ls1046ardb/ls1046ardb_qspi_pbi.cfg b/board/freescale/ls1046ardb/ls1046ardb_qspi_pbi.cfg
new file mode 100644
index 00000000000..735d46c9f9b
--- /dev/null
+++ b/board/freescale/ls1046ardb/ls1046ardb_qspi_pbi.cfg
@@ -0,0 +1,26 @@
+#QSPI clk
+0957015c 40100000
+#Configure Scratch register
+09570600 00000000
+09570604 10000000
+#Disable CCI barrier tranaction
+09570178 0000e010
+09180000 00000008
+#USB PHY frequency sel
+09570418 0000009e
+0957041c 0000009e
+09570420 0000009e
+#Serdes SATA
+09eb1300 80104e20
+09eb08dc 00502880
+#PEX gen3 link
+09570158 00000300
+89400890 01048000
+89500890 01048000
+89600890 01048000
+#Alt base register
+09570158 00001000
+#flush PBI data
+096100c0 000fffff
+#Change endianness
+09550000 000f400c
diff --git a/board/freescale/ls1046ardb/ls1046ardb_rcw_qspi.cfg b/board/freescale/ls1046ardb/ls1046ardb_rcw_qspi.cfg
new file mode 100644
index 00000000000..7b9be0ad3f8
--- /dev/null
+++ b/board/freescale/ls1046ardb/ls1046ardb_rcw_qspi.cfg
@@ -0,0 +1,7 @@
+#PBL preamble and RCW header
+aa55aa55 01ee0100
+# RCW
+0c150010 0e000000 00000000 00000000
+11335559 40005012 40025000 c1000000
+00000000 00000000 00000000 00238800
+20124000 00003101 00000096 00000001
-- 
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