From 5c7f10fda362db16a7bf3e571b4ae1e88fac2466 Mon Sep 17 00:00:00 2001 From: Oliver Schinagl Date: Fri, 26 Jul 2013 12:56:58 +0200 Subject: sun6i: Add basic axp221 driver The A31 uses the AXP221 pmic for various voltages. Signed-off-by: Oliver Schinagl Signed-off-by: Hans de Goede Acked-by: Ian Campbell -- Changes in v2: -Rebase Changes in v3: -Add support for all dldo and aldo-s -Add Kconfig option to select building AXP221 and to select voltage of dldo and aldo-s Changes in v4: -Add axp221_setbits helper function -Use symbolic names for enabled bits in CTRL1 - CTRL3 registers --- board/sunxi/board.c | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) (limited to 'board') diff --git a/board/sunxi/board.c b/board/sunxi/board.c index 03890c8c9ce..e6ec5b8fc10 100644 --- a/board/sunxi/board.c +++ b/board/sunxi/board.c @@ -19,6 +19,9 @@ #ifdef CONFIG_AXP209_POWER #include #endif +#ifdef CONFIG_AXP221_POWER +#include +#endif #include #include #include @@ -168,6 +171,29 @@ void sunxi_board_init(void) power_failed |= axp209_set_ldo2(3000); power_failed |= axp209_set_ldo3(2800); power_failed |= axp209_set_ldo4(2800); +#endif +#ifdef CONFIG_AXP221_POWER + power_failed = axp221_init(); + power_failed |= axp221_set_dcdc1(3000); + power_failed |= axp221_set_dcdc2(1200); + power_failed |= axp221_set_dcdc3(1200); + power_failed |= axp221_set_dcdc4(1200); + power_failed |= axp221_set_dcdc5(1500); +#if CONFIG_AXP221_DLDO1_VOLT != -1 + power_failed |= axp221_set_dldo1(CONFIG_AXP221_DLDO1_VOLT); +#endif +#if CONFIG_AXP221_DLDO4_VOLT != -1 + power_failed |= axp221_set_dldo4(CONFIG_AXP221_DLDO4_VOLT); +#endif +#if CONFIG_AXP221_ALDO1_VOLT != -1 + power_failed |= axp221_set_aldo1(CONFIG_AXP221_ALDO1_VOLT); +#endif +#if CONFIG_AXP221_ALDO2_VOLT != -1 + power_failed |= axp221_set_aldo2(CONFIG_AXP221_ALDO2_VOLT); +#endif +#if CONFIG_AXP221_ALDO3_VOLT != -1 + power_failed |= axp221_set_aldo3(CONFIG_AXP221_ALDO3_VOLT); +#endif #endif printf("DRAM:"); -- cgit v1.2.3 From 8c2c9cfa7bfe1e5ee792b2e277f8dbff9bdf8ccf Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Sat, 25 Oct 2014 20:18:10 +0200 Subject: sun6i: Enable SPL Enable the SPL now that we've all the necessary bits in place. Signed-off-by: Hans de Goede Acked-by: Ian Campbell --- board/sunxi/Kconfig | 1 + configs/Colombus_defconfig | 9 +++++---- 2 files changed, 6 insertions(+), 4 deletions(-) (limited to 'board') diff --git a/board/sunxi/Kconfig b/board/sunxi/Kconfig index 5b2d091122d..668838631cc 100644 --- a/board/sunxi/Kconfig +++ b/board/sunxi/Kconfig @@ -16,6 +16,7 @@ config MACH_SUN5I config MACH_SUN6I bool "sun6i (Allwinner A31)" select CPU_V7 + select SUPPORT_SPL config MACH_SUN7I bool "sun7i (Allwinner A20)" diff --git a/configs/Colombus_defconfig b/configs/Colombus_defconfig index 89291f90e97..bef568df713 100644 --- a/configs/Colombus_defconfig +++ b/configs/Colombus_defconfig @@ -1,5 +1,6 @@ -CONFIG_ARM=y -CONFIG_ARCH_SUNXI=y -CONFIG_MACH_SUN6I=y -CONFIG_TARGET_COLOMBUS=y +CONFIG_SPL=y CONFIG_FDTFILE="sun6i-a31-colombus.dtb" ++S:CONFIG_ARM=y ++S:CONFIG_ARCH_SUNXI=y ++S:CONFIG_MACH_SUN6I=y ++S:CONFIG_TARGET_COLOMBUS=y -- cgit v1.2.3 From 505eceec874bdf03e00f0a0ddfccac912aa69821 Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Mon, 27 Oct 2014 23:29:49 +0100 Subject: sun6i: Add Mele M9 board Signed-off-by: Hans de Goede Acked-by: Ian Campbell --- board/sunxi/Kconfig | 4 ++++ board/sunxi/MAINTAINERS | 1 + configs/Mele_M9_defconfig | 15 +++++++++++++++ 3 files changed, 20 insertions(+) create mode 100644 configs/Mele_M9_defconfig (limited to 'board') diff --git a/board/sunxi/Kconfig b/board/sunxi/Kconfig index 668838631cc..5c3b9320001 100644 --- a/board/sunxi/Kconfig +++ b/board/sunxi/Kconfig @@ -112,6 +112,10 @@ config TARGET_MELE_M3 bool "MELE_M3" depends on MACH_SUN7I +config TARGET_MELE_M9 + bool "MELE_M9" + depends on MACH_SUN6I + config TARGET_MINI_X_1GB bool "MINI_X_1GB" depends on MACH_SUN4I diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS index b3c77a83cb7..ca0300272e9 100644 --- a/board/sunxi/MAINTAINERS +++ b/board/sunxi/MAINTAINERS @@ -9,6 +9,7 @@ F: configs/Cubieboard_defconfig F: configs/Mele_A1000_defconfig F: configs/Mele_A1000G_defconfig F: configs/Mele_M3_defconfig +F: configs/Mele_M9_defconfig F: configs/Mini-X_defconfig F: configs/Mini-X-1Gb_defconfig F: include/configs/sun5i.h diff --git a/configs/Mele_M9_defconfig b/configs/Mele_M9_defconfig new file mode 100644 index 00000000000..3dacb198baf --- /dev/null +++ b/configs/Mele_M9_defconfig @@ -0,0 +1,15 @@ +CONFIG_SPL=y +CONFIG_FDTFILE="sun6i-a31-m9.dtb" ++S:CONFIG_ARM=y ++S:CONFIG_ARCH_SUNXI=y ++S:CONFIG_MACH_SUN6I=y ++S:CONFIG_TARGET_MELE_M9=y +# Ethernet phy power ++S:CONFIG_AXP221_DLDO1_VOLT=3300 +# USB hub power ++S:CONFIG_AXP221_DLDO4_VOLT=3300 +# Wifi power ++S:CONFIG_AXP221_ALDO1_VOLT=3300 +# HDMI power ? ++S:CONFIG_AXP221_ALDO2_VOLT=1800 ++S:CONFIG_AXP221_ALDO3_VOLT=3000 -- cgit v1.2.3 From 115200ceb0faad679bcc7d7dba4b63ff065606c5 Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Fri, 7 Nov 2014 16:09:00 +0100 Subject: sunxi: ehci: Add proper Kconfig options to select the usb Vbus gpio-s Add proper Kconfig options to select the usb Vbus gpio-s, besides moving to Kconfig being the right thing to do, an added advantage of this is that it allows for boards without Vbus gpio-s. Signed-off-by: Hans de Goede Acked-by: Ian Campbell --- board/sunxi/Kconfig | 14 ++++++++++++++ configs/A10s-OLinuXino-M_defconfig | 3 ++- configs/A13-OLinuXinoM_defconfig | 3 ++- configs/A13-OLinuXino_defconfig | 3 ++- configs/Auxtek-T004_defconfig | 3 ++- configs/ba10_tv_box_defconfig | 3 ++- configs/r7-tv-dongle_defconfig | 3 ++- drivers/usb/host/ehci-sunxi.c | 35 +++++++++++++++++++++++++---------- include/configs/sun4i.h | 7 ------- include/configs/sun7i.h | 7 ------- 10 files changed, 51 insertions(+), 30 deletions(-) (limited to 'board') diff --git a/board/sunxi/Kconfig b/board/sunxi/Kconfig index 5c3b9320001..b2beea07e08 100644 --- a/board/sunxi/Kconfig +++ b/board/sunxi/Kconfig @@ -197,4 +197,18 @@ config MMC_SUNXI_SLOT_EXTRA slot or emmc on mmc1 - mmc3. Setting this to 1, 2 or 3 will enable support for this. +config USB1_VBUS_PIN + string "Vbus enable pin for usb1 (ehci0)" + default "PH6" if MACH_SUN4I || MACH_SUN7I + ---help--- + Set the Vbus enable pin for usb1 (ehci0, usb0 is the otg). This takes + a string in the format understood by sunxi_name_to_gpio, e.g. + PH1 for pin 1 of port H. + +config USB2_VBUS_PIN + string "Vbus enable pin for usb2 (ehci1)" + default "PH3" if MACH_SUN4I || MACH_SUN7I + ---help--- + See USB1_VBUS_PIN help text. + endif diff --git a/configs/A10s-OLinuXino-M_defconfig b/configs/A10s-OLinuXino-M_defconfig index 64756755bf9..94fafa6b97c 100644 --- a/configs/A10s-OLinuXino-M_defconfig +++ b/configs/A10s-OLinuXino-M_defconfig @@ -1,7 +1,8 @@ CONFIG_SPL=y -CONFIG_SYS_EXTRA_OPTIONS="AXP152_POWER,SUNXI_EMAC,USB_EHCI,SUNXI_USB_VBUS0_GPIO=SUNXI_GPB(10)" +CONFIG_SYS_EXTRA_OPTIONS="AXP152_POWER,SUNXI_EMAC,USB_EHCI" CONFIG_FDTFILE="sun5i-a10s-olinuxino-micro.dtb" CONFIG_MMC_SUNXI_SLOT_EXTRA=1 +CONFIG_USB1_VBUS_PIN="PB10" +S:CONFIG_MMC0_CD_PIN="PG1" +S:CONFIG_MMC1_CD_PIN="PG13" +S:CONFIG_ARM=y diff --git a/configs/A13-OLinuXinoM_defconfig b/configs/A13-OLinuXinoM_defconfig index d8b12391d86..85172036133 100644 --- a/configs/A13-OLinuXinoM_defconfig +++ b/configs/A13-OLinuXinoM_defconfig @@ -1,6 +1,7 @@ CONFIG_SPL=y -CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=2,USB_EHCI,SUNXI_USB_VBUS0_GPIO=SUNXI_GPG(11)" +CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=2,USB_EHCI" CONFIG_FDTFILE="sun5i-a13-olinuxino-micro.dtb" +CONFIG_USB1_VBUS_PIN="PG11" +S:CONFIG_ARM=y +S:CONFIG_ARCH_SUNXI=y +S:CONFIG_MACH_SUN5I=y diff --git a/configs/A13-OLinuXino_defconfig b/configs/A13-OLinuXino_defconfig index 91039dfc969..61f54666c24 100644 --- a/configs/A13-OLinuXino_defconfig +++ b/configs/A13-OLinuXino_defconfig @@ -1,6 +1,7 @@ CONFIG_SPL=y -CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=2,AXP209_POWER,USB_EHCI,SUNXI_USB_VBUS0_GPIO=SUNXI_GPG(11)" +CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=2,AXP209_POWER,USB_EHCI" CONFIG_FDTFILE="sun5i-a13-olinuxino.dtb" +CONFIG_USB1_VBUS_PIN="PG11" +S:CONFIG_ARM=y +S:CONFIG_ARCH_SUNXI=y +S:CONFIG_MACH_SUN5I=y diff --git a/configs/Auxtek-T004_defconfig b/configs/Auxtek-T004_defconfig index 5b06ea0aead..7fe9059179e 100644 --- a/configs/Auxtek-T004_defconfig +++ b/configs/Auxtek-T004_defconfig @@ -1,6 +1,7 @@ CONFIG_SPL=y -CONFIG_SYS_EXTRA_OPTIONS="AXP152_POWER,USB_EHCI,SUNXI_USB_VBUS0_GPIO=SUNXI_GPG(13)" +CONFIG_SYS_EXTRA_OPTIONS="AXP152_POWER,USB_EHCI" CONFIG_FDTFILE="sun5i-a10s-auxtek-t004.dtb" +CONFIG_USB1_VBUS_PIN="PG13" +S:CONFIG_ARM=y +S:CONFIG_ARCH_SUNXI=y +S:CONFIG_MACH_SUN5I=y diff --git a/configs/ba10_tv_box_defconfig b/configs/ba10_tv_box_defconfig index 0a1abea0a8d..6ca7c57186a 100644 --- a/configs/ba10_tv_box_defconfig +++ b/configs/ba10_tv_box_defconfig @@ -1,6 +1,7 @@ CONFIG_SPL=y -CONFIG_SYS_EXTRA_OPTIONS="AXP209_POWER,SUNXI_EMAC,USB_EHCI,SUNXI_USB_VBUS1_GPIO=SUNXI_GPH(12)" +CONFIG_SYS_EXTRA_OPTIONS="AXP209_POWER,SUNXI_EMAC,USB_EHCI" CONFIG_FDTFILE="sun4i-a10-ba10-tvbox.dtb" +CONFIG_USB1_VBUS_PIN="PH12" +S:CONFIG_ARM=y +S:CONFIG_ARCH_SUNXI=y +S:CONFIG_MACH_SUN4I=y diff --git a/configs/r7-tv-dongle_defconfig b/configs/r7-tv-dongle_defconfig index 7dbff40b508..b9fd59c16a7 100644 --- a/configs/r7-tv-dongle_defconfig +++ b/configs/r7-tv-dongle_defconfig @@ -1,6 +1,7 @@ CONFIG_SPL=y -CONFIG_SYS_EXTRA_OPTIONS="AXP152_POWER,USB_EHCI,SUNXI_USB_VBUS0_GPIO=SUNXI_GPG(13)" +CONFIG_SYS_EXTRA_OPTIONS="AXP152_POWER,USB_EHCI" CONFIG_FDTFILE="sun5i-a10s-r7-tv-dongle.dtb" +CONFIG_USB1_VBUS_PIN="PG13" +S:CONFIG_ARM=y +S:CONFIG_ARCH_SUNXI=y +S:CONFIG_MACH_SUN5I=y diff --git a/drivers/usb/host/ehci-sunxi.c b/drivers/usb/host/ehci-sunxi.c index 4befd574541..193ac433c1d 100644 --- a/drivers/usb/host/ehci-sunxi.c +++ b/drivers/usb/host/ehci-sunxi.c @@ -39,7 +39,6 @@ static struct sunxi_ehci_hcd { { .usb_rst_mask = CCM_USB_CTRL_PHY1_RST, .ahb_clk_mask = 1 << AHB_GATE_OFFSET_USB_EHCI0, - .gpio_vbus = CONFIG_SUNXI_USB_VBUS0_GPIO, .csr = (void *)SUNXI_USB_CSR, .irq = 39, .id = 1, @@ -48,7 +47,6 @@ static struct sunxi_ehci_hcd { { .usb_rst_mask = CCM_USB_CTRL_PHY2_RST, .ahb_clk_mask = 1 << AHB_GATE_OFFSET_USB_EHCI1, - .gpio_vbus = CONFIG_SUNXI_USB_VBUS1_GPIO, .csr = (void *)SUNXI_USB_CSR, .irq = 40, .id = 2, @@ -68,6 +66,15 @@ static void *get_io_base(int hcd_id) return NULL; } +static int get_vbus_gpio(int hcd_id) +{ + switch (hcd_id) { + case 1: return sunxi_name_to_gpio(CONFIG_USB1_VBUS_PIN); + case 2: return sunxi_name_to_gpio(CONFIG_USB2_VBUS_PIN); + } + return -1; +} + static void usb_phy_write(struct sunxi_ehci_hcd *sunxi_ehci, int addr, int data, int len) { @@ -143,14 +150,16 @@ static void sunxi_ehci_enable(struct sunxi_ehci_hcd *sunxi_ehci) sunxi_usb_passby(sunxi_ehci, SUNXI_USB_PASSBY_EN); - gpio_direction_output(sunxi_ehci->gpio_vbus, 1); + if (sunxi_ehci->gpio_vbus != -1) + gpio_direction_output(sunxi_ehci->gpio_vbus, 1); } static void sunxi_ehci_disable(struct sunxi_ehci_hcd *sunxi_ehci) { struct sunxi_ccm_reg *ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE; - gpio_direction_output(sunxi_ehci->gpio_vbus, 0); + if (sunxi_ehci->gpio_vbus != -1) + gpio_direction_output(sunxi_ehci->gpio_vbus, 0); sunxi_usb_passby(sunxi_ehci, !SUNXI_USB_PASSBY_EN); @@ -165,13 +174,17 @@ int ehci_hcd_init(int index, enum usb_init_type init, struct ehci_hccr **hccr, struct sunxi_ehci_hcd *sunxi_ehci = &sunxi_echi_hcd[index]; int err; + sunxi_ehci->gpio_vbus = get_vbus_gpio(sunxi_ehci->id); + /* enable common PHY only once */ if (index == 0) setbits_le32(&ccm->usb_clk_cfg, CCM_USB_CTRL_PHYGATE); - err = gpio_request(sunxi_ehci->gpio_vbus, "ehci_vbus"); - if (err) - return err; + if (sunxi_ehci->gpio_vbus != -1) { + err = gpio_request(sunxi_ehci->gpio_vbus, "ehci_vbus"); + if (err) + return err; + } sunxi_ehci_enable(sunxi_ehci); @@ -197,9 +210,11 @@ int ehci_hcd_stop(int index) sunxi_ehci_disable(sunxi_ehci); - err = gpio_free(sunxi_ehci->gpio_vbus); - if (err) - return err; + if (sunxi_ehci->gpio_vbus != -1) { + err = gpio_free(sunxi_ehci->gpio_vbus); + if (err) + return err; + } /* disable common PHY only once, for the last enabled hcd */ if (enabled_hcd_count == 1) diff --git a/include/configs/sun4i.h b/include/configs/sun4i.h index e0ec52dcde7..7b857405e9e 100644 --- a/include/configs/sun4i.h +++ b/include/configs/sun4i.h @@ -18,14 +18,7 @@ #ifdef CONFIG_USB_EHCI #define CONFIG_USB_EHCI_SUNXI - #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 -#ifndef CONFIG_SUNXI_USB_VBUS0_GPIO -#define CONFIG_SUNXI_USB_VBUS0_GPIO SUNXI_GPH(6) -#endif -#ifndef CONFIG_SUNXI_USB_VBUS1_GPIO -#define CONFIG_SUNXI_USB_VBUS1_GPIO SUNXI_GPH(3) -#endif #endif /* diff --git a/include/configs/sun7i.h b/include/configs/sun7i.h index 0193826a9dd..ea407903229 100644 --- a/include/configs/sun7i.h +++ b/include/configs/sun7i.h @@ -19,14 +19,7 @@ #ifdef CONFIG_USB_EHCI #define CONFIG_USB_EHCI_SUNXI - #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 -#ifndef CONFIG_SUNXI_USB_VBUS0_GPIO -#define CONFIG_SUNXI_USB_VBUS0_GPIO SUNXI_GPH(6) -#endif -#ifndef CONFIG_SUNXI_USB_VBUS1_GPIO -#define CONFIG_SUNXI_USB_VBUS1_GPIO SUNXI_GPH(3) -#endif #endif #define CONFIG_ARMV7_VIRT 1 -- cgit v1.2.3 From 76946dfe69359496aa0fd144d102068334974916 Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Fri, 7 Nov 2014 14:51:12 +0100 Subject: sun6i: ehci: Add sun6i ehci support Add support for the 2 ehci controllers found on the sun6i (A31) soc. Signed-off-by: Hans de Goede Acked-by: Ian Campbell Acked-by: Marek Vasut --- arch/arm/include/asm/arch-sunxi/clock_sun4i.h | 3 ++ arch/arm/include/asm/arch-sunxi/clock_sun6i.h | 11 +++++++ arch/arm/include/asm/arch-sunxi/cpu.h | 8 +++++ board/sunxi/Kconfig | 2 ++ configs/Mele_M9_defconfig | 3 ++ drivers/usb/host/ehci-sunxi.c | 45 +++++++++++++++++---------- include/configs/sun6i.h | 5 +++ 7 files changed, 61 insertions(+), 16 deletions(-) (limited to 'board') diff --git a/arch/arm/include/asm/arch-sunxi/clock_sun4i.h b/arch/arm/include/asm/arch-sunxi/clock_sun4i.h index 90af8e25069..9dca800d785 100644 --- a/arch/arm/include/asm/arch-sunxi/clock_sun4i.h +++ b/arch/arm/include/asm/arch-sunxi/clock_sun4i.h @@ -262,5 +262,8 @@ struct sunxi_ccm_reg { #define CCM_USB_CTRL_PHY1_RST (0x1 << 1) #define CCM_USB_CTRL_PHY2_RST (0x1 << 2) #define CCM_USB_CTRL_PHYGATE (0x1 << 8) +/* These 2 are sun6i only, define them as 0 on sun4i */ +#define CCM_USB_CTRL_PHY1_CLK 0 +#define CCM_USB_CTRL_PHY2_CLK 0 #endif /* _SUNXI_CLOCK_SUN4I_H */ diff --git a/arch/arm/include/asm/arch-sunxi/clock_sun6i.h b/arch/arm/include/asm/arch-sunxi/clock_sun6i.h index 4992dbc5030..e16a7647ed9 100644 --- a/arch/arm/include/asm/arch-sunxi/clock_sun6i.h +++ b/arch/arm/include/asm/arch-sunxi/clock_sun6i.h @@ -193,6 +193,10 @@ struct sunxi_ccm_reg { #define AXI_GATE_OFFSET_DRAM 0 +#define AHB_GATE_OFFSET_USB_OHCI1 30 +#define AHB_GATE_OFFSET_USB_OHCI0 29 +#define AHB_GATE_OFFSET_USB_EHCI1 27 +#define AHB_GATE_OFFSET_USB_EHCI0 26 #define AHB_GATE_OFFSET_MCTL 14 #define AHB_GATE_OFFSET_MMC3 11 #define AHB_GATE_OFFSET_MMC2 10 @@ -205,6 +209,13 @@ struct sunxi_ccm_reg { #define CCM_MMC_CTRL_ENABLE (0x1 << 31) +#define CCM_USB_CTRL_PHY1_RST (0x1 << 1) +#define CCM_USB_CTRL_PHY2_RST (0x1 << 2) +/* There is no global phy clk gate on sun6i, define as 0 */ +#define CCM_USB_CTRL_PHYGATE 0 +#define CCM_USB_CTRL_PHY1_CLK (0x1 << 9) +#define CCM_USB_CTRL_PHY2_CLK (0x1 << 10) + #define MDFS_CLK_DEFAULT 0x81000002 /* PLL6 / 3 */ #define CCM_DRAMCLK_CFG_DIV0(x) ((x - 1) << 8) diff --git a/arch/arm/include/asm/arch-sunxi/cpu.h b/arch/arm/include/asm/arch-sunxi/cpu.h index 6550e501632..bdee89e87da 100644 --- a/arch/arm/include/asm/arch-sunxi/cpu.h +++ b/arch/arm/include/asm/arch-sunxi/cpu.h @@ -37,16 +37,24 @@ #define SUNXI_MMC1_BASE 0x01c10000 #define SUNXI_MMC2_BASE 0x01c11000 #define SUNXI_MMC3_BASE 0x01c12000 +#ifndef CONFIG_MACH_SUN6I #define SUNXI_USB0_BASE 0x01c13000 #define SUNXI_USB1_BASE 0x01c14000 +#endif #define SUNXI_SS_BASE 0x01c15000 #define SUNXI_HDMI_BASE 0x01c16000 #define SUNXI_SPI2_BASE 0x01c17000 #define SUNXI_SATA_BASE 0x01c18000 +#ifndef CONFIG_MACH_SUN6I #define SUNXI_PATA_BASE 0x01c19000 #define SUNXI_ACE_BASE 0x01c1a000 #define SUNXI_TVE1_BASE 0x01c1b000 #define SUNXI_USB2_BASE 0x01c1c000 +#else +#define SUNXI_USB0_BASE 0x01c19000 +#define SUNXI_USB1_BASE 0x01c1a000 +#define SUNXI_USB2_BASE 0x01c1b000 +#endif #define SUNXI_CSI1_BASE 0x01c1d000 #define SUNXI_TZASC_BASE 0x01c1e000 #define SUNXI_SPI3_BASE 0x01c1f000 diff --git a/board/sunxi/Kconfig b/board/sunxi/Kconfig index b2beea07e08..c3f865d2983 100644 --- a/board/sunxi/Kconfig +++ b/board/sunxi/Kconfig @@ -200,6 +200,7 @@ config MMC_SUNXI_SLOT_EXTRA config USB1_VBUS_PIN string "Vbus enable pin for usb1 (ehci0)" default "PH6" if MACH_SUN4I || MACH_SUN7I + default "PH27" if MACH_SUN6I ---help--- Set the Vbus enable pin for usb1 (ehci0, usb0 is the otg). This takes a string in the format understood by sunxi_name_to_gpio, e.g. @@ -208,6 +209,7 @@ config USB1_VBUS_PIN config USB2_VBUS_PIN string "Vbus enable pin for usb2 (ehci1)" default "PH3" if MACH_SUN4I || MACH_SUN7I + default "PH24" if MACH_SUN6I ---help--- See USB1_VBUS_PIN help text. diff --git a/configs/Mele_M9_defconfig b/configs/Mele_M9_defconfig index 3dacb198baf..f46439fa4e8 100644 --- a/configs/Mele_M9_defconfig +++ b/configs/Mele_M9_defconfig @@ -1,4 +1,5 @@ CONFIG_SPL=y +CONFIG_SYS_EXTRA_OPTIONS="USB_EHCI" CONFIG_FDTFILE="sun6i-a31-m9.dtb" +S:CONFIG_ARM=y +S:CONFIG_ARCH_SUNXI=y @@ -13,3 +14,5 @@ CONFIG_FDTFILE="sun6i-a31-m9.dtb" # HDMI power ? +S:CONFIG_AXP221_ALDO2_VOLT=1800 +S:CONFIG_AXP221_ALDO3_VOLT=3000 +# No Vbus gpio for usb1 ++S:CONFIG_USB1_VBUS_PIN="" diff --git a/drivers/usb/host/ehci-sunxi.c b/drivers/usb/host/ehci-sunxi.c index 193ac433c1d..cc9a8fa71ef 100644 --- a/drivers/usb/host/ehci-sunxi.c +++ b/drivers/usb/host/ehci-sunxi.c @@ -10,16 +10,14 @@ */ #include +#include #include #include #include #include "ehci.h" -#define SUNXI_USB1_IO_BASE 0x01c14000 -#define SUNXI_USB2_IO_BASE 0x01c1c000 - #define SUNXI_USB_PMU_IRQ_ENABLE 0x800 -#define SUNXI_USB_CSR 0x01c13404 +#define SUNXI_USB_CSR 0x404 #define SUNXI_USB_PASSBY_EN 1 #define SUNXI_EHCI_AHB_ICHR8_EN (1 << 10) @@ -32,23 +30,28 @@ static struct sunxi_ehci_hcd { int usb_rst_mask; int ahb_clk_mask; int gpio_vbus; - void *csr; int irq; int id; } sunxi_echi_hcd[] = { { - .usb_rst_mask = CCM_USB_CTRL_PHY1_RST, + .usb_rst_mask = CCM_USB_CTRL_PHY1_RST | CCM_USB_CTRL_PHY1_CLK, .ahb_clk_mask = 1 << AHB_GATE_OFFSET_USB_EHCI0, - .csr = (void *)SUNXI_USB_CSR, +#ifndef CONFIG_MACH_SUN6I .irq = 39, +#else + .irq = 72, +#endif .id = 1, }, #if (CONFIG_USB_MAX_CONTROLLER_COUNT > 1) { - .usb_rst_mask = CCM_USB_CTRL_PHY2_RST, + .usb_rst_mask = CCM_USB_CTRL_PHY2_RST | CCM_USB_CTRL_PHY2_CLK, .ahb_clk_mask = 1 << AHB_GATE_OFFSET_USB_EHCI1, - .csr = (void *)SUNXI_USB_CSR, +#ifndef CONFIG_MACH_SUN6I .irq = 40, +#else + .irq = 74, +#endif .id = 2, } #endif @@ -58,12 +61,16 @@ static int enabled_hcd_count; static void *get_io_base(int hcd_id) { - if (hcd_id == 1) - return (void *)SUNXI_USB1_IO_BASE; - else if (hcd_id == 2) - return (void *)SUNXI_USB2_IO_BASE; - else + switch (hcd_id) { + case 0: + return (void *)SUNXI_USB0_BASE; + case 1: + return (void *)SUNXI_USB1_BASE; + case 2: + return (void *)SUNXI_USB2_BASE; + default: return NULL; + } } static int get_vbus_gpio(int hcd_id) @@ -79,7 +86,7 @@ static void usb_phy_write(struct sunxi_ehci_hcd *sunxi_ehci, int addr, int data, int len) { int j = 0, usbc_bit = 0; - void *dest = sunxi_ehci->csr; + void *dest = get_io_base(0) + SUNXI_USB_CSR; usbc_bit = 1 << (sunxi_ehci->id * 2); for (j = 0; j < len; j++) { @@ -112,7 +119,7 @@ static void sunxi_usb_phy_init(struct sunxi_ehci_hcd *sunxi_ehci) usb_phy_write(sunxi_ehci, 0x20, 0x14, 5); /* threshold adjustment disconnect */ -#ifdef CONFIG_MACH_SUN4I +#if defined CONFIG_MACH_SUN4I || defined CONFIG_MACH_SUN6I usb_phy_write(sunxi_ehci, 0x2a, 3, 2); #else usb_phy_write(sunxi_ehci, 0x2a, 2, 2); @@ -145,6 +152,9 @@ static void sunxi_ehci_enable(struct sunxi_ehci_hcd *sunxi_ehci) setbits_le32(&ccm->usb_clk_cfg, sunxi_ehci->usb_rst_mask); setbits_le32(&ccm->ahb_gate0, sunxi_ehci->ahb_clk_mask); +#ifdef CONFIG_MACH_SUN6I + setbits_le32(&ccm->ahb_reset0_cfg, sunxi_ehci->ahb_clk_mask); +#endif sunxi_usb_phy_init(sunxi_ehci); @@ -163,6 +173,9 @@ static void sunxi_ehci_disable(struct sunxi_ehci_hcd *sunxi_ehci) sunxi_usb_passby(sunxi_ehci, !SUNXI_USB_PASSBY_EN); +#ifdef CONFIG_MACH_SUN6I + clrbits_le32(&ccm->ahb_reset0_cfg, sunxi_ehci->ahb_clk_mask); +#endif clrbits_le32(&ccm->ahb_gate0, sunxi_ehci->ahb_clk_mask); clrbits_le32(&ccm->usb_clk_cfg, sunxi_ehci->usb_rst_mask); } diff --git a/include/configs/sun6i.h b/include/configs/sun6i.h index 95587715153..1b738527990 100644 --- a/include/configs/sun6i.h +++ b/include/configs/sun6i.h @@ -18,6 +18,11 @@ #define CONFIG_SYS_PROMPT "sun6i# " +#ifdef CONFIG_USB_EHCI +#define CONFIG_USB_EHCI_SUNXI +#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 +#endif + /* * Include common sunxi configuration where most the settings are */ -- cgit v1.2.3 From 64a97599b79e277600bc6f1b22cf48aa04ee9bd0 Mon Sep 17 00:00:00 2001 From: Zoltan HERPAI Date: Tue, 11 Nov 2014 13:21:26 +0100 Subject: sunxi: gmac: Update bananapi fixup to the new CONFIG_TARGET_ structure The magic bit toucher needs to be updated to reflect the new board Kconfig structure Signed-off-by: Zoltan HERPAI Acked-by: Hans de Goede Signed-off-by: Hans de Goede --- board/sunxi/gmac.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'board') diff --git a/board/sunxi/gmac.c b/board/sunxi/gmac.c index 6348d272827..051aca01a83 100644 --- a/board/sunxi/gmac.c +++ b/board/sunxi/gmac.c @@ -29,7 +29,7 @@ int sunxi_gmac_initialize(bd_t *bis) * need to set bits 10-12 GTXDC "GMAC Transmit Clock Delay Chain" * of the GMAC clk register to 3. */ -#ifdef CONFIG_BANANAPI +#ifdef CONFIG_TARGET_BANANAPI setbits_le32(&ccm->gmac_clk_cfg, 0x3 << 10); #endif -- cgit v1.2.3