From 1180baec98147e05a8b3b36199ae22010a4d4fe7 Mon Sep 17 00:00:00 2001 From: Oleh Kravchenko Date: Sat, 15 May 2021 00:18:33 +0300 Subject: Add EV-iMX280-NANO-X-MB board A simple prototyping board with one microSD port, one Ethernet port, 2 USB ports, I2C, SPI, GPIO, and UART interfaces. Signed-off-by: Oleh Kravchenko Cc: Stefano Babic --- board/out4/o4-imx6ull-nano/Kconfig | 7 +++++++ board/out4/o4-imx6ull-nano/o4-imx6ull-nano.c | 22 ++++++++++++---------- 2 files changed, 19 insertions(+), 10 deletions(-) (limited to 'board') diff --git a/board/out4/o4-imx6ull-nano/Kconfig b/board/out4/o4-imx6ull-nano/Kconfig index c2497d521f8..e2ab80b6d4d 100644 --- a/board/out4/o4-imx6ull-nano/Kconfig +++ b/board/out4/o4-imx6ull-nano/Kconfig @@ -45,6 +45,12 @@ config O4_IMX_NANO A baseboard for EV-iMX280-NANO module: https://out4.ru/products/board/18-o4-imx-nano.html +config EV_IMX280_NANO_X_MB + bool "EV-IMX280-NANO-X-MB" + help + A simple baseboard for EV-iMX280-NANO module: + http://evodbg.net/products/mx28-eval-kits/14-ev-imx280-nano-x-mb.html + endchoice config IMX_CONFIG @@ -53,5 +59,6 @@ config IMX_CONFIG config DEFAULT_DEVICE_TREE default "o4-imx-nano" if O4_IMX_NANO + default "ev-imx280-nano-x-mb" if EV_IMX280_NANO_X_MB endif diff --git a/board/out4/o4-imx6ull-nano/o4-imx6ull-nano.c b/board/out4/o4-imx6ull-nano/o4-imx6ull-nano.c index fec1755c32e..edb200e9e55 100644 --- a/board/out4/o4-imx6ull-nano/o4-imx6ull-nano.c +++ b/board/out4/o4-imx6ull-nano/o4-imx6ull-nano.c @@ -39,16 +39,18 @@ static int setup_fec_clock(void) if (ret) return ret; - /* - * Use 50M anatop loopback REF_CLK2 for ENET2, - * clear gpr1[14], set gpr1[18]. - */ - clrsetbits_le32(&iomuxc_regs->gpr[1], IOMUX_GPR1_FEC2_MASK, - IOMUX_GPR1_FEC2_CLOCK_MUX1_SEL_MASK); - - ret = enable_fec_anatop_clock(1, ENET_50MHZ); - if (ret) - return ret; + if (!IS_ENABLED(CONFIG_EV_IMX280_NANO_X_MB)) { + /* + * Use 50M anatop loopback REF_CLK2 for ENET2, + * clear gpr1[14], set gpr1[18]. + */ + clrsetbits_le32(&iomuxc_regs->gpr[1], IOMUX_GPR1_FEC2_MASK, + IOMUX_GPR1_FEC2_CLOCK_MUX1_SEL_MASK); + + ret = enable_fec_anatop_clock(1, ENET_50MHZ); + if (ret) + return ret; + } enable_enet_clk(1); } -- cgit v1.2.3