From 75c57a3570ec0904c14394db08ef436a8b49dda4 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Fri, 18 Nov 2011 12:48:08 +0000 Subject: OMAP3: Add SPL support to Beagleboard This introduces 200MHz Micron parts timing information based on x-loader to and Numonyx MCFG calculation. The memory init logic is also based on what x-loader does in these cases. Note that while previously u-boot would be flashed in with SW ECC in this case it now must be flashed with HW ECC. We also change CONFIG_SYS_TEXT_BASE to 0x80100000. Cc: Dirk Behme Beagleboard rev C5, xM rev A: Tested-by: Tom Rini Beagleboard xM rev C: Tested-by: Matt Ranostay Beagleboard rev B7, C2, xM rev B: Tested-by: Matt Porter Signed-off-by: Tom Rini --- board/ti/beagle/beagle.c | 71 +++++++++++++++++++++++++++++++++++++++++++++-- board/ti/beagle/config.mk | 33 ---------------------- 2 files changed, 69 insertions(+), 35 deletions(-) delete mode 100644 board/ti/beagle/config.mk (limited to 'board') diff --git a/board/ti/beagle/beagle.c b/board/ti/beagle/beagle.c index 9482c5eac74..6a457cbb5df 100644 --- a/board/ti/beagle/beagle.c +++ b/board/ti/beagle/beagle.c @@ -1,5 +1,5 @@ /* - * (C) Copyright 2004-2008 + * (C) Copyright 2004-2011 * Texas Instruments, * * Author : @@ -34,9 +34,11 @@ #include #endif #include +#include #include #include #include +#include #include #include #include @@ -135,6 +137,69 @@ int get_board_revision(void) return revision; } +#ifdef CONFIG_SPL_BUILD +/* + * Routine: get_board_mem_timings + * Description: If we use SPL then there is no x-loader nor config header + * so we have to setup the DDR timings ourself on both banks. + */ +void get_board_mem_timings(u32 *mcfg, u32 *ctrla, u32 *ctrlb, u32 *rfr_ctrl, + u32 *mr) +{ + int pop_mfr, pop_id; + + /* + * We need to identify what PoP memory is on the board so that + * we know what timings to use. If we can't identify it then + * we know it's an xM. To map the ID values please see nand_ids.c + */ + identify_nand_chip(&pop_mfr, &pop_id); + + *mr = MICRON_V_MR_165; + switch (get_board_revision()) { + case REVISION_C4: + if (pop_mfr == NAND_MFR_STMICRO && pop_id == 0xba) { + /* 512MB DDR */ + *mcfg = NUMONYX_V_MCFG_165(512 << 20); + *ctrla = NUMONYX_V_ACTIMA_165; + *ctrlb = NUMONYX_V_ACTIMB_165; + *rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz; + break; + } else if (pop_mfr == NAND_MFR_MICRON && pop_id == 0xbc) { + /* Beagleboard Rev C5, 256MB DDR */ + *mcfg = MICRON_V_MCFG_200(256 << 20); + *ctrla = MICRON_V_ACTIMA_200; + *ctrlb = MICRON_V_ACTIMB_200; + *rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz; + break; + } + case REVISION_XM_A: + case REVISION_XM_B: + case REVISION_XM_C: + if (pop_mfr == 0) { + /* 256MB DDR */ + *mcfg = MICRON_V_MCFG_200(256 << 20); + *ctrla = MICRON_V_ACTIMA_200; + *ctrlb = MICRON_V_ACTIMB_200; + *rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz; + } else { + /* 512MB DDR */ + *mcfg = NUMONYX_V_MCFG_165(512 << 20); + *ctrla = NUMONYX_V_ACTIMA_165; + *ctrlb = NUMONYX_V_ACTIMB_165; + *rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz; + } + break; + default: + /* Assume 128MB and Micron/165MHz timings to be safe */ + *mcfg = MICRON_V_MCFG_165(128 << 20); + *ctrla = MICRON_V_ACTIMA_165; + *ctrlb = MICRON_V_ACTIMB_165; + *rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz; + } +} +#endif + /* * Routine: get_expansion_id * Description: This function checks for expansion board by checking I2C @@ -367,7 +432,7 @@ void set_muxconf_regs(void) MUX_BEAGLE(); } -#ifdef CONFIG_GENERIC_MMC +#if defined(CONFIG_GENERIC_MMC) && !defined(CONFIG_SPL_BUILD) int board_mmc_init(bd_t *bis) { omap_mmc_init(0); @@ -476,6 +541,7 @@ int ehci_hcd_init(void) #endif /* CONFIG_USB_EHCI */ +#ifndef CONFIG_SPL_BUILD /* * This command returns the status of the user button on beagle xM * Input - none @@ -528,3 +594,4 @@ U_BOOT_CMD( "Return the status of the BeagleBoard USER button", "" ); +#endif diff --git a/board/ti/beagle/config.mk b/board/ti/beagle/config.mk deleted file mode 100644 index cf055db623b..00000000000 --- a/board/ti/beagle/config.mk +++ /dev/null @@ -1,33 +0,0 @@ -# -# (C) Copyright 2006 -# Texas Instruments, -# -# Beagle Board uses OMAP3 (ARM-CortexA8) cpu -# see http://www.ti.com/ for more information on Texas Instruments -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# -# Physical Address: -# 8000'0000 (bank0) -# A000/0000 (bank1) -# Linux-Kernel is expected to be at 8000'8000, entry 8000'8000 -# (mem base + reserved) - -# For use with external or internal boots. -CONFIG_SYS_TEXT_BASE = 0x80008000 -- cgit v1.2.3