From 6419f8e9fdc63ee411e1f012d412f8ae17283432 Mon Sep 17 00:00:00 2001 From: Shengyu Qu Date: Wed, 9 Aug 2023 21:11:32 +0800 Subject: riscv: Add SPL_ZERO_MEM_BEFORE_USE implementation Add the actual support code for SPL_ZERO_MEM_BEFORE_USE and remove existing Starfive JH7110's L2 LIM clean code, since existing code has following issues: 1. Each hart (in the middle of a function call) overwriting its own stack and other harts' stacks. (data-race and data-corruption) 2. Lottery winner hart can be doing "board_init_f_init_reserve", while other harts are in the middle of zeroing L2 LIM. (data-race) Signed-off-by: Bo Gan Signed-off-by: Shengyu Qu Reviewed-by: Leo Yu-Chi Liang --- common/init/board_init.c | 3 +++ 1 file changed, 3 insertions(+) (limited to 'common/init') diff --git a/common/init/board_init.c b/common/init/board_init.c index 96ffb79a986..ab8c508ad83 100644 --- a/common/init/board_init.c +++ b/common/init/board_init.c @@ -162,6 +162,9 @@ void board_init_f_init_reserve(ulong base) #if CONFIG_VAL(SYS_MALLOC_F_LEN) /* go down one 'early malloc arena' */ gd->malloc_base = base; +#if CONFIG_IS_ENABLED(ZERO_MEM_BEFORE_USE) + memset((void *)base, '\0', CONFIG_VAL(SYS_MALLOC_F_LEN)); +#endif #endif if (CONFIG_IS_ENABLED(SYS_REPORT_STACK_F_USAGE)) -- cgit v1.2.3