From 6d0f6bcf337c5261c08fabe12982178c2c489d76 Mon Sep 17 00:00:00 2001 From: Jean-Christophe PLAGNIOL-VILLARD Date: Thu, 16 Oct 2008 15:01:15 +0200 Subject: rename CFG_ macros to CONFIG_SYS Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD --- common/spartan3.c | 44 ++++++++++++++++++++++---------------------- 1 file changed, 22 insertions(+), 22 deletions(-) (limited to 'common/spartan3.c') diff --git a/common/spartan3.c b/common/spartan3.c index 8f1ab80b74b..9ce41f1d276 100644 --- a/common/spartan3.c +++ b/common/spartan3.c @@ -37,8 +37,8 @@ #define PRINTF(fmt,args...) #endif -#undef CFG_FPGA_CHECK_BUSY -#undef CFG_FPGA_PROG_FEEDBACK +#undef CONFIG_SYS_FPGA_CHECK_BUSY +#undef CONFIG_SYS_FPGA_PROG_FEEDBACK /* Note: The assumption is that we cannot possibly run fast enough to * overrun the device (the Slave Parallel mode can free run at 50MHz). @@ -49,8 +49,8 @@ #define CONFIG_FPGA_DELAY() #endif -#ifndef CFG_FPGA_WAIT -#define CFG_FPGA_WAIT CFG_HZ/100 /* 10 ms */ +#ifndef CONFIG_SYS_FPGA_WAIT +#define CONFIG_SYS_FPGA_WAIT CONFIG_SYS_HZ/100 /* 10 ms */ #endif static int Spartan3_sp_load( Xilinx_desc *desc, void *buf, size_t bsize ); @@ -185,7 +185,7 @@ static int Spartan3_sp_load (Xilinx_desc * desc, void *buf, size_t bsize) * Continuous Data Loading in Slave Parallel Mode for * the Spartan-II Family. */ -#ifdef CFG_FPGA_PROG_FEEDBACK +#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK printf ("Loading FPGA Device %d...\n", cookie); #endif /* @@ -206,7 +206,7 @@ static int Spartan3_sp_load (Xilinx_desc * desc, void *buf, size_t bsize) /* Now wait for INIT and BUSY to go high */ do { CONFIG_FPGA_DELAY (); - if (get_timer (ts) > CFG_FPGA_WAIT) { /* check the time */ + if (get_timer (ts) > CONFIG_SYS_FPGA_WAIT) { /* check the time */ puts ("** Timeout waiting for INIT to clear.\n"); (*fn->abort) (cookie); /* abort the burn */ return FPGA_FAIL; @@ -228,7 +228,7 @@ static int Spartan3_sp_load (Xilinx_desc * desc, void *buf, size_t bsize) CONFIG_FPGA_DELAY (); (*fn->clk) (TRUE, TRUE, cookie); /* Assert the clock pin */ -#ifdef CFG_FPGA_CHECK_BUSY +#ifdef CONFIG_SYS_FPGA_CHECK_BUSY ts = get_timer (0); /* get current time */ while ((*fn->busy) (cookie)) { /* XXX - we should have a check in here somewhere to @@ -239,7 +239,7 @@ static int Spartan3_sp_load (Xilinx_desc * desc, void *buf, size_t bsize) CONFIG_FPGA_DELAY (); (*fn->clk) (TRUE, TRUE, cookie); /* Assert the clock pin */ - if (get_timer (ts) > CFG_FPGA_WAIT) { /* check the time */ + if (get_timer (ts) > CONFIG_SYS_FPGA_WAIT) { /* check the time */ puts ("** Timeout waiting for BUSY to clear.\n"); (*fn->abort) (cookie); /* abort the burn */ return FPGA_FAIL; @@ -247,7 +247,7 @@ static int Spartan3_sp_load (Xilinx_desc * desc, void *buf, size_t bsize) } #endif -#ifdef CFG_FPGA_PROG_FEEDBACK +#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK if (bytecount % (bsize / 40) == 0) putc ('.'); /* let them know we are alive */ #endif @@ -257,7 +257,7 @@ static int Spartan3_sp_load (Xilinx_desc * desc, void *buf, size_t bsize) (*fn->cs) (FALSE, TRUE, cookie); /* Deassert the chip select */ (*fn->wr) (FALSE, TRUE, cookie); /* Deassert the write pin */ -#ifdef CFG_FPGA_PROG_FEEDBACK +#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK putc ('\n'); /* terminate the dotted line */ #endif @@ -273,7 +273,7 @@ static int Spartan3_sp_load (Xilinx_desc * desc, void *buf, size_t bsize) CONFIG_FPGA_DELAY (); (*fn->clk) (TRUE, TRUE, cookie); /* Assert the clock pin */ - if (get_timer (ts) > CFG_FPGA_WAIT) { /* check the time */ + if (get_timer (ts) > CONFIG_SYS_FPGA_WAIT) { /* check the time */ puts ("** Timeout waiting for DONE to clear.\n"); (*fn->abort) (cookie); /* abort the burn */ ret_val = FPGA_FAIL; @@ -282,7 +282,7 @@ static int Spartan3_sp_load (Xilinx_desc * desc, void *buf, size_t bsize) } if (ret_val == FPGA_SUCCESS) { -#ifdef CFG_FPGA_PROG_FEEDBACK +#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK puts ("Done.\n"); #endif } @@ -294,7 +294,7 @@ static int Spartan3_sp_load (Xilinx_desc * desc, void *buf, size_t bsize) } else { -#ifdef CFG_FPGA_PROG_FEEDBACK +#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK puts ("Fail.\n"); #endif } @@ -328,7 +328,7 @@ static int Spartan3_sp_dump (Xilinx_desc * desc, void *buf, size_t bsize) (*fn->clk) (FALSE, TRUE, cookie); /* Deassert the clock pin */ (*fn->clk) (TRUE, TRUE, cookie); /* Assert the clock pin */ (*fn->rdata) (&(data[bytecount++]), cookie); /* read the data */ -#ifdef CFG_FPGA_PROG_FEEDBACK +#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK if (bytecount % (bsize / 40) == 0) putc ('.'); /* let them know we are alive */ #endif @@ -338,7 +338,7 @@ static int Spartan3_sp_dump (Xilinx_desc * desc, void *buf, size_t bsize) (*fn->clk) (FALSE, TRUE, cookie); /* Deassert the clock pin */ (*fn->clk) (TRUE, TRUE, cookie); /* Assert the clock pin */ -#ifdef CFG_FPGA_PROG_FEEDBACK +#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK putc ('\n'); /* terminate the dotted line */ #endif puts ("Done.\n"); @@ -465,7 +465,7 @@ static int Spartan3_ss_load (Xilinx_desc * desc, void *buf, size_t bsize) "done:\t0x%p\n\n", __FUNCTION__, &fn, fn, fn->pgm, fn->init, fn->clk, fn->wr, fn->done); -#ifdef CFG_FPGA_PROG_FEEDBACK +#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK printf ("Loading FPGA Device %d...\n", cookie); #endif @@ -483,7 +483,7 @@ static int Spartan3_ss_load (Xilinx_desc * desc, void *buf, size_t bsize) ts = get_timer (0); /* get current time */ do { CONFIG_FPGA_DELAY (); - if (get_timer (ts) > CFG_FPGA_WAIT) { /* check the time */ + if (get_timer (ts) > CONFIG_SYS_FPGA_WAIT) { /* check the time */ puts ("** Timeout waiting for INIT to start.\n"); return FPGA_FAIL; } @@ -497,7 +497,7 @@ static int Spartan3_ss_load (Xilinx_desc * desc, void *buf, size_t bsize) /* Now wait for INIT to go high */ do { CONFIG_FPGA_DELAY (); - if (get_timer (ts) > CFG_FPGA_WAIT) { /* check the time */ + if (get_timer (ts) > CONFIG_SYS_FPGA_WAIT) { /* check the time */ puts ("** Timeout waiting for INIT to clear.\n"); return FPGA_FAIL; } @@ -528,7 +528,7 @@ static int Spartan3_ss_load (Xilinx_desc * desc, void *buf, size_t bsize) i --; } while (i > 0); -#ifdef CFG_FPGA_PROG_FEEDBACK +#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK if (bytecount % (bsize / 40) == 0) putc ('.'); /* let them know we are alive */ #endif @@ -536,7 +536,7 @@ static int Spartan3_ss_load (Xilinx_desc * desc, void *buf, size_t bsize) CONFIG_FPGA_DELAY (); -#ifdef CFG_FPGA_PROG_FEEDBACK +#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK putc ('\n'); /* terminate the dotted line */ #endif @@ -556,7 +556,7 @@ static int Spartan3_ss_load (Xilinx_desc * desc, void *buf, size_t bsize) putc ('*'); - if (get_timer (ts) > CFG_FPGA_WAIT) { /* check the time */ + if (get_timer (ts) > CONFIG_SYS_FPGA_WAIT) { /* check the time */ puts ("** Timeout waiting for DONE to clear.\n"); ret_val = FPGA_FAIL; break; @@ -571,7 +571,7 @@ static int Spartan3_ss_load (Xilinx_desc * desc, void *buf, size_t bsize) (*fn->post) (cookie); } -#ifdef CFG_FPGA_PROG_FEEDBACK +#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK if (ret_val == FPGA_SUCCESS) { puts ("Done.\n"); } -- cgit v1.2.3