From ceec4761141a920602c4a4c7b90039d144ec2e58 Mon Sep 17 00:00:00 2001 From: Leo Yu-Chi Liang Date: Tue, 28 May 2024 20:49:42 +0800 Subject: andes: l2 cache driver: fixes typos and cctl status Signed-off-by: Leo Yu-Chi Liang --- drivers/cache/cache-andes-l2.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) (limited to 'drivers/cache') diff --git a/drivers/cache/cache-andes-l2.c b/drivers/cache/cache-andes-l2.c index 45d29f2fbd9..bc6f7ed7c1e 100644 --- a/drivers/cache/cache-andes-l2.c +++ b/drivers/cache/cache-andes-l2.c @@ -30,7 +30,7 @@ struct l2cache { volatile u64 cctl_command2; volatile u64 cctl_access_line2; volatile u64 cctl_command3; - volatile u64 cctl_access_line4; + volatile u64 cctl_access_line3; volatile u64 cctl_status; }; @@ -97,13 +97,15 @@ static int andes_l2_disable(struct udevice *dev) struct andes_l2_plat *plat = dev_get_plat(dev); volatile struct l2cache *regs = plat->regs; u8 hart = gd->arch.boot_hart; + void __iomem *cctlcmd = (void __iomem *)CCTL_CMD_REG(regs, hart); + void __iomem *cctlstatus = (void __iomem *)CCTL_STATUS_REG(regs, hart); if ((regs) && (readl(®s->control) & L2_ENABLE)) { writel(L2_WBINVAL_ALL, cctlcmd); - while ((readl(®s->cctl_status) & CCTL_STATUS_MSK(hart))) { - if ((readl(®s->cctl_status) & CCTL_STATUS_ILLEGAL(hart))) { + while ((readl(cctlstatus) & CCTL_STATUS_MSK(hart))) { + if ((readl(cctlstatus) & CCTL_STATUS_ILLEGAL(hart))) { printf("L2 flush illegal! hanging..."); hang(); } -- cgit v1.2.3