From 65cc0e2a65d2c9f107b2f42db6396d9ade6c5ad8 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Wed, 16 Nov 2022 13:10:41 -0500 Subject: global: Move remaining CONFIG_SYS_* to CFG_SYS_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini Reviewed-by: Simon Glass --- drivers/timer/arm_global_timer.c | 2 +- drivers/timer/imx-gpt-timer.c | 10 +++++----- drivers/timer/orion-timer.c | 4 ++-- drivers/timer/stm32_timer.c | 4 ++-- 4 files changed, 10 insertions(+), 10 deletions(-) (limited to 'drivers/timer') diff --git a/drivers/timer/arm_global_timer.c b/drivers/timer/arm_global_timer.c index 065f10bb742..2e50d9fbc58 100644 --- a/drivers/timer/arm_global_timer.c +++ b/drivers/timer/arm_global_timer.c @@ -59,7 +59,7 @@ static int arm_global_timer_probe(struct udevice *dev) return ret; uc_priv->clock_rate = ret; } else { - uc_priv->clock_rate = CONFIG_SYS_HZ_CLOCK; + uc_priv->clock_rate = CFG_SYS_HZ_CLOCK; } /* init timer */ diff --git a/drivers/timer/imx-gpt-timer.c b/drivers/timer/imx-gpt-timer.c index 72be2977547..9c3b64ae5b1 100644 --- a/drivers/timer/imx-gpt-timer.c +++ b/drivers/timer/imx-gpt-timer.c @@ -28,9 +28,9 @@ #define GPT_CLKSRC_IPG_CLK (1 << 6) #define GPT_CLKSRC_IPG_CLK_24M (5 << 6) -/* If CONFIG_SYS_HZ_CLOCK not specified et's default to 3Mhz */ -#ifndef CONFIG_SYS_HZ_CLOCK -#define CONFIG_SYS_HZ_CLOCK 3000000 +/* If CFG_SYS_HZ_CLOCK not specified et's default to 3Mhz */ +#ifndef CFG_SYS_HZ_CLOCK +#define CFG_SYS_HZ_CLOCK 3000000 #endif struct imx_gpt_timer_regs { @@ -60,7 +60,7 @@ static u64 imx_gpt_timer_get_count(struct udevice *dev) static int imx_gpt_setup(struct imx_gpt_timer_regs *regs, u32 rate) { - u32 prescaler = (rate / CONFIG_SYS_HZ_CLOCK) - 1; + u32 prescaler = (rate / CFG_SYS_HZ_CLOCK) - 1; /* Reset the timer */ setbits_le32(®s->cr, GPT_CR_SWR); @@ -138,7 +138,7 @@ static int imx_gpt_timer_probe(struct udevice *dev) return ret; } - uc_priv->clock_rate = CONFIG_SYS_HZ_CLOCK; + uc_priv->clock_rate = CFG_SYS_HZ_CLOCK; return 0; } diff --git a/drivers/timer/orion-timer.c b/drivers/timer/orion-timer.c index d0eab3ce781..d588f0cbcd1 100644 --- a/drivers/timer/orion-timer.c +++ b/drivers/timer/orion-timer.c @@ -72,7 +72,7 @@ unsigned long notrace timer_early_get_rate(void) if (IS_ENABLED(CONFIG_ARCH_MVEBU)) return MVEBU_TIMER_FIXED_RATE_25MHZ; else - return CONFIG_SYS_TCLK; + return CFG_SYS_TCLK; } /** @@ -117,7 +117,7 @@ static int orion_timer_probe(struct udevice *dev) if (type == INPUT_CLOCK_25MHZ) uc_priv->clock_rate = MVEBU_TIMER_FIXED_RATE_25MHZ; else - uc_priv->clock_rate = CONFIG_SYS_TCLK; + uc_priv->clock_rate = CFG_SYS_TCLK; orion_timer_init(priv->base, type); return 0; diff --git a/drivers/timer/stm32_timer.c b/drivers/timer/stm32_timer.c index f07251e54c0..1213a14ef19 100644 --- a/drivers/timer/stm32_timer.c +++ b/drivers/timer/stm32_timer.c @@ -97,11 +97,11 @@ static int stm32_timer_probe(struct udevice *dev) rate = clk_get_rate(&clk); /* we set timer prescaler to obtain a 1MHz timer counter frequency */ - psc = (rate / CONFIG_SYS_HZ_CLOCK) - 1; + psc = (rate / CFG_SYS_HZ_CLOCK) - 1; writel(psc, ®s->psc); /* Set timer frequency to 1MHz */ - uc_priv->clock_rate = CONFIG_SYS_HZ_CLOCK; + uc_priv->clock_rate = CFG_SYS_HZ_CLOCK; /* Configure timer for auto-reload */ setbits_le32(®s->cr1, CR1_ARPE); -- cgit v1.2.3