From 41dec2fe99512e941261594f522b2e7d485c314b Mon Sep 17 00:00:00 2001 From: Yangbo Lu Date: Mon, 21 Oct 2019 18:09:07 +0800 Subject: mmc: fsl_esdhc: make BLK as hard requirement of DM_MMC U-boot prefers DM_MMC + BLK for MMC. Now eSDHC driver has already support it, so let's force to use it. - Drop non-BLK support for DM_MMC introduced by below patch. 66fa035 mmc: fsl_esdhc: fix probe issue without CONFIG_BLK enabled - Support only DM_MMC + BLK (assuming BLK is always enabled for DM_MMC). - Use DM_MMC instead of BLK for conditional compile. Signed-off-by: Yangbo Lu --- drivers/mmc/fsl_esdhc.c | 33 +-------------------------------- 1 file changed, 1 insertion(+), 32 deletions(-) (limited to 'drivers') diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c index 28d2312ef75..4eceec5feb9 100644 --- a/drivers/mmc/fsl_esdhc.c +++ b/drivers/mmc/fsl_esdhc.c @@ -23,10 +23,6 @@ #include #include -#if !CONFIG_IS_ENABLED(BLK) -#include "mmc_private.h" -#endif - DECLARE_GLOBAL_DATA_PTR; #define SDHCI_IRQ_EN_BITS (IRQSTATEN_CC | IRQSTATEN_TC | \ @@ -35,7 +31,6 @@ DECLARE_GLOBAL_DATA_PTR; IRQSTATEN_CIE | IRQSTATEN_DTOE | IRQSTATEN_DCE | \ IRQSTATEN_DEBE | IRQSTATEN_BRR | IRQSTATEN_BWR | \ IRQSTATEN_DINT) -#define ESDHC_DRIVER_STAGE_VALUE 0xffffffff struct fsl_esdhc { uint dsaddr; /* SDMA system address register */ @@ -98,7 +93,7 @@ struct fsl_esdhc_priv { struct clk per_clk; unsigned int clock; unsigned int bus_width; -#if !CONFIG_IS_ENABLED(BLK) +#if !CONFIG_IS_ENABLED(DM_MMC) struct mmc *mmc; #endif struct udevice *dev; @@ -960,9 +955,6 @@ static int fsl_esdhc_probe(struct udevice *dev) fdt_addr_t addr; unsigned int val; struct mmc *mmc; -#if !CONFIG_IS_ENABLED(BLK) - struct blk_desc *bdesc; -#endif int ret; addr = dev_read_addr(dev); @@ -1028,25 +1020,6 @@ static int fsl_esdhc_probe(struct udevice *dev) mmc = &plat->mmc; mmc->cfg = &plat->cfg; mmc->dev = dev; -#if !CONFIG_IS_ENABLED(BLK) - mmc->priv = priv; - - /* Setup dsr related values */ - mmc->dsr_imp = 0; - mmc->dsr = ESDHC_DRIVER_STAGE_VALUE; - /* Setup the universal parts of the block interface just once */ - bdesc = mmc_get_blk_desc(mmc); - bdesc->if_type = IF_TYPE_MMC; - bdesc->removable = 1; - bdesc->devnum = mmc_get_next_devnum(); - bdesc->block_read = mmc_bread; - bdesc->block_write = mmc_bwrite; - bdesc->block_erase = mmc_berase; - - /* setup initial part type */ - bdesc->part_type = mmc->cfg->part_type; - mmc_list_add(mmc); -#endif upriv->mmc = mmc; @@ -1093,23 +1066,19 @@ static const struct udevice_id fsl_esdhc_ids[] = { { /* sentinel */ } }; -#if CONFIG_IS_ENABLED(BLK) static int fsl_esdhc_bind(struct udevice *dev) { struct fsl_esdhc_plat *plat = dev_get_platdata(dev); return mmc_bind(dev, &plat->mmc, &plat->cfg); } -#endif U_BOOT_DRIVER(fsl_esdhc) = { .name = "fsl-esdhc-mmc", .id = UCLASS_MMC, .of_match = fsl_esdhc_ids, .ops = &fsl_esdhc_ops, -#if CONFIG_IS_ENABLED(BLK) .bind = fsl_esdhc_bind, -#endif .probe = fsl_esdhc_probe, .platdata_auto_alloc_size = sizeof(struct fsl_esdhc_plat), .priv_auto_alloc_size = sizeof(struct fsl_esdhc_priv), -- cgit v1.2.3 From 2913926f3b3dec282f8773e3c02377c9600d8267 Mon Sep 17 00:00:00 2001 From: Yangbo Lu Date: Mon, 21 Oct 2019 18:09:08 +0800 Subject: mmc: fsl_esdhc: remove redundant DM_MMC checking Remove redundant DM_MMC checking which is already in DM_MMC conditional compile block. Signed-off-by: Yangbo Lu --- drivers/mmc/fsl_esdhc.c | 2 -- 1 file changed, 2 deletions(-) (limited to 'drivers') diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c index 4eceec5feb9..03c54c3a7f5 100644 --- a/drivers/mmc/fsl_esdhc.c +++ b/drivers/mmc/fsl_esdhc.c @@ -1026,7 +1026,6 @@ static int fsl_esdhc_probe(struct udevice *dev) return esdhc_init_common(priv, mmc); } -#if CONFIG_IS_ENABLED(DM_MMC) static int fsl_esdhc_get_cd(struct udevice *dev) { struct fsl_esdhc_priv *priv = dev_get_priv(dev); @@ -1059,7 +1058,6 @@ static const struct dm_mmc_ops fsl_esdhc_ops = { .execute_tuning = fsl_esdhc_execute_tuning, #endif }; -#endif static const struct udevice_id fsl_esdhc_ids[] = { { .compatible = "fsl,esdhc", }, -- cgit v1.2.3 From 5d336d1701567e5025c3010b325e633a677c30a2 Mon Sep 17 00:00:00 2001 From: Yangbo Lu Date: Mon, 21 Oct 2019 18:09:09 +0800 Subject: mmc: fsl_esdhc: drop i.MX DDR support code A previous patch below adding DDR mode support was actually for i.MX platforms. Now i.MX eSDHC driver is fsl_esdhc_imx.c. For QorIQ eSDHC, it uses different process for DDR mode, and hasn't been supported. Let's drop DDR support code for i.MX in fsl_esdhc driver. 0e1bf61 mmc: fsl_esdhc: Add support for DDR mode Signed-off-by: Yangbo Lu --- drivers/mmc/fsl_esdhc.c | 8 ++------ 1 file changed, 2 insertions(+), 6 deletions(-) (limited to 'drivers') diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c index 03c54c3a7f5..cd357ea4116 100644 --- a/drivers/mmc/fsl_esdhc.c +++ b/drivers/mmc/fsl_esdhc.c @@ -501,7 +501,6 @@ static void set_sysctl(struct fsl_esdhc_priv *priv, struct mmc *mmc, uint clock) struct fsl_esdhc *regs = priv->esdhc_regs; int div = 1; int pre_div = 2; - int ddr_pre_div = mmc->ddr_mode ? 2 : 1; unsigned int sdhc_clk = priv->sdhc_clk; u32 time_out; u32 value; @@ -510,10 +509,10 @@ static void set_sysctl(struct fsl_esdhc_priv *priv, struct mmc *mmc, uint clock) if (clock < mmc->cfg->f_min) clock = mmc->cfg->f_min; - while (sdhc_clk / (16 * pre_div * ddr_pre_div) > clock && pre_div < 256) + while (sdhc_clk / (16 * pre_div) > clock && pre_div < 256) pre_div *= 2; - while (sdhc_clk / (div * pre_div * ddr_pre_div) > clock && div < 16) + while (sdhc_clk / (div * pre_div) > clock && div < 16) div++; pre_div >>= 1; @@ -773,9 +772,6 @@ static int fsl_esdhc_init(struct fsl_esdhc_priv *priv, cfg->host_caps = MMC_MODE_4BIT; cfg->host_caps = MMC_MODE_4BIT | MMC_MODE_8BIT; -#ifdef CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE - cfg->host_caps |= MMC_MODE_DDR_52MHz; -#endif if (priv->bus_width > 0) { if (priv->bus_width < 8) -- cgit v1.2.3