From 62cbde4c4e462e5147d07cf1424492bb39e7bf94 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Thu, 19 Dec 2019 17:58:18 -0700 Subject: serial: ns16550: Support run-time configuration At present this driver uses an assortment of CONFIG options to control how it accesses the hardware. This is painful for platforms that are supposed to be controlled by a device tree or a previous-stage bootloader. Add a new CONFIG option to enable fully dynamic configuration. This controls register spacing, size, offset and endianness. Signed-off-by: Simon Glass Reviewed-by: Aiden Park Tested-by: Aiden Park Reviewed-by: Bin Meng [bmeng: squashed in http://patchwork.ozlabs.org/patch/1232929/] Signed-off-by: Bin Meng --- include/ns16550.h | 16 +++++++++++++++- 1 file changed, 15 insertions(+), 1 deletion(-) (limited to 'include/ns16550.h') diff --git a/include/ns16550.h b/include/ns16550.h index 701efeea855..18c9077755b 100644 --- a/include/ns16550.h +++ b/include/ns16550.h @@ -31,6 +31,9 @@ #define CONFIG_SYS_NS16550_REG_SIZE (-1) #endif +#ifdef CONFIG_NS16550_DYNAMIC +#define UART_REG(x) unsigned char x +#else #if !defined(CONFIG_SYS_NS16550_REG_SIZE) || (CONFIG_SYS_NS16550_REG_SIZE == 0) #error "Please define NS16550 registers size." #elif defined(CONFIG_SYS_NS16550_MEM32) && !defined(CONFIG_DM_SERIAL) @@ -44,14 +47,24 @@ unsigned char x; \ unsigned char postpad_##x[-CONFIG_SYS_NS16550_REG_SIZE - 1]; #endif +#endif /* CONFIG_NS16550_DYNAMIC */ + +enum ns16550_flags { + NS16550_FLAG_IO = 1 << 0, /* Use I/O access (else mem-mapped) */ + NS16550_FLAG_ENDIAN = 1 << 1, /* Use out_le/be_32() */ + NS16550_FLAG_BE = 1 << 2, /* Big-endian access (else little) */ +}; /** * struct ns16550_platdata - information about a NS16550 port * * @base: Base register address - * @reg_width: IO accesses size of registers (in bytes) + * @reg_width: IO accesses size of registers (in bytes, 1 or 4) * @reg_shift: Shift size of registers (0=byte, 1=16bit, 2=32bit...) + * @reg_offset: Offset to start of registers (normally 0) * @clock: UART base clock speed in Hz + * @fcr: Offset of FCR register (normally UART_FCR_DEFVAL) + * @flags: A few flags (enum ns16550_flags) * @bdf: PCI slot/function (pci_dev_t) */ struct ns16550_platdata { @@ -61,6 +74,7 @@ struct ns16550_platdata { int reg_offset; int clock; u32 fcr; + int flags; #if defined(CONFIG_PCI) && defined(CONFIG_SPL) int bdf; #endif -- cgit v1.2.3