From 8250d0bae84229abea397f6b474b3556b0f04e80 Mon Sep 17 00:00:00 2001 From: kevin.morfitt@fearnside-systems.co.uk Date: Sat, 10 Oct 2009 13:32:01 +0900 Subject: Clean-up of s3c24x0 header files This patch re-formats the arm920t s3c24x0 header files in preparation for changes to add support for the Embest SBC2440-II Board. The changes are as follows: - re-indent the code using Lindent - make sure register layouts are defined using a C struct - replace the upper-case typedef'ed C struct names with lower case non-typedef'ed ones - make sure registers are accessed using the proper accessor functions - run checkpatch.pl and fix any error reports It assumes the following patch has been applied first: - [U-Boot][PATCH-ARM] CONFIG_SYS_HZ fix for ARM902T S3C24X0 Boards, 05/09/2009 - patch 1/4 of this series Tested on an Embest SBC2440-II Board with local u-boot patches as I don't have any s3c2400 or s3c2410 boards but need this patch applying before I can submit patches for the SBC2440-II Board. Also, temporarily modified sbc2410x, smdk2400, smdk2410 and trab configs to use the mtd nand driver (which isn't used by any board at the moment), ran MAKEALL for all ARM9 targets and no new warnings or errors were found. Signed-off-by: Kevin Morfitt Signed-off-by: Minkyu Kang --- include/s3c2410.h | 159 ++++++++++++++---------------------------------------- 1 file changed, 39 insertions(+), 120 deletions(-) (limited to 'include/s3c2410.h') diff --git a/include/s3c2410.h b/include/s3c2410.h index 87135b45dd1..03b33b49248 100644 --- a/include/s3c2410.h +++ b/include/s3c2410.h @@ -38,11 +38,11 @@ #define S3C2410_ECCSIZE 512 #define S3C2410_ECCBYTES 3 -typedef enum { +enum s3c24x0_uarts_nr { S3C24X0_UART0, S3C24X0_UART1, S3C24X0_UART2 -} S3C24X0_UARTS_NR; +}; /* S3C2410 device base addresses */ #define S3C24X0_MEMCTL_BASE 0x48000000 @@ -69,159 +69,78 @@ typedef enum { #include -static inline S3C24X0_MEMCTL * S3C24X0_GetBase_MEMCTL(void) +static inline struct s3c24x0_memctl *s3c24x0_get_base_memctl(void) { - return (S3C24X0_MEMCTL * const)S3C24X0_MEMCTL_BASE; + return (struct s3c24x0_memctl *)S3C24X0_MEMCTL_BASE; } -static inline S3C24X0_USB_HOST * S3C24X0_GetBase_USB_HOST(void) +static inline struct s3c24x0_usb_host *s3c24x0_get_base_usb_host(void) { - return (S3C24X0_USB_HOST * const)S3C24X0_USB_HOST_BASE; + return (struct s3c24x0_usb_host *)S3C24X0_USB_HOST_BASE; } -static inline S3C24X0_INTERRUPT * S3C24X0_GetBase_INTERRUPT(void) +static inline struct s3c24x0_interrupt *s3c24x0_get_base_interrupt(void) { - return (S3C24X0_INTERRUPT * const)S3C24X0_INTERRUPT_BASE; + return (struct s3c24x0_interrupt *)S3C24X0_INTERRUPT_BASE; } -static inline S3C24X0_DMAS * S3C24X0_GetBase_DMAS(void) +static inline struct s3c24x0_dmas *s3c24x0_get_base_dmas(void) { - return (S3C24X0_DMAS * const)S3C24X0_DMA_BASE; + return (struct s3c24x0_dmas *)S3C24X0_DMA_BASE; } -static inline S3C24X0_CLOCK_POWER * S3C24X0_GetBase_CLOCK_POWER(void) +static inline struct s3c24x0_clock_power *s3c24x0_get_base_clock_power(void) { - return (S3C24X0_CLOCK_POWER * const)S3C24X0_CLOCK_POWER_BASE; + return (struct s3c24x0_clock_power *)S3C24X0_CLOCK_POWER_BASE; } -static inline S3C24X0_LCD * S3C24X0_GetBase_LCD(void) +static inline struct s3c24x0_lcd *s3c24x0_get_base_lcd(void) { - return (S3C24X0_LCD * const)S3C24X0_LCD_BASE; + return (struct s3c24x0_lcd *)S3C24X0_LCD_BASE; } -static inline S3C2410_NAND * S3C2410_GetBase_NAND(void) +static inline struct s3c2410_nand *s3c2410_get_base_nand(void) { - return (S3C2410_NAND * const)S3C2410_NAND_BASE; + return (struct s3c2410_nand *)S3C2410_NAND_BASE; } -static inline S3C24X0_UART * S3C24X0_GetBase_UART(S3C24X0_UARTS_NR nr) +static inline struct s3c24x0_uart + *s3c24x0_get_base_uart(enum s3c24x0_uarts_nr n) { - return (S3C24X0_UART * const)(S3C24X0_UART_BASE + (nr * 0x4000)); + return (struct s3c24x0_uart *)(S3C24X0_UART_BASE + (n * 0x4000)); } -static inline S3C24X0_TIMERS * S3C24X0_GetBase_TIMERS(void) +static inline struct s3c24x0_timers *s3c24x0_get_base_timers(void) { - return (S3C24X0_TIMERS * const)S3C24X0_TIMER_BASE; + return (struct s3c24x0_timers *)S3C24X0_TIMER_BASE; } -static inline S3C24X0_USB_DEVICE * S3C24X0_GetBase_USB_DEVICE(void) +static inline struct s3c24x0_usb_device *s3c24x0_get_base_usb_device(void) { - return (S3C24X0_USB_DEVICE * const)S3C24X0_USB_DEVICE_BASE; + return (struct s3c24x0_usb_device *)S3C24X0_USB_DEVICE_BASE; } -static inline S3C24X0_WATCHDOG * S3C24X0_GetBase_WATCHDOG(void) +static inline struct s3c24x0_watchdog *s3c24x0_get_base_watchdog(void) { - return (S3C24X0_WATCHDOG * const)S3C24X0_WATCHDOG_BASE; + return (struct s3c24x0_watchdog *)S3C24X0_WATCHDOG_BASE; } -static inline S3C24X0_I2C * S3C24X0_GetBase_I2C(void) +static inline struct s3c24x0_i2c *s3c24x0_get_base_i2c(void) { - return (S3C24X0_I2C * const)S3C24X0_I2C_BASE; + return (struct s3c24x0_i2c *)S3C24X0_I2C_BASE; } -static inline S3C24X0_I2S * S3C24X0_GetBase_I2S(void) +static inline struct s3c24x0_i2s *s3c24x0_get_base_i2s(void) { - return (S3C24X0_I2S * const)S3C24X0_I2S_BASE; + return (struct s3c24x0_i2s *)S3C24X0_I2S_BASE; } -static inline S3C24X0_GPIO * S3C24X0_GetBase_GPIO(void) +static inline struct s3c24x0_gpio *s3c24x0_get_base_gpio(void) { - return (S3C24X0_GPIO * const)S3C24X0_GPIO_BASE; + return (struct s3c24x0_gpio *)S3C24X0_GPIO_BASE; } -static inline S3C24X0_RTC * S3C24X0_GetBase_RTC(void) +static inline struct s3c24x0_rtc *s3c24x0_get_base_rtc(void) { - return (S3C24X0_RTC * const)S3C24X0_RTC_BASE; + return (struct s3c24x0_rtc *)S3C24X0_RTC_BASE; } -static inline S3C2410_ADC * S3C2410_GetBase_ADC(void) +static inline struct s3c2410_adc *s3c2410_get_base_adc(void) { - return (S3C2410_ADC * const)S3C2410_ADC_BASE; + return (struct s3c2410_adc *)S3C2410_ADC_BASE; } -static inline S3C24X0_SPI * S3C24X0_GetBase_SPI(void) +static inline struct s3c24x0_spi *s3c24x0_get_base_spi(void) { - return (S3C24X0_SPI * const)S3C24X0_SPI_BASE; + return (struct s3c24x0_spi *)S3C24X0_SPI_BASE; } -static inline S3C2410_SDI * S3C2410_GetBase_SDI(void) +static inline struct s3c2410_sdi *s3c2410_get_base_sdi(void) { - return (S3C2410_SDI * const)S3C2410_SDI_BASE; + return (struct s3c2410_sdi *)S3C2410_SDI_BASE; } - -/* ISR */ -#define pISR_RESET (*(unsigned *)(_ISR_STARTADDRESS+0x0)) -#define pISR_UNDEF (*(unsigned *)(_ISR_STARTADDRESS+0x4)) -#define pISR_SWI (*(unsigned *)(_ISR_STARTADDRESS+0x8)) -#define pISR_PABORT (*(unsigned *)(_ISR_STARTADDRESS+0xC)) -#define pISR_DABORT (*(unsigned *)(_ISR_STARTADDRESS+0x10)) -#define pISR_RESERVED (*(unsigned *)(_ISR_STARTADDRESS+0x14)) -#define pISR_IRQ (*(unsigned *)(_ISR_STARTADDRESS+0x18)) -#define pISR_FIQ (*(unsigned *)(_ISR_STARTADDRESS+0x1C)) - -#define pISR_EINT0 (*(unsigned *)(_ISR_STARTADDRESS+0x20)) -#define pISR_EINT1 (*(unsigned *)(_ISR_STARTADDRESS+0x24)) -#define pISR_EINT2 (*(unsigned *)(_ISR_STARTADDRESS+0x28)) -#define pISR_EINT3 (*(unsigned *)(_ISR_STARTADDRESS+0x2C)) -#define pISR_EINT4_7 (*(unsigned *)(_ISR_STARTADDRESS+0x30)) -#define pISR_EINT8_23 (*(unsigned *)(_ISR_STARTADDRESS+0x34)) -#define pISR_BAT_FLT (*(unsigned *)(_ISR_STARTADDRESS+0x3C)) -#define pISR_TICK (*(unsigned *)(_ISR_STARTADDRESS+0x40)) -#define pISR_WDT (*(unsigned *)(_ISR_STARTADDRESS+0x44)) -#define pISR_TIMER0 (*(unsigned *)(_ISR_STARTADDRESS+0x48)) -#define pISR_TIMER1 (*(unsigned *)(_ISR_STARTADDRESS+0x4C)) -#define pISR_TIMER2 (*(unsigned *)(_ISR_STARTADDRESS+0x50)) -#define pISR_TIMER3 (*(unsigned *)(_ISR_STARTADDRESS+0x54)) -#define pISR_TIMER4 (*(unsigned *)(_ISR_STARTADDRESS+0x58)) -#define pISR_UART2 (*(unsigned *)(_ISR_STARTADDRESS+0x5C)) -#define pISR_NOTUSED (*(unsigned *)(_ISR_STARTADDRESS+0x60)) -#define pISR_DMA0 (*(unsigned *)(_ISR_STARTADDRESS+0x64)) -#define pISR_DMA1 (*(unsigned *)(_ISR_STARTADDRESS+0x68)) -#define pISR_DMA2 (*(unsigned *)(_ISR_STARTADDRESS+0x6C)) -#define pISR_DMA3 (*(unsigned *)(_ISR_STARTADDRESS+0x70)) -#define pISR_SDI (*(unsigned *)(_ISR_STARTADDRESS+0x74)) -#define pISR_SPI0 (*(unsigned *)(_ISR_STARTADDRESS+0x78)) -#define pISR_UART1 (*(unsigned *)(_ISR_STARTADDRESS+0x7C)) -#define pISR_USBD (*(unsigned *)(_ISR_STARTADDRESS+0x84)) -#define pISR_USBH (*(unsigned *)(_ISR_STARTADDRESS+0x88)) -#define pISR_IIC (*(unsigned *)(_ISR_STARTADDRESS+0x8C)) -#define pISR_UART0 (*(unsigned *)(_ISR_STARTADDRESS+0x90)) -#define pISR_SPI1 (*(unsigned *)(_ISR_STARTADDRESS+0x94)) -#define pISR_RTC (*(unsigned *)(_ISR_STARTADDRESS+0x98)) -#define pISR_ADC (*(unsigned *)(_ISR_STARTADDRESS+0xA0)) - - -/* PENDING BIT */ -#define BIT_EINT0 (0x1) -#define BIT_EINT1 (0x1<<1) -#define BIT_EINT2 (0x1<<2) -#define BIT_EINT3 (0x1<<3) -#define BIT_EINT4_7 (0x1<<4) -#define BIT_EINT8_23 (0x1<<5) -#define BIT_BAT_FLT (0x1<<7) -#define BIT_TICK (0x1<<8) -#define BIT_WDT (0x1<<9) -#define BIT_TIMER0 (0x1<<10) -#define BIT_TIMER1 (0x1<<11) -#define BIT_TIMER2 (0x1<<12) -#define BIT_TIMER3 (0x1<<13) -#define BIT_TIMER4 (0x1<<14) -#define BIT_UART2 (0x1<<15) -#define BIT_LCD (0x1<<16) -#define BIT_DMA0 (0x1<<17) -#define BIT_DMA1 (0x1<<18) -#define BIT_DMA2 (0x1<<19) -#define BIT_DMA3 (0x1<<20) -#define BIT_SDI (0x1<<21) -#define BIT_SPI0 (0x1<<22) -#define BIT_UART1 (0x1<<23) -#define BIT_USBD (0x1<<25) -#define BIT_USBH (0x1<<26) -#define BIT_IIC (0x1<<27) -#define BIT_UART0 (0x1<<28) -#define BIT_SPI1 (0x1<<29) -#define BIT_RTC (0x1<<30) -#define BIT_ADC (0x1<<31) -#define BIT_ALLMSK (0xFFFFFFFF) - -#define ClearPending(bit) {\ - rSRCPND = bit;\ - rINTPND = bit;\ - rINTPND;\ - } -/* Wait until rINTPND is changed for the case that the ISR is very short. */ #endif /*__S3C2410_H__*/ -- cgit v1.2.3