From fc4572ae753f62fc26fa8361d5269d9c33505850 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Wed, 1 May 2024 16:22:18 +0000 Subject: clk: rockchip: rk3399: Rename SCLK_DDRCLK to SCLK_DDRC Sync rk3399-cru.h with one from Linux kernel v6.2+ and fix use of the SCLK_DDRCLK name that was only used by U-Boot. Signed-off-by: Jonas Karlman Reviewed-by: Kever Yang --- include/dt-bindings/clock/rk3399-cru.h | 30 ++++++++++++++++-------------- 1 file changed, 16 insertions(+), 14 deletions(-) (limited to 'include') diff --git a/include/dt-bindings/clock/rk3399-cru.h b/include/dt-bindings/clock/rk3399-cru.h index 211faf8fa89..39169d94a44 100644 --- a/include/dt-bindings/clock/rk3399-cru.h +++ b/include/dt-bindings/clock/rk3399-cru.h @@ -1,6 +1,7 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ +/* SPDX-License-Identifier: GPL-2.0-or-later */ /* * Copyright (c) 2016 Rockchip Electronics Co. Ltd. + * Author: Xing Zheng */ #ifndef _DT_BINDINGS_CLK_ROCKCHIP_RK3399_H @@ -121,16 +122,17 @@ #define SCLK_DPHY_RX0_CFG 165 #define SCLK_RMII_SRC 166 #define SCLK_PCIEPHY_REF100M 167 -#define SCLK_USBPHY0_480M_SRC 168 -#define SCLK_USBPHY1_480M_SRC 169 -#define SCLK_DDRCLK 170 -#define SCLK_TESTOUT2 171 +#define SCLK_DDRC 168 +#define SCLK_TESTCLKOUT1 169 +#define SCLK_TESTCLKOUT2 170 #define DCLK_VOP0 180 #define DCLK_VOP1 181 #define DCLK_VOP0_DIV 182 #define DCLK_VOP1_DIV 183 #define DCLK_M0_PERILP 184 +#define DCLK_VOP0_FRAC 185 +#define DCLK_VOP1_FRAC 186 #define FCLK_CM0S 190 @@ -545,8 +547,8 @@ #define SRST_H_PERILP0 171 #define SRST_H_PERILP0_NOC 172 #define SRST_ROM 173 -#define SRST_CRYPTO_S 174 -#define SRST_CRYPTO_M 175 +#define SRST_CRYPTO0_S 174 +#define SRST_CRYPTO0_M 175 /* cru_softrst_con11 */ #define SRST_P_DCF 176 @@ -554,7 +556,7 @@ #define SRST_CM0S 178 #define SRST_CM0S_DBG 179 #define SRST_CM0S_PO 180 -#define SRST_CRYPTO 181 +#define SRST_CRYPTO0 181 #define SRST_P_PERILP1_SGRF 182 #define SRST_P_PERILP1_GRF 183 #define SRST_CRYPTO1_S 184 @@ -592,13 +594,13 @@ #define SRST_P_SPI0 214 #define SRST_P_SPI1 215 #define SRST_P_SPI2 216 -#define SRST_P_SPI4 217 -#define SRST_P_SPI5 218 +#define SRST_P_SPI3 217 +#define SRST_P_SPI4 218 #define SRST_SPI0 219 #define SRST_SPI1 220 #define SRST_SPI2 221 -#define SRST_SPI4 222 -#define SRST_SPI5 223 +#define SRST_SPI3 222 +#define SRST_SPI4 223 /* cru_softrst_con14 */ #define SRST_I2S0_8CH 224 @@ -720,8 +722,8 @@ #define SRST_H_CM0S_NOC 3 #define SRST_DBG_CM0S 4 #define SRST_PO_CM0S 5 -#define SRST_P_SPI3 6 -#define SRST_SPI3 7 +#define SRST_P_SPI6 6 +#define SRST_SPI6 7 #define SRST_P_TIMER_0_1 8 #define SRST_P_TIMER_0 9 #define SRST_P_TIMER_1 10 -- cgit v1.2.3 From 2711357c0e351371467e66e19e159ab995271eb4 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Sat, 4 May 2024 19:42:54 +0000 Subject: rockchip: rk3308: Remove redundant device tree files Remove redundant device tree files now that RK3308 boards have been migrated to use OF_UPSTREAM. Signed-off-by: Jonas Karlman Reviewed-by: Kever Yang --- arch/arm/dts/rk3308-evb.dts | 230 ---- arch/arm/dts/rk3308-roc-cc.dts | 190 ---- arch/arm/dts/rk3308-rock-pi-s.dts | 314 ------ arch/arm/dts/rk3308.dtsi | 1888 -------------------------------- include/dt-bindings/clock/rk3308-cru.h | 387 ------- 5 files changed, 3009 deletions(-) delete mode 100644 arch/arm/dts/rk3308-evb.dts delete mode 100644 arch/arm/dts/rk3308-roc-cc.dts delete mode 100644 arch/arm/dts/rk3308-rock-pi-s.dts delete mode 100644 arch/arm/dts/rk3308.dtsi delete mode 100644 include/dt-bindings/clock/rk3308-cru.h (limited to 'include') diff --git a/arch/arm/dts/rk3308-evb.dts b/arch/arm/dts/rk3308-evb.dts deleted file mode 100644 index 184b84fdde0..00000000000 --- a/arch/arm/dts/rk3308-evb.dts +++ /dev/null @@ -1,230 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd - * - */ - -/dts-v1/; -#include -#include "rk3308.dtsi" - -/ { - model = "Rockchip RK3308 EVB"; - compatible = "rockchip,rk3308-evb", "rockchip,rk3308"; - - chosen { - stdout-path = "serial4:1500000n8"; - }; - - adc-keys0 { - compatible = "adc-keys"; - io-channels = <&saradc 0>; - io-channel-names = "buttons"; - poll-interval = <100>; - keyup-threshold-microvolt = <1800000>; - - button-func { - linux,code = ; - label = "function"; - press-threshold-microvolt = <18000>; - }; - }; - - adc-keys1 { - compatible = "adc-keys"; - io-channels = <&saradc 1>; - io-channel-names = "buttons"; - poll-interval = <100>; - keyup-threshold-microvolt = <1800000>; - - button-esc { - linux,code = ; - label = "micmute"; - press-threshold-microvolt = <1130000>; - }; - - button-home { - linux,code = ; - label = "mode"; - press-threshold-microvolt = <901000>; - }; - - button-menu { - linux,code = ; - label = "play"; - press-threshold-microvolt = <624000>; - }; - - button-down { - linux,code = ; - label = "volume down"; - press-threshold-microvolt = <300000>; - }; - - button-up { - linux,code = ; - label = "volume up"; - press-threshold-microvolt = <18000>; - }; - }; - - gpio-keys { - compatible = "gpio-keys"; - autorepeat; - - pinctrl-names = "default"; - pinctrl-0 = <&pwr_key>; - - key-power { - gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_LOW>; - linux,code = ; - label = "GPIO Key Power"; - debounce-interval = <100>; - wakeup-source; - }; - }; - - vcc12v_dcin: vcc12v-dcin { - compatible = "regulator-fixed"; - regulator-name = "vcc12v_dcin"; - regulator-min-microvolt = <12000000>; - regulator-max-microvolt = <12000000>; - regulator-always-on; - regulator-boot-on; - }; - - vcc5v0_sys: vcc5v0-sys { - compatible = "regulator-fixed"; - regulator-name = "vcc5v0_sys"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - regulator-always-on; - regulator-boot-on; - vin-supply = <&vcc12v_dcin>; - }; - - vccio_sdio: vcc_1v8: vcc-1v8 { - compatible = "regulator-fixed"; - regulator-name = "vcc_1v8"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - regulator-boot-on; - vin-supply = <&vcc_io>; - }; - - vcc_ddr: vcc-ddr { - compatible = "regulator-fixed"; - regulator-name = "vcc_ddr"; - regulator-min-microvolt = <1500000>; - regulator-max-microvolt = <1500000>; - regulator-always-on; - regulator-boot-on; - vin-supply = <&vcc5v0_sys>; - }; - - vcc_io: vcc-io { - compatible = "regulator-fixed"; - regulator-name = "vcc_io"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - regulator-boot-on; - vin-supply = <&vcc5v0_sys>; - }; - - vccio_flash: vccio-flash { - compatible = "regulator-fixed"; - regulator-name = "vccio_flash"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - regulator-boot-on; - vin-supply = <&vcc_io>; - }; - - vcc5v0_host: vcc5v0-host { - compatible = "regulator-fixed"; - gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>; - enable-active-high; - pinctrl-names = "default"; - pinctrl-0 = <&usb_drv>; - regulator-name = "vbus_host"; - vin-supply = <&vcc5v0_sys>; - }; - - vdd_core: vdd-core { - compatible = "pwm-regulator"; - pwms = <&pwm0 0 5000 1>; - regulator-name = "vdd_core"; - regulator-min-microvolt = <827000>; - regulator-max-microvolt = <1340000>; - regulator-always-on; - regulator-boot-on; - regulator-settling-time-up-us = <250>; - pwm-supply = <&vcc5v0_sys>; - }; - - vdd_log: vdd-log { - compatible = "regulator-fixed"; - regulator-name = "vdd_log"; - regulator-min-microvolt = <1050000>; - regulator-max-microvolt = <1050000>; - regulator-always-on; - regulator-boot-on; - vin-supply = <&vcc5v0_sys>; - }; - - vdd_1v0: vdd-1v0 { - compatible = "regulator-fixed"; - regulator-name = "vdd_1v0"; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1000000>; - regulator-always-on; - regulator-boot-on; - vin-supply = <&vcc5v0_sys>; - }; -}; - -&cpu0 { - cpu-supply = <&vdd_core>; -}; - -&saradc { - status = "okay"; - vref-supply = <&vcc_1v8>; -}; - -&pinctrl { - pinctrl-names = "default"; - pinctrl-0 = <&rtc_32k>; - - buttons { - pwr_key: pwr-key { - rockchip,pins = <0 RK_PA6 0 &pcfg_pull_up>; - }; - }; - - usb { - usb_drv: usb-drv { - rockchip,pins = <0 RK_PC5 0 &pcfg_pull_none>; - }; - }; - - sdio-pwrseq { - wifi_enable_h: wifi-enable-h { - rockchip,pins = <0 RK_PA2 0 &pcfg_pull_none>; - }; - }; -}; - -&pwm0 { - status = "okay"; - pinctrl-0 = <&pwm0_pin_pull_down>; -}; - -&uart4 { - pinctrl-names = "default"; - pinctrl-0 = <&uart4_xfer>; - status = "okay"; -}; diff --git a/arch/arm/dts/rk3308-roc-cc.dts b/arch/arm/dts/rk3308-roc-cc.dts deleted file mode 100644 index 9232357f4fe..00000000000 --- a/arch/arm/dts/rk3308-roc-cc.dts +++ /dev/null @@ -1,190 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd - */ - -/dts-v1/; -#include "rk3308.dtsi" - -/ { - model = "Firefly ROC-RK3308-CC board"; - compatible = "firefly,roc-rk3308-cc", "rockchip,rk3308"; - - aliases { - mmc0 = &sdmmc; - mmc1 = &emmc; - }; - - chosen { - stdout-path = "serial2:1500000n8"; - }; - - ir-receiver { - compatible = "gpio-ir-receiver"; - gpios = <&gpio0 RK_PC0 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&ir_recv_pin>; - }; - - ir_tx { - compatible = "pwm-ir-tx"; - pwms = <&pwm5 0 25000 0>; - }; - - leds { - compatible = "gpio-leds"; - - power_led: led-0 { - label = "firefly:red:power"; - linux,default-trigger = "ir-power-click"; - default-state = "on"; - gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>; - }; - - user_led: led-1 { - label = "firefly:blue:user"; - linux,default-trigger = "ir-user-click"; - default-state = "off"; - gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_HIGH>; - }; - }; - - typec_vcc5v: typec-vcc5v { - compatible = "regulator-fixed"; - regulator-name = "typec_vcc5v"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - regulator-always-on; - regulator-boot-on; - }; - - vcc5v0_sys: vcc5v0-sys { - compatible = "regulator-fixed"; - regulator-name = "vcc5v0_sys"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - regulator-always-on; - regulator-boot-on; - vin-supply = <&typec_vcc5v>; - }; - - vcc_io: vcc-io { - compatible = "regulator-fixed"; - regulator-name = "vcc_io"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - regulator-boot-on; - vin-supply = <&vcc5v0_sys>; - }; - - vcc_sdmmc: vcc-sdmmc { - compatible = "regulator-gpio"; - regulator-name = "vcc_sdmmc"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_HIGH>; - states = <1800000 0x0>, - <3300000 0x1>; - vin-supply = <&vcc5v0_sys>; - }; - - vcc_sd: vcc-sd { - compatible = "regulator-fixed"; - gpio = <&gpio4 RK_PD6 GPIO_ACTIVE_LOW>; - regulator-name = "vcc_sd"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - regulator-boot-on; - vin-supply = <&vcc_io>; - }; - - vdd_core: vdd-core { - compatible = "pwm-regulator"; - pwms = <&pwm0 0 5000 1>; - regulator-name = "vdd_core"; - regulator-min-microvolt = <827000>; - regulator-max-microvolt = <1340000>; - regulator-settling-time-up-us = <250>; - regulator-always-on; - regulator-boot-on; - pwm-supply = <&vcc5v0_sys>; - }; - - vdd_log: vdd-log { - compatible = "regulator-fixed"; - regulator-name = "vdd_log"; - regulator-min-microvolt = <1050000>; - regulator-max-microvolt = <1050000>; - regulator-always-on; - regulator-boot-on; - vin-supply = <&vcc5v0_sys>; - }; -}; - -&cpu0 { - cpu-supply = <&vdd_core>; -}; - -&emmc { - cap-mmc-highspeed; - mmc-hs200-1_8v; - non-removable; - status = "okay"; -}; - -&i2c1 { - clock-frequency = <400000>; - status = "okay"; - - rtc: rtc@51 { - compatible = "nxp,pcf8563"; - reg = <0x51>; - #clock-cells = <0>; - }; -}; - -&pwm5 { - status = "okay"; - pinctrl-names = "active"; - pinctrl-0 = <&pwm5_pin_pull_down>; -}; - -&pinctrl { - pinctrl-names = "default"; - pinctrl-0 = <&rtc_32k>; - - ir-receiver { - ir_recv_pin: ir-recv-pin { - rockchip,pins = <0 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - buttons { - pwr_key: pwr-key { - rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; -}; - -&pwm0 { - status = "okay"; - pinctrl-0 = <&pwm0_pin_pull_down>; -}; - -&sdmmc { - cap-mmc-highspeed; - cap-sd-highspeed; - card-detect-delay = <300>; - sd-uhs-sdr25; - sd-uhs-sdr50; - sd-uhs-sdr104; - vmmc-supply = <&vcc_sd>; - vqmmc-supply = <&vcc_sdmmc>; - status = "okay"; -}; - -&uart2 { - status = "okay"; -}; diff --git a/arch/arm/dts/rk3308-rock-pi-s.dts b/arch/arm/dts/rk3308-rock-pi-s.dts deleted file mode 100644 index b47fe02c33f..00000000000 --- a/arch/arm/dts/rk3308-rock-pi-s.dts +++ /dev/null @@ -1,314 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (c) 2019 Akash Gajjar - * Copyright (c) 2019 Jagan Teki - */ - -/dts-v1/; -#include "rk3308.dtsi" - -/ { - model = "Radxa ROCK Pi S"; - compatible = "radxa,rockpis", "rockchip,rk3308"; - - aliases { - ethernet0 = &gmac; - mmc0 = &emmc; - mmc1 = &sdmmc; - }; - - chosen { - stdout-path = "serial0:1500000n8"; - }; - - leds { - compatible = "gpio-leds"; - pinctrl-names = "default"; - pinctrl-0 = <&green_led_gio>, <&heartbeat_led_gpio>; - - green-led { - default-state = "on"; - gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>; - label = "rockpis:green:power"; - linux,default-trigger = "default-on"; - }; - - blue-led { - default-state = "on"; - gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>; - label = "rockpis:blue:user"; - linux,default-trigger = "heartbeat"; - }; - }; - - sdio_pwrseq: sdio-pwrseq { - compatible = "mmc-pwrseq-simple"; - pinctrl-0 = <&wifi_enable_h>; - pinctrl-names = "default"; - reset-gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_LOW>; - }; - - vcc_1v8: vcc-1v8 { - compatible = "regulator-fixed"; - regulator-name = "vcc_1v8"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - vin-supply = <&vcc_io>; - }; - - vcc_io: vcc-io { - compatible = "regulator-fixed"; - regulator-name = "vcc_io"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <&vcc5v0_sys>; - }; - - vcc_ddr: vcc-ddr { - compatible = "regulator-fixed"; - regulator-name = "vcc_ddr"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1500000>; - regulator-max-microvolt = <1500000>; - vin-supply = <&vcc5v0_sys>; - }; - - vcc5v0_otg: vcc5v0-otg { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&otg_vbus_drv>; - regulator-name = "vcc5v0_otg"; - regulator-always-on; - vin-supply = <&vcc5v0_sys>; - }; - - vcc5v0_sys: vcc5v0-sys { - compatible = "regulator-fixed"; - regulator-name = "vcc5v0_sys"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - }; - - vdd_core: vdd-core { - compatible = "pwm-regulator"; - pwms = <&pwm0 0 5000 1>; - pwm-supply = <&vcc5v0_sys>; - regulator-name = "vdd_core"; - regulator-min-microvolt = <827000>; - regulator-max-microvolt = <1340000>; - regulator-settling-time-up-us = <250>; - regulator-always-on; - regulator-boot-on; - }; - - vdd_log: vdd-log { - compatible = "regulator-fixed"; - regulator-name = "vdd_log"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1050000>; - regulator-max-microvolt = <1050000>; - vin-supply = <&vcc5v0_sys>; - }; -}; - -&cpu0 { - cpu-supply = <&vdd_core>; -}; - -&emmc { - bus-width = <4>; - cap-mmc-highspeed; - mmc-hs200-1_8v; - non-removable; - vmmc-supply = <&vcc_io>; - status = "okay"; -}; - -&gmac { - clock_in_out = "output"; - phy-supply = <&vcc_io>; - snps,reset-gpio = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>; - snps,reset-active-low; - snps,reset-delays-us = <0 50000 50000>; - status = "okay"; -}; - -&gpio0 { - gpio-line-names = - /* GPIO0_A0 - A7 */ - "", "", "", "", "", "", "", "", - /* GPIO0_B0 - B7 */ - "", "", "", "header1-pin3 [GPIO0_B3]", - "header1-pin5 [GPIO0_B4]", "", "", - "header1-pin11 [GPIO0_B7]", - /* GPIO0_C0 - C7 */ - "header1-pin13 [GPIO0_C0]", - "header1-pin15 [GPIO0_C1]", "", "", "", - "", "", "", - /* GPIO0_D0 - D7 */ - "", "", "", "", "", "", "", ""; -}; - -&gpio1 { - gpio-line-names = - /* GPIO1_A0 - A7 */ - "", "", "", "", "", "", "", "", - /* GPIO1_B0 - B7 */ - "", "", "", "", "", "", "", "", - /* GPIO1_C0 - C7 */ - "", "", "", "", "", "", "header1-pin21 [GPIO1_C6]", - "header1-pin19 [GPIO1_C7]", - /* GPIO1_D0 - D7 */ - "header1-pin23 [GPIO1_D0]", "header1-pin24 [GPIO1_D1]", - "", "", "", "", "", ""; -}; - -&gpio2 { - gpio-line-names = - /* GPIO2_A0 - A7 */ - "header1-pin10 [GPIO2_A0]", "header1-pin8 [GPIO2_A1]", - "", "", - "header1-pin7 [GPIO2_A4]", "header1-pin12 [GPIO2_A5]", - "header2-pin46 [GPIO2_A6]", "header1-pin22 [GPIO1_A7]", - /* GPIO2_B0 - B7 */ - "header2-pin45 [GPIO2_B0]", "header1-pin18 [GPIO2_B1]", - "header1-pin16 [GPIO2_B2]", "header2-pin44 [GPIO2_B3]", - "header2-pin43 [GPIO2_B4]", "header2-pin28 [GPIO2_B5]", - "header2-pin30 [GPIO2_B6]", "header2-pin32 [GPIO2_B7]", - /* GPIO2_C0 - C7 */ - "header2-pin34 [GPIO2_C0]", "", "", "", "", "", "", "", - /* GPIO2_D0 - D7 */ - "", "", "", "", "", "", "", ""; -}; - -&gpio3 { - gpio-line-names = - /* GPIO3_A0 - A7 */ - "", "", "", "", "", "", "", "", - /* GPIO3_B0 - B7 */ - "", "", "header2-pin42 [GPIO3_B2]", - "header2-pin41 [GPIO3_B3]", "header2-pin40 [GPIO3_B4]", - "header2-pin39 [GPIO3_B5]", "", "", - /* GPIO3_C0 - C7 */ - "", "", "", "", "", "", "", "", - /* GPIO3_D0 - D7 */ - "", "", "", "", "", "", "", ""; -}; - -&i2c1 { - status = "okay"; -}; - -&pinctrl { - pinctrl-names = "default"; - pinctrl-0 = <&rtc_32k>; - - leds { - green_led_gio: green-led-gpio { - rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - heartbeat_led_gpio: heartbeat-led-gpio { - rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - usb { - otg_vbus_drv: otg-vbus-drv { - rockchip,pins = <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - sdio-pwrseq { - wifi_enable_h: wifi-enable-h { - rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - wifi_host_wake: wifi-host-wake { - rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_down>; - }; - }; -}; - -&pwm0 { - status = "okay"; - pinctrl-0 = <&pwm0_pin_pull_down>; -}; - -&saradc { - vref-supply = <&vcc_1v8>; - status = "okay"; -}; - -&sdio { - #address-cells = <1>; - #size-cells = <0>; - cap-sd-highspeed; - cap-sdio-irq; - keep-power-in-suspend; - max-frequency = <1000000>; - mmc-pwrseq = <&sdio_pwrseq>; - non-removable; - sd-uhs-sdr104; - status = "okay"; -}; - -&sdmmc { - cap-sd-highspeed; - status = "okay"; -}; - -&u2phy { - status = "okay"; - - u2phy_host: host-port { - phy-supply = <&vcc5v0_otg>; - status = "okay"; - }; - - u2phy_otg: otg-port { - phy-supply = <&vcc5v0_otg>; - status = "okay"; - }; -}; - -&uart0 { - status = "okay"; -}; - -&uart4 { - status = "okay"; - - bluetooth { - compatible = "realtek,rtl8723bs-bt"; - device-wake-gpios = <&gpio4 RK_PB3 GPIO_ACTIVE_HIGH>; - host-wake-gpios = <&gpio4 RK_PB4 GPIO_ACTIVE_HIGH>; - }; -}; - -&usb_host_ehci { - status = "okay"; -}; - -&usb_host_ohci { - status = "okay"; -}; - -&usb20_otg { - dr_mode = "peripheral"; - status = "okay"; -}; - -&wdt { - status = "okay"; -}; diff --git a/arch/arm/dts/rk3308.dtsi b/arch/arm/dts/rk3308.dtsi deleted file mode 100644 index cfc0a87b519..00000000000 --- a/arch/arm/dts/rk3308.dtsi +++ /dev/null @@ -1,1888 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd - * - */ - -#include -#include -#include -#include -#include -#include -#include - -/ { - compatible = "rockchip,rk3308"; - - interrupt-parent = <&gic>; - #address-cells = <2>; - #size-cells = <2>; - - aliases { - gpio0 = &gpio0; - gpio1 = &gpio1; - gpio2 = &gpio2; - gpio3 = &gpio3; - gpio4 = &gpio4; - i2c0 = &i2c0; - i2c1 = &i2c1; - i2c2 = &i2c2; - i2c3 = &i2c3; - serial0 = &uart0; - serial1 = &uart1; - serial2 = &uart2; - serial3 = &uart3; - serial4 = &uart4; - spi0 = &spi0; - spi1 = &spi1; - spi2 = &spi2; - }; - - cpus { - #address-cells = <2>; - #size-cells = <0>; - - cpu0: cpu@0 { - device_type = "cpu"; - compatible = "arm,cortex-a35"; - reg = <0x0 0x0>; - enable-method = "psci"; - clocks = <&cru ARMCLK>; - #cooling-cells = <2>; - dynamic-power-coefficient = <90>; - operating-points-v2 = <&cpu0_opp_table>; - cpu-idle-states = <&CPU_SLEEP>; - next-level-cache = <&l2>; - }; - - cpu1: cpu@1 { - device_type = "cpu"; - compatible = "arm,cortex-a35"; - reg = <0x0 0x1>; - enable-method = "psci"; - operating-points-v2 = <&cpu0_opp_table>; - cpu-idle-states = <&CPU_SLEEP>; - next-level-cache = <&l2>; - }; - - cpu2: cpu@2 { - device_type = "cpu"; - compatible = "arm,cortex-a35"; - reg = <0x0 0x2>; - enable-method = "psci"; - operating-points-v2 = <&cpu0_opp_table>; - cpu-idle-states = <&CPU_SLEEP>; - next-level-cache = <&l2>; - }; - - cpu3: cpu@3 { - device_type = "cpu"; - compatible = "arm,cortex-a35"; - reg = <0x0 0x3>; - enable-method = "psci"; - operating-points-v2 = <&cpu0_opp_table>; - cpu-idle-states = <&CPU_SLEEP>; - next-level-cache = <&l2>; - }; - - idle-states { - entry-method = "psci"; - - CPU_SLEEP: cpu-sleep { - compatible = "arm,idle-state"; - local-timer-stop; - arm,psci-suspend-param = <0x0010000>; - entry-latency-us = <120>; - exit-latency-us = <250>; - min-residency-us = <900>; - }; - }; - - l2: l2-cache { - compatible = "cache"; - cache-level = <2>; - cache-unified; - }; - }; - - cpu0_opp_table: opp-table-0 { - compatible = "operating-points-v2"; - opp-shared; - - opp-408000000 { - opp-hz = /bits/ 64 <408000000>; - opp-microvolt = <950000 950000 1340000>; - clock-latency-ns = <40000>; - opp-suspend; - }; - opp-600000000 { - opp-hz = /bits/ 64 <600000000>; - opp-microvolt = <950000 950000 1340000>; - clock-latency-ns = <40000>; - }; - opp-816000000 { - opp-hz = /bits/ 64 <816000000>; - opp-microvolt = <1025000 1025000 1340000>; - clock-latency-ns = <40000>; - }; - opp-1008000000 { - opp-hz = /bits/ 64 <1008000000>; - opp-microvolt = <1125000 1125000 1340000>; - clock-latency-ns = <40000>; - }; - }; - - arm-pmu { - compatible = "arm,cortex-a35-pmu"; - interrupts = , - , - , - ; - interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; - }; - - mac_clkin: external-mac-clock { - compatible = "fixed-clock"; - clock-frequency = <50000000>; - clock-output-names = "mac_clkin"; - #clock-cells = <0>; - }; - - psci { - compatible = "arm,psci-1.0"; - method = "smc"; - }; - - timer { - compatible = "arm,armv8-timer"; - interrupts = , - , - , - ; - }; - - xin24m: xin24m { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <24000000>; - clock-output-names = "xin24m"; - }; - - grf: grf@ff000000 { - compatible = "rockchip,rk3308-grf", "syscon", "simple-mfd"; - reg = <0x0 0xff000000 0x0 0x08000>; - - reboot-mode { - compatible = "syscon-reboot-mode"; - offset = <0x500>; - mode-bootloader = ; - mode-loader = ; - mode-normal = ; - mode-recovery = ; - mode-fastboot = ; - }; - }; - - usb2phy_grf: syscon@ff008000 { - compatible = "rockchip,rk3308-usb2phy-grf", "syscon", "simple-mfd"; - reg = <0x0 0xff008000 0x0 0x4000>; - #address-cells = <1>; - #size-cells = <1>; - - u2phy: usb2phy@100 { - compatible = "rockchip,rk3308-usb2phy"; - reg = <0x100 0x10>; - assigned-clocks = <&cru USB480M>; - assigned-clock-parents = <&u2phy>; - clocks = <&cru SCLK_USBPHY_REF>; - clock-names = "phyclk"; - clock-output-names = "usb480m_phy"; - #clock-cells = <0>; - status = "disabled"; - - u2phy_otg: otg-port { - interrupts = , - , - ; - interrupt-names = "otg-bvalid", "otg-id", - "linestate"; - #phy-cells = <0>; - status = "disabled"; - }; - - u2phy_host: host-port { - interrupts = ; - interrupt-names = "linestate"; - #phy-cells = <0>; - status = "disabled"; - }; - }; - }; - - detect_grf: syscon@ff00b000 { - compatible = "rockchip,rk3308-detect-grf", "syscon", "simple-mfd"; - reg = <0x0 0xff00b000 0x0 0x1000>; - #address-cells = <1>; - #size-cells = <1>; - }; - - core_grf: syscon@ff00c000 { - compatible = "rockchip,rk3308-core-grf", "syscon", "simple-mfd"; - reg = <0x0 0xff00c000 0x0 0x1000>; - #address-cells = <1>; - #size-cells = <1>; - }; - - i2c0: i2c@ff040000 { - compatible = "rockchip,rk3308-i2c", "rockchip,rk3399-i2c"; - reg = <0x0 0xff040000 0x0 0x1000>; - clocks = <&cru SCLK_I2C0>, <&cru PCLK_I2C0>; - clock-names = "i2c", "pclk"; - interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&i2c0_xfer>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - i2c1: i2c@ff050000 { - compatible = "rockchip,rk3308-i2c", "rockchip,rk3399-i2c"; - reg = <0x0 0xff050000 0x0 0x1000>; - clocks = <&cru SCLK_I2C1>, <&cru PCLK_I2C1>; - clock-names = "i2c", "pclk"; - interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&i2c1_xfer>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - i2c2: i2c@ff060000 { - compatible = "rockchip,rk3308-i2c", "rockchip,rk3399-i2c"; - reg = <0x0 0xff060000 0x0 0x1000>; - clocks = <&cru SCLK_I2C2>, <&cru PCLK_I2C2>; - clock-names = "i2c", "pclk"; - interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&i2c2_xfer>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - i2c3: i2c@ff070000 { - compatible = "rockchip,rk3308-i2c", "rockchip,rk3399-i2c"; - reg = <0x0 0xff070000 0x0 0x1000>; - clocks = <&cru SCLK_I2C3>, <&cru PCLK_I2C3>; - clock-names = "i2c", "pclk"; - interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&i2c3m0_xfer>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - wdt: watchdog@ff080000 { - compatible = "rockchip,rk3308-wdt", "snps,dw-wdt"; - reg = <0x0 0xff080000 0x0 0x100>; - clocks = <&cru PCLK_WDT>; - interrupts = ; - status = "disabled"; - }; - - uart0: serial@ff0a0000 { - compatible = "rockchip,rk3308-uart", "snps,dw-apb-uart"; - reg = <0x0 0xff0a0000 0x0 0x100>; - interrupts = ; - clocks = <&cru SCLK_UART0>, <&cru PCLK_UART0>; - clock-names = "baudclk", "apb_pclk"; - reg-shift = <2>; - reg-io-width = <4>; - pinctrl-names = "default"; - pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>; - status = "disabled"; - }; - - uart1: serial@ff0b0000 { - compatible = "rockchip,rk3308-uart", "snps,dw-apb-uart"; - reg = <0x0 0xff0b0000 0x0 0x100>; - interrupts = ; - clocks = <&cru SCLK_UART1>, <&cru PCLK_UART1>; - clock-names = "baudclk", "apb_pclk"; - reg-shift = <2>; - reg-io-width = <4>; - pinctrl-names = "default"; - pinctrl-0 = <&uart1_xfer &uart1_cts &uart1_rts>; - status = "disabled"; - }; - - uart2: serial@ff0c0000 { - compatible = "rockchip,rk3308-uart", "snps,dw-apb-uart"; - reg = <0x0 0xff0c0000 0x0 0x100>; - interrupts = ; - clocks = <&cru SCLK_UART2>, <&cru PCLK_UART2>; - clock-names = "baudclk", "apb_pclk"; - reg-shift = <2>; - reg-io-width = <4>; - pinctrl-names = "default"; - pinctrl-0 = <&uart2m0_xfer>; - status = "disabled"; - }; - - uart3: serial@ff0d0000 { - compatible = "rockchip,rk3308-uart", "snps,dw-apb-uart"; - reg = <0x0 0xff0d0000 0x0 0x100>; - interrupts = ; - clocks = <&cru SCLK_UART3>, <&cru PCLK_UART3>; - clock-names = "baudclk", "apb_pclk"; - reg-shift = <2>; - reg-io-width = <4>; - pinctrl-names = "default"; - pinctrl-0 = <&uart3_xfer>; - status = "disabled"; - }; - - uart4: serial@ff0e0000 { - compatible = "rockchip,rk3308-uart", "snps,dw-apb-uart"; - reg = <0x0 0xff0e0000 0x0 0x100>; - interrupts = ; - clocks = <&cru SCLK_UART4>, <&cru PCLK_UART4>; - clock-names = "baudclk", "apb_pclk"; - reg-shift = <2>; - reg-io-width = <4>; - pinctrl-names = "default"; - pinctrl-0 = <&uart4_xfer &uart4_cts &uart4_rts>; - status = "disabled"; - }; - - spi0: spi@ff120000 { - compatible = "rockchip,rk3308-spi", "rockchip,rk3066-spi"; - reg = <0x0 0xff120000 0x0 0x1000>; - interrupts = ; - #address-cells = <1>; - #size-cells = <0>; - clocks = <&cru SCLK_SPI0>, <&cru PCLK_SPI0>; - clock-names = "spiclk", "apb_pclk"; - dmas = <&dmac0 0>, <&dmac0 1>; - dma-names = "tx", "rx"; - pinctrl-names = "default"; - pinctrl-0 = <&spi0_clk &spi0_csn0 &spi0_miso &spi0_mosi>; - status = "disabled"; - }; - - spi1: spi@ff130000 { - compatible = "rockchip,rk3308-spi", "rockchip,rk3066-spi"; - reg = <0x0 0xff130000 0x0 0x1000>; - interrupts = ; - #address-cells = <1>; - #size-cells = <0>; - clocks = <&cru SCLK_SPI1>, <&cru PCLK_SPI1>; - clock-names = "spiclk", "apb_pclk"; - dmas = <&dmac0 2>, <&dmac0 3>; - dma-names = "tx", "rx"; - pinctrl-names = "default"; - pinctrl-0 = <&spi1_clk &spi1_csn0 &spi1_miso &spi1_mosi>; - status = "disabled"; - }; - - spi2: spi@ff140000 { - compatible = "rockchip,rk3308-spi", "rockchip,rk3066-spi"; - reg = <0x0 0xff140000 0x0 0x1000>; - interrupts = ; - #address-cells = <1>; - #size-cells = <0>; - clocks = <&cru SCLK_SPI2>, <&cru PCLK_SPI2>; - clock-names = "spiclk", "apb_pclk"; - dmas = <&dmac1 16>, <&dmac1 17>; - dma-names = "tx", "rx"; - pinctrl-names = "default"; - pinctrl-0 = <&spi2_clk &spi2_csn0 &spi2_miso &spi2_mosi>; - status = "disabled"; - }; - - pwm8: pwm@ff160000 { - compatible = "rockchip,rk3308-pwm", "rockchip,rk3328-pwm"; - reg = <0x0 0xff160000 0x0 0x10>; - clocks = <&cru SCLK_PWM2>, <&cru PCLK_PWM2>; - clock-names = "pwm", "pclk"; - pinctrl-names = "default"; - pinctrl-0 = <&pwm8_pin>; - #pwm-cells = <3>; - status = "disabled"; - }; - - pwm9: pwm@ff160010 { - compatible = "rockchip,rk3308-pwm", "rockchip,rk3328-pwm"; - reg = <0x0 0xff160010 0x0 0x10>; - clocks = <&cru SCLK_PWM2>, <&cru PCLK_PWM2>; - clock-names = "pwm", "pclk"; - pinctrl-names = "default"; - pinctrl-0 = <&pwm9_pin>; - #pwm-cells = <3>; - status = "disabled"; - }; - - pwm10: pwm@ff160020 { - compatible = "rockchip,rk3308-pwm", "rockchip,rk3328-pwm"; - reg = <0x0 0xff160020 0x0 0x10>; - clocks = <&cru SCLK_PWM2>, <&cru PCLK_PWM2>; - clock-names = "pwm", "pclk"; - pinctrl-names = "default"; - pinctrl-0 = <&pwm10_pin>; - #pwm-cells = <3>; - status = "disabled"; - }; - - pwm11: pwm@ff160030 { - compatible = "rockchip,rk3308-pwm", "rockchip,rk3328-pwm"; - reg = <0x0 0xff160030 0x0 0x10>; - clocks = <&cru SCLK_PWM2>, <&cru PCLK_PWM2>; - clock-names = "pwm", "pclk"; - pinctrl-names = "default"; - pinctrl-0 = <&pwm11_pin>; - #pwm-cells = <3>; - status = "disabled"; - }; - - pwm4: pwm@ff170000 { - compatible = "rockchip,rk3308-pwm", "rockchip,rk3328-pwm"; - reg = <0x0 0xff170000 0x0 0x10>; - clocks = <&cru SCLK_PWM1>, <&cru PCLK_PWM1>; - clock-names = "pwm", "pclk"; - pinctrl-names = "default"; - pinctrl-0 = <&pwm4_pin>; - #pwm-cells = <3>; - status = "disabled"; - }; - - pwm5: pwm@ff170010 { - compatible = "rockchip,rk3308-pwm", "rockchip,rk3328-pwm"; - reg = <0x0 0xff170010 0x0 0x10>; - clocks = <&cru SCLK_PWM1>, <&cru PCLK_PWM1>; - clock-names = "pwm", "pclk"; - pinctrl-names = "default"; - pinctrl-0 = <&pwm5_pin>; - #pwm-cells = <3>; - status = "disabled"; - }; - - pwm6: pwm@ff170020 { - compatible = "rockchip,rk3308-pwm", "rockchip,rk3328-pwm"; - reg = <0x0 0xff170020 0x0 0x10>; - clocks = <&cru SCLK_PWM1>, <&cru PCLK_PWM1>; - clock-names = "pwm", "pclk"; - pinctrl-names = "default"; - pinctrl-0 = <&pwm6_pin>; - #pwm-cells = <3>; - status = "disabled"; - }; - - pwm7: pwm@ff170030 { - compatible = "rockchip,rk3308-pwm", "rockchip,rk3328-pwm"; - reg = <0x0 0xff170030 0x0 0x10>; - clocks = <&cru SCLK_PWM1>, <&cru PCLK_PWM1>; - clock-names = "pwm", "pclk"; - pinctrl-names = "default"; - pinctrl-0 = <&pwm7_pin>; - #pwm-cells = <3>; - status = "disabled"; - }; - - pwm0: pwm@ff180000 { - compatible = "rockchip,rk3308-pwm", "rockchip,rk3328-pwm"; - reg = <0x0 0xff180000 0x0 0x10>; - clocks = <&cru SCLK_PWM0>, <&cru PCLK_PWM0>; - clock-names = "pwm", "pclk"; - pinctrl-names = "default"; - pinctrl-0 = <&pwm0_pin>; - #pwm-cells = <3>; - status = "disabled"; - }; - - pwm1: pwm@ff180010 { - compatible = "rockchip,rk3308-pwm", "rockchip,rk3328-pwm"; - reg = <0x0 0xff180010 0x0 0x10>; - clocks = <&cru SCLK_PWM0>, <&cru PCLK_PWM0>; - clock-names = "pwm", "pclk"; - pinctrl-names = "default"; - pinctrl-0 = <&pwm1_pin>; - #pwm-cells = <3>; - status = "disabled"; - }; - - pwm2: pwm@ff180020 { - compatible = "rockchip,rk3308-pwm", "rockchip,rk3328-pwm"; - reg = <0x0 0xff180020 0x0 0x10>; - clocks = <&cru SCLK_PWM0>, <&cru PCLK_PWM0>; - clock-names = "pwm", "pclk"; - pinctrl-names = "default"; - pinctrl-0 = <&pwm2_pin>; - #pwm-cells = <3>; - status = "disabled"; - }; - - pwm3: pwm@ff180030 { - compatible = "rockchip,rk3308-pwm", "rockchip,rk3328-pwm"; - reg = <0x0 0xff180030 0x0 0x10>; - clocks = <&cru SCLK_PWM0>, <&cru PCLK_PWM0>; - clock-names = "pwm", "pclk"; - pinctrl-names = "default"; - pinctrl-0 = <&pwm3_pin>; - #pwm-cells = <3>; - status = "disabled"; - }; - - rktimer: rktimer@ff1a0000 { - compatible = "rockchip,rk3288-timer"; - reg = <0x0 0xff1a0000 0x0 0x20>; - interrupts = ; - clocks = <&cru PCLK_TIMER>, <&cru SCLK_TIMER0>; - clock-names = "pclk", "timer"; - }; - - saradc: saradc@ff1e0000 { - compatible = "rockchip,rk3308-saradc", "rockchip,rk3399-saradc"; - reg = <0x0 0xff1e0000 0x0 0x100>; - interrupts = ; - clocks = <&cru SCLK_SARADC>, <&cru PCLK_SARADC>; - clock-names = "saradc", "apb_pclk"; - #io-channel-cells = <1>; - resets = <&cru SRST_SARADC_P>; - reset-names = "saradc-apb"; - status = "disabled"; - }; - - dmac0: dma-controller@ff2c0000 { - compatible = "arm,pl330", "arm,primecell"; - reg = <0x0 0xff2c0000 0x0 0x4000>; - interrupts = , - ; - arm,pl330-periph-burst; - clocks = <&cru ACLK_DMAC0>; - clock-names = "apb_pclk"; - #dma-cells = <1>; - }; - - dmac1: dma-controller@ff2d0000 { - compatible = "arm,pl330", "arm,primecell"; - reg = <0x0 0xff2d0000 0x0 0x4000>; - interrupts = , - ; - arm,pl330-periph-burst; - clocks = <&cru ACLK_DMAC1>; - clock-names = "apb_pclk"; - #dma-cells = <1>; - }; - - i2s_2ch_0: i2s@ff350000 { - compatible = "rockchip,rk3308-i2s", "rockchip,rk3066-i2s"; - reg = <0x0 0xff350000 0x0 0x1000>; - interrupts = ; - clocks = <&cru SCLK_I2S0_2CH>, <&cru HCLK_I2S0_2CH>; - clock-names = "i2s_clk", "i2s_hclk"; - dmas = <&dmac1 8>, <&dmac1 9>; - dma-names = "tx", "rx"; - resets = <&cru SRST_I2S0_2CH_M>, <&cru SRST_I2S0_2CH_H>; - reset-names = "reset-m", "reset-h"; - pinctrl-names = "default"; - pinctrl-0 = <&i2s_2ch_0_sclk - &i2s_2ch_0_lrck - &i2s_2ch_0_sdi - &i2s_2ch_0_sdo>; - status = "disabled"; - }; - - i2s_2ch_1: i2s@ff360000 { - compatible = "rockchip,rk3308-i2s", "rockchip,rk3066-i2s"; - reg = <0x0 0xff360000 0x0 0x1000>; - interrupts = ; - clocks = <&cru SCLK_I2S1_2CH>, <&cru HCLK_I2S1_2CH>; - clock-names = "i2s_clk", "i2s_hclk"; - dmas = <&dmac1 11>; - dma-names = "rx"; - resets = <&cru SRST_I2S1_2CH_M>, <&cru SRST_I2S1_2CH_H>; - reset-names = "reset-m", "reset-h"; - status = "disabled"; - }; - - spdif_tx: spdif-tx@ff3a0000 { - compatible = "rockchip,rk3308-spdif", "rockchip,rk3066-spdif"; - reg = <0x0 0xff3a0000 0x0 0x1000>; - interrupts = ; - clocks = <&cru SCLK_SPDIF_TX>, <&cru HCLK_SPDIFTX>; - clock-names = "mclk", "hclk"; - dmas = <&dmac1 13>; - dma-names = "tx"; - pinctrl-names = "default"; - pinctrl-0 = <&spdif_out>; - status = "disabled"; - }; - - usb20_otg: usb@ff400000 { - compatible = "rockchip,rk3308-usb", "rockchip,rk3066-usb", - "snps,dwc2"; - reg = <0x0 0xff400000 0x0 0x40000>; - interrupts = ; - clocks = <&cru HCLK_OTG>; - clock-names = "otg"; - dr_mode = "otg"; - g-np-tx-fifo-size = <16>; - g-rx-fifo-size = <280>; - g-tx-fifo-size = <256 128 128 64 32 16>; - phys = <&u2phy_otg>; - phy-names = "usb2-phy"; - status = "disabled"; - }; - - usb_host_ehci: usb@ff440000 { - compatible = "generic-ehci"; - reg = <0x0 0xff440000 0x0 0x10000>; - interrupts = ; - clocks = <&cru HCLK_HOST>, <&cru HCLK_HOST_ARB>, <&u2phy>; - phys = <&u2phy_host>; - phy-names = "usb"; - status = "disabled"; - }; - - usb_host_ohci: usb@ff450000 { - compatible = "generic-ohci"; - reg = <0x0 0xff450000 0x0 0x10000>; - interrupts = ; - clocks = <&cru HCLK_HOST>, <&cru HCLK_HOST_ARB>, <&u2phy>; - phys = <&u2phy_host>; - phy-names = "usb"; - status = "disabled"; - }; - - sdmmc: mmc@ff480000 { - compatible = "rockchip,rk3308-dw-mshc", "rockchip,rk3288-dw-mshc"; - reg = <0x0 0xff480000 0x0 0x4000>; - interrupts = ; - bus-width = <4>; - clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>, - <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>; - clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; - fifo-depth = <0x100>; - max-frequency = <150000000>; - pinctrl-names = "default"; - pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_det &sdmmc_bus4>; - status = "disabled"; - }; - - emmc: mmc@ff490000 { - compatible = "rockchip,rk3308-dw-mshc", "rockchip,rk3288-dw-mshc"; - reg = <0x0 0xff490000 0x0 0x4000>; - interrupts = ; - bus-width = <8>; - clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>, - <&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>; - clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; - fifo-depth = <0x100>; - max-frequency = <150000000>; - status = "disabled"; - }; - - sdio: mmc@ff4a0000 { - compatible = "rockchip,rk3308-dw-mshc", "rockchip,rk3288-dw-mshc"; - reg = <0x0 0xff4a0000 0x0 0x4000>; - interrupts = ; - bus-width = <4>; - clocks = <&cru HCLK_SDIO>, <&cru SCLK_SDIO>, - <&cru SCLK_SDIO_DRV>, <&cru SCLK_SDIO_SAMPLE>; - clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; - fifo-depth = <0x100>; - max-frequency = <150000000>; - pinctrl-names = "default"; - pinctrl-0 = <&sdio_bus4 &sdio_cmd &sdio_clk>; - status = "disabled"; - }; - - nfc: nand-controller@ff4b0000 { - compatible = "rockchip,rk3308-nfc", - "rockchip,rv1108-nfc"; - reg = <0x0 0xff4b0000 0x0 0x4000>; - interrupts = ; - clocks = <&cru HCLK_NANDC>, <&cru SCLK_NANDC>; - clock-names = "ahb", "nfc"; - assigned-clocks = <&cru SCLK_NANDC>; - assigned-clock-rates = <150000000>; - pinctrl-0 = <&flash_ale &flash_bus8 &flash_cle &flash_csn0 - &flash_rdn &flash_rdy &flash_wrn>; - pinctrl-names = "default"; - status = "disabled"; - }; - - gmac: ethernet@ff4e0000 { - compatible = "rockchip,rk3308-gmac"; - reg = <0x0 0xff4e0000 0x0 0x10000>; - interrupts = ; - interrupt-names = "macirq"; - clocks = <&cru SCLK_MAC>, <&cru SCLK_MAC_RX_TX>, - <&cru SCLK_MAC_RX_TX>, <&cru SCLK_MAC_REF>, - <&cru SCLK_MAC>, <&cru ACLK_MAC>, - <&cru PCLK_MAC>, <&cru SCLK_MAC_RMII>; - clock-names = "stmmaceth", "mac_clk_rx", - "mac_clk_tx", "clk_mac_ref", - "clk_mac_refout", "aclk_mac", - "pclk_mac", "clk_mac_speed"; - phy-mode = "rmii"; - pinctrl-names = "default"; - pinctrl-0 = <&rmii_pins &mac_refclk_12ma>; - resets = <&cru SRST_MAC_A>; - reset-names = "stmmaceth"; - rockchip,grf = <&grf>; - status = "disabled"; - }; - - sfc: spi@ff4c0000 { - compatible = "rockchip,sfc"; - reg = <0x0 0xff4c0000 0x0 0x4000>; - interrupts = ; - clocks = <&cru SCLK_SFC>, <&cru HCLK_SFC>; - clock-names = "clk_sfc", "hclk_sfc"; - pinctrl-0 = <&sfc_clk &sfc_cs0 &sfc_bus4>; - pinctrl-names = "default"; - status = "disabled"; - }; - - cru: clock-controller@ff500000 { - compatible = "rockchip,rk3308-cru"; - reg = <0x0 0xff500000 0x0 0x1000>; - clocks = <&xin24m>; - clock-names = "xin24m"; - rockchip,grf = <&grf>; - #clock-cells = <1>; - #reset-cells = <1>; - assigned-clocks = <&cru SCLK_RTC32K>; - assigned-clock-rates = <32768>; - }; - - gic: interrupt-controller@ff580000 { - compatible = "arm,gic-400"; - reg = <0x0 0xff581000 0x0 0x1000>, - <0x0 0xff582000 0x0 0x2000>, - <0x0 0xff584000 0x0 0x2000>, - <0x0 0xff586000 0x0 0x2000>; - interrupts = ; - #interrupt-cells = <3>; - interrupt-controller; - #address-cells = <0>; - }; - - sram: sram@fff80000 { - compatible = "mmio-sram"; - reg = <0x0 0xfff80000 0x0 0x40000>; - ranges = <0 0x0 0xfff80000 0x40000>; - #address-cells = <1>; - #size-cells = <1>; - - /* reserved for ddr dvfs and system suspend/resume */ - ddr-sram@0 { - reg = <0x0 0x8000>; - }; - - /* reserved for vad audio buffer */ - vad_sram: vad-sram@8000 { - reg = <0x8000 0x38000>; - }; - }; - - pinctrl: pinctrl { - compatible = "rockchip,rk3308-pinctrl"; - rockchip,grf = <&grf>; - #address-cells = <2>; - #size-cells = <2>; - ranges; - - gpio0: gpio@ff220000 { - compatible = "rockchip,gpio-bank"; - reg = <0x0 0xff220000 0x0 0x100>; - interrupts = ; - clocks = <&cru PCLK_GPIO0>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpio1: gpio@ff230000 { - compatible = "rockchip,gpio-bank"; - reg = <0x0 0xff230000 0x0 0x100>; - interrupts = ; - clocks = <&cru PCLK_GPIO1>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpio2: gpio@ff240000 { - compatible = "rockchip,gpio-bank"; - reg = <0x0 0xff240000 0x0 0x100>; - interrupts = ; - clocks = <&cru PCLK_GPIO2>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpio3: gpio@ff250000 { - compatible = "rockchip,gpio-bank"; - reg = <0x0 0xff250000 0x0 0x100>; - interrupts = ; - clocks = <&cru PCLK_GPIO3>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpio4: gpio@ff260000 { - compatible = "rockchip,gpio-bank"; - reg = <0x0 0xff260000 0x0 0x100>; - interrupts = ; - clocks = <&cru PCLK_GPIO4>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - }; - - pcfg_pull_up: pcfg-pull-up { - bias-pull-up; - }; - - pcfg_pull_down: pcfg-pull-down { - bias-pull-down; - }; - - pcfg_pull_none: pcfg-pull-none { - bias-disable; - }; - - pcfg_pull_none_2ma: pcfg-pull-none-2ma { - bias-disable; - drive-strength = <2>; - }; - - pcfg_pull_up_2ma: pcfg-pull-up-2ma { - bias-pull-up; - drive-strength = <2>; - }; - - pcfg_pull_up_4ma: pcfg-pull-up-4ma { - bias-pull-up; - drive-strength = <4>; - }; - - pcfg_pull_none_4ma: pcfg-pull-none-4ma { - bias-disable; - drive-strength = <4>; - }; - - pcfg_pull_down_4ma: pcfg-pull-down-4ma { - bias-pull-down; - drive-strength = <4>; - }; - - pcfg_pull_none_8ma: pcfg-pull-none-8ma { - bias-disable; - drive-strength = <8>; - }; - - pcfg_pull_up_8ma: pcfg-pull-up-8ma { - bias-pull-up; - drive-strength = <8>; - }; - - pcfg_pull_none_12ma: pcfg-pull-none-12ma { - bias-disable; - drive-strength = <12>; - }; - - pcfg_pull_up_12ma: pcfg-pull-up-12ma { - bias-pull-up; - drive-strength = <12>; - }; - - pcfg_pull_none_smt: pcfg-pull-none-smt { - bias-disable; - input-schmitt-enable; - }; - - pcfg_output_high: pcfg-output-high { - output-high; - }; - - pcfg_output_low: pcfg-output-low { - output-low; - }; - - pcfg_input_high: pcfg-input-high { - bias-pull-up; - input-enable; - }; - - pcfg_input: pcfg-input { - input-enable; - }; - - emmc { - emmc_clk: emmc-clk { - rockchip,pins = - <3 RK_PB1 2 &pcfg_pull_none_8ma>; - }; - - emmc_cmd: emmc-cmd { - rockchip,pins = - <3 RK_PB0 2 &pcfg_pull_up_8ma>; - }; - - emmc_pwren: emmc-pwren { - rockchip,pins = - <3 RK_PB3 2 &pcfg_pull_none>; - }; - - emmc_rstn: emmc-rstn { - rockchip,pins = - <3 RK_PB2 2 &pcfg_pull_none>; - }; - - emmc_bus1: emmc-bus1 { - rockchip,pins = - <3 RK_PA0 2 &pcfg_pull_up_8ma>; - }; - - emmc_bus4: emmc-bus4 { - rockchip,pins = - <3 RK_PA0 2 &pcfg_pull_up_8ma>, - <3 RK_PA1 2 &pcfg_pull_up_8ma>, - <3 RK_PA2 2 &pcfg_pull_up_8ma>, - <3 RK_PA3 2 &pcfg_pull_up_8ma>; - }; - - emmc_bus8: emmc-bus8 { - rockchip,pins = - <3 RK_PA0 2 &pcfg_pull_up_8ma>, - <3 RK_PA1 2 &pcfg_pull_up_8ma>, - <3 RK_PA2 2 &pcfg_pull_up_8ma>, - <3 RK_PA3 2 &pcfg_pull_up_8ma>, - <3 RK_PA4 2 &pcfg_pull_up_8ma>, - <3 RK_PA5 2 &pcfg_pull_up_8ma>, - <3 RK_PA6 2 &pcfg_pull_up_8ma>, - <3 RK_PA7 2 &pcfg_pull_up_8ma>; - }; - }; - - flash { - flash_csn0: flash-csn0 { - rockchip,pins = - <3 RK_PB5 1 &pcfg_pull_none>; - }; - - flash_rdy: flash-rdy { - rockchip,pins = - <3 RK_PB4 1 &pcfg_pull_none>; - }; - - flash_ale: flash-ale { - rockchip,pins = - <3 RK_PB3 1 &pcfg_pull_none>; - }; - - flash_cle: flash-cle { - rockchip,pins = - <3 RK_PB1 1 &pcfg_pull_none>; - }; - - flash_wrn: flash-wrn { - rockchip,pins = - <3 RK_PB0 1 &pcfg_pull_none>; - }; - - flash_rdn: flash-rdn { - rockchip,pins = - <3 RK_PB2 1 &pcfg_pull_none>; - }; - - flash_bus8: flash-bus8 { - rockchip,pins = - <3 RK_PA0 1 &pcfg_pull_up_12ma>, - <3 RK_PA1 1 &pcfg_pull_up_12ma>, - <3 RK_PA2 1 &pcfg_pull_up_12ma>, - <3 RK_PA3 1 &pcfg_pull_up_12ma>, - <3 RK_PA4 1 &pcfg_pull_up_12ma>, - <3 RK_PA5 1 &pcfg_pull_up_12ma>, - <3 RK_PA6 1 &pcfg_pull_up_12ma>, - <3 RK_PA7 1 &pcfg_pull_up_12ma>; - }; - }; - - sfc { - sfc_bus4: sfc-bus4 { - rockchip,pins = - <3 RK_PA0 3 &pcfg_pull_none>, - <3 RK_PA1 3 &pcfg_pull_none>, - <3 RK_PA2 3 &pcfg_pull_none>, - <3 RK_PA3 3 &pcfg_pull_none>; - }; - - sfc_bus2: sfc-bus2 { - rockchip,pins = - <3 RK_PA0 3 &pcfg_pull_none>, - <3 RK_PA1 3 &pcfg_pull_none>; - }; - - sfc_cs0: sfc-cs0 { - rockchip,pins = - <3 RK_PA4 3 &pcfg_pull_none>; - }; - - sfc_clk: sfc-clk { - rockchip,pins = - <3 RK_PA5 3 &pcfg_pull_none>; - }; - }; - - gmac { - rmii_pins: rmii-pins { - rockchip,pins = - /* mac_txen */ - <1 RK_PC1 3 &pcfg_pull_none_12ma>, - /* mac_txd1 */ - <1 RK_PC3 3 &pcfg_pull_none_12ma>, - /* mac_txd0 */ - <1 RK_PC2 3 &pcfg_pull_none_12ma>, - /* mac_rxd0 */ - <1 RK_PC4 3 &pcfg_pull_none>, - /* mac_rxd1 */ - <1 RK_PC5 3 &pcfg_pull_none>, - /* mac_rxer */ - <1 RK_PB7 3 &pcfg_pull_none>, - /* mac_rxdv */ - <1 RK_PC0 3 &pcfg_pull_none>, - /* mac_mdio */ - <1 RK_PB6 3 &pcfg_pull_none>, - /* mac_mdc */ - <1 RK_PB5 3 &pcfg_pull_none>; - }; - - mac_refclk_12ma: mac-refclk-12ma { - rockchip,pins = - <1 RK_PB4 3 &pcfg_pull_none_12ma>; - }; - - mac_refclk: mac-refclk { - rockchip,pins = - <1 RK_PB4 3 &pcfg_pull_none>; - }; - }; - - gmac-m1 { - rmiim1_pins: rmiim1-pins { - rockchip,pins = - /* mac_txen */ - <4 RK_PB7 2 &pcfg_pull_none_12ma>, - /* mac_txd1 */ - <4 RK_PA5 2 &pcfg_pull_none_12ma>, - /* mac_txd0 */ - <4 RK_PA4 2 &pcfg_pull_none_12ma>, - /* mac_rxd0 */ - <4 RK_PA2 2 &pcfg_pull_none>, - /* mac_rxd1 */ - <4 RK_PA3 2 &pcfg_pull_none>, - /* mac_rxer */ - <4 RK_PA0 2 &pcfg_pull_none>, - /* mac_rxdv */ - <4 RK_PA1 2 &pcfg_pull_none>, - /* mac_mdio */ - <4 RK_PB6 2 &pcfg_pull_none>, - /* mac_mdc */ - <4 RK_PB5 2 &pcfg_pull_none>; - }; - - macm1_refclk_12ma: macm1-refclk-12ma { - rockchip,pins = - <4 RK_PB4 2 &pcfg_pull_none_12ma>; - }; - - macm1_refclk: macm1-refclk { - rockchip,pins = - <4 RK_PB4 2 &pcfg_pull_none>; - }; - }; - - i2c0 { - i2c0_xfer: i2c0-xfer { - rockchip,pins = - <1 RK_PD0 2 &pcfg_pull_none_smt>, - <1 RK_PD1 2 &pcfg_pull_none_smt>; - }; - }; - - i2c1 { - i2c1_xfer: i2c1-xfer { - rockchip,pins = - <0 RK_PB3 1 &pcfg_pull_none_smt>, - <0 RK_PB4 1 &pcfg_pull_none_smt>; - }; - }; - - i2c2 { - i2c2_xfer: i2c2-xfer { - rockchip,pins = - <2 RK_PA2 3 &pcfg_pull_none_smt>, - <2 RK_PA3 3 &pcfg_pull_none_smt>; - }; - }; - - i2c3-m0 { - i2c3m0_xfer: i2c3m0-xfer { - rockchip,pins = - <0 RK_PB7 2 &pcfg_pull_none_smt>, - <0 RK_PC0 2 &pcfg_pull_none_smt>; - }; - }; - - i2c3-m1 { - i2c3m1_xfer: i2c3m1-xfer { - rockchip,pins = - <3 RK_PB4 2 &pcfg_pull_none_smt>, - <3 RK_PB5 2 &pcfg_pull_none_smt>; - }; - }; - - i2c3-m2 { - i2c3m2_xfer: i2c3m2-xfer { - rockchip,pins = - <2 RK_PA1 3 &pcfg_pull_none_smt>, - <2 RK_PA0 3 &pcfg_pull_none_smt>; - }; - }; - - i2s_2ch_0 { - i2s_2ch_0_mclk: i2s-2ch-0-mclk { - rockchip,pins = - <4 RK_PB4 1 &pcfg_pull_none>; - }; - - i2s_2ch_0_sclk: i2s-2ch-0-sclk { - rockchip,pins = - <4 RK_PB5 1 &pcfg_pull_none>; - }; - - i2s_2ch_0_lrck: i2s-2ch-0-lrck { - rockchip,pins = - <4 RK_PB6 1 &pcfg_pull_none>; - }; - - i2s_2ch_0_sdo: i2s-2ch-0-sdo { - rockchip,pins = - <4 RK_PB7 1 &pcfg_pull_none>; - }; - - i2s_2ch_0_sdi: i2s-2ch-0-sdi { - rockchip,pins = - <4 RK_PC0 1 &pcfg_pull_none>; - }; - }; - - i2s_8ch_0 { - i2s_8ch_0_mclk: i2s-8ch-0-mclk { - rockchip,pins = - <2 RK_PA4 1 &pcfg_pull_none>; - }; - - i2s_8ch_0_sclktx: i2s-8ch-0-sclktx { - rockchip,pins = - <2 RK_PA5 1 &pcfg_pull_none>; - }; - - i2s_8ch_0_sclkrx: i2s-8ch-0-sclkrx { - rockchip,pins = - <2 RK_PA6 1 &pcfg_pull_none>; - }; - - i2s_8ch_0_lrcktx: i2s-8ch-0-lrcktx { - rockchip,pins = - <2 RK_PA7 1 &pcfg_pull_none>; - }; - - i2s_8ch_0_lrckrx: i2s-8ch-0-lrckrx { - rockchip,pins = - <2 RK_PB0 1 &pcfg_pull_none>; - }; - - i2s_8ch_0_sdo0: i2s-8ch-0-sdo0 { - rockchip,pins = - <2 RK_PB1 1 &pcfg_pull_none>; - }; - - i2s_8ch_0_sdo1: i2s-8ch-0-sdo1 { - rockchip,pins = - <2 RK_PB2 1 &pcfg_pull_none>; - }; - - i2s_8ch_0_sdo2: i2s-8ch-0-sdo2 { - rockchip,pins = - <2 RK_PB3 1 &pcfg_pull_none>; - }; - - i2s_8ch_0_sdo3: i2s-8ch-0-sdo3 { - rockchip,pins = - <2 RK_PB4 1 &pcfg_pull_none>; - }; - - i2s_8ch_0_sdi0: i2s-8ch-0-sdi0 { - rockchip,pins = - <2 RK_PB5 1 &pcfg_pull_none>; - }; - - i2s_8ch_0_sdi1: i2s-8ch-0-sdi1 { - rockchip,pins = - <2 RK_PB6 1 &pcfg_pull_none>; - }; - - i2s_8ch_0_sdi2: i2s-8ch-0-sdi2 { - rockchip,pins = - <2 RK_PB7 1 &pcfg_pull_none>; - }; - - i2s_8ch_0_sdi3: i2s-8ch-0-sdi3 { - rockchip,pins = - <2 RK_PC0 1 &pcfg_pull_none>; - }; - }; - - i2s_8ch_1_m0 { - i2s_8ch_1_m0_mclk: i2s-8ch-1-m0-mclk { - rockchip,pins = - <1 RK_PA2 2 &pcfg_pull_none>; - }; - - i2s_8ch_1_m0_sclktx: i2s-8ch-1-m0-sclktx { - rockchip,pins = - <1 RK_PA3 2 &pcfg_pull_none>; - }; - - i2s_8ch_1_m0_sclkrx: i2s-8ch-1-m0-sclkrx { - rockchip,pins = - <1 RK_PA4 2 &pcfg_pull_none>; - }; - - i2s_8ch_1_m0_lrcktx: i2s-8ch-1-m0-lrcktx { - rockchip,pins = - <1 RK_PA5 2 &pcfg_pull_none>; - }; - - i2s_8ch_1_m0_lrckrx: i2s-8ch-1-m0-lrckrx { - rockchip,pins = - <1 RK_PA6 2 &pcfg_pull_none>; - }; - - i2s_8ch_1_m0_sdo0: i2s-8ch-1-m0-sdo0 { - rockchip,pins = - <1 RK_PA7 2 &pcfg_pull_none>; - }; - - i2s_8ch_1_m0_sdo1_sdi3: i2s-8ch-1-m0-sdo1-sdi3 { - rockchip,pins = - <1 RK_PB0 2 &pcfg_pull_none>; - }; - - i2s_8ch_1_m0_sdo2_sdi2: i2s-8ch-1-m0-sdo2-sdi2 { - rockchip,pins = - <1 RK_PB1 2 &pcfg_pull_none>; - }; - - i2s_8ch_1_m0_sdo3_sdi1: i2s-8ch-1-m0-sdo3_sdi1 { - rockchip,pins = - <1 RK_PB2 2 &pcfg_pull_none>; - }; - - i2s_8ch_1_m0_sdi0: i2s-8ch-1-m0-sdi0 { - rockchip,pins = - <1 RK_PB3 2 &pcfg_pull_none>; - }; - }; - - i2s_8ch_1_m1 { - i2s_8ch_1_m1_mclk: i2s-8ch-1-m1-mclk { - rockchip,pins = - <1 RK_PB4 2 &pcfg_pull_none>; - }; - - i2s_8ch_1_m1_sclktx: i2s-8ch-1-m1-sclktx { - rockchip,pins = - <1 RK_PB5 2 &pcfg_pull_none>; - }; - - i2s_8ch_1_m1_sclkrx: i2s-8ch-1-m1-sclkrx { - rockchip,pins = - <1 RK_PB6 2 &pcfg_pull_none>; - }; - - i2s_8ch_1_m1_lrcktx: i2s-8ch-1-m1-lrcktx { - rockchip,pins = - <1 RK_PB7 2 &pcfg_pull_none>; - }; - - i2s_8ch_1_m1_lrckrx: i2s-8ch-1-m1-lrckrx { - rockchip,pins = - <1 RK_PC0 2 &pcfg_pull_none>; - }; - - i2s_8ch_1_m1_sdo0: i2s-8ch-1-m1-sdo0 { - rockchip,pins = - <1 RK_PC1 2 &pcfg_pull_none>; - }; - - i2s_8ch_1_m1_sdo1_sdi3: i2s-8ch-1-m1-sdo1-sdi3 { - rockchip,pins = - <1 RK_PC2 2 &pcfg_pull_none>; - }; - - i2s_8ch_1_m1_sdo2_sdi2: i2s-8ch-1-m1-sdo2-sdi2 { - rockchip,pins = - <1 RK_PC3 2 &pcfg_pull_none>; - }; - - i2s_8ch_1_m1_sdo3_sdi1: i2s-8ch-1-m1-sdo3_sdi1 { - rockchip,pins = - <1 RK_PC4 2 &pcfg_pull_none>; - }; - - i2s_8ch_1_m1_sdi0: i2s-8ch-1-m1-sdi0 { - rockchip,pins = - <1 RK_PC5 2 &pcfg_pull_none>; - }; - }; - - pdm_m0 { - pdm_m0_clk: pdm-m0-clk { - rockchip,pins = - <1 RK_PA4 3 &pcfg_pull_none>; - }; - - pdm_m0_sdi0: pdm-m0-sdi0 { - rockchip,pins = - <1 RK_PB3 3 &pcfg_pull_none>; - }; - - pdm_m0_sdi1: pdm-m0-sdi1 { - rockchip,pins = - <1 RK_PB2 3 &pcfg_pull_none>; - }; - - pdm_m0_sdi2: pdm-m0-sdi2 { - rockchip,pins = - <1 RK_PB1 3 &pcfg_pull_none>; - }; - - pdm_m0_sdi3: pdm-m0-sdi3 { - rockchip,pins = - <1 RK_PB0 3 &pcfg_pull_none>; - }; - }; - - pdm_m1 { - pdm_m1_clk: pdm-m1-clk { - rockchip,pins = - <1 RK_PB6 4 &pcfg_pull_none>; - }; - - pdm_m1_sdi0: pdm-m1-sdi0 { - rockchip,pins = - <1 RK_PC5 4 &pcfg_pull_none>; - }; - - pdm_m1_sdi1: pdm-m1-sdi1 { - rockchip,pins = - <1 RK_PC4 4 &pcfg_pull_none>; - }; - - pdm_m1_sdi2: pdm-m1-sdi2 { - rockchip,pins = - <1 RK_PC3 4 &pcfg_pull_none>; - }; - - pdm_m1_sdi3: pdm-m1-sdi3 { - rockchip,pins = - <1 RK_PC2 4 &pcfg_pull_none>; - }; - }; - - pdm_m2 { - pdm_m2_clkm: pdm-m2-clkm { - rockchip,pins = - <2 RK_PA4 3 &pcfg_pull_none>; - }; - - pdm_m2_clk: pdm-m2-clk { - rockchip,pins = - <2 RK_PA6 2 &pcfg_pull_none>; - }; - - pdm_m2_sdi0: pdm-m2-sdi0 { - rockchip,pins = - <2 RK_PB5 2 &pcfg_pull_none>; - }; - - pdm_m2_sdi1: pdm-m2-sdi1 { - rockchip,pins = - <2 RK_PB6 2 &pcfg_pull_none>; - }; - - pdm_m2_sdi2: pdm-m2-sdi2 { - rockchip,pins = - <2 RK_PB7 2 &pcfg_pull_none>; - }; - - pdm_m2_sdi3: pdm-m2-sdi3 { - rockchip,pins = - <2 RK_PC0 2 &pcfg_pull_none>; - }; - }; - - pwm0 { - pwm0_pin: pwm0-pin { - rockchip,pins = - <0 RK_PB5 1 &pcfg_pull_none>; - }; - - pwm0_pin_pull_down: pwm0-pin-pull-down { - rockchip,pins = - <0 RK_PB5 1 &pcfg_pull_down>; - }; - }; - - pwm1 { - pwm1_pin: pwm1-pin { - rockchip,pins = - <0 RK_PB6 1 &pcfg_pull_none>; - }; - - pwm1_pin_pull_down: pwm1-pin-pull-down { - rockchip,pins = - <0 RK_PB6 1 &pcfg_pull_down>; - }; - }; - - pwm2 { - pwm2_pin: pwm2-pin { - rockchip,pins = - <0 RK_PB7 1 &pcfg_pull_none>; - }; - - pwm2_pin_pull_down: pwm2-pin-pull-down { - rockchip,pins = - <0 RK_PB7 1 &pcfg_pull_down>; - }; - }; - - pwm3 { - pwm3_pin: pwm3-pin { - rockchip,pins = - <0 RK_PC0 1 &pcfg_pull_none>; - }; - - pwm3_pin_pull_down: pwm3-pin-pull-down { - rockchip,pins = - <0 RK_PC0 1 &pcfg_pull_down>; - }; - }; - - pwm4 { - pwm4_pin: pwm4-pin { - rockchip,pins = - <0 RK_PA1 2 &pcfg_pull_none>; - }; - - pwm4_pin_pull_down: pwm4-pin-pull-down { - rockchip,pins = - <0 RK_PA1 2 &pcfg_pull_down>; - }; - }; - - pwm5 { - pwm5_pin: pwm5-pin { - rockchip,pins = - <0 RK_PC1 2 &pcfg_pull_none>; - }; - - pwm5_pin_pull_down: pwm5-pin-pull-down { - rockchip,pins = - <0 RK_PC1 2 &pcfg_pull_down>; - }; - }; - - pwm6 { - pwm6_pin: pwm6-pin { - rockchip,pins = - <0 RK_PC2 2 &pcfg_pull_none>; - }; - - pwm6_pin_pull_down: pwm6-pin-pull-down { - rockchip,pins = - <0 RK_PC2 2 &pcfg_pull_down>; - }; - }; - - pwm7 { - pwm7_pin: pwm7-pin { - rockchip,pins = - <2 RK_PB0 2 &pcfg_pull_none>; - }; - - pwm7_pin_pull_down: pwm7-pin-pull-down { - rockchip,pins = - <2 RK_PB0 2 &pcfg_pull_down>; - }; - }; - - pwm8 { - pwm8_pin: pwm8-pin { - rockchip,pins = - <2 RK_PB2 2 &pcfg_pull_none>; - }; - - pwm8_pin_pull_down: pwm8-pin-pull-down { - rockchip,pins = - <2 RK_PB2 2 &pcfg_pull_down>; - }; - }; - - pwm9 { - pwm9_pin: pwm9-pin { - rockchip,pins = - <2 RK_PB3 2 &pcfg_pull_none>; - }; - - pwm9_pin_pull_down: pwm9-pin-pull-down { - rockchip,pins = - <2 RK_PB3 2 &pcfg_pull_down>; - }; - }; - - pwm10 { - pwm10_pin: pwm10-pin { - rockchip,pins = - <2 RK_PB4 2 &pcfg_pull_none>; - }; - - pwm10_pin_pull_down: pwm10-pin-pull-down { - rockchip,pins = - <2 RK_PB4 2 &pcfg_pull_down>; - }; - }; - - pwm11 { - pwm11_pin: pwm11-pin { - rockchip,pins = - <2 RK_PC0 4 &pcfg_pull_none>; - }; - - pwm11_pin_pull_down: pwm11-pin-pull-down { - rockchip,pins = - <2 RK_PC0 4 &pcfg_pull_down>; - }; - }; - - rtc { - rtc_32k: rtc-32k { - rockchip,pins = - <0 RK_PC3 1 &pcfg_pull_none>; - }; - }; - - sdmmc { - sdmmc_clk: sdmmc-clk { - rockchip,pins = - <4 RK_PD5 1 &pcfg_pull_none_4ma>; - }; - - sdmmc_cmd: sdmmc-cmd { - rockchip,pins = - <4 RK_PD4 1 &pcfg_pull_up_4ma>; - }; - - sdmmc_det: sdmmc-det { - rockchip,pins = - <0 RK_PA3 1 &pcfg_pull_up_4ma>; - }; - - sdmmc_pwren: sdmmc-pwren { - rockchip,pins = - <4 RK_PD6 1 &pcfg_pull_none_4ma>; - }; - - sdmmc_bus1: sdmmc-bus1 { - rockchip,pins = - <4 RK_PD0 1 &pcfg_pull_up_4ma>; - }; - - sdmmc_bus4: sdmmc-bus4 { - rockchip,pins = - <4 RK_PD0 1 &pcfg_pull_up_4ma>, - <4 RK_PD1 1 &pcfg_pull_up_4ma>, - <4 RK_PD2 1 &pcfg_pull_up_4ma>, - <4 RK_PD3 1 &pcfg_pull_up_4ma>; - }; - }; - - sdio { - sdio_clk: sdio-clk { - rockchip,pins = - <4 RK_PA5 1 &pcfg_pull_none_8ma>; - }; - - sdio_cmd: sdio-cmd { - rockchip,pins = - <4 RK_PA4 1 &pcfg_pull_up_8ma>; - }; - - sdio_pwren: sdio-pwren { - rockchip,pins = - <0 RK_PA2 1 &pcfg_pull_none_8ma>; - }; - - sdio_wrpt: sdio-wrpt { - rockchip,pins = - <0 RK_PA1 1 &pcfg_pull_none_8ma>; - }; - - sdio_intn: sdio-intn { - rockchip,pins = - <0 RK_PA0 1 &pcfg_pull_none_8ma>; - }; - - sdio_bus1: sdio-bus1 { - rockchip,pins = - <4 RK_PA0 1 &pcfg_pull_up_8ma>; - }; - - sdio_bus4: sdio-bus4 { - rockchip,pins = - <4 RK_PA0 1 &pcfg_pull_up_8ma>, - <4 RK_PA1 1 &pcfg_pull_up_8ma>, - <4 RK_PA2 1 &pcfg_pull_up_8ma>, - <4 RK_PA3 1 &pcfg_pull_up_8ma>; - }; - }; - - spdif_in { - spdif_in: spdif-in { - rockchip,pins = - <0 RK_PC2 1 &pcfg_pull_none>; - }; - }; - - spdif_out { - spdif_out: spdif-out { - rockchip,pins = - <0 RK_PC1 1 &pcfg_pull_none>; - }; - }; - - spi0 { - spi0_clk: spi0-clk { - rockchip,pins = - <2 RK_PA2 2 &pcfg_pull_up_4ma>; - }; - - spi0_csn0: spi0-csn0 { - rockchip,pins = - <2 RK_PA3 2 &pcfg_pull_up_4ma>; - }; - - spi0_miso: spi0-miso { - rockchip,pins = - <2 RK_PA0 2 &pcfg_pull_up_4ma>; - }; - - spi0_mosi: spi0-mosi { - rockchip,pins = - <2 RK_PA1 2 &pcfg_pull_up_4ma>; - }; - }; - - spi1 { - spi1_clk: spi1-clk { - rockchip,pins = - <3 RK_PB3 3 &pcfg_pull_up_4ma>; - }; - - spi1_csn0: spi1-csn0 { - rockchip,pins = - <3 RK_PB5 3 &pcfg_pull_up_4ma>; - }; - - spi1_miso: spi1-miso { - rockchip,pins = - <3 RK_PB2 3 &pcfg_pull_up_4ma>; - }; - - spi1_mosi: spi1-mosi { - rockchip,pins = - <3 RK_PB4 3 &pcfg_pull_up_4ma>; - }; - }; - - spi1-m1 { - spi1m1_miso: spi1m1-miso { - rockchip,pins = - <2 RK_PA4 2 &pcfg_pull_up_4ma>; - }; - - spi1m1_mosi: spi1m1-mosi { - rockchip,pins = - <2 RK_PA5 2 &pcfg_pull_up_4ma>; - }; - - spi1m1_clk: spi1m1-clk { - rockchip,pins = - <2 RK_PA7 2 &pcfg_pull_up_4ma>; - }; - - spi1m1_csn0: spi1m1-csn0 { - rockchip,pins = - <2 RK_PB1 2 &pcfg_pull_up_4ma>; - }; - }; - - spi2 { - spi2_clk: spi2-clk { - rockchip,pins = - <1 RK_PD0 3 &pcfg_pull_up_4ma>; - }; - - spi2_csn0: spi2-csn0 { - rockchip,pins = - <1 RK_PD1 3 &pcfg_pull_up_4ma>; - }; - - spi2_miso: spi2-miso { - rockchip,pins = - <1 RK_PC6 3 &pcfg_pull_up_4ma>; - }; - - spi2_mosi: spi2-mosi { - rockchip,pins = - <1 RK_PC7 3 &pcfg_pull_up_4ma>; - }; - }; - - tsadc { - tsadc_otp_pin: tsadc-otp-pin { - rockchip,pins = - <0 RK_PB2 0 &pcfg_pull_none>; - }; - - tsadc_otp_out: tsadc-otp-out { - rockchip,pins = - <0 RK_PB2 1 &pcfg_pull_none>; - }; - }; - - uart0 { - uart0_xfer: uart0-xfer { - rockchip,pins = - <2 RK_PA1 1 &pcfg_pull_up>, - <2 RK_PA0 1 &pcfg_pull_up>; - }; - - uart0_cts: uart0-cts { - rockchip,pins = - <2 RK_PA2 1 &pcfg_pull_none>; - }; - - uart0_rts: uart0-rts { - rockchip,pins = - <2 RK_PA3 1 &pcfg_pull_none>; - }; - - uart0_rts_pin: uart0-rts-pin { - rockchip,pins = - <2 RK_PA3 0 &pcfg_pull_none>; - }; - }; - - uart1 { - uart1_xfer: uart1-xfer { - rockchip,pins = - <1 RK_PD1 1 &pcfg_pull_up>, - <1 RK_PD0 1 &pcfg_pull_up>; - }; - - uart1_cts: uart1-cts { - rockchip,pins = - <1 RK_PC6 1 &pcfg_pull_none>; - }; - - uart1_rts: uart1-rts { - rockchip,pins = - <1 RK_PC7 1 &pcfg_pull_none>; - }; - }; - - uart2-m0 { - uart2m0_xfer: uart2m0-xfer { - rockchip,pins = - <1 RK_PC7 2 &pcfg_pull_up>, - <1 RK_PC6 2 &pcfg_pull_up>; - }; - }; - - uart2-m1 { - uart2m1_xfer: uart2m1-xfer { - rockchip,pins = - <4 RK_PD3 2 &pcfg_pull_up>, - <4 RK_PD2 2 &pcfg_pull_up>; - }; - }; - - uart3 { - uart3_xfer: uart3-xfer { - rockchip,pins = - <3 RK_PB5 4 &pcfg_pull_up>, - <3 RK_PB4 4 &pcfg_pull_up>; - }; - }; - - uart3-m1 { - uart3m1_xfer: uart3m1-xfer { - rockchip,pins = - <0 RK_PC2 3 &pcfg_pull_up>, - <0 RK_PC1 3 &pcfg_pull_up>; - }; - }; - - uart4 { - uart4_xfer: uart4-xfer { - rockchip,pins = - <4 RK_PB1 1 &pcfg_pull_up>, - <4 RK_PB0 1 &pcfg_pull_up>; - }; - - uart4_cts: uart4-cts { - rockchip,pins = - <4 RK_PA6 1 &pcfg_pull_none>; - }; - - uart4_rts: uart4-rts { - rockchip,pins = - <4 RK_PA7 1 &pcfg_pull_none>; - }; - - uart4_rts_pin: uart4-rts-pin { - rockchip,pins = - <4 RK_PA7 0 &pcfg_pull_none>; - }; - }; - }; -}; diff --git a/include/dt-bindings/clock/rk3308-cru.h b/include/dt-bindings/clock/rk3308-cru.h deleted file mode 100644 index d97840f9ee2..00000000000 --- a/include/dt-bindings/clock/rk3308-cru.h +++ /dev/null @@ -1,387 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (c) 2019 Rockchip Electronics Co. Ltd. - * Author: Finley Xiao - */ - -#ifndef _DT_BINDINGS_CLK_ROCKCHIP_RK3308_H -#define _DT_BINDINGS_CLK_ROCKCHIP_RK3308_H - -/* core clocks */ -#define PLL_APLL 1 -#define PLL_DPLL 2 -#define PLL_VPLL0 3 -#define PLL_VPLL1 4 -#define ARMCLK 5 - -/* sclk (special clocks) */ -#define USB480M 14 -#define SCLK_RTC32K 15 -#define SCLK_PVTM_CORE 16 -#define SCLK_UART0 17 -#define SCLK_UART1 18 -#define SCLK_UART2 19 -#define SCLK_UART3 20 -#define SCLK_UART4 21 -#define SCLK_I2C0 22 -#define SCLK_I2C1 23 -#define SCLK_I2C2 24 -#define SCLK_I2C3 25 -#define SCLK_PWM0 26 -#define SCLK_SPI0 27 -#define SCLK_SPI1 28 -#define SCLK_SPI2 29 -#define SCLK_TIMER0 30 -#define SCLK_TIMER1 31 -#define SCLK_TIMER2 32 -#define SCLK_TIMER3 33 -#define SCLK_TIMER4 34 -#define SCLK_TIMER5 35 -#define SCLK_TSADC 36 -#define SCLK_SARADC 37 -#define SCLK_OTP 38 -#define SCLK_OTP_USR 39 -#define SCLK_CPU_BOOST 40 -#define SCLK_CRYPTO 41 -#define SCLK_CRYPTO_APK 42 -#define SCLK_NANDC_DIV 43 -#define SCLK_NANDC_DIV50 44 -#define SCLK_NANDC 45 -#define SCLK_SDMMC_DIV 46 -#define SCLK_SDMMC_DIV50 47 -#define SCLK_SDMMC 48 -#define SCLK_SDMMC_DRV 49 -#define SCLK_SDMMC_SAMPLE 50 -#define SCLK_SDIO_DIV 51 -#define SCLK_SDIO_DIV50 52 -#define SCLK_SDIO 53 -#define SCLK_SDIO_DRV 54 -#define SCLK_SDIO_SAMPLE 55 -#define SCLK_EMMC_DIV 56 -#define SCLK_EMMC_DIV50 57 -#define SCLK_EMMC 58 -#define SCLK_EMMC_DRV 59 -#define SCLK_EMMC_SAMPLE 60 -#define SCLK_SFC 61 -#define SCLK_OTG_ADP 62 -#define SCLK_MAC_SRC 63 -#define SCLK_MAC 64 -#define SCLK_MAC_REF 65 -#define SCLK_MAC_RX_TX 66 -#define SCLK_MAC_RMII 67 -#define SCLK_DDR_MON_TIMER 68 -#define SCLK_DDR_MON 69 -#define SCLK_DDRCLK 70 -#define SCLK_PMU 71 -#define SCLK_USBPHY_REF 72 -#define SCLK_WIFI 73 -#define SCLK_PVTM_PMU 74 -#define SCLK_PDM 75 -#define SCLK_I2S0_8CH_TX 76 -#define SCLK_I2S0_8CH_TX_OUT 77 -#define SCLK_I2S0_8CH_RX 78 -#define SCLK_I2S0_8CH_RX_OUT 79 -#define SCLK_I2S1_8CH_TX 80 -#define SCLK_I2S1_8CH_TX_OUT 81 -#define SCLK_I2S1_8CH_RX 82 -#define SCLK_I2S1_8CH_RX_OUT 83 -#define SCLK_I2S2_8CH_TX 84 -#define SCLK_I2S2_8CH_TX_OUT 85 -#define SCLK_I2S2_8CH_RX 86 -#define SCLK_I2S2_8CH_RX_OUT 87 -#define SCLK_I2S3_8CH_TX 88 -#define SCLK_I2S3_8CH_TX_OUT 89 -#define SCLK_I2S3_8CH_RX 90 -#define SCLK_I2S3_8CH_RX_OUT 91 -#define SCLK_I2S0_2CH 92 -#define SCLK_I2S0_2CH_OUT 93 -#define SCLK_I2S1_2CH 94 -#define SCLK_I2S1_2CH_OUT 95 -#define SCLK_SPDIF_TX_DIV 96 -#define SCLK_SPDIF_TX_DIV50 97 -#define SCLK_SPDIF_TX 98 -#define SCLK_SPDIF_RX_DIV 99 -#define SCLK_SPDIF_RX_DIV50 100 -#define SCLK_SPDIF_RX 101 -#define SCLK_I2S0_8CH_TX_MUX 102 -#define SCLK_I2S0_8CH_RX_MUX 103 -#define SCLK_I2S1_8CH_TX_MUX 104 -#define SCLK_I2S1_8CH_RX_MUX 105 -#define SCLK_I2S2_8CH_TX_MUX 106 -#define SCLK_I2S2_8CH_RX_MUX 107 -#define SCLK_I2S3_8CH_TX_MUX 108 -#define SCLK_I2S3_8CH_RX_MUX 109 -#define SCLK_I2S0_8CH_TX_SRC 110 -#define SCLK_I2S0_8CH_RX_SRC 111 -#define SCLK_I2S1_8CH_TX_SRC 112 -#define SCLK_I2S1_8CH_RX_SRC 113 -#define SCLK_I2S2_8CH_TX_SRC 114 -#define SCLK_I2S2_8CH_RX_SRC 115 -#define SCLK_I2S3_8CH_TX_SRC 116 -#define SCLK_I2S3_8CH_RX_SRC 117 -#define SCLK_I2S0_2CH_SRC 118 -#define SCLK_I2S1_2CH_SRC 119 -#define SCLK_PWM1 120 -#define SCLK_PWM2 121 -#define SCLK_OWIRE 122 - -/* dclk */ -#define DCLK_VOP 125 - -/* aclk */ -#define ACLK_BUS_SRC 130 -#define ACLK_BUS 131 -#define ACLK_PERI_SRC 132 -#define ACLK_PERI 133 -#define ACLK_MAC 134 -#define ACLK_CRYPTO 135 -#define ACLK_VOP 136 -#define ACLK_GIC 137 -#define ACLK_DMAC0 138 -#define ACLK_DMAC1 139 - -/* hclk */ -#define HCLK_BUS 150 -#define HCLK_PERI 151 -#define HCLK_AUDIO 152 -#define HCLK_NANDC 153 -#define HCLK_SDMMC 154 -#define HCLK_SDIO 155 -#define HCLK_EMMC 156 -#define HCLK_SFC 157 -#define HCLK_OTG 158 -#define HCLK_HOST 159 -#define HCLK_HOST_ARB 160 -#define HCLK_PDM 161 -#define HCLK_SPDIFTX 162 -#define HCLK_SPDIFRX 163 -#define HCLK_I2S0_8CH 164 -#define HCLK_I2S1_8CH 165 -#define HCLK_I2S2_8CH 166 -#define HCLK_I2S3_8CH 167 -#define HCLK_I2S0_2CH 168 -#define HCLK_I2S1_2CH 169 -#define HCLK_VAD 170 -#define HCLK_CRYPTO 171 -#define HCLK_VOP 172 - -/* pclk */ -#define PCLK_BUS 190 -#define PCLK_DDR 191 -#define PCLK_PERI 192 -#define PCLK_PMU 193 -#define PCLK_AUDIO 194 -#define PCLK_MAC 195 -#define PCLK_ACODEC 196 -#define PCLK_UART0 197 -#define PCLK_UART1 198 -#define PCLK_UART2 199 -#define PCLK_UART3 200 -#define PCLK_UART4 201 -#define PCLK_I2C0 202 -#define PCLK_I2C1 203 -#define PCLK_I2C2 204 -#define PCLK_I2C3 205 -#define PCLK_PWM0 206 -#define PCLK_SPI0 207 -#define PCLK_SPI1 208 -#define PCLK_SPI2 209 -#define PCLK_SARADC 210 -#define PCLK_TSADC 211 -#define PCLK_TIMER 212 -#define PCLK_OTP_NS 213 -#define PCLK_WDT 214 -#define PCLK_GPIO0 215 -#define PCLK_GPIO1 216 -#define PCLK_GPIO2 217 -#define PCLK_GPIO3 218 -#define PCLK_GPIO4 219 -#define PCLK_SGRF 220 -#define PCLK_GRF 221 -#define PCLK_USBSD_DET 222 -#define PCLK_DDR_UPCTL 223 -#define PCLK_DDR_MON 224 -#define PCLK_DDRPHY 225 -#define PCLK_DDR_STDBY 226 -#define PCLK_USB_GRF 227 -#define PCLK_CRU 228 -#define PCLK_OTP_PHY 229 -#define PCLK_CPU_BOOST 230 -#define PCLK_PWM1 231 -#define PCLK_PWM2 232 -#define PCLK_CAN 233 -#define PCLK_OWIRE 234 - -#define CLK_NR_CLKS (PCLK_OWIRE + 1) - -/* soft-reset indices */ - -/* cru_softrst_con0 */ -#define SRST_CORE0_PO 0 -#define SRST_CORE1_PO 1 -#define SRST_CORE2_PO 2 -#define SRST_CORE3_PO 3 -#define SRST_CORE0 4 -#define SRST_CORE1 5 -#define SRST_CORE2 6 -#define SRST_CORE3 7 -#define SRST_CORE0_DBG 8 -#define SRST_CORE1_DBG 9 -#define SRST_CORE2_DBG 10 -#define SRST_CORE3_DBG 11 -#define SRST_TOPDBG 12 -#define SRST_CORE_NOC 13 -#define SRST_STRC_A 14 -#define SRST_L2C 15 - -/* cru_softrst_con1 */ -#define SRST_DAP 16 -#define SRST_CORE_PVTM 17 -#define SRST_CORE_PRF 18 -#define SRST_CORE_GRF 19 -#define SRST_DDRUPCTL 20 -#define SRST_DDRUPCTL_P 22 -#define SRST_MSCH 23 -#define SRST_DDRMON_P 25 -#define SRST_DDRSTDBY_P 26 -#define SRST_DDRSTDBY 27 -#define SRST_DDRPHY 28 -#define SRST_DDRPHY_DIV 29 -#define SRST_DDRPHY_P 30 - -/* cru_softrst_con2 */ -#define SRST_BUS_NIU_H 32 -#define SRST_USB_NIU_P 33 -#define SRST_CRYPTO_A 34 -#define SRST_CRYPTO_H 35 -#define SRST_CRYPTO 36 -#define SRST_CRYPTO_APK 37 -#define SRST_VOP_A 38 -#define SRST_VOP_H 39 -#define SRST_VOP_D 40 -#define SRST_INTMEM_A 41 -#define SRST_ROM_H 42 -#define SRST_GIC_A 43 -#define SRST_UART0_P 44 -#define SRST_UART0 45 -#define SRST_UART1_P 46 -#define SRST_UART1 47 - -/* cru_softrst_con3 */ -#define SRST_UART2_P 48 -#define SRST_UART2 49 -#define SRST_UART3_P 50 -#define SRST_UART3 51 -#define SRST_UART4_P 52 -#define SRST_UART4 53 -#define SRST_I2C0_P 54 -#define SRST_I2C0 55 -#define SRST_I2C1_P 56 -#define SRST_I2C1 57 -#define SRST_I2C2_P 58 -#define SRST_I2C2 59 -#define SRST_I2C3_P 60 -#define SRST_I2C3 61 -#define SRST_PWM0_P 62 -#define SRST_PWM0 63 - -/* cru_softrst_con4 */ -#define SRST_SPI0_P 64 -#define SRST_SPI0 65 -#define SRST_SPI1_P 66 -#define SRST_SPI1 67 -#define SRST_SPI2_P 68 -#define SRST_SPI2 69 -#define SRST_SARADC_P 70 -#define SRST_TSADC_P 71 -#define SRST_TSADC 72 -#define SRST_TIMER0_P 73 -#define SRST_TIMER0 74 -#define SRST_TIMER1 75 -#define SRST_TIMER2 76 -#define SRST_TIMER3 77 -#define SRST_TIMER4 78 -#define SRST_TIMER5 79 - -/* cru_softrst_con5 */ -#define SRST_OTP_NS_P 80 -#define SRST_OTP_NS_SBPI 81 -#define SRST_OTP_NS_USR 82 -#define SRST_OTP_PHY_P 83 -#define SRST_OTP_PHY 84 -#define SRST_GPIO0_P 86 -#define SRST_GPIO1_P 87 -#define SRST_GPIO2_P 88 -#define SRST_GPIO3_P 89 -#define SRST_GPIO4_P 90 -#define SRST_GRF_P 91 -#define SRST_USBSD_DET_P 92 -#define SRST_PMU 93 -#define SRST_PMU_PVTM 94 -#define SRST_USB_GRF_P 95 - -/* cru_softrst_con6 */ -#define SRST_CPU_BOOST 96 -#define SRST_CPU_BOOST_P 97 -#define SRST_PWM1_P 98 -#define SRST_PWM1 99 -#define SRST_PWM2_P 100 -#define SRST_PWM2 101 -#define SRST_PERI_NIU_A 104 -#define SRST_PERI_NIU_H 105 -#define SRST_PERI_NIU_p 106 -#define SRST_USB2OTG_H 107 -#define SRST_USB2OTG 108 -#define SRST_USB2OTG_ADP 109 -#define SRST_USB2HOST_H 110 -#define SRST_USB2HOST_ARB_H 111 - -/* cru_softrst_con7 */ -#define SRST_USB2HOST_AUX_H 112 -#define SRST_USB2HOST_EHCI 113 -#define SRST_USB2HOST 114 -#define SRST_USBPHYPOR 115 -#define SRST_UTMI0 116 -#define SRST_UTMI1 117 -#define SRST_SDIO_H 118 -#define SRST_EMMC_H 119 -#define SRST_SFC_H 120 -#define SRST_SFC 121 -#define SRST_SD_H 122 -#define SRST_NANDC_H 123 -#define SRST_NANDC_N 124 -#define SRST_MAC_A 125 -#define SRST_CAN_P 126 -#define SRST_OWIRE_P 127 - -/* cru_softrst_con8 */ -#define SRST_AUDIO_NIU_H 128 -#define SRST_AUDIO_NIU_P 129 -#define SRST_PDM_H 130 -#define SRST_PDM_M 131 -#define SRST_SPDIFTX_H 132 -#define SRST_SPDIFTX_M 133 -#define SRST_SPDIFRX_H 134 -#define SRST_SPDIFRX_M 135 -#define SRST_I2S0_8CH_H 136 -#define SRST_I2S0_8CH_TX_M 137 -#define SRST_I2S0_8CH_RX_M 138 -#define SRST_I2S1_8CH_H 139 -#define SRST_I2S1_8CH_TX_M 140 -#define SRST_I2S1_8CH_RX_M 141 -#define SRST_I2S2_8CH_H 142 -#define SRST_I2S2_8CH_TX_M 143 - -/* cru_softrst_con9 */ -#define SRST_I2S2_8CH_RX_M 144 -#define SRST_I2S3_8CH_H 145 -#define SRST_I2S3_8CH_TX_M 146 -#define SRST_I2S3_8CH_RX_M 147 -#define SRST_I2S0_2CH_H 148 -#define SRST_I2S0_2CH_M 149 -#define SRST_I2S1_2CH_H 150 -#define SRST_I2S1_2CH_M 151 -#define SRST_VAD_H 152 -#define SRST_ACODEC_P 153 - -#endif -- cgit v1.2.3 From 2445bd0add63cdecefc9cfced813a8a49353f966 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Sat, 4 May 2024 19:42:56 +0000 Subject: rockchip: rk3328: Remove redundant device tree files Remove redundant device tree files now that RK3328 boards have been migrated to use OF_UPSTREAM. Signed-off-by: Jonas Karlman Reviewed-by: Kever Yang --- arch/arm/dts/rk3328-evb.dts | 289 ---- arch/arm/dts/rk3328-nanopi-r2c-plus.dts | 33 - arch/arm/dts/rk3328-nanopi-r2c.dts | 40 - arch/arm/dts/rk3328-nanopi-r2s.dts | 410 ------ arch/arm/dts/rk3328-orangepi-r1-plus-lts.dts | 42 - arch/arm/dts/rk3328-orangepi-r1-plus.dts | 374 ----- arch/arm/dts/rk3328-roc-cc.dts | 384 ----- arch/arm/dts/rk3328-rock-pi-e.dts | 445 ------ arch/arm/dts/rk3328-rock64.dts | 394 ------ arch/arm/dts/rk3328.dtsi | 1944 -------------------------- include/dt-bindings/clock/rk3328-cru.h | 393 ------ include/dt-bindings/power/rk3328-power.h | 19 - 12 files changed, 4767 deletions(-) delete mode 100644 arch/arm/dts/rk3328-evb.dts delete mode 100644 arch/arm/dts/rk3328-nanopi-r2c-plus.dts delete mode 100644 arch/arm/dts/rk3328-nanopi-r2c.dts delete mode 100644 arch/arm/dts/rk3328-nanopi-r2s.dts delete mode 100644 arch/arm/dts/rk3328-orangepi-r1-plus-lts.dts delete mode 100644 arch/arm/dts/rk3328-orangepi-r1-plus.dts delete mode 100644 arch/arm/dts/rk3328-roc-cc.dts delete mode 100644 arch/arm/dts/rk3328-rock-pi-e.dts delete mode 100644 arch/arm/dts/rk3328-rock64.dts delete mode 100644 arch/arm/dts/rk3328.dtsi delete mode 100644 include/dt-bindings/clock/rk3328-cru.h delete mode 100644 include/dt-bindings/power/rk3328-power.h (limited to 'include') diff --git a/arch/arm/dts/rk3328-evb.dts b/arch/arm/dts/rk3328-evb.dts deleted file mode 100644 index 1eef5504445..00000000000 --- a/arch/arm/dts/rk3328-evb.dts +++ /dev/null @@ -1,289 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd - */ - -/dts-v1/; -#include "rk3328.dtsi" - -/ { - model = "Rockchip RK3328 EVB"; - compatible = "rockchip,rk3328-evb", "rockchip,rk3328"; - - aliases { - ethernet0 = &gmac2phy; - mmc0 = &sdmmc; - mmc1 = &sdio; - mmc2 = &emmc; - }; - - chosen { - stdout-path = "serial2:1500000n8"; - }; - - dc_12v: dc-12v { - compatible = "regulator-fixed"; - regulator-name = "dc_12v"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <12000000>; - regulator-max-microvolt = <12000000>; - }; - - sdio_pwrseq: sdio-pwrseq { - compatible = "mmc-pwrseq-simple"; - pinctrl-names = "default"; - pinctrl-0 = <&wifi_enable_h>; - - /* - * On the module itself this is one of these (depending - * on the actual card populated): - * - SDIO_RESET_L_WL_REG_ON - * - PDN (power down when low) - */ - reset-gpios = <&gpio1 18 GPIO_ACTIVE_LOW>; - }; - - vcc_sd: sdmmc-regulator { - compatible = "regulator-fixed"; - gpio = <&gpio0 30 GPIO_ACTIVE_LOW>; - pinctrl-names = "default"; - pinctrl-0 = <&sdmmc0m1_pin>; - regulator-name = "vcc_sd"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <&vcc_io>; - }; - - vcc_sys: vcc-sys { - compatible = "regulator-fixed"; - regulator-name = "vcc_sys"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - vin-supply = <&dc_12v>; - }; - - vcc_phy: vcc-phy-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc_phy"; - regulator-always-on; - regulator-boot-on; - }; -}; - -&cpu0 { - cpu-supply = <&vdd_arm>; -}; - -&cpu1 { - cpu-supply = <&vdd_arm>; -}; - -&cpu2 { - cpu-supply = <&vdd_arm>; -}; - -&cpu3 { - cpu-supply = <&vdd_arm>; -}; - -&emmc { - bus-width = <8>; - cap-mmc-highspeed; - non-removable; - pinctrl-names = "default"; - pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>; - status = "okay"; -}; - -&gmac2phy { - phy-supply = <&vcc_phy>; - clock_in_out = "output"; - assigned-clock-rate = <50000000>; - assigned-clocks = <&cru SCLK_MAC2PHY>; - assigned-clock-parents = <&cru SCLK_MAC2PHY_SRC>; - status = "okay"; -}; - -&i2c1 { - status = "okay"; - - rk805: pmic@18 { - compatible = "rockchip,rk805"; - reg = <0x18>; - interrupt-parent = <&gpio2>; - interrupts = <6 IRQ_TYPE_LEVEL_LOW>; - #clock-cells = <1>; - clock-output-names = "xin32k", "rk805-clkout2"; - gpio-controller; - #gpio-cells = <2>; - pinctrl-names = "default"; - pinctrl-0 = <&pmic_int_l>; - rockchip,system-power-controller; - wakeup-source; - - vcc1-supply = <&vcc_sys>; - vcc2-supply = <&vcc_sys>; - vcc3-supply = <&vcc_sys>; - vcc4-supply = <&vcc_sys>; - vcc5-supply = <&vcc_io>; - vcc6-supply = <&vcc_io>; - - regulators { - vdd_logic: DCDC_REG1 { - regulator-name = "vdd_logic"; - regulator-min-microvolt = <712500>; - regulator-max-microvolt = <1450000>; - regulator-always-on; - regulator-boot-on; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1000000>; - }; - }; - - vdd_arm: DCDC_REG2 { - regulator-name = "vdd_arm"; - regulator-min-microvolt = <712500>; - regulator-max-microvolt = <1450000>; - regulator-always-on; - regulator-boot-on; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <950000>; - }; - }; - - vcc_ddr: DCDC_REG3 { - regulator-name = "vcc_ddr"; - regulator-always-on; - regulator-boot-on; - regulator-state-mem { - regulator-on-in-suspend; - }; - }; - - vcc_io: DCDC_REG4 { - regulator-name = "vcc_io"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - regulator-boot-on; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <3300000>; - }; - }; - - vcc_18: LDO_REG1 { - regulator-name = "vcc_18"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - regulator-boot-on; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vcc18_emmc: LDO_REG2 { - regulator-name = "vcc18_emmc"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - regulator-boot-on; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vdd_10: LDO_REG3 { - regulator-name = "vdd_10"; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1000000>; - regulator-always-on; - regulator-boot-on; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1000000>; - }; - }; - }; - }; -}; - -&pinctrl { - pmic { - pmic_int_l: pmic-int-l { - rockchip,pins = <2 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - sdio-pwrseq { - wifi_enable_h: wifi-enable-h { - rockchip,pins = - <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; -}; - -&sdio { - bus-width = <4>; - cap-sd-highspeed; - cap-sdio-irq; - keep-power-in-suspend; - max-frequency = <150000000>; - mmc-pwrseq = <&sdio_pwrseq>; - non-removable; - pinctrl-names = "default"; - pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk>; - status = "okay"; -}; - -&sdmmc { - bus-width = <4>; - cap-mmc-highspeed; - cap-sd-highspeed; - disable-wp; - max-frequency = <150000000>; - pinctrl-names = "default"; - pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_dectn &sdmmc0_bus4>; - vmmc-supply = <&vcc_sd>; - status = "okay"; -}; - -&tsadc { - status = "okay"; -}; - -&uart2 { - status = "okay"; -}; - -&u2phy { - status = "okay"; -}; - -&u2phy_host { - status = "okay"; -}; - -&u2phy_otg { - status = "okay"; -}; - -&usb20_otg { - status = "okay"; -}; - -&usb_host0_ehci { - status = "okay"; -}; - -&usb_host0_ohci { - status = "okay"; -}; diff --git a/arch/arm/dts/rk3328-nanopi-r2c-plus.dts b/arch/arm/dts/rk3328-nanopi-r2c-plus.dts deleted file mode 100644 index 16a1958e457..00000000000 --- a/arch/arm/dts/rk3328-nanopi-r2c-plus.dts +++ /dev/null @@ -1,33 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later OR MIT -/* - * Copyright (c) 2021 FriendlyElec Computer Tech. Co., Ltd. - * (http://www.friendlyarm.com) - * - * Copyright (c) 2023 Tianling Shen - */ - -/dts-v1/; -#include "rk3328-nanopi-r2c.dts" - -/ { - model = "FriendlyElec NanoPi R2C Plus"; - compatible = "friendlyarm,nanopi-r2c-plus", "rockchip,rk3328"; - - aliases { - mmc1 = &emmc; - }; -}; - -&emmc { - bus-width = <8>; - cap-mmc-highspeed; - max-frequency = <150000000>; - mmc-ddr-1_8v; - mmc-hs200-1_8v; - non-removable; - pinctrl-names = "default"; - pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>; - vmmc-supply = <&vcc_io_33>; - vqmmc-supply = <&vcc18_emmc>; - status = "okay"; -}; diff --git a/arch/arm/dts/rk3328-nanopi-r2c.dts b/arch/arm/dts/rk3328-nanopi-r2c.dts deleted file mode 100644 index a07a26b944a..00000000000 --- a/arch/arm/dts/rk3328-nanopi-r2c.dts +++ /dev/null @@ -1,40 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later OR MIT -/* - * Copyright (c) 2021 FriendlyElec Computer Tech. Co., Ltd. - * (http://www.friendlyarm.com) - * - * Copyright (c) 2021-2023 Tianling Shen - */ - -/dts-v1/; -#include "rk3328-nanopi-r2s.dts" - -/ { - model = "FriendlyElec NanoPi R2C"; - compatible = "friendlyarm,nanopi-r2c", "rockchip,rk3328"; -}; - -&gmac2io { - phy-handle = <&yt8521s>; - tx_delay = <0x22>; - rx_delay = <0x12>; - - mdio { - /delete-node/ ethernet-phy@1; - - yt8521s: ethernet-phy@3 { - compatible = "ethernet-phy-ieee802.3-c22"; - reg = <3>; - - motorcomm,clk-out-frequency-hz = <125000000>; - motorcomm,keep-pll-enabled; - motorcomm,auto-sleep-disabled; - - pinctrl-0 = <ð_phy_reset_pin>; - pinctrl-names = "default"; - reset-assert-us = <10000>; - reset-deassert-us = <50000>; - reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>; - }; - }; -}; diff --git a/arch/arm/dts/rk3328-nanopi-r2s.dts b/arch/arm/dts/rk3328-nanopi-r2s.dts deleted file mode 100644 index a4399da7d8b..00000000000 --- a/arch/arm/dts/rk3328-nanopi-r2s.dts +++ /dev/null @@ -1,410 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (c) 2020 David Bauer - */ - -/dts-v1/; - -#include -#include -#include "rk3328.dtsi" - -/ { - model = "FriendlyElec NanoPi R2S"; - compatible = "friendlyarm,nanopi-r2s", "rockchip,rk3328"; - - aliases { - ethernet0 = &gmac2io; - ethernet1 = &rtl8153; - mmc0 = &sdmmc; - }; - - chosen { - stdout-path = "serial2:1500000n8"; - }; - - gmac_clk: gmac-clock { - compatible = "fixed-clock"; - clock-frequency = <125000000>; - clock-output-names = "gmac_clkin"; - #clock-cells = <0>; - }; - - keys { - compatible = "gpio-keys"; - pinctrl-0 = <&reset_button_pin>; - pinctrl-names = "default"; - - key-reset { - label = "reset"; - gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_LOW>; - linux,code = ; - debounce-interval = <50>; - }; - }; - - leds { - compatible = "gpio-leds"; - pinctrl-0 = <&lan_led_pin>, <&sys_led_pin>, <&wan_led_pin>; - pinctrl-names = "default"; - - lan_led: led-0 { - gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>; - label = "nanopi-r2s:green:lan"; - }; - - sys_led: led-1 { - gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>; - label = "nanopi-r2s:red:sys"; - default-state = "on"; - }; - - wan_led: led-2 { - gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_HIGH>; - label = "nanopi-r2s:green:wan"; - }; - }; - - vcc_io_sdio: sdmmcio-regulator { - compatible = "regulator-gpio"; - enable-active-high; - gpios = <&gpio1 RK_PD4 GPIO_ACTIVE_HIGH>; - pinctrl-0 = <&sdio_vcc_pin>; - pinctrl-names = "default"; - regulator-name = "vcc_io_sdio"; - regulator-always-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - regulator-settling-time-us = <5000>; - regulator-type = "voltage"; - startup-delay-us = <2000>; - states = <1800000 0x1>, - <3300000 0x0>; - vin-supply = <&vcc_io_33>; - }; - - vcc_sd: sdmmc-regulator { - compatible = "regulator-fixed"; - gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_LOW>; - pinctrl-0 = <&sdmmc0m1_pin>; - pinctrl-names = "default"; - regulator-name = "vcc_sd"; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <&vcc_io_33>; - }; - - vdd_5v: vdd-5v { - compatible = "regulator-fixed"; - regulator-name = "vdd_5v"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - }; - - vdd_5v_lan: vdd-5v-lan { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <&gpio2 RK_PC6 GPIO_ACTIVE_HIGH>; - pinctrl-0 = <&lan_vdd_pin>; - pinctrl-names = "default"; - regulator-name = "vdd_5v_lan"; - regulator-always-on; - regulator-boot-on; - vin-supply = <&vdd_5v>; - }; -}; - -&cpu0 { - cpu-supply = <&vdd_arm>; -}; - -&cpu1 { - cpu-supply = <&vdd_arm>; -}; - -&cpu2 { - cpu-supply = <&vdd_arm>; -}; - -&cpu3 { - cpu-supply = <&vdd_arm>; -}; - -&display_subsystem { - status = "disabled"; -}; - -&gmac2io { - assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>; - assigned-clock-parents = <&gmac_clk>, <&gmac_clk>; - clock_in_out = "input"; - phy-handle = <&rtl8211e>; - phy-mode = "rgmii"; - phy-supply = <&vcc_io_33>; - pinctrl-0 = <&rgmiim1_pins>; - pinctrl-names = "default"; - rx_delay = <0x18>; - snps,aal; - tx_delay = <0x24>; - status = "okay"; - - mdio { - compatible = "snps,dwmac-mdio"; - #address-cells = <1>; - #size-cells = <0>; - - rtl8211e: ethernet-phy@1 { - reg = <1>; - pinctrl-0 = <ð_phy_reset_pin>; - pinctrl-names = "default"; - reset-assert-us = <10000>; - reset-deassert-us = <50000>; - reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>; - }; - }; -}; - -&i2c1 { - status = "okay"; - - rk805: pmic@18 { - compatible = "rockchip,rk805"; - reg = <0x18>; - interrupt-parent = <&gpio1>; - interrupts = <24 IRQ_TYPE_LEVEL_LOW>; - #clock-cells = <1>; - clock-output-names = "xin32k", "rk805-clkout2"; - gpio-controller; - #gpio-cells = <2>; - pinctrl-0 = <&pmic_int_l>; - pinctrl-names = "default"; - rockchip,system-power-controller; - wakeup-source; - - vcc1-supply = <&vdd_5v>; - vcc2-supply = <&vdd_5v>; - vcc3-supply = <&vdd_5v>; - vcc4-supply = <&vdd_5v>; - vcc5-supply = <&vcc_io_33>; - vcc6-supply = <&vdd_5v>; - - regulators { - vdd_log: DCDC_REG1 { - regulator-name = "vdd_log"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <712500>; - regulator-max-microvolt = <1450000>; - regulator-ramp-delay = <12500>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1000000>; - }; - }; - - vdd_arm: DCDC_REG2 { - regulator-name = "vdd_arm"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <712500>; - regulator-max-microvolt = <1450000>; - regulator-ramp-delay = <12500>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <950000>; - }; - }; - - vcc_ddr: DCDC_REG3 { - regulator-name = "vcc_ddr"; - regulator-always-on; - regulator-boot-on; - - regulator-state-mem { - regulator-on-in-suspend; - }; - }; - - vcc_io_33: DCDC_REG4 { - regulator-name = "vcc_io_33"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <3300000>; - }; - }; - - vcc_18: LDO_REG1 { - regulator-name = "vcc_18"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vcc18_emmc: LDO_REG2 { - regulator-name = "vcc18_emmc"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vdd_10: LDO_REG3 { - regulator-name = "vdd_10"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1000000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1000000>; - }; - }; - }; - }; -}; - -&io_domains { - pmuio-supply = <&vcc_io_33>; - vccio1-supply = <&vcc_io_33>; - vccio2-supply = <&vcc18_emmc>; - vccio3-supply = <&vcc_io_sdio>; - vccio4-supply = <&vcc_18>; - vccio5-supply = <&vcc_io_33>; - vccio6-supply = <&vcc_io_33>; - status = "okay"; -}; - -&pinctrl { - button { - reset_button_pin: reset-button-pin { - rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - gmac2io { - eth_phy_reset_pin: eth-phy-reset-pin { - rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>; - }; - }; - - leds { - lan_led_pin: lan-led-pin { - rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - sys_led_pin: sys-led-pin { - rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - wan_led_pin: wan-led-pin { - rockchip,pins = <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - lan { - lan_vdd_pin: lan-vdd-pin { - rockchip,pins = <2 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - pmic { - pmic_int_l: pmic-int-l { - rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - sd { - sdio_vcc_pin: sdio-vcc-pin { - rockchip,pins = <1 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; -}; - -&pwm2 { - status = "okay"; -}; - -&sdmmc { - bus-width = <4>; - cap-sd-highspeed; - disable-wp; - pinctrl-0 = <&sdmmc0_clk>, <&sdmmc0_cmd>, <&sdmmc0_dectn>, <&sdmmc0_bus4>; - pinctrl-names = "default"; - sd-uhs-sdr12; - sd-uhs-sdr25; - sd-uhs-sdr50; - sd-uhs-sdr104; - vmmc-supply = <&vcc_sd>; - vqmmc-supply = <&vcc_io_sdio>; - status = "okay"; -}; - -&tsadc { - rockchip,hw-tshut-mode = <0>; - rockchip,hw-tshut-polarity = <0>; - status = "okay"; -}; - -&u2phy { - status = "okay"; -}; - -&u2phy_host { - status = "okay"; -}; - -&u2phy_otg { - status = "okay"; -}; - -&uart2 { - status = "okay"; -}; - -&usb20_otg { - status = "okay"; - dr_mode = "host"; -}; - -&usbdrd3 { - dr_mode = "host"; - status = "okay"; - #address-cells = <1>; - #size-cells = <0>; - - /* Second port is for USB 3.0 */ - rtl8153: device@2 { - compatible = "usbbda,8153"; - reg = <2>; - }; -}; - -&usb_host0_ehci { - status = "okay"; -}; - -&usb_host0_ohci { - status = "okay"; -}; diff --git a/arch/arm/dts/rk3328-orangepi-r1-plus-lts.dts b/arch/arm/dts/rk3328-orangepi-r1-plus-lts.dts deleted file mode 100644 index 4237f2ee8fe..00000000000 --- a/arch/arm/dts/rk3328-orangepi-r1-plus-lts.dts +++ /dev/null @@ -1,42 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later OR MIT -/* - * Copyright (c) 2016 Xunlong Software. Co., Ltd. - * (http://www.orangepi.org) - * - * Copyright (c) 2021-2023 Tianling Shen - */ - -/dts-v1/; -#include "rk3328-orangepi-r1-plus.dts" - -/ { - model = "Xunlong Orange Pi R1 Plus LTS"; - compatible = "xunlong,orangepi-r1-plus-lts", "rockchip,rk3328"; -}; - -&gmac2io { - phy-handle = <&yt8531c>; - tx_delay = <0x19>; - rx_delay = <0x05>; - - mdio { - /delete-node/ ethernet-phy@1; - - yt8531c: ethernet-phy@0 { - compatible = "ethernet-phy-ieee802.3-c22"; - reg = <0>; - - motorcomm,auto-sleep-disabled; - motorcomm,clk-out-frequency-hz = <125000000>; - motorcomm,keep-pll-enabled; - motorcomm,rx-clk-drv-microamp = <5020>; - motorcomm,rx-data-drv-microamp = <5020>; - - pinctrl-0 = <ð_phy_reset_pin>; - pinctrl-names = "default"; - reset-assert-us = <15000>; - reset-deassert-us = <50000>; - reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>; - }; - }; -}; diff --git a/arch/arm/dts/rk3328-orangepi-r1-plus.dts b/arch/arm/dts/rk3328-orangepi-r1-plus.dts deleted file mode 100644 index f20662929c7..00000000000 --- a/arch/arm/dts/rk3328-orangepi-r1-plus.dts +++ /dev/null @@ -1,374 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Based on rk3328-nanopi-r2s.dts, which is: - * Copyright (c) 2020 David Bauer - */ - -/dts-v1/; - -#include -#include -#include "rk3328.dtsi" - -/ { - model = "Xunlong Orange Pi R1 Plus"; - compatible = "xunlong,orangepi-r1-plus", "rockchip,rk3328"; - - aliases { - ethernet0 = &gmac2io; - ethernet1 = &rtl8153; - mmc0 = &sdmmc; - }; - - chosen { - stdout-path = "serial2:1500000n8"; - }; - - gmac_clk: gmac-clock { - compatible = "fixed-clock"; - clock-frequency = <125000000>; - clock-output-names = "gmac_clkin"; - #clock-cells = <0>; - }; - - leds { - compatible = "gpio-leds"; - pinctrl-0 = <&lan_led_pin>, <&sys_led_pin>, <&wan_led_pin>; - pinctrl-names = "default"; - - led-0 { - function = LED_FUNCTION_LAN; - color = ; - gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>; - }; - - led-1 { - function = LED_FUNCTION_STATUS; - color = ; - gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>; - linux,default-trigger = "heartbeat"; - }; - - led-2 { - function = LED_FUNCTION_WAN; - color = ; - gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_HIGH>; - }; - }; - - vcc_sd: sdmmc-regulator { - compatible = "regulator-fixed"; - gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_LOW>; - pinctrl-0 = <&sdmmc0m1_pin>; - pinctrl-names = "default"; - regulator-name = "vcc_sd"; - regulator-boot-on; - vin-supply = <&vcc_io>; - }; - - vcc_sys: vcc-sys-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc_sys"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - }; - - vdd_5v_lan: vdd-5v-lan-regulator { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <&gpio2 RK_PC6 GPIO_ACTIVE_HIGH>; - pinctrl-0 = <&lan_vdd_pin>; - pinctrl-names = "default"; - regulator-name = "vdd_5v_lan"; - regulator-always-on; - regulator-boot-on; - vin-supply = <&vcc_sys>; - }; -}; - -&cpu0 { - cpu-supply = <&vdd_arm>; -}; - -&cpu1 { - cpu-supply = <&vdd_arm>; -}; - -&cpu2 { - cpu-supply = <&vdd_arm>; -}; - -&cpu3 { - cpu-supply = <&vdd_arm>; -}; - -&display_subsystem { - status = "disabled"; -}; - -&gmac2io { - assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>; - assigned-clock-parents = <&gmac_clk>, <&gmac_clk>; - clock_in_out = "input"; - phy-handle = <&rtl8211e>; - phy-mode = "rgmii"; - phy-supply = <&vcc_io>; - pinctrl-0 = <&rgmiim1_pins>; - pinctrl-names = "default"; - snps,aal; - rx_delay = <0x18>; - tx_delay = <0x24>; - status = "okay"; - - mdio { - compatible = "snps,dwmac-mdio"; - #address-cells = <1>; - #size-cells = <0>; - - rtl8211e: ethernet-phy@1 { - reg = <1>; - pinctrl-0 = <ð_phy_reset_pin>; - pinctrl-names = "default"; - reset-assert-us = <10000>; - reset-deassert-us = <50000>; - reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>; - }; - }; -}; - -&i2c1 { - status = "okay"; - - rk805: pmic@18 { - compatible = "rockchip,rk805"; - reg = <0x18>; - interrupt-parent = <&gpio1>; - interrupts = <24 IRQ_TYPE_LEVEL_LOW>; - #clock-cells = <1>; - clock-output-names = "xin32k", "rk805-clkout2"; - gpio-controller; - #gpio-cells = <2>; - pinctrl-0 = <&pmic_int_l>; - pinctrl-names = "default"; - rockchip,system-power-controller; - wakeup-source; - - vcc1-supply = <&vcc_sys>; - vcc2-supply = <&vcc_sys>; - vcc3-supply = <&vcc_sys>; - vcc4-supply = <&vcc_sys>; - vcc5-supply = <&vcc_io>; - vcc6-supply = <&vcc_sys>; - - regulators { - vdd_log: DCDC_REG1 { - regulator-name = "vdd_log"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <712500>; - regulator-max-microvolt = <1450000>; - regulator-ramp-delay = <12500>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1000000>; - }; - }; - - vdd_arm: DCDC_REG2 { - regulator-name = "vdd_arm"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <712500>; - regulator-max-microvolt = <1450000>; - regulator-ramp-delay = <12500>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <950000>; - }; - }; - - vcc_ddr: DCDC_REG3 { - regulator-name = "vcc_ddr"; - regulator-always-on; - regulator-boot-on; - - regulator-state-mem { - regulator-on-in-suspend; - }; - }; - - vcc_io: DCDC_REG4 { - regulator-name = "vcc_io"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <3300000>; - }; - }; - - vcc_18: LDO_REG1 { - regulator-name = "vcc_18"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vcc18_emmc: LDO_REG2 { - regulator-name = "vcc18_emmc"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vdd_10: LDO_REG3 { - regulator-name = "vdd_10"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1000000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1000000>; - }; - }; - }; - }; -}; - -&io_domains { - pmuio-supply = <&vcc_io>; - vccio1-supply = <&vcc_io>; - vccio2-supply = <&vcc18_emmc>; - vccio3-supply = <&vcc_io>; - vccio4-supply = <&vcc_io>; - vccio5-supply = <&vcc_io>; - vccio6-supply = <&vcc_io>; - status = "okay"; -}; - -&pinctrl { - gmac2io { - eth_phy_reset_pin: eth-phy-reset-pin { - rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>; - }; - }; - - leds { - lan_led_pin: lan-led-pin { - rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - sys_led_pin: sys-led-pin { - rockchip,pins = <3 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - wan_led_pin: wan-led-pin { - rockchip,pins = <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - lan { - lan_vdd_pin: lan-vdd-pin { - rockchip,pins = <2 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - pmic { - pmic_int_l: pmic-int-l { - rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; -}; - -&pwm2 { - status = "okay"; -}; - -&sdmmc { - bus-width = <4>; - cap-sd-highspeed; - disable-wp; - pinctrl-0 = <&sdmmc0_clk>, <&sdmmc0_cmd>, <&sdmmc0_dectn>, <&sdmmc0_bus4>; - pinctrl-names = "default"; - vmmc-supply = <&vcc_sd>; - status = "okay"; -}; - -&spi0 { - status = "okay"; - - flash@0 { - compatible = "jedec,spi-nor"; - reg = <0>; - spi-max-frequency = <50000000>; - }; -}; - -&tsadc { - rockchip,hw-tshut-mode = <0>; - rockchip,hw-tshut-polarity = <0>; - status = "okay"; -}; - -&u2phy { - status = "okay"; -}; - -&u2phy_host { - status = "okay"; -}; - -&u2phy_otg { - status = "okay"; -}; - -&uart2 { - status = "okay"; -}; - -&usb20_otg { - dr_mode = "host"; - status = "okay"; -}; - -&usbdrd3 { - dr_mode = "host"; - status = "okay"; - #address-cells = <1>; - #size-cells = <0>; - - /* Second port is for USB 3.0 */ - rtl8153: device@2 { - compatible = "usbbda,8153"; - reg = <2>; - }; -}; - -&usb_host0_ehci { - status = "okay"; -}; - -&usb_host0_ohci { - status = "okay"; -}; diff --git a/arch/arm/dts/rk3328-roc-cc.dts b/arch/arm/dts/rk3328-roc-cc.dts deleted file mode 100644 index 414897a57e7..00000000000 --- a/arch/arm/dts/rk3328-roc-cc.dts +++ /dev/null @@ -1,384 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (c) 2017 T-Chip Intelligent Technology Co., Ltd - */ - -/dts-v1/; -#include "rk3328.dtsi" - -/ { - model = "Firefly roc-rk3328-cc"; - compatible = "firefly,roc-rk3328-cc", "rockchip,rk3328"; - - aliases { - ethernet0 = &gmac2io; - mmc0 = &sdmmc; - mmc1 = &emmc; - }; - - chosen { - stdout-path = "serial2:1500000n8"; - }; - - gmac_clkin: external-gmac-clock { - compatible = "fixed-clock"; - clock-frequency = <125000000>; - clock-output-names = "gmac_clkin"; - #clock-cells = <0>; - }; - - dc_12v: dc-12v { - compatible = "regulator-fixed"; - regulator-name = "dc_12v"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <12000000>; - regulator-max-microvolt = <12000000>; - }; - - vcc_sd: sdmmc-regulator { - compatible = "regulator-fixed"; - gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_LOW>; - pinctrl-names = "default"; - pinctrl-0 = <&sdmmc0m1_pin>; - regulator-boot-on; - regulator-name = "vcc_sd"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <&vcc_io>; - }; - - vcc_sdio: sdmmcio-regulator { - compatible = "regulator-gpio"; - gpios = <&grf_gpio 0 GPIO_ACTIVE_HIGH>; - states = <1800000 0x1>, - <3300000 0x0>; - regulator-name = "vcc_sdio"; - regulator-type = "voltage"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - vin-supply = <&vcc_sys>; - }; - - vcc_host1_5v: vcc_otg_5v: vcc-host1-5v-regulator { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&usb20_host_drv>; - regulator-name = "vcc_host1_5v"; - regulator-always-on; - vin-supply = <&vcc_sys>; - }; - - vcc_sys: vcc-sys { - compatible = "regulator-fixed"; - regulator-name = "vcc_sys"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - vin-supply = <&dc_12v>; - }; - - vcc_phy: vcc-phy-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc_phy"; - regulator-always-on; - regulator-boot-on; - }; - - leds { - compatible = "gpio-leds"; - - power_led: led-0 { - label = "firefly:blue:power"; - linux,default-trigger = "heartbeat"; - gpios = <&rk805 1 GPIO_ACTIVE_LOW>; - default-state = "on"; - }; - - user_led: led-1 { - label = "firefly:yellow:user"; - linux,default-trigger = "mmc1"; - gpios = <&rk805 0 GPIO_ACTIVE_LOW>; - default-state = "off"; - }; - }; -}; - -&analog_sound { - status = "okay"; -}; - -&codec { - status = "okay"; -}; - -&cpu0 { - cpu-supply = <&vdd_arm>; -}; - -&cpu1 { - cpu-supply = <&vdd_arm>; -}; - -&cpu2 { - cpu-supply = <&vdd_arm>; -}; - -&cpu3 { - cpu-supply = <&vdd_arm>; -}; - -&emmc { - bus-width = <8>; - cap-mmc-highspeed; - max-frequency = <150000000>; - mmc-ddr-1_8v; - mmc-hs200-1_8v; - non-removable; - pinctrl-names = "default"; - pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>; - vmmc-supply = <&vcc_io>; - vqmmc-supply = <&vcc18_emmc>; - status = "okay"; -}; - -&gmac2io { - assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>; - assigned-clock-parents = <&gmac_clkin>, <&gmac_clkin>; - clock_in_out = "input"; - phy-supply = <&vcc_phy>; - phy-mode = "rgmii"; - pinctrl-names = "default"; - pinctrl-0 = <&rgmiim1_pins>; - snps,aal; - snps,reset-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>; - snps,reset-active-low; - snps,reset-delays-us = <0 10000 50000>; - snps,rxpbl = <0x4>; - snps,txpbl = <0x4>; - tx_delay = <0x24>; - rx_delay = <0x18>; - status = "okay"; -}; - -&hdmi { - status = "okay"; -}; - -&hdmiphy { - status = "okay"; -}; - -&hdmi_sound { - status = "okay"; -}; - -&i2c1 { - status = "okay"; - - rk805: pmic@18 { - compatible = "rockchip,rk805"; - reg = <0x18>; - interrupt-parent = <&gpio1>; - interrupts = <24 IRQ_TYPE_LEVEL_LOW>; - #clock-cells = <1>; - clock-output-names = "xin32k", "rk805-clkout2"; - gpio-controller; - #gpio-cells = <2>; - pinctrl-names = "default"; - pinctrl-0 = <&pmic_int_l>; - rockchip,system-power-controller; - wakeup-source; - - vcc1-supply = <&vcc_sys>; - vcc2-supply = <&vcc_sys>; - vcc3-supply = <&vcc_sys>; - vcc4-supply = <&vcc_sys>; - vcc5-supply = <&vcc_io>; - vcc6-supply = <&vcc_io>; - - regulators { - vdd_logic: DCDC_REG1 { - regulator-name = "vdd_logic"; - regulator-min-microvolt = <712500>; - regulator-max-microvolt = <1450000>; - regulator-always-on; - regulator-boot-on; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1000000>; - }; - }; - - vdd_arm: DCDC_REG2 { - regulator-name = "vdd_arm"; - regulator-min-microvolt = <712500>; - regulator-max-microvolt = <1450000>; - regulator-always-on; - regulator-boot-on; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <950000>; - }; - }; - - vcc_ddr: DCDC_REG3 { - regulator-name = "vcc_ddr"; - regulator-always-on; - regulator-boot-on; - regulator-state-mem { - regulator-on-in-suspend; - }; - }; - - vcc_io: DCDC_REG4 { - regulator-name = "vcc_io"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - regulator-boot-on; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <3300000>; - }; - }; - - vcc_18: LDO_REG1 { - regulator-name = "vcc_18"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - regulator-boot-on; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vcc18_emmc: LDO_REG2 { - regulator-name = "vcc18_emmc"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - regulator-boot-on; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vdd_10: LDO_REG3 { - regulator-name = "vdd_10"; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1000000>; - regulator-always-on; - regulator-boot-on; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1000000>; - }; - }; - }; - }; -}; - -&i2s0 { - status = "okay"; -}; - -&i2s1 { - status = "okay"; -}; - -&io_domains { - status = "okay"; - - vccio1-supply = <&vcc_io>; - vccio2-supply = <&vcc18_emmc>; - vccio3-supply = <&vcc_sdio>; - vccio4-supply = <&vcc_18>; - vccio5-supply = <&vcc_io>; - vccio6-supply = <&vcc_io>; - pmuio-supply = <&vcc_io>; -}; - -&pinctrl { - pmic { - pmic_int_l: pmic-int-l { - rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - usb2 { - usb20_host_drv: usb20-host-drv { - rockchip,pins = <1 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; -}; - -&sdmmc { - bus-width = <4>; - cap-mmc-highspeed; - cap-sd-highspeed; - disable-wp; - max-frequency = <150000000>; - pinctrl-names = "default"; - pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_dectn &sdmmc0_bus4>; - sd-uhs-sdr12; - sd-uhs-sdr25; - sd-uhs-sdr50; - sd-uhs-sdr104; - vmmc-supply = <&vcc_sd>; - vqmmc-supply = <&vcc_sdio>; - status = "okay"; -}; - -&tsadc { - status = "okay"; -}; - -&u2phy { - status = "okay"; -}; - -&u2phy_host { - status = "okay"; -}; - -&u2phy_otg { - status = "okay"; -}; - -&uart2 { - status = "okay"; -}; - -&usb20_otg { - dr_mode = "host"; - status = "okay"; -}; - -&usbdrd3 { - dr_mode = "host"; - status = "okay"; -}; - -&usb_host0_ehci { - status = "okay"; -}; - -&usb_host0_ohci { - status = "okay"; -}; - -&vop { - status = "okay"; -}; - -&vop_mmu { - status = "okay"; -}; diff --git a/arch/arm/dts/rk3328-rock-pi-e.dts b/arch/arm/dts/rk3328-rock-pi-e.dts deleted file mode 100644 index 3cda6c627b6..00000000000 --- a/arch/arm/dts/rk3328-rock-pi-e.dts +++ /dev/null @@ -1,445 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * (C) Copyright 2020 Chen-Yu Tsai - * - * Based on ./rk3328-rock64.dts, which is - * - * Copyright (c) 2017 PINE64 - */ - -/dts-v1/; - -#include -#include -#include -#include - -#include "rk3328.dtsi" - -/ { - model = "Radxa ROCK Pi E"; - compatible = "radxa,rockpi-e", "rockchip,rk3328"; - - aliases { - ethernet0 = &gmac2io; - ethernet1 = &gmac2phy; - mmc0 = &sdmmc; - mmc1 = &emmc; - }; - - chosen { - stdout-path = "serial2:1500000n8"; - }; - - adc-keys { - compatible = "adc-keys"; - io-channels = <&saradc 0>; - io-channel-names = "buttons"; - keyup-threshold-microvolt = <1750000>; - - /* This button is unpopulated out of the factory. */ - button-recovery { - label = "Recovery"; - linux,code = ; - press-threshold-microvolt = <10000>; - }; - }; - - gmac_clkin: external-gmac-clock { - compatible = "fixed-clock"; - clock-frequency = <125000000>; - clock-output-names = "gmac_clkin"; - #clock-cells = <0>; - }; - - leds { - compatible = "gpio-leds"; - pinctrl-0 = <&led_pin>; - pinctrl-names = "default"; - - led-0 { - color = ; - gpios = <&gpio3 RK_PA5 GPIO_ACTIVE_LOW>; - linux,default-trigger = "heartbeat"; - }; - }; - - vcc_sd: sdmmc-regulator { - compatible = "regulator-fixed"; - gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_LOW>; - pinctrl-names = "default"; - pinctrl-0 = <&sdmmc0m1_pin>; - regulator-name = "vcc_sd"; - regulator-boot-on; - vin-supply = <&vcc_io>; - }; - - vcc_host_5v: vcc-host-5v-regulator { - compatible = "regulator-fixed"; - gpio = <&gpio3 RK_PA7 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&usb30_host_drv>; - enable-active-high; - regulator-name = "vcc_host_5v"; - regulator-always-on; - regulator-boot-on; - vin-supply = <&vcc_sys>; - }; - - vcc_sys: vcc-sys { - compatible = "regulator-fixed"; - regulator-name = "vcc_sys"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - }; - - vcc_wifi: vcc-wifi-regulator { - compatible = "regulator-fixed"; - gpio = <&gpio0 RK_PA0 GPIO_ACTIVE_LOW>; - pinctrl-names = "default"; - pinctrl-0 = <&wifi_en>; - regulator-name = "vcc_wifi"; - regulator-always-on; - regulator-boot-on; - vin-supply = <&vcc_io>; - }; -}; - -&analog_sound { - status = "okay"; -}; - -&codec { - status = "okay"; -}; - -&cpu0 { - cpu-supply = <&vdd_arm>; -}; - -&cpu1 { - cpu-supply = <&vdd_arm>; -}; - -&cpu2 { - cpu-supply = <&vdd_arm>; -}; - -&cpu3 { - cpu-supply = <&vdd_arm>; -}; - -&emmc { - bus-width = <8>; - cap-mmc-highspeed; - mmc-ddr-1_8v; - mmc-hs200-1_8v; - non-removable; - pinctrl-names = "default"; - pinctrl-0 = <&emmc_clk>, <&emmc_cmd>, <&emmc_bus8>; - vmmc-supply = <&vcc_io>; - vqmmc-supply = <&vcc18_emmc>; - status = "okay"; -}; - -&gmac2io { - assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>; - assigned-clock-parents = <&gmac_clkin>, <&gmac_clkin>; - clock_in_out = "input"; - phy-handle = <&rtl8211e>; - phy-mode = "rgmii"; - phy-supply = <&vcc_io>; - pinctrl-names = "default"; - pinctrl-0 = <&rgmiim1_pins>; - snps,aal; - snps,rxpbl = <0x4>; - snps,txpbl = <0x4>; - tx_delay = <0x26>; - rx_delay = <0x11>; - status = "okay"; - - mdio { - compatible = "snps,dwmac-mdio"; - #address-cells = <1>; - #size-cells = <0>; - - rtl8211e: ethernet-phy@1 { - reg = <1>; - pinctrl-0 = <ð_phy_int_pin>, <ð_phy_reset_pin>; - pinctrl-names = "default"; - interrupt-parent = <&gpio1>; - interrupts = <24 IRQ_TYPE_LEVEL_LOW>; - reset-assert-us = <10000>; - reset-deassert-us = <50000>; - reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>; - }; - }; -}; - -&gmac2phy { - status = "okay"; -}; - -&gpio0 { - gpio-line-names = - /* GPIO0_A0 - A7 */ - "", "", "", "", "", "", "", "", - /* GPIO0_B0 - B7 */ - "", "", "", "", "", "", "", "", - /* GPIO0_C0 - C7 */ - "", "", "", "", "", "", "", "", - /* GPIO0_D0 - D7 */ - "", "", "", "pin-15 [GPIO0_D3]", "", "", "", ""; -}; - -&gpio1 { - gpio-line-names = - /* GPIO1_A0 - A7 */ - "", "", "", "", "", "", "", "", - /* GPIO1_B0 - B7 */ - "", "", "", "", "", "", "", "", - /* GPIO1_C0 - C7 */ - "", "", "", "", "", "", "", "", - /* GPIO1_D0 - D7 */ - "", "", "", "", "pin-07 [GPIO1_D4]", "", "", ""; -}; - -&gpio2 { - gpio-line-names = - /* GPIO2_A0 - A7 */ - "pin-08 [GPIO2_A0]", "pin-10 [GPIO2_A1]", "pin-11 [GPIO2_A2]", - "pin-13 [GPIO2-A3]", "pin-27 [GPIO2_A4]", "pin-28 [GPIO2_A5]", - "pin-33 [GPIO2_A6]", "", - /* GPIO2_B0 - B7 */ - "", "", "", "", "pin-26 [GPIO2_B4]", "", "", "pin-36 [GPIO2_B7]", - /* GPIO2_C0 - C7 */ - "pin-32 [GPIO2_C0]", "pin-35 [GPIO2_C1]", "pin-12 [GPIO2_C2]", - "pin-38 [GPIO2_C3]", "pin-29 [GPIO2_C4]", "pin-31 [GPIO2_C5]", - "pin-37 [GPIO2_C6]", "pin-40 [GPIO2_C7]", - /* GPIO2_D0 - D7 */ - "", "", "", "", "", "", "", ""; -}; - -&gpio3 { - gpio-line-names = - /* GPIO3_A0 - A7 */ - "pin-23 [GPIO3_A0]", "pin-19 [GPIO3_A1]", "pin-21 [GPIO3_A2]", - "", "pin-03 [GPIO3_A4]", "", "pin-05 [GPIO3_A6]", "", - /* GPIO3_B0 - B7 */ - "pin-24 [GPIO3_B0]", "", "", "", "", "", "", "", - /* GPIO3_C0 - C7 */ - "", "", "", "", "", "", "", "", - /* GPIO3_D0 - D7 */ - "", "", "", "", "", "", "", ""; -}; - -&i2c1 { - status = "okay"; - - rk805: pmic@18 { - compatible = "rockchip,rk805"; - reg = <0x18>; - interrupt-parent = <&gpio2>; - interrupts = <6 IRQ_TYPE_LEVEL_LOW>; - #clock-cells = <1>; - clock-output-names = "xin32k", "rk805-clkout2"; - gpio-controller; - #gpio-cells = <2>; - pinctrl-names = "default"; - pinctrl-0 = <&pmic_int_l>; - rockchip,system-power-controller; - wakeup-source; - - vcc1-supply = <&vcc_sys>; - vcc2-supply = <&vcc_sys>; - vcc3-supply = <&vcc_sys>; - vcc4-supply = <&vcc_sys>; - vcc5-supply = <&vcc_io>; - vcc6-supply = <&vcc_sys>; - - regulators { - vdd_log: DCDC_REG1 { - regulator-name = "vdd_log"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <712500>; - regulator-max-microvolt = <1450000>; - regulator-ramp-delay = <12500>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1000000>; - }; - }; - - vdd_arm: DCDC_REG2 { - regulator-name = "vdd_arm"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <712500>; - regulator-max-microvolt = <1450000>; - regulator-ramp-delay = <12500>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <950000>; - }; - }; - - vcc_ddr: DCDC_REG3 { - regulator-name = "vcc_ddr"; - regulator-always-on; - regulator-boot-on; - - regulator-state-mem { - regulator-on-in-suspend; - }; - }; - - vcc_io: DCDC_REG4 { - regulator-name = "vcc_io"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <3300000>; - }; - }; - - vcc_18: LDO_REG1 { - regulator-name = "vcc_18"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vcc18_emmc: LDO_REG2 { - regulator-name = "vcc18_emmc"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vdd_10: LDO_REG3 { - regulator-name = "vdd_10"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1000000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1000000>; - }; - }; - }; - }; -}; - -&i2s1 { - status = "okay"; -}; - -&io_domains { - pmuio-supply = <&vcc_io>; - vccio1-supply = <&vcc_io>; - vccio2-supply = <&vcc18_emmc>; - vccio3-supply = <&vcc_io>; - vccio4-supply = <&vcc_io>; - vccio5-supply = <&vcc_io>; - vccio6-supply = <&vcc_io>; - status = "okay"; -}; - -&pinctrl { - ephy { - eth_phy_int_pin: eth-phy-int-pin { - rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_down>; - }; - - eth_phy_reset_pin: eth-phy-reset-pin { - rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>; - }; - }; - - leds { - led_pin: led-pin { - rockchip,pins = <3 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - pmic { - pmic_int_l: pmic-int-l { - rockchip,pins = <2 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - usb3 { - usb30_host_drv: usb30-host-drv { - rockchip,pins = <3 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - wifi { - wifi_en: wifi-en { - rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; -}; - -&sdmmc { - bus-width = <4>; - cap-sd-highspeed; - disable-wp; - pinctrl-names = "default"; - pinctrl-0 = <&sdmmc0_clk>, <&sdmmc0_cmd>, <&sdmmc0_dectn>, <&sdmmc0_bus4>; - vmmc-supply = <&vcc_sd>; - status = "okay"; -}; - -&saradc { - vref-supply = <&vcc_18>; - status = "okay"; -}; - -&tsadc { - status = "okay"; -}; - -&u2phy { - status = "okay"; -}; - -&u2phy_host { - status = "okay"; -}; - -&uart2 { - status = "okay"; -}; - -&usbdrd3 { - dr_mode = "host"; - status = "okay"; -}; - -&usb_host0_ehci { - status = "okay"; -}; diff --git a/arch/arm/dts/rk3328-rock64.dts b/arch/arm/dts/rk3328-rock64.dts deleted file mode 100644 index 229fe9da9c2..00000000000 --- a/arch/arm/dts/rk3328-rock64.dts +++ /dev/null @@ -1,394 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (c) 2017 PINE64 - */ - -/dts-v1/; -#include "rk3328.dtsi" - -/ { - model = "Pine64 Rock64"; - compatible = "pine64,rock64", "rockchip,rk3328"; - - aliases { - ethernet0 = &gmac2io; - mmc0 = &sdmmc; - mmc1 = &emmc; - }; - - chosen { - stdout-path = "serial2:1500000n8"; - }; - - gmac_clkin: external-gmac-clock { - compatible = "fixed-clock"; - clock-frequency = <125000000>; - clock-output-names = "gmac_clkin"; - #clock-cells = <0>; - }; - - vcc_sd: sdmmc-regulator { - compatible = "regulator-fixed"; - gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_LOW>; - pinctrl-names = "default"; - pinctrl-0 = <&sdmmc0m1_pin>; - regulator-name = "vcc_sd"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <&vcc_io>; - }; - - /* Common enable line for all of the rails mentioned in the labels */ - vcc_host_5v: vcc_host1_5v: vcc_otg_5v: vcc-host-5v-regulator { - compatible = "regulator-fixed"; - gpio = <&gpio0 RK_PA2 GPIO_ACTIVE_LOW>; - pinctrl-names = "default"; - pinctrl-0 = <&usb20_host_drv>; - regulator-name = "vcc_host_5v"; - regulator-always-on; - regulator-boot-on; - vin-supply = <&vcc_sys>; - }; - - vcc_sys: vcc-sys { - compatible = "regulator-fixed"; - regulator-name = "vcc_sys"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - }; - - ir-receiver { - compatible = "gpio-ir-receiver"; - gpios = <&gpio2 RK_PA2 GPIO_ACTIVE_LOW>; - pinctrl-0 = <&ir_int>; - pinctrl-names = "default"; - }; - - leds { - compatible = "gpio-leds"; - - power_led: led-0 { - gpios = <&rk805 1 GPIO_ACTIVE_LOW>; - linux,default-trigger = "mmc0"; - }; - - standby_led: led-1 { - gpios = <&rk805 0 GPIO_ACTIVE_LOW>; - linux,default-trigger = "heartbeat"; - }; - }; - - spdif_sound: spdif-sound { - compatible = "simple-audio-card"; - simple-audio-card,name = "SPDIF"; - - simple-audio-card,cpu { - sound-dai = <&spdif>; - }; - - simple-audio-card,codec { - sound-dai = <&spdif_dit>; - }; - }; - - spdif_dit: spdif-dit { - compatible = "linux,spdif-dit"; - #sound-dai-cells = <0>; - }; -}; - -&analog_sound { - status = "okay"; -}; - -&codec { - mute-gpios = <&grf_gpio 0 GPIO_ACTIVE_LOW>; - status = "okay"; -}; - -&cpu0 { - cpu-supply = <&vdd_arm>; -}; - -&cpu1 { - cpu-supply = <&vdd_arm>; -}; - -&cpu2 { - cpu-supply = <&vdd_arm>; -}; - -&cpu3 { - cpu-supply = <&vdd_arm>; -}; - -&emmc { - bus-width = <8>; - cap-mmc-highspeed; - mmc-hs200-1_8v; - non-removable; - pinctrl-names = "default"; - pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>; - vmmc-supply = <&vcc_io>; - vqmmc-supply = <&vcc18_emmc>; - status = "okay"; -}; - -&gmac2io { - assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>; - assigned-clock-parents = <&gmac_clkin>, <&gmac_clkin>; - clock_in_out = "input"; - phy-supply = <&vcc_io>; - phy-mode = "rgmii"; - pinctrl-names = "default"; - pinctrl-0 = <&rgmiim1_pins>; - snps,force_thresh_dma_mode; - snps,reset-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>; - snps,reset-active-low; - snps,reset-delays-us = <0 10000 50000>; - tx_delay = <0x24>; - rx_delay = <0x18>; - status = "okay"; -}; - -&hdmi { - status = "okay"; -}; - -&hdmi_sound { - status = "okay"; -}; - -&hdmiphy { - status = "okay"; -}; - -&i2c1 { - status = "okay"; - - rk805: pmic@18 { - compatible = "rockchip,rk805"; - reg = <0x18>; - interrupt-parent = <&gpio2>; - interrupts = <6 IRQ_TYPE_LEVEL_LOW>; - #clock-cells = <1>; - clock-output-names = "xin32k", "rk805-clkout2"; - gpio-controller; - #gpio-cells = <2>; - pinctrl-names = "default"; - pinctrl-0 = <&pmic_int_l>; - rockchip,system-power-controller; - wakeup-source; - - vcc1-supply = <&vcc_sys>; - vcc2-supply = <&vcc_sys>; - vcc3-supply = <&vcc_sys>; - vcc4-supply = <&vcc_sys>; - vcc5-supply = <&vcc_io>; - vcc6-supply = <&vcc_sys>; - - regulators { - vdd_logic: DCDC_REG1 { - regulator-name = "vdd_logic"; - regulator-min-microvolt = <712500>; - regulator-max-microvolt = <1450000>; - regulator-ramp-delay = <12500>; - regulator-always-on; - regulator-boot-on; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1000000>; - }; - }; - - vdd_arm: DCDC_REG2 { - regulator-name = "vdd_arm"; - regulator-min-microvolt = <712500>; - regulator-max-microvolt = <1450000>; - regulator-ramp-delay = <12500>; - regulator-always-on; - regulator-boot-on; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <950000>; - }; - }; - - vcc_ddr: DCDC_REG3 { - regulator-name = "vcc_ddr"; - regulator-always-on; - regulator-boot-on; - regulator-state-mem { - regulator-on-in-suspend; - }; - }; - - vcc_io: DCDC_REG4 { - regulator-name = "vcc_io"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - regulator-boot-on; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <3300000>; - }; - }; - - vcc_18: LDO_REG1 { - regulator-name = "vcc_18"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - regulator-boot-on; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vcc18_emmc: LDO_REG2 { - regulator-name = "vcc18_emmc"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - regulator-boot-on; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vdd_10: LDO_REG3 { - regulator-name = "vdd_10"; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1000000>; - regulator-always-on; - regulator-boot-on; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1000000>; - }; - }; - }; - }; -}; - -&i2s0 { - status = "okay"; -}; - -&i2s1 { - status = "okay"; -}; - -&io_domains { - status = "okay"; - - vccio1-supply = <&vcc_io>; - vccio2-supply = <&vcc18_emmc>; - vccio3-supply = <&vcc_io>; - vccio4-supply = <&vcc_18>; - vccio5-supply = <&vcc_io>; - vccio6-supply = <&vcc_io>; - pmuio-supply = <&vcc_io>; -}; - -&pinctrl { - ir { - ir_int: ir-int { - rockchip,pins = <2 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - pmic { - pmic_int_l: pmic-int-l { - rockchip,pins = <2 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - usb2 { - usb20_host_drv: usb20-host-drv { - rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; -}; - -&sdmmc { - bus-width = <4>; - cap-mmc-highspeed; - cap-sd-highspeed; - disable-wp; - max-frequency = <150000000>; - pinctrl-names = "default"; - pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_dectn &sdmmc0_bus4>; - vmmc-supply = <&vcc_sd>; - status = "okay"; -}; - -&spdif { - pinctrl-0 = <&spdifm0_tx>; - status = "okay"; -}; - -&spi0 { - status = "okay"; - - flash@0 { - compatible = "jedec,spi-nor"; - reg = <0>; - - /* maximum speed for Rockchip SPI */ - spi-max-frequency = <50000000>; - }; -}; - -&tsadc { - rockchip,hw-tshut-mode = <0>; - rockchip,hw-tshut-polarity = <0>; - status = "okay"; -}; - -&uart2 { - status = "okay"; -}; - -&u2phy { - status = "okay"; - - u2phy_host: host-port { - status = "okay"; - }; - - u2phy_otg: otg-port { - status = "okay"; - }; -}; - -&usb20_otg { - dr_mode = "host"; - status = "okay"; -}; - -&usbdrd3 { - dr_mode = "host"; - status = "okay"; -}; - -&usb_host0_ehci { - status = "okay"; -}; - -&usb_host0_ohci { - status = "okay"; -}; - -&vop { - status = "okay"; -}; - -&vop_mmu { - status = "okay"; -}; diff --git a/arch/arm/dts/rk3328.dtsi b/arch/arm/dts/rk3328.dtsi deleted file mode 100644 index fb5dcf6e932..00000000000 --- a/arch/arm/dts/rk3328.dtsi +++ /dev/null @@ -1,1944 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd - */ - -#include -#include -#include -#include -#include -#include -#include -#include - -/ { - compatible = "rockchip,rk3328"; - - interrupt-parent = <&gic>; - #address-cells = <2>; - #size-cells = <2>; - - aliases { - gpio0 = &gpio0; - gpio1 = &gpio1; - gpio2 = &gpio2; - gpio3 = &gpio3; - serial0 = &uart0; - serial1 = &uart1; - serial2 = &uart2; - i2c0 = &i2c0; - i2c1 = &i2c1; - i2c2 = &i2c2; - i2c3 = &i2c3; - }; - - cpus { - #address-cells = <2>; - #size-cells = <0>; - - cpu0: cpu@0 { - device_type = "cpu"; - compatible = "arm,cortex-a53"; - reg = <0x0 0x0>; - clocks = <&cru ARMCLK>; - #cooling-cells = <2>; - cpu-idle-states = <&CPU_SLEEP>; - dynamic-power-coefficient = <120>; - enable-method = "psci"; - next-level-cache = <&l2>; - operating-points-v2 = <&cpu0_opp_table>; - }; - - cpu1: cpu@1 { - device_type = "cpu"; - compatible = "arm,cortex-a53"; - reg = <0x0 0x1>; - clocks = <&cru ARMCLK>; - #cooling-cells = <2>; - cpu-idle-states = <&CPU_SLEEP>; - dynamic-power-coefficient = <120>; - enable-method = "psci"; - next-level-cache = <&l2>; - operating-points-v2 = <&cpu0_opp_table>; - }; - - cpu2: cpu@2 { - device_type = "cpu"; - compatible = "arm,cortex-a53"; - reg = <0x0 0x2>; - clocks = <&cru ARMCLK>; - #cooling-cells = <2>; - cpu-idle-states = <&CPU_SLEEP>; - dynamic-power-coefficient = <120>; - enable-method = "psci"; - next-level-cache = <&l2>; - operating-points-v2 = <&cpu0_opp_table>; - }; - - cpu3: cpu@3 { - device_type = "cpu"; - compatible = "arm,cortex-a53"; - reg = <0x0 0x3>; - clocks = <&cru ARMCLK>; - #cooling-cells = <2>; - cpu-idle-states = <&CPU_SLEEP>; - dynamic-power-coefficient = <120>; - enable-method = "psci"; - next-level-cache = <&l2>; - operating-points-v2 = <&cpu0_opp_table>; - }; - - idle-states { - entry-method = "psci"; - - CPU_SLEEP: cpu-sleep { - compatible = "arm,idle-state"; - local-timer-stop; - arm,psci-suspend-param = <0x0010000>; - entry-latency-us = <120>; - exit-latency-us = <250>; - min-residency-us = <900>; - }; - }; - - l2: l2-cache0 { - compatible = "cache"; - cache-level = <2>; - cache-unified; - }; - }; - - cpu0_opp_table: opp-table-0 { - compatible = "operating-points-v2"; - opp-shared; - - opp-408000000 { - opp-hz = /bits/ 64 <408000000>; - opp-microvolt = <950000>; - clock-latency-ns = <40000>; - opp-suspend; - }; - opp-600000000 { - opp-hz = /bits/ 64 <600000000>; - opp-microvolt = <950000>; - clock-latency-ns = <40000>; - }; - opp-816000000 { - opp-hz = /bits/ 64 <816000000>; - opp-microvolt = <1000000>; - clock-latency-ns = <40000>; - }; - opp-1008000000 { - opp-hz = /bits/ 64 <1008000000>; - opp-microvolt = <1100000>; - clock-latency-ns = <40000>; - }; - opp-1200000000 { - opp-hz = /bits/ 64 <1200000000>; - opp-microvolt = <1225000>; - clock-latency-ns = <40000>; - }; - opp-1296000000 { - opp-hz = /bits/ 64 <1296000000>; - opp-microvolt = <1300000>; - clock-latency-ns = <40000>; - }; - }; - - analog_sound: analog-sound { - compatible = "simple-audio-card"; - simple-audio-card,format = "i2s"; - simple-audio-card,mclk-fs = <256>; - simple-audio-card,name = "Analog"; - status = "disabled"; - - simple-audio-card,cpu { - sound-dai = <&i2s1>; - }; - - simple-audio-card,codec { - sound-dai = <&codec>; - }; - }; - - arm-pmu { - compatible = "arm,cortex-a53-pmu"; - interrupts = , - , - , - ; - interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; - }; - - display_subsystem: display-subsystem { - compatible = "rockchip,display-subsystem"; - ports = <&vop_out>; - }; - - hdmi_sound: hdmi-sound { - compatible = "simple-audio-card"; - simple-audio-card,format = "i2s"; - simple-audio-card,mclk-fs = <128>; - simple-audio-card,name = "HDMI"; - status = "disabled"; - - simple-audio-card,cpu { - sound-dai = <&i2s0>; - }; - - simple-audio-card,codec { - sound-dai = <&hdmi>; - }; - }; - - psci { - compatible = "arm,psci-1.0", "arm,psci-0.2"; - method = "smc"; - }; - - timer { - compatible = "arm,armv8-timer"; - interrupts = , - , - , - ; - }; - - xin24m: xin24m { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <24000000>; - clock-output-names = "xin24m"; - }; - - i2s0: i2s@ff000000 { - compatible = "rockchip,rk3328-i2s", "rockchip,rk3066-i2s"; - reg = <0x0 0xff000000 0x0 0x1000>; - interrupts = ; - clocks = <&cru SCLK_I2S0>, <&cru HCLK_I2S0_8CH>; - clock-names = "i2s_clk", "i2s_hclk"; - dmas = <&dmac 11>, <&dmac 12>; - dma-names = "tx", "rx"; - #sound-dai-cells = <0>; - status = "disabled"; - }; - - i2s1: i2s@ff010000 { - compatible = "rockchip,rk3328-i2s", "rockchip,rk3066-i2s"; - reg = <0x0 0xff010000 0x0 0x1000>; - interrupts = ; - clocks = <&cru SCLK_I2S1>, <&cru HCLK_I2S1_8CH>; - clock-names = "i2s_clk", "i2s_hclk"; - dmas = <&dmac 14>, <&dmac 15>; - dma-names = "tx", "rx"; - #sound-dai-cells = <0>; - status = "disabled"; - }; - - i2s2: i2s@ff020000 { - compatible = "rockchip,rk3328-i2s", "rockchip,rk3066-i2s"; - reg = <0x0 0xff020000 0x0 0x1000>; - interrupts = ; - clocks = <&cru SCLK_I2S2>, <&cru HCLK_I2S2_2CH>; - clock-names = "i2s_clk", "i2s_hclk"; - dmas = <&dmac 0>, <&dmac 1>; - dma-names = "tx", "rx"; - #sound-dai-cells = <0>; - status = "disabled"; - }; - - spdif: spdif@ff030000 { - compatible = "rockchip,rk3328-spdif"; - reg = <0x0 0xff030000 0x0 0x1000>; - interrupts = ; - clocks = <&cru SCLK_SPDIF>, <&cru HCLK_SPDIF_8CH>; - clock-names = "mclk", "hclk"; - dmas = <&dmac 10>; - dma-names = "tx"; - pinctrl-names = "default"; - pinctrl-0 = <&spdifm2_tx>; - #sound-dai-cells = <0>; - status = "disabled"; - }; - - pdm: pdm@ff040000 { - compatible = "rockchip,pdm"; - reg = <0x0 0xff040000 0x0 0x1000>; - clocks = <&cru SCLK_PDM>, <&cru HCLK_PDM>; - clock-names = "pdm_clk", "pdm_hclk"; - dmas = <&dmac 16>; - dma-names = "rx"; - pinctrl-names = "default", "sleep"; - pinctrl-0 = <&pdmm0_clk - &pdmm0_sdi0 - &pdmm0_sdi1 - &pdmm0_sdi2 - &pdmm0_sdi3>; - pinctrl-1 = <&pdmm0_clk_sleep - &pdmm0_sdi0_sleep - &pdmm0_sdi1_sleep - &pdmm0_sdi2_sleep - &pdmm0_sdi3_sleep>; - status = "disabled"; - }; - - grf: syscon@ff100000 { - compatible = "rockchip,rk3328-grf", "syscon", "simple-mfd"; - reg = <0x0 0xff100000 0x0 0x1000>; - - io_domains: io-domains { - compatible = "rockchip,rk3328-io-voltage-domain"; - status = "disabled"; - }; - - grf_gpio: gpio { - compatible = "rockchip,rk3328-grf-gpio"; - gpio-controller; - #gpio-cells = <2>; - }; - - power: power-controller { - compatible = "rockchip,rk3328-power-controller"; - #power-domain-cells = <1>; - #address-cells = <1>; - #size-cells = <0>; - - power-domain@RK3328_PD_HEVC { - reg = ; - #power-domain-cells = <0>; - }; - power-domain@RK3328_PD_VIDEO { - reg = ; - clocks = <&cru ACLK_RKVDEC>, - <&cru HCLK_RKVDEC>, - <&cru SCLK_VDEC_CABAC>, - <&cru SCLK_VDEC_CORE>; - #power-domain-cells = <0>; - }; - power-domain@RK3328_PD_VPU { - reg = ; - clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>; - #power-domain-cells = <0>; - }; - }; - - reboot-mode { - compatible = "syscon-reboot-mode"; - offset = <0x5c8>; - mode-normal = ; - mode-recovery = ; - mode-bootloader = ; - mode-loader = ; - }; - }; - - uart0: serial@ff110000 { - compatible = "rockchip,rk3328-uart", "snps,dw-apb-uart"; - reg = <0x0 0xff110000 0x0 0x100>; - interrupts = ; - clocks = <&cru SCLK_UART0>, <&cru PCLK_UART0>; - clock-names = "baudclk", "apb_pclk"; - dmas = <&dmac 2>, <&dmac 3>; - dma-names = "tx", "rx"; - pinctrl-names = "default"; - pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>; - reg-io-width = <4>; - reg-shift = <2>; - status = "disabled"; - }; - - uart1: serial@ff120000 { - compatible = "rockchip,rk3328-uart", "snps,dw-apb-uart"; - reg = <0x0 0xff120000 0x0 0x100>; - interrupts = ; - clocks = <&cru SCLK_UART1>, <&cru PCLK_UART1>; - clock-names = "baudclk", "apb_pclk"; - dmas = <&dmac 4>, <&dmac 5>; - dma-names = "tx", "rx"; - pinctrl-names = "default"; - pinctrl-0 = <&uart1_xfer &uart1_cts &uart1_rts>; - reg-io-width = <4>; - reg-shift = <2>; - status = "disabled"; - }; - - uart2: serial@ff130000 { - compatible = "rockchip,rk3328-uart", "snps,dw-apb-uart"; - reg = <0x0 0xff130000 0x0 0x100>; - interrupts = ; - clocks = <&cru SCLK_UART2>, <&cru PCLK_UART2>; - clock-names = "baudclk", "apb_pclk"; - dmas = <&dmac 6>, <&dmac 7>; - dma-names = "tx", "rx"; - pinctrl-names = "default"; - pinctrl-0 = <&uart2m1_xfer>; - reg-io-width = <4>; - reg-shift = <2>; - status = "disabled"; - }; - - i2c0: i2c@ff150000 { - compatible = "rockchip,rk3328-i2c", "rockchip,rk3399-i2c"; - reg = <0x0 0xff150000 0x0 0x1000>; - interrupts = ; - #address-cells = <1>; - #size-cells = <0>; - clocks = <&cru SCLK_I2C0>, <&cru PCLK_I2C0>; - clock-names = "i2c", "pclk"; - pinctrl-names = "default"; - pinctrl-0 = <&i2c0_xfer>; - status = "disabled"; - }; - - i2c1: i2c@ff160000 { - compatible = "rockchip,rk3328-i2c", "rockchip,rk3399-i2c"; - reg = <0x0 0xff160000 0x0 0x1000>; - interrupts = ; - #address-cells = <1>; - #size-cells = <0>; - clocks = <&cru SCLK_I2C1>, <&cru PCLK_I2C1>; - clock-names = "i2c", "pclk"; - pinctrl-names = "default"; - pinctrl-0 = <&i2c1_xfer>; - status = "disabled"; - }; - - i2c2: i2c@ff170000 { - compatible = "rockchip,rk3328-i2c", "rockchip,rk3399-i2c"; - reg = <0x0 0xff170000 0x0 0x1000>; - interrupts = ; - #address-cells = <1>; - #size-cells = <0>; - clocks = <&cru SCLK_I2C2>, <&cru PCLK_I2C2>; - clock-names = "i2c", "pclk"; - pinctrl-names = "default"; - pinctrl-0 = <&i2c2_xfer>; - status = "disabled"; - }; - - i2c3: i2c@ff180000 { - compatible = "rockchip,rk3328-i2c", "rockchip,rk3399-i2c"; - reg = <0x0 0xff180000 0x0 0x1000>; - interrupts = ; - #address-cells = <1>; - #size-cells = <0>; - clocks = <&cru SCLK_I2C3>, <&cru PCLK_I2C3>; - clock-names = "i2c", "pclk"; - pinctrl-names = "default"; - pinctrl-0 = <&i2c3_xfer>; - status = "disabled"; - }; - - spi0: spi@ff190000 { - compatible = "rockchip,rk3328-spi", "rockchip,rk3066-spi"; - reg = <0x0 0xff190000 0x0 0x1000>; - interrupts = ; - #address-cells = <1>; - #size-cells = <0>; - clocks = <&cru SCLK_SPI>, <&cru PCLK_SPI>; - clock-names = "spiclk", "apb_pclk"; - dmas = <&dmac 8>, <&dmac 9>; - dma-names = "tx", "rx"; - pinctrl-names = "default"; - pinctrl-0 = <&spi0m2_clk &spi0m2_tx &spi0m2_rx &spi0m2_cs0>; - status = "disabled"; - }; - - wdt: watchdog@ff1a0000 { - compatible = "rockchip,rk3328-wdt", "snps,dw-wdt"; - reg = <0x0 0xff1a0000 0x0 0x100>; - interrupts = ; - clocks = <&cru PCLK_WDT>; - }; - - pwm0: pwm@ff1b0000 { - compatible = "rockchip,rk3328-pwm"; - reg = <0x0 0xff1b0000 0x0 0x10>; - clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>; - clock-names = "pwm", "pclk"; - pinctrl-names = "default"; - pinctrl-0 = <&pwm0_pin>; - #pwm-cells = <3>; - status = "disabled"; - }; - - pwm1: pwm@ff1b0010 { - compatible = "rockchip,rk3328-pwm"; - reg = <0x0 0xff1b0010 0x0 0x10>; - clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>; - clock-names = "pwm", "pclk"; - pinctrl-names = "default"; - pinctrl-0 = <&pwm1_pin>; - #pwm-cells = <3>; - status = "disabled"; - }; - - pwm2: pwm@ff1b0020 { - compatible = "rockchip,rk3328-pwm"; - reg = <0x0 0xff1b0020 0x0 0x10>; - clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>; - clock-names = "pwm", "pclk"; - pinctrl-names = "default"; - pinctrl-0 = <&pwm2_pin>; - #pwm-cells = <3>; - status = "disabled"; - }; - - pwm3: pwm@ff1b0030 { - compatible = "rockchip,rk3328-pwm"; - reg = <0x0 0xff1b0030 0x0 0x10>; - interrupts = ; - clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>; - clock-names = "pwm", "pclk"; - pinctrl-names = "default"; - pinctrl-0 = <&pwmir_pin>; - #pwm-cells = <3>; - status = "disabled"; - }; - - dmac: dma-controller@ff1f0000 { - compatible = "arm,pl330", "arm,primecell"; - reg = <0x0 0xff1f0000 0x0 0x4000>; - interrupts = , - ; - arm,pl330-periph-burst; - clocks = <&cru ACLK_DMAC>; - clock-names = "apb_pclk"; - #dma-cells = <1>; - }; - - thermal-zones { - soc_thermal: soc-thermal { - polling-delay-passive = <20>; - polling-delay = <1000>; - sustainable-power = <1000>; - - thermal-sensors = <&tsadc 0>; - - trips { - threshold: trip-point0 { - temperature = <70000>; - hysteresis = <2000>; - type = "passive"; - }; - target: trip-point1 { - temperature = <85000>; - hysteresis = <2000>; - type = "passive"; - }; - soc_crit: soc-crit { - temperature = <95000>; - hysteresis = <2000>; - type = "critical"; - }; - }; - - cooling-maps { - map0 { - trip = <&target>; - cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; - contribution = <4096>; - }; - }; - }; - - }; - - tsadc: tsadc@ff250000 { - compatible = "rockchip,rk3328-tsadc"; - reg = <0x0 0xff250000 0x0 0x100>; - interrupts = ; - assigned-clocks = <&cru SCLK_TSADC>; - assigned-clock-rates = <50000>; - clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>; - clock-names = "tsadc", "apb_pclk"; - pinctrl-names = "init", "default", "sleep"; - pinctrl-0 = <&otp_pin>; - pinctrl-1 = <&otp_out>; - pinctrl-2 = <&otp_pin>; - resets = <&cru SRST_TSADC>; - reset-names = "tsadc-apb"; - rockchip,grf = <&grf>; - rockchip,hw-tshut-temp = <100000>; - #thermal-sensor-cells = <1>; - status = "disabled"; - }; - - efuse: efuse@ff260000 { - compatible = "rockchip,rk3328-efuse"; - reg = <0x0 0xff260000 0x0 0x50>; - #address-cells = <1>; - #size-cells = <1>; - clocks = <&cru SCLK_EFUSE>; - clock-names = "pclk_efuse"; - rockchip,efuse-size = <0x20>; - - /* Data cells */ - efuse_id: id@7 { - reg = <0x07 0x10>; - }; - cpu_leakage: cpu-leakage@17 { - reg = <0x17 0x1>; - }; - logic_leakage: logic-leakage@19 { - reg = <0x19 0x1>; - }; - efuse_cpu_version: cpu-version@1a { - reg = <0x1a 0x1>; - bits = <3 3>; - }; - }; - - saradc: adc@ff280000 { - compatible = "rockchip,rk3328-saradc", "rockchip,rk3399-saradc"; - reg = <0x0 0xff280000 0x0 0x100>; - interrupts = ; - #io-channel-cells = <1>; - clocks = <&cru SCLK_SARADC>, <&cru PCLK_SARADC>; - clock-names = "saradc", "apb_pclk"; - resets = <&cru SRST_SARADC_P>; - reset-names = "saradc-apb"; - status = "disabled"; - }; - - gpu: gpu@ff300000 { - compatible = "rockchip,rk3328-mali", "arm,mali-450"; - reg = <0x0 0xff300000 0x0 0x30000>; - interrupts = , - , - , - , - , - , - ; - interrupt-names = "gp", - "gpmmu", - "pp", - "pp0", - "ppmmu0", - "pp1", - "ppmmu1"; - clocks = <&cru ACLK_GPU>, <&cru ACLK_GPU>; - clock-names = "bus", "core"; - resets = <&cru SRST_GPU_A>; - }; - - h265e_mmu: iommu@ff330200 { - compatible = "rockchip,iommu"; - reg = <0x0 0xff330200 0 0x100>; - interrupts = ; - clocks = <&cru ACLK_H265>, <&cru PCLK_H265>; - clock-names = "aclk", "iface"; - #iommu-cells = <0>; - status = "disabled"; - }; - - vepu_mmu: iommu@ff340800 { - compatible = "rockchip,iommu"; - reg = <0x0 0xff340800 0x0 0x40>; - interrupts = ; - clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>; - clock-names = "aclk", "iface"; - #iommu-cells = <0>; - status = "disabled"; - }; - - vpu: video-codec@ff350000 { - compatible = "rockchip,rk3328-vpu"; - reg = <0x0 0xff350000 0x0 0x800>; - interrupts = ; - interrupt-names = "vdpu"; - clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>; - clock-names = "aclk", "hclk"; - iommus = <&vpu_mmu>; - power-domains = <&power RK3328_PD_VPU>; - }; - - vpu_mmu: iommu@ff350800 { - compatible = "rockchip,iommu"; - reg = <0x0 0xff350800 0x0 0x40>; - interrupts = ; - clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>; - clock-names = "aclk", "iface"; - #iommu-cells = <0>; - power-domains = <&power RK3328_PD_VPU>; - }; - - vdec: video-codec@ff360000 { - compatible = "rockchip,rk3328-vdec", "rockchip,rk3399-vdec"; - reg = <0x0 0xff360000 0x0 0x480>; - interrupts = ; - clocks = <&cru ACLK_RKVDEC>, <&cru HCLK_RKVDEC>, - <&cru SCLK_VDEC_CABAC>, <&cru SCLK_VDEC_CORE>; - clock-names = "axi", "ahb", "cabac", "core"; - assigned-clocks = <&cru ACLK_RKVDEC>, <&cru SCLK_VDEC_CABAC>, - <&cru SCLK_VDEC_CORE>; - assigned-clock-rates = <400000000>, <400000000>, <300000000>; - iommus = <&vdec_mmu>; - power-domains = <&power RK3328_PD_VIDEO>; - }; - - vdec_mmu: iommu@ff360480 { - compatible = "rockchip,iommu"; - reg = <0x0 0xff360480 0x0 0x40>, <0x0 0xff3604c0 0x0 0x40>; - interrupts = ; - clocks = <&cru ACLK_RKVDEC>, <&cru HCLK_RKVDEC>; - clock-names = "aclk", "iface"; - #iommu-cells = <0>; - power-domains = <&power RK3328_PD_VIDEO>; - }; - - vop: vop@ff370000 { - compatible = "rockchip,rk3328-vop"; - reg = <0x0 0xff370000 0x0 0x3efc>; - interrupts = ; - clocks = <&cru ACLK_VOP>, <&cru DCLK_LCDC>, <&cru HCLK_VOP>; - clock-names = "aclk_vop", "dclk_vop", "hclk_vop"; - resets = <&cru SRST_VOP_A>, <&cru SRST_VOP_H>, <&cru SRST_VOP_D>; - reset-names = "axi", "ahb", "dclk"; - iommus = <&vop_mmu>; - status = "disabled"; - - vop_out: port { - #address-cells = <1>; - #size-cells = <0>; - - vop_out_hdmi: endpoint@0 { - reg = <0>; - remote-endpoint = <&hdmi_in_vop>; - }; - }; - }; - - vop_mmu: iommu@ff373f00 { - compatible = "rockchip,iommu"; - reg = <0x0 0xff373f00 0x0 0x100>; - interrupts = ; - clocks = <&cru ACLK_VOP>, <&cru HCLK_VOP>; - clock-names = "aclk", "iface"; - #iommu-cells = <0>; - status = "disabled"; - }; - - hdmi: hdmi@ff3c0000 { - compatible = "rockchip,rk3328-dw-hdmi"; - reg = <0x0 0xff3c0000 0x0 0x20000>; - reg-io-width = <4>; - interrupts = , - ; - clocks = <&cru PCLK_HDMI>, - <&cru SCLK_HDMI_SFC>, - <&cru SCLK_RTC32K>; - clock-names = "iahb", - "isfr", - "cec"; - phys = <&hdmiphy>; - phy-names = "hdmi"; - pinctrl-names = "default"; - pinctrl-0 = <&hdmi_cec &hdmii2c_xfer &hdmi_hpd>; - rockchip,grf = <&grf>; - #sound-dai-cells = <0>; - status = "disabled"; - - ports { - hdmi_in: port { - hdmi_in_vop: endpoint { - remote-endpoint = <&vop_out_hdmi>; - }; - }; - }; - }; - - codec: codec@ff410000 { - compatible = "rockchip,rk3328-codec"; - reg = <0x0 0xff410000 0x0 0x1000>; - clocks = <&cru PCLK_ACODECPHY>, <&cru SCLK_I2S1>; - clock-names = "pclk", "mclk"; - rockchip,grf = <&grf>; - #sound-dai-cells = <0>; - status = "disabled"; - }; - - hdmiphy: phy@ff430000 { - compatible = "rockchip,rk3328-hdmi-phy"; - reg = <0x0 0xff430000 0x0 0x10000>; - interrupts = ; - clocks = <&cru PCLK_HDMIPHY>, <&xin24m>, <&cru DCLK_HDMIPHY>; - clock-names = "sysclk", "refoclk", "refpclk"; - clock-output-names = "hdmi_phy"; - #clock-cells = <0>; - nvmem-cells = <&efuse_cpu_version>; - nvmem-cell-names = "cpu-version"; - #phy-cells = <0>; - status = "disabled"; - }; - - cru: clock-controller@ff440000 { - compatible = "rockchip,rk3328-cru", "rockchip,cru", "syscon"; - reg = <0x0 0xff440000 0x0 0x1000>; - rockchip,grf = <&grf>; - #clock-cells = <1>; - #reset-cells = <1>; - assigned-clocks = - /* - * CPLL should run at 1200, but that is to high for - * the initial dividers of most of its children. - * We need set cpll child clk div first, - * and then set the cpll frequency. - */ - <&cru DCLK_LCDC>, <&cru SCLK_PDM>, - <&cru SCLK_RTC32K>, <&cru SCLK_UART0>, - <&cru SCLK_UART1>, <&cru SCLK_UART2>, - <&cru ACLK_BUS_PRE>, <&cru ACLK_PERI_PRE>, - <&cru ACLK_VIO_PRE>, <&cru ACLK_RGA_PRE>, - <&cru ACLK_VOP_PRE>, <&cru ACLK_RKVDEC_PRE>, - <&cru ACLK_RKVENC>, <&cru ACLK_VPU_PRE>, - <&cru SCLK_VDEC_CABAC>, <&cru SCLK_VDEC_CORE>, - <&cru SCLK_VENC_CORE>, <&cru SCLK_VENC_DSP>, - <&cru SCLK_SDIO>, <&cru SCLK_TSP>, - <&cru SCLK_WIFI>, <&cru ARMCLK>, - <&cru PLL_GPLL>, <&cru PLL_CPLL>, - <&cru ACLK_BUS_PRE>, <&cru HCLK_BUS_PRE>, - <&cru PCLK_BUS_PRE>, <&cru ACLK_PERI_PRE>, - <&cru HCLK_PERI>, <&cru PCLK_PERI>, - <&cru SCLK_RTC32K>; - assigned-clock-parents = - <&cru HDMIPHY>, <&cru PLL_APLL>, - <&cru PLL_GPLL>, <&xin24m>, - <&xin24m>, <&xin24m>; - assigned-clock-rates = - <0>, <61440000>, - <0>, <24000000>, - <24000000>, <24000000>, - <15000000>, <15000000>, - <100000000>, <100000000>, - <100000000>, <100000000>, - <50000000>, <100000000>, - <100000000>, <100000000>, - <50000000>, <50000000>, - <50000000>, <50000000>, - <24000000>, <600000000>, - <491520000>, <1200000000>, - <150000000>, <75000000>, - <75000000>, <150000000>, - <75000000>, <75000000>, - <32768>; - }; - - usb2phy_grf: syscon@ff450000 { - compatible = "rockchip,rk3328-usb2phy-grf", "syscon", - "simple-mfd"; - reg = <0x0 0xff450000 0x0 0x10000>; - #address-cells = <1>; - #size-cells = <1>; - - u2phy: usb2phy@100 { - compatible = "rockchip,rk3328-usb2phy"; - reg = <0x100 0x10>; - clocks = <&xin24m>; - clock-names = "phyclk"; - clock-output-names = "usb480m_phy"; - #clock-cells = <0>; - assigned-clocks = <&cru USB480M>; - assigned-clock-parents = <&u2phy>; - status = "disabled"; - - u2phy_otg: otg-port { - #phy-cells = <0>; - interrupts = , - , - ; - interrupt-names = "otg-bvalid", "otg-id", - "linestate"; - status = "disabled"; - }; - - u2phy_host: host-port { - #phy-cells = <0>; - interrupts = ; - interrupt-names = "linestate"; - status = "disabled"; - }; - }; - }; - - sdmmc: mmc@ff500000 { - compatible = "rockchip,rk3328-dw-mshc", "rockchip,rk3288-dw-mshc"; - reg = <0x0 0xff500000 0x0 0x4000>; - interrupts = ; - clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>, - <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>; - clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; - fifo-depth = <0x100>; - max-frequency = <150000000>; - status = "disabled"; - }; - - sdio: mmc@ff510000 { - compatible = "rockchip,rk3328-dw-mshc", "rockchip,rk3288-dw-mshc"; - reg = <0x0 0xff510000 0x0 0x4000>; - interrupts = ; - clocks = <&cru HCLK_SDIO>, <&cru SCLK_SDIO>, - <&cru SCLK_SDIO_DRV>, <&cru SCLK_SDIO_SAMPLE>; - clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; - fifo-depth = <0x100>; - max-frequency = <150000000>; - status = "disabled"; - }; - - emmc: mmc@ff520000 { - compatible = "rockchip,rk3328-dw-mshc", "rockchip,rk3288-dw-mshc"; - reg = <0x0 0xff520000 0x0 0x4000>; - interrupts = ; - clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>, - <&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>; - clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; - fifo-depth = <0x100>; - max-frequency = <150000000>; - status = "disabled"; - }; - - gmac2io: ethernet@ff540000 { - compatible = "rockchip,rk3328-gmac"; - reg = <0x0 0xff540000 0x0 0x10000>; - interrupts = ; - interrupt-names = "macirq"; - clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_RX>, - <&cru SCLK_MAC2IO_TX>, <&cru SCLK_MAC2IO_REF>, - <&cru SCLK_MAC2IO_REFOUT>, <&cru ACLK_MAC2IO>, - <&cru PCLK_MAC2IO>; - clock-names = "stmmaceth", "mac_clk_rx", - "mac_clk_tx", "clk_mac_ref", - "clk_mac_refout", "aclk_mac", - "pclk_mac"; - resets = <&cru SRST_GMAC2IO_A>; - reset-names = "stmmaceth"; - rockchip,grf = <&grf>; - tx-fifo-depth = <2048>; - rx-fifo-depth = <4096>; - snps,txpbl = <0x4>; - status = "disabled"; - }; - - gmac2phy: ethernet@ff550000 { - compatible = "rockchip,rk3328-gmac"; - reg = <0x0 0xff550000 0x0 0x10000>; - rockchip,grf = <&grf>; - interrupts = ; - interrupt-names = "macirq"; - clocks = <&cru SCLK_MAC2PHY_SRC>, <&cru SCLK_MAC2PHY_RXTX>, - <&cru SCLK_MAC2PHY_RXTX>, <&cru SCLK_MAC2PHY_REF>, - <&cru ACLK_MAC2PHY>, <&cru PCLK_MAC2PHY>, - <&cru SCLK_MAC2PHY_OUT>; - clock-names = "stmmaceth", "mac_clk_rx", - "mac_clk_tx", "clk_mac_ref", - "aclk_mac", "pclk_mac", - "clk_macphy"; - resets = <&cru SRST_GMAC2PHY_A>; - reset-names = "stmmaceth"; - phy-mode = "rmii"; - phy-handle = <&phy>; - tx-fifo-depth = <2048>; - rx-fifo-depth = <4096>; - snps,txpbl = <0x4>; - clock_in_out = "output"; - status = "disabled"; - - mdio { - compatible = "snps,dwmac-mdio"; - #address-cells = <1>; - #size-cells = <0>; - - phy: ethernet-phy@0 { - compatible = "ethernet-phy-id1234.d400", "ethernet-phy-ieee802.3-c22"; - reg = <0>; - clocks = <&cru SCLK_MAC2PHY_OUT>; - resets = <&cru SRST_MACPHY>; - pinctrl-names = "default"; - pinctrl-0 = <&fephyled_rxm1 &fephyled_linkm1>; - phy-is-integrated; - }; - }; - }; - - usb20_otg: usb@ff580000 { - compatible = "rockchip,rk3328-usb", "rockchip,rk3066-usb", - "snps,dwc2"; - reg = <0x0 0xff580000 0x0 0x40000>; - interrupts = ; - clocks = <&cru HCLK_OTG>; - clock-names = "otg"; - dr_mode = "otg"; - g-np-tx-fifo-size = <16>; - g-rx-fifo-size = <280>; - g-tx-fifo-size = <256 128 128 64 32 16>; - phys = <&u2phy_otg>; - phy-names = "usb2-phy"; - status = "disabled"; - }; - - usb_host0_ehci: usb@ff5c0000 { - compatible = "generic-ehci"; - reg = <0x0 0xff5c0000 0x0 0x10000>; - interrupts = ; - clocks = <&cru HCLK_HOST0>, <&u2phy>; - phys = <&u2phy_host>; - phy-names = "usb"; - status = "disabled"; - }; - - usb_host0_ohci: usb@ff5d0000 { - compatible = "generic-ohci"; - reg = <0x0 0xff5d0000 0x0 0x10000>; - interrupts = ; - clocks = <&cru HCLK_HOST0>, <&u2phy>; - phys = <&u2phy_host>; - phy-names = "usb"; - status = "disabled"; - }; - - usbdrd3: usb@ff600000 { - compatible = "rockchip,rk3328-dwc3", "snps,dwc3"; - reg = <0x0 0xff600000 0x0 0x100000>; - interrupts = ; - clocks = <&cru SCLK_USB3OTG_REF>, <&cru SCLK_USB3OTG_SUSPEND>, - <&cru ACLK_USB3OTG>; - clock-names = "ref_clk", "suspend_clk", - "bus_clk"; - dr_mode = "otg"; - phy_type = "utmi_wide"; - snps,dis-del-phy-power-chg-quirk; - snps,dis_enblslpm_quirk; - snps,dis-tx-ipgap-linecheck-quirk; - snps,dis-u2-freeclk-exists-quirk; - snps,dis_u2_susphy_quirk; - snps,dis_u3_susphy_quirk; - status = "disabled"; - }; - - gic: interrupt-controller@ff811000 { - compatible = "arm,gic-400"; - #interrupt-cells = <3>; - #address-cells = <0>; - interrupt-controller; - reg = <0x0 0xff811000 0 0x1000>, - <0x0 0xff812000 0 0x2000>, - <0x0 0xff814000 0 0x2000>, - <0x0 0xff816000 0 0x2000>; - interrupts = ; - }; - - crypto: crypto@ff060000 { - compatible = "rockchip,rk3328-crypto"; - reg = <0x0 0xff060000 0x0 0x4000>; - interrupts = ; - clocks = <&cru HCLK_CRYPTO_MST>, <&cru HCLK_CRYPTO_SLV>, - <&cru SCLK_CRYPTO>; - clock-names = "hclk_master", "hclk_slave", "sclk"; - resets = <&cru SRST_CRYPTO>; - reset-names = "crypto-rst"; - }; - - pinctrl: pinctrl { - compatible = "rockchip,rk3328-pinctrl"; - rockchip,grf = <&grf>; - #address-cells = <2>; - #size-cells = <2>; - ranges; - - gpio0: gpio@ff210000 { - compatible = "rockchip,gpio-bank"; - reg = <0x0 0xff210000 0x0 0x100>; - interrupts = ; - clocks = <&cru PCLK_GPIO0>; - - gpio-controller; - #gpio-cells = <2>; - - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpio1: gpio@ff220000 { - compatible = "rockchip,gpio-bank"; - reg = <0x0 0xff220000 0x0 0x100>; - interrupts = ; - clocks = <&cru PCLK_GPIO1>; - - gpio-controller; - #gpio-cells = <2>; - - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpio2: gpio@ff230000 { - compatible = "rockchip,gpio-bank"; - reg = <0x0 0xff230000 0x0 0x100>; - interrupts = ; - clocks = <&cru PCLK_GPIO2>; - - gpio-controller; - #gpio-cells = <2>; - - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpio3: gpio@ff240000 { - compatible = "rockchip,gpio-bank"; - reg = <0x0 0xff240000 0x0 0x100>; - interrupts = ; - clocks = <&cru PCLK_GPIO3>; - - gpio-controller; - #gpio-cells = <2>; - - interrupt-controller; - #interrupt-cells = <2>; - }; - - pcfg_pull_up: pcfg-pull-up { - bias-pull-up; - }; - - pcfg_pull_down: pcfg-pull-down { - bias-pull-down; - }; - - pcfg_pull_none: pcfg-pull-none { - bias-disable; - }; - - pcfg_pull_none_2ma: pcfg-pull-none-2ma { - bias-disable; - drive-strength = <2>; - }; - - pcfg_pull_up_2ma: pcfg-pull-up-2ma { - bias-pull-up; - drive-strength = <2>; - }; - - pcfg_pull_up_4ma: pcfg-pull-up-4ma { - bias-pull-up; - drive-strength = <4>; - }; - - pcfg_pull_none_4ma: pcfg-pull-none-4ma { - bias-disable; - drive-strength = <4>; - }; - - pcfg_pull_down_4ma: pcfg-pull-down-4ma { - bias-pull-down; - drive-strength = <4>; - }; - - pcfg_pull_none_8ma: pcfg-pull-none-8ma { - bias-disable; - drive-strength = <8>; - }; - - pcfg_pull_up_8ma: pcfg-pull-up-8ma { - bias-pull-up; - drive-strength = <8>; - }; - - pcfg_pull_none_12ma: pcfg-pull-none-12ma { - bias-disable; - drive-strength = <12>; - }; - - pcfg_pull_up_12ma: pcfg-pull-up-12ma { - bias-pull-up; - drive-strength = <12>; - }; - - pcfg_output_high: pcfg-output-high { - output-high; - }; - - pcfg_output_low: pcfg-output-low { - output-low; - }; - - pcfg_input_high: pcfg-input-high { - bias-pull-up; - input-enable; - }; - - pcfg_input: pcfg-input { - input-enable; - }; - - i2c0 { - i2c0_xfer: i2c0-xfer { - rockchip,pins = <2 RK_PD0 1 &pcfg_pull_none>, - <2 RK_PD1 1 &pcfg_pull_none>; - }; - }; - - i2c1 { - i2c1_xfer: i2c1-xfer { - rockchip,pins = <2 RK_PA4 2 &pcfg_pull_none>, - <2 RK_PA5 2 &pcfg_pull_none>; - }; - }; - - i2c2 { - i2c2_xfer: i2c2-xfer { - rockchip,pins = <2 RK_PB5 1 &pcfg_pull_none>, - <2 RK_PB6 1 &pcfg_pull_none>; - }; - }; - - i2c3 { - i2c3_xfer: i2c3-xfer { - rockchip,pins = <0 RK_PA5 2 &pcfg_pull_none>, - <0 RK_PA6 2 &pcfg_pull_none>; - }; - i2c3_pins: i2c3-pins { - rockchip,pins = - <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>, - <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - hdmi_i2c { - hdmii2c_xfer: hdmii2c-xfer { - rockchip,pins = <0 RK_PA5 1 &pcfg_pull_none>, - <0 RK_PA6 1 &pcfg_pull_none>; - }; - }; - - pdm-0 { - pdmm0_clk: pdmm0-clk { - rockchip,pins = <2 RK_PC2 2 &pcfg_pull_none>; - }; - - pdmm0_fsync: pdmm0-fsync { - rockchip,pins = <2 RK_PC7 2 &pcfg_pull_none>; - }; - - pdmm0_sdi0: pdmm0-sdi0 { - rockchip,pins = <2 RK_PC3 2 &pcfg_pull_none>; - }; - - pdmm0_sdi1: pdmm0-sdi1 { - rockchip,pins = <2 RK_PC4 2 &pcfg_pull_none>; - }; - - pdmm0_sdi2: pdmm0-sdi2 { - rockchip,pins = <2 RK_PC5 2 &pcfg_pull_none>; - }; - - pdmm0_sdi3: pdmm0-sdi3 { - rockchip,pins = <2 RK_PC6 2 &pcfg_pull_none>; - }; - - pdmm0_clk_sleep: pdmm0-clk-sleep { - rockchip,pins = - <2 RK_PC2 RK_FUNC_GPIO &pcfg_input_high>; - }; - - pdmm0_sdi0_sleep: pdmm0-sdi0-sleep { - rockchip,pins = - <2 RK_PC3 RK_FUNC_GPIO &pcfg_input_high>; - }; - - pdmm0_sdi1_sleep: pdmm0-sdi1-sleep { - rockchip,pins = - <2 RK_PC4 RK_FUNC_GPIO &pcfg_input_high>; - }; - - pdmm0_sdi2_sleep: pdmm0-sdi2-sleep { - rockchip,pins = - <2 RK_PC5 RK_FUNC_GPIO &pcfg_input_high>; - }; - - pdmm0_sdi3_sleep: pdmm0-sdi3-sleep { - rockchip,pins = - <2 RK_PC6 RK_FUNC_GPIO &pcfg_input_high>; - }; - - pdmm0_fsync_sleep: pdmm0-fsync-sleep { - rockchip,pins = - <2 RK_PC7 RK_FUNC_GPIO &pcfg_input_high>; - }; - }; - - tsadc { - otp_pin: otp-pin { - rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - otp_out: otp-out { - rockchip,pins = <2 RK_PB5 1 &pcfg_pull_none>; - }; - }; - - uart0 { - uart0_xfer: uart0-xfer { - rockchip,pins = <1 RK_PB1 1 &pcfg_pull_none>, - <1 RK_PB0 1 &pcfg_pull_up>; - }; - - uart0_cts: uart0-cts { - rockchip,pins = <1 RK_PB3 1 &pcfg_pull_none>; - }; - - uart0_rts: uart0-rts { - rockchip,pins = <1 RK_PB2 1 &pcfg_pull_none>; - }; - - uart0_rts_pin: uart0-rts-pin { - rockchip,pins = <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - uart1 { - uart1_xfer: uart1-xfer { - rockchip,pins = <3 RK_PA4 4 &pcfg_pull_none>, - <3 RK_PA6 4 &pcfg_pull_up>; - }; - - uart1_cts: uart1-cts { - rockchip,pins = <3 RK_PA7 4 &pcfg_pull_none>; - }; - - uart1_rts: uart1-rts { - rockchip,pins = <3 RK_PA5 4 &pcfg_pull_none>; - }; - - uart1_rts_pin: uart1-rts-pin { - rockchip,pins = <3 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - uart2-0 { - uart2m0_xfer: uart2m0-xfer { - rockchip,pins = <1 RK_PA0 2 &pcfg_pull_none>, - <1 RK_PA1 2 &pcfg_pull_up>; - }; - }; - - uart2-1 { - uart2m1_xfer: uart2m1-xfer { - rockchip,pins = <2 RK_PA0 1 &pcfg_pull_none>, - <2 RK_PA1 1 &pcfg_pull_up>; - }; - }; - - spi0-0 { - spi0m0_clk: spi0m0-clk { - rockchip,pins = <2 RK_PB0 1 &pcfg_pull_up>; - }; - - spi0m0_cs0: spi0m0-cs0 { - rockchip,pins = <2 RK_PB3 1 &pcfg_pull_up>; - }; - - spi0m0_tx: spi0m0-tx { - rockchip,pins = <2 RK_PB1 1 &pcfg_pull_up>; - }; - - spi0m0_rx: spi0m0-rx { - rockchip,pins = <2 RK_PB2 1 &pcfg_pull_up>; - }; - - spi0m0_cs1: spi0m0-cs1 { - rockchip,pins = <2 RK_PB4 1 &pcfg_pull_up>; - }; - }; - - spi0-1 { - spi0m1_clk: spi0m1-clk { - rockchip,pins = <3 RK_PC7 2 &pcfg_pull_up>; - }; - - spi0m1_cs0: spi0m1-cs0 { - rockchip,pins = <3 RK_PD2 2 &pcfg_pull_up>; - }; - - spi0m1_tx: spi0m1-tx { - rockchip,pins = <3 RK_PD1 2 &pcfg_pull_up>; - }; - - spi0m1_rx: spi0m1-rx { - rockchip,pins = <3 RK_PD0 2 &pcfg_pull_up>; - }; - - spi0m1_cs1: spi0m1-cs1 { - rockchip,pins = <3 RK_PD3 2 &pcfg_pull_up>; - }; - }; - - spi0-2 { - spi0m2_clk: spi0m2-clk { - rockchip,pins = <3 RK_PA0 4 &pcfg_pull_up>; - }; - - spi0m2_cs0: spi0m2-cs0 { - rockchip,pins = <3 RK_PB0 3 &pcfg_pull_up>; - }; - - spi0m2_tx: spi0m2-tx { - rockchip,pins = <3 RK_PA1 4 &pcfg_pull_up>; - }; - - spi0m2_rx: spi0m2-rx { - rockchip,pins = <3 RK_PA2 4 &pcfg_pull_up>; - }; - }; - - i2s1 { - i2s1_mclk: i2s1-mclk { - rockchip,pins = <2 RK_PB7 1 &pcfg_pull_none>; - }; - - i2s1_sclk: i2s1-sclk { - rockchip,pins = <2 RK_PC2 1 &pcfg_pull_none>; - }; - - i2s1_lrckrx: i2s1-lrckrx { - rockchip,pins = <2 RK_PC0 1 &pcfg_pull_none>; - }; - - i2s1_lrcktx: i2s1-lrcktx { - rockchip,pins = <2 RK_PC1 1 &pcfg_pull_none>; - }; - - i2s1_sdi: i2s1-sdi { - rockchip,pins = <2 RK_PC3 1 &pcfg_pull_none>; - }; - - i2s1_sdo: i2s1-sdo { - rockchip,pins = <2 RK_PC7 1 &pcfg_pull_none>; - }; - - i2s1_sdio1: i2s1-sdio1 { - rockchip,pins = <2 RK_PC4 1 &pcfg_pull_none>; - }; - - i2s1_sdio2: i2s1-sdio2 { - rockchip,pins = <2 RK_PC5 1 &pcfg_pull_none>; - }; - - i2s1_sdio3: i2s1-sdio3 { - rockchip,pins = <2 RK_PC6 1 &pcfg_pull_none>; - }; - - i2s1_sleep: i2s1-sleep { - rockchip,pins = - <2 RK_PB7 RK_FUNC_GPIO &pcfg_input_high>, - <2 RK_PC0 RK_FUNC_GPIO &pcfg_input_high>, - <2 RK_PC1 RK_FUNC_GPIO &pcfg_input_high>, - <2 RK_PC2 RK_FUNC_GPIO &pcfg_input_high>, - <2 RK_PC3 RK_FUNC_GPIO &pcfg_input_high>, - <2 RK_PC4 RK_FUNC_GPIO &pcfg_input_high>, - <2 RK_PC5 RK_FUNC_GPIO &pcfg_input_high>, - <2 RK_PC6 RK_FUNC_GPIO &pcfg_input_high>, - <2 RK_PC7 RK_FUNC_GPIO &pcfg_input_high>; - }; - }; - - i2s2-0 { - i2s2m0_mclk: i2s2m0-mclk { - rockchip,pins = <1 RK_PC5 1 &pcfg_pull_none>; - }; - - i2s2m0_sclk: i2s2m0-sclk { - rockchip,pins = <1 RK_PC6 1 &pcfg_pull_none>; - }; - - i2s2m0_lrckrx: i2s2m0-lrckrx { - rockchip,pins = <1 RK_PD2 1 &pcfg_pull_none>; - }; - - i2s2m0_lrcktx: i2s2m0-lrcktx { - rockchip,pins = <1 RK_PC7 1 &pcfg_pull_none>; - }; - - i2s2m0_sdi: i2s2m0-sdi { - rockchip,pins = <1 RK_PD0 1 &pcfg_pull_none>; - }; - - i2s2m0_sdo: i2s2m0-sdo { - rockchip,pins = <1 RK_PD1 1 &pcfg_pull_none>; - }; - - i2s2m0_sleep: i2s2m0-sleep { - rockchip,pins = - <1 RK_PC5 RK_FUNC_GPIO &pcfg_input_high>, - <1 RK_PC6 RK_FUNC_GPIO &pcfg_input_high>, - <1 RK_PD2 RK_FUNC_GPIO &pcfg_input_high>, - <1 RK_PC7 RK_FUNC_GPIO &pcfg_input_high>, - <1 RK_PD0 RK_FUNC_GPIO &pcfg_input_high>, - <1 RK_PD1 RK_FUNC_GPIO &pcfg_input_high>; - }; - }; - - i2s2-1 { - i2s2m1_mclk: i2s2m1-mclk { - rockchip,pins = <1 RK_PC5 1 &pcfg_pull_none>; - }; - - i2s2m1_sclk: i2s2m1-sclk { - rockchip,pins = <3 RK_PA0 6 &pcfg_pull_none>; - }; - - i2s2m1_lrckrx: i2sm1-lrckrx { - rockchip,pins = <3 RK_PB0 6 &pcfg_pull_none>; - }; - - i2s2m1_lrcktx: i2s2m1-lrcktx { - rockchip,pins = <3 RK_PB0 4 &pcfg_pull_none>; - }; - - i2s2m1_sdi: i2s2m1-sdi { - rockchip,pins = <3 RK_PA2 6 &pcfg_pull_none>; - }; - - i2s2m1_sdo: i2s2m1-sdo { - rockchip,pins = <3 RK_PA1 6 &pcfg_pull_none>; - }; - - i2s2m1_sleep: i2s2m1-sleep { - rockchip,pins = - <1 RK_PC5 RK_FUNC_GPIO &pcfg_input_high>, - <3 RK_PA0 RK_FUNC_GPIO &pcfg_input_high>, - <3 RK_PB0 RK_FUNC_GPIO &pcfg_input_high>, - <3 RK_PA2 RK_FUNC_GPIO &pcfg_input_high>, - <3 RK_PA1 RK_FUNC_GPIO &pcfg_input_high>; - }; - }; - - spdif-0 { - spdifm0_tx: spdifm0-tx { - rockchip,pins = <0 RK_PD3 1 &pcfg_pull_none>; - }; - }; - - spdif-1 { - spdifm1_tx: spdifm1-tx { - rockchip,pins = <2 RK_PC1 2 &pcfg_pull_none>; - }; - }; - - spdif-2 { - spdifm2_tx: spdifm2-tx { - rockchip,pins = <0 RK_PA2 2 &pcfg_pull_none>; - }; - }; - - sdmmc0-0 { - sdmmc0m0_pwren: sdmmc0m0-pwren { - rockchip,pins = <2 RK_PA7 1 &pcfg_pull_up_4ma>; - }; - - sdmmc0m0_pin: sdmmc0m0-pin { - rockchip,pins = <2 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up_4ma>; - }; - }; - - sdmmc0-1 { - sdmmc0m1_pwren: sdmmc0m1-pwren { - rockchip,pins = <0 RK_PD6 3 &pcfg_pull_up_4ma>; - }; - - sdmmc0m1_pin: sdmmc0m1-pin { - rockchip,pins = <0 RK_PD6 RK_FUNC_GPIO &pcfg_pull_up_4ma>; - }; - }; - - sdmmc0 { - sdmmc0_clk: sdmmc0-clk { - rockchip,pins = <1 RK_PA6 1 &pcfg_pull_none_8ma>; - }; - - sdmmc0_cmd: sdmmc0-cmd { - rockchip,pins = <1 RK_PA4 1 &pcfg_pull_up_8ma>; - }; - - sdmmc0_dectn: sdmmc0-dectn { - rockchip,pins = <1 RK_PA5 1 &pcfg_pull_up_4ma>; - }; - - sdmmc0_wrprt: sdmmc0-wrprt { - rockchip,pins = <1 RK_PA7 1 &pcfg_pull_up_4ma>; - }; - - sdmmc0_bus1: sdmmc0-bus1 { - rockchip,pins = <1 RK_PA0 1 &pcfg_pull_up_8ma>; - }; - - sdmmc0_bus4: sdmmc0-bus4 { - rockchip,pins = <1 RK_PA0 1 &pcfg_pull_up_8ma>, - <1 RK_PA1 1 &pcfg_pull_up_8ma>, - <1 RK_PA2 1 &pcfg_pull_up_8ma>, - <1 RK_PA3 1 &pcfg_pull_up_8ma>; - }; - - sdmmc0_pins: sdmmc0-pins { - rockchip,pins = - <1 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up_4ma>, - <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up_4ma>, - <1 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up_4ma>, - <1 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up_4ma>, - <1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up_4ma>, - <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up_4ma>, - <1 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up_4ma>, - <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up_4ma>; - }; - }; - - sdmmc0ext { - sdmmc0ext_clk: sdmmc0ext-clk { - rockchip,pins = <3 RK_PA2 3 &pcfg_pull_none_4ma>; - }; - - sdmmc0ext_cmd: sdmmc0ext-cmd { - rockchip,pins = <3 RK_PA0 3 &pcfg_pull_up_4ma>; - }; - - sdmmc0ext_wrprt: sdmmc0ext-wrprt { - rockchip,pins = <3 RK_PA3 3 &pcfg_pull_up_4ma>; - }; - - sdmmc0ext_dectn: sdmmc0ext-dectn { - rockchip,pins = <3 RK_PA1 3 &pcfg_pull_up_4ma>; - }; - - sdmmc0ext_bus1: sdmmc0ext-bus1 { - rockchip,pins = <3 RK_PA4 3 &pcfg_pull_up_4ma>; - }; - - sdmmc0ext_bus4: sdmmc0ext-bus4 { - rockchip,pins = - <3 RK_PA4 3 &pcfg_pull_up_4ma>, - <3 RK_PA5 3 &pcfg_pull_up_4ma>, - <3 RK_PA6 3 &pcfg_pull_up_4ma>, - <3 RK_PA7 3 &pcfg_pull_up_4ma>; - }; - - sdmmc0ext_pins: sdmmc0ext-pins { - rockchip,pins = - <3 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up_4ma>, - <3 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up_4ma>, - <3 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up_4ma>, - <3 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up_4ma>, - <3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up_4ma>, - <3 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up_4ma>, - <3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up_4ma>, - <3 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up_4ma>; - }; - }; - - sdmmc1 { - sdmmc1_clk: sdmmc1-clk { - rockchip,pins = <1 RK_PB4 1 &pcfg_pull_none_8ma>; - }; - - sdmmc1_cmd: sdmmc1-cmd { - rockchip,pins = <1 RK_PB5 1 &pcfg_pull_up_8ma>; - }; - - sdmmc1_pwren: sdmmc1-pwren { - rockchip,pins = <1 RK_PC2 1 &pcfg_pull_up_8ma>; - }; - - sdmmc1_wrprt: sdmmc1-wrprt { - rockchip,pins = <1 RK_PC4 1 &pcfg_pull_up_8ma>; - }; - - sdmmc1_dectn: sdmmc1-dectn { - rockchip,pins = <1 RK_PC3 1 &pcfg_pull_up_8ma>; - }; - - sdmmc1_bus1: sdmmc1-bus1 { - rockchip,pins = <1 RK_PB6 1 &pcfg_pull_up_8ma>; - }; - - sdmmc1_bus4: sdmmc1-bus4 { - rockchip,pins = <1 RK_PB6 1 &pcfg_pull_up_8ma>, - <1 RK_PB7 1 &pcfg_pull_up_8ma>, - <1 RK_PC0 1 &pcfg_pull_up_8ma>, - <1 RK_PC1 1 &pcfg_pull_up_8ma>; - }; - - sdmmc1_pins: sdmmc1-pins { - rockchip,pins = - <1 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up_4ma>, - <1 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up_4ma>, - <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_up_4ma>, - <1 RK_PB7 RK_FUNC_GPIO &pcfg_pull_up_4ma>, - <1 RK_PC0 RK_FUNC_GPIO &pcfg_pull_up_4ma>, - <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_up_4ma>, - <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_up_4ma>, - <1 RK_PC3 RK_FUNC_GPIO &pcfg_pull_up_4ma>, - <1 RK_PC4 RK_FUNC_GPIO &pcfg_pull_up_4ma>; - }; - }; - - emmc { - emmc_clk: emmc-clk { - rockchip,pins = <3 RK_PC5 2 &pcfg_pull_none_12ma>; - }; - - emmc_cmd: emmc-cmd { - rockchip,pins = <3 RK_PC3 2 &pcfg_pull_up_12ma>; - }; - - emmc_pwren: emmc-pwren { - rockchip,pins = <3 RK_PC6 2 &pcfg_pull_none>; - }; - - emmc_rstnout: emmc-rstnout { - rockchip,pins = <3 RK_PC4 2 &pcfg_pull_none>; - }; - - emmc_bus1: emmc-bus1 { - rockchip,pins = <0 RK_PA7 2 &pcfg_pull_up_12ma>; - }; - - emmc_bus4: emmc-bus4 { - rockchip,pins = - <0 RK_PA7 2 &pcfg_pull_up_12ma>, - <2 RK_PD4 2 &pcfg_pull_up_12ma>, - <2 RK_PD5 2 &pcfg_pull_up_12ma>, - <2 RK_PD6 2 &pcfg_pull_up_12ma>; - }; - - emmc_bus8: emmc-bus8 { - rockchip,pins = - <0 RK_PA7 2 &pcfg_pull_up_12ma>, - <2 RK_PD4 2 &pcfg_pull_up_12ma>, - <2 RK_PD5 2 &pcfg_pull_up_12ma>, - <2 RK_PD6 2 &pcfg_pull_up_12ma>, - <2 RK_PD7 2 &pcfg_pull_up_12ma>, - <3 RK_PC0 2 &pcfg_pull_up_12ma>, - <3 RK_PC1 2 &pcfg_pull_up_12ma>, - <3 RK_PC2 2 &pcfg_pull_up_12ma>; - }; - }; - - pwm0 { - pwm0_pin: pwm0-pin { - rockchip,pins = <2 RK_PA4 1 &pcfg_pull_none>; - }; - }; - - pwm1 { - pwm1_pin: pwm1-pin { - rockchip,pins = <2 RK_PA5 1 &pcfg_pull_none>; - }; - }; - - pwm2 { - pwm2_pin: pwm2-pin { - rockchip,pins = <2 RK_PA6 1 &pcfg_pull_none>; - }; - }; - - pwmir { - pwmir_pin: pwmir-pin { - rockchip,pins = <2 RK_PA2 1 &pcfg_pull_none>; - }; - }; - - gmac-1 { - rgmiim1_pins: rgmiim1-pins { - rockchip,pins = - /* mac_txclk */ - <1 RK_PB4 2 &pcfg_pull_none_8ma>, - /* mac_rxclk */ - <1 RK_PB5 2 &pcfg_pull_none_4ma>, - /* mac_mdio */ - <1 RK_PC3 2 &pcfg_pull_none_4ma>, - /* mac_txen */ - <1 RK_PD1 2 &pcfg_pull_none_8ma>, - /* mac_clk */ - <1 RK_PC5 2 &pcfg_pull_none_4ma>, - /* mac_rxdv */ - <1 RK_PC6 2 &pcfg_pull_none_4ma>, - /* mac_mdc */ - <1 RK_PC7 2 &pcfg_pull_none_4ma>, - /* mac_rxd1 */ - <1 RK_PB2 2 &pcfg_pull_none_4ma>, - /* mac_rxd0 */ - <1 RK_PB3 2 &pcfg_pull_none_4ma>, - /* mac_txd1 */ - <1 RK_PB0 2 &pcfg_pull_none_8ma>, - /* mac_txd0 */ - <1 RK_PB1 2 &pcfg_pull_none_8ma>, - /* mac_rxd3 */ - <1 RK_PB6 2 &pcfg_pull_none_4ma>, - /* mac_rxd2 */ - <1 RK_PB7 2 &pcfg_pull_none_4ma>, - /* mac_txd3 */ - <1 RK_PC0 2 &pcfg_pull_none_8ma>, - /* mac_txd2 */ - <1 RK_PC1 2 &pcfg_pull_none_8ma>, - - /* mac_txclk */ - <0 RK_PB0 1 &pcfg_pull_none_8ma>, - /* mac_txen */ - <0 RK_PB4 1 &pcfg_pull_none_8ma>, - /* mac_clk */ - <0 RK_PD0 1 &pcfg_pull_none_4ma>, - /* mac_txd1 */ - <0 RK_PC0 1 &pcfg_pull_none_8ma>, - /* mac_txd0 */ - <0 RK_PC1 1 &pcfg_pull_none_8ma>, - /* mac_txd3 */ - <0 RK_PC7 1 &pcfg_pull_none_8ma>, - /* mac_txd2 */ - <0 RK_PC6 1 &pcfg_pull_none_8ma>; - }; - - rmiim1_pins: rmiim1-pins { - rockchip,pins = - /* mac_mdio */ - <1 RK_PC3 2 &pcfg_pull_none_2ma>, - /* mac_txen */ - <1 RK_PD1 2 &pcfg_pull_none_12ma>, - /* mac_clk */ - <1 RK_PC5 2 &pcfg_pull_none_2ma>, - /* mac_rxer */ - <1 RK_PD0 2 &pcfg_pull_none_2ma>, - /* mac_rxdv */ - <1 RK_PC6 2 &pcfg_pull_none_2ma>, - /* mac_mdc */ - <1 RK_PC7 2 &pcfg_pull_none_2ma>, - /* mac_rxd1 */ - <1 RK_PB2 2 &pcfg_pull_none_2ma>, - /* mac_rxd0 */ - <1 RK_PB3 2 &pcfg_pull_none_2ma>, - /* mac_txd1 */ - <1 RK_PB0 2 &pcfg_pull_none_12ma>, - /* mac_txd0 */ - <1 RK_PB1 2 &pcfg_pull_none_12ma>, - - /* mac_mdio */ - <0 RK_PB3 1 &pcfg_pull_none>, - /* mac_txen */ - <0 RK_PB4 1 &pcfg_pull_none>, - /* mac_clk */ - <0 RK_PD0 1 &pcfg_pull_none>, - /* mac_mdc */ - <0 RK_PC3 1 &pcfg_pull_none>, - /* mac_txd1 */ - <0 RK_PC0 1 &pcfg_pull_none>, - /* mac_txd0 */ - <0 RK_PC1 1 &pcfg_pull_none>; - }; - }; - - gmac2phy { - fephyled_speed10: fephyled-speed10 { - rockchip,pins = <0 RK_PD6 1 &pcfg_pull_none>; - }; - - fephyled_duplex: fephyled-duplex { - rockchip,pins = <0 RK_PD6 2 &pcfg_pull_none>; - }; - - fephyled_rxm1: fephyled-rxm1 { - rockchip,pins = <2 RK_PD1 2 &pcfg_pull_none>; - }; - - fephyled_txm1: fephyled-txm1 { - rockchip,pins = <2 RK_PD1 3 &pcfg_pull_none>; - }; - - fephyled_linkm1: fephyled-linkm1 { - rockchip,pins = <2 RK_PD0 2 &pcfg_pull_none>; - }; - }; - - tsadc_pin { - tsadc_int: tsadc-int { - rockchip,pins = <2 RK_PB5 2 &pcfg_pull_none>; - }; - tsadc_pin: tsadc-pin { - rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - hdmi_pin { - hdmi_cec: hdmi-cec { - rockchip,pins = <0 RK_PA3 1 &pcfg_pull_none>; - }; - - hdmi_hpd: hdmi-hpd { - rockchip,pins = <0 RK_PA4 1 &pcfg_pull_down>; - }; - }; - - cif-0 { - dvp_d2d9_m0:dvp-d2d9-m0 { - rockchip,pins = - /* cif_d0 */ - <3 RK_PA4 2 &pcfg_pull_none>, - /* cif_d1 */ - <3 RK_PA5 2 &pcfg_pull_none>, - /* cif_d2 */ - <3 RK_PA6 2 &pcfg_pull_none>, - /* cif_d3 */ - <3 RK_PA7 2 &pcfg_pull_none>, - /* cif_d4 */ - <3 RK_PB0 2 &pcfg_pull_none>, - /* cif_d5m0 */ - <3 RK_PB1 2 &pcfg_pull_none>, - /* cif_d6m0 */ - <3 RK_PB2 2 &pcfg_pull_none>, - /* cif_d7m0 */ - <3 RK_PB3 2 &pcfg_pull_none>, - /* cif_href */ - <3 RK_PA1 2 &pcfg_pull_none>, - /* cif_vsync */ - <3 RK_PA0 2 &pcfg_pull_none>, - /* cif_clkoutm0 */ - <3 RK_PA3 2 &pcfg_pull_none>, - /* cif_clkin */ - <3 RK_PA2 2 &pcfg_pull_none>; - }; - }; - - cif-1 { - dvp_d2d9_m1:dvp-d2d9-m1 { - rockchip,pins = - /* cif_d0 */ - <3 RK_PA4 2 &pcfg_pull_none>, - /* cif_d1 */ - <3 RK_PA5 2 &pcfg_pull_none>, - /* cif_d2 */ - <3 RK_PA6 2 &pcfg_pull_none>, - /* cif_d3 */ - <3 RK_PA7 2 &pcfg_pull_none>, - /* cif_d4 */ - <3 RK_PB0 2 &pcfg_pull_none>, - /* cif_d5m1 */ - <2 RK_PC0 4 &pcfg_pull_none>, - /* cif_d6m1 */ - <2 RK_PC1 4 &pcfg_pull_none>, - /* cif_d7m1 */ - <2 RK_PC2 4 &pcfg_pull_none>, - /* cif_href */ - <3 RK_PA1 2 &pcfg_pull_none>, - /* cif_vsync */ - <3 RK_PA0 2 &pcfg_pull_none>, - /* cif_clkoutm1 */ - <2 RK_PB7 4 &pcfg_pull_none>, - /* cif_clkin */ - <3 RK_PA2 2 &pcfg_pull_none>; - }; - }; - }; -}; diff --git a/include/dt-bindings/clock/rk3328-cru.h b/include/dt-bindings/clock/rk3328-cru.h deleted file mode 100644 index 555b4ff660a..00000000000 --- a/include/dt-bindings/clock/rk3328-cru.h +++ /dev/null @@ -1,393 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later */ -/* - * Copyright (c) 2016 Rockchip Electronics Co. Ltd. - * Author: Elaine - */ - -#ifndef _DT_BINDINGS_CLK_ROCKCHIP_RK3328_H -#define _DT_BINDINGS_CLK_ROCKCHIP_RK3328_H - -/* core clocks */ -#define PLL_APLL 1 -#define PLL_DPLL 2 -#define PLL_CPLL 3 -#define PLL_GPLL 4 -#define PLL_NPLL 5 -#define ARMCLK 6 - -/* sclk gates (special clocks) */ -#define SCLK_RTC32K 30 -#define SCLK_SDMMC_EXT 31 -#define SCLK_SPI 32 -#define SCLK_SDMMC 33 -#define SCLK_SDIO 34 -#define SCLK_EMMC 35 -#define SCLK_TSADC 36 -#define SCLK_SARADC 37 -#define SCLK_UART0 38 -#define SCLK_UART1 39 -#define SCLK_UART2 40 -#define SCLK_I2S0 41 -#define SCLK_I2S1 42 -#define SCLK_I2S2 43 -#define SCLK_I2S1_OUT 44 -#define SCLK_I2S2_OUT 45 -#define SCLK_SPDIF 46 -#define SCLK_TIMER0 47 -#define SCLK_TIMER1 48 -#define SCLK_TIMER2 49 -#define SCLK_TIMER3 50 -#define SCLK_TIMER4 51 -#define SCLK_TIMER5 52 -#define SCLK_WIFI 53 -#define SCLK_CIF_OUT 54 -#define SCLK_I2C0 55 -#define SCLK_I2C1 56 -#define SCLK_I2C2 57 -#define SCLK_I2C3 58 -#define SCLK_CRYPTO 59 -#define SCLK_PWM 60 -#define SCLK_PDM 61 -#define SCLK_EFUSE 62 -#define SCLK_OTP 63 -#define SCLK_DDRCLK 64 -#define SCLK_VDEC_CABAC 65 -#define SCLK_VDEC_CORE 66 -#define SCLK_VENC_DSP 67 -#define SCLK_VENC_CORE 68 -#define SCLK_RGA 69 -#define SCLK_HDMI_SFC 70 -#define SCLK_HDMI_CEC 71 -#define SCLK_USB3_REF 72 -#define SCLK_USB3_SUSPEND 73 -#define SCLK_SDMMC_DRV 74 -#define SCLK_SDIO_DRV 75 -#define SCLK_EMMC_DRV 76 -#define SCLK_SDMMC_EXT_DRV 77 -#define SCLK_SDMMC_SAMPLE 78 -#define SCLK_SDIO_SAMPLE 79 -#define SCLK_EMMC_SAMPLE 80 -#define SCLK_SDMMC_EXT_SAMPLE 81 -#define SCLK_VOP 82 -#define SCLK_MAC2PHY_RXTX 83 -#define SCLK_MAC2PHY_SRC 84 -#define SCLK_MAC2PHY_REF 85 -#define SCLK_MAC2PHY_OUT 86 -#define SCLK_MAC2IO_RX 87 -#define SCLK_MAC2IO_TX 88 -#define SCLK_MAC2IO_REFOUT 89 -#define SCLK_MAC2IO_REF 90 -#define SCLK_MAC2IO_OUT 91 -#define SCLK_TSP 92 -#define SCLK_HSADC_TSP 93 -#define SCLK_USB3PHY_REF 94 -#define SCLK_REF_USB3OTG 95 -#define SCLK_USB3OTG_REF 96 -#define SCLK_USB3OTG_SUSPEND 97 -#define SCLK_REF_USB3OTG_SRC 98 -#define SCLK_MAC2IO_SRC 99 -#define SCLK_MAC2IO 100 -#define SCLK_MAC2PHY 101 -#define SCLK_MAC2IO_EXT 102 - -/* dclk gates */ -#define DCLK_LCDC 120 -#define DCLK_HDMIPHY 121 -#define HDMIPHY 122 -#define USB480M 123 -#define DCLK_LCDC_SRC 124 - -/* aclk gates */ -#define ACLK_AXISRAM 130 -#define ACLK_VOP_PRE 131 -#define ACLK_USB3OTG 132 -#define ACLK_RGA_PRE 133 -#define ACLK_DMAC 134 -#define ACLK_GPU 135 -#define ACLK_BUS_PRE 136 -#define ACLK_PERI_PRE 137 -#define ACLK_RKVDEC_PRE 138 -#define ACLK_RKVDEC 139 -#define ACLK_RKVENC 140 -#define ACLK_VPU_PRE 141 -#define ACLK_VIO_PRE 142 -#define ACLK_VPU 143 -#define ACLK_VIO 144 -#define ACLK_VOP 145 -#define ACLK_GMAC 146 -#define ACLK_H265 147 -#define ACLK_H264 148 -#define ACLK_MAC2PHY 149 -#define ACLK_MAC2IO 150 -#define ACLK_DCF 151 -#define ACLK_TSP 152 -#define ACLK_PERI 153 -#define ACLK_RGA 154 -#define ACLK_IEP 155 -#define ACLK_CIF 156 -#define ACLK_HDCP 157 - -/* pclk gates */ -#define PCLK_GPIO0 200 -#define PCLK_GPIO1 201 -#define PCLK_GPIO2 202 -#define PCLK_GPIO3 203 -#define PCLK_GRF 204 -#define PCLK_I2C0 205 -#define PCLK_I2C1 206 -#define PCLK_I2C2 207 -#define PCLK_I2C3 208 -#define PCLK_SPI 209 -#define PCLK_UART0 210 -#define PCLK_UART1 211 -#define PCLK_UART2 212 -#define PCLK_TSADC 213 -#define PCLK_PWM 214 -#define PCLK_TIMER 215 -#define PCLK_BUS_PRE 216 -#define PCLK_PERI_PRE 217 -#define PCLK_HDMI_CTRL 218 -#define PCLK_HDMI_PHY 219 -#define PCLK_GMAC 220 -#define PCLK_H265 221 -#define PCLK_MAC2PHY 222 -#define PCLK_MAC2IO 223 -#define PCLK_USB3PHY_OTG 224 -#define PCLK_USB3PHY_PIPE 225 -#define PCLK_USB3_GRF 226 -#define PCLK_USB2_GRF 227 -#define PCLK_HDMIPHY 228 -#define PCLK_DDR 229 -#define PCLK_PERI 230 -#define PCLK_HDMI 231 -#define PCLK_HDCP 232 -#define PCLK_DCF 233 -#define PCLK_SARADC 234 -#define PCLK_ACODECPHY 235 -#define PCLK_WDT 236 - -/* hclk gates */ -#define HCLK_PERI 308 -#define HCLK_TSP 309 -#define HCLK_GMAC 310 -#define HCLK_I2S0_8CH 311 -#define HCLK_I2S1_8CH 312 -#define HCLK_I2S2_2CH 313 -#define HCLK_SPDIF_8CH 314 -#define HCLK_VOP 315 -#define HCLK_NANDC 316 -#define HCLK_SDMMC 317 -#define HCLK_SDIO 318 -#define HCLK_EMMC 319 -#define HCLK_SDMMC_EXT 320 -#define HCLK_RKVDEC_PRE 321 -#define HCLK_RKVDEC 322 -#define HCLK_RKVENC 323 -#define HCLK_VPU_PRE 324 -#define HCLK_VIO_PRE 325 -#define HCLK_VPU 326 -#define HCLK_BUS_PRE 328 -#define HCLK_PERI_PRE 329 -#define HCLK_H264 330 -#define HCLK_CIF 331 -#define HCLK_OTG_PMU 332 -#define HCLK_OTG 333 -#define HCLK_HOST0 334 -#define HCLK_HOST0_ARB 335 -#define HCLK_CRYPTO_MST 336 -#define HCLK_CRYPTO_SLV 337 -#define HCLK_PDM 338 -#define HCLK_IEP 339 -#define HCLK_RGA 340 -#define HCLK_HDCP 341 - -#define CLK_NR_CLKS (HCLK_HDCP + 1) - -/* soft-reset indices */ -#define SRST_CORE0_PO 0 -#define SRST_CORE1_PO 1 -#define SRST_CORE2_PO 2 -#define SRST_CORE3_PO 3 -#define SRST_CORE0 4 -#define SRST_CORE1 5 -#define SRST_CORE2 6 -#define SRST_CORE3 7 -#define SRST_CORE0_DBG 8 -#define SRST_CORE1_DBG 9 -#define SRST_CORE2_DBG 10 -#define SRST_CORE3_DBG 11 -#define SRST_TOPDBG 12 -#define SRST_CORE_NIU 13 -#define SRST_STRC_A 14 -#define SRST_L2C 15 - -#define SRST_A53_GIC 18 -#define SRST_DAP 19 -#define SRST_PMU_P 21 -#define SRST_EFUSE 22 -#define SRST_BUSSYS_H 23 -#define SRST_BUSSYS_P 24 -#define SRST_SPDIF 25 -#define SRST_INTMEM 26 -#define SRST_ROM 27 -#define SRST_GPIO0 28 -#define SRST_GPIO1 29 -#define SRST_GPIO2 30 -#define SRST_GPIO3 31 - -#define SRST_I2S0 32 -#define SRST_I2S1 33 -#define SRST_I2S2 34 -#define SRST_I2S0_H 35 -#define SRST_I2S1_H 36 -#define SRST_I2S2_H 37 -#define SRST_UART0 38 -#define SRST_UART1 39 -#define SRST_UART2 40 -#define SRST_UART0_P 41 -#define SRST_UART1_P 42 -#define SRST_UART2_P 43 -#define SRST_I2C0 44 -#define SRST_I2C1 45 -#define SRST_I2C2 46 -#define SRST_I2C3 47 - -#define SRST_I2C0_P 48 -#define SRST_I2C1_P 49 -#define SRST_I2C2_P 50 -#define SRST_I2C3_P 51 -#define SRST_EFUSE_SE_P 52 -#define SRST_EFUSE_NS_P 53 -#define SRST_PWM0 54 -#define SRST_PWM0_P 55 -#define SRST_DMA 56 -#define SRST_TSP_A 57 -#define SRST_TSP_H 58 -#define SRST_TSP 59 -#define SRST_TSP_HSADC 60 -#define SRST_DCF_A 61 -#define SRST_DCF_P 62 - -#define SRST_SCR 64 -#define SRST_SPI 65 -#define SRST_TSADC 66 -#define SRST_TSADC_P 67 -#define SRST_CRYPTO 68 -#define SRST_SGRF 69 -#define SRST_GRF 70 -#define SRST_USB_GRF 71 -#define SRST_TIMER_6CH_P 72 -#define SRST_TIMER0 73 -#define SRST_TIMER1 74 -#define SRST_TIMER2 75 -#define SRST_TIMER3 76 -#define SRST_TIMER4 77 -#define SRST_TIMER5 78 -#define SRST_USB3GRF 79 - -#define SRST_PHYNIU 80 -#define SRST_HDMIPHY 81 -#define SRST_VDAC 82 -#define SRST_ACODEC_p 83 -#define SRST_SARADC 85 -#define SRST_SARADC_P 86 -#define SRST_GRF_DDR 87 -#define SRST_DFIMON 88 -#define SRST_MSCH 89 -#define SRST_DDRMSCH 91 -#define SRST_DDRCTRL 92 -#define SRST_DDRCTRL_P 93 -#define SRST_DDRPHY 94 -#define SRST_DDRPHY_P 95 - -#define SRST_GMAC_NIU_A 96 -#define SRST_GMAC_NIU_P 97 -#define SRST_GMAC2PHY_A 98 -#define SRST_GMAC2IO_A 99 -#define SRST_MACPHY 100 -#define SRST_OTP_PHY 101 -#define SRST_GPU_A 102 -#define SRST_GPU_NIU_A 103 -#define SRST_SDMMCEXT 104 -#define SRST_PERIPH_NIU_A 105 -#define SRST_PERIHP_NIU_H 106 -#define SRST_PERIHP_P 107 -#define SRST_PERIPHSYS_H 108 -#define SRST_MMC0 109 -#define SRST_SDIO 110 -#define SRST_EMMC 111 - -#define SRST_USB2OTG_H 112 -#define SRST_USB2OTG 113 -#define SRST_USB2OTG_ADP 114 -#define SRST_USB2HOST_H 115 -#define SRST_USB2HOST_ARB 116 -#define SRST_USB2HOST_AUX 117 -#define SRST_USB2HOST_EHCIPHY 118 -#define SRST_USB2HOST_UTMI 119 -#define SRST_USB3OTG 120 -#define SRST_USBPOR 121 -#define SRST_USB2OTG_UTMI 122 -#define SRST_USB2HOST_PHY_UTMI 123 -#define SRST_USB3OTG_UTMI 124 -#define SRST_USB3PHY_U2 125 -#define SRST_USB3PHY_U3 126 -#define SRST_USB3PHY_PIPE 127 - -#define SRST_VIO_A 128 -#define SRST_VIO_BUS_H 129 -#define SRST_VIO_H2P_H 130 -#define SRST_VIO_ARBI_H 131 -#define SRST_VOP_NIU_A 132 -#define SRST_VOP_A 133 -#define SRST_VOP_H 134 -#define SRST_VOP_D 135 -#define SRST_RGA 136 -#define SRST_RGA_NIU_A 137 -#define SRST_RGA_A 138 -#define SRST_RGA_H 139 -#define SRST_IEP_A 140 -#define SRST_IEP_H 141 -#define SRST_HDMI 142 -#define SRST_HDMI_P 143 - -#define SRST_HDCP_A 144 -#define SRST_HDCP 145 -#define SRST_HDCP_H 146 -#define SRST_CIF_A 147 -#define SRST_CIF_H 148 -#define SRST_CIF_P 149 -#define SRST_OTP_P 150 -#define SRST_OTP_SBPI 151 -#define SRST_OTP_USER 152 -#define SRST_DDRCTRL_A 153 -#define SRST_DDRSTDY_P 154 -#define SRST_DDRSTDY 155 -#define SRST_PDM_H 156 -#define SRST_PDM 157 -#define SRST_USB3PHY_OTG_P 158 -#define SRST_USB3PHY_PIPE_P 159 - -#define SRST_VCODEC_A 160 -#define SRST_VCODEC_NIU_A 161 -#define SRST_VCODEC_H 162 -#define SRST_VCODEC_NIU_H 163 -#define SRST_VDEC_A 164 -#define SRST_VDEC_NIU_A 165 -#define SRST_VDEC_H 166 -#define SRST_VDEC_NIU_H 167 -#define SRST_VDEC_CORE 168 -#define SRST_VDEC_CABAC 169 -#define SRST_DDRPHYDIV 175 - -#define SRST_RKVENC_NIU_A 176 -#define SRST_RKVENC_NIU_H 177 -#define SRST_RKVENC_H265_A 178 -#define SRST_RKVENC_H265_P 179 -#define SRST_RKVENC_H265_CORE 180 -#define SRST_RKVENC_H265_DSP 181 -#define SRST_RKVENC_H264_A 182 -#define SRST_RKVENC_H264_H 183 -#define SRST_RKVENC_INTMEM 184 - -#endif diff --git a/include/dt-bindings/power/rk3328-power.h b/include/dt-bindings/power/rk3328-power.h deleted file mode 100644 index 02e3d7fc1cc..00000000000 --- a/include/dt-bindings/power/rk3328-power.h +++ /dev/null @@ -1,19 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -#ifndef __DT_BINDINGS_POWER_RK3328_POWER_H__ -#define __DT_BINDINGS_POWER_RK3328_POWER_H__ - -/** - * RK3328 idle id Summary. - */ -#define RK3328_PD_CORE 0 -#define RK3328_PD_GPU 1 -#define RK3328_PD_BUS 2 -#define RK3328_PD_MSCH 3 -#define RK3328_PD_PERI 4 -#define RK3328_PD_VIDEO 5 -#define RK3328_PD_HEVC 6 -#define RK3328_PD_SYS 7 -#define RK3328_PD_VPU 8 -#define RK3328_PD_VIO 9 - -#endif -- cgit v1.2.3 From 4bbfacf83a92bc7bf23c327ce678db725695c19f Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Sat, 4 May 2024 19:42:58 +0000 Subject: rockchip: rk3399: Remove redundant device tree files Remove redundant device tree files now that RK3399 boards have been migrated to use OF_UPSTREAM. Signed-off-by: Jonas Karlman Reviewed-by: Kever Yang --- arch/arm/dts/rk3399-eaidk-610.dts | 940 ------- arch/arm/dts/rk3399-evb.dts | 485 ---- arch/arm/dts/rk3399-ficus.dts | 174 -- arch/arm/dts/rk3399-firefly.dts | 944 ------- arch/arm/dts/rk3399-gru-bob.dts | 95 - arch/arm/dts/rk3399-gru-chromebook.dtsi | 590 ---- arch/arm/dts/rk3399-gru-kevin.dts | 328 --- arch/arm/dts/rk3399-gru.dtsi | 865 ------ arch/arm/dts/rk3399-khadas-edge-captain.dts | 31 - arch/arm/dts/rk3399-khadas-edge-v.dts | 31 - arch/arm/dts/rk3399-khadas-edge.dts | 13 - arch/arm/dts/rk3399-khadas-edge.dtsi | 837 ------ arch/arm/dts/rk3399-leez-p710.dts | 653 ----- arch/arm/dts/rk3399-nanopc-t4.dts | 137 - arch/arm/dts/rk3399-nanopi-m4.dts | 66 - arch/arm/dts/rk3399-nanopi-m4b.dts | 52 - arch/arm/dts/rk3399-nanopi-neo4.dts | 50 - arch/arm/dts/rk3399-nanopi-r4s.dts | 133 - arch/arm/dts/rk3399-nanopi4.dtsi | 762 ----- arch/arm/dts/rk3399-op1-opp.dtsi | 166 -- arch/arm/dts/rk3399-opp.dtsi | 133 - arch/arm/dts/rk3399-orangepi.dts | 896 ------ arch/arm/dts/rk3399-pinebook-pro.dts | 1111 -------- arch/arm/dts/rk3399-pinephone-pro.dts | 621 ----- arch/arm/dts/rk3399-puma-haikou.dts | 306 -- arch/arm/dts/rk3399-puma.dtsi | 532 ---- arch/arm/dts/rk3399-roc-pc-mezzanine.dts | 111 - arch/arm/dts/rk3399-roc-pc.dts | 12 - arch/arm/dts/rk3399-roc-pc.dtsi | 844 ------ arch/arm/dts/rk3399-rock-4c-plus.dts | 709 ----- arch/arm/dts/rk3399-rock-4se.dts | 65 - arch/arm/dts/rk3399-rock-pi-4.dtsi | 792 ------ arch/arm/dts/rk3399-rock-pi-4a.dts | 24 - arch/arm/dts/rk3399-rock-pi-4c.dts | 80 - arch/arm/dts/rk3399-rock960.dts | 156 -- arch/arm/dts/rk3399-rock960.dtsi | 673 ----- arch/arm/dts/rk3399-rockpro64.dts | 30 - arch/arm/dts/rk3399-rockpro64.dtsi | 956 ------- arch/arm/dts/rk3399-t-opp.dtsi | 114 - arch/arm/dts/rk3399.dtsi | 2945 -------------------- arch/arm/dts/rk3399pro-rock-pi-n10.dts | 22 - arch/arm/dts/rk3399pro-vmarc-som.dtsi | 477 ---- arch/arm/dts/rk3399pro.dtsi | 22 - .../clock/rockchip,rk3399-dmc.txt | 42 - include/dt-bindings/clock/rk3399-cru.h | 751 ----- include/dt-bindings/power/rk3399-power.h | 53 - 46 files changed, 19829 deletions(-) delete mode 100644 arch/arm/dts/rk3399-eaidk-610.dts delete mode 100644 arch/arm/dts/rk3399-evb.dts delete mode 100644 arch/arm/dts/rk3399-ficus.dts delete mode 100644 arch/arm/dts/rk3399-firefly.dts delete mode 100644 arch/arm/dts/rk3399-gru-bob.dts delete mode 100644 arch/arm/dts/rk3399-gru-chromebook.dtsi delete mode 100644 arch/arm/dts/rk3399-gru-kevin.dts delete mode 100644 arch/arm/dts/rk3399-gru.dtsi delete mode 100644 arch/arm/dts/rk3399-khadas-edge-captain.dts delete mode 100644 arch/arm/dts/rk3399-khadas-edge-v.dts delete mode 100644 arch/arm/dts/rk3399-khadas-edge.dts delete mode 100644 arch/arm/dts/rk3399-khadas-edge.dtsi delete mode 100644 arch/arm/dts/rk3399-leez-p710.dts delete mode 100644 arch/arm/dts/rk3399-nanopc-t4.dts delete mode 100644 arch/arm/dts/rk3399-nanopi-m4.dts delete mode 100644 arch/arm/dts/rk3399-nanopi-m4b.dts delete mode 100644 arch/arm/dts/rk3399-nanopi-neo4.dts delete mode 100644 arch/arm/dts/rk3399-nanopi-r4s.dts delete mode 100644 arch/arm/dts/rk3399-nanopi4.dtsi delete mode 100644 arch/arm/dts/rk3399-op1-opp.dtsi delete mode 100644 arch/arm/dts/rk3399-opp.dtsi delete mode 100644 arch/arm/dts/rk3399-orangepi.dts delete mode 100644 arch/arm/dts/rk3399-pinebook-pro.dts delete mode 100644 arch/arm/dts/rk3399-pinephone-pro.dts delete mode 100644 arch/arm/dts/rk3399-puma-haikou.dts delete mode 100644 arch/arm/dts/rk3399-puma.dtsi delete mode 100644 arch/arm/dts/rk3399-roc-pc-mezzanine.dts delete mode 100644 arch/arm/dts/rk3399-roc-pc.dts delete mode 100644 arch/arm/dts/rk3399-roc-pc.dtsi delete mode 100644 arch/arm/dts/rk3399-rock-4c-plus.dts delete mode 100644 arch/arm/dts/rk3399-rock-4se.dts delete mode 100644 arch/arm/dts/rk3399-rock-pi-4.dtsi delete mode 100644 arch/arm/dts/rk3399-rock-pi-4a.dts delete mode 100644 arch/arm/dts/rk3399-rock-pi-4c.dts delete mode 100644 arch/arm/dts/rk3399-rock960.dts delete mode 100644 arch/arm/dts/rk3399-rock960.dtsi delete mode 100644 arch/arm/dts/rk3399-rockpro64.dts delete mode 100644 arch/arm/dts/rk3399-rockpro64.dtsi delete mode 100644 arch/arm/dts/rk3399-t-opp.dtsi delete mode 100644 arch/arm/dts/rk3399.dtsi delete mode 100644 arch/arm/dts/rk3399pro-rock-pi-n10.dts delete mode 100644 arch/arm/dts/rk3399pro-vmarc-som.dtsi delete mode 100644 arch/arm/dts/rk3399pro.dtsi delete mode 100644 doc/device-tree-bindings/clock/rockchip,rk3399-dmc.txt delete mode 100644 include/dt-bindings/clock/rk3399-cru.h delete mode 100644 include/dt-bindings/power/rk3399-power.h (limited to 'include') diff --git a/arch/arm/dts/rk3399-eaidk-610.dts b/arch/arm/dts/rk3399-eaidk-610.dts deleted file mode 100644 index 173da81fc23..00000000000 --- a/arch/arm/dts/rk3399-eaidk-610.dts +++ /dev/null @@ -1,940 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (c) 2022 Fuzhou Rockchip Electronics Co., Ltd. - */ - -/dts-v1/; -#include -#include -#include -#include "rk3399.dtsi" -#include "rk3399-opp.dtsi" - -/ { - model = "OPEN AI LAB EAIDK-610"; - compatible = "openailab,eaidk-610", "rockchip,rk3399"; - - aliases { - ethernet0 = &gmac; - mmc0 = &sdio0; - mmc1 = &sdmmc; - mmc2 = &sdhci; - }; - - backlight: backlight { - compatible = "pwm-backlight"; - pwms = <&pwm0 0 25000 0>; - brightness-levels = < - 0 1 2 3 4 5 6 7 - 8 9 10 11 12 13 14 15 - 16 17 18 19 20 21 22 23 - 24 25 26 27 28 29 30 31 - 32 33 34 35 36 37 38 39 - 40 41 42 43 44 45 46 47 - 48 49 50 51 52 53 54 55 - 56 57 58 59 60 61 62 63 - 64 65 66 67 68 69 70 71 - 72 73 74 75 76 77 78 79 - 80 81 82 83 84 85 86 87 - 88 89 90 91 92 93 94 95 - 96 97 98 99 100 101 102 103 - 104 105 106 107 108 109 110 111 - 112 113 114 115 116 117 118 119 - 120 121 122 123 124 125 126 127 - 128 129 130 131 132 133 134 135 - 136 137 138 139 140 141 142 143 - 144 145 146 147 148 149 150 151 - 152 153 154 155 156 157 158 159 - 160 161 162 163 164 165 166 167 - 168 169 170 171 172 173 174 175 - 176 177 178 179 180 181 182 183 - 184 185 186 187 188 189 190 191 - 192 193 194 195 196 197 198 199 - 200 201 202 203 204 205 206 207 - 208 209 210 211 212 213 214 215 - 216 217 218 219 220 221 222 223 - 224 225 226 227 228 229 230 231 - 232 233 234 235 236 237 238 239 - 240 241 242 243 244 245 246 247 - 248 249 250 251 252 253 254 255>; - default-brightness-level = <200>; - }; - - clkin_gmac: external-gmac-clock { - compatible = "fixed-clock"; - clock-frequency = <125000000>; - clock-output-names = "clkin_gmac"; - #clock-cells = <0>; - }; - - dc_12v: dc-12v { - compatible = "regulator-fixed"; - regulator-name = "dc_12v"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <12000000>; - regulator-max-microvolt = <12000000>; - }; - - gpio-keys { - compatible = "gpio-keys"; - autorepeat; - pinctrl-names = "default"; - pinctrl-0 = <&pwrbtn>; - - key-power { - debounce-interval = <100>; - gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>; - label = "GPIO Key Power"; - linux,code = ; - wakeup-source; - }; - }; - - leds { - compatible = "gpio-leds"; - pinctrl-names = "default"; - pinctrl-0 = <&work_led_pin>, <&user_led_pin>, - <&heartbeat_led_pin>, <&wlan_active_led_pin>, - <&bt_active_led_pin>; - - work_led: led-0 { - label = "blue:work"; - default-state = "on"; - gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>; - }; - - user_led: led-1 { - label = "read:user"; - default-state = "off"; - gpios = <&gpio0 RK_PB4 GPIO_ACTIVE_HIGH>; - }; - - heartbeat_led: led-2 { - label = "green:heartbeat"; - linux,default-trigger = "heartbeat"; - gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>; - }; - - wlan_active_led: led-3 { - label = "yellow:wlan"; - gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_HIGH>; - linux,default-trigger = "phy0tx"; - default-state = "off"; - }; - - bt_active_led: led-4 { - label = "blue:bt"; - gpios = <&gpio2 RK_PD4 GPIO_ACTIVE_HIGH>; - linux,default-trigger = "hci0-power"; - default-state = "off"; - }; - }; - - rt5651-sound { - compatible = "simple-audio-card"; - simple-audio-card,name = "realtek,rt5651-codec"; - simple-audio-card,format = "i2s"; - simple-audio-card,mclk-fs = <256>; - simple-audio-card,widgets = - "Microphone", "Mic Jack", - "Headphone", "Headphone Jack"; - simple-audio-card,routing = - "Mic Jack", "MICBIAS1", - "IN1P", "Mic Jack", - "Headphone Jack", "HPOL", - "Headphone Jack", "HPOR"; - simple-audio-card,cpu { - sound-dai = <&i2s1>; - }; - simple-audio-card,codec { - sound-dai = <&rt5651>; - }; - }; - - sdio_pwrseq: sdio-pwrseq { - compatible = "mmc-pwrseq-simple"; - clocks = <&rk808 1>; - clock-names = "ext_clock"; - pinctrl-names = "default"; - pinctrl-0 = <&wifi_enable_h>; - - /* - * On the module itself this is one of these (depending - * on the actual card populated): - * - SDIO_RESET_L_WL_REG_ON - * - PDN (power down when low) - */ - reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>; - }; - - /* switched by pmic_sleep */ - vcc1v8_s3: vcca1v8_s3: vcc1v8-s3 { - compatible = "regulator-fixed"; - regulator-name = "vcc1v8_s3"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - vin-supply = <&vcc_1v8>; - }; - - vcc3v3_sys: vcc3v3-sys { - compatible = "regulator-fixed"; - regulator-name = "vcc3v3_sys"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <&dc_12v>; - }; - - vcc5v0_sys: vcc5v0-sys { - compatible = "regulator-fixed"; - regulator-name = "vcc5v0_sys"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - vin-supply = <&dc_12v>; - }; - - /* For USB3.0 Port1/2 */ - vcc5v0_host1: vcc5v0-host1-regulator { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&vcc5v0_host1_en>; - regulator-name = "vcc5v0_host1"; - regulator-always-on; - vin-supply = <&vcc5v0_sys>; - }; - - /* For USB2.0 Port1/2 */ - vcc5v0_host3: vcc5v0-host3-regulator { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&vcc5v0_host3_en>; - regulator-name = "vcc5v0_host3"; - regulator-always-on; - vin-supply = <&vcc5v0_sys>; - }; - - vcc5v0_typec: vcc5v0-typec-regulator { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <&gpio4 RK_PC5 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&vcc5v0_typec_en>; - regulator-name = "vcc5v0_typec"; - regulator-always-on; - vin-supply = <&vcc3v3_sys>; - }; - - vdd_log: vdd-log { - compatible = "regulator-fixed"; - regulator-name = "vdd_log"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <900000>; - }; -}; - -&cpu_l0 { - cpu-supply = <&vdd_cpu_l>; -}; - -&cpu_l1 { - cpu-supply = <&vdd_cpu_l>; -}; - -&cpu_l2 { - cpu-supply = <&vdd_cpu_l>; -}; - -&cpu_l3 { - cpu-supply = <&vdd_cpu_l>; -}; - -&cpu_b0 { - cpu-supply = <&vdd_cpu_b>; -}; - -&cpu_b1 { - cpu-supply = <&vdd_cpu_b>; -}; - -&emmc_phy { - status = "okay"; -}; - -&gmac { - assigned-clocks = <&cru SCLK_RMII_SRC>; - assigned-clock-parents = <&clkin_gmac>; - clock_in_out = "input"; - phy-supply = <&vcc_lan>; - phy-mode = "rgmii"; - pinctrl-names = "default"; - pinctrl-0 = <&rgmii_pins>; - snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; - snps,reset-active-low; - snps,reset-delays-us = <0 10000 50000>; - tx_delay = <0x28>; - rx_delay = <0x11>; - status = "okay"; -}; - -&gpu { - mali-supply = <&vdd_gpu>; - status = "okay"; -}; - -&hdmi { - ddc-i2c-bus = <&i2c3>; - pinctrl-names = "default"; - pinctrl-0 = <&hdmi_cec>; - status = "okay"; -}; - -&i2c0 { - status = "okay"; - - rk808: pmic@1b { - compatible = "rockchip,rk808"; - reg = <0x1b>; - interrupt-parent = <&gpio1>; - interrupts = <21 IRQ_TYPE_LEVEL_LOW>; - pinctrl-names = "default"; - pinctrl-0 = <&pmic_int_l>; - rockchip,system-power-controller; - wakeup-source; - #clock-cells = <1>; - clock-output-names = "xin32k", "rk808-clkout2"; - - vcc1-supply = <&vcc3v3_sys>; - vcc2-supply = <&vcc3v3_sys>; - vcc3-supply = <&vcc3v3_sys>; - vcc4-supply = <&vcc3v3_sys>; - vcc6-supply = <&vcc3v3_sys>; - vcc7-supply = <&vcc3v3_sys>; - vcc8-supply = <&vcc3v3_sys>; - vcc9-supply = <&vcc3v3_sys>; - vcc10-supply = <&vcc3v3_sys>; - vcc11-supply = <&vcc3v3_sys>; - vcc12-supply = <&vcc3v3_sys>; - vddio-supply = <&vcc_3v0>; - - regulators { - vdd_center: DCDC_REG1 { - regulator-name = "vdd_center"; - regulator-min-microvolt = <750000>; - regulator-max-microvolt = <1350000>; - regulator-ramp-delay = <6001>; - regulator-always-on; - regulator-boot-on; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_cpu_l: DCDC_REG2 { - regulator-name = "vdd_cpu_l"; - regulator-min-microvolt = <750000>; - regulator-max-microvolt = <1350000>; - regulator-ramp-delay = <6001>; - regulator-always-on; - regulator-boot-on; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_ddr: DCDC_REG3 { - regulator-name = "vcc_ddr"; - regulator-always-on; - regulator-boot-on; - regulator-state-mem { - regulator-on-in-suspend; - }; - }; - - vcc_1v8: DCDC_REG4 { - regulator-name = "vcc_1v8"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - regulator-boot-on; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vcc1v8_dvp: LDO_REG1 { - regulator-name = "vcc1v8_dvp"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - regulator-boot-on; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc2v8_dvp: LDO_REG2 { - regulator-name = "vcc2v8_dvp"; - regulator-min-microvolt = <2800000>; - regulator-max-microvolt = <2800000>; - regulator-always-on; - regulator-boot-on; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc1v8_pmu: LDO_REG3 { - regulator-name = "vcc1v8_pmu"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - regulator-boot-on; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vcc_sdio: LDO_REG4 { - regulator-name = "vcc_sdio"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3000000>; - regulator-always-on; - regulator-boot-on; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <3000000>; - }; - }; - - vcca3v0_codec: LDO_REG5 { - regulator-name = "vcca3v0_codec"; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - regulator-always-on; - regulator-boot-on; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_1v5: LDO_REG6 { - regulator-name = "vcc_1v5"; - regulator-min-microvolt = <1500000>; - regulator-max-microvolt = <1500000>; - regulator-always-on; - regulator-boot-on; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1500000>; - }; - }; - - vcca1v8_codec: LDO_REG7 { - regulator-name = "vcca1v8_codec"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - regulator-boot-on; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_3v0: LDO_REG8 { - regulator-name = "vcc_3v0"; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - regulator-always-on; - regulator-boot-on; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <3000000>; - }; - }; - - vcc3v3_s3: vcc_lan: SWITCH_REG1 { - regulator-name = "vcc3v3_s3"; - regulator-always-on; - regulator-boot-on; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc3v3_s0: SWITCH_REG2 { - regulator-name = "vcc3v3_s0"; - regulator-always-on; - regulator-boot-on; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - }; - }; - - vdd_cpu_b: regulator@40 { - compatible = "silergy,syr827"; - reg = <0x40>; - fcs,suspend-voltage-selector = <1>; - regulator-name = "vdd_cpu_b"; - pinctrl-names = "default"; - pinctrl-0 = <&vsel1_pin>; - regulator-min-microvolt = <712500>; - regulator-max-microvolt = <1500000>; - regulator-ramp-delay = <1000>; - regulator-always-on; - regulator-boot-on; - vin-supply = <&vcc3v3_sys>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_gpu: regulator@41 { - compatible = "silergy,syr828"; - reg = <0x41>; - fcs,suspend-voltage-selector = <1>; - regulator-name = "vdd_gpu"; - pinctrl-names = "default"; - pinctrl-0 = <&vsel2_pin>; - regulator-min-microvolt = <712500>; - regulator-max-microvolt = <1500000>; - regulator-ramp-delay = <1000>; - regulator-always-on; - regulator-boot-on; - vin-supply = <&vcc3v3_sys>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; -}; - -&i2c1 { - i2c-scl-rising-time-ns = <300>; - i2c-scl-falling-time-ns = <15>; - status = "okay"; - - rt5651: audio-codec@1a { - compatible = "rockchip,rt5651"; - reg = <0x1a>; - clocks = <&cru SCLK_I2S_8CH_OUT>; - clock-names = "mclk"; - hp-det-gpio = <&gpio4 RK_PD4 GPIO_ACTIVE_LOW>; - spk-con-gpio = <&gpio0 RK_PB3 GPIO_ACTIVE_HIGH>; - #sound-dai-cells = <0>; - }; - -}; - -&i2c3 { - i2c-scl-rising-time-ns = <450>; - i2c-scl-falling-time-ns = <15>; - status = "okay"; -}; - -&i2c4 { - i2c-scl-rising-time-ns = <600>; - i2c-scl-falling-time-ns = <20>; - status = "okay"; - - fusb0: typec-portc@22 { - compatible = "fcs,fusb302"; - reg = <0x22>; - interrupt-parent = <&gpio1>; - interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&fusb0_int>; - vbus-supply = <&vcc5v0_typec>; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - usbc0_role_sw: endpoint@0 { - remote-endpoint = <&dwc3_0_role_switch>; - }; - }; - }; - - connector { - compatible = "usb-c-connector"; - data-role = "dual"; - label = "USB-C"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - - usbc_hs: endpoint { - remote-endpoint = <&u2phy0_typec_hs>; - }; - }; - - port@1 { - reg = <1>; - - usbc_ss: endpoint { - remote-endpoint = <&tcphy0_typec_ss>; - }; - }; - }; - }; - }; -}; - -&i2s1 { - rockchip,playback-channels = <2>; - rockchip,capture-channels = <2>; - status = "okay"; -}; - -&i2s2 { - status = "okay"; -}; - -&io_domains { - status = "okay"; - - audio-supply = <&vcca1v8_codec>; - bt656-supply = <&vcc_3v0>; - gpio1830-supply = <&vcc_3v0>; - sdmmc-supply = <&vcc_sdio>; -}; - -&pmu_io_domains { - status = "okay"; - - pmu1830-supply = <&vcc_3v0>; -}; - -&pinctrl { - buttons { - pwrbtn: pwrbtn { - rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - bt { - bt_enable_h: bt-enable-h { - rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - bt_host_wake_l: bt-host-wake-l { - rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - bt_wake_l: bt-wake-l { - rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - fusb302x { - fusb0_int: fusb0-int { - rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - lcd-panel { - lcd_panel_reset: lcd-panel-reset { - rockchip,pins = <4 RK_PD6 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - leds { - work_led_pin: work-led-pin { - rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - user_led_pin: user-led-pin { - rockchip,pins = <0 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - heartbeat_led_pin: heartbeat-led-pin { - rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - wlan_active_led_pin: wlan-led-pin { - rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - bt_active_led_pin: bt-led-pin { - rockchip,pins = <2 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - - }; - - pmic { - pmic_int_l: pmic-int-l { - rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>; - }; - - vsel1_pin: vsel1-pin { - rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>; - }; - - vsel2_pin: vsel2-pin { - rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>; - }; - }; - - rt5651 { - rt5651_hpcon: rt5640-hpcon { - rockchip,pins = <4 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - sdio-pwrseq { - wifi_enable_h: wifi-enable-h { - rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - usb-typec { - vcc5v0_typec_en: vcc5v0_typec_en { - rockchip,pins = <4 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - usb2 { - vcc5v0_host3_en: vcc5v0-host3-en { - rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - vcc5v0_host1_en: vcc5v0-host1-en { - rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - wifi { - wifi_host_wake_l: wifi-host-wake-l { - rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; -}; - -&pwm0 { - status = "okay"; -}; - -&saradc { - vref-supply = <&vcca1v8_s3>; - status = "okay"; -}; - -&sdio0 { - /* WiFi & BT combo module AMPAK AP6255 */ - #address-cells = <1>; - #size-cells = <0>; - bus-width = <4>; - clock-frequency = <50000000>; - cap-sdio-irq; - cap-sd-highspeed; - keep-power-in-suspend; - mmc-pwrseq = <&sdio_pwrseq>; - non-removable; - pinctrl-names = "default"; - pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>; - sd-uhs-sdr104; - status = "okay"; - - brcmf: wifi@1 { - compatible = "brcm,bcm4329-fmac"; - reg = <1>; - interrupt-parent = <&gpio0>; - interrupts = ; - interrupt-names = "host-wake"; - pinctrl-names = "default"; - pinctrl-0 = <&wifi_host_wake_l>; - }; -}; - -&sdmmc { - bus-width = <4>; - cap-mmc-highspeed; - cap-sd-highspeed; - cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>; - disable-wp; - max-frequency = <150000000>; - pinctrl-names = "default"; - pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>; - status = "okay"; -}; - -&sdhci { - bus-width = <8>; - non-removable; - status = "okay"; -}; - -&tcphy0 { - status = "okay"; -}; - -&tcphy0_usb3 { - orientation-switch; - port { - tcphy0_typec_ss: endpoint { - remote-endpoint = <&usbc_ss>; - }; - }; -}; - -&tcphy1 { - status = "okay"; -}; - -&tsadc { - /* tshut mode 0:CRU 1:GPIO */ - rockchip,hw-tshut-mode = <1>; - /* tshut polarity 0:LOW 1:HIGH */ - rockchip,hw-tshut-polarity = <1>; - status = "okay"; -}; - -&u2phy0 { - status = "okay"; - - u2phy0_otg: otg-port { - status = "okay"; - }; - - u2phy0_host: host-port { - phy-supply = <&vcc5v0_host3>; - status = "okay"; - }; - - port { - u2phy0_typec_hs: endpoint { - remote-endpoint = <&usbc_hs>; - }; - }; -}; - -&u2phy1 { - status = "okay"; - - u2phy1_otg: otg-port { - status = "okay"; - }; - - u2phy1_host: host-port { - phy-supply = <&vcc5v0_host3>; - status = "okay"; - }; -}; - -&uart0 { - pinctrl-names = "default"; - pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>; - status = "okay"; - - bluetooth { - compatible = "brcm,bcm4345c5"; - clocks = <&rk808 1>; - clock-names = "lpo"; - device-wakeup-gpios = <&gpio2 RK_PD2 GPIO_ACTIVE_HIGH>; - host-wakeup-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>; - shutdown-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>; - max-speed = <1500000>; - pinctrl-names = "default"; - pinctrl-0 = <&bt_host_wake_l &bt_wake_l &bt_enable_h>; - vbat-supply = <&vcc3v3_sys>; - vddio-supply = <&vcc_1v8>; - }; -}; - -&uart2 { - status = "okay"; -}; - -&usb_host0_ehci { - status = "okay"; -}; - -&usb_host0_ohci { - status = "okay"; -}; - -&usb_host1_ehci { - status = "okay"; -}; - -&usb_host1_ohci { - status = "okay"; -}; - -&usbdrd3_0 { - status = "okay"; -}; - -&usbdrd_dwc3_0 { - status = "okay"; - usb-role-switch; - - port { - #address-cells = <1>; - #size-cells = <0>; - dwc3_0_role_switch: endpoint@0 { - reg = <0>; - remote-endpoint = <&usbc0_role_sw>; - }; - }; -}; - -&usbdrd3_1 { - status = "okay"; -}; - -&usbdrd_dwc3_1 { - status = "okay"; - dr_mode = "host"; -}; - -&vopb { - status = "okay"; -}; - -&vopb_mmu { - status = "okay"; -}; - -&vopl { - status = "okay"; -}; - -&vopl_mmu { - status = "okay"; -}; diff --git a/arch/arm/dts/rk3399-evb.dts b/arch/arm/dts/rk3399-evb.dts deleted file mode 100644 index 55eca7a50a1..00000000000 --- a/arch/arm/dts/rk3399-evb.dts +++ /dev/null @@ -1,485 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd - */ - -/dts-v1/; -#include -#include "rk3399.dtsi" - -/ { - model = "Rockchip RK3399 Evaluation Board"; - compatible = "rockchip,rk3399-evb", "rockchip,rk3399"; - - aliases { - ethernet0 = &gmac; - mmc0 = &sdhci; - }; - - backlight: backlight { - compatible = "pwm-backlight"; - brightness-levels = < - 0 1 2 3 4 5 6 7 - 8 9 10 11 12 13 14 15 - 16 17 18 19 20 21 22 23 - 24 25 26 27 28 29 30 31 - 32 33 34 35 36 37 38 39 - 40 41 42 43 44 45 46 47 - 48 49 50 51 52 53 54 55 - 56 57 58 59 60 61 62 63 - 64 65 66 67 68 69 70 71 - 72 73 74 75 76 77 78 79 - 80 81 82 83 84 85 86 87 - 88 89 90 91 92 93 94 95 - 96 97 98 99 100 101 102 103 - 104 105 106 107 108 109 110 111 - 112 113 114 115 116 117 118 119 - 120 121 122 123 124 125 126 127 - 128 129 130 131 132 133 134 135 - 136 137 138 139 140 141 142 143 - 144 145 146 147 148 149 150 151 - 152 153 154 155 156 157 158 159 - 160 161 162 163 164 165 166 167 - 168 169 170 171 172 173 174 175 - 176 177 178 179 180 181 182 183 - 184 185 186 187 188 189 190 191 - 192 193 194 195 196 197 198 199 - 200 201 202 203 204 205 206 207 - 208 209 210 211 212 213 214 215 - 216 217 218 219 220 221 222 223 - 224 225 226 227 228 229 230 231 - 232 233 234 235 236 237 238 239 - 240 241 242 243 244 245 246 247 - 248 249 250 251 252 253 254 255>; - default-brightness-level = <200>; - pwms = <&pwm0 0 25000 0>; - }; - - edp_panel: edp-panel { - compatible = "lg,lp079qx1-sp0v"; - backlight = <&backlight>; - enable-gpios = <&gpio1 RK_PB5 GPIO_ACTIVE_HIGH>; - power-supply = <&vcc3v3_s0>; - - port { - panel_in_edp: endpoint { - remote-endpoint = <&edp_out_panel>; - }; - }; - }; - - clkin_gmac: external-gmac-clock { - compatible = "fixed-clock"; - clock-frequency = <125000000>; - clock-output-names = "clkin_gmac"; - #clock-cells = <0>; - }; - - vdd_center: vdd-center { - compatible = "pwm-regulator"; - pwms = <&pwm3 0 25000 0>; - regulator-name = "vdd_center"; - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <1400000>; - regulator-always-on; - regulator-boot-on; - status = "okay"; - }; - - vcc3v3_sys: vcc3v3-sys { - compatible = "regulator-fixed"; - regulator-name = "vcc3v3_sys"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - }; - - vcc5v0_sys: vcc5v0-sys { - compatible = "regulator-fixed"; - regulator-name = "vcc5v0_sys"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - }; - - vcc5v0_host: vcc5v0-host-regulator { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <&gpio4 RK_PD1 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&vcc5v0_host_en>; - regulator-name = "vcc5v0_host"; - vin-supply = <&vcc5v0_sys>; - }; - - vcc_phy: vcc-phy-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc_phy"; - regulator-always-on; - regulator-boot-on; - }; - - vcc_phy: vcc-phy-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc_phy"; - regulator-always-on; - regulator-boot-on; - }; - -}; - -&edp { - status = "okay"; - force-hpd; - - ports { - edp_out: port@1 { - reg = <1>; - #address-cells = <1>; - #size-cells = <0>; - - edp_out_panel: endpoint@0 { - reg = <0>; - remote-endpoint = <&panel_in_edp>; - }; - }; - }; -}; - -&emmc_phy { - status = "okay"; -}; - -&gmac { - assigned-clocks = <&cru SCLK_RMII_SRC>; - assigned-clock-parents = <&clkin_gmac>; - clock_in_out = "input"; - phy-supply = <&vcc_phy>; - phy-mode = "rgmii"; - pinctrl-names = "default"; - pinctrl-0 = <&rgmii_pins>; - snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; - snps,reset-active-low; - snps,reset-delays-us = <0 10000 50000>; - tx_delay = <0x28>; - rx_delay = <0x11>; - status = "okay"; -}; - -&i2c0 { - status = "okay"; - - rk808: pmic@1b { - compatible = "rockchip,rk808"; - reg = <0x1b>; - interrupt-parent = <&gpio1>; - interrupts = <21 IRQ_TYPE_LEVEL_LOW>; - pinctrl-names = "default"; - pinctrl-0 = <&pmic_int_l>; - rockchip,system-power-controller; - wakeup-source; - #clock-cells = <1>; - clock-output-names = "rk808-clkout1", "rk808-clkout2"; - - vcc1-supply = <&vcc3v3_sys>; - vcc2-supply = <&vcc3v3_sys>; - vcc3-supply = <&vcc3v3_sys>; - vcc4-supply = <&vcc3v3_sys>; - vcc6-supply = <&vcc3v3_sys>; - vcc7-supply = <&vcc3v3_sys>; - vcc8-supply = <&vcc3v3_sys>; - vcc9-supply = <&vcc3v3_sys>; - vcc10-supply = <&vcc3v3_sys>; - vcc11-supply = <&vcc3v3_sys>; - vcc12-supply = <&vcc3v3_sys>; - vddio-supply = <&vcc1v8_pmu>; - - regulators { - vdd_log: DCDC_REG1 { - regulator-name = "vdd_log"; - regulator-min-microvolt = <750000>; - regulator-max-microvolt = <1350000>; - regulator-ramp-delay = <6001>; - regulator-always-on; - regulator-boot-on; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <900000>; - }; - }; - - vdd_cpu_l: DCDC_REG2 { - regulator-name = "vdd_cpu_l"; - regulator-min-microvolt = <750000>; - regulator-max-microvolt = <1350000>; - regulator-ramp-delay = <6001>; - regulator-always-on; - regulator-boot-on; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_ddr: DCDC_REG3 { - regulator-name = "vcc_ddr"; - regulator-always-on; - regulator-boot-on; - regulator-state-mem { - regulator-on-in-suspend; - }; - }; - - vcc_1v8: DCDC_REG4 { - regulator-name = "vcc_1v8"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - regulator-boot-on; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vcc1v8_dvp: LDO_REG1 { - regulator-name = "vcc1v8_dvp"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - regulator-boot-on; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc3v0_tp: LDO_REG2 { - regulator-name = "vcc3v0_tp"; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - regulator-always-on; - regulator-boot-on; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc1v8_pmu: LDO_REG3 { - regulator-name = "vcc1v8_pmu"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - regulator-boot-on; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vcc_sd: LDO_REG4 { - regulator-name = "vcc_sd"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3000000>; - regulator-always-on; - regulator-boot-on; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <3000000>; - }; - }; - - vcca3v0_codec: LDO_REG5 { - regulator-name = "vcca3v0_codec"; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - regulator-always-on; - regulator-boot-on; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_1v5: LDO_REG6 { - regulator-name = "vcc_1v5"; - regulator-min-microvolt = <1500000>; - regulator-max-microvolt = <1500000>; - regulator-always-on; - regulator-boot-on; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1500000>; - }; - }; - - vcca1v8_codec: LDO_REG7 { - regulator-name = "vcca1v8_codec"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - regulator-boot-on; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_3v0: LDO_REG8 { - regulator-name = "vcc_3v0"; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - regulator-always-on; - regulator-boot-on; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <3000000>; - }; - }; - - vcc3v3_s3: SWITCH_REG1 { - regulator-name = "vcc3v3_s3"; - regulator-always-on; - regulator-boot-on; - regulator-state-mem { - regulator-on-in-suspend; - }; - }; - - vcc3v3_s0: SWITCH_REG2 { - regulator-name = "vcc3v3_s0"; - regulator-always-on; - regulator-boot-on; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - }; - }; - - vdd_cpu_b: regulator@40 { - compatible = "silergy,syr827"; - reg = <0x40>; - fcs,suspend-voltage-selector = <1>; - regulator-name = "vdd_cpu_b"; - regulator-min-microvolt = <712500>; - regulator-max-microvolt = <1500000>; - regulator-ramp-delay = <1000>; - regulator-always-on; - regulator-boot-on; - vin-supply = <&vcc5v0_sys>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_gpu: regulator@41 { - compatible = "silergy,syr828"; - reg = <0x41>; - fcs,suspend-voltage-selector = <1>; - regulator-name = "vdd_gpu"; - regulator-min-microvolt = <712500>; - regulator-max-microvolt = <1500000>; - regulator-ramp-delay = <1000>; - regulator-always-on; - regulator-boot-on; - vin-supply = <&vcc5v0_sys>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; -}; - -&pwm0 { - status = "okay"; -}; - -&pwm2 { - status = "okay"; -}; - -&pwm3 { - status = "okay"; -}; - -&sdhci { - bus-width = <8>; - mmc-hs400-1_8v; - mmc-hs400-enhanced-strobe; - non-removable; - status = "okay"; -}; - -&pcie_phy { - status = "disabled"; -}; - -&pcie0 { - ep-gpios = <&gpio3 RK_PB5 GPIO_ACTIVE_HIGH>; - num-lanes = <4>; - pinctrl-names = "default"; - pinctrl-0 = <&pcie_clkreqn_cpm>; - status = "disabled"; -}; - -&u2phy0 { - status = "okay"; -}; - -&u2phy0_host { - phy-supply = <&vcc5v0_host>; - status = "okay"; -}; - -&u2phy1 { - status = "okay"; -}; - -&u2phy1_host { - phy-supply = <&vcc5v0_host>; - status = "okay"; -}; - -&uart2 { - status = "okay"; -}; - -&usb_host0_ehci { - status = "okay"; -}; - -&usb_host0_ohci { - status = "okay"; -}; - -&usb_host1_ehci { - status = "okay"; -}; - -&usb_host1_ohci { - status = "okay"; -}; - -&pinctrl { - pmic { - pmic_int_l: pmic-int-l { - rockchip,pins = - <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - usb2 { - vcc5v0_host_en: vcc5v0-host-en { - rockchip,pins = - <4 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; -}; - -&vopb { - status = "okay"; -}; - -&vopb_mmu { - status = "okay"; -}; diff --git a/arch/arm/dts/rk3399-ficus.dts b/arch/arm/dts/rk3399-ficus.dts deleted file mode 100644 index 30e4879f322..00000000000 --- a/arch/arm/dts/rk3399-ficus.dts +++ /dev/null @@ -1,174 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (c) 2018 Collabora Ltd. - * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd. - * - * Schematics available at https://dl.vamrs.com/products/ficus/docs/hw - */ - -/dts-v1/; -#include "rk3399-rock960.dtsi" - -/ { - model = "96boards RK3399 Ficus"; - compatible = "vamrs,ficus", "rockchip,rk3399"; - - aliases { - ethernet0 = &gmac; - }; - - chosen { - stdout-path = "serial2:1500000n8"; - }; - - clkin_gmac: external-gmac-clock { - compatible = "fixed-clock"; - clock-frequency = <125000000>; - clock-output-names = "clkin_gmac"; - #clock-cells = <0>; - }; - - leds { - compatible = "gpio-leds"; - pinctrl-names = "default"; - pinctrl-0 = <&user_led1_pin>, <&user_led2_pin>, - <&user_led3_pin>, <&user_led4_pin>, - <&wlan_led_pin>, <&bt_led_pin>; - - user_led1: led-1 { - label = "red:user1"; - gpios = <&gpio4 25 0>; - linux,default-trigger = "heartbeat"; - }; - - user_led2: led-2 { - label = "red:user2"; - gpios = <&gpio4 26 0>; - linux,default-trigger = "mmc0"; - }; - - user_led3: led-3 { - label = "red:user3"; - gpios = <&gpio4 30 0>; - linux,default-trigger = "mmc1"; - }; - - user_led4: led-4 { - label = "red:user4"; - gpios = <&gpio1 0 0>; - panic-indicator; - linux,default-trigger = "none"; - }; - - wlan_active_led: led-5 { - label = "red:wlan"; - gpios = <&gpio1 1 0>; - linux,default-trigger = "phy0tx"; - default-state = "off"; - }; - - bt_active_led: led-6 { - label = "red:bt"; - gpios = <&gpio1 4 0>; - linux,default-trigger = "hci0-power"; - default-state = "off"; - }; - }; -}; - -&gmac { - assigned-clocks = <&cru SCLK_RMII_SRC>; - assigned-clock-parents = <&clkin_gmac>; - clock_in_out = "input"; - phy-supply = <&vcc3v3_sys>; - phy-mode = "rgmii"; - pinctrl-names = "default"; - pinctrl-0 = <&rgmii_pins>; - snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; - snps,reset-active-low; - snps,reset-delays-us = <0 10000 50000>; - tx_delay = <0x28>; - rx_delay = <0x11>; - status = "okay"; -}; - -&pcie0 { - ep-gpios = <&gpio4 RK_PD4 GPIO_ACTIVE_HIGH>; -}; - -&pinctrl { - gmac { - rgmii_sleep_pins: rgmii-sleep-pins { - rockchip,pins = - <3 RK_PB7 RK_FUNC_GPIO &pcfg_output_low>; - }; - }; - - pcie { - pcie_drv: pcie-drv { - rockchip,pins = - <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - usb2 { - host_vbus_drv: host-vbus-drv { - rockchip,pins = - <4 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - leds { - user_led1_pin: user-led1-pin { - rockchip,pins = - <4 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - user_led2_pin: user-led2-pin { - rockchip,pins = - <4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - user_led3_pin: user-led3-pin { - rockchip,pins = - <4 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - user_led4_pin: user-led4-pin { - rockchip,pins = - <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - wlan_led_pin: wlan-led-pin { - rockchip,pins = - <1 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - bt_led_pin: bt-led-pin { - rockchip,pins = - <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; -}; - -&spi1 { - /* On both Low speed and High speed expansion */ - cs-gpios = <0>, <&gpio4 RK_PA6 0>, <&gpio4 RK_PA7 0>; - status = "okay"; -}; - -&usbdrd_dwc3_0 { - dr_mode = "host"; -}; - -&usbdrd_dwc3_1 { - dr_mode = "host"; -}; - -&vcc3v3_pcie { - gpio = <&gpio1 24 GPIO_ACTIVE_HIGH>; -}; - -&vcc5v0_host { - gpio = <&gpio4 27 GPIO_ACTIVE_HIGH>; -}; diff --git a/arch/arm/dts/rk3399-firefly.dts b/arch/arm/dts/rk3399-firefly.dts deleted file mode 100644 index 260415d99ae..00000000000 --- a/arch/arm/dts/rk3399-firefly.dts +++ /dev/null @@ -1,944 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd. - */ - -/dts-v1/; -#include -#include -#include -#include -#include "rk3399.dtsi" -#include "rk3399-opp.dtsi" - -/ { - model = "Firefly-RK3399 Board"; - compatible = "firefly,firefly-rk3399", "rockchip,rk3399"; - - aliases { - ethernet0 = &gmac; - mmc0 = &sdio0; - mmc1 = &sdmmc; - mmc2 = &sdhci; - }; - - chosen { - stdout-path = "serial2:1500000n8"; - }; - - backlight: backlight { - compatible = "pwm-backlight"; - enable-gpios = <&gpio1 RK_PB5 GPIO_ACTIVE_HIGH>; - pwms = <&pwm0 0 25000 0>; - brightness-levels = < - 0 1 2 3 4 5 6 7 - 8 9 10 11 12 13 14 15 - 16 17 18 19 20 21 22 23 - 24 25 26 27 28 29 30 31 - 32 33 34 35 36 37 38 39 - 40 41 42 43 44 45 46 47 - 48 49 50 51 52 53 54 55 - 56 57 58 59 60 61 62 63 - 64 65 66 67 68 69 70 71 - 72 73 74 75 76 77 78 79 - 80 81 82 83 84 85 86 87 - 88 89 90 91 92 93 94 95 - 96 97 98 99 100 101 102 103 - 104 105 106 107 108 109 110 111 - 112 113 114 115 116 117 118 119 - 120 121 122 123 124 125 126 127 - 128 129 130 131 132 133 134 135 - 136 137 138 139 140 141 142 143 - 144 145 146 147 148 149 150 151 - 152 153 154 155 156 157 158 159 - 160 161 162 163 164 165 166 167 - 168 169 170 171 172 173 174 175 - 176 177 178 179 180 181 182 183 - 184 185 186 187 188 189 190 191 - 192 193 194 195 196 197 198 199 - 200 201 202 203 204 205 206 207 - 208 209 210 211 212 213 214 215 - 216 217 218 219 220 221 222 223 - 224 225 226 227 228 229 230 231 - 232 233 234 235 236 237 238 239 - 240 241 242 243 244 245 246 247 - 248 249 250 251 252 253 254 255>; - default-brightness-level = <200>; - }; - - clkin_gmac: external-gmac-clock { - compatible = "fixed-clock"; - clock-frequency = <125000000>; - clock-output-names = "clkin_gmac"; - #clock-cells = <0>; - }; - - dc_12v: dc-12v { - compatible = "regulator-fixed"; - regulator-name = "dc_12v"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <12000000>; - regulator-max-microvolt = <12000000>; - }; - - gpio-keys { - compatible = "gpio-keys"; - autorepeat; - pinctrl-names = "default"; - pinctrl-0 = <&pwrbtn>; - - key-power { - debounce-interval = <100>; - gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>; - label = "GPIO Key Power"; - linux,code = ; - wakeup-source; - }; - }; - - ir-receiver { - compatible = "gpio-ir-receiver"; - gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_LOW>; - pinctrl-0 = <&ir_int>; - pinctrl-names = "default"; - }; - - leds { - compatible = "gpio-leds"; - pinctrl-names = "default"; - pinctrl-0 = <&work_led_pin>, <&diy_led_pin>; - - work_led: led-0 { - label = "work"; - default-state = "on"; - gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_HIGH>; - }; - - diy_led: led-1 { - label = "diy"; - default-state = "off"; - gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>; - }; - }; - - rt5640-sound { - compatible = "simple-audio-card"; - simple-audio-card,name = "rockchip,rt5640-codec"; - simple-audio-card,format = "i2s"; - simple-audio-card,mclk-fs = <256>; - simple-audio-card,widgets = - "Microphone", "Mic Jack", - "Headphone", "Headphone Jack"; - simple-audio-card,routing = - "Mic Jack", "MICBIAS1", - "IN1P", "Mic Jack", - "Headphone Jack", "HPOL", - "Headphone Jack", "HPOR"; - - simple-audio-card,cpu { - sound-dai = <&i2s1>; - }; - - simple-audio-card,codec { - sound-dai = <&rt5640>; - }; - }; - - sdio_pwrseq: sdio-pwrseq { - compatible = "mmc-pwrseq-simple"; - clocks = <&rk808 1>; - clock-names = "ext_clock"; - pinctrl-names = "default"; - pinctrl-0 = <&wifi_enable_h>; - - /* - * On the module itself this is one of these (depending - * on the actual card populated): - * - SDIO_RESET_L_WL_REG_ON - * - PDN (power down when low) - */ - reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>; - }; - - sound-dit { - compatible = "audio-graph-card"; - label = "SPDIF"; - dais = <&spdif_p0>; - }; - - spdif-dit { - compatible = "linux,spdif-dit"; - #sound-dai-cells = <0>; - - port { - dit_p0_0: endpoint { - remote-endpoint = <&spdif_p0_0>; - }; - }; - }; - - /* switched by pmic_sleep */ - vcc1v8_s3: vcca1v8_s3: vcc1v8-s3 { - compatible = "regulator-fixed"; - regulator-name = "vcc1v8_s3"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - vin-supply = <&vcc_1v8>; - }; - - vcc3v3_pcie: vcc3v3-pcie-regulator { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <&gpio1 RK_PC1 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&pcie_pwr_en>; - regulator-name = "vcc3v3_pcie"; - regulator-always-on; - regulator-boot-on; - vin-supply = <&dc_12v>; - }; - - vcc3v3_sys: vcc3v3-sys { - compatible = "regulator-fixed"; - regulator-name = "vcc3v3_sys"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <&vcc_sys>; - }; - - /* Actually 3 regulators (host0, 1, 2) controlled by the same gpio */ - vcc5v0_host: vcc5v0-host-regulator { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <&gpio1 RK_PA0 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&vcc5v0_host_en>; - regulator-name = "vcc5v0_host"; - regulator-always-on; - vin-supply = <&vcc_sys>; - }; - - vcc5v0_typec: vcc5v0-typec-regulator { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&vcc5v0_typec_en>; - regulator-name = "vcc5v0_typec"; - regulator-always-on; - vin-supply = <&vcc_sys>; - }; - - vcc_sys: vcc-sys { - compatible = "regulator-fixed"; - regulator-name = "vcc_sys"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - vin-supply = <&dc_12v>; - }; - - vdd_log: vdd-log { - compatible = "pwm-regulator"; - pwms = <&pwm2 0 25000 1>; - pwm-supply = <&vcc_sys>; - regulator-name = "vdd_log"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <430000>; - regulator-max-microvolt = <1400000>; - }; -}; - -&cpu_l0 { - cpu-supply = <&vdd_cpu_l>; -}; - -&cpu_l1 { - cpu-supply = <&vdd_cpu_l>; -}; - -&cpu_l2 { - cpu-supply = <&vdd_cpu_l>; -}; - -&cpu_l3 { - cpu-supply = <&vdd_cpu_l>; -}; - -&cpu_b0 { - cpu-supply = <&vdd_cpu_b>; -}; - -&cpu_b1 { - cpu-supply = <&vdd_cpu_b>; -}; - -&emmc_phy { - status = "okay"; -}; - -&gmac { - assigned-clocks = <&cru SCLK_RMII_SRC>; - assigned-clock-parents = <&clkin_gmac>; - clock_in_out = "input"; - phy-supply = <&vcc_lan>; - phy-mode = "rgmii"; - pinctrl-names = "default"; - pinctrl-0 = <&rgmii_pins>; - snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; - snps,reset-active-low; - snps,reset-delays-us = <0 10000 50000>; - tx_delay = <0x28>; - rx_delay = <0x11>; - status = "okay"; -}; - -&gpu { - mali-supply = <&vdd_gpu>; - status = "okay"; -}; - -&hdmi { - ddc-i2c-bus = <&i2c3>; - pinctrl-names = "default"; - pinctrl-0 = <&hdmi_cec>; - status = "okay"; -}; - -&i2c0 { - clock-frequency = <400000>; - i2c-scl-rising-time-ns = <168>; - i2c-scl-falling-time-ns = <4>; - status = "okay"; - - rk808: pmic@1b { - compatible = "rockchip,rk808"; - reg = <0x1b>; - interrupt-parent = <&gpio1>; - interrupts = <21 IRQ_TYPE_LEVEL_LOW>; - #clock-cells = <1>; - clock-output-names = "xin32k", "rk808-clkout2"; - pinctrl-names = "default"; - pinctrl-0 = <&pmic_int_l>; - rockchip,system-power-controller; - wakeup-source; - - vcc1-supply = <&vcc_sys>; - vcc2-supply = <&vcc_sys>; - vcc3-supply = <&vcc_sys>; - vcc4-supply = <&vcc_sys>; - vcc6-supply = <&vcc_sys>; - vcc7-supply = <&vcc_sys>; - vcc8-supply = <&vcc3v3_sys>; - vcc9-supply = <&vcc_sys>; - vcc10-supply = <&vcc_sys>; - vcc11-supply = <&vcc_sys>; - vcc12-supply = <&vcc3v3_sys>; - vddio-supply = <&vcc1v8_pmu>; - - regulators { - vdd_center: DCDC_REG1 { - regulator-name = "vdd_center"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <750000>; - regulator-max-microvolt = <1350000>; - regulator-ramp-delay = <6001>; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_cpu_l: DCDC_REG2 { - regulator-name = "vdd_cpu_l"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <750000>; - regulator-max-microvolt = <1350000>; - regulator-ramp-delay = <6001>; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_ddr: DCDC_REG3 { - regulator-name = "vcc_ddr"; - regulator-always-on; - regulator-boot-on; - regulator-state-mem { - regulator-on-in-suspend; - }; - }; - - vcc_1v8: DCDC_REG4 { - regulator-name = "vcc_1v8"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vcc1v8_dvp: LDO_REG1 { - regulator-name = "vcc1v8_dvp"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc2v8_dvp: LDO_REG2 { - regulator-name = "vcc2v8_dvp"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <2800000>; - regulator-max-microvolt = <2800000>; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc1v8_pmu: LDO_REG3 { - regulator-name = "vcc1v8_pmu"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vcc_sdio: LDO_REG4 { - regulator-name = "vcc_sdio"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3000000>; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <3000000>; - }; - }; - - vcca3v0_codec: LDO_REG5 { - regulator-name = "vcca3v0_codec"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_1v5: LDO_REG6 { - regulator-name = "vcc_1v5"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1500000>; - regulator-max-microvolt = <1500000>; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1500000>; - }; - }; - - vcca1v8_codec: LDO_REG7 { - regulator-name = "vcca1v8_codec"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_3v0: LDO_REG8 { - regulator-name = "vcc_3v0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <3000000>; - }; - }; - - vcc3v3_s3: vcc_lan: SWITCH_REG1 { - regulator-name = "vcc3v3_s3"; - regulator-always-on; - regulator-boot-on; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc3v3_s0: SWITCH_REG2 { - regulator-name = "vcc3v3_s0"; - regulator-always-on; - regulator-boot-on; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - }; - }; - - vdd_cpu_b: regulator@40 { - compatible = "silergy,syr827"; - reg = <0x40>; - fcs,suspend-voltage-selector = <0>; - regulator-name = "vdd_cpu_b"; - regulator-min-microvolt = <712500>; - regulator-max-microvolt = <1500000>; - regulator-ramp-delay = <1000>; - regulator-always-on; - regulator-boot-on; - vin-supply = <&vcc_sys>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_gpu: regulator@41 { - compatible = "silergy,syr828"; - reg = <0x41>; - fcs,suspend-voltage-selector = <1>; - regulator-name = "vdd_gpu"; - regulator-min-microvolt = <712500>; - regulator-max-microvolt = <1500000>; - regulator-ramp-delay = <1000>; - regulator-always-on; - regulator-boot-on; - vin-supply = <&vcc_sys>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; -}; - -&i2c1 { - i2c-scl-rising-time-ns = <300>; - i2c-scl-falling-time-ns = <15>; - status = "okay"; - - rt5640: rt5640@1c { - compatible = "realtek,rt5640"; - reg = <0x1c>; - clocks = <&cru SCLK_I2S_8CH_OUT>; - clock-names = "mclk"; - realtek,in1-differential; - #sound-dai-cells = <0>; - pinctrl-names = "default"; - pinctrl-0 = <&rt5640_hpcon>; - }; -}; - -&i2c3 { - i2c-scl-rising-time-ns = <450>; - i2c-scl-falling-time-ns = <15>; - status = "okay"; -}; - -&i2c4 { - i2c-scl-rising-time-ns = <600>; - i2c-scl-falling-time-ns = <20>; - status = "okay"; - - fusb0: typec-portc@22 { - compatible = "fcs,fusb302"; - reg = <0x22>; - interrupt-parent = <&gpio1>; - interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&fusb0_int>; - vbus-supply = <&vcc5v0_typec>; - status = "okay"; - - connector { - compatible = "usb-c-connector"; - data-role = "host"; - label = "USB-C"; - op-sink-microwatt = <1000000>; - power-role = "dual"; - sink-pdos = - ; - source-pdos = - ; - try-power-role = "sink"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - - usbc_hs: endpoint { - remote-endpoint = - <&u2phy0_typec_hs>; - }; - }; - - port@1 { - reg = <1>; - - usbc_ss: endpoint { - remote-endpoint = - <&tcphy0_typec_ss>; - }; - }; - }; - }; - }; - - accelerometer@68 { - compatible = "invensense,mpu6500"; - reg = <0x68>; - interrupt-parent = <&gpio1>; - interrupts = ; - }; -}; - -&i2s0 { - rockchip,playback-channels = <8>; - rockchip,capture-channels = <8>; - status = "okay"; -}; - -&i2s1 { - rockchip,playback-channels = <2>; - rockchip,capture-channels = <2>; - status = "okay"; -}; - -&i2s2 { - status = "okay"; -}; - -&io_domains { - status = "okay"; - - bt656-supply = <&vcc1v8_dvp>; - audio-supply = <&vcca1v8_codec>; - sdmmc-supply = <&vcc_sdio>; - gpio1830-supply = <&vcc_3v0>; -}; - -&pcie_phy { - status = "okay"; -}; - -&pcie0 { - ep-gpios = <&gpio4 RK_PD1 GPIO_ACTIVE_HIGH>; - num-lanes = <4>; - pinctrl-names = "default"; - pinctrl-0 = <&pcie_clkreqn_cpm>; - status = "okay"; -}; - -&pmu_io_domains { - pmu1830-supply = <&vcc_3v0>; - status = "okay"; -}; - -&pinctrl { - buttons { - pwrbtn: pwrbtn { - rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - fusb302x { - fusb0_int: fusb0-int { - rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - ir { - ir_int: ir-int { - rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - lcd-panel { - lcd_panel_reset: lcd-panel-reset { - rockchip,pins = <4 RK_PD6 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - leds { - work_led_pin: work-led-pin { - rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - diy_led_pin: diy-led-pin { - rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - pcie { - pcie_pwr_en: pcie-pwr-en { - rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - pcie_3g_drv: pcie-3g-drv { - rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - pmic { - pmic_int_l: pmic-int-l { - rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>; - }; - - vsel1_pin: vsel1-pin { - rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>; - }; - - vsel2_pin: vsel2-pin { - rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>; - }; - }; - - rt5640 { - rt5640_hpcon: rt5640-hpcon { - rockchip,pins = <4 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - sdio-pwrseq { - wifi_enable_h: wifi-enable-h { - rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - usb-typec { - vcc5v0_typec_en: vcc5v0_typec_en { - rockchip,pins = <1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - usb2 { - vcc5v0_host_en: vcc5v0-host-en { - rockchip,pins = <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - wifi { - wifi_host_wake_l: wifi-host-wake-l { - rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; -}; - -&pwm0 { - status = "okay"; -}; - -&pwm2 { - status = "okay"; -}; - -&saradc { - vref-supply = <&vcca1v8_s3>; - status = "okay"; -}; - -&sdio0 { - /* WiFi & BT combo module Ampak AP6356S */ - bus-width = <4>; - cap-sdio-irq; - cap-sd-highspeed; - keep-power-in-suspend; - mmc-pwrseq = <&sdio_pwrseq>; - non-removable; - pinctrl-names = "default"; - pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>; - sd-uhs-sdr104; - - /* Power supply */ - vqmmc-supply = <&vcc1v8_s3>; /* IO line */ - vmmc-supply = <&vcc_sdio>; /* card's power */ - - #address-cells = <1>; - #size-cells = <0>; - status = "okay"; - - brcmf: wifi@1 { - reg = <1>; - compatible = "brcm,bcm4329-fmac"; - interrupt-parent = <&gpio0>; - interrupts = ; - interrupt-names = "host-wake"; - brcm,drive-strength = <5>; - pinctrl-names = "default"; - pinctrl-0 = <&wifi_host_wake_l>; - }; -}; - -&sdmmc { - bus-width = <4>; - cap-mmc-highspeed; - cap-sd-highspeed; - cd-gpios = <&gpio0 7 GPIO_ACTIVE_LOW>; - disable-wp; - max-frequency = <150000000>; - pinctrl-names = "default"; - pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>; - status = "okay"; -}; - -&sdhci { - bus-width = <8>; - mmc-hs400-1_8v; - mmc-hs400-enhanced-strobe; - non-removable; - status = "okay"; -}; - -&spdif { - pinctrl-0 = <&spdif_bus_1>; - status = "okay"; - - spdif_p0: port { - spdif_p0_0: endpoint { - remote-endpoint = <&dit_p0_0>; - }; - }; -}; - -&tcphy0 { - status = "okay"; -}; - -&tcphy0_usb3 { - port { - tcphy0_typec_ss: endpoint { - remote-endpoint = <&usbc_ss>; - }; - }; -}; - -&tcphy1 { - status = "okay"; -}; - -&tsadc { - /* tshut mode 0:CRU 1:GPIO */ - rockchip,hw-tshut-mode = <1>; - /* tshut polarity 0:LOW 1:HIGH */ - rockchip,hw-tshut-polarity = <1>; - status = "okay"; -}; - -&u2phy0 { - status = "okay"; - - u2phy0_otg: otg-port { - status = "okay"; - }; - - u2phy0_host: host-port { - phy-supply = <&vcc5v0_host>; - status = "okay"; - }; - - port { - u2phy0_typec_hs: endpoint { - remote-endpoint = <&usbc_hs>; - }; - }; -}; - -&u2phy1 { - status = "okay"; - - u2phy1_otg: otg-port { - status = "okay"; - }; - - u2phy1_host: host-port { - phy-supply = <&vcc5v0_host>; - status = "okay"; - }; -}; - -&uart0 { - pinctrl-names = "default"; - pinctrl-0 = <&uart0_xfer &uart0_cts>; - status = "okay"; -}; - -&uart2 { - status = "okay"; -}; - -&usb_host0_ehci { - status = "okay"; -}; - -&usb_host0_ohci { - status = "okay"; -}; - -&usb_host1_ehci { - status = "okay"; -}; - -&usb_host1_ohci { - status = "okay"; -}; - -&usbdrd3_0 { - status = "okay"; -}; - -&usbdrd_dwc3_0 { - status = "okay"; - dr_mode = "otg"; -}; - -&usbdrd3_1 { - status = "okay"; -}; - -&usbdrd_dwc3_1 { - status = "okay"; - dr_mode = "host"; -}; - -&vopb { - status = "okay"; -}; - -&vopb_mmu { - status = "okay"; -}; - -&vopl { - status = "okay"; -}; - -&vopl_mmu { - status = "okay"; -}; diff --git a/arch/arm/dts/rk3399-gru-bob.dts b/arch/arm/dts/rk3399-gru-bob.dts deleted file mode 100644 index 1cba1d857c9..00000000000 --- a/arch/arm/dts/rk3399-gru-bob.dts +++ /dev/null @@ -1,95 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Google Gru-Bob Rev 4+ board device tree source - * - * Copyright 2018 Google, Inc - */ - -/dts-v1/; -#include "rk3399-gru-chromebook.dtsi" - -/ { - model = "Google Bob"; - compatible = "google,bob-rev13", "google,bob-rev12", - "google,bob-rev11", "google,bob-rev10", - "google,bob-rev9", "google,bob-rev8", - "google,bob-rev7", "google,bob-rev6", - "google,bob-rev5", "google,bob-rev4", - "google,bob", "google,gru", "rockchip,rk3399"; - chassis-type = "convertible"; - - edp_panel: edp-panel { - compatible = "boe,nv101wxmn51"; - backlight = <&backlight>; - power-supply = <&pp3300_disp>; - - port { - panel_in_edp: endpoint { - remote-endpoint = <&edp_out_panel>; - }; - }; - }; -}; - -&ap_i2c_ts { - touchscreen: touchscreen@10 { - compatible = "elan,ekth3500"; - reg = <0x10>; - interrupt-parent = <&gpio3>; - interrupts = <13 IRQ_TYPE_LEVEL_LOW>; - pinctrl-names = "default"; - pinctrl-0 = <&touch_int_l &touch_reset_l>; - reset-gpios = <&gpio4 26 GPIO_ACTIVE_LOW>; - }; -}; - -&ap_i2c_tp { - trackpad: trackpad@15 { - compatible = "elan,ekth3000"; - reg = <0x15>; - interrupt-parent = <&gpio1>; - interrupts = <4 IRQ_TYPE_LEVEL_LOW>; - pinctrl-names = "default"; - pinctrl-0 = <&trackpad_int_l>; - wakeup-source; - }; -}; - -&backlight { - pwms = <&cros_ec_pwm 0>; -}; - -&cpu_alert0 { - temperature = <65000>; -}; - -&cpu_alert1 { - temperature = <70000>; -}; - -&spi0 { - status = "okay"; - - tpm@0 { - compatible = "google,cr50"; - reg = <0>; - interrupt-parent = <&gpio0>; - interrupts = <5 IRQ_TYPE_EDGE_RISING>; - pinctrl-names = "default"; - pinctrl-0 = <&h1_int_od_l>; - spi-max-frequency = <800000>; - }; -}; - -&pinctrl { - tpm { - h1_int_od_l: h1-int-od-l { - rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; -}; - -&wlan_host_wake_l { - /* Kevin has an external pull up, but Bob does not. */ - rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>; -}; diff --git a/arch/arm/dts/rk3399-gru-chromebook.dtsi b/arch/arm/dts/rk3399-gru-chromebook.dtsi deleted file mode 100644 index cacbad35cfc..00000000000 --- a/arch/arm/dts/rk3399-gru-chromebook.dtsi +++ /dev/null @@ -1,590 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Google Gru-Chromebook shared properties - * - * Copyright 2018 Google, Inc - */ - -#include "rk3399-gru.dtsi" - -/ { - pp900_ap: pp900-ap { - compatible = "regulator-fixed"; - regulator-name = "pp900_ap"; - - /* EC turns on w/ pp900_ap_en; always on for AP */ - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <900000>; - - vin-supply = <&ppvar_sys>; - }; - - /* EC turns on w/ pp900_usb_en */ - pp900_usb: pp900-ap { - }; - - /* EC turns on w/ pp900_pcie_en */ - pp900_pcie: pp900-ap { - }; - - pp3000: pp3000 { - compatible = "regulator-fixed"; - regulator-name = "pp3000"; - pinctrl-names = "default"; - pinctrl-0 = <&pp3000_en>; - - enable-active-high; - gpio = <&gpio0 12 GPIO_ACTIVE_HIGH>; - - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - - vin-supply = <&ppvar_sys>; - }; - - ppvar_centerlogic_pwm: ppvar-centerlogic-pwm { - compatible = "pwm-regulator"; - regulator-name = "ppvar_centerlogic_pwm"; - - pwms = <&pwm3 0 3337 0>; - pwm-supply = <&ppvar_sys>; - pwm-dutycycle-range = <100 0>; - pwm-dutycycle-unit = <100>; - - /* EC turns on w/ ppvar_centerlogic_en; always on for AP */ - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <799434>; - regulator-max-microvolt = <1049925>; - }; - - ppvar_centerlogic: ppvar-centerlogic { - compatible = "vctrl-regulator"; - regulator-name = "ppvar_centerlogic"; - - regulator-min-microvolt = <799434>; - regulator-max-microvolt = <1049925>; - - ctrl-supply = <&ppvar_centerlogic_pwm>; - ctrl-voltage-range = <799434 1049925>; - - regulator-settling-time-up-us = <378>; - min-slew-down-rate = <225>; - ovp-threshold-percent = <16>; - }; - - /* Schematics call this PPVAR even though it's fixed */ - ppvar_logic: ppvar-logic { - compatible = "regulator-fixed"; - regulator-name = "ppvar_logic"; - - /* EC turns on w/ ppvar_logic_en; always on for AP */ - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <900000>; - - vin-supply = <&ppvar_sys>; - }; - - pp1800_audio: pp1800-audio { - compatible = "regulator-fixed"; - regulator-name = "pp1800_audio"; - pinctrl-names = "default"; - pinctrl-0 = <&pp1800_audio_en>; - - enable-active-high; - gpio = <&gpio0 2 GPIO_ACTIVE_HIGH>; - - regulator-always-on; - regulator-boot-on; - - vin-supply = <&pp1800>; - }; - - /* gpio is shared with pp3300_wifi_bt */ - pp1800_pcie: pp1800-pcie { - compatible = "regulator-fixed"; - regulator-name = "pp1800_pcie"; - pinctrl-names = "default"; - pinctrl-0 = <&wlan_module_pd_l>; - - enable-active-high; - gpio = <&gpio0 4 GPIO_ACTIVE_HIGH>; - - /* - * Need to wait 1ms + ramp-up time before we can power on WiFi. - * This has been approximated as 8ms total. - */ - regulator-enable-ramp-delay = <8000>; - - vin-supply = <&pp1800>; - }; - - /* Always on; plain and simple */ - pp3000_ap: pp3000_emmc: pp3000 { - }; - - pp1500_ap_io: pp1500-ap-io { - compatible = "regulator-fixed"; - regulator-name = "pp1500_ap_io"; - pinctrl-names = "default"; - pinctrl-0 = <&pp1500_en>; - - enable-active-high; - gpio = <&gpio0 10 GPIO_ACTIVE_HIGH>; - - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1500000>; - regulator-max-microvolt = <1500000>; - - vin-supply = <&pp1800>; - }; - - pp3300_disp: pp3300-disp { - compatible = "regulator-fixed"; - regulator-name = "pp3300_disp"; - pinctrl-names = "default"; - pinctrl-0 = <&pp3300_disp_en>; - - enable-active-high; - gpio = <&gpio4 27 GPIO_ACTIVE_HIGH>; - - startup-delay-us = <2000>; - vin-supply = <&pp3300>; - }; - - /* EC turns on w/ pp3300_usb_en_l */ - pp3300_usb: pp3300 { - }; - - /* gpio is shared with pp1800_pcie and pinctrl is set there */ - pp3300_wifi_bt: pp3300-wifi-bt { - compatible = "regulator-fixed"; - regulator-name = "pp3300_wifi_bt"; - - enable-active-high; - gpio = <&gpio0 4 GPIO_ACTIVE_HIGH>; - - vin-supply = <&pp3300>; - }; - - /* - * This is a bit of a hack. The WiFi module should be reset at least - * 1ms after its regulators have ramped up (max rampup time is ~7ms). - * With some stretching of the imagination, we can call the 1.8V - * regulator a supply. - */ - wlan_pd_n: wlan-pd-n { - compatible = "regulator-fixed"; - regulator-name = "wlan_pd_n"; - pinctrl-names = "default"; - pinctrl-0 = <&wlan_module_reset_l>; - - enable-active-high; - gpio = <&gpio1 11 GPIO_ACTIVE_HIGH>; - - vin-supply = <&pp1800_pcie>; - }; - - backlight: backlight { - compatible = "pwm-backlight"; - enable-gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>; - power-supply = <&pp3300_disp>; - pinctrl-names = "default"; - pinctrl-0 = <&bl_en>; - }; - - gpio_keys: gpio-keys { - compatible = "gpio-keys"; - pinctrl-names = "default"; - pinctrl-0 = <&bt_host_wake_l>; - - wake_on_bt: key-wake-on-bt { - label = "Wake-on-Bluetooth"; - gpios = <&gpio0 3 GPIO_ACTIVE_LOW>; - linux,code = ; - wakeup-source; - }; - }; -}; - -&ppvar_bigcpu { - min-slew-down-rate = <225>; - ovp-threshold-percent = <16>; -}; - -&ppvar_litcpu { - min-slew-down-rate = <225>; - ovp-threshold-percent = <16>; -}; - -&ppvar_gpu { - min-slew-down-rate = <225>; - ovp-threshold-percent = <16>; -}; - -&cdn_dp { - extcon = <&usbc_extcon0>, <&usbc_extcon1>; -}; - -&dmc { - center-supply = <&ppvar_centerlogic>; - rockchip,pd-idle-dis-freq-hz = <800000000>; - rockchip,sr-idle-dis-freq-hz = <800000000>; - rockchip,sr-mc-gate-idle-dis-freq-hz = <800000000>; -}; - -&edp { - status = "okay"; - - /* - * eDP PHY/clk don't sync reliably at anything other than 24 MHz. Only - * set this here, because rk3399-gru.dtsi ensures we can generate this - * off GPLL=600MHz, whereas some other RK3399 boards may not. - */ - assigned-clocks = <&cru PCLK_EDP>; - assigned-clock-rates = <24000000>; - - ports { - edp_out: port@1 { - reg = <1>; - #address-cells = <1>; - #size-cells = <0>; - - edp_out_panel: endpoint@0 { - reg = <0>; - remote-endpoint = <&panel_in_edp>; - }; - }; - }; -}; - -&gpio0 { - gpio-line-names = /* GPIO0 A 0-7 */ - "AP_RTC_CLK_IN", - "EC_AP_INT_L", - "PP1800_AUDIO_EN", - "BT_HOST_WAKE_L", - "WLAN_MODULE_PD_L", - "H1_INT_OD_L", - "CENTERLOGIC_DVS_PWM", - "", - - /* GPIO0 B 0-4 */ - "WIFI_HOST_WAKE_L", - "PMUIO2_33_18_L", - "PP1500_EN", - "AP_EC_WARM_RESET_REQ", - "PP3000_EN"; -}; - -&gpio1 { - gpio-line-names = /* GPIO1 A 0-7 */ - "", - "", - "SPK_PA_EN", - "", - "TRACKPAD_INT_L", - "AP_EC_S3_S0_L", - "AP_EC_OVERTEMP", - "AP_SPI_FLASH_MISO", - - /* GPIO1 B 0-7 */ - "AP_SPI_FLASH_MOSI_R", - "AP_SPI_FLASH_CLK_R", - "AP_SPI_FLASH_CS_L_R", - "WLAN_MODULE_RESET_L", - "WIFI_DISABLE_L", - "MIC_INT", - "", - "AP_I2C_DVS_SDA", - - /* GPIO1 C 0-7 */ - "AP_I2C_DVS_SCL", - "AP_BL_EN", - /* - * AP_FLASH_WP is crossystem ABI. Schematics call it - * AP_FW_WP or CPU1_FW_WP, depending on the variant. - */ - "AP_FLASH_WP", - "LITCPU_DVS_PWM", - "AP_I2C_AUDIO_SDA", - "AP_I2C_AUDIO_SCL", - "", - "HEADSET_INT_L"; -}; - -&gpio2 { - gpio-line-names = /* GPIO2 A 0-7 */ - "", - "", - "SD_IO_PWR_EN", - "", - "", - "", - "", - "", - - /* GPIO2 B 0-7 */ - "", - "", - "", - "", - "", - "", - "", - "", - - /* GPIO2 C 0-7 */ - "", - "", - "", - "", - "AP_SPI_EC_MISO", - "AP_SPI_EC_MOSI", - "AP_SPI_EC_CLK", - "AP_SPI_EC_CS_L", - - /* GPIO2 D 0-4 */ - "BT_DEV_WAKE_L", - "", - "WIFI_PCIE_CLKREQ_L", - "WIFI_PERST_L", - "SD_PWR_3000_1800_L"; -}; - -&gpio3 { - gpio-line-names = /* GPIO3 A 0-7 */ - "", - "", - "", - "", - "AP_SPI_TPM_MISO", - "AP_SPI_TPM_MOSI_R", - "AP_SPI_TPM_CLK_R", - "AP_SPI_TPM_CS_L_R", - - /* GPIO3 B 0-7 */ - "EC_IN_RW", - "", - "AP_I2C_TP_SDA", - "AP_I2C_TP_SCL", - "AP_I2C_TP_PU_EN", - "TOUCH_INT_L", - "", - "", - - /* GPIO3 C 0-7 */ - "", - "", - "", - "", - "", - "", - "", - "", - - /* GPIO3 D 0-7 */ - "I2S0_SCLK", - "I2S0_LRCK_RX", - "I2S0_LRCK_TX", - "I2S0_SDI_0", - "I2S0_SDI_1", - "", - "I2S0_SDO_1", - "I2S0_SDO_0"; -}; - -&gpio4 { - gpio-line-names = /* GPIO4 A 0-7 */ - "I2S_MCLK", - "AP_I2C_MIC_SDA", - "AP_I2C_MIC_SCL", - "", - "", - "", - "", - "", - - /* GPIO4 B 0-7 */ - "", - "", - "", - "", - "", - "", - "", - "", - - /* GPIO4 C 0-7 */ - "AP_I2C_TS_SDA", - "AP_I2C_TS_SCL", - "GPU_DVS_PWM", - "UART_DBG_TX_AP_RX", - "UART_AP_TX_DBG_RX", - "", - "BIGCPU_DVS_PWM", - "EDP_HPD_3V0", - - /* GPIO4 D 0-5 */ - "SD_CARD_DET_L", - "USB_DP_HPD", - "TOUCH_RESET_L", - "PP3300_DISP_EN", - "", - "SD_SLOT_PWR_EN"; -}; - -ap_i2c_mic: &i2c1 { - status = "okay"; - - clock-frequency = <400000>; - - /* These are relatively safe rise/fall times */ - i2c-scl-falling-time-ns = <50>; - i2c-scl-rising-time-ns = <300>; - - headsetcodec: rt5514@57 { - compatible = "realtek,rt5514"; - reg = <0x57>; - realtek,dmic-init-delay-ms = <20>; - }; -}; - -ap_i2c_tp: &i2c5 { - status = "okay"; - - clock-frequency = <400000>; - - /* These are relatively safe rise/fall times */ - i2c-scl-falling-time-ns = <50>; - i2c-scl-rising-time-ns = <300>; - - /* - * Note strange pullup enable. Apparently this avoids leakage but - * still allows us to get nice 4.7K pullups for high speed i2c - * transfers. Basically we want the pullup on whenever the ap is - * alive, so the "en" pin just gets set to output high. - */ - pinctrl-0 = <&i2c5_xfer &ap_i2c_tp_pu_en>; -}; - -&cros_ec { - cros_ec_pwm: pwm { - compatible = "google,cros-ec-pwm"; - #pwm-cells = <1>; - }; - - usbc_extcon1: extcon1 { - compatible = "google,extcon-usbc-cros-ec"; - google,usb-port-id = <1>; - }; -}; - -&sound { - rockchip,codec = <&max98357a &headsetcodec - &codec &wacky_spi_audio &cdn_dp>; -}; - -&spi2 { - wacky_spi_audio: spi2@0 { - compatible = "realtek,rt5514"; - reg = <0>; - interrupt-parent = <&gpio1>; - interrupts = <13 IRQ_TYPE_LEVEL_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&mic_int>; - /* May run faster once verified. */ - spi-max-frequency = <10000000>; - wakeup-source; - }; -}; - -&pci_rootport { - mvl_wifi: wifi@0,0 { - compatible = "pci1b4b,2b42"; - reg = <0x0000 0x0 0x0 0x0 0x0>; - interrupt-parent = <&gpio0>; - interrupts = <8 IRQ_TYPE_LEVEL_LOW>; - pinctrl-names = "default"; - pinctrl-0 = <&wlan_host_wake_l>; - wakeup-source; - }; -}; - -&tcphy1 { - status = "okay"; - extcon = <&usbc_extcon1>; -}; - -&u2phy1 { - status = "okay"; -}; - -&usb_host0_ehci { - status = "okay"; -}; - -&usb_host1_ehci { - status = "okay"; -}; - -&usb_host1_ohci { - status = "okay"; -}; - -&usbdrd3_1 { - status = "okay"; - extcon = <&usbc_extcon1>; -}; - -&usbdrd_dwc3_1 { - status = "okay"; - dr_mode = "host"; -}; - -&pinctrl { - discrete-regulators { - pp1500_en: pp1500-en { - rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO - &pcfg_pull_none>; - }; - - pp1800_audio_en: pp1800-audio-en { - rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO - &pcfg_pull_down>; - }; - - pp3000_en: pp3000-en { - rockchip,pins = <0 RK_PB4 RK_FUNC_GPIO - &pcfg_pull_none>; - }; - - pp3300_disp_en: pp3300-disp-en { - rockchip,pins = <4 RK_PD3 RK_FUNC_GPIO - &pcfg_pull_none>; - }; - - wlan_module_pd_l: wlan-module-pd-l { - rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO - &pcfg_pull_down>; - }; - }; -}; - -&wifi { - wifi_perst_l: wifi-perst-l { - rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - wlan_host_wake_l: wlan-host-wake-l { - /* Kevin has an external pull up, but Bob does not */ - rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; - }; -}; diff --git a/arch/arm/dts/rk3399-gru-kevin.dts b/arch/arm/dts/rk3399-gru-kevin.dts deleted file mode 100644 index 2cc9b3386c1..00000000000 --- a/arch/arm/dts/rk3399-gru-kevin.dts +++ /dev/null @@ -1,328 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Google Gru-Kevin Rev 6+ board device tree source - * - * Copyright 2016-2017 Google, Inc - */ - -/dts-v1/; -#include "rk3399-gru-chromebook.dtsi" -#include - -/* - * Kevin-specific things - * - * Things in this section should use names from Kevin schematic since no - * equivalent exists in Gru schematic. If referring to signals that exist - * in Gru we use the Gru names, though. Confusing enough for you? - */ -/ { - model = "Google Kevin"; - compatible = "google,kevin-rev15", "google,kevin-rev14", - "google,kevin-rev13", "google,kevin-rev12", - "google,kevin-rev11", "google,kevin-rev10", - "google,kevin-rev9", "google,kevin-rev8", - "google,kevin-rev7", "google,kevin-rev6", - "google,kevin", "google,gru", "rockchip,rk3399"; - chassis-type = "convertible"; - - /* Power tree */ - - p3_3v_dig: p3-3v-dig { - compatible = "regulator-fixed"; - regulator-name = "p3.3v_dig"; - pinctrl-names = "default"; - pinctrl-0 = <&cpu3_pen_pwr_en>; - - enable-active-high; - gpio = <&gpio4 30 GPIO_ACTIVE_HIGH>; - vin-supply = <&pp3300>; - }; - - edp_panel: edp-panel { - compatible = "sharp,lq123p1jx31"; - backlight = <&backlight>; - power-supply = <&pp3300_disp>; - - panel-timing { - clock-frequency = <266666667>; - hactive = <2400>; - hfront-porch = <48>; - hback-porch = <84>; - hsync-len = <32>; - hsync-active = <0>; - vactive = <1600>; - vfront-porch = <3>; - vback-porch = <120>; - vsync-len = <10>; - vsync-active = <0>; - }; - - port { - panel_in_edp: endpoint { - remote-endpoint = <&edp_out_panel>; - }; - }; - }; - - thermistor_ppvar_bigcpu: thermistor-ppvar-bigcpu { - compatible = "murata,ncp15wb473"; - pullup-uv = <1800000>; - pullup-ohm = <25500>; - pulldown-ohm = <0>; - io-channels = <&saradc 2>; - #thermal-sensor-cells = <0>; - }; - - thermistor_ppvar_litcpu: thermistor-ppvar-litcpu { - compatible = "murata,ncp15wb473"; - pullup-uv = <1800000>; - pullup-ohm = <25500>; - pulldown-ohm = <0>; - io-channels = <&saradc 3>; - #thermal-sensor-cells = <0>; - }; -}; - -&backlight { - pwms = <&cros_ec_pwm 1>; -}; - -&gpio_keys { - pinctrl-names = "default"; - pinctrl-0 = <&bt_host_wake_l>, <&cpu1_pen_eject>; - - switch-pen-insert { - label = "Pen Insert"; - /* Insert = low, eject = high */ - gpios = <&gpio0 13 GPIO_ACTIVE_LOW>; - linux,code = ; - linux,input-type = ; - wakeup-source; - }; -}; - -&thermal_zones { - bigcpu_reg_thermal: bigcpu-reg-thermal { - polling-delay-passive = <100>; /* milliseconds */ - polling-delay = <1000>; /* milliseconds */ - thermal-sensors = <&thermistor_ppvar_bigcpu 0>; - sustainable-power = <4000>; - - ppvar_bigcpu_trips: trips { - ppvar_bigcpu_on: ppvar-bigcpu-on { - temperature = <40000>; /* millicelsius */ - hysteresis = <2000>; /* millicelsius */ - type = "passive"; - }; - - ppvar_bigcpu_alert: ppvar-bigcpu-alert { - temperature = <50000>; /* millicelsius */ - hysteresis = <2000>; /* millicelsius */ - type = "passive"; - }; - - ppvar_bigcpu_crit: ppvar-bigcpu-crit { - temperature = <90000>; /* millicelsius */ - hysteresis = <0>; /* millicelsius */ - type = "critical"; - }; - }; - - cooling-maps { - map0 { - trip = <&ppvar_bigcpu_alert>; - cooling-device = - <&cpu_l0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&cpu_l1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&cpu_l2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&cpu_l3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; - contribution = <4096>; - }; - map1 { - trip = <&ppvar_bigcpu_alert>; - cooling-device = - <&cpu_b0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&cpu_b1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; - contribution = <1024>; - }; - }; - }; - - litcpu_reg_thermal: litcpu-reg-thermal { - polling-delay-passive = <100>; /* milliseconds */ - polling-delay = <1000>; /* milliseconds */ - thermal-sensors = <&thermistor_ppvar_litcpu 0>; - sustainable-power = <4000>; - - ppvar_litcpu_trips: trips { - ppvar_litcpu_on: ppvar-litcpu-on { - temperature = <40000>; /* millicelsius */ - hysteresis = <2000>; /* millicelsius */ - type = "passive"; - }; - - ppvar_litcpu_alert: ppvar-litcpu-alert { - temperature = <50000>; /* millicelsius */ - hysteresis = <2000>; /* millicelsius */ - type = "passive"; - }; - - ppvar_litcpu_crit: ppvar-litcpu-crit { - temperature = <90000>; /* millicelsius */ - hysteresis = <0>; /* millicelsius */ - type = "critical"; - }; - }; - }; -}; - -ap_i2c_tpm: &i2c0 { - status = "okay"; - - clock-frequency = <400000>; - - /* These are relatively safe rise/fall times. */ - i2c-scl-falling-time-ns = <50>; - i2c-scl-rising-time-ns = <300>; - - tpm: tpm@20 { - compatible = "infineon,slb9645tt"; - reg = <0x20>; - powered-while-suspended; - }; -}; - -ap_i2c_dig: &i2c2 { - status = "okay"; - - clock-frequency = <400000>; - - /* These are relatively safe rise/fall times. */ - i2c-scl-falling-time-ns = <50>; - i2c-scl-rising-time-ns = <300>; - - digitizer: digitizer@9 { - /* wacom,w9013 */ - compatible = "hid-over-i2c"; - reg = <0x9>; - pinctrl-names = "default"; - pinctrl-0 = <&cpu1_dig_irq_l &cpu1_dig_pdct_l>; - - vdd-supply = <&p3_3v_dig>; - post-power-on-delay-ms = <100>; - - interrupt-parent = <&gpio2>; - interrupts = <4 IRQ_TYPE_LEVEL_LOW>; - - hid-descr-addr = <0x1>; - }; -}; - -/* Adjustments to things in the gru baseboard */ - -&ap_i2c_tp { - trackpad@4a { - compatible = "atmel,maxtouch"; - reg = <0x4a>; - pinctrl-names = "default"; - pinctrl-0 = <&trackpad_int_l>; - interrupt-parent = <&gpio1>; - interrupts = <4 IRQ_TYPE_LEVEL_LOW>; - linux,gpio-keymap = ; - wakeup-source; - }; -}; - -&ap_i2c_ts { - touchscreen@4b { - compatible = "atmel,maxtouch"; - reg = <0x4b>; - pinctrl-names = "default"; - pinctrl-0 = <&touch_int_l>; - interrupt-parent = <&gpio3>; - interrupts = <13 IRQ_TYPE_LEVEL_LOW>; - }; -}; - -&ppvar_bigcpu_pwm { - regulator-min-microvolt = <798674>; - regulator-max-microvolt = <1302172>; -}; - -&ppvar_bigcpu { - regulator-min-microvolt = <798674>; - regulator-max-microvolt = <1302172>; - ctrl-voltage-range = <798674 1302172>; -}; - -&ppvar_litcpu_pwm { - regulator-min-microvolt = <799065>; - regulator-max-microvolt = <1303738>; -}; - -&ppvar_litcpu { - regulator-min-microvolt = <799065>; - regulator-max-microvolt = <1303738>; - ctrl-voltage-range = <799065 1303738>; -}; - -&ppvar_gpu_pwm { - regulator-min-microvolt = <785782>; - regulator-max-microvolt = <1217729>; -}; - -&ppvar_gpu { - regulator-min-microvolt = <785782>; - regulator-max-microvolt = <1217729>; - ctrl-voltage-range = <785782 1217729>; -}; - -&ppvar_centerlogic_pwm { - regulator-min-microvolt = <800069>; - regulator-max-microvolt = <1049692>; -}; - -&ppvar_centerlogic { - regulator-min-microvolt = <800069>; - regulator-max-microvolt = <1049692>; - ctrl-voltage-range = <800069 1049692>; -}; - -&saradc { - status = "okay"; - vref-supply = <&pp1800_ap_io>; -}; - -&mvl_wifi { - marvell,wakeup-pin = <14>; /* GPIO_14 on Marvell */ -}; - -&pinctrl { - digitizer { - /* Has external pullup */ - cpu1_dig_irq_l: cpu1-dig-irq-l { - rockchip,pins = <2 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - /* Has external pullup */ - cpu1_dig_pdct_l: cpu1-dig-pdct-l { - rockchip,pins = <2 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - discrete-regulators { - cpu3_pen_pwr_en: cpu3-pen-pwr-en { - rockchip,pins = <4 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - pen { - cpu1_pen_eject: cpu1-pen-eject { - rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; -}; diff --git a/arch/arm/dts/rk3399-gru.dtsi b/arch/arm/dts/rk3399-gru.dtsi deleted file mode 100644 index d90fe4d40d4..00000000000 --- a/arch/arm/dts/rk3399-gru.dtsi +++ /dev/null @@ -1,865 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Google Gru (and derivatives) board device tree source - * - * Copyright 2016-2017 Google, Inc - */ - -#include -#include "rk3399.dtsi" -#include "rk3399-op1-opp.dtsi" - -/ { - aliases { - mmc0 = &sdmmc; - mmc1 = &sdhci; - }; - - chosen { - stdout-path = "serial2:115200n8"; - }; - - /* - * Power Tree - * - * In general an attempt is made to include all rails called out by - * the schematic as long as those rails interact in some way with - * the AP. AKA: - * - Rails that only connect to the EC (or devices that the EC talks to) - * are not included. - * - Rails _are_ included if the rails go to the AP even if the AP - * doesn't currently care about them / they are always on. The idea - * here is that it makes it easier to map to the schematic or extend - * later. - * - * If two rails are substantially the same from the AP's point of - * view, though, we won't create a full fixed regulator. We'll just - * put the child rail as an alias of the parent rail. Sometimes rails - * look the same to the AP because one of these is true: - * - The EC controls the enable and the EC always enables a rail as - * long as the AP is running. - * - The rails are actually connected to each other by a jumper and - * the distinction is just there to add clarity/flexibility to the - * schematic. - */ - - ppvar_sys: ppvar-sys { - compatible = "regulator-fixed"; - regulator-name = "ppvar_sys"; - regulator-always-on; - regulator-boot-on; - }; - - pp1200_lpddr: pp1200-lpddr { - compatible = "regulator-fixed"; - regulator-name = "pp1200_lpddr"; - - /* EC turns on w/ lpddr_pwr_en; always on for AP */ - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1200000>; - - vin-supply = <&ppvar_sys>; - }; - - pp1800: pp1800 { - compatible = "regulator-fixed"; - regulator-name = "pp1800"; - - /* Always on when ppvar_sys shows power good */ - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - vin-supply = <&ppvar_sys>; - }; - - pp3300: pp3300 { - compatible = "regulator-fixed"; - regulator-name = "pp3300"; - - /* Always on; plain and simple */ - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - - vin-supply = <&ppvar_sys>; - }; - - pp5000: pp5000 { - compatible = "regulator-fixed"; - regulator-name = "pp5000"; - - /* EC turns on w/ pp5000_en; always on for AP */ - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - - vin-supply = <&ppvar_sys>; - }; - - ppvar_bigcpu_pwm: ppvar-bigcpu-pwm { - compatible = "pwm-regulator"; - regulator-name = "ppvar_bigcpu_pwm"; - - pwms = <&pwm1 0 3337 0>; - pwm-supply = <&ppvar_sys>; - pwm-dutycycle-range = <100 0>; - pwm-dutycycle-unit = <100>; - - /* EC turns on w/ ap_core_en; always on for AP */ - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <800107>; - regulator-max-microvolt = <1302232>; - }; - - ppvar_bigcpu: ppvar-bigcpu { - compatible = "vctrl-regulator"; - regulator-name = "ppvar_bigcpu"; - - regulator-min-microvolt = <800107>; - regulator-max-microvolt = <1302232>; - - ctrl-supply = <&ppvar_bigcpu_pwm>; - ctrl-voltage-range = <800107 1302232>; - - regulator-settling-time-up-us = <322>; - }; - - ppvar_litcpu_pwm: ppvar-litcpu-pwm { - compatible = "pwm-regulator"; - regulator-name = "ppvar_litcpu_pwm"; - - pwms = <&pwm2 0 3337 0>; - pwm-supply = <&ppvar_sys>; - pwm-dutycycle-range = <100 0>; - pwm-dutycycle-unit = <100>; - - /* EC turns on w/ ap_core_en; always on for AP */ - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <797743>; - regulator-max-microvolt = <1307837>; - }; - - ppvar_litcpu: ppvar-litcpu { - compatible = "vctrl-regulator"; - regulator-name = "ppvar_litcpu"; - - regulator-min-microvolt = <797743>; - regulator-max-microvolt = <1307837>; - - ctrl-supply = <&ppvar_litcpu_pwm>; - ctrl-voltage-range = <797743 1307837>; - - regulator-settling-time-up-us = <384>; - }; - - ppvar_gpu_pwm: ppvar-gpu-pwm { - compatible = "pwm-regulator"; - regulator-name = "ppvar_gpu_pwm"; - - pwms = <&pwm0 0 3337 0>; - pwm-supply = <&ppvar_sys>; - pwm-dutycycle-range = <100 0>; - pwm-dutycycle-unit = <100>; - - /* EC turns on w/ ap_core_en; always on for AP */ - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <786384>; - regulator-max-microvolt = <1217747>; - }; - - ppvar_gpu: ppvar-gpu { - compatible = "vctrl-regulator"; - regulator-name = "ppvar_gpu"; - - regulator-min-microvolt = <786384>; - regulator-max-microvolt = <1217747>; - - ctrl-supply = <&ppvar_gpu_pwm>; - ctrl-voltage-range = <786384 1217747>; - - regulator-settling-time-up-us = <390>; - }; - - /* EC turns on w/ pp900_ddrpll_en */ - pp900_ddrpll: pp900-ap { - }; - - /* EC turns on w/ pp900_pll_en */ - pp900_pll: pp900-ap { - }; - - /* EC turns on w/ pp900_pmu_en */ - pp900_pmu: pp900-ap { - }; - - /* EC turns on w/ pp1800_s0_en_l */ - pp1800_ap_io: pp1800_emmc: pp1800_nfc: pp1800_s0: pp1800 { - }; - - /* EC turns on w/ pp1800_avdd_en_l */ - pp1800_avdd: pp1800 { - }; - - /* EC turns on w/ pp1800_lid_en_l */ - pp1800_lid: pp1800_mic: pp1800 { - }; - - /* EC turns on w/ lpddr_pwr_en */ - pp1800_lpddr: pp1800 { - }; - - /* EC turns on w/ pp1800_pmu_en_l */ - pp1800_pmu: pp1800 { - }; - - /* EC turns on w/ pp1800_usb_en_l */ - pp1800_usb: pp1800 { - }; - - pp3000_sd_slot: pp3000-sd-slot { - compatible = "regulator-fixed"; - regulator-name = "pp3000_sd_slot"; - pinctrl-names = "default"; - pinctrl-0 = <&sd_slot_pwr_en>; - - enable-active-high; - gpio = <&gpio4 29 GPIO_ACTIVE_HIGH>; - - vin-supply = <&pp3000>; - }; - - /* - * Technically, this is a small abuse of 'regulator-gpio'; this - * regulator is a mux between pp1800 and pp3300. pp1800 and pp3300 are - * always on though, so it is sufficient to simply control the mux - * here. - */ - ppvar_sd_card_io: ppvar-sd-card-io { - compatible = "regulator-gpio"; - regulator-name = "ppvar_sd_card_io"; - pinctrl-names = "default"; - pinctrl-0 = <&sd_io_pwr_en &sd_pwr_1800_sel>; - - enable-active-high; - enable-gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>; - gpios = <&gpio2 28 GPIO_ACTIVE_HIGH>; - states = <1800000 0x1>, - <3000000 0x0>; - - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3000000>; - }; - - /* EC turns on w/ pp3300_trackpad_en_l */ - pp3300_trackpad: pp3300-trackpad { - }; - - /* EC turns on w/ usb_a_en */ - pp5000_usb_a_vbus: pp5000 { - }; - - ap_rtc_clk: ap-rtc-clk { - compatible = "fixed-clock"; - clock-frequency = <32768>; - clock-output-names = "xin32k"; - #clock-cells = <0>; - }; - - max98357a: max98357a { - compatible = "maxim,max98357a"; - pinctrl-names = "default"; - pinctrl-0 = <&sdmode_en>; - sdmode-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>; - sdmode-delay = <2>; - #sound-dai-cells = <0>; - status = "okay"; - }; - - sound: sound { - compatible = "rockchip,rk3399-gru-sound"; - rockchip,cpu = <&i2s0 &spdif>; - }; -}; - -&cdn_dp { - status = "okay"; -}; - -/* - * Set some suspend operating points to avoid OVP in suspend - * - * When we go into S3 ARM Trusted Firmware will transition our PWM regulators - * from wherever they're at back to the "default" operating point (whatever - * voltage we get when we set the PWM pins to "input"). - * - * This quick transition under light load has the possibility to trigger the - * regulator "over voltage protection" (OVP). - * - * To make extra certain that we don't hit this OVP at suspend time, we'll - * transition to a voltage that's much closer to the default (~1.0 V) so that - * there will not be a big jump. Technically we only need to get within 200 mV - * of the default voltage, but the speed here should be fast enough and we need - * suspend/resume to be rock solid. - */ - -&cluster0_opp { - opp05 { - opp-suspend; - }; -}; - -&cluster1_opp { - opp06 { - opp-suspend; - }; -}; - -&cpu_l0 { - cpu-supply = <&ppvar_litcpu>; -}; - -&cpu_l1 { - cpu-supply = <&ppvar_litcpu>; -}; - -&cpu_l2 { - cpu-supply = <&ppvar_litcpu>; -}; - -&cpu_l3 { - cpu-supply = <&ppvar_litcpu>; -}; - -&cpu_b0 { - cpu-supply = <&ppvar_bigcpu>; -}; - -&cpu_b1 { - cpu-supply = <&ppvar_bigcpu>; -}; - - -&cru { - assigned-clocks = - <&cru PLL_GPLL>, <&cru PLL_CPLL>, - <&cru PLL_NPLL>, - <&cru ACLK_PERIHP>, <&cru HCLK_PERIHP>, - <&cru PCLK_PERIHP>, - <&cru ACLK_PERILP0>, <&cru HCLK_PERILP0>, - <&cru PCLK_PERILP0>, <&cru ACLK_CCI>, - <&cru HCLK_PERILP1>, <&cru PCLK_PERILP1>, - <&cru ACLK_VIO>, <&cru ACLK_HDCP>, - <&cru ACLK_GIC_PRE>, - <&cru PCLK_DDR>; - assigned-clock-rates = - <600000000>, <800000000>, - <1000000000>, - <150000000>, <75000000>, - <37500000>, - <100000000>, <100000000>, - <50000000>, <800000000>, - <100000000>, <50000000>, - <400000000>, <400000000>, - <200000000>, - <200000000>; -}; - -&dfi { - status = "okay"; -}; - -&dmc { - status = "okay"; - - rockchip,pd-idle-ns = <160>; - rockchip,sr-idle-ns = <10240>; - rockchip,sr-mc-gate-idle-ns = <40960>; - rockchip,srpd-lite-idle-ns = <61440>; - rockchip,standby-idle-ns = <81920>; - - rockchip,ddr3_odt_dis_freq = <666000000>; - rockchip,lpddr3_odt_dis_freq = <666000000>; - rockchip,lpddr4_odt_dis_freq = <666000000>; - - rockchip,sr-mc-gate-idle-dis-freq-hz = <1000000000>; - rockchip,srpd-lite-idle-dis-freq-hz = <0>; - rockchip,standby-idle-dis-freq-hz = <928000000>; -}; - -&dmc_opp_table { - opp03 { - opp-suspend; - }; -}; - -&emmc_phy { - status = "okay"; -}; - -&gpu { - mali-supply = <&ppvar_gpu>; - status = "okay"; -}; - -ap_i2c_ts: &i2c3 { - status = "okay"; - - clock-frequency = <400000>; - - /* These are relatively safe rise/fall times */ - i2c-scl-falling-time-ns = <50>; - i2c-scl-rising-time-ns = <300>; -}; - -ap_i2c_audio: &i2c8 { - status = "okay"; - - clock-frequency = <400000>; - - /* These are relatively safe rise/fall times */ - i2c-scl-falling-time-ns = <50>; - i2c-scl-rising-time-ns = <300>; - - codec: da7219@1a { - compatible = "dlg,da7219"; - reg = <0x1a>; - interrupt-parent = <&gpio1>; - interrupts = <23 IRQ_TYPE_LEVEL_LOW>; - clocks = <&cru SCLK_I2S_8CH_OUT>; - clock-names = "mclk"; - dlg,micbias-lvl = <2600>; - dlg,mic-amp-in-sel = "diff"; - pinctrl-names = "default"; - pinctrl-0 = <&headset_int_l>; - VDD-supply = <&pp1800>; - VDDMIC-supply = <&pp3300>; - VDDIO-supply = <&pp1800>; - - da7219_aad { - dlg,adc-1bit-rpt = <1>; - dlg,btn-avg = <4>; - dlg,btn-cfg = <50>; - dlg,mic-det-thr = <500>; - dlg,jack-ins-deb = <20>; - dlg,jack-det-rate = "32ms_64ms"; - dlg,jack-rem-deb = <1>; - - dlg,a-d-btn-thr = <0xa>; - dlg,d-b-btn-thr = <0x16>; - dlg,b-c-btn-thr = <0x21>; - dlg,c-mic-btn-thr = <0x3E>; - }; - }; -}; - -&i2s0 { - status = "okay"; -}; - -&io_domains { - status = "okay"; - - audio-supply = <&pp1800_audio>; /* APIO5_VDD; 3d 4a */ - bt656-supply = <&pp1800_ap_io>; /* APIO2_VDD; 2a 2b */ - gpio1830-supply = <&pp3000_ap>; /* APIO4_VDD; 4c 4d */ - sdmmc-supply = <&ppvar_sd_card_io>; /* SDMMC0_VDD; 4b */ -}; - -&pcie0 { - status = "okay"; - - ep-gpios = <&gpio2 27 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&pcie_clkreqn_cpm>, <&wifi_perst_l>; - vpcie3v3-supply = <&pp3300_wifi_bt>; - vpcie1v8-supply = <&wlan_pd_n>; /* HACK: see &wlan_pd_n */ - vpcie0v9-supply = <&pp900_pcie>; - - pci_rootport: pcie@0,0 { - reg = <0x0000 0 0 0 0>; - #address-cells = <3>; - #size-cells = <2>; - ranges; - device_type = "pci"; - }; -}; - -&pcie_phy { - status = "okay"; -}; - -&pmu_io_domains { - status = "okay"; - - pmu1830-supply = <&pp1800_pmu>; /* PMUIO2_VDD */ -}; - -&pwm0 { - status = "okay"; -}; - -&pwm1 { - status = "okay"; -}; - -&pwm2 { - status = "okay"; -}; - -&pwm3 { - status = "okay"; -}; - -&sdhci { - /* - * Signal integrity isn't great at 200 MHz and 150 MHz (DDR) gives the - * same (or nearly the same) performance for all eMMC that are intended - * to be used. - */ - assigned-clock-rates = <150000000>; - - bus-width = <8>; - mmc-hs400-1_8v; - mmc-hs400-enhanced-strobe; - non-removable; - status = "okay"; -}; - -&sdmmc { - status = "okay"; - - /* - * Note: configure "sdmmc_cd" as card detect even though it's actually - * hooked to ground. Because we specified "cd-gpios" below dw_mmc - * should be ignoring card detect anyway. Specifying the pin as - * sdmmc_cd means that even if you've got GRF_SOC_CON7[12] (force_jtag) - * turned on that the system will still make sure the port is - * configured as SDMMC and not JTAG. - */ - pinctrl-names = "default"; - pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_cd_pin - &sdmmc_bus4>; - - bus-width = <4>; - cap-mmc-highspeed; - cap-sd-highspeed; - cd-gpios = <&gpio4 24 GPIO_ACTIVE_LOW>; - disable-wp; - sd-uhs-sdr12; - sd-uhs-sdr25; - sd-uhs-sdr50; - sd-uhs-sdr104; - vmmc-supply = <&pp3000_sd_slot>; - vqmmc-supply = <&ppvar_sd_card_io>; -}; - -&spdif { - status = "okay"; - - /* - * SPDIF is routed internally to DP; we either don't use these pins, or - * mux them to something else. - */ - /delete-property/ pinctrl-0; - /delete-property/ pinctrl-names; -}; - -&spi1 { - status = "okay"; - - pinctrl-names = "default", "sleep"; - pinctrl-1 = <&spi1_sleep>; - - flash@0 { - compatible = "jedec,spi-nor"; - reg = <0>; - - /* May run faster once verified. */ - spi-max-frequency = <10000000>; - }; -}; - -&spi2 { - status = "okay"; -}; - -&spi5 { - status = "okay"; - - cros_ec: ec@0 { - compatible = "google,cros-ec-spi"; - reg = <0>; - interrupt-parent = <&gpio0>; - interrupts = <1 IRQ_TYPE_LEVEL_LOW>; - pinctrl-names = "default"; - pinctrl-0 = <&ec_ap_int_l>; - spi-max-frequency = <3000000>; - - i2c_tunnel: i2c-tunnel { - compatible = "google,cros-ec-i2c-tunnel"; - google,remote-bus = <4>; - #address-cells = <1>; - #size-cells = <0>; - }; - - usbc_extcon0: extcon0 { - compatible = "google,extcon-usbc-cros-ec"; - google,usb-port-id = <0>; - }; - }; -}; - -&tsadc { - status = "okay"; - - rockchip,hw-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */ - rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */ -}; - -&tcphy0 { - status = "okay"; - extcon = <&usbc_extcon0>; -}; - -&u2phy0 { - status = "okay"; -}; - -&u2phy0_host { - status = "okay"; -}; - -&u2phy1_host { - status = "okay"; -}; - -&u2phy0_otg { - status = "okay"; -}; - -&u2phy1_otg { - status = "okay"; -}; - -&uart2 { - status = "okay"; -}; - -&usb_host0_ohci { - status = "okay"; -}; - -&usbdrd3_0 { - status = "okay"; - extcon = <&usbc_extcon0>; -}; - -&usbdrd_dwc3_0 { - status = "okay"; - dr_mode = "host"; -}; - -&vopb { - status = "okay"; -}; - -&vopb_mmu { - status = "okay"; -}; - -&vopl { - status = "okay"; -}; - -&vopl_mmu { - status = "okay"; -}; - -#include -#include - -&pinctrl { - /* - * pinctrl settings for pins that have no real owners. - * - * At the moment settings are identical for S0 and S3, but if we later - * need to configure things differently for S3 we'll adjust here. - */ - pinctrl-names = "default"; - pinctrl-0 = < - &ap_pwroff /* AP will auto-assert this when in S3 */ - &clk_32k /* This pin is always 32k on gru boards */ - >; - - pcfg_output_low: pcfg-output-low { - output-low; - }; - - pcfg_output_high: pcfg-output-high { - output-high; - }; - - pcfg_pull_none_8ma: pcfg-pull-none-8ma { - bias-disable; - drive-strength = <8>; - }; - - backlight-enable { - bl_en: bl-en { - rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - cros-ec { - ec_ap_int_l: ec-ap-int-l { - rockchip,pins = <0 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - discrete-regulators { - sd_io_pwr_en: sd-io-pwr-en { - rockchip,pins = <2 RK_PA2 RK_FUNC_GPIO - &pcfg_pull_none>; - }; - - sd_pwr_1800_sel: sd-pwr-1800-sel { - rockchip,pins = <2 RK_PD4 RK_FUNC_GPIO - &pcfg_pull_none>; - }; - - sd_slot_pwr_en: sd-slot-pwr-en { - rockchip,pins = <4 RK_PD5 RK_FUNC_GPIO - &pcfg_pull_none>; - }; - }; - - codec { - /* Has external pullup */ - headset_int_l: headset-int-l { - rockchip,pins = <1 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - mic_int: mic-int { - rockchip,pins = <1 RK_PB5 RK_FUNC_GPIO &pcfg_pull_down>; - }; - }; - - max98357a { - sdmode_en: sdmode-en { - rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_down>; - }; - }; - - pcie { - pcie_clkreqn_cpm: pci-clkreqn-cpm { - /* - * Since our pcie doesn't support ClockPM(CPM), we want - * to hack this as gpio, so the EP could be able to - * de-assert it along and make ClockPM(CPM) work. - */ - rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - sdmmc { - /* - * We run sdmmc at max speed; bump up drive strength. - * We also have external pulls, so disable the internal ones. - */ - sdmmc_bus4: sdmmc-bus4 { - rockchip,pins = - <4 RK_PB0 1 &pcfg_pull_none_8ma>, - <4 RK_PB1 1 &pcfg_pull_none_8ma>, - <4 RK_PB2 1 &pcfg_pull_none_8ma>, - <4 RK_PB3 1 &pcfg_pull_none_8ma>; - }; - - sdmmc_clk: sdmmc-clk { - rockchip,pins = - <4 RK_PB4 1 &pcfg_pull_none_8ma>; - }; - - sdmmc_cmd: sdmmc-cmd { - rockchip,pins = - <4 RK_PB5 1 &pcfg_pull_none_8ma>; - }; - - /* - * In our case the official card detect is hooked to ground - * to avoid getting access to JTAG just by sticking something - * in the SD card slot (see the force_jtag bit in the TRM). - * - * We still configure it as card detect because it doesn't - * hurt and dw_mmc will ignore it. We make sure to disable - * the pull though so we don't burn needless power. - */ - sdmmc_cd: sdmmc-cd { - rockchip,pins = - <0 RK_PA7 1 &pcfg_pull_none>; - }; - - /* This is where we actually hook up CD; has external pull */ - sdmmc_cd_pin: sdmmc-cd-pin { - rockchip,pins = <4 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - spi1 { - spi1_sleep: spi1-sleep { - /* - * Pull down SPI1 CLK/CS/RX/TX during suspend, to - * prevent leakage. - */ - rockchip,pins = <1 RK_PB1 RK_FUNC_GPIO &pcfg_pull_down>, - <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_down>, - <1 RK_PA7 RK_FUNC_GPIO &pcfg_pull_down>, - <1 RK_PB0 RK_FUNC_GPIO &pcfg_pull_down>; - }; - }; - - touchscreen { - touch_int_l: touch-int-l { - rockchip,pins = <3 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>; - }; - - touch_reset_l: touch-reset-l { - rockchip,pins = <4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - trackpad { - ap_i2c_tp_pu_en: ap-i2c-tp-pu-en { - rockchip,pins = <3 RK_PB4 RK_FUNC_GPIO &pcfg_output_high>; - }; - - trackpad_int_l: trackpad-int-l { - rockchip,pins = <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - wifi: wifi { - wlan_module_reset_l: wlan-module-reset-l { - rockchip,pins = <1 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - bt_host_wake_l: bt-host-wake-l { - /* Kevin has an external pull up, but Gru does not */ - rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - write-protect { - ap_fw_wp: ap-fw-wp { - rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; -}; diff --git a/arch/arm/dts/rk3399-khadas-edge-captain.dts b/arch/arm/dts/rk3399-khadas-edge-captain.dts deleted file mode 100644 index 99ac4ed0f13..00000000000 --- a/arch/arm/dts/rk3399-khadas-edge-captain.dts +++ /dev/null @@ -1,31 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (c) 2019 Shenzhen Wesion Technology Co., Ltd. - * (https://www.khadas.com) - */ - -/dts-v1/; -#include "rk3399-khadas-edge.dtsi" - -/ { - model = "Khadas Edge-Captain"; - compatible = "khadas,edge-captain", "rockchip,rk3399"; - - aliases { - ethernet0 = &gmac; - }; -}; - -&gmac { - status = "okay"; -}; - -&pcie_phy { - status = "okay"; -}; - -&pcie0 { - ep-gpios = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>; - num-lanes = <4>; - status = "okay"; -}; diff --git a/arch/arm/dts/rk3399-khadas-edge-v.dts b/arch/arm/dts/rk3399-khadas-edge-v.dts deleted file mode 100644 index e12e7b4d64c..00000000000 --- a/arch/arm/dts/rk3399-khadas-edge-v.dts +++ /dev/null @@ -1,31 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (c) 2019 Shenzhen Wesion Technology Co., Ltd. - * (https://www.khadas.com) - */ - -/dts-v1/; -#include "rk3399-khadas-edge.dtsi" - -/ { - model = "Khadas Edge-V"; - compatible = "khadas,edge-v", "rockchip,rk3399"; - - aliases { - ethernet0 = &gmac; - }; -}; - -&gmac { - status = "okay"; -}; - -&pcie_phy { - status = "okay"; -}; - -&pcie0 { - ep-gpios = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>; - num-lanes = <4>; - status = "okay"; -}; diff --git a/arch/arm/dts/rk3399-khadas-edge.dts b/arch/arm/dts/rk3399-khadas-edge.dts deleted file mode 100644 index 31616e7ad89..00000000000 --- a/arch/arm/dts/rk3399-khadas-edge.dts +++ /dev/null @@ -1,13 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (c) 2019 Shenzhen Wesion Technology Co., Ltd. - * (https://www.khadas.com) - */ - -/dts-v1/; -#include "rk3399-khadas-edge.dtsi" - -/ { - model = "Khadas Edge"; - compatible = "khadas,edge", "rockchip,rk3399"; -}; diff --git a/arch/arm/dts/rk3399-khadas-edge.dtsi b/arch/arm/dts/rk3399-khadas-edge.dtsi deleted file mode 100644 index 9d9297bc5f0..00000000000 --- a/arch/arm/dts/rk3399-khadas-edge.dtsi +++ /dev/null @@ -1,837 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (c) 2019 Shenzhen Wesion Technology Co., Ltd. - * (https://www.khadas.com) - */ - -/dts-v1/; -#include -#include -#include -#include "rk3399.dtsi" -#include "rk3399-opp.dtsi" - -/ { - aliases { - mmc0 = &sdio0; - mmc1 = &sdmmc; - mmc2 = &sdhci; - }; - - chosen { - stdout-path = "serial2:1500000n8"; - }; - - clkin_gmac: external-gmac-clock { - compatible = "fixed-clock"; - clock-frequency = <125000000>; - clock-output-names = "clkin_gmac"; - #clock-cells = <0>; - }; - - sdio_pwrseq: sdio-pwrseq { - compatible = "mmc-pwrseq-simple"; - clocks = <&rk808 1>; - clock-names = "ext_clock"; - pinctrl-names = "default"; - pinctrl-0 = <&wifi_enable_h>; - - /* - * On the module itself this is one of these (depending - * on the actual card populated): - * - SDIO_RESET_L_WL_REG_ON - * - PDN (power down when low) - */ - reset-gpios = <&gpio2 RK_PD4 GPIO_ACTIVE_LOW>; - }; - - /* switched by pmic_sleep */ - vcc1v8_s3: vcca1v8_s3: vcc1v8-s3 { - compatible = "regulator-fixed"; - regulator-name = "vcc1v8_s3"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - vin-supply = <&vcc_1v8>; - }; - - vcc3v3_pcie: vcc3v3-pcie-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc3v3_pcie"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <&vsys_3v3>; - }; - - /* Actually 3 regulators (host0, 1, 2) controlled by the same gpio */ - vcc5v0_host: vcc5v0-host-regulator { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <&gpio4 RK_PD1 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&vcc5v0_host_en>; - regulator-name = "vcc5v0_host"; - regulator-always-on; - vin-supply = <&vsys_5v0>; - }; - - vdd_log: vdd-log { - compatible = "pwm-regulator"; - pwms = <&pwm2 0 25000 1>; - pwm-supply = <&vsys_3v3>; - regulator-name = "vdd_log"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <1400000>; - }; - - vsys: vsys { - compatible = "regulator-fixed"; - regulator-name = "vsys"; - regulator-always-on; - regulator-boot-on; - }; - - vsys_3v3: vsys-3v3 { - compatible = "regulator-fixed"; - regulator-name = "vsys_3v3"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <&vsys>; - }; - - vsys_5v0: vsys-5v0 { - compatible = "regulator-fixed"; - regulator-name = "vsys_5v0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - vin-supply = <&vsys>; - }; - - adc-keys { - compatible = "adc-keys"; - io-channels = <&saradc 1>; - io-channel-names = "buttons"; - keyup-threshold-microvolt = <1800000>; - poll-interval = <100>; - - button-recovery { - label = "Recovery"; - linux,code = ; - press-threshold-microvolt = <18000>; - }; - }; - - gpio-keys { - compatible = "gpio-keys"; - autorepeat; - pinctrl-names = "default"; - pinctrl-0 = <&pwrbtn>; - - key-power { - debounce-interval = <100>; - gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>; - label = "GPIO Key Power"; - linux,code = ; - wakeup-source; - }; - }; - - ir-receiver { - compatible = "gpio-ir-receiver"; - gpios = <&gpio1 RK_PB6 GPIO_ACTIVE_LOW>; - linux,rc-map-name = "rc-khadas"; - pinctrl-names = "default"; - pinctrl-0 = <&ir_rx>; - }; - - leds { - compatible = "gpio-leds"; - pinctrl-names = "default"; - pinctrl-0 = <&sys_led_pin>, <&user_led_pin>; - - sys_led: led-0 { - label = "sys_led"; - linux,default-trigger = "heartbeat"; - gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>; - }; - - user_led: led-1 { - label = "user_led"; - default-state = "off"; - gpios = <&gpio4 RK_PD0 GPIO_ACTIVE_HIGH>; - }; - }; - - fan: pwm-fan { - compatible = "pwm-fan"; - cooling-levels = <0 150 200 255>; - #cooling-cells = <2>; - fan-supply = <&vsys_5v0>; - pwms = <&pwm0 0 40000 0>; - }; -}; - -&cpu_l0 { - cpu-supply = <&vdd_cpu_l>; -}; - -&cpu_l1 { - cpu-supply = <&vdd_cpu_l>; -}; - -&cpu_l2 { - cpu-supply = <&vdd_cpu_l>; -}; - -&cpu_l3 { - cpu-supply = <&vdd_cpu_l>; -}; - -&cpu_b0 { - cpu-supply = <&vdd_cpu_b>; -}; - -&cpu_b1 { - cpu-supply = <&vdd_cpu_b>; -}; - -&cpu_thermal { - trips { - cpu_warm: cpu_warm { - temperature = <55000>; - hysteresis = <2000>; - type = "active"; - }; - - cpu_hot: cpu_hot { - temperature = <65000>; - hysteresis = <2000>; - type = "active"; - }; - }; - - cooling-maps { - map2 { - trip = <&cpu_warm>; - cooling-device = <&fan THERMAL_NO_LIMIT 1>; - }; - - map3 { - trip = <&cpu_hot>; - cooling-device = <&fan 2 THERMAL_NO_LIMIT>; - }; - }; -}; - -&emmc_phy { - status = "okay"; -}; - -&gmac { - assigned-clocks = <&cru SCLK_RMII_SRC>; - assigned-clock-parents = <&clkin_gmac>; - clock_in_out = "input"; - phy-supply = <&vcc_lan>; - phy-mode = "rgmii"; - pinctrl-names = "default"; - pinctrl-0 = <&rgmii_pins>; - snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; - snps,reset-active-low; - snps,reset-delays-us = <0 10000 50000>; - tx_delay = <0x28>; - rx_delay = <0x11>; -}; - -&gpu { - mali-supply = <&vdd_gpu>; - status = "okay"; -}; - -&gpu_thermal { - trips { - gpu_warm: gpu_warm { - temperature = <55000>; - hysteresis = <2000>; - type = "active"; - }; - - gpu_hot: gpu_hot { - temperature = <65000>; - hysteresis = <2000>; - type = "active"; - }; - }; - - cooling-maps { - map1 { - trip = <&gpu_warm>; - cooling-device = <&fan THERMAL_NO_LIMIT 1>; - }; - - map2 { - trip = <&gpu_hot>; - cooling-device = <&fan 2 THERMAL_NO_LIMIT>; - }; - }; -}; - -&hdmi { - ddc-i2c-bus = <&i2c3>; - pinctrl-names = "default"; - pinctrl-0 = <&hdmi_cec>; - status = "okay"; -}; - -&hdmi_sound { - status = "okay"; -}; - -&i2c3 { - i2c-scl-rising-time-ns = <450>; - i2c-scl-falling-time-ns = <15>; - status = "okay"; -}; - -&i2c4 { - clock-frequency = <400000>; - i2c-scl-rising-time-ns = <168>; - i2c-scl-falling-time-ns = <4>; - status = "okay"; - - rk808: pmic@1b { - compatible = "rockchip,rk808"; - reg = <0x1b>; - interrupt-parent = <&gpio1>; - interrupts = ; - #clock-cells = <1>; - clock-output-names = "xin32k", "rk808-clkout2"; - pinctrl-names = "default"; - pinctrl-0 = <&pmic_int_l>; - rockchip,system-power-controller; - wakeup-source; - - vcc1-supply = <&vsys_3v3>; - vcc2-supply = <&vsys_3v3>; - vcc3-supply = <&vsys_3v3>; - vcc4-supply = <&vsys_3v3>; - vcc6-supply = <&vsys_3v3>; - vcc7-supply = <&vsys_3v3>; - vcc8-supply = <&vsys_3v3>; - vcc9-supply = <&vsys_3v3>; - vcc10-supply = <&vsys_3v3>; - vcc11-supply = <&vsys_3v3>; - vcc12-supply = <&vsys_3v3>; - vddio-supply = <&vcc_1v8>; - - regulators { - vdd_center: DCDC_REG1 { - regulator-name = "vdd_center"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <750000>; - regulator-max-microvolt = <1350000>; - regulator-ramp-delay = <6001>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_cpu_l: DCDC_REG2 { - regulator-name = "vdd_cpu_l"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <750000>; - regulator-max-microvolt = <1350000>; - regulator-ramp-delay = <6001>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_ddr: DCDC_REG3 { - regulator-name = "vcc_ddr"; - regulator-always-on; - regulator-boot-on; - - regulator-state-mem { - regulator-on-in-suspend; - }; - }; - - vcc_1v8: DCDC_REG4 { - regulator-name = "vcc_1v8"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vcc1v8_apio2: LDO_REG1 { - regulator-name = "vcc1v8_apio2"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_vldo2: LDO_REG2 { - regulator-name = "vcc_vldo2"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc1v8_pmupll: LDO_REG3 { - regulator-name = "vcc1v8_pmupll"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vccio_sd: LDO_REG4 { - regulator-name = "vccio_sd"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3000000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <3000000>; - }; - }; - - vcc_vldo5: LDO_REG5 { - regulator-name = "vcc_vldo5"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_1v5: LDO_REG6 { - regulator-name = "vcc_1v5"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1500000>; - regulator-max-microvolt = <1500000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1500000>; - }; - }; - - vcc1v8_codec: LDO_REG7 { - regulator-name = "vcc1v8_codec"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_3v0: LDO_REG8 { - regulator-name = "vcc_3v0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <3000000>; - }; - }; - - vcc3v3_s3: vcc_lan: SWITCH_REG1 { - regulator-name = "vcc3v3_s3"; - regulator-always-on; - regulator-boot-on; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc3v3_s0: SWITCH_REG2 { - regulator-name = "vcc3v3_s0"; - regulator-always-on; - regulator-boot-on; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - }; - }; - - vdd_cpu_b: regulator@40 { - compatible = "silergy,syr827"; - reg = <0x40>; - fcs,suspend-voltage-selector = <1>; - pinctrl-names = "default"; - pinctrl-0 = <&cpu_b_sleep>; - regulator-name = "vdd_cpu_b"; - regulator-min-microvolt = <712500>; - regulator-max-microvolt = <1500000>; - regulator-ramp-delay = <1000>; - regulator-always-on; - regulator-boot-on; - vin-supply = <&vsys_3v3>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_gpu: regulator@41 { - compatible = "silergy,syr828"; - reg = <0x41>; - fcs,suspend-voltage-selector = <1>; - pinctrl-names = "default"; - pinctrl-0 = <&gpu_sleep>; - regulator-name = "vdd_gpu"; - regulator-min-microvolt = <712500>; - regulator-max-microvolt = <1500000>; - regulator-ramp-delay = <1000>; - regulator-always-on; - regulator-boot-on; - vin-supply = <&vsys_3v3>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; -}; - -&i2c8 { - clock-frequency = <400000>; - i2c-scl-rising-time-ns = <160>; - i2c-scl-falling-time-ns = <30>; - status = "okay"; -}; - -&i2s0 { - rockchip,playback-channels = <8>; - rockchip,capture-channels = <8>; - status = "okay"; -}; - -&i2s1 { - rockchip,playback-channels = <2>; - rockchip,capture-channels = <2>; - status = "okay"; -}; - -&i2s2 { - status = "okay"; -}; - -&io_domains { - bt656-supply = <&vcc1v8_apio2>; - audio-supply = <&vcc1v8_codec>; - sdmmc-supply = <&vccio_sd>; - gpio1830-supply = <&vcc_3v0>; - status = "okay"; -}; - -&pmu_io_domains { - pmu1830-supply = <&vcc_1v8>; - status = "okay"; -}; - -&pinctrl { - bt { - bt_host_wake_l: bt-host-wake-l { - rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - bt_reg_on_h: bt-reg-on-h { - rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - bt_wake_l: bt-wake-l { - rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - buttons { - pwrbtn: pwrbtn { - rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - ir { - ir_rx: ir-rx { - rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - leds { - sys_led_pin: sys-led-pin { - rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - user_led_pin: user-led-pin { - rockchip,pins = <4 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - pmic { - pmic_int_l: pmic-int-l { - rockchip,pins = <1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>; - }; - - cpu_b_sleep: cpu-b-sleep { - rockchip,pins = <1 RK_PB5 RK_FUNC_GPIO &pcfg_pull_down>; - }; - - gpu_sleep: gpu-sleep { - rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_down>; - }; - }; - - sdio-pwrseq { - wifi_enable_h: wifi-enable-h { - rockchip,pins = <2 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - usb2 { - vcc5v0_host_en: vcc5v0-host-en { - rockchip,pins = <4 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - wifi { - wifi_host_wake_l: wifi-host-wake-l { - rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; -}; - -&pwm0 { - status = "okay"; -}; - -&pwm2 { - status = "okay"; -}; - -&saradc { - vref-supply = <&vcca1v8_s3>; - status = "okay"; -}; - -&sdio0 { - /* WiFi & BT combo module Ampak AP6356S */ - bus-width = <4>; - cap-sdio-irq; - cap-sd-highspeed; - keep-power-in-suspend; - mmc-pwrseq = <&sdio_pwrseq>; - non-removable; - pinctrl-names = "default"; - pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>; - sd-uhs-sdr104; - vqmmc-supply = <&vcc1v8_s3>; - vmmc-supply = <&vccio_sd>; - #address-cells = <1>; - #size-cells = <0>; - status = "okay"; - - brcmf: wifi@1 { - reg = <1>; - compatible = "brcm,bcm4329-fmac"; - interrupt-parent = <&gpio0>; - interrupts = ; - interrupt-names = "host-wake"; - brcm,drive-strength = <5>; - pinctrl-names = "default"; - pinctrl-0 = <&wifi_host_wake_l>; - }; -}; - -&sdmmc { - bus-width = <4>; - cap-mmc-highspeed; - cap-sd-highspeed; - cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>; - disable-wp; - max-frequency = <150000000>; - pinctrl-names = "default"; - pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>; - status = "okay"; -}; - -&sdhci { - bus-width = <8>; - mmc-hs400-1_8v; - non-removable; - status = "okay"; -}; - -&spi1 { - status = "okay"; - - spiflash: flash@0 { - compatible = "winbond,w25q128fw", "jedec,spi-nor"; - reg = <0>; - spi-max-frequency = <104000000>; - }; -}; - -&tcphy0 { - status = "okay"; -}; - -&tcphy1 { - status = "okay"; -}; - -&tsadc { - /* tshut mode 0:CRU 1:GPIO */ - rockchip,hw-tshut-mode = <1>; - /* tshut polarity 0:LOW 1:HIGH */ - rockchip,hw-tshut-polarity = <1>; - status = "okay"; -}; - -&u2phy0 { - status = "okay"; - - u2phy0_otg: otg-port { - status = "okay"; - }; - - u2phy0_host: host-port { - phy-supply = <&vcc5v0_host>; - status = "okay"; - }; -}; - -&u2phy1 { - status = "okay"; - - u2phy1_otg: otg-port { - status = "okay"; - }; - - u2phy1_host: host-port { - phy-supply = <&vcc5v0_host>; - status = "okay"; - }; -}; - -&uart0 { - pinctrl-names = "default"; - pinctrl-0 = <&uart0_xfer &uart0_rts &uart0_cts>; - status = "okay"; - - bluetooth { - compatible = "brcm,bcm43438-bt"; - clocks = <&rk808 1>; - clock-names = "lpo"; - device-wakeup-gpios = <&gpio2 RK_PD2 GPIO_ACTIVE_HIGH>; - host-wakeup-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>; - shutdown-gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_HIGH>; - max-speed = <4000000>; - pinctrl-names = "default"; - pinctrl-0 = <&bt_reg_on_h &bt_host_wake_l &bt_wake_l>; - vbat-supply = <&vsys_3v3>; - vddio-supply = <&vcc_1v8>; - }; -}; - -&uart2 { - status = "okay"; -}; - -&usb_host0_ehci { - status = "okay"; -}; - -&usb_host0_ohci { - status = "okay"; -}; - -&usb_host1_ehci { - status = "okay"; -}; - -&usb_host1_ohci { - status = "okay"; -}; - -&usbdrd3_0 { - status = "okay"; -}; - -&usbdrd_dwc3_0 { - status = "okay"; - dr_mode = "otg"; -}; - -&usbdrd3_1 { - status = "okay"; -}; - -&usbdrd_dwc3_1 { - status = "okay"; - dr_mode = "host"; -}; - -&vopb { - status = "okay"; -}; - -&vopb_mmu { - status = "okay"; -}; - -&vopl { - status = "okay"; -}; - -&vopl_mmu { - status = "okay"; -}; diff --git a/arch/arm/dts/rk3399-leez-p710.dts b/arch/arm/dts/rk3399-leez-p710.dts deleted file mode 100644 index cb69e2145fa..00000000000 --- a/arch/arm/dts/rk3399-leez-p710.dts +++ /dev/null @@ -1,653 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (c) 2019 Andy Yan - */ - -/dts-v1/; -#include -#include -#include -#include "rk3399.dtsi" -#include "rk3399-opp.dtsi" - -/ { - model = "Leez RK3399 P710"; - compatible = "leez,p710", "rockchip,rk3399"; - - aliases { - ethernet0 = &gmac; - mmc0 = &sdio0; - mmc1 = &sdmmc; - mmc2 = &sdhci; - }; - - chosen { - stdout-path = "serial2:1500000n8"; - }; - - clkin_gmac: external-gmac-clock { - compatible = "fixed-clock"; - clock-frequency = <125000000>; - clock-output-names = "clkin_gmac"; - #clock-cells = <0>; - }; - - sdio_pwrseq: sdio-pwrseq { - compatible = "mmc-pwrseq-simple"; - clocks = <&rk808 1>; - clock-names = "ext_clock"; - pinctrl-names = "default"; - pinctrl-0 = <&wifi_reg_on_h>; - reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>; - }; - - dc5v_adp: dc5v-adp { - compatible = "regulator-fixed"; - regulator-name = "dc5v_adapter"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - }; - - vcc3v3_lan: vcc3v3-lan { - compatible = "regulator-fixed"; - regulator-name = "vcc3v3_lan"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <&vcc3v3_sys>; - }; - - vcc3v3_sys: vcc3v3-sys { - compatible = "regulator-fixed"; - regulator-name = "vcc3v3_sys"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <&vcc5v0_sys>; - }; - - vcc5v0_host0: vcc5v0_host1: vcc5v0-host { - compatible = "regulator-fixed"; - regulator-name = "vcc5v0_host"; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <5500000>; - regulator-max-microvolt = <5500000>; - vin-supply = <&vcc5v0_sys>; - }; - - vcc5v0_host3: vcc5v0-host3 { - compatible = "regulator-fixed"; - regulator-name = "vcc5v0_host3"; - enable-active-high; - gpio = <&gpio2 RK_PA2 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&vcc5v0_host3_en>; - regulator-always-on; - vin-supply = <&vcc5v0_sys>; - }; - - vcc5v0_sys: vcc5v0-sys { - compatible = "regulator-fixed"; - regulator-name = "vcc5v0_sys"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - vin-supply = <&dc5v_adp>; - }; - - vdd_log: vdd-log { - compatible = "pwm-regulator"; - pwms = <&pwm2 0 25000 1>; - pwm-supply = <&vcc5v0_sys>; - regulator-name = "vdd_log"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <1400000>; - }; -}; - -&cpu_l0 { - cpu-supply = <&vdd_cpu_l>; -}; - -&cpu_l1 { - cpu-supply = <&vdd_cpu_l>; -}; - -&cpu_l2 { - cpu-supply = <&vdd_cpu_l>; -}; - -&cpu_l3 { - cpu-supply = <&vdd_cpu_l>; -}; - -&cpu_b0 { - cpu-supply = <&vdd_cpu_b>; -}; - -&cpu_b1 { - cpu-supply = <&vdd_cpu_b>; -}; - -&emmc_phy { - status = "okay"; -}; - -&gmac { - assigned-clocks = <&cru SCLK_RMII_SRC>; - assigned-clock-parents = <&clkin_gmac>; - clock_in_out = "input"; - phy-supply = <&vcc3v3_lan>; - phy-mode = "rgmii"; - pinctrl-names = "default"; - pinctrl-0 = <&rgmii_pins>; - snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; - snps,reset-active-low; - snps,reset-delays-us = <0 10000 50000>; - tx_delay = <0x28>; - rx_delay = <0x11>; - status = "okay"; -}; - -&gpu { - mali-supply = <&vdd_gpu>; - status = "okay"; -}; - -&hdmi { - ddc-i2c-bus = <&i2c7>; - pinctrl-names = "default"; - pinctrl-0 = <&hdmi_cec>; - status = "okay"; -}; - -&hdmi_sound { - status = "okay"; -}; - -&i2c0 { - clock-frequency = <400000>; - i2c-scl-rising-time-ns = <168>; - i2c-scl-falling-time-ns = <4>; - status = "okay"; - - rk808: pmic@1b { - compatible = "rockchip,rk808"; - reg = <0x1b>; - interrupt-parent = <&gpio1>; - interrupts = <21 IRQ_TYPE_LEVEL_LOW>; - #clock-cells = <1>; - clock-output-names = "xin32k", "rk808-clkout2"; - pinctrl-names = "default"; - pinctrl-0 = <&pmic_int_l>; - rockchip,system-power-controller; - wakeup-source; - - vcc1-supply = <&vcc5v0_sys>; - vcc2-supply = <&vcc5v0_sys>; - vcc3-supply = <&vcc5v0_sys>; - vcc4-supply = <&vcc5v0_sys>; - vcc6-supply = <&vcc5v0_sys>; - vcc7-supply = <&vcc5v0_sys>; - vcc8-supply = <&vcc3v3_sys>; - vcc9-supply = <&vcc5v0_sys>; - vcc10-supply = <&vcc5v0_sys>; - vcc11-supply = <&vcc5v0_sys>; - vcc12-supply = <&vcc3v3_sys>; - vddio-supply = <&vcc_1v8>; - - regulators { - vdd_center: DCDC_REG1 { - regulator-name = "vdd_center"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <750000>; - regulator-max-microvolt = <1350000>; - regulator-ramp-delay = <6001>; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_cpu_l: DCDC_REG2 { - regulator-name = "vdd_cpu_l"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <750000>; - regulator-max-microvolt = <1350000>; - regulator-ramp-delay = <6001>; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_ddr: DCDC_REG3 { - regulator-name = "vcc_ddr"; - regulator-always-on; - regulator-boot-on; - regulator-state-mem { - regulator-on-in-suspend; - }; - }; - - vcc_1v8: DCDC_REG4 { - regulator-name = "vcc_1v8"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vcc1v8_dvp: LDO_REG1 { - regulator-name = "vcc1v8_dvp"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc1v8_hdmi: LDO_REG2 { - regulator-name = "vcc1v8_hdmi"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcca_1v8: LDO_REG3 { - regulator-name = "vcca_1v8"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vccio_sd: LDO_REG4 { - regulator-name = "vccio_sd"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <3000000>; - }; - }; - - vcca3v0_codec: LDO_REG5 { - regulator-name = "vcca3v0_codec"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_1v5: LDO_REG6 { - regulator-name = "vcc_1v5"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1500000>; - regulator-max-microvolt = <1500000>; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1500000>; - }; - }; - - vcc0v9_hdmi: LDO_REG7 { - regulator-name = "vcc0v9_hdmi"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <900000>; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_3v0: LDO_REG8 { - regulator-name = "vcc_3v0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <3000000>; - }; - }; - }; - }; - - vdd_cpu_b: regulator@40 { - compatible = "silergy,syr827"; - reg = <0x40>; - fcs,suspend-voltage-selector = <1>; - pinctrl-names = "default"; - pinctrl-0 = <&vsel1_pin>; - regulator-name = "vdd_cpu_b"; - regulator-min-microvolt = <712500>; - regulator-max-microvolt = <1500000>; - regulator-ramp-delay = <1000>; - regulator-always-on; - regulator-boot-on; - vin-supply = <&vcc5v0_sys>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_gpu: regulator@41 { - compatible = "silergy,syr828"; - reg = <0x41>; - fcs,suspend-voltage-selector = <1>; - pinctrl-names = "default"; - pinctrl-0 = <&vsel2_pin>; - regulator-name = "vdd_gpu"; - regulator-min-microvolt = <712500>; - regulator-max-microvolt = <1500000>; - regulator-ramp-delay = <1000>; - regulator-always-on; - regulator-boot-on; - vin-supply = <&vcc5v0_sys>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; -}; - -&i2c1 { - i2c-scl-rising-time-ns = <300>; - i2c-scl-falling-time-ns = <15>; - status = "okay"; -}; - -&i2c3 { - i2c-scl-rising-time-ns = <450>; - i2c-scl-falling-time-ns = <15>; - status = "okay"; -}; - -&i2c4 { - i2c-scl-rising-time-ns = <600>; - i2c-scl-falling-time-ns = <20>; - status = "okay"; -}; - -&i2c7 { - status = "okay"; -}; - -&i2s0 { - rockchip,playback-channels = <8>; - rockchip,capture-channels = <8>; - status = "okay"; -}; - -&i2s1 { - rockchip,playback-channels = <2>; - rockchip,capture-channels = <2>; - status = "okay"; -}; - -&i2s2 { - status = "okay"; -}; - -&io_domains { - status = "okay"; - - bt656-supply = <&vcc1v8_dvp>; - audio-supply = <&vcc_1v8>; - sdmmc-supply = <&vccio_sd>; - gpio1830-supply = <&vcc_3v0>; -}; - -&pmu_io_domains { - status = "okay"; - pmu1830-supply = <&vcc_3v0>; -}; - -&pinctrl { - bt { - bt_reg_on_h: bt-reg-on-h { - rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - bt_host_wake_l: bt-host-wake-l { - rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - bt_wake_l: bt-wake-l { - rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - pmic { - pmic_int_l: pmic-int-l { - rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>; - }; - - vsel1_pin: vsel1-pin { - rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>; - }; - - vsel2_pin: vsel2-pin { - rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>; - }; - }; - - usb2 { - vcc5v0_host3_en: vcc5v0-host3-en { - rockchip,pins = <2 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - wifi { - wifi_reg_on_h: wifi-reg-on-h { - rockchip,pins = - <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - wifi_host_wake_l: wifi-host-wake-l { - rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; -}; - -&pwm2 { - status = "okay"; -}; - -&saradc { - status = "okay"; - - vref-supply = <&vcc_1v8>; -}; - -&sdio0 { - #address-cells = <1>; - #size-cells = <0>; - bus-width = <4>; - clock-frequency = <50000000>; - cap-sdio-irq; - cap-sd-highspeed; - keep-power-in-suspend; - mmc-pwrseq = <&sdio_pwrseq>; - non-removable; - pinctrl-names = "default"; - pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>; - sd-uhs-sdr104; - status = "okay"; - - brcmf: wifi@1 { - compatible = "brcm,bcm4329-fmac"; - reg = <1>; - interrupt-parent = <&gpio0>; - interrupts = ; - interrupt-names = "host-wake"; - pinctrl-names = "default"; - pinctrl-0 = <&wifi_host_wake_l>; - }; -}; - -&sdhci { - bus-width = <8>; - mmc-hs400-1_8v; - mmc-hs400-enhanced-strobe; - non-removable; - status = "okay"; -}; - -&sdmmc { - bus-width = <4>; - cap-mmc-highspeed; - cap-sd-highspeed; - cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>; - disable-wp; - max-frequency = <150000000>; - pinctrl-names = "default"; - pinctrl-0 = <&sdmmc_clk &sdmmc_cd &sdmmc_cmd &sdmmc_bus4>; - status = "okay"; -}; - -&tcphy0 { - status = "okay"; -}; - -&tcphy1 { - status = "okay"; -}; - -&tsadc { - status = "okay"; - - /* tshut mode 0:CRU 1:GPIO */ - rockchip,hw-tshut-mode = <1>; - /* tshut polarity 0:LOW 1:HIGH */ - rockchip,hw-tshut-polarity = <1>; -}; - -&u2phy0 { - status = "okay"; - - u2phy0_otg: otg-port { - status = "okay"; - }; - - u2phy0_host: host-port { - phy-supply = <&vcc5v0_host0>; - status = "okay"; - }; -}; - -&u2phy1 { - status = "okay"; - - u2phy1_otg: otg-port { - status = "okay"; - }; - - u2phy1_host: host-port { - phy-supply = <&vcc5v0_host1>; - status = "okay"; - }; -}; - -&uart0 { - pinctrl-names = "default"; - pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>; - status = "okay"; - - bluetooth { - compatible = "brcm,bcm43438-bt"; - clocks = <&rk808 1>; - clock-names = "ext_clock"; - device-wakeup-gpios = <&gpio2 RK_PD2 GPIO_ACTIVE_HIGH>; - host-wakeup-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>; - shutdown-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&bt_host_wake_l &bt_wake_l &bt_reg_on_h>; - }; -}; - -&uart2 { - status = "okay"; -}; - -&usb_host0_ehci { - status = "okay"; -}; - -&usb_host0_ohci { - status = "okay"; -}; - -&usb_host1_ehci { - status = "okay"; -}; - -&usb_host1_ohci { - status = "okay"; -}; - -&usbdrd3_0 { - status = "okay"; -}; - -&usbdrd_dwc3_0 { - status = "okay"; - dr_mode = "otg"; -}; - -&usbdrd3_1 { - status = "okay"; -}; - -&usbdrd_dwc3_1 { - status = "okay"; - dr_mode = "host"; -}; - -&vopb { - status = "okay"; -}; - -&vopb_mmu { - status = "okay"; -}; - -&vopl { - status = "okay"; -}; - -&vopl_mmu { - status = "okay"; -}; diff --git a/arch/arm/dts/rk3399-nanopc-t4.dts b/arch/arm/dts/rk3399-nanopc-t4.dts deleted file mode 100644 index 3bf8f959e42..00000000000 --- a/arch/arm/dts/rk3399-nanopc-t4.dts +++ /dev/null @@ -1,137 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * FriendlyElec NanoPC-T4 board device tree source - * - * Copyright (c) 2018 FriendlyElec Computer Tech. Co., Ltd. - * (http://www.friendlyarm.com) - * - * Copyright (c) 2018 Collabora Ltd. - */ - -/dts-v1/; -#include "rk3399-nanopi4.dtsi" - -/ { - model = "FriendlyElec NanoPC-T4"; - compatible = "friendlyarm,nanopc-t4", "rockchip,rk3399"; - - vcc12v0_sys: vcc12v0-sys { - compatible = "regulator-fixed"; - regulator-always-on; - regulator-boot-on; - regulator-max-microvolt = <12000000>; - regulator-min-microvolt = <12000000>; - regulator-name = "vcc12v0_sys"; - }; - - vcc5v0_host0: vcc5v0-host0 { - compatible = "regulator-fixed"; - regulator-always-on; - regulator-boot-on; - regulator-name = "vcc5v0_host0"; - vin-supply = <&vcc5v0_sys>; - }; - - adc-keys { - compatible = "adc-keys"; - io-channels = <&saradc 1>; - io-channel-names = "buttons"; - keyup-threshold-microvolt = <1800000>; - poll-interval = <100>; - - button-recovery { - label = "Recovery"; - linux,code = ; - press-threshold-microvolt = <18000>; - }; - }; - - ir-receiver { - compatible = "gpio-ir-receiver"; - gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_LOW>; - pinctrl-names = "default"; - pinctrl-0 = <&ir_rx>; - }; - - fan: pwm-fan { - compatible = "pwm-fan"; - /* - * With 20KHz PWM and an EVERCOOL EC4007H12SA fan, these levels - * work out to 0, ~1200, ~3000, and 5000RPM respectively. - */ - cooling-levels = <0 12 18 255>; - #cooling-cells = <2>; - fan-supply = <&vcc12v0_sys>; - pwms = <&pwm1 0 50000 0>; - }; -}; - -&cpu_thermal { - trips { - cpu_warm: cpu_warm { - temperature = <55000>; - hysteresis = <2000>; - type = "active"; - }; - - cpu_hot: cpu_hot { - temperature = <65000>; - hysteresis = <2000>; - type = "active"; - }; - }; - - cooling-maps { - map2 { - trip = <&cpu_warm>; - cooling-device = <&fan THERMAL_NO_LIMIT 1>; - }; - - map3 { - trip = <&cpu_hot>; - cooling-device = <&fan 2 THERMAL_NO_LIMIT>; - }; - }; -}; - -&pcie0 { - ep-gpios = <&gpio2 RK_PA4 GPIO_ACTIVE_HIGH>; - num-lanes = <4>; - vpcie3v3-supply = <&vcc3v3_sys>; -}; - -&pinctrl { - ir { - ir_rx: ir-rx { - /* external pullup to VCC3V3_SYS, despite being 1.8V :/ */ - rockchip,pins = <0 RK_PA6 1 &pcfg_pull_none>; - }; - }; -}; - -&sdhci { - mmc-hs400-1_8v; - mmc-hs400-enhanced-strobe; -}; - -&u2phy0_host { - phy-supply = <&vcc5v0_host0>; -}; - -&u2phy1_host { - phy-supply = <&vcc5v0_host0>; -}; - -&vcc5v0_sys { - vin-supply = <&vcc12v0_sys>; -}; - -&vcc3v3_sys { - vin-supply = <&vcc12v0_sys>; -}; - -&vbus_typec { - enable-active-high; - gpios = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>; - vin-supply = <&vcc5v0_sys>; -}; diff --git a/arch/arm/dts/rk3399-nanopi-m4.dts b/arch/arm/dts/rk3399-nanopi-m4.dts deleted file mode 100644 index 60358ab8c7d..00000000000 --- a/arch/arm/dts/rk3399-nanopi-m4.dts +++ /dev/null @@ -1,66 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * FriendlyElec NanoPi M4 board device tree source - * - * Copyright (c) 2018 FriendlyElec Computer Tech. Co., Ltd. - * (http://www.friendlyarm.com) - * - * Copyright (c) 2018 Collabora Ltd. - * Copyright (c) 2019 Arm Ltd. - */ - -/dts-v1/; -#include "rk3399-nanopi4.dtsi" - -/ { - model = "FriendlyElec NanoPi M4"; - compatible = "friendlyarm,nanopi-m4", "rockchip,rk3399"; - - vdd_5v: vdd-5v { - compatible = "regulator-fixed"; - regulator-name = "vdd_5v"; - regulator-always-on; - regulator-boot-on; - }; - - vcc5v0_core: vcc5v0-core { - compatible = "regulator-fixed"; - regulator-name = "vcc5v0_core"; - regulator-always-on; - regulator-boot-on; - vin-supply = <&vdd_5v>; - }; - - vcc5v0_usb1: vcc5v0-usb1 { - compatible = "regulator-fixed"; - regulator-name = "vcc5v0_usb1"; - regulator-always-on; - regulator-boot-on; - vin-supply = <&vcc5v0_sys>; - }; - - vcc5v0_usb2: vcc5v0-usb2 { - compatible = "regulator-fixed"; - regulator-name = "vcc5v0_usb2"; - regulator-always-on; - regulator-boot-on; - vin-supply = <&vcc5v0_sys>; - }; -}; - -&vcc3v3_sys { - vin-supply = <&vcc5v0_core>; -}; - -&u2phy0_host { - phy-supply = <&vcc5v0_usb1>; -}; - -&u2phy1_host { - phy-supply = <&vcc5v0_usb2>; -}; - -&vbus_typec { - regulator-always-on; - vin-supply = <&vdd_5v>; -}; diff --git a/arch/arm/dts/rk3399-nanopi-m4b.dts b/arch/arm/dts/rk3399-nanopi-m4b.dts deleted file mode 100644 index 65cb21837b0..00000000000 --- a/arch/arm/dts/rk3399-nanopi-m4b.dts +++ /dev/null @@ -1,52 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * FriendlyElec NanoPi M4B board device tree source - * - * Copyright (c) 2020 Chen-Yu Tsai - */ - -/dts-v1/; -#include "rk3399-nanopi-m4.dts" - -/ { - model = "FriendlyElec NanoPi M4B"; - compatible = "friendlyarm,nanopi-m4b", "rockchip,rk3399"; - - adc-keys { - compatible = "adc-keys"; - io-channels = <&saradc 1>; - io-channel-names = "buttons"; - keyup-threshold-microvolt = <1500000>; - poll-interval = <100>; - - button-recovery { - label = "Recovery"; - linux,code = ; - press-threshold-microvolt = <18000>; - }; - }; -}; - -/* No USB type-C PD power manager */ -/delete-node/ &fusb0; - -&i2c4 { - status = "disabled"; -}; - -&u2phy0_host { - phy-supply = <&vcc5v0_usb2>; -}; - -&u2phy0_otg { - phy-supply = <&vbus_typec>; -}; - -&u2phy1_otg { - phy-supply = <&vcc5v0_usb1>; -}; - -&vbus_typec { - enable-active-high; - gpios = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>; -}; diff --git a/arch/arm/dts/rk3399-nanopi-neo4.dts b/arch/arm/dts/rk3399-nanopi-neo4.dts deleted file mode 100644 index 195410b089b..00000000000 --- a/arch/arm/dts/rk3399-nanopi-neo4.dts +++ /dev/null @@ -1,50 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (C) 2019 Amarula Solutions B.V. - * Author: Jagan Teki - */ - -/dts-v1/; - -#include "rk3399-nanopi4.dtsi" - -/ { - model = "FriendlyARM NanoPi NEO4"; - compatible = "friendlyarm,nanopi-neo4", "rockchip,rk3399"; - - vdd_5v: vdd-5v { - compatible = "regulator-fixed"; - regulator-name = "vdd_5v"; - regulator-always-on; - regulator-boot-on; - }; - - vcc5v0_core: vcc5v0-core { - compatible = "regulator-fixed"; - regulator-name = "vcc5v0_core"; - regulator-always-on; - regulator-boot-on; - vin-supply = <&vdd_5v>; - }; - - vcc5v0_usb1: vcc5v0-usb1 { - compatible = "regulator-fixed"; - regulator-name = "vcc5v0_usb1"; - regulator-always-on; - regulator-boot-on; - vin-supply = <&vcc5v0_sys>; - }; -}; - -&vcc3v3_sys { - vin-supply = <&vcc5v0_core>; -}; - -&u2phy0_host { - phy-supply = <&vcc5v0_usb1>; -}; - -&vbus_typec { - regulator-always-on; - vin-supply = <&vdd_5v>; -}; diff --git a/arch/arm/dts/rk3399-nanopi-r4s.dts b/arch/arm/dts/rk3399-nanopi-r4s.dts deleted file mode 100644 index fe5b5261001..00000000000 --- a/arch/arm/dts/rk3399-nanopi-r4s.dts +++ /dev/null @@ -1,133 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * FriendlyElec NanoPC-T4 board device tree source - * - * Copyright (c) 2020 FriendlyElec Computer Tech. Co., Ltd. - * (http://www.friendlyarm.com) - * - * Copyright (c) 2018 Collabora Ltd. - * - * Copyright (c) 2020 Jensen Huang - * Copyright (c) 2020 Marty Jones - * Copyright (c) 2021 Tianling Shen - */ - -/dts-v1/; -#include "rk3399-nanopi4.dtsi" - -/ { - model = "FriendlyElec NanoPi R4S"; - compatible = "friendlyarm,nanopi-r4s", "rockchip,rk3399"; - - /delete-node/ display-subsystem; - - gpio-leds { - pinctrl-0 = <&lan_led_pin>, <&sys_led_pin>, <&wan_led_pin>; - - /delete-node/ led-0; - - lan_led: led-lan { - gpios = <&gpio1 RK_PA1 GPIO_ACTIVE_HIGH>; - label = "green:lan"; - }; - - sys_led: led-sys { - gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>; - label = "red:power"; - default-state = "on"; - }; - - wan_led: led-wan { - gpios = <&gpio1 RK_PA0 GPIO_ACTIVE_HIGH>; - label = "green:wan"; - }; - }; - - gpio-keys { - pinctrl-0 = <&reset_button_pin>; - - /delete-node/ key-power; - - key-reset { - debounce-interval = <50>; - gpios = <&gpio1 RK_PC6 GPIO_ACTIVE_LOW>; - label = "reset"; - linux,code = ; - }; - }; - - vdd_5v: vdd-5v { - compatible = "regulator-fixed"; - regulator-name = "vdd_5v"; - regulator-always-on; - regulator-boot-on; - }; -}; - -&emmc_phy { - status = "disabled"; -}; - -&i2c4 { - status = "disabled"; -}; - -&pcie0 { - max-link-speed = <1>; - num-lanes = <1>; - vpcie3v3-supply = <&vcc3v3_sys>; -}; - -&pinctrl { - gpio-leds { - /delete-node/ status-led-pin; - - lan_led_pin: lan-led-pin { - rockchip,pins = <1 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - sys_led_pin: sys-led-pin { - rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - wan_led_pin: wan-led-pin { - rockchip,pins = <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - rockchip-key { - /delete-node/ power-key; - - reset_button_pin: reset-button-pin { - rockchip,pins = <1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; -}; - -&sdhci { - status = "disabled"; -}; - -&sdio0 { - status = "disabled"; -}; - -&u2phy0_host { - phy-supply = <&vdd_5v>; -}; - -&u2phy1_host { - status = "disabled"; -}; - -&uart0 { - status = "disabled"; -}; - -&usbdrd_dwc3_0 { - dr_mode = "host"; -}; - -&vcc3v3_sys { - vin-supply = <&vcc5v0_sys>; -}; diff --git a/arch/arm/dts/rk3399-nanopi4.dtsi b/arch/arm/dts/rk3399-nanopi4.dtsi deleted file mode 100644 index b7f1e47978a..00000000000 --- a/arch/arm/dts/rk3399-nanopi4.dtsi +++ /dev/null @@ -1,762 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * RK3399-based FriendlyElec boards device tree source - * - * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd - * - * Copyright (c) 2018 FriendlyElec Computer Tech. Co., Ltd. - * (http://www.friendlyarm.com) - * - * Copyright (c) 2018 Collabora Ltd. - * Copyright (c) 2019 Arm Ltd. - */ - -/dts-v1/; -#include -#include "rk3399.dtsi" -#include "rk3399-opp.dtsi" - -/ { - aliases { - ethernet0 = &gmac; - mmc0 = &sdio0; - mmc1 = &sdmmc; - mmc2 = &sdhci; - }; - - chosen { - stdout-path = "serial2:1500000n8"; - }; - - clkin_gmac: external-gmac-clock { - compatible = "fixed-clock"; - clock-frequency = <125000000>; - clock-output-names = "clkin_gmac"; - #clock-cells = <0>; - }; - - vcc3v3_sys: vcc3v3-sys { - compatible = "regulator-fixed"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-name = "vcc3v3_sys"; - }; - - vcc5v0_sys: vcc5v0-sys { - compatible = "regulator-fixed"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - regulator-name = "vcc5v0_sys"; - vin-supply = <&vdd_5v>; - }; - - /* switched by pmic_sleep */ - vcc1v8_s3: vcc1v8-s3 { - compatible = "regulator-fixed"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-name = "vcc1v8_s3"; - vin-supply = <&vcc_1v8>; - }; - - vcc3v0_sd: vcc3v0-sd { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <&gpio0 RK_PA1 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&sdmmc0_pwr_h>; - regulator-always-on; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - regulator-name = "vcc3v0_sd"; - vin-supply = <&vcc3v3_sys>; - }; - - /* - * Really, this is supplied by vcc_1v8, and vcc1v8_s3 only - * drives the enable pin, but we can't quite model that. - */ - vcca0v9_s3: vcca0v9-s3 { - compatible = "regulator-fixed"; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <900000>; - regulator-name = "vcca0v9_s3"; - vin-supply = <&vcc1v8_s3>; - }; - - /* As above, actually supplied by vcc3v3_sys */ - vcca1v8_s3: vcca1v8-s3 { - compatible = "regulator-fixed"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-name = "vcca1v8_s3"; - vin-supply = <&vcc1v8_s3>; - }; - - vbus_typec: vbus-typec { - compatible = "regulator-fixed"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - regulator-name = "vbus_typec"; - }; - - gpio-keys { - compatible = "gpio-keys"; - autorepeat; - pinctrl-names = "default"; - pinctrl-0 = <&power_key>; - - key-power { - debounce-interval = <100>; - gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>; - label = "GPIO Key Power"; - linux,code = ; - wakeup-source; - }; - }; - - leds: gpio-leds { - compatible = "gpio-leds"; - pinctrl-names = "default"; - pinctrl-0 = <&status_led_pin>; - - status_led: led-0 { - gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>; - label = "status_led"; - linux,default-trigger = "heartbeat"; - }; - }; - - sdio_pwrseq: sdio-pwrseq { - compatible = "mmc-pwrseq-simple"; - clocks = <&rk808 1>; - clock-names = "ext_clock"; - pinctrl-names = "default"; - pinctrl-0 = <&wifi_reg_on_h>; - reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>; - }; -}; - -&cpu_b0 { - cpu-supply = <&vdd_cpu_b>; -}; - -&cpu_b1 { - cpu-supply = <&vdd_cpu_b>; -}; - -&cpu_l0 { - cpu-supply = <&vdd_cpu_l>; -}; - -&cpu_l1 { - cpu-supply = <&vdd_cpu_l>; -}; - -&cpu_l2 { - cpu-supply = <&vdd_cpu_l>; -}; - -&cpu_l3 { - cpu-supply = <&vdd_cpu_l>; -}; - -&emmc_phy { - rockchip,enable-strobe-pulldown; - status = "okay"; -}; - -&gmac { - assigned-clock-parents = <&clkin_gmac>; - assigned-clocks = <&cru SCLK_RMII_SRC>; - clock_in_out = "input"; - pinctrl-names = "default"; - pinctrl-0 = <&rgmii_pins>, <&phy_intb>, <&phy_rstb>; - phy-handle = <&rtl8211e>; - phy-mode = "rgmii"; - phy-supply = <&vcc3v3_s3>; - tx_delay = <0x28>; - rx_delay = <0x11>; - status = "okay"; - - mdio { - compatible = "snps,dwmac-mdio"; - #address-cells = <1>; - #size-cells = <0>; - - rtl8211e: ethernet-phy@1 { - reg = <1>; - interrupt-parent = <&gpio3>; - interrupts = ; - reset-assert-us = <10000>; - reset-deassert-us = <30000>; - reset-gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; - }; - }; -}; - -&gpu { - mali-supply = <&vdd_gpu>; - status = "okay"; -}; - -&hdmi { - ddc-i2c-bus = <&i2c7>; - pinctrl-names = "default"; - pinctrl-0 = <&hdmi_cec>; - status = "okay"; -}; - -&hdmi_sound { - status = "okay"; -}; - -&i2c0 { - clock-frequency = <400000>; - i2c-scl-rising-time-ns = <160>; - i2c-scl-falling-time-ns = <30>; - status = "okay"; - - vdd_cpu_b: regulator@40 { - compatible = "silergy,syr827"; - reg = <0x40>; - fcs,suspend-voltage-selector = <1>; - pinctrl-names = "default"; - pinctrl-0 = <&cpu_b_sleep>; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <712500>; - regulator-max-microvolt = <1500000>; - regulator-name = "vdd_cpu_b"; - regulator-ramp-delay = <1000>; - vin-supply = <&vcc3v3_sys>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_gpu: regulator@41 { - compatible = "silergy,syr828"; - reg = <0x41>; - fcs,suspend-voltage-selector = <1>; - pinctrl-names = "default"; - pinctrl-0 = <&gpu_sleep>; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <712500>; - regulator-max-microvolt = <1500000>; - regulator-name = "vdd_gpu"; - regulator-ramp-delay = <1000>; - vin-supply = <&vcc3v3_sys>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - rk808: pmic@1b { - compatible = "rockchip,rk808"; - reg = <0x1b>; - clock-output-names = "xin32k", "rtc_clko_wifi"; - #clock-cells = <1>; - interrupt-parent = <&gpio1>; - interrupts = <21 IRQ_TYPE_LEVEL_LOW>; - pinctrl-names = "default"; - pinctrl-0 = <&pmic_int_l>, <&ap_pwroff>, <&clk_32k>; - rockchip,system-power-controller; - wakeup-source; - - vcc1-supply = <&vcc3v3_sys>; - vcc2-supply = <&vcc3v3_sys>; - vcc3-supply = <&vcc3v3_sys>; - vcc4-supply = <&vcc3v3_sys>; - vcc6-supply = <&vcc3v3_sys>; - vcc7-supply = <&vcc3v3_sys>; - vcc8-supply = <&vcc3v3_sys>; - vcc9-supply = <&vcc3v3_sys>; - vcc10-supply = <&vcc3v3_sys>; - vcc11-supply = <&vcc3v3_sys>; - vcc12-supply = <&vcc3v3_sys>; - vddio-supply = <&vcc_3v0>; - - regulators { - vdd_center: DCDC_REG1 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <750000>; - regulator-max-microvolt = <1350000>; - regulator-name = "vdd_center"; - regulator-ramp-delay = <6001>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_cpu_l: DCDC_REG2 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <750000>; - regulator-max-microvolt = <1350000>; - regulator-name = "vdd_cpu_l"; - regulator-ramp-delay = <6001>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_ddr: DCDC_REG3 { - regulator-always-on; - regulator-boot-on; - regulator-name = "vcc_ddr"; - - regulator-state-mem { - regulator-on-in-suspend; - }; - }; - - vcc_1v8: DCDC_REG4 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-name = "vcc_1v8"; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vcc1v8_cam: LDO_REG1 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-name = "vcc1v8_cam"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc3v0_touch: LDO_REG2 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - regulator-name = "vcc3v0_touch"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc1v8_pmupll: LDO_REG3 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-name = "vcc1v8_pmupll"; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vcc_sdio: LDO_REG4 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - regulator-name = "vcc_sdio"; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <3000000>; - }; - }; - - vcca3v0_codec: LDO_REG5 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - regulator-name = "vcca3v0_codec"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_1v5: LDO_REG6 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1500000>; - regulator-max-microvolt = <1500000>; - regulator-name = "vcc_1v5"; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1500000>; - }; - }; - - vcca1v8_codec: LDO_REG7 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-name = "vcca1v8_codec"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_3v0: LDO_REG8 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - regulator-name = "vcc_3v0"; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <3000000>; - }; - }; - - vcc3v3_s3: SWITCH_REG1 { - regulator-always-on; - regulator-boot-on; - regulator-name = "vcc3v3_s3"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc3v3_s0: SWITCH_REG2 { - regulator-always-on; - regulator-boot-on; - regulator-name = "vcc3v3_s0"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - }; - }; -}; - -&i2c1 { - clock-frequency = <200000>; - i2c-scl-rising-time-ns = <150>; - i2c-scl-falling-time-ns = <30>; - status = "okay"; -}; - -&i2c2 { - status = "okay"; -}; - -&i2c4 { - clock-frequency = <400000>; - i2c-scl-rising-time-ns = <160>; - i2c-scl-falling-time-ns = <30>; - status = "okay"; - - fusb0: typec-portc@22 { - compatible = "fcs,fusb302"; - reg = <0x22>; - interrupt-parent = <&gpio1>; - interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&fusb0_int>; - vbus-supply = <&vbus_typec>; - }; -}; - -&i2c7 { - status = "okay"; -}; - -&i2s2 { - status = "okay"; -}; - -&io_domains { - bt656-supply = <&vcc_1v8>; - audio-supply = <&vcca1v8_codec>; - sdmmc-supply = <&vcc_sdio>; - gpio1830-supply = <&vcc_3v0>; - status = "okay"; -}; - -&pcie_phy { - assigned-clock-parents = <&cru SCLK_PCIEPHY_REF100M>; - assigned-clock-rates = <100000000>; - assigned-clocks = <&cru SCLK_PCIEPHY_REF>; - status = "okay"; -}; - -&pcie0 { - num-lanes = <2>; - vpcie0v9-supply = <&vcca0v9_s3>; - vpcie1v8-supply = <&vcca1v8_s3>; - status = "okay"; -}; - -&pinctrl { - fusb30x { - fusb0_int: fusb0-int { - rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - gpio-leds { - status_led_pin: status-led-pin { - rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - gmac { - phy_intb: phy-intb { - rockchip,pins = <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>; - }; - - phy_rstb: phy-rstb { - rockchip,pins = <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - pmic { - cpu_b_sleep: cpu-b-sleep { - rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>; - }; - - gpu_sleep: gpu-sleep { - rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>; - }; - - pmic_int_l: pmic-int-l { - rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - rockchip-key { - power_key: power-key { - rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - sdio { - bt_host_wake_l: bt-host-wake-l { - rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - bt_reg_on_h: bt-reg-on-h { - /* external pullup to VCC1V8_PMUPLL */ - rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - bt_wake_l: bt-wake-l { - rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - wifi_reg_on_h: wifi-reg_on-h { - rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - sdmmc { - sdmmc0_det_l: sdmmc0-det-l { - rockchip,pins = <0 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>; - }; - - sdmmc0_pwr_h: sdmmc0-pwr-h { - rockchip,pins = <0 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; -}; - -&pmu_io_domains { - pmu1830-supply = <&vcc_3v0>; - status = "okay"; -}; - -&pwm0 { - status = "okay"; -}; - -&pwm1 { - status = "okay"; -}; - -&pwm2 { - pinctrl-names = "active"; - pinctrl-0 = <&pwm2_pin_pull_down>; - status = "okay"; -}; - -&saradc { - vref-supply = <&vcca1v8_s3>; - status = "okay"; -}; - -&sdhci { - bus-width = <8>; - mmc-hs200-1_8v; - non-removable; - status = "okay"; -}; - -&sdio0 { - bus-width = <4>; - cap-sd-highspeed; - cap-sdio-irq; - keep-power-in-suspend; - mmc-pwrseq = <&sdio_pwrseq>; - non-removable; - pinctrl-names = "default"; - pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>; - sd-uhs-sdr104; - status = "okay"; -}; - -&sdmmc { - bus-width = <4>; - cap-sd-highspeed; - cap-mmc-highspeed; - cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>; - disable-wp; - pinctrl-names = "default"; - pinctrl-0 = <&sdmmc_bus4 &sdmmc_clk &sdmmc_cmd &sdmmc0_det_l>; - sd-uhs-sdr104; - vmmc-supply = <&vcc3v0_sd>; - vqmmc-supply = <&vcc_sdio>; - status = "okay"; -}; - -&tcphy0 { - status = "okay"; -}; - -&tcphy1 { - status = "okay"; -}; - -&tsadc { - /* tshut mode 0:CRU 1:GPIO */ - rockchip,hw-tshut-mode = <1>; - /* tshut polarity 0:LOW 1:HIGH */ - rockchip,hw-tshut-polarity = <1>; - status = "okay"; -}; - -&u2phy0 { - status = "okay"; -}; - -&u2phy0_host { - status = "okay"; -}; - -&u2phy0_otg { - status = "okay"; -}; - -&u2phy1 { - status = "okay"; -}; - -&u2phy1_host { - status = "okay"; -}; - -&u2phy1_otg { - status = "okay"; -}; - -&uart0 { - pinctrl-names = "default"; - pinctrl-0 = <&uart0_xfer &uart0_rts &uart0_cts>; - status = "okay"; - - bluetooth { - compatible = "brcm,bcm43438-bt"; - clocks = <&rk808 1>; - clock-names = "lpo"; - device-wakeup-gpios = <&gpio2 RK_PD2 GPIO_ACTIVE_HIGH>; - host-wakeup-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>; - shutdown-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>; - max-speed = <4000000>; - pinctrl-names = "default"; - pinctrl-0 = <&bt_reg_on_h &bt_host_wake_l &bt_wake_l>; - vbat-supply = <&vcc3v3_sys>; - vddio-supply = <&vcc_1v8>; - }; -}; - -&uart2 { - status = "okay"; -}; - -&usbdrd3_0 { - status = "okay"; -}; - -&usbdrd3_1 { - status = "okay"; -}; - -&usbdrd_dwc3_0 { - status = "okay"; -}; - -&usbdrd_dwc3_1 { - dr_mode = "host"; - status = "okay"; -}; - -&usb_host0_ehci { - status = "okay"; -}; - -&usb_host0_ohci { - status = "okay"; -}; - -&usb_host1_ehci { - status = "okay"; -}; - -&usb_host1_ohci { - status = "okay"; -}; - -&vopb { - status = "okay"; -}; - -&vopb_mmu { - status = "okay"; -}; - -&vopl { - status = "okay"; -}; - -&vopl_mmu { - status = "okay"; -}; diff --git a/arch/arm/dts/rk3399-op1-opp.dtsi b/arch/arm/dts/rk3399-op1-opp.dtsi deleted file mode 100644 index 783120e9ceb..00000000000 --- a/arch/arm/dts/rk3399-op1-opp.dtsi +++ /dev/null @@ -1,166 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (c) 2016-2017 Fuzhou Rockchip Electronics Co., Ltd - */ - -/ { - cluster0_opp: opp-table-0 { - compatible = "operating-points-v2"; - opp-shared; - - opp00 { - opp-hz = /bits/ 64 <408000000>; - opp-microvolt = <800000>; - clock-latency-ns = <40000>; - }; - opp01 { - opp-hz = /bits/ 64 <600000000>; - opp-microvolt = <825000>; - }; - opp02 { - opp-hz = /bits/ 64 <816000000>; - opp-microvolt = <850000>; - }; - opp03 { - opp-hz = /bits/ 64 <1008000000>; - opp-microvolt = <900000>; - }; - opp04 { - opp-hz = /bits/ 64 <1200000000>; - opp-microvolt = <975000>; - }; - opp05 { - opp-hz = /bits/ 64 <1416000000>; - opp-microvolt = <1100000>; - }; - opp06 { - opp-hz = /bits/ 64 <1512000000>; - opp-microvolt = <1150000>; - }; - }; - - cluster1_opp: opp-table-1 { - compatible = "operating-points-v2"; - opp-shared; - - opp00 { - opp-hz = /bits/ 64 <408000000>; - opp-microvolt = <800000>; - clock-latency-ns = <40000>; - }; - opp01 { - opp-hz = /bits/ 64 <600000000>; - opp-microvolt = <800000>; - }; - opp02 { - opp-hz = /bits/ 64 <816000000>; - opp-microvolt = <825000>; - }; - opp03 { - opp-hz = /bits/ 64 <1008000000>; - opp-microvolt = <850000>; - }; - opp04 { - opp-hz = /bits/ 64 <1200000000>; - opp-microvolt = <900000>; - }; - opp05 { - opp-hz = /bits/ 64 <1416000000>; - opp-microvolt = <975000>; - }; - opp06 { - opp-hz = /bits/ 64 <1608000000>; - opp-microvolt = <1050000>; - }; - opp07 { - opp-hz = /bits/ 64 <1800000000>; - opp-microvolt = <1150000>; - }; - opp08 { - opp-hz = /bits/ 64 <2016000000>; - opp-microvolt = <1250000>; - }; - }; - - gpu_opp_table: opp-table-2 { - compatible = "operating-points-v2"; - - opp00 { - opp-hz = /bits/ 64 <200000000>; - opp-microvolt = <800000>; - }; - opp01 { - opp-hz = /bits/ 64 <297000000>; - opp-microvolt = <800000>; - }; - opp02 { - opp-hz = /bits/ 64 <400000000>; - opp-microvolt = <825000>; - }; - opp03 { - opp-hz = /bits/ 64 <500000000>; - opp-microvolt = <850000>; - }; - opp04 { - opp-hz = /bits/ 64 <600000000>; - opp-microvolt = <925000>; - }; - opp05 { - opp-hz = /bits/ 64 <800000000>; - opp-microvolt = <1075000>; - }; - }; - - dmc_opp_table: opp-table-3 { - compatible = "operating-points-v2"; - - opp00 { - opp-hz = /bits/ 64 <400000000>; - opp-microvolt = <900000>; - }; - opp01 { - opp-hz = /bits/ 64 <666000000>; - opp-microvolt = <900000>; - }; - opp02 { - opp-hz = /bits/ 64 <800000000>; - opp-microvolt = <900000>; - }; - opp03 { - opp-hz = /bits/ 64 <928000000>; - opp-microvolt = <925000>; - }; - }; -}; - -&cpu_l0 { - operating-points-v2 = <&cluster0_opp>; -}; - -&cpu_l1 { - operating-points-v2 = <&cluster0_opp>; -}; - -&cpu_l2 { - operating-points-v2 = <&cluster0_opp>; -}; - -&cpu_l3 { - operating-points-v2 = <&cluster0_opp>; -}; - -&cpu_b0 { - operating-points-v2 = <&cluster1_opp>; -}; - -&cpu_b1 { - operating-points-v2 = <&cluster1_opp>; -}; - -&dmc { - operating-points-v2 = <&dmc_opp_table>; -}; - -&gpu { - operating-points-v2 = <&gpu_opp_table>; -}; diff --git a/arch/arm/dts/rk3399-opp.dtsi b/arch/arm/dts/rk3399-opp.dtsi deleted file mode 100644 index fee5e711127..00000000000 --- a/arch/arm/dts/rk3399-opp.dtsi +++ /dev/null @@ -1,133 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (c) 2016-2017 Fuzhou Rockchip Electronics Co., Ltd - */ - -/ { - cluster0_opp: opp-table-0 { - compatible = "operating-points-v2"; - opp-shared; - - opp00 { - opp-hz = /bits/ 64 <408000000>; - opp-microvolt = <825000 825000 1250000>; - clock-latency-ns = <40000>; - }; - opp01 { - opp-hz = /bits/ 64 <600000000>; - opp-microvolt = <825000 825000 1250000>; - }; - opp02 { - opp-hz = /bits/ 64 <816000000>; - opp-microvolt = <850000 850000 1250000>; - }; - opp03 { - opp-hz = /bits/ 64 <1008000000>; - opp-microvolt = <925000 925000 1250000>; - }; - opp04 { - opp-hz = /bits/ 64 <1200000000>; - opp-microvolt = <1000000 1000000 1250000>; - }; - opp05 { - opp-hz = /bits/ 64 <1416000000>; - opp-microvolt = <1125000 1125000 1250000>; - }; - }; - - cluster1_opp: opp-table-1 { - compatible = "operating-points-v2"; - opp-shared; - - opp00 { - opp-hz = /bits/ 64 <408000000>; - opp-microvolt = <825000 825000 1250000>; - clock-latency-ns = <40000>; - }; - opp01 { - opp-hz = /bits/ 64 <600000000>; - opp-microvolt = <825000 825000 1250000>; - }; - opp02 { - opp-hz = /bits/ 64 <816000000>; - opp-microvolt = <825000 825000 1250000>; - }; - opp03 { - opp-hz = /bits/ 64 <1008000000>; - opp-microvolt = <875000 875000 1250000>; - }; - opp04 { - opp-hz = /bits/ 64 <1200000000>; - opp-microvolt = <950000 950000 1250000>; - }; - opp05 { - opp-hz = /bits/ 64 <1416000000>; - opp-microvolt = <1025000 1025000 1250000>; - }; - opp06 { - opp-hz = /bits/ 64 <1608000000>; - opp-microvolt = <1100000 1100000 1250000>; - }; - opp07 { - opp-hz = /bits/ 64 <1800000000>; - opp-microvolt = <1200000 1200000 1250000>; - }; - }; - - gpu_opp_table: opp-table-2 { - compatible = "operating-points-v2"; - - opp00 { - opp-hz = /bits/ 64 <200000000>; - opp-microvolt = <825000 825000 1150000>; - }; - opp01 { - opp-hz = /bits/ 64 <297000000>; - opp-microvolt = <825000 825000 1150000>; - }; - opp02 { - opp-hz = /bits/ 64 <400000000>; - opp-microvolt = <825000 825000 1150000>; - }; - opp03 { - opp-hz = /bits/ 64 <500000000>; - opp-microvolt = <875000 875000 1150000>; - }; - opp04 { - opp-hz = /bits/ 64 <600000000>; - opp-microvolt = <925000 925000 1150000>; - }; - opp05 { - opp-hz = /bits/ 64 <800000000>; - opp-microvolt = <1100000 1100000 1150000>; - }; - }; -}; - -&cpu_l0 { - operating-points-v2 = <&cluster0_opp>; -}; - -&cpu_l1 { - operating-points-v2 = <&cluster0_opp>; -}; - -&cpu_l2 { - operating-points-v2 = <&cluster0_opp>; -}; - -&cpu_l3 { - operating-points-v2 = <&cluster0_opp>; -}; - -&cpu_b0 { - operating-points-v2 = <&cluster1_opp>; -}; - -&cpu_b1 { - operating-points-v2 = <&cluster1_opp>; -}; - -&gpu { - operating-points-v2 = <&gpu_opp_table>; -}; diff --git a/arch/arm/dts/rk3399-orangepi.dts b/arch/arm/dts/rk3399-orangepi.dts deleted file mode 100644 index e7551449e71..00000000000 --- a/arch/arm/dts/rk3399-orangepi.dts +++ /dev/null @@ -1,896 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd. - */ - -/dts-v1/; - -#include "dt-bindings/pwm/pwm.h" -#include "dt-bindings/input/input.h" -#include -#include "dt-bindings/usb/pd.h" -#include "rk3399.dtsi" -#include "rk3399-opp.dtsi" - -/ { - model = "Orange Pi RK3399 Board"; - compatible = "rockchip,rk3399-orangepi", "rockchip,rk3399"; - - aliases { - ethernet0 = &gmac; - mmc0 = &sdio0; - mmc1 = &sdmmc; - mmc2 = &sdhci; - }; - - chosen { - stdout-path = "serial2:1500000n8"; - }; - - clkin_gmac: external-gmac-clock { - compatible = "fixed-clock"; - clock-frequency = <125000000>; - clock-output-names = "clkin_gmac"; - #clock-cells = <0>; - }; - - adc-keys { - compatible = "adc-keys"; - io-channels = <&saradc 1>; - io-channel-names = "buttons"; - keyup-threshold-microvolt = <1800000>; - poll-interval = <100>; - - button-up { - label = "Volume Up"; - linux,code = ; - press-threshold-microvolt = <100000>; - }; - - button-down { - label = "Volume Down"; - linux,code = ; - press-threshold-microvolt = <300000>; - }; - - button-back { - label = "Back"; - linux,code = ; - press-threshold-microvolt = <985000>; - }; - - button-menu { - label = "Menu"; - linux,code = ; - press-threshold-microvolt = <1314000>; - }; - }; - - dc_12v: dc-12v { - compatible = "regulator-fixed"; - regulator-name = "dc_12v"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <12000000>; - regulator-max-microvolt = <12000000>; - }; - - keys: gpio-keys { - compatible = "gpio-keys"; - autorepeat; - - key-power { - debounce-interval = <100>; - gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>; - label = "GPIO Power"; - linux,code = ; - linux,input-type = <1>; - pinctrl-names = "default"; - pinctrl-0 = <&pwr_btn>; - wakeup-source; - }; - }; - - sdio_pwrseq: sdio-pwrseq { - compatible = "mmc-pwrseq-simple"; - clocks = <&rk808 1>; - clock-names = "ext_clock"; - pinctrl-names = "default"; - pinctrl-0 = <&wifi_reg_on_h>; - reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>; - }; - - /* switched by pmic_sleep */ - vcc1v8_s3: vcca1v8_s3: vcc1v8-s3 { - compatible = "regulator-fixed"; - regulator-name = "vcc1v8_s3"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - vin-supply = <&vcc_1v8>; - }; - - vcc3v0_sd: vcc3v0-sd { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <&gpio0 RK_PA1 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&sdmmc0_pwr_h>; - regulator-boot-on; - regulator-max-microvolt = <3000000>; - regulator-min-microvolt = <3000000>; - regulator-name = "vcc3v0_sd"; - vin-supply = <&vcc3v3_sys>; - }; - - vcc3v3_sys: vcc3v3-sys { - compatible = "regulator-fixed"; - regulator-name = "vcc3v3_sys"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <&vcc_sys>; - }; - - vcc5v0_host: vcc5v0-host-regulator { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <&gpio4 RK_PD1 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&vcc5v0_host_en>; - regulator-name = "vcc5v0_host"; - regulator-always-on; - vin-supply = <&vcc_sys>; - }; - - vbus_typec: vbus-typec-regulator { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&vcc5v0_typec_en>; - regulator-name = "vbus_typec"; - vin-supply = <&vcc_sys>; - }; - - vcc_sys: vcc-sys { - compatible = "regulator-fixed"; - regulator-name = "vcc_sys"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - vin-supply = <&dc_12v>; - }; - - vdd_log: vdd-log { - compatible = "pwm-regulator"; - pwms = <&pwm2 0 25000 1>; - pwm-supply = <&vcc_sys>; - regulator-name = "vdd_log"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <1400000>; - }; -}; - -&cpu_l0 { - cpu-supply = <&vdd_cpu_l>; -}; - -&cpu_l1 { - cpu-supply = <&vdd_cpu_l>; -}; - -&cpu_l2 { - cpu-supply = <&vdd_cpu_l>; -}; - -&cpu_l3 { - cpu-supply = <&vdd_cpu_l>; -}; - -&cpu_b0 { - cpu-supply = <&vdd_cpu_b>; -}; - -&cpu_b1 { - cpu-supply = <&vdd_cpu_b>; -}; - -&emmc_phy { - status = "okay"; -}; - -&gmac { - assigned-clocks = <&cru SCLK_RMII_SRC>; - assigned-clock-parents = <&clkin_gmac>; - clock_in_out = "input"; - phy-supply = <&vcc3v3_s3>; - phy-mode = "rgmii"; - phy-handle = <&rtl8211e>; - pinctrl-names = "default"; - pinctrl-0 = <&rgmii_pins>, <&phy_intb>, <&phy_rstb>; - tx_delay = <0x28>; - rx_delay = <0x11>; - status = "okay"; - - mdio { - compatible = "snps,dwmac-mdio"; - #address-cells = <1>; - #size-cells = <0>; - - rtl8211e: ethernet-phy@1 { - reg = <1>; - interrupt-parent = <&gpio3>; - interrupts = ; - reset-assert-us = <10000>; - reset-deassert-us = <30000>; - reset-gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; - }; - }; -}; - -&gpu { - mali-supply = <&vdd_gpu>; - status = "okay"; -}; - -&hdmi { - ddc-i2c-bus = <&i2c3>; - status = "okay"; -}; - -&hdmi_sound { - status = "okay"; -}; - -&i2c0 { - clock-frequency = <400000>; - i2c-scl-rising-time-ns = <168>; - i2c-scl-falling-time-ns = <4>; - status = "okay"; - - rk808: pmic@1b { - compatible = "rockchip,rk808"; - reg = <0x1b>; - interrupt-parent = <&gpio1>; - interrupts = <21 IRQ_TYPE_LEVEL_LOW>; - #clock-cells = <1>; - clock-output-names = "rtc_clko_soc", "rtc_clko_wifi"; - pinctrl-names = "default"; - pinctrl-0 = <&pmic_int_l>; - rockchip,system-power-controller; - wakeup-source; - - vcc1-supply = <&vcc3v3_sys>; - vcc2-supply = <&vcc3v3_sys>; - vcc3-supply = <&vcc3v3_sys>; - vcc4-supply = <&vcc3v3_sys>; - vcc6-supply = <&vcc3v3_sys>; - vcc7-supply = <&vcc3v3_sys>; - vcc8-supply = <&vcc3v3_sys>; - vcc9-supply = <&vcc3v3_sys>; - vcc10-supply = <&vcc3v3_sys>; - vcc11-supply = <&vcc3v3_sys>; - vcc12-supply = <&vcc3v3_sys>; - vddio-supply = <&vcc_3v0>; - - regulators { - vdd_center: DCDC_REG1 { - regulator-name = "vdd_center"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <700000>; - regulator-max-microvolt = <1500000>; - regulator-ramp-delay = <6001>; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_cpu_l: DCDC_REG2 { - regulator-name = "vdd_cpu_l"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <700000>; - regulator-max-microvolt = <1500000>; - regulator-ramp-delay = <6001>; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_ddr: DCDC_REG3 { - regulator-name = "vcc_ddr"; - regulator-always-on; - regulator-boot-on; - regulator-state-mem { - regulator-on-in-suspend; - }; - }; - - vcc_1v8: DCDC_REG4 { - regulator-name = "vcc_1v8"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vcc1v8_dvp: LDO_REG1 { - regulator-name = "vcc1v8_dvp"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3400000>; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc3v0_tp: LDO_REG2 { - regulator-name = "vcc3v0_tp"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3400000>; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc1v8_pmupll: LDO_REG3 { - regulator-name = "vcc1v8_pmupll"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <2500000>; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vcc_sdio: LDO_REG4 { - regulator-name = "vcc_sdio"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3400000>; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <3000000>; - }; - }; - - vcca3v0_codec: LDO_REG5 { - regulator-name = "vcca3v0_codec"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3400000>; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_1v5: LDO_REG6 { - regulator-name = "vcc_1v5"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <2500000>; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1500000>; - }; - }; - - vcca1v8_codec: LDO_REG7 { - regulator-name = "vcca1v8_codec"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <2500000>; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_3v0: LDO_REG8 { - regulator-name = "vcc_3v0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3400000>; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <3000000>; - }; - }; - - vcc3v3_s3: SWITCH_REG1 { - regulator-name = "vcc3v3_s3"; - regulator-always-on; - regulator-boot-on; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc3v3_s0: SWITCH_REG2 { - regulator-name = "vcc3v3_s0"; - regulator-always-on; - regulator-boot-on; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - }; - }; - - vdd_cpu_b: regulator@40 { - compatible = "silergy,syr827"; - reg = <0x40>; - fcs,suspend-voltage-selector = <1>; - pinctrl-names = "default"; - pinctrl-0 = <&cpu_b_sleep>; - regulator-name = "vdd_cpu_b"; - regulator-min-microvolt = <712500>; - regulator-max-microvolt = <1500000>; - regulator-ramp-delay = <1000>; - regulator-always-on; - regulator-boot-on; - vin-supply = <&vcc3v3_sys>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_gpu: regulator@41 { - compatible = "silergy,syr828"; - reg = <0x41>; - fcs,suspend-voltage-selector = <1>; - pinctrl-names = "default"; - pinctrl-0 = <&gpu_sleep>; - regulator-name = "vdd_gpu"; - regulator-min-microvolt = <712500>; - regulator-max-microvolt = <1500000>; - regulator-ramp-delay = <1000>; - regulator-always-on; - regulator-boot-on; - vin-supply = <&vcc3v3_sys>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; -}; - -&i2c1 { - i2c-scl-rising-time-ns = <450>; - i2c-scl-falling-time-ns = <15>; - status = "okay"; -}; - -&i2c3 { - i2c-scl-rising-time-ns = <450>; - i2c-scl-falling-time-ns = <15>; - status = "okay"; -}; - -&i2c4 { - clock-frequency = <400000>; - i2c-scl-rising-time-ns = <450>; - i2c-scl-falling-time-ns = <15>; - status = "okay"; - - ak09911@c { - compatible = "asahi-kasei,ak09911"; - reg = <0x0c>; - vdd-supply = <&vcc3v3_s3>; - vid-supply = <&vcc3v3_s3>; - }; - - mpu6500@68 { - compatible = "invensense,mpu6500"; - reg = <0x68>; - interrupt-parent = <&gpio1>; - interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&gsensor_int_l>; - vddio-supply = <&vcc3v3_s3>; - }; - - lsm6ds3@6a { - compatible = "st,lsm6ds3"; - reg = <0x6a>; - interrupt-parent = <&gpio1>; - interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&gyr_int_l>; - vdd-supply = <&vcc3v3_s3>; - vddio-supply = <&vcc3v3_s3>; - }; - - cm32181@10 { - compatible = "capella,cm32181"; - reg = <0x10>; - interrupt-parent = <&gpio4>; - interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&light_int_l>; - vdd-supply = <&vcc3v3_s3>; - }; - - fusb302@22 { - compatible = "fcs,fusb302"; - reg = <0x22>; - interrupt-parent = <&gpio1>; - interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&chg_cc_int_l>; - vbus-supply = <&vbus_typec>; - - typec_con: connector { - compatible = "usb-c-connector"; - data-role = "host"; - label = "USB-C"; - op-sink-microwatt = <1000000>; - power-role = "dual"; - sink-pdos = - ; - source-pdos = - ; - try-power-role = "sink"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - typec_hs: endpoint { - remote-endpoint = <&u2phy0_typec_hs>; - }; - }; - port@1 { - reg = <1>; - typec_ss: endpoint { - remote-endpoint = <&tcphy0_typec_ss>; - }; - }; - port@2 { - reg = <2>; - typec_dp: endpoint { - remote-endpoint = <&tcphy0_typec_dp>; - }; - }; - }; - }; - }; -}; - -&io_domains { - status = "okay"; - bt656-supply = <&vcc_3v0>; - audio-supply = <&vcca1v8_codec>; - sdmmc-supply = <&vcc_sdio>; - gpio1830-supply = <&vcc_3v0>; -}; - -&pmu_io_domains { - status = "okay"; - pmu1830-supply = <&vcc_3v0>; -}; - -&pinctrl { - buttons { - pwr_btn: pwr-btn { - rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - gmac { - phy_intb: phy-intb { - rockchip,pins = <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>; - }; - - phy_rstb: phy-rstb { - rockchip,pins = <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - pmic { - cpu_b_sleep: cpu-b-sleep { - rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>; - }; - - gpu_sleep: gpu-sleep { - rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>; - }; - - pmic_int_l: pmic-int-l { - rockchip,pins = - <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - sd { - sdmmc0_pwr_h: sdmmc0-pwr-h { - rockchip,pins = - <0 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - usb2 { - vcc5v0_host_en: vcc5v0-host-en { - rockchip,pins = - <4 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - vcc5v0_typec_en: vcc5v0-typec-en { - rockchip,pins = - <1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - sdio-pwrseq { - wifi_reg_on_h: wifi-reg-on-h { - rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - wifi { - wifi_host_wake_l: wifi-host-wake-l { - rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - bluetooth { - bt_reg_on_h: bt-enable-h { - rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - bt_host_wake_l: bt-host-wake-l { - rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - bt_wake_l: bt-wake-l { - rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - mpu6500 { - gsensor_int_l: gsensor-int-l { - rockchip,pins = <1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - lsm6ds3 { - gyr_int_l: gyr-int-l { - rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - cm32181 { - light_int_l: light-int-l { - rockchip,pins = <4 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - fusb302 { - chg_cc_int_l: chg-cc-int-l { - rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; -}; - -&pwm0 { - status = "okay"; -}; - -&pwm2 { - status = "okay"; -}; - -&saradc { - vref-supply = <&vcca1v8_s3>; - status = "okay"; -}; - -&sdhci { - bus-width = <8>; - mmc-hs400-1_8v; - mmc-hs400-enhanced-strobe; - non-removable; - status = "okay"; -}; - -&sdio0 { - bus-width = <4>; - cap-sd-highspeed; - cap-sdio-irq; - clock-frequency = <50000000>; - disable-wp; - keep-power-in-suspend; - max-frequency = <50000000>; - mmc-pwrseq = <&sdio_pwrseq>; - non-removable; - pinctrl-names = "default"; - pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>; - sd-uhs-sdr104; - #address-cells = <1>; - #size-cells = <0>; - status = "okay"; - - brcmf: wifi@1 { - reg = <1>; - compatible = "brcm,bcm4329-fmac"; - interrupt-parent = <&gpio0>; - interrupts = ; - interrupt-names = "host-wake"; - pinctrl-names = "default"; - pinctrl-0 = <&wifi_host_wake_l>; - }; -}; - -&sdmmc { - bus-width = <4>; - cap-mmc-highspeed; - cap-sd-highspeed; - cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>; - clock-frequency = <150000000>; - disable-wp; - max-frequency = <150000000>; - pinctrl-names = "default"; - pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>; - vmmc-supply = <&vcc3v0_sd>; - vqmmc-supply = <&vcc_sdio>; - status = "okay"; -}; - -&tcphy0 { - status = "okay"; -}; - -&tcphy0_dp { - port { - tcphy0_typec_dp: endpoint { - remote-endpoint = <&typec_dp>; - }; - }; -}; - -&tcphy0_usb3 { - port { - tcphy0_typec_ss: endpoint { - remote-endpoint = <&typec_ss>; - }; - }; -}; - -&tcphy1 { - status = "okay"; -}; - -&tsadc { - rockchip,hw-tshut-mode = <1>; - rockchip,hw-tshut-polarity = <1>; - status = "okay"; -}; - -&u2phy0 { - status = "okay"; - - u2phy0_otg: otg-port { - phy-supply = <&vbus_typec>; - status = "okay"; - }; - - u2phy0_host: host-port { - phy-supply = <&vcc5v0_host>; - status = "okay"; - }; - - port { - u2phy0_typec_hs: endpoint { - remote-endpoint = <&typec_hs>; - }; - }; -}; - -&u2phy1 { - status = "okay"; - - u2phy1_otg: otg-port { - status = "okay"; - }; - - u2phy1_host: host-port { - phy-supply = <&vcc5v0_host>; - status = "okay"; - }; -}; - -&uart0 { - pinctrl-names = "default"; - pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>; - status = "okay"; - - bluetooth { - compatible = "brcm,bcm43438-bt"; - clocks = <&rk808 1>; - clock-names = "lpo"; - device-wakeup-gpios = <&gpio2 RK_PD2 GPIO_ACTIVE_HIGH>; - host-wakeup-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>; - shutdown-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&bt_host_wake_l &bt_wake_l &bt_reg_on_h>; - vbat-supply = <&vcc3v3_sys>; - vddio-supply = <&vcc_1v8>; - }; -}; - -&uart2 { - status = "okay"; -}; - -&usb_host0_ehci { - status = "okay"; -}; - -&usb_host0_ohci { - status = "okay"; -}; - -&usb_host1_ehci { - status = "okay"; -}; - -&usb_host1_ohci { - status = "okay"; -}; - -&usbdrd3_0 { - status = "okay"; -}; - -&usbdrd_dwc3_0 { - status = "okay"; - dr_mode = "host"; -}; - -&usbdrd3_1 { - status = "okay"; -}; - -&usbdrd_dwc3_1 { - status = "okay"; - dr_mode = "host"; -}; - -&vopb { - status = "okay"; -}; - -&vopb_mmu { - status = "okay"; -}; - -&vopl { - status = "okay"; -}; - -&vopl_mmu { - status = "okay"; -}; diff --git a/arch/arm/dts/rk3399-pinebook-pro.dts b/arch/arm/dts/rk3399-pinebook-pro.dts deleted file mode 100644 index 054c6a4d1a4..00000000000 --- a/arch/arm/dts/rk3399-pinebook-pro.dts +++ /dev/null @@ -1,1111 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd. - * Copyright (c) 2018 Akash Gajjar - * Copyright (c) 2020 Tobias Schramm - */ - -/dts-v1/; -#include -#include -#include -#include -#include -#include "rk3399.dtsi" -#include "rk3399-opp.dtsi" - -/ { - model = "Pine64 Pinebook Pro"; - compatible = "pine64,pinebook-pro", "rockchip,rk3399"; - chassis-type = "laptop"; - - aliases { - mmc0 = &sdio0; - mmc1 = &sdmmc; - mmc2 = &sdhci; - }; - - chosen { - stdout-path = "serial2:1500000n8"; - }; - - backlight: edp-backlight { - compatible = "pwm-backlight"; - power-supply = <&vcc_12v>; - pwms = <&pwm0 0 740740 0>; - }; - - bat: battery { - compatible = "simple-battery"; - charge-full-design-microamp-hours = <9800000>; - voltage-max-design-microvolt = <4350000>; - voltage-min-design-microvolt = <3000000>; - }; - - edp_panel: edp-panel { - compatible = "boe,nv140fhmn49"; - backlight = <&backlight>; - enable-gpios = <&gpio1 RK_PA0 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&panel_en_pin>; - power-supply = <&vcc3v3_panel>; - - port { - panel_in_edp: endpoint { - remote-endpoint = <&edp_out_panel>; - }; - }; - }; - - /* - * Use separate nodes for gpio-keys to allow for selective deactivation - * of wakeup sources via sysfs without disabling the whole key - */ - gpio-key-lid { - compatible = "gpio-keys"; - pinctrl-names = "default"; - pinctrl-0 = <&lidbtn_pin>; - - switch-lid { - debounce-interval = <20>; - gpios = <&gpio1 RK_PA1 GPIO_ACTIVE_LOW>; - label = "Lid"; - linux,code = ; - linux,input-type = ; - wakeup-event-action = ; - wakeup-source; - }; - }; - - gpio-key-power { - compatible = "gpio-keys"; - pinctrl-names = "default"; - pinctrl-0 = <&pwrbtn_pin>; - - key-power { - debounce-interval = <20>; - gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>; - label = "Power"; - linux,code = ; - wakeup-source; - }; - }; - - leds { - compatible = "gpio-leds"; - pinctrl-names = "default"; - pinctrl-0 = <&pwr_led_pin &slp_led_pin>; - - green_led: led-0 { - color = ; - default-state = "on"; - function = LED_FUNCTION_POWER; - gpios = <&gpio0 RK_PB3 GPIO_ACTIVE_HIGH>; - label = "green:power"; - }; - - red_led: led-1 { - color = ; - default-state = "off"; - function = LED_FUNCTION_STANDBY; - gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>; - label = "red:standby"; - panic-indicator; - retain-state-suspended; - }; - }; - - /* Power sequence for SDIO WiFi module */ - sdio_pwrseq: sdio-pwrseq { - compatible = "mmc-pwrseq-simple"; - clocks = <&rk808 1>; - clock-names = "ext_clock"; - pinctrl-names = "default"; - pinctrl-0 = <&wifi_enable_h_pin>; - post-power-on-delay-ms = <100>; - power-off-delay-us = <500000>; - - /* WL_REG_ON on module */ - reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>; - }; - - /* Audio components */ - es8316-sound { - compatible = "simple-audio-card"; - pinctrl-names = "default"; - pinctrl-0 = <&hp_det_pin>; - simple-audio-card,name = "rockchip,es8316-codec"; - simple-audio-card,format = "i2s"; - simple-audio-card,mclk-fs = <256>; - - simple-audio-card,widgets = - "Microphone", "Mic Jack", - "Headphone", "Headphones", - "Speaker", "Speaker"; - simple-audio-card,routing = - "MIC1", "Mic Jack", - "Headphones", "HPOL", - "Headphones", "HPOR", - "Speaker Amplifier INL", "HPOL", - "Speaker Amplifier INR", "HPOR", - "Speaker", "Speaker Amplifier OUTL", - "Speaker", "Speaker Amplifier OUTR"; - - simple-audio-card,hp-det-gpio = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>; - simple-audio-card,aux-devs = <&speaker_amp>; - simple-audio-card,pin-switches = "Speaker"; - - simple-audio-card,cpu { - sound-dai = <&i2s1>; - }; - - simple-audio-card,codec { - sound-dai = <&es8316>; - }; - }; - - speaker_amp: speaker-amplifier { - compatible = "simple-audio-amplifier"; - enable-gpios = <&gpio4 RK_PD3 GPIO_ACTIVE_HIGH>; - sound-name-prefix = "Speaker Amplifier"; - VCC-supply = <&pa_5v>; - }; - - /* Power tree */ - /* Root power source */ - vcc_sysin: vcc-sysin { - compatible = "regulator-fixed"; - regulator-name = "vcc_sysin"; - regulator-always-on; - regulator-boot-on; - }; - - /* Regulators supplied by vcc_sysin */ - /* LCD backlight supply */ - vcc_12v: vcc-12v { - compatible = "regulator-fixed"; - regulator-name = "vcc_12v"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <12000000>; - regulator-max-microvolt = <12000000>; - vin-supply = <&vcc_sysin>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - /* Main 3.3 V supply */ - vcc3v3_sys: wifi_bat: vcc3v3-sys { - compatible = "regulator-fixed"; - regulator-name = "vcc3v3_sys"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <&vcc_sysin>; - - regulator-state-mem { - regulator-on-in-suspend; - }; - }; - - /* 5 V USB power supply */ - vcc5v0_usb: pa_5v: vcc5v0-usb-regulator { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <&gpio1 RK_PB5 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&pwr_5v_pin>; - regulator-name = "vcc5v0_usb"; - regulator-always-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - vin-supply = <&vcc_sysin>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - /* RK3399 logic supply */ - vdd_log: vdd-log { - compatible = "pwm-regulator"; - pwms = <&pwm2 0 25000 1>; - pwm-supply = <&vcc_sysin>; - regulator-name = "vdd_log"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <1400000>; - - regulator-state-mem { - regulator-on-in-suspend; - }; - }; - - /* Regulators supplied by vcc3v3_sys */ - /* 0.9 V supply, always on */ - vcc_0v9: vcc-0v9 { - compatible = "regulator-fixed"; - regulator-name = "vcc_0v9"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <900000>; - vin-supply = <&vcc3v3_sys>; - }; - - /* S3 1.8 V supply, switched by vcc1v8_s3 */ - vcca1v8_s3: vcc1v8-s3 { - compatible = "regulator-fixed"; - regulator-name = "vcca1v8_s3"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - vin-supply = <&vcc3v3_sys>; - }; - - /* micro SD card power */ - vcc3v0_sd: vcc3v0-sd { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <&gpio0 RK_PA1 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&sdmmc0_pwr_h_pin>; - regulator-name = "vcc3v0_sd"; - regulator-always-on; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - vin-supply = <&vcc3v3_sys>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - /* LCD panel power, called VCC3V3_S0 in schematic */ - vcc3v3_panel: vcc3v3-panel { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <&gpio1 RK_PC6 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&lcdvcc_en_pin>; - regulator-name = "vcc3v3_panel"; - regulator-always-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-enable-ramp-delay = <100000>; - vin-supply = <&vcc3v3_sys>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - /* M.2 adapter power, switched by vcc1v8_s3 */ - vcc3v3_ssd: vcc3v3-ssd { - compatible = "regulator-fixed"; - regulator-name = "vcc3v3_ssd"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <&vcc3v3_sys>; - }; - - /* Regulators supplied by vcc5v0_usb */ - /* USB 3 port power supply regulator */ - vcc5v0_otg: vcc5v0-otg { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&vcc5v0_host_en_pin>; - regulator-name = "vcc5v0_otg"; - regulator-always-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - vin-supply = <&vcc5v0_usb>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - /* Regulators supplied by vcc5v0_usb */ - /* Type C port power supply regulator */ - vbus_5vout: vbus_typec: vbus-5vout { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&vcc5v0_typec0_en_pin>; - regulator-name = "vbus_5vout"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - vin-supply = <&vcc5v0_usb>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - /* Regulators supplied by vcc_1v8 */ - /* Primary 0.9 V LDO */ - vcca0v9_s3: vcca0v9-s3 { - compatible = "regulator-fixed"; - regulator-name = "vcc0v9_s3"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - vin-supply = <&vcc_1v8>; - - regulator-state-mem { - regulator-on-in-suspend; - }; - }; - - mains_charger: dc-charger { - compatible = "gpio-charger"; - charger-type = "mains"; - gpios = <&gpio4 RK_PD0 GPIO_ACTIVE_LOW>; - - /* Also triggered by USB charger */ - pinctrl-names = "default"; - pinctrl-0 = <&dc_det_pin>; - }; -}; - -&cpu_b0 { - cpu-supply = <&vdd_cpu_b>; -}; - -&cpu_b1 { - cpu-supply = <&vdd_cpu_b>; -}; - -&cpu_l0 { - cpu-supply = <&vdd_cpu_l>; -}; - -&cpu_l1 { - cpu-supply = <&vdd_cpu_l>; -}; - -&cpu_l2 { - cpu-supply = <&vdd_cpu_l>; -}; - -&cpu_l3 { - cpu-supply = <&vdd_cpu_l>; -}; - -&edp { - force-hpd; - pinctrl-names = "default"; - pinctrl-0 = <&edp_hpd>; - status = "okay"; - - ports { - edp_out: port@1 { - reg = <1>; - #address-cells = <1>; - #size-cells = <0>; - - edp_out_panel: endpoint@0 { - reg = <0>; - remote-endpoint = <&panel_in_edp>; - }; - }; - }; -}; - -&emmc_phy { - status = "okay"; -}; - -&gpu { - mali-supply = <&vdd_gpu>; - status = "okay"; -}; - -&hdmi_sound { - status = "okay"; -}; - -&i2c0 { - clock-frequency = <400000>; - i2c-scl-falling-time-ns = <4>; - i2c-scl-rising-time-ns = <168>; - status = "okay"; - - rk808: pmic@1b { - compatible = "rockchip,rk808"; - reg = <0x1b>; - #clock-cells = <1>; - clock-output-names = "xin32k", "rk808-clkout2"; - interrupt-parent = <&gpio3>; - interrupts = <10 IRQ_TYPE_LEVEL_LOW>; - pinctrl-names = "default"; - pinctrl-0 = <&pmic_int_l_pin>; - rockchip,system-power-controller; - wakeup-source; - - vcc1-supply = <&vcc_sysin>; - vcc2-supply = <&vcc_sysin>; - vcc3-supply = <&vcc_sysin>; - vcc4-supply = <&vcc_sysin>; - vcc6-supply = <&vcc_sysin>; - vcc7-supply = <&vcc_sysin>; - vcc8-supply = <&vcc3v3_sys>; - vcc9-supply = <&vcc_sysin>; - vcc10-supply = <&vcc_sysin>; - vcc11-supply = <&vcc_sysin>; - vcc12-supply = <&vcc3v3_sys>; - - regulators { - /* rk3399 center logic supply */ - vdd_center: DCDC_REG1 { - regulator-name = "vdd_center"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <750000>; - regulator-max-microvolt = <1350000>; - regulator-ramp-delay = <6001>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_cpu_l: DCDC_REG2 { - regulator-name = "vdd_cpu_l"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <750000>; - regulator-max-microvolt = <1350000>; - regulator-ramp-delay = <6001>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_ddr: DCDC_REG3 { - regulator-name = "vcc_ddr"; - regulator-always-on; - regulator-boot-on; - - regulator-state-mem { - regulator-on-in-suspend; - }; - }; - - vcc_1v8: vcc_wl: DCDC_REG4 { - regulator-name = "vcc_1v8"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - /* not used */ - LDO_REG1 { - }; - - /* not used */ - LDO_REG2 { - }; - - vcc1v8_pmupll: LDO_REG3 { - regulator-name = "vcc1v8_pmupll"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vcc_sdio: LDO_REG4 { - regulator-name = "vcc_sdio"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3000000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <3000000>; - }; - }; - - vcca3v0_codec: LDO_REG5 { - regulator-name = "vcca3v0_codec"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_1v5: LDO_REG6 { - regulator-name = "vcc_1v5"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1500000>; - regulator-max-microvolt = <1500000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1500000>; - }; - }; - - vcca1v8_codec: LDO_REG7 { - regulator-name = "vcca1v8_codec"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_3v0: LDO_REG8 { - regulator-name = "vcc_3v0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <3000000>; - }; - }; - - vcc3v3_s3: SWITCH_REG1 { - regulator-name = "vcc3v3_s3"; - regulator-always-on; - regulator-boot-on; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc3v3_s0: SWITCH_REG2 { - regulator-name = "vcc3v3_s0"; - regulator-always-on; - regulator-boot-on; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - }; - }; - - vdd_cpu_b: regulator@40 { - compatible = "silergy,syr827"; - reg = <0x40>; - fcs,suspend-voltage-selector = <1>; - pinctrl-names = "default"; - pinctrl-0 = <&vsel1_pin>; - regulator-name = "vdd_cpu_b"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <712500>; - regulator-max-microvolt = <1500000>; - regulator-ramp-delay = <1000>; - vin-supply = <&vcc_1v8>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_gpu: regulator@41 { - compatible = "silergy,syr828"; - reg = <0x41>; - fcs,suspend-voltage-selector = <1>; - pinctrl-names = "default"; - pinctrl-0 = <&vsel2_pin>; - regulator-name = "vdd_gpu"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <712500>; - regulator-max-microvolt = <1500000>; - regulator-ramp-delay = <1000>; - vin-supply = <&vcc_1v8>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; -}; - -&i2c1 { - clock-frequency = <100000>; - i2c-scl-falling-time-ns = <4>; - i2c-scl-rising-time-ns = <168>; - status = "okay"; - - es8316: audio-codec@11 { - compatible = "everest,es8316"; - reg = <0x11>; - clocks = <&cru SCLK_I2S_8CH_OUT>; - clock-names = "mclk"; - #sound-dai-cells = <0>; - }; -}; - -&i2c3 { - i2c-scl-falling-time-ns = <15>; - i2c-scl-rising-time-ns = <450>; - status = "okay"; -}; - -&i2c4 { - i2c-scl-falling-time-ns = <20>; - i2c-scl-rising-time-ns = <600>; - status = "okay"; - - fusb0: fusb30x@22 { - compatible = "fcs,fusb302"; - reg = <0x22>; - interrupt-parent = <&gpio1>; - interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&fusb0_int_pin>; - vbus-supply = <&vbus_typec>; - - connector { - compatible = "usb-c-connector"; - data-role = "dual"; - label = "USB-C"; - op-sink-microwatt = <1000000>; - power-role = "dual"; - sink-pdos = - ; - source-pdos = - ; - try-power-role = "sink"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - - usbc_hs: endpoint { - remote-endpoint = - <&u2phy0_typec_hs>; - }; - }; - - port@1 { - reg = <1>; - - usbc_ss: endpoint { - remote-endpoint = - <&tcphy0_typec_ss>; - }; - }; - - port@2 { - reg = <2>; - - usbc_dp: endpoint { - remote-endpoint = - <&tcphy0_typec_dp>; - }; - }; - }; - }; - }; - - cw2015@62 { - compatible = "cellwise,cw2015"; - reg = <0x62>; - cellwise,battery-profile = /bits/ 8 < - 0x17 0x67 0x80 0x73 0x6E 0x6C 0x6B 0x63 - 0x77 0x51 0x5C 0x58 0x50 0x4C 0x48 0x36 - 0x15 0x0C 0x0C 0x19 0x5B 0x7D 0x6F 0x69 - 0x69 0x5B 0x0C 0x29 0x20 0x40 0x52 0x59 - 0x57 0x56 0x54 0x4F 0x3B 0x1F 0x7F 0x17 - 0x06 0x1A 0x30 0x5A 0x85 0x93 0x96 0x2D - 0x48 0x77 0x9C 0xB3 0x80 0x52 0x94 0xCB - 0x2F 0x00 0x64 0xA5 0xB5 0x11 0xF0 0x11 - >; - cellwise,monitor-interval-ms = <5000>; - monitored-battery = <&bat>; - power-supplies = <&mains_charger>, <&fusb0>; - }; -}; - -&i2s1 { - pinctrl-names = "default"; - pinctrl-0 = <&i2s_8ch_mclk_pin>, <&i2s1_2ch_bus>; - rockchip,capture-channels = <8>; - rockchip,playback-channels = <8>; - status = "okay"; -}; - -&io_domains { - audio-supply = <&vcc_3v0>; - gpio1830-supply = <&vcc_3v0>; - sdmmc-supply = <&vcc_sdio>; - status = "okay"; -}; - -&pcie_phy { - status = "okay"; -}; - -&pcie0 { - bus-scan-delay-ms = <1000>; - ep-gpios = <&gpio2 RK_PD4 GPIO_ACTIVE_HIGH>; - num-lanes = <4>; - pinctrl-names = "default"; - pinctrl-0 = <&pcie_clkreqn_cpm>; - vpcie0v9-supply = <&vcca0v9_s3>; - vpcie1v8-supply = <&vcca1v8_s3>; - vpcie3v3-supply = <&vcc3v3_ssd>; - status = "okay"; -}; - -&pinctrl { - buttons { - pwrbtn_pin: pwrbtn-pin { - rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>; - }; - - lidbtn_pin: lidbtn-pin { - rockchip,pins = <1 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - dc-charger { - dc_det_pin: dc-det-pin { - rockchip,pins = <4 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - es8316 { - hp_det_pin: hp-det-pin { - rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - fusb302x { - fusb0_int_pin: fusb0-int-pin { - rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - i2s1 { - i2s_8ch_mclk_pin: i2s-8ch-mclk-pin { - rockchip,pins = <4 RK_PA0 1 &pcfg_pull_none>; - }; - }; - - lcd-panel { - lcdvcc_en_pin: lcdvcc-en-pin { - rockchip,pins = <1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - panel_en_pin: panel-en-pin { - rockchip,pins = <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - lcd_panel_reset_pin: lcd-panel-reset-pin { - rockchip,pins = <4 RK_PD6 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - leds { - pwr_led_pin: pwr-led-pin { - rockchip,pins = <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - slp_led_pin: slp-led-pin { - rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - pmic { - pmic_int_l_pin: pmic-int-l-pin { - rockchip,pins = <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>; - }; - - vsel1_pin: vsel1-pin { - rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>; - }; - - vsel2_pin: vsel2-pin { - rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>; - }; - }; - - sdcard { - sdmmc0_pwr_h_pin: sdmmc0-pwr-h-pin { - rockchip,pins = <0 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - }; - - sdio-pwrseq { - wifi_enable_h_pin: wifi-enable-h-pin { - rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - usb-typec { - vcc5v0_typec0_en_pin: vcc5v0-typec0-en-pin { - rockchip,pins = <1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - usb2 { - pwr_5v_pin: pwr-5v-pin { - rockchip,pins = <1 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - vcc5v0_host_en_pin: vcc5v0-host-en-pin { - rockchip,pins = <4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - wireless-bluetooth { - bt_wake_pin: bt-wake-pin { - rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - bt_host_wake_pin: bt-host-wake-pin { - rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - bt_reset_pin: bt-reset-pin { - rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; -}; - -&pmu_io_domains { - pmu1830-supply = <&vcc_3v0>; - status = "okay"; -}; - -&pwm0 { - status = "okay"; -}; - -&pwm2 { - status = "okay"; -}; - -&saradc { - vref-supply = <&vcca1v8_s3>; - status = "okay"; -}; - -&sdmmc { - bus-width = <4>; - cap-mmc-highspeed; - cap-sd-highspeed; - cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>; - disable-wp; - pinctrl-names = "default"; - pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>; - sd-uhs-sdr50; - vmmc-supply = <&vcc3v0_sd>; - vqmmc-supply = <&vcc_sdio>; - status = "okay"; -}; - -&sdio0 { - bus-width = <4>; - cap-sd-highspeed; - cap-sdio-irq; - keep-power-in-suspend; - mmc-pwrseq = <&sdio_pwrseq>; - non-removable; - pinctrl-names = "default"; - pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>; - sd-uhs-sdr104; - status = "okay"; -}; - -&sdhci { - bus-width = <8>; - mmc-hs200-1_8v; - non-removable; - status = "okay"; -}; - -&spi1 { - max-freq = <10000000>; - status = "okay"; - - spiflash: flash@0 { - compatible = "jedec,spi-nor"; - reg = <0>; - m25p,fast-read; - spi-max-frequency = <10000000>; - }; -}; - -&tcphy0 { - status = "okay"; -}; - -&tcphy0_dp { - port { - tcphy0_typec_dp: endpoint { - remote-endpoint = <&usbc_dp>; - }; - }; -}; - -&tcphy0_usb3 { - port { - tcphy0_typec_ss: endpoint { - remote-endpoint = <&usbc_ss>; - }; - }; -}; - -&tcphy1 { - status = "okay"; -}; - -&tsadc { - /* tshut mode 0:CRU 1:GPIO */ - rockchip,hw-tshut-mode = <1>; - /* tshut polarity 0:LOW 1:HIGH */ - rockchip,hw-tshut-polarity = <1>; - status = "okay"; -}; - -&u2phy0 { - status = "okay"; - - u2phy0_otg: otg-port { - status = "okay"; - }; - - u2phy0_host: host-port { - phy-supply = <&vcc5v0_otg>; - status = "okay"; - }; - - port { - u2phy0_typec_hs: endpoint { - remote-endpoint = <&usbc_hs>; - }; - }; -}; - -&u2phy1 { - status = "okay"; - - u2phy1_otg: otg-port { - status = "okay"; - }; - - u2phy1_host: host-port { - phy-supply = <&vcc5v0_otg>; - status = "okay"; - }; -}; - -&uart0 { - pinctrl-names = "default"; - pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>; - uart-has-rtscts; - status = "okay"; - - bluetooth { - compatible = "brcm,bcm4345c5"; - clocks = <&rk808 1>; - clock-names = "lpo"; - device-wakeup-gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_HIGH>; - host-wakeup-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>; - max-speed = <1500000>; - pinctrl-names = "default"; - pinctrl-0 = <&bt_host_wake_pin &bt_wake_pin &bt_reset_pin>; - shutdown-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>; - vbat-supply = <&wifi_bat>; - vddio-supply = <&vcc_wl>; - }; -}; - -&uart2 { - status = "okay"; -}; - -&usb_host0_ehci { - status = "okay"; -}; - -&usb_host0_ohci { - status = "okay"; -}; - -&usb_host1_ehci { - status = "okay"; -}; - -&usb_host1_ohci { - status = "okay"; -}; - -&usbdrd3_0 { - status = "okay"; -}; - -&usbdrd_dwc3_0 { - dr_mode = "host"; - status = "okay"; -}; - -&usbdrd3_1 { - status = "okay"; -}; - -&usbdrd_dwc3_1 { - dr_mode = "host"; - status = "okay"; -}; - -&vopb { - status = "okay"; -}; - -&vopb_mmu { - status = "okay"; -}; - -&vopl { - status = "okay"; -}; - -&vopl_mmu { - status = "okay"; -}; diff --git a/arch/arm/dts/rk3399-pinephone-pro.dts b/arch/arm/dts/rk3399-pinephone-pro.dts deleted file mode 100644 index 61f3fec5a8b..00000000000 --- a/arch/arm/dts/rk3399-pinephone-pro.dts +++ /dev/null @@ -1,621 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (c) 2020 Martijn Braam - * Copyright (c) 2021 Kamil Trzciński - */ - -/* - * PinePhone Pro datasheet: - * https://files.pine64.org/doc/PinePhonePro/PinephonePro-Schematic-V1.0-20211127.pdf - */ - -/dts-v1/; -#include -#include -#include "rk3399.dtsi" -#include "rk3399-opp.dtsi" - -/ { - model = "Pine64 PinePhonePro"; - compatible = "pine64,pinephone-pro", "rockchip,rk3399"; - chassis-type = "handset"; - - aliases { - mmc0 = &sdio0; - mmc1 = &sdmmc; - mmc2 = &sdhci; - }; - - chosen { - stdout-path = "serial2:115200n8"; - }; - - adc-keys { - compatible = "adc-keys"; - io-channels = <&saradc 1>; - io-channel-names = "buttons"; - keyup-threshold-microvolt = <1600000>; - poll-interval = <100>; - - button-up { - label = "Volume Up"; - linux,code = ; - press-threshold-microvolt = <100000>; - }; - - button-down { - label = "Volume Down"; - linux,code = ; - press-threshold-microvolt = <600000>; - }; - }; - - backlight: backlight { - compatible = "pwm-backlight"; - pwms = <&pwm0 0 50000 0>; - }; - - gpio-keys { - compatible = "gpio-keys"; - pinctrl-names = "default"; - pinctrl-0 = <&pwrbtn_pin>; - - key-power { - debounce-interval = <20>; - gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>; - label = "Power"; - linux,code = ; - wakeup-source; - }; - }; - - vcc_sys: vcc-sys-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc_sys"; - regulator-always-on; - regulator-boot-on; - }; - - vcc3v3_sys: vcc3v3-sys-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc3v3_sys"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <&vcc_sys>; - }; - - vcca1v8_s3: vcc1v8-s3-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcca1v8_s3"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - vin-supply = <&vcc3v3_sys>; - regulator-always-on; - regulator-boot-on; - }; - - vcc1v8_codec: vcc1v8-codec-regulator { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <&gpio3 RK_PA4 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&vcc1v8_codec_en>; - regulator-name = "vcc1v8_codec"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - vin-supply = <&vcc3v3_sys>; - }; - - wifi_pwrseq: sdio-wifi-pwrseq { - compatible = "mmc-pwrseq-simple"; - clocks = <&rk818 1>; - clock-names = "ext_clock"; - pinctrl-names = "default"; - pinctrl-0 = <&wifi_enable_h_pin>; - /* - * Wait between power-on and SDIO access for CYP43455 - * POR circuit. - */ - post-power-on-delay-ms = <110>; - /* - * Wait between consecutive toggles for CYP43455 CBUCK - * regulator discharge. - */ - power-off-delay-us = <10000>; - - /* WL_REG_ON on module */ - reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>; - }; - - /* MIPI DSI panel 1.8v supply */ - vcc1v8_lcd: vcc1v8-lcd { - compatible = "regulator-fixed"; - enable-active-high; - regulator-name = "vcc1v8_lcd"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - vin-supply = <&vcc3v3_sys>; - gpio = <&gpio3 RK_PA5 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - }; - - /* MIPI DSI panel 2.8v supply */ - vcc2v8_lcd: vcc2v8-lcd { - compatible = "regulator-fixed"; - enable-active-high; - regulator-name = "vcc2v8_lcd"; - regulator-min-microvolt = <2800000>; - regulator-max-microvolt = <2800000>; - vin-supply = <&vcc3v3_sys>; - gpio = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - }; -}; - -&cpu_alert0 { - temperature = <65000>; -}; -&cpu_alert1 { - temperature = <68000>; -}; - -&cpu_l0 { - cpu-supply = <&vdd_cpu_l>; -}; - -&cpu_l1 { - cpu-supply = <&vdd_cpu_l>; -}; - -&cpu_l2 { - cpu-supply = <&vdd_cpu_l>; -}; - -&cpu_l3 { - cpu-supply = <&vdd_cpu_l>; -}; - -&cpu_b0 { - cpu-supply = <&vdd_cpu_b>; -}; - -&cpu_b1 { - cpu-supply = <&vdd_cpu_b>; -}; - -&emmc_phy { - status = "okay"; -}; - -&gpu { - mali-supply = <&vdd_gpu>; - status = "okay"; -}; - -&i2c0 { - clock-frequency = <400000>; - i2c-scl-rising-time-ns = <168>; - i2c-scl-falling-time-ns = <4>; - status = "okay"; - - rk818: pmic@1c { - compatible = "rockchip,rk818"; - reg = <0x1c>; - interrupt-parent = <&gpio1>; - interrupts = ; - #clock-cells = <1>; - clock-output-names = "xin32k", "rk808-clkout2"; - pinctrl-names = "default"; - pinctrl-0 = <&pmic_int_l>; - rockchip,system-power-controller; - wakeup-source; - - vcc1-supply = <&vcc_sys>; - vcc2-supply = <&vcc_sys>; - vcc3-supply = <&vcc_sys>; - vcc4-supply = <&vcc_sys>; - vcc6-supply = <&vcc_sys>; - vcc7-supply = <&vcc3v3_sys>; - vcc8-supply = <&vcc_sys>; - vcc9-supply = <&vcc3v3_sys>; - - regulators { - vdd_cpu_l: DCDC_REG1 { - regulator-name = "vdd_cpu_l"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <875000>; - regulator-max-microvolt = <975000>; - regulator-ramp-delay = <6001>; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_center: DCDC_REG2 { - regulator-name = "vdd_center"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <1000000>; - regulator-ramp-delay = <6001>; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_ddr: DCDC_REG3 { - regulator-name = "vcc_ddr"; - regulator-always-on; - regulator-boot-on; - regulator-state-mem { - regulator-on-in-suspend; - }; - }; - - vcc_1v8: DCDC_REG4 { - regulator-name = "vcc_1v8"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-state-mem { - regulator-on-in-suspend; - }; - }; - - vcca3v0_codec: LDO_REG1 { - regulator-name = "vcca3v0_codec"; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - }; - - vcc3v0_touch: LDO_REG2 { - regulator-name = "vcc3v0_touch"; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - }; - - vcca1v8_codec: LDO_REG3 { - regulator-name = "vcca1v8_codec"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - }; - - rk818_pwr_on: LDO_REG4 { - regulator-name = "rk818_pwr_on"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-state-mem { - regulator-on-in-suspend; - }; - }; - - vcc_3v0: LDO_REG5 { - regulator-name = "vcc_3v0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - regulator-state-mem { - regulator-on-in-suspend; - }; - }; - - vcc_1v5: LDO_REG6 { - regulator-name = "vcc_1v5"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1500000>; - regulator-max-microvolt = <1500000>; - regulator-state-mem { - regulator-on-in-suspend; - }; - }; - - vcc1v8_dvp: LDO_REG7 { - regulator-name = "vcc1v8_dvp"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - }; - - vcc3v3_s3: LDO_REG8 { - regulator-name = "vcc3v3_s3"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vccio_sd: LDO_REG9 { - regulator-name = "vccio_sd"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - }; - - vcc3v3_s0: SWITCH_REG { - regulator-name = "vcc3v3_s0"; - regulator-always-on; - regulator-boot-on; - regulator-state-mem { - regulator-on-in-suspend; - }; - }; - }; - }; - - vdd_cpu_b: regulator@40 { - compatible = "silergy,syr827"; - reg = <0x40>; - fcs,suspend-voltage-selector = <1>; - pinctrl-names = "default"; - pinctrl-0 = <&vsel1_pin>; - regulator-name = "vdd_cpu_b"; - regulator-min-microvolt = <875000>; - regulator-max-microvolt = <1150000>; - regulator-ramp-delay = <1000>; - regulator-always-on; - regulator-boot-on; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_gpu: regulator@41 { - compatible = "silergy,syr828"; - reg = <0x41>; - fcs,suspend-voltage-selector = <1>; - pinctrl-names = "default"; - pinctrl-0 = <&vsel2_pin>; - regulator-name = "vdd_gpu"; - regulator-min-microvolt = <875000>; - regulator-max-microvolt = <975000>; - regulator-ramp-delay = <1000>; - regulator-always-on; - regulator-boot-on; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; -}; - -&i2c3 { - i2c-scl-rising-time-ns = <450>; - i2c-scl-falling-time-ns = <15>; - status = "okay"; - - touchscreen@14 { - compatible = "goodix,gt1158"; - reg = <0x14>; - interrupt-parent = <&gpio3>; - interrupts = ; - irq-gpios = <&gpio3 RK_PB5 GPIO_ACTIVE_HIGH>; - reset-gpios = <&gpio3 RK_PB4 GPIO_ACTIVE_HIGH>; - AVDD28-supply = <&vcc3v0_touch>; - VDDIO-supply = <&vcc3v0_touch>; - touchscreen-size-x = <720>; - touchscreen-size-y = <1440>; - }; -}; - -&cluster0_opp { - opp04 { - status = "disabled"; - }; - - opp05 { - status = "disabled"; - }; -}; - -&cluster1_opp { - opp06 { - opp-hz = /bits/ 64 <1500000000>; - opp-microvolt = <1100000 1100000 1150000>; - }; - - opp07 { - status = "disabled"; - }; -}; - -&io_domains { - bt656-supply = <&vcc1v8_dvp>; - audio-supply = <&vcca1v8_codec>; - sdmmc-supply = <&vccio_sd>; - gpio1830-supply = <&vcc_3v0>; - status = "okay"; -}; - -&mipi_dsi { - status = "okay"; - clock-master; - - ports { - mipi_out: port@1 { - #address-cells = <0>; - #size-cells = <0>; - reg = <1>; - - mipi_out_panel: endpoint { - remote-endpoint = <&mipi_in_panel>; - }; - }; - }; - - panel@0 { - compatible = "hannstar,hsd060bhw4"; - reg = <0>; - backlight = <&backlight>; - reset-gpios = <&gpio4 RK_PD1 GPIO_ACTIVE_LOW>; - vcc-supply = <&vcc2v8_lcd>; - iovcc-supply = <&vcc1v8_lcd>; - pinctrl-names = "default"; - - port { - mipi_in_panel: endpoint { - remote-endpoint = <&mipi_out_panel>; - }; - }; - }; -}; - -&pmu_io_domains { - pmu1830-supply = <&vcc_1v8>; - status = "okay"; -}; - -&pinctrl { - buttons { - pwrbtn_pin: pwrbtn-pin { - rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - pmic { - pmic_int_l: pmic-int-l { - rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>; - }; - - vsel1_pin: vsel1-pin { - rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>; - }; - - vsel2_pin: vsel2-pin { - rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>; - }; - }; - - sdio-pwrseq { - wifi_enable_h_pin: wifi-enable-h-pin { - rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - sound { - vcc1v8_codec_en: vcc1v8-codec-en { - rockchip,pins = <3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_down>; - }; - }; - - wireless-bluetooth { - bt_wake_pin: bt-wake-pin { - rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - bt_host_wake_pin: bt-host-wake-pin { - rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - bt_reset_pin: bt-reset-pin { - rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; -}; - -&sdio0 { - bus-width = <4>; - cap-sd-highspeed; - cap-sdio-irq; - disable-wp; - keep-power-in-suspend; - mmc-pwrseq = <&wifi_pwrseq>; - non-removable; - pinctrl-names = "default"; - pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>; - sd-uhs-sdr104; - status = "okay"; -}; - -&pwm0 { - status = "okay"; -}; - -&saradc { - vref-supply = <&vcca1v8_s3>; - status = "okay"; -}; - -&sdmmc { - bus-width = <4>; - cap-sd-highspeed; - cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>; - disable-wp; - max-frequency = <150000000>; - pinctrl-names = "default"; - pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>; - vmmc-supply = <&vcc3v3_sys>; - vqmmc-supply = <&vccio_sd>; - status = "okay"; -}; - -&sdhci { - bus-width = <8>; - mmc-hs200-1_8v; - non-removable; - status = "okay"; -}; - -&tsadc { - rockchip,hw-tshut-mode = <1>; - rockchip,hw-tshut-polarity = <1>; - status = "okay"; -}; - -&uart0 { - pinctrl-names = "default"; - pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>; - uart-has-rtscts; - status = "okay"; - - bluetooth { - compatible = "brcm,bcm4345c5"; - clocks = <&rk818 1>; - clock-names = "lpo"; - device-wakeup-gpios = <&gpio2 RK_PD2 GPIO_ACTIVE_HIGH>; - host-wakeup-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>; - max-speed = <1500000>; - pinctrl-names = "default"; - pinctrl-0 = <&bt_host_wake_pin &bt_wake_pin &bt_reset_pin>; - shutdown-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>; - vbat-supply = <&vcc3v3_sys>; - vddio-supply = <&vcc_1v8>; - }; -}; - -&uart2 { - status = "okay"; -}; - -&vopb { - status = "okay"; - assigned-clocks = <&cru DCLK_VOP0_DIV>, <&cru DCLK_VOP0>, - <&cru ACLK_VOP0>, <&cru HCLK_VOP0>; - assigned-clock-rates = <0>, <0>, <400000000>, <100000000>; - assigned-clock-parents = <&cru PLL_GPLL>, <&cru DCLK_VOP0_DIV>; -}; - -&vopb_mmu { - status = "okay"; -}; - -&vopl { - status = "okay"; - assigned-clocks = <&cru DCLK_VOP1_DIV>, <&cru DCLK_VOP1>, - <&cru ACLK_VOP1>, <&cru HCLK_VOP1>; - assigned-clock-rates = <0>, <0>, <400000000>, <100000000>; - assigned-clock-parents = <&cru PLL_GPLL>, <&cru DCLK_VOP1_DIV>; -}; - -&vopl_mmu { - status = "okay"; -}; diff --git a/arch/arm/dts/rk3399-puma-haikou.dts b/arch/arm/dts/rk3399-puma-haikou.dts deleted file mode 100644 index 18a98c4648e..00000000000 --- a/arch/arm/dts/rk3399-puma-haikou.dts +++ /dev/null @@ -1,306 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (c) 2017 Theobroma Systems Design und Consulting GmbH - */ - -/dts-v1/; -#include "rk3399-puma.dtsi" -#include - -/ { - model = "Theobroma Systems RK3399-Q7 SoM"; - compatible = "tsd,rk3399-puma-haikou", "rockchip,rk3399"; - - aliases { - mmc1 = &sdmmc; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; - - gpio-keys { - compatible = "gpio-keys"; - pinctrl-0 = <&haikou_keys_pin>; - pinctrl-names = "default"; - - button-batlow-n { - gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>; - label = "BATLOW#"; - linux,code = ; - }; - - button-slp-btn-n { - gpios = <&gpio0 RK_PB3 GPIO_ACTIVE_LOW>; - label = "SLP_BTN#"; - linux,code = ; - }; - - button-wake-n { - gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_LOW>; - label = "WAKE#"; - linux,code = ; - wakeup-source; - }; - - switch-lid-btn-n { - gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>; - label = "LID_BTN#"; - linux,code = ; - linux,input-type = ; - }; - }; - - leds { - pinctrl-0 = <&module_led_pin>, <&sd_card_led_pin>; - - sd_card_led: led-1 { - label = "sd_card_led"; - gpios = <&gpio1 RK_PA2 GPIO_ACTIVE_HIGH>; - linux,default-trigger = "mmc0"; - }; - }; - - i2s0-sound { - compatible = "simple-audio-card"; - simple-audio-card,format = "i2s"; - simple-audio-card,name = "Haikou,I2S-codec"; - simple-audio-card,mclk-fs = <512>; - - simple-audio-card,codec { - clocks = <&sgtl5000_clk>; - sound-dai = <&sgtl5000>; - }; - - simple-audio-card,cpu { - bitclock-master; - frame-master; - sound-dai = <&i2s0>; - }; - }; - - sgtl5000_clk: sgtl5000-oscillator { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <24576000>; - }; - - dc_12v: dc-12v { - compatible = "regulator-fixed"; - regulator-name = "dc_12v"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <12000000>; - regulator-max-microvolt = <12000000>; - }; - - vcc3v3_baseboard: vcc3v3-baseboard { - compatible = "regulator-fixed"; - regulator-name = "vcc3v3_baseboard"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <&dc_12v>; - }; - - vcc5v0_baseboard: vcc5v0-baseboard { - compatible = "regulator-fixed"; - regulator-name = "vcc5v0_baseboard"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - vin-supply = <&dc_12v>; - }; - - vcc5v0_otg: vcc5v0-otg-regulator { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&otg_vbus_drv>; - regulator-name = "vcc5v0_otg"; - regulator-always-on; - }; - - vdda_codec: vdda-codec { - compatible = "regulator-fixed"; - regulator-name = "vdda_codec"; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <&vcc5v0_baseboard>; - }; - - vddd_codec: vddd-codec { - compatible = "regulator-fixed"; - regulator-name = "vddd_codec"; - regulator-boot-on; - regulator-min-microvolt = <1600000>; - regulator-max-microvolt = <1600000>; - vin-supply = <&vcc5v0_baseboard>; - }; -}; - -&hdmi { - ddc-i2c-bus = <&i2c3>; - status = "okay"; -}; - -&i2c1 { - status = "okay"; - clock-frequency = <400000>; -}; - -&i2c2 { - status = "okay"; - clock-frequency = <400000>; -}; - -&i2c3 { - i2c-scl-rising-time-ns = <450>; - i2c-scl-falling-time-ns = <15>; - status = "okay"; -}; - -&i2c4 { - status = "okay"; - clock-frequency = <400000>; - - sgtl5000: codec@a { - compatible = "fsl,sgtl5000"; - reg = <0x0a>; - clocks = <&sgtl5000_clk>; - #sound-dai-cells = <0>; - VDDA-supply = <&vdda_codec>; - VDDIO-supply = <&vdda_codec>; - VDDD-supply = <&vddd_codec>; - status = "okay"; - }; -}; - -&i2c6 { - status = "okay"; - clock-frequency = <400000>; -}; - -&pcie_phy { - status = "okay"; -}; - -&pcie0 { - ep-gpios = <&gpio4 RK_PC6 GPIO_ACTIVE_HIGH>; - num-lanes = <4>; - pinctrl-names = "default"; - pinctrl-0 = <&pcie_clkreqn_cpm>; - status = "okay"; -}; - -&pinctrl { - buttons { - haikou_keys_pin: haikou-keys-pin { - rockchip,pins = - /* LID_BTN */ - <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>, - /* BATLOW# */ - <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>, - /* SLP_BTN# */ - <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_up>, - /* WAKE# */ - <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - leds { - sd_card_led_pin: sd-card-led-pin { - rockchip,pins = - <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - usb2 { - otg_vbus_drv: otg-vbus-drv { - rockchip,pins = - <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; -}; - -&pwm0 { - status = "okay"; -}; - -&sdmmc { - bus-width = <4>; - cap-mmc-highspeed; - cap-sd-highspeed; - cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>; - disable-wp; - max-frequency = <40000000>; - pinctrl-names = "default"; - pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>; - vmmc-supply = <&vcc3v3_baseboard>; - status = "okay"; -}; - -&spi5 { - status = "okay"; -}; - -&tcphy0 { - status = "okay"; -}; - -&u2phy0 { - status = "okay"; -}; - -&usbdrd3_0 { - status = "okay"; -}; - -&usbdrd_dwc3_0 { - dr_mode = "otg"; - extcon = <&extcon_usb3>; - status = "okay"; -}; - -&u2phy0_host { - phy-supply = <&vcc5v0_otg>; - status = "okay"; -}; - -&uart0 { - pinctrl-names = "default"; - pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>; - status = "okay"; -}; - -&uart2 { - status = "okay"; -}; - -&usb_host0_ehci { - status = "okay"; -}; - -&usb_host0_ohci { - status = "okay"; -}; - -&vopb { - status = "okay"; -}; - -&vopb_mmu { - status = "okay"; -}; - -&vopl { - status = "okay"; -}; - -&vopl_mmu { - status = "okay"; -}; diff --git a/arch/arm/dts/rk3399-puma.dtsi b/arch/arm/dts/rk3399-puma.dtsi deleted file mode 100644 index c08e69391c0..00000000000 --- a/arch/arm/dts/rk3399-puma.dtsi +++ /dev/null @@ -1,532 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (c) 2017 Theobroma Systems Design und Consulting GmbH - */ - -#include -#include "rk3399.dtsi" -#include "rk3399-opp.dtsi" - -/ { - aliases { - ethernet0 = &gmac; - mmc0 = &sdhci; - }; - - leds { - compatible = "gpio-leds"; - pinctrl-names = "default"; - pinctrl-0 = <&module_led_pin>; - - module_led: led-0 { - label = "module_led"; - gpios = <&gpio2 RK_PD1 GPIO_ACTIVE_HIGH>; - linux,default-trigger = "heartbeat"; - panic-indicator; - }; - }; - - extcon_usb3: extcon-usb3 { - compatible = "linux,extcon-usb-gpio"; - id-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&usb3_id>; - }; - - clkin_gmac: external-gmac-clock { - compatible = "fixed-clock"; - clock-frequency = <125000000>; - clock-output-names = "clkin_gmac"; - #clock-cells = <0>; - }; - - vcc1v2_phy: vcc1v2-phy { - compatible = "regulator-fixed"; - regulator-name = "vcc1v2_phy"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1200000>; - vin-supply = <&vcc5v0_sys>; - }; - - vcc3v3_sys: vcc3v3-sys { - compatible = "regulator-fixed"; - regulator-name = "vcc3v3_sys"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <&vcc5v0_sys>; - }; - - vcc5v0_host: vcc5v0-host-regulator { - compatible = "regulator-fixed"; - gpio = <&gpio4 RK_PA3 GPIO_ACTIVE_LOW>; - pinctrl-names = "default"; - pinctrl-0 = <&vcc5v0_host_en>; - regulator-name = "vcc5v0_host"; - regulator-always-on; - vin-supply = <&vcc5v0_sys>; - }; - - vcc5v0_sys: vcc5v0-sys { - compatible = "regulator-fixed"; - regulator-name = "vcc5v0_sys"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - }; - - vdd_log: vdd-log { - compatible = "pwm-regulator"; - pwms = <&pwm2 0 25000 1>; - pwm-supply = <&vcc5v0_sys>; - regulator-name = "vdd_log"; - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <1400000>; - regulator-always-on; - regulator-boot-on; - }; -}; - -&cpu_b0 { - cpu-supply = <&vdd_cpu_b>; -}; - -&cpu_b1 { - cpu-supply = <&vdd_cpu_b>; -}; - -&cpu_l0 { - cpu-supply = <&vdd_cpu_l>; -}; - -&cpu_l1 { - cpu-supply = <&vdd_cpu_l>; -}; - -&cpu_l2 { - cpu-supply = <&vdd_cpu_l>; -}; - -&cpu_l3 { - cpu-supply = <&vdd_cpu_l>; -}; - -&emmc_phy { - status = "okay"; - drive-impedance-ohm = <33>; -}; - -&gpio0 { - /* - * The BIOS_DISABLE hog is a feedback pin for the actual status of the - * signal. This usually represents the state of a switch on the baseboard. - * The pin has a 10k pull-up resistor connected, so no pull-up setting is needed. - */ - bios-disable-hog { - gpios = ; - gpio-hog; - input; - line-name = "bios_disable"; - }; -}; - -&gmac { - assigned-clocks = <&cru SCLK_RMII_SRC>; - assigned-clock-parents = <&clkin_gmac>; - clock_in_out = "input"; - phy-supply = <&vcc1v2_phy>; - phy-mode = "rgmii"; - pinctrl-names = "default"; - pinctrl-0 = <&rgmii_pins>; - snps,reset-gpio = <&gpio3 RK_PC0 GPIO_ACTIVE_LOW>; - snps,reset-active-low; - snps,reset-delays-us = <0 10000 50000>; - tx_delay = <0x10>; - rx_delay = <0x10>; - status = "okay"; -}; - -&gpu { - mali-supply = <&vdd_gpu>; - status = "okay"; -}; - -&i2c0 { - status = "okay"; - i2c-scl-rising-time-ns = <168>; - i2c-scl-falling-time-ns = <4>; - clock-frequency = <400000>; - - rk808: pmic@1b { - compatible = "rockchip,rk808"; - reg = <0x1b>; - interrupt-parent = <&gpio1>; - interrupts = <22 IRQ_TYPE_LEVEL_LOW>; - #clock-cells = <1>; - clock-output-names = "xin32k", "rk808-clkout2"; - pinctrl-names = "default"; - pinctrl-0 = <&pmic_int_l>; - rockchip,system-power-controller; - wakeup-source; - - vcc1-supply = <&vcc5v0_sys>; - vcc2-supply = <&vcc5v0_sys>; - vcc3-supply = <&vcc5v0_sys>; - vcc4-supply = <&vcc5v0_sys>; - vcc6-supply = <&vcc5v0_sys>; - vcc7-supply = <&vcc5v0_sys>; - vcc8-supply = <&vcc3v3_sys>; - vcc9-supply = <&vcc5v0_sys>; - vcc10-supply = <&vcc5v0_sys>; - vcc11-supply = <&vcc5v0_sys>; - vcc12-supply = <&vcc3v3_sys>; - vddio-supply = <&vcc1v8_pmu>; - - regulators { - vdd_center: DCDC_REG1 { - regulator-name = "vdd_center"; - regulator-min-microvolt = <750000>; - regulator-max-microvolt = <1350000>; - regulator-ramp-delay = <6001>; - regulator-always-on; - regulator-boot-on; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_cpu_l: DCDC_REG2 { - regulator-name = "vdd_cpu_l"; - regulator-min-microvolt = <750000>; - regulator-max-microvolt = <1350000>; - regulator-ramp-delay = <6001>; - regulator-always-on; - regulator-boot-on; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_ddr: DCDC_REG3 { - regulator-name = "vcc_ddr"; - regulator-always-on; - regulator-boot-on; - regulator-state-mem { - regulator-on-in-suspend; - }; - }; - - vcc_1v8: DCDC_REG4 { - regulator-name = "vcc_1v8"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - regulator-boot-on; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vcc_ldo1: LDO_REG1 { - regulator-name = "vcc_ldo1"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-boot-on; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc1v8_hdmi: LDO_REG2 { - regulator-name = "vcc1v8_hdmi"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - regulator-boot-on; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc1v8_pmu: LDO_REG3 { - regulator-name = "vcc1v8_pmu"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - regulator-boot-on; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vcc_sd: LDO_REG4 { - regulator-name = "vcc_sd"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3000000>; - regulator-always-on; - regulator-boot-on; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <3000000>; - }; - }; - - vcc_ldo5: LDO_REG5 { - regulator-name = "vcc_ldo5"; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - regulator-boot-on; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_ldo6: LDO_REG6 { - regulator-name = "vcc_ldo6"; - regulator-min-microvolt = <1500000>; - regulator-max-microvolt = <1500000>; - regulator-boot-on; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc0v9_hdmi: LDO_REG7 { - regulator-name = "vcc0v9_hdmi"; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <900000>; - regulator-always-on; - regulator-boot-on; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_efuse: LDO_REG8 { - regulator-name = "vcc_efuse"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - regulator-boot-on; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc3v3_s3: SWITCH_REG1 { - regulator-name = "vcc3v3_s3"; - regulator-always-on; - regulator-boot-on; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc3v3_s0: SWITCH_REG2 { - regulator-name = "vcc3v3_s0"; - regulator-always-on; - regulator-boot-on; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - }; - }; - - vdd_gpu: regulator@60 { - compatible = "fcs,fan53555"; - reg = <0x60>; - fcs,suspend-voltage-selector = <1>; - regulator-name = "vdd_gpu"; - regulator-min-microvolt = <600000>; - regulator-max-microvolt = <1230000>; - regulator-ramp-delay = <1000>; - regulator-always-on; - regulator-boot-on; - vin-supply = <&vcc5v0_sys>; - }; -}; - -&i2c7 { - status = "okay"; - clock-frequency = <400000>; - - fan: fan@18 { - compatible = "ti,amc6821"; - reg = <0x18>; - #cooling-cells = <2>; - }; - - rtc_twi: rtc@6f { - compatible = "isil,isl1208"; - reg = <0x6f>; - }; -}; - -&i2c8 { - status = "okay"; - clock-frequency = <400000>; - - vdd_cpu_b: regulator@60 { - compatible = "fcs,fan53555"; - reg = <0x60>; - vin-supply = <&vcc5v0_sys>; - regulator-name = "vdd_cpu_b"; - regulator-min-microvolt = <600000>; - regulator-max-microvolt = <1230000>; - regulator-ramp-delay = <1000>; - fcs,suspend-voltage-selector = <1>; - regulator-always-on; - regulator-boot-on; - }; -}; - -&i2s0 { - pinctrl-0 = <&i2s0_2ch_bus>; - rockchip,playback-channels = <2>; - rockchip,capture-channels = <2>; - status = "okay"; -}; - -/* - * As Q7 does not specify neither a global nor a RX clock for I2S these - * signals are not used. Furthermore I2S0_LRCK_RX is used as GPIO. - * Therefore we have to redefine the i2s0_2ch_bus definition to prevent - * conflicts. - */ -&i2s0_2ch_bus { - rockchip,pins = - <3 RK_PD0 1 &pcfg_pull_none>, - <3 RK_PD2 1 &pcfg_pull_none>, - <3 RK_PD3 1 &pcfg_pull_none>, - <3 RK_PD7 1 &pcfg_pull_none>; -}; - -&io_domains { - status = "okay"; - bt656-supply = <&vcc_1v8>; - audio-supply = <&vcc_1v8>; - sdmmc-supply = <&vcc_sd>; - gpio1830-supply = <&vcc_1v8>; -}; - -&pmu_io_domains { - status = "okay"; - pmu1830-supply = <&vcc_1v8>; -}; - -&pwm2 { - status = "okay"; -}; - -&pinctrl { - i2c8 { - i2c8_xfer_a: i2c8-xfer { - rockchip,pins = - <1 RK_PC4 1 &pcfg_pull_up>, - <1 RK_PC5 1 &pcfg_pull_up>; - }; - }; - - leds { - module_led_pin: module-led-pin { - rockchip,pins = - <2 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - pmic { - pmic_int_l: pmic-int-l { - rockchip,pins = - <1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - usb2 { - vcc5v0_host_en: vcc5v0-host-en { - rockchip,pins = - <4 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - usb3 { - usb3_id: usb3-id { - rockchip,pins = - <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; -}; - -&sdhci { - /* - * Signal integrity isn't great at 200MHz but 100MHz has proven stable - * enough. - */ - max-frequency = <100000000>; - - bus-width = <8>; - mmc-hs400-1_8v; - mmc-hs400-enhanced-strobe; - non-removable; - status = "okay"; -}; - -&sdmmc { - vqmmc-supply = <&vcc_sd>; -}; - -&spi1 { - status = "okay"; - - norflash: flash@0 { - compatible = "jedec,spi-nor"; - reg = <0>; - spi-max-frequency = <50000000>; - }; -}; - -&tcphy1 { - status = "okay"; -}; - -&tsadc { - rockchip,hw-tshut-mode = <1>; - rockchip,hw-tshut-polarity = <1>; - status = "okay"; -}; - -&u2phy1 { - status = "okay"; - - u2phy1_otg: otg-port { - status = "okay"; - }; - - u2phy1_host: host-port { - phy-supply = <&vcc5v0_host>; - status = "okay"; - }; -}; - -&usbdrd3_1 { - status = "okay"; -}; - -&usbdrd_dwc3_1 { - status = "okay"; - dr_mode = "host"; -}; - -&usb_host1_ehci { - status = "okay"; -}; - -&usb_host1_ohci { - status = "okay"; -}; diff --git a/arch/arm/dts/rk3399-roc-pc-mezzanine.dts b/arch/arm/dts/rk3399-roc-pc-mezzanine.dts deleted file mode 100644 index 9447c8724b6..00000000000 --- a/arch/arm/dts/rk3399-roc-pc-mezzanine.dts +++ /dev/null @@ -1,111 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (c) 2017 T-Chip Intelligent Technology Co., Ltd - * Copyright (c) 2019 Markus Reichl - */ - -/dts-v1/; -#include "rk3399-roc-pc.dtsi" - -/ { - model = "Firefly ROC-RK3399-PC Mezzanine Board"; - compatible = "firefly,roc-rk3399-pc-mezzanine", "rockchip,rk3399"; - - aliases { - mmc2 = &sdio0; - }; - - /* MP8009 PoE PD */ - poe_12v: poe-12v { - compatible = "regulator-fixed"; - regulator-name = "poe_12v"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <12000000>; - regulator-max-microvolt = <12000000>; - }; - - vcc3v3_ngff: vcc3v3-ngff { - compatible = "regulator-fixed"; - regulator-name = "vcc3v3_ngff"; - enable-active-high; - gpio = <&gpio4 RK_PD3 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&vcc3v3_ngff_en>; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <&sys_12v>; - }; - - vcc3v3_pcie: vcc3v3-pcie { - compatible = "regulator-fixed"; - regulator-name = "vcc3v3_pcie"; - enable-active-high; - gpio = <&gpio1 RK_PC1 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&vcc3v3_pcie_en>; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <&sys_12v>; - }; -}; - -&sys_12v { - vin-supply = <&poe_12v>; -}; - -&pcie_phy { - status = "okay"; -}; - -&pcie0 { - ep-gpios = <&gpio4 RK_PD1 GPIO_ACTIVE_HIGH>; - num-lanes = <4>; - pinctrl-names = "default"; - pinctrl-0 = <&pcie_perst>; - vpcie3v3-supply = <&vcc3v3_pcie>; - vpcie1v8-supply = <&vcc1v8_pmu>; - vpcie0v9-supply = <&vcca_0v9>; - status = "okay"; -}; - -&pinctrl { - ngff { - vcc3v3_ngff_en: vcc3v3-ngff-en { - rockchip,pins = <4 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - pcie { - vcc3v3_pcie_en: vcc3v3-pcie-en { - rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - pcie_perst: pcie-perst { - rockchip,pins = <4 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; -}; - -&sdio0 { - bus-width = <4>; - cap-sd-highspeed; - cap-sdio-irq; - keep-power-in-suspend; - mmc-pwrseq = <&sdio_pwrseq>; - non-removable; - pinctrl-names = "default"; - pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>; - sd-uhs-sdr104; - vmmc-supply = <&vcc3v3_ngff>; - vqmmc-supply = <&vcc_1v8>; - status = "okay"; -}; - -&uart0 { - pinctrl-names = "default"; - pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>; - status = "okay"; -}; diff --git a/arch/arm/dts/rk3399-roc-pc.dts b/arch/arm/dts/rk3399-roc-pc.dts deleted file mode 100644 index cd419542530..00000000000 --- a/arch/arm/dts/rk3399-roc-pc.dts +++ /dev/null @@ -1,12 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (c) 2017 T-Chip Intelligent Technology Co., Ltd - */ - -/dts-v1/; -#include "rk3399-roc-pc.dtsi" - -/ { - model = "Firefly ROC-RK3399-PC Board"; - compatible = "firefly,roc-rk3399-pc", "rockchip,rk3399"; -}; diff --git a/arch/arm/dts/rk3399-roc-pc.dtsi b/arch/arm/dts/rk3399-roc-pc.dtsi deleted file mode 100644 index ca7a446b656..00000000000 --- a/arch/arm/dts/rk3399-roc-pc.dtsi +++ /dev/null @@ -1,844 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (c) 2017 T-Chip Intelligent Technology Co., Ltd - */ - -/dts-v1/; -#include -#include -#include "rk3399.dtsi" -#include "rk3399-opp.dtsi" - -/ { - model = "Firefly ROC-RK3399-PC Board"; - compatible = "firefly,roc-rk3399-pc", "rockchip,rk3399"; - - aliases { - ethernet0 = &gmac; - mmc0 = &sdmmc; - mmc1 = &sdhci; - }; - - chosen { - stdout-path = "serial2:1500000n8"; - }; - - backlight: backlight { - compatible = "pwm-backlight"; - pwms = <&pwm0 0 25000 0>; - }; - - clkin_gmac: external-gmac-clock { - compatible = "fixed-clock"; - clock-frequency = <125000000>; - clock-output-names = "clkin_gmac"; - #clock-cells = <0>; - }; - - adc-keys { - compatible = "adc-keys"; - io-channels = <&saradc 1>; - io-channel-names = "buttons"; - keyup-threshold-microvolt = <1500000>; - poll-interval = <100>; - - button-recovery { - label = "Recovery"; - linux,code = ; - press-threshold-microvolt = <18000>; - }; - }; - - gpio-keys { - compatible = "gpio-keys"; - autorepeat; - pinctrl-names = "default"; - pinctrl-0 = <&pwr_key_l>; - - key-power { - debounce-interval = <100>; - gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>; - label = "GPIO Key Power"; - linux,code = ; - wakeup-source; - }; - }; - - ir-receiver { - compatible = "gpio-ir-receiver"; - gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_LOW>; - pinctrl-names = "default"; - pinctrl-0 = <&ir_int>; - }; - - leds { - compatible = "gpio-leds"; - pinctrl-names = "default"; - pinctrl-0 = <&work_led_pin>, <&diy_led_pin>, <&yellow_led_pin>; - - work_led: led-0 { - label = "green:work"; - gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_HIGH>; - default-state = "on"; - linux,default-trigger = "heartbeat"; - }; - - diy_led: led-1 { - label = "red:diy"; - gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>; - default-state = "off"; - linux,default-trigger = "mmc2"; - }; - - yellow_led: led-2 { - label = "yellow:yellow-led"; - gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>; - default-state = "off"; - linux,default-trigger = "mmc1"; - }; - }; - - sdio_pwrseq: sdio-pwrseq { - compatible = "mmc-pwrseq-simple"; - clocks = <&rk808 1>; - clock-names = "ext_clock"; - pinctrl-names = "default"; - pinctrl-0 = <&wifi_enable_h>; - - /* - * On the module itself this is one of these (depending - * on the actual card populated): - * - SDIO_RESET_L_WL_REG_ON - * - PDN (power down when low) - */ - reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>; - }; - - vcc_vbus_typec0: vcc-vbus-typec0 { - compatible = "regulator-fixed"; - regulator-name = "vcc_vbus_typec0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - }; - - sys_12v: sys-12v { - compatible = "regulator-fixed"; - regulator-name = "sys_12v"; - regulator-always-on; - regulator-boot-on; - vin-supply = <&dc_12v>; - }; - - /* switched by pmic_sleep */ - vcc1v8_s3: vcca1v8_s3: vcc1v8-s3 { - compatible = "regulator-fixed"; - regulator-name = "vcc1v8_s3"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - vin-supply = <&vcc_1v8>; - }; - - vcc3v0_sd: vcc3v0-sd { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <&gpio4 RK_PD6 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&vcc3v0_sd_en>; - regulator-name = "vcc3v0_sd"; - regulator-boot-on; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - vin-supply = <&vcc3v3_sys>; - }; - - vcc3v3_sys: vcc3v3-sys { - compatible = "regulator-fixed"; - regulator-name = "vcc3v3_sys"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <&sys_12v>; - }; - - vcca_0v9: vcca-0v9 { - compatible = "regulator-fixed"; - regulator-name = "vcca_0v9"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <900000>; - vin-supply = <&vcc3v3_sys>; - }; - - /* Actually 3 regulators (host0, 1, 2) controlled by the same gpio */ - vcc5v0_host: vcc5v0-host-regulator { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <&gpio1 RK_PA0 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&vcc5v0_host_en &hub_rst>; - regulator-name = "vcc5v0_host"; - vin-supply = <&vcc_sys>; - }; - - vcc_vbus_typec1: vcc-vbus-typec1 { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <&gpio1 RK_PB5 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&vcc_vbus_typec1_en>; - regulator-name = "vcc_vbus_typec1"; - regulator-always-on; - vin-supply = <&vcc_sys>; - }; - - vcc_sys: vcc-sys { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <&gpio2 RK_PA6 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&vcc_sys_en>; - regulator-name = "vcc_sys"; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - vin-supply = <&sys_12v>; - }; - - vdd_log: vdd-log { - compatible = "pwm-regulator"; - pwms = <&pwm2 0 25000 1>; - regulator-name = "vdd_log"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <450000>; - regulator-max-microvolt = <1400000>; - pwm-supply = <&vcc3v3_sys>; - }; -}; - -&cpu_l0 { - cpu-supply = <&vdd_cpu_l>; -}; - -&cpu_l1 { - cpu-supply = <&vdd_cpu_l>; -}; - -&cpu_l2 { - cpu-supply = <&vdd_cpu_l>; -}; - -&cpu_l3 { - cpu-supply = <&vdd_cpu_l>; -}; - -&cpu_b0 { - cpu-supply = <&vdd_cpu_b>; -}; - -&cpu_b1 { - cpu-supply = <&vdd_cpu_b>; -}; - -&emmc_phy { - status = "okay"; -}; - -&gmac { - assigned-clocks = <&cru SCLK_RMII_SRC>; - assigned-clock-parents = <&clkin_gmac>; - clock_in_out = "input"; - phy-supply = <&vcc_lan>; - phy-mode = "rgmii"; - pinctrl-names = "default"; - pinctrl-0 = <&rgmii_pins>; - snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; - snps,reset-active-low; - snps,reset-delays-us = <0 10000 50000>; - tx_delay = <0x28>; - rx_delay = <0x11>; - status = "okay"; -}; - -&gpu { - mali-supply = <&vdd_gpu>; - status = "okay"; -}; - -&hdmi { - avdd-0v9-supply = <&vcca0v9_hdmi>; - avdd-1v8-supply = <&vcca1v8_hdmi>; - ddc-i2c-bus = <&i2c3>; - pinctrl-names = "default"; - pinctrl-0 = <&hdmi_cec>; - status = "okay"; -}; - -&hdmi_sound { - status = "okay"; -}; - -&i2c0 { - clock-frequency = <400000>; - i2c-scl-rising-time-ns = <168>; - i2c-scl-falling-time-ns = <4>; - status = "okay"; - - rk808: pmic@1b { - compatible = "rockchip,rk808"; - reg = <0x1b>; - interrupt-parent = <&gpio1>; - interrupts = <21 IRQ_TYPE_LEVEL_LOW>; - #clock-cells = <1>; - clock-output-names = "xin32k", "rk808-clkout2"; - pinctrl-names = "default"; - pinctrl-0 = <&pmic_int_l>; - rockchip,system-power-controller; - wakeup-source; - - vcc1-supply = <&vcc3v3_sys>; - vcc2-supply = <&vcc3v3_sys>; - vcc3-supply = <&vcc3v3_sys>; - vcc4-supply = <&vcc3v3_sys>; - vcc6-supply = <&vcc3v3_sys>; - vcc7-supply = <&vcc3v3_sys>; - vcc8-supply = <&vcc3v3_sys>; - vcc9-supply = <&vcc3v3_sys>; - vcc10-supply = <&vcc3v3_sys>; - vcc11-supply = <&vcc3v3_sys>; - vcc12-supply = <&vcc3v3_sys>; - vddio-supply = <&vcc_3v0>; - - regulators { - vdd_center: DCDC_REG1 { - regulator-name = "vdd_center"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <750000>; - regulator-max-microvolt = <1350000>; - regulator-ramp-delay = <6001>; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_cpu_l: DCDC_REG2 { - regulator-name = "vdd_cpu_l"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <750000>; - regulator-max-microvolt = <1350000>; - regulator-ramp-delay = <6001>; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_ddr: DCDC_REG3 { - regulator-name = "vcc_ddr"; - regulator-always-on; - regulator-boot-on; - regulator-state-mem { - regulator-on-in-suspend; - }; - }; - - vcc_1v8: DCDC_REG4 { - regulator-name = "vcc_1v8"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vcca1v8_codec: LDO_REG1 { - regulator-name = "vcca1v8_codec"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcca1v8_hdmi: LDO_REG2 { - regulator-name = "vcca1v8_hdmi"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc1v8_pmu: LDO_REG3 { - regulator-name = "vcc1v8_pmu"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vcc_sdio: LDO_REG4 { - regulator-name = "vcc_sdio"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3000000>; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <3000000>; - }; - }; - - vcca3v0_codec: LDO_REG5 { - regulator-name = "vcca3v0_codec"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_1v5: LDO_REG6 { - regulator-name = "vcc_1v5"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1500000>; - regulator-max-microvolt = <1500000>; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1500000>; - }; - }; - - vcca0v9_hdmi: LDO_REG7 { - regulator-name = "vcca0v9_hdmi"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <900000>; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_3v0: LDO_REG8 { - regulator-name = "vcc_3v0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <3000000>; - }; - }; - - vcc3v3_s3: vcc_lan: SWITCH_REG1 { - regulator-name = "vcc3v3_s3"; - regulator-always-on; - regulator-boot-on; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc3v3_s0: SWITCH_REG2 { - regulator-name = "vcc3v3_s0"; - regulator-always-on; - regulator-boot-on; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - }; - }; - - vdd_cpu_b: regulator@40 { - compatible = "silergy,syr827"; - reg = <0x40>; - fcs,suspend-voltage-selector = <1>; - pinctrl-names = "default"; - pinctrl-0 = <&vsel1_pin>; - regulator-name = "vdd_cpu_b"; - regulator-min-microvolt = <712500>; - regulator-max-microvolt = <1500000>; - regulator-ramp-delay = <1000>; - regulator-always-on; - regulator-boot-on; - vin-supply = <&vcc3v3_sys>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_gpu: regulator@41 { - compatible = "silergy,syr828"; - reg = <0x41>; - fcs,suspend-voltage-selector = <1>; - pinctrl-names = "default"; - pinctrl-0 = <&vsel2_pin>; - regulator-name = "vdd_gpu"; - regulator-min-microvolt = <712500>; - regulator-max-microvolt = <1500000>; - regulator-ramp-delay = <1000>; - regulator-always-on; - regulator-boot-on; - vin-supply = <&vcc3v3_sys>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; -}; - -&i2c1 { - i2c-scl-rising-time-ns = <300>; - i2c-scl-falling-time-ns = <15>; - status = "okay"; -}; - -&i2c3 { - i2c-scl-rising-time-ns = <450>; - i2c-scl-falling-time-ns = <15>; - status = "okay"; -}; - -&i2c4 { - i2c-scl-rising-time-ns = <600>; - i2c-scl-falling-time-ns = <20>; - status = "okay"; - - fusb1: usb-typec@22 { - compatible = "fcs,fusb302"; - reg = <0x22>; - interrupt-parent = <&gpio1>; - interrupts = <1 IRQ_TYPE_LEVEL_LOW>; - pinctrl-names = "default"; - pinctrl-0 = <&fusb1_int>; - vbus-supply = <&vcc_vbus_typec1>; - status = "okay"; - }; -}; - -&i2c7 { - i2c-scl-rising-time-ns = <600>; - i2c-scl-falling-time-ns = <20>; - status = "okay"; - - fusb0: usb-typec@22 { - compatible = "fcs,fusb302"; - reg = <0x22>; - interrupt-parent = <&gpio1>; - interrupts = <2 IRQ_TYPE_LEVEL_LOW>; - pinctrl-names = "default"; - pinctrl-0 = <&fusb0_int>; - vbus-supply = <&vcc_vbus_typec0>; - status = "okay"; - }; - - mp8859: regulator@66 { - compatible = "mps,mp8859"; - reg = <0x66>; - dc_12v: mp8859_dcdc { - regulator-name = "dc_12v"; - regulator-min-microvolt = <12000000>; - regulator-max-microvolt = <12000000>; - regulator-always-on; - regulator-boot-on; - vin-supply = <&vcc_vbus_typec0>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <12000000>; - }; - }; - }; -}; - -&i2s0 { - rockchip,playback-channels = <8>; - rockchip,capture-channels = <8>; - status = "okay"; -}; - -&i2s1 { - rockchip,playback-channels = <2>; - rockchip,capture-channels = <2>; - status = "okay"; -}; - -&i2s2 { - status = "okay"; -}; - -&io_domains { - audio-supply = <&vcca1v8_codec>; - bt656-supply = <&vcc_3v0>; - gpio1830-supply = <&vcc_3v0>; - sdmmc-supply = <&vcc_sdio>; - status = "okay"; -}; - -&pmu_io_domains { - pmu1830-supply = <&vcc_3v0>; - status = "okay"; -}; - -&pinctrl { - buttons { - pwr_key_l: pwr-key-l { - rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - ir { - ir_int: ir-int { - rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - lcd-panel { - lcd_panel_reset: lcd-panel-reset { - rockchip,pins = <4 RK_PD5 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - leds { - diy_led_pin: diy-led-pin { - rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - work_led_pin: work-led-pin { - rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - yellow_led_pin: yellow-led-pin { - rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - pmic { - vsel1_pin: vsel1-pin { - rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>; - }; - - vsel2_pin: vsel2-pin { - rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>; - }; - }; - - sdio-pwrseq { - wifi_enable_h: wifi-enable-h { - rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - sdmmc { - vcc3v0_sd_en: vcc3v0-sd-en { - rockchip,pins = <4 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - pmic { - pmic_int_l: pmic-int-l { - rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - usb2 { - vcc5v0_host_en: vcc5v0-host-en { - rockchip,pins = <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - vcc_sys_en: vcc-sys-en { - rockchip,pins = <2 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - hub_rst: hub-rst { - rockchip,pins = <2 RK_PA4 RK_FUNC_GPIO &pcfg_output_high>; - }; - }; - - usb-typec { - vcc_vbus_typec1_en: vcc-vbus-typec1-en { - rockchip,pins = <1 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - fusb30x { - fusb0_int: fusb0-int { - rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>; - }; - - fusb1_int: fusb1-int { - rockchip,pins = <1 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; -}; - -&pwm0 { - status = "okay"; -}; - -&pwm2 { - status = "okay"; -}; - -&saradc { - vref-supply = <&vcca1v8_s3>; - status = "okay"; -}; - -&sdmmc { - bus-width = <4>; - cap-sd-highspeed; - cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>; - disable-wp; - max-frequency = <150000000>; - pinctrl-names = "default"; - pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>; - sd-uhs-sdr104; - vmmc-supply = <&vcc3v0_sd>; - vqmmc-supply = <&vcc_sdio>; - status = "okay"; -}; - -&sdhci { - bus-width = <8>; - non-removable; - status = "okay"; -}; - -&spi1 { - status = "okay"; - - flash@0 { - compatible = "jedec,spi-nor"; - reg = <0>; - spi-max-frequency = <30000000>; - }; -}; - -&tcphy0 { - status = "okay"; -}; - -&tcphy1 { - status = "okay"; -}; - -&tsadc { - /* tshut mode 0:CRU 1:GPIO */ - rockchip,hw-tshut-mode = <1>; - /* tshut polarity 0:LOW 1:HIGH */ - rockchip,hw-tshut-polarity = <1>; - status = "okay"; -}; - -&u2phy0 { - status = "okay"; - - u2phy0_otg: otg-port { - phy-supply = <&vcc_vbus_typec0>; - status = "okay"; - }; - - u2phy0_host: host-port { - phy-supply = <&vcc5v0_host>; - status = "okay"; - }; -}; - -&u2phy1 { - status = "okay"; - - u2phy1_otg: otg-port { - phy-supply = <&vcc_vbus_typec1>; - status = "okay"; - }; - - u2phy1_host: host-port { - phy-supply = <&vcc5v0_host>; - status = "okay"; - }; -}; - -&uart0 { - pinctrl-names = "default"; - pinctrl-0 = <&uart0_xfer &uart0_cts>; - status = "okay"; -}; - -&uart2 { - status = "okay"; -}; - -&usb_host0_ehci { - status = "okay"; -}; - -&usb_host0_ohci { - status = "okay"; -}; - -&usb_host1_ehci { - status = "okay"; -}; - -&usb_host1_ohci { - status = "okay"; -}; - -&usbdrd3_0 { - status = "okay"; -}; - -&usbdrd_dwc3_0 { - status = "okay"; -}; - -&usbdrd3_1 { - status = "okay"; -}; - -&usbdrd_dwc3_1 { - status = "okay"; - dr_mode = "host"; -}; - -&vopb { - status = "okay"; -}; - -&vopb_mmu { - status = "okay"; -}; - -&vopl { - status = "okay"; -}; - -&vopl_mmu { - status = "okay"; -}; diff --git a/arch/arm/dts/rk3399-rock-4c-plus.dts b/arch/arm/dts/rk3399-rock-4c-plus.dts deleted file mode 100644 index 7baf9d1b22f..00000000000 --- a/arch/arm/dts/rk3399-rock-4c-plus.dts +++ /dev/null @@ -1,709 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd - * Copyright (c) 2019 Radxa Limited - * Copyright (c) 2022 Amarula Solutions(India) - */ - -/dts-v1/; -#include -#include "rk3399.dtsi" -#include "rk3399-t-opp.dtsi" - -/ { - model = "Radxa ROCK 4C+"; - compatible = "radxa,rock-4c-plus", "rockchip,rk3399"; - - aliases { - ethernet0 = &gmac; - mmc0 = &sdhci; - mmc1 = &sdmmc; - }; - - chosen { - stdout-path = "serial2:1500000n8"; - }; - - clkin_gmac: external-gmac-clock { - compatible = "fixed-clock"; - clock-frequency = <125000000>; - clock-output-names = "clkin_gmac"; - #clock-cells = <0>; - }; - - leds { - compatible = "gpio-leds"; - pinctrl-names = "default"; - pinctrl-0 = <&user_led1 &user_led2>; - - /* USER_LED1 */ - led-0 { - function = LED_FUNCTION_POWER; - color = ; - gpios = <&gpio3 RK_PD4 GPIO_ACTIVE_LOW>; - linux,default-trigger = "default-on"; - }; - - /* USER_LED2 */ - led-1 { - function = LED_FUNCTION_STATUS; - color = ; - gpios = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>; - linux,default-trigger = "heartbeat"; - }; - }; - - sdio_pwrseq: sdio-pwrseq { - compatible = "mmc-pwrseq-simple"; - clocks = <&rk809 1>; - clock-names = "ext_clock"; - pinctrl-names = "default"; - pinctrl-0 = <&wifi_enable_h>; - reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>; - }; - - vcc_3v3: vcc-3v3-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc_3v3"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <&vcc3v3_sys>; - }; - - vcc3v3_phy1: vcc3v3-phy1-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc3v3_phy1"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <&vcc_3v3>; - }; - - vcc5v0_host1: vcc5v0-host-regulator { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <&gpio3 RK_PD6 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&vcc5v0_host_en>; - regulator-name = "vcc5v0_host1"; - regulator-always-on; - regulator-boot-on; - vin-supply = <&vcc5v0_host0_s0>; - }; - - vcc5v0_sys: vcc5v0-sys-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc5v0_sys"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - }; - - vcc5v0_typec: vcc5v0-typec-regulator { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&vcc5v0_typec0_en>; - regulator-name = "vcc5v0_typec"; - regulator-always-on; - regulator-boot-on; - vin-supply = <&vcc5v0_sys>; - }; - - vdd_log: vdd-log-regulator { - compatible = "regulator-fixed"; - regulator-name = "vdd_log"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <950000>; - regulator-max-microvolt = <950000>; - vin-supply = <&vcc5v0_sys>; - }; -}; - -&cpu_l0 { - cpu-supply = <&vdd_cpu_l>; -}; - -&cpu_l1 { - cpu-supply = <&vdd_cpu_l>; -}; - -&cpu_l2 { - cpu-supply = <&vdd_cpu_l>; -}; - -&cpu_l3 { - cpu-supply = <&vdd_cpu_l>; -}; - -&cpu_b0 { - cpu-supply = <&vdd_cpu_b>; -}; - -&cpu_b1 { - cpu-supply = <&vdd_cpu_b>; -}; - -&emmc_phy { - status = "okay"; -}; - -&gmac { - assigned-clocks = <&cru SCLK_RMII_SRC>; - assigned-clock-parents = <&clkin_gmac>; - clock_in_out = "input"; - phy-supply = <&vcc3v3_phy1>; - phy-mode = "rgmii"; - pinctrl-names = "default"; - pinctrl-0 = <&rgmii_pins>; - snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; - snps,reset-active-low; - snps,reset-delays-us = <0 10000 50000>; - tx_delay = <0x2a>; - rx_delay = <0x21>; - status = "okay"; -}; - -&gpu { - mali-supply = <&vdd_gpu>; - status = "okay"; -}; - -&hdmi { - avdd-0v9-supply = <&vcc_0v9_s0>; - avdd-1v8-supply = <&vcc_1v8_s0>; - ddc-i2c-bus = <&i2c3>; - pinctrl-names = "default"; - pinctrl-0 = <&hdmi_cec>; - status = "okay"; -}; - -&hdmi_sound { - status = "okay"; -}; - -&i2c0 { - status = "okay"; - i2c-scl-falling-time-ns = <30>; - i2c-scl-rising-time-ns = <180>; - clock-frequency = <400000>; - - rk809: pmic@20 { - compatible = "rockchip,rk809"; - reg = <0x20>; - interrupt-parent = <&gpio1>; - interrupts = ; - #clock-cells = <1>; - clock-output-names = "rk808-clkout1", "rk808-clkout2"; - pinctrl-names = "default"; - pinctrl-0 = <&pmic_int_l>; - rockchip,system-power-controller; - wakeup-source; - - vcc1-supply = <&vcc5v0_sys>; - vcc2-supply = <&vcc5v0_sys>; - vcc3-supply = <&vcc5v0_sys>; - vcc4-supply = <&vcc5v0_sys>; - vcc5-supply = <&vcc_buck5_s3>; - vcc6-supply = <&vcc_buck5_s3>; - vcc7-supply = <&vcc5v0_sys>; - vcc8-supply = <&vcc3v3_sys>; - vcc9-supply = <&vcc5v0_sys>; - - regulators { - vdd_center: DCDC_REG1 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <750000>; - regulator-max-microvolt = <1350000>; - regulator-initial-mode = <0x2>; - regulator-name = "vdd_center"; - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <900000>; - }; - }; - - vdd_cpu_l: DCDC_REG2 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <750000>; - regulator-max-microvolt = <1350000>; - regulator-ramp-delay = <6001>; - regulator-initial-mode = <0x2>; - regulator-name = "vdd_cpu_l"; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_ddr: DCDC_REG3 { - regulator-always-on; - regulator-boot-on; - regulator-name = "vcc_ddr"; - regulator-initial-mode = <0x2>; - regulator-state-mem { - regulator-on-in-suspend; - }; - }; - - vcc3v3_sys: DCDC_REG4 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-initial-mode = <0x2>; - regulator-name = "vcc3v3_sys"; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <3300000>; - }; - }; - - vcc_buck5_s3: DCDC_REG5 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-name = "vcc_buck5_s3"; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <3300000>; - }; - }; - - vcc_0v9_s3: LDO_REG1 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <900000>; - regulator-name = "vcc_0v9_s3"; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_1v8_s3: LDO_REG2 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-name = "vcc_1v8_s3"; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vcc_0v9_s0: LDO_REG3 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <900000>; - regulator-name = "vcc_0v9_s0"; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <900000>; - }; - }; - - vcc_1v8_s0: LDO_REG4 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-name = "vcc_1v8_s0"; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_mipi: LDO_REG5 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - regulator-name = "vcc_mipi"; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_1v5_s0: LDO_REG6 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1500000>; - regulator-max-microvolt = <1500000>; - regulator-name = "vcc_1v5_s0"; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_3v0_s0: LDO_REG7 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - regulator-name = "vcc_3v0_s0"; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_sdio_s0: LDO_REG8 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - regulator-name = "vcc_sdio_s0"; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_cam: LDO_REG9 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-name = "vcc_cam"; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc5v0_host0_s0: SWITCH_REG1 { - regulator-always-on; - regulator-boot-on; - regulator-name = "vcc5v0_host0_s0"; - regulator-state-mem { - regulator-on-in-suspend; - }; - }; - - lcd_3v3: SWITCH_REG2 { - regulator-always-on; - regulator-boot-on; - regulator-name = "lcd_3v3"; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - }; - }; - - vdd_cpu_b: regulator@40 { - compatible = "silergy,syr827"; - reg = <0x40>; - fcs,suspend-voltage-selector = <1>; - regulator-compatible = "fan53555-reg"; - pinctrl-0 = <&vsel1_gpio>; - vsel-gpios = <&gpio1 RK_PC1 GPIO_ACTIVE_HIGH>; - regulator-name = "vdd_cpu_b"; - regulator-min-microvolt = <712500>; - regulator-max-microvolt = <1500000>; - regulator-ramp-delay = <1000>; - regulator-always-on; - regulator-boot-on; - vin-supply = <&vcc5v0_sys>; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_gpu: regulator@41 { - compatible = "silergy,syr828"; - reg = <0x41>; - fcs,suspend-voltage-selector = <1>; - regulator-compatible = "fan53555-reg"; - pinctrl-0 = <&vsel2_gpio>; - vsel-gpios = <&gpio1 RK_PB6 GPIO_ACTIVE_HIGH>; - regulator-name = "vdd_gpu"; - regulator-min-microvolt = <712500>; - regulator-max-microvolt = <1500000>; - regulator-ramp-delay = <1000>; - regulator-always-on; - regulator-boot-on; - vin-supply = <&vcc5v0_sys>; - regulator-initial-mode = <1>; /* 1:force PWM 2:auto */ - regulator-state-mem { - regulator-off-in-suspend; - }; - }; -}; - -&i2c3 { - i2c-scl-rising-time-ns = <450>; - i2c-scl-falling-time-ns = <15>; - status = "okay"; -}; - -&i2s2 { - status = "okay"; -}; - -&io_domains { - audio-supply = <&vcc_1v8_s0>; - bt656-supply = <&vcc_3v0_s0>; - gpio1830-supply = <&vcc_3v0_s0>; - sdmmc-supply = <&vcc_sdio_s0>; - status = "okay"; -}; - -&pinctrl { - bt { - bt_enable_h: bt-enable-h { - rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - bt_host_wake_l: bt-host-wake-l { - rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - bt_wake_l: bt-wake-l { - rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - leds { - user_led1: user-led1 { - rockchip,pins = <3 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - user_led2: user-led2 { - rockchip,pins = <3 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - pmic { - pmic_int_l: pmic-int-l { - rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>; - }; - - vsel1_gpio: vsel1-gpio { - rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>; - }; - - vsel2_gpio: vsel2-gpio { - rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>; - }; - }; - - sdmmc { - sdmmc_bus4: sdmmc-bus4 { - rockchip,pins = <4 8 1 &pcfg_pull_up_8ma>, - <4 9 1 &pcfg_pull_up_8ma>, - <4 10 1 &pcfg_pull_up_8ma>, - <4 11 1 &pcfg_pull_up_8ma>; - }; - - sdmmc_clk: sdmmc-clk { - rockchip,pins = <4 12 1 &pcfg_pull_none_18ma>; - }; - - sdmmc_cmd: sdmmc-cmd { - rockchip,pins = <4 13 1 &pcfg_pull_up_8ma>; - }; - }; - - usb-typec { - vcc5v0_typec0_en: vcc5v0-typec-en { - rockchip,pins = <1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - usb2 { - vcc5v0_host_en: vcc5v0-host-en { - rockchip,pins = <3 RK_PD6 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - wifi { - wifi_enable_h: wifi-enable-h { - rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - wifi_host_wake_l: wifi-host-wake-l { - rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; -}; - -&pmu_io_domains { - pmu1830-supply = <&vcc_3v0_s0>; - status = "okay"; -}; - -&saradc { - status = "okay"; - vref-supply = <&vcc_1v8_s3>; -}; - -&sdhci { - max-frequency = <150000000>; - bus-width = <8>; - mmc-hs200-1_8v; - non-removable; - status = "okay"; -}; - -&sdio0 { - #address-cells = <1>; - #size-cells = <0>; - bus-width = <4>; - clock-frequency = <50000000>; - cap-sdio-irq; - cap-sd-highspeed; - keep-power-in-suspend; - mmc-pwrseq = <&sdio_pwrseq>; - non-removable; - pinctrl-names = "default"; - pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>; - sd-uhs-sdr104; - status = "okay"; - - brcmf: wifi@1 { - compatible = "brcm,bcm4329-fmac"; - reg = <1>; - interrupt-parent = <&gpio0>; - interrupts = ; - interrupt-names = "host-wake"; - pinctrl-names = "default"; - pinctrl-0 = <&wifi_host_wake_l>; - }; -}; - -&sdmmc { - bus-width = <4>; - cap-mmc-highspeed; - cap-sd-highspeed; - card-detect-delay = <800>; - disable-wp; - pinctrl-names = "default"; - pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>; - cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>; - vqmmc-supply = <&vcc_sdio_s0>; - status = "okay"; -}; - -&tcphy0 { - status = "okay"; -}; - -&tcphy1 { - status = "okay"; -}; - -&tsadc { - rockchip,hw-tshut-mode = <1>; - rockchip,hw-tshut-polarity = <1>; - status = "okay"; -}; - -&u2phy0 { - status = "okay"; - - u2phy0_otg: otg-port { - status = "okay"; - }; - - u2phy0_host: host-port { - phy-supply = <&vcc5v0_host1>; - status = "okay"; - }; -}; - -&u2phy1 { - status = "okay"; - - u2phy1_otg: otg-port { - status = "okay"; - }; - - u2phy1_host: host-port { - phy-supply = <&vcc5v0_host1>; - status = "okay"; - }; -}; - -&uart0 { - pinctrl-names = "default"; - pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>; - status = "okay"; - - bluetooth { - compatible = "brcm,bcm4345c5"; - clocks = <&rk809 1>; - clock-names = "lpo"; - device-wakeup-gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_HIGH>; - host-wakeup-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>; - shutdown-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>; - max-speed = <1500000>; - pinctrl-names = "default"; - pinctrl-0 = <&bt_host_wake_l &bt_wake_l &bt_enable_h>; - vbat-supply = <&vcc3v3_sys>; - vddio-supply = <&vcc_1v8_s3>; - }; -}; - -&uart2 { - status = "okay"; -}; - -&usb_host0_ehci { - status = "okay"; -}; - -&usb_host0_ohci { - status = "okay"; -}; - -&usb_host1_ehci { - status = "okay"; -}; - -&usb_host1_ohci { - status = "okay"; -}; - -&usbdrd3_0 { - extcon = <&u2phy0>; - status = "okay"; -}; - -&usbdrd_dwc3_0 { - status = "okay"; - dr_mode = "host"; -}; - -&usbdrd3_1 { - status = "okay"; -}; - -&usbdrd_dwc3_1 { - status = "okay"; - dr_mode = "host"; -}; - -&vopb { - status = "okay"; -}; - -&vopb_mmu { - status = "okay"; -}; - -&vopl { - status = "okay"; -}; - -&vopl_mmu { - status = "okay"; -}; diff --git a/arch/arm/dts/rk3399-rock-4se.dts b/arch/arm/dts/rk3399-rock-4se.dts deleted file mode 100644 index 7cfc198bbae..00000000000 --- a/arch/arm/dts/rk3399-rock-4se.dts +++ /dev/null @@ -1,65 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (c) 2019 Akash Gajjar - * Copyright (c) 2019 Pragnesh Patel - */ - -/dts-v1/; -#include "rk3399-rock-pi-4.dtsi" -#include "rk3399-t-opp.dtsi" - -/ { - model = "Radxa ROCK 4SE"; - compatible = "radxa,rock-4se", "rockchip,rk3399"; - - aliases { - mmc2 = &sdio0; - }; -}; - -&pinctrl { - usb2 { - vcc5v0_host_en: vcc5v0-host-en { - rockchip,pins = <4 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; -}; - -&sdio0 { - status = "okay"; - - brcmf: wifi@1 { - compatible = "brcm,bcm4329-fmac"; - reg = <1>; - interrupt-parent = <&gpio0>; - interrupts = ; - interrupt-names = "host-wake"; - pinctrl-names = "default"; - pinctrl-0 = <&wifi_host_wake_l>; - }; -}; - -&uart0 { - status = "okay"; - - bluetooth { - compatible = "brcm,bcm4345c5"; - clocks = <&rk808 1>; - clock-names = "lpo"; - device-wakeup-gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_HIGH>; - host-wakeup-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>; - shutdown-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>; - max-speed = <1500000>; - pinctrl-names = "default"; - pinctrl-0 = <&bt_host_wake_l &bt_wake_l &bt_enable_h>; - vbat-supply = <&vcc3v3_sys>; - vddio-supply = <&vcc_1v8>; - }; -}; - -&vcc5v0_host { - enable-active-high; - gpio = <&gpio4 RK_PD1 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&vcc5v0_host_en>; -}; diff --git a/arch/arm/dts/rk3399-rock-pi-4.dtsi b/arch/arm/dts/rk3399-rock-pi-4.dtsi deleted file mode 100644 index 281a1218070..00000000000 --- a/arch/arm/dts/rk3399-rock-pi-4.dtsi +++ /dev/null @@ -1,792 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (c) 2019 Akash Gajjar - * Copyright (c) 2019 Pragnesh Patel - */ - -/dts-v1/; -#include -#include -#include -#include "rk3399.dtsi" - -/ { - aliases { - ethernet0 = &gmac; - mmc0 = &sdhci; - mmc1 = &sdmmc; - }; - - chosen { - stdout-path = "serial2:1500000n8"; - }; - - clkin_gmac: external-gmac-clock { - compatible = "fixed-clock"; - clock-frequency = <125000000>; - clock-output-names = "clkin_gmac"; - #clock-cells = <0>; - }; - - leds { - compatible = "gpio-leds"; - pinctrl-names = "default"; - pinctrl-0 = <&user_led2>; - - /* USER_LED2 */ - led-0 { - function = LED_FUNCTION_STATUS; - color = ; - gpios = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>; - linux,default-trigger = "heartbeat"; - }; - }; - - sdio_pwrseq: sdio-pwrseq { - compatible = "mmc-pwrseq-simple"; - clocks = <&rk808 1>; - clock-names = "lpo"; - pinctrl-names = "default"; - pinctrl-0 = <&wifi_enable_h>; - reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>; - }; - - sound: sound { - compatible = "audio-graph-card"; - label = "Analog"; - dais = <&i2s0_p0>; - }; - - sound-dit { - compatible = "audio-graph-card"; - label = "SPDIF"; - dais = <&spdif_p0>; - }; - - spdif-dit { - compatible = "linux,spdif-dit"; - #sound-dai-cells = <0>; - - port { - dit_p0_0: endpoint { - remote-endpoint = <&spdif_p0_0>; - }; - }; - }; - - vbus_typec: vbus-typec-regulator { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&vcc5v0_typec_en>; - regulator-name = "vbus_typec"; - regulator-always-on; - vin-supply = <&vcc5v0_sys>; - }; - - vcc12v_dcin: dc-12v { - compatible = "regulator-fixed"; - regulator-name = "vcc12v_dcin"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <12000000>; - regulator-max-microvolt = <12000000>; - }; - - vcc3v3_lan: vcc3v3-lan-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc3v3_lan"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <&vcc3v3_sys>; - }; - - vcc3v3_pcie: vcc3v3-pcie-regulator { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <&gpio2 RK_PD2 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&pcie_pwr_en>; - regulator-name = "vcc3v3_pcie"; - regulator-always-on; - regulator-boot-on; - vin-supply = <&vcc5v0_sys>; - }; - - vcc3v3_sys: vcc3v3-sys { - compatible = "regulator-fixed"; - regulator-name = "vcc3v3_sys"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <&vcc5v0_sys>; - }; - - vcc5v0_host: vcc5v0-host-regulator { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <&gpio4 RK_PD1 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&vcc5v0_host_en>; - regulator-name = "vcc5v0_host"; - regulator-always-on; - vin-supply = <&vcc5v0_sys>; - }; - - vcc5v0_sys: vcc-sys { - compatible = "regulator-fixed"; - regulator-name = "vcc5v0_sys"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - vin-supply = <&vcc12v_dcin>; - }; - - vcc_0v9: vcc-0v9 { - compatible = "regulator-fixed"; - regulator-name = "vcc_0v9"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <900000>; - vin-supply = <&vcc3v3_sys>; - }; - - vdd_log: vdd-log { - compatible = "pwm-regulator"; - pwms = <&pwm2 0 25000 1>; - pwm-supply = <&vcc5v0_sys>; - regulator-name = "vdd_log"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <1400000>; - }; -}; - -&cpu_l0 { - cpu-supply = <&vdd_cpu_l>; -}; - -&cpu_l1 { - cpu-supply = <&vdd_cpu_l>; -}; - -&cpu_l2 { - cpu-supply = <&vdd_cpu_l>; -}; - -&cpu_l3 { - cpu-supply = <&vdd_cpu_l>; -}; - -&cpu_b0 { - cpu-supply = <&vdd_cpu_b>; -}; - -&cpu_b1 { - cpu-supply = <&vdd_cpu_b>; -}; - -&emmc_phy { - status = "okay"; -}; - -&gmac { - assigned-clocks = <&cru SCLK_RMII_SRC>; - assigned-clock-parents = <&clkin_gmac>; - clock_in_out = "input"; - phy-supply = <&vcc3v3_lan>; - phy-mode = "rgmii"; - pinctrl-names = "default"; - pinctrl-0 = <&rgmii_pins>; - snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; - snps,reset-active-low; - snps,reset-delays-us = <0 10000 50000>; - tx_delay = <0x28>; - rx_delay = <0x11>; - status = "okay"; -}; - -&gpu { - mali-supply = <&vdd_gpu>; - status = "okay"; -}; - -&hdmi { - avdd-0v9-supply = <&vcca0v9_hdmi>; - avdd-1v8-supply = <&vcca1v8_hdmi>; - ddc-i2c-bus = <&i2c3>; - pinctrl-names = "default"; - pinctrl-0 = <&hdmi_cec>; - status = "okay"; -}; - -&hdmi_sound { - status = "okay"; -}; - -&i2c0 { - clock-frequency = <400000>; - i2c-scl-rising-time-ns = <168>; - i2c-scl-falling-time-ns = <4>; - status = "okay"; - - rk808: pmic@1b { - compatible = "rockchip,rk808"; - reg = <0x1b>; - interrupt-parent = <&gpio1>; - interrupts = <21 IRQ_TYPE_LEVEL_LOW>; - #clock-cells = <1>; - clock-output-names = "xin32k", "rk808-clkout2"; - pinctrl-names = "default"; - pinctrl-0 = <&pmic_int_l>; - rockchip,system-power-controller; - wakeup-source; - - vcc1-supply = <&vcc5v0_sys>; - vcc2-supply = <&vcc5v0_sys>; - vcc3-supply = <&vcc5v0_sys>; - vcc4-supply = <&vcc5v0_sys>; - vcc6-supply = <&vcc5v0_sys>; - vcc7-supply = <&vcc5v0_sys>; - vcc8-supply = <&vcc3v3_sys>; - vcc9-supply = <&vcc5v0_sys>; - vcc10-supply = <&vcc5v0_sys>; - vcc11-supply = <&vcc5v0_sys>; - vcc12-supply = <&vcc3v3_sys>; - vddio-supply = <&vcc_1v8>; - - regulators { - vdd_center: DCDC_REG1 { - regulator-name = "vdd_center"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <750000>; - regulator-max-microvolt = <1350000>; - regulator-ramp-delay = <6001>; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_cpu_l: DCDC_REG2 { - regulator-name = "vdd_cpu_l"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <750000>; - regulator-max-microvolt = <1350000>; - regulator-ramp-delay = <6001>; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_ddr: DCDC_REG3 { - regulator-name = "vcc_ddr"; - regulator-always-on; - regulator-boot-on; - regulator-state-mem { - regulator-on-in-suspend; - }; - }; - - vcc_1v8: DCDC_REG4 { - regulator-name = "vcc_1v8"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vcca1v8_codec: LDO_REG1 { - regulator-name = "vcca1v8_codec"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcca1v8_hdmi: LDO_REG2 { - regulator-name = "vcca1v8_hdmi"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcca_1v8: LDO_REG3 { - regulator-name = "vcca_1v8"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vcc_sdio: LDO_REG4 { - regulator-name = "vcc_sdio"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <3000000>; - }; - }; - - vcca3v0_codec: LDO_REG5 { - regulator-name = "vcca3v0_codec"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_1v5: LDO_REG6 { - regulator-name = "vcc_1v5"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1500000>; - regulator-max-microvolt = <1500000>; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1500000>; - }; - }; - - vcca0v9_hdmi: LDO_REG7 { - regulator-name = "vcca0v9_hdmi"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <900000>; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_3v0: LDO_REG8 { - regulator-name = "vcc_3v0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <3000000>; - }; - }; - - vcc_cam: SWITCH_REG1 { - regulator-name = "vcc_cam"; - regulator-always-on; - regulator-boot-on; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_mipi: SWITCH_REG2 { - regulator-name = "vcc_mipi"; - regulator-always-on; - regulator-boot-on; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - }; - }; - - vdd_cpu_b: regulator@40 { - compatible = "silergy,syr827"; - reg = <0x40>; - fcs,suspend-voltage-selector = <1>; - pinctrl-names = "default"; - pinctrl-0 = <&vsel1_pin>; - regulator-name = "vdd_cpu_b"; - regulator-min-microvolt = <712500>; - regulator-max-microvolt = <1500000>; - regulator-ramp-delay = <1000>; - regulator-always-on; - regulator-boot-on; - vin-supply = <&vcc5v0_sys>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_gpu: regulator@41 { - compatible = "silergy,syr828"; - reg = <0x41>; - fcs,suspend-voltage-selector = <1>; - pinctrl-names = "default"; - pinctrl-0 = <&vsel2_pin>; - regulator-name = "vdd_gpu"; - regulator-min-microvolt = <712500>; - regulator-max-microvolt = <1500000>; - regulator-ramp-delay = <1000>; - regulator-always-on; - regulator-boot-on; - vin-supply = <&vcc5v0_sys>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; -}; - -&i2c1 { - i2c-scl-rising-time-ns = <300>; - i2c-scl-falling-time-ns = <15>; - status = "okay"; - - es8316: codec@11 { - compatible = "everest,es8316"; - reg = <0x11>; - clocks = <&cru SCLK_I2S_8CH_OUT>; - clock-names = "mclk"; - #sound-dai-cells = <0>; - - port { - es8316_p0_0: endpoint { - remote-endpoint = <&i2s0_p0_0>; - }; - }; - }; -}; - -&i2c3 { - i2c-scl-rising-time-ns = <450>; - i2c-scl-falling-time-ns = <15>; - status = "okay"; -}; - -&i2c4 { - i2c-scl-rising-time-ns = <600>; - i2c-scl-falling-time-ns = <20>; - status = "okay"; -}; - -&i2s0 { - pinctrl-0 = <&i2s0_2ch_bus>; - pinctrl-1 = <&i2s0_2ch_bus_bclk_off>; - rockchip,capture-channels = <2>; - rockchip,playback-channels = <2>; - status = "okay"; - - i2s0_p0: port { - i2s0_p0_0: endpoint { - dai-format = "i2s"; - mclk-fs = <256>; - remote-endpoint = <&es8316_p0_0>; - }; - }; -}; - -&i2s1 { - rockchip,playback-channels = <2>; - rockchip,capture-channels = <2>; -}; - -&i2s2 { - status = "okay"; -}; - -&io_domains { - audio-supply = <&vcca1v8_codec>; - bt656-supply = <&vcc_3v0>; - gpio1830-supply = <&vcc_3v0>; - sdmmc-supply = <&vcc_sdio>; - status = "okay"; -}; - -&pcie0 { - ep-gpios = <&gpio4 RK_PD3 GPIO_ACTIVE_HIGH>; - num-lanes = <4>; - pinctrl-0 = <&pcie_clkreqnb_cpm>; - pinctrl-names = "default"; - vpcie0v9-supply = <&vcc_0v9>; - vpcie1v8-supply = <&vcc_1v8>; - vpcie3v3-supply = <&vcc3v3_pcie>; - status = "okay"; -}; - -&pcie_phy { - status = "okay"; -}; - -&pinctrl { - bt { - bt_enable_h: bt-enable-h { - rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - bt_host_wake_l: bt-host-wake-l { - rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - bt_wake_l: bt-wake-l { - rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - es8316 { - hp_detect: hp-detect { - rockchip,pins = <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - hp_int: hp-int { - rockchip,pins = <1 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - leds { - user_led2: user-led2 { - rockchip,pins = <3 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - pcie { - pcie_pwr_en: pcie-pwr-en { - rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - pmic { - pmic_int_l: pmic-int-l { - rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>; - }; - - vsel1_pin: vsel1-pin { - rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>; - }; - - vsel2_pin: vsel2-pin { - rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>; - }; - }; - - sdio0 { - sdio0_bus4: sdio0-bus4 { - rockchip,pins = <2 RK_PC4 1 &pcfg_pull_up_20ma>, - <2 RK_PC5 1 &pcfg_pull_up_20ma>, - <2 RK_PC6 1 &pcfg_pull_up_20ma>, - <2 RK_PC7 1 &pcfg_pull_up_20ma>; - }; - - sdio0_cmd: sdio0-cmd { - rockchip,pins = <2 RK_PD0 1 &pcfg_pull_up_20ma>; - }; - - sdio0_clk: sdio0-clk { - rockchip,pins = <2 RK_PD1 1 &pcfg_pull_none_20ma>; - }; - }; - - usb-typec { - vcc5v0_typec_en: vcc5v0-typec-en { - rockchip,pins = <1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - usb2 { - vcc5v0_host_en: vcc5v0-host-en { - rockchip,pins = <4 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - wifi { - wifi_enable_h: wifi-enable-h { - rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - wifi_host_wake_l: wifi-host-wake-l { - rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; -}; - -&pmu_io_domains { - pmu1830-supply = <&vcc_3v0>; - status = "okay"; -}; - -&pwm2 { - status = "okay"; -}; - -&saradc { - status = "okay"; - - vref-supply = <&vcc_1v8>; -}; - -&sdhci { - max-frequency = <150000000>; - bus-width = <8>; - mmc-hs200-1_8v; - non-removable; - status = "okay"; -}; - -&sdio0 { - #address-cells = <1>; - #size-cells = <0>; - bus-width = <4>; - clock-frequency = <50000000>; - cap-sdio-irq; - cap-sd-highspeed; - keep-power-in-suspend; - mmc-pwrseq = <&sdio_pwrseq>; - non-removable; - pinctrl-names = "default"; - pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>; - sd-uhs-sdr104; -}; - -&sdmmc { - bus-width = <4>; - cap-mmc-highspeed; - cap-sd-highspeed; - cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>; - disable-wp; - max-frequency = <150000000>; - pinctrl-names = "default"; - pinctrl-0 = <&sdmmc_clk &sdmmc_cd &sdmmc_cmd &sdmmc_bus4>; - status = "okay"; -}; - -&spdif { - - spdif_p0: port { - spdif_p0_0: endpoint { - remote-endpoint = <&dit_p0_0>; - }; - }; -}; - -&tcphy0 { - status = "okay"; -}; - -&tcphy1 { - status = "okay"; -}; - -&tsadc { - status = "okay"; - - /* tshut mode 0:CRU 1:GPIO */ - rockchip,hw-tshut-mode = <1>; - /* tshut polarity 0:LOW 1:HIGH */ - rockchip,hw-tshut-polarity = <1>; -}; - -&u2phy0 { - status = "okay"; - - u2phy0_otg: otg-port { - status = "okay"; - }; - - u2phy0_host: host-port { - phy-supply = <&vcc5v0_host>; - status = "okay"; - }; -}; - -&u2phy1 { - status = "okay"; - - u2phy1_otg: otg-port { - status = "okay"; - }; - - u2phy1_host: host-port { - phy-supply = <&vcc5v0_host>; - status = "okay"; - }; -}; - -&uart0 { - pinctrl-names = "default"; - pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>; -}; - -&uart2 { - status = "okay"; -}; - -&usb_host0_ehci { - status = "okay"; -}; - -&usb_host0_ohci { - status = "okay"; -}; - -&usb_host1_ehci { - status = "okay"; -}; - -&usb_host1_ohci { - status = "okay"; -}; - -&usbdrd3_0 { - status = "okay"; -}; - -&usbdrd3_1 { - status = "okay"; -}; - -&usbdrd_dwc3_0 { - status = "okay"; - dr_mode = "host"; -}; - -&usbdrd_dwc3_1 { - status = "okay"; - dr_mode = "host"; -}; - -&vopb { - status = "okay"; -}; - -&vopb_mmu { - status = "okay"; -}; - -&vopl { - status = "okay"; -}; - -&vopl_mmu { - status = "okay"; -}; diff --git a/arch/arm/dts/rk3399-rock-pi-4a.dts b/arch/arm/dts/rk3399-rock-pi-4a.dts deleted file mode 100644 index d5df8939a65..00000000000 --- a/arch/arm/dts/rk3399-rock-pi-4a.dts +++ /dev/null @@ -1,24 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (c) 2019 Akash Gajjar - * Copyright (c) 2019 Pragnesh Patel - */ - -/dts-v1/; -#include "rk3399-rock-pi-4.dtsi" -#include "rk3399-opp.dtsi" - -/ { - model = "Radxa ROCK Pi 4A"; - compatible = "radxa,rockpi4a", "radxa,rockpi4", "rockchip,rk3399"; -}; - -&spi1 { - status = "okay"; - - flash@0 { - compatible = "jedec,spi-nor"; - reg = <0>; - spi-max-frequency = <10000000>; - }; -}; diff --git a/arch/arm/dts/rk3399-rock-pi-4c.dts b/arch/arm/dts/rk3399-rock-pi-4c.dts deleted file mode 100644 index de2ebe4cb4f..00000000000 --- a/arch/arm/dts/rk3399-rock-pi-4c.dts +++ /dev/null @@ -1,80 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd - * Copyright (c) 2019 Radxa Limited - * Copyright (c) 2019 Amarula Solutions(India) - */ - -/dts-v1/; -#include "rk3399-rock-pi-4.dtsi" -#include "rk3399-opp.dtsi" - -/ { - model = "Radxa ROCK Pi 4C"; - compatible = "radxa,rockpi4c", "radxa,rockpi4", "rockchip,rk3399"; - - aliases { - mmc2 = &sdio0; - }; -}; - -&es8316 { - pinctrl-0 = <&hp_detect &hp_int>; - pinctrl-names = "default"; - interrupt-parent = <&gpio1>; - interrupts = ; -}; - -&sdio0 { - status = "okay"; - - brcmf: wifi@1 { - compatible = "brcm,bcm4329-fmac"; - reg = <1>; - interrupt-parent = <&gpio0>; - interrupts = ; - interrupt-names = "host-wake"; - pinctrl-names = "default"; - pinctrl-0 = <&wifi_host_wake_l>; - }; -}; - -&sound { - hp-det-gpio = <&gpio1 RK_PA0 GPIO_ACTIVE_HIGH>; -}; - -&spi1 { - status = "okay"; - - flash@0 { - compatible = "jedec,spi-nor"; - reg = <0>; - spi-max-frequency = <10000000>; - }; -}; - -&uart0 { - status = "okay"; - - bluetooth { - compatible = "brcm,bcm4345c5"; - clocks = <&rk808 1>; - clock-names = "lpo"; - device-wakeup-gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_HIGH>; - host-wakeup-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>; - shutdown-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>; - max-speed = <1500000>; - pinctrl-names = "default"; - pinctrl-0 = <&bt_host_wake_l &bt_wake_l &bt_enable_h>; - vbat-supply = <&vcc3v3_sys>; - vddio-supply = <&vcc_1v8>; - }; -}; - -&vcc5v0_host { - gpio = <&gpio3 RK_PD6 GPIO_ACTIVE_HIGH>; -}; - -&vcc5v0_host_en { - rockchip,pins = <3 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>; -}; diff --git a/arch/arm/dts/rk3399-rock960.dts b/arch/arm/dts/rk3399-rock960.dts deleted file mode 100644 index 1a23e8f3cdf..00000000000 --- a/arch/arm/dts/rk3399-rock960.dts +++ /dev/null @@ -1,156 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (c) 2018 Linaro Ltd. - */ - -/dts-v1/; -#include "rk3399-rock960.dtsi" - -/ { - model = "96boards Rock960"; - compatible = "vamrs,rock960", "rockchip,rk3399"; - - chosen { - stdout-path = "serial2:1500000n8"; - }; - - leds { - compatible = "gpio-leds"; - pinctrl-names = "default"; - pinctrl-0 = <&user_led1_pin>, <&user_led2_pin>, - <&user_led3_pin>, <&user_led4_pin>, - <&wlan_led_pin>, <&bt_led_pin>; - - user_led1: led-1 { - label = "green:user1"; - gpios = <&gpio4 RK_PC2 0>; - linux,default-trigger = "heartbeat"; - }; - - user_led2: led-2 { - label = "green:user2"; - gpios = <&gpio4 RK_PC6 0>; - linux,default-trigger = "mmc0"; - }; - - user_led3: led-3 { - label = "green:user3"; - gpios = <&gpio4 RK_PD0 0>; - linux,default-trigger = "mmc1"; - }; - - user_led4: led-4 { - label = "green:user4"; - gpios = <&gpio4 RK_PD4 0>; - panic-indicator; - linux,default-trigger = "none"; - }; - - wlan_active_led: led-5 { - label = "yellow:wlan"; - gpios = <&gpio4 RK_PD5 0>; - linux,default-trigger = "phy0tx"; - default-state = "off"; - }; - - bt_active_led: led-6 { - label = "blue:bt"; - gpios = <&gpio4 RK_PD6 0>; - linux,default-trigger = "hci0-power"; - default-state = "off"; - }; - }; - -}; - -&cpu_alert0 { - temperature = <65000>; -}; - -&cpu_thermal { - sustainable-power = <1550>; - - cooling-maps { - map0 { - trip = <&cpu_alert1>; - }; - }; -}; - -&pcie0 { - ep-gpios = <&gpio2 RK_PA2 GPIO_ACTIVE_HIGH>; -}; - -&pinctrl { - leds { - user_led1_pin: user-led1-pin { - rockchip,pins = - <4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - user_led2_pin: user-led2-pin { - rockchip,pins = - <4 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - user_led3_pin: user-led3-pin { - rockchip,pins = - <4 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - user_led4_pin: user-led4-pin { - rockchip,pins = - <4 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - wlan_led_pin: wlan-led-pin { - rockchip,pins = - <4 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - bt_led_pin: bt-led-pin { - rockchip,pins = - <4 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - pcie { - pcie_drv: pcie-drv { - rockchip,pins = - <2 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - usb2 { - host_vbus_drv: host-vbus-drv { - rockchip,pins = - <4 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; -}; - -&spi0 { - /* On Low speed expansion (LS-SPI0) */ - status = "okay"; -}; - -&spi4 { - /* On High speed expansion (HS-SPI1) */ - status = "okay"; -}; - -&usbdrd_dwc3_0 { - dr_mode = "otg"; -}; - -&usbdrd_dwc3_1 { - dr_mode = "host"; -}; - -&vcc3v3_pcie { - gpio = <&gpio2 5 GPIO_ACTIVE_HIGH>; -}; - -&vcc5v0_host { - gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>; -}; diff --git a/arch/arm/dts/rk3399-rock960.dtsi b/arch/arm/dts/rk3399-rock960.dtsi deleted file mode 100644 index c920ddf44ba..00000000000 --- a/arch/arm/dts/rk3399-rock960.dtsi +++ /dev/null @@ -1,673 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (c) 2018 Collabora Ltd. - * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd. - * Copyright (c) 2018 Linaro Ltd. - */ - -#include "rk3399.dtsi" -#include "rk3399-opp.dtsi" -#include - -/ { - aliases { - mmc0 = &sdio0; - mmc1 = &sdmmc; - mmc2 = &sdhci; - }; - - sdio_pwrseq: sdio-pwrseq { - compatible = "mmc-pwrseq-simple"; - clocks = <&rk808 1>; - clock-names = "ext_clock"; - pinctrl-names = "default"; - pinctrl-0 = <&wifi_enable_h>; - reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>; - }; - - vcc12v_dcin: vcc12v-dcin { - compatible = "regulator-fixed"; - regulator-name = "vcc12v_dcin"; - regulator-min-microvolt = <12000000>; - regulator-max-microvolt = <12000000>; - regulator-always-on; - regulator-boot-on; - }; - - vcc1v8_s0: vcc1v8-s0 { - compatible = "regulator-fixed"; - regulator-name = "vcc1v8_s0"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - }; - - vcc5v0_sys: vcc5v0-sys { - compatible = "regulator-fixed"; - regulator-name = "vcc5v0_sys"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - regulator-always-on; - vin-supply = <&vcc12v_dcin>; - }; - - vcc3v3_sys: vcc3v3-sys { - compatible = "regulator-fixed"; - regulator-name = "vcc3v3_sys"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - vin-supply = <&vcc5v0_sys>; - }; - - vcc3v3_pcie: vcc3v3-pcie-regulator { - compatible = "regulator-fixed"; - enable-active-high; - pinctrl-names = "default"; - pinctrl-0 = <&pcie_drv>; - regulator-boot-on; - regulator-name = "vcc3v3_pcie"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <&vcc3v3_sys>; - }; - - vcc5v0_host: vcc5v0-host-regulator { - compatible = "regulator-fixed"; - enable-active-high; - pinctrl-names = "default"; - pinctrl-0 = <&host_vbus_drv>; - regulator-name = "vcc5v0_host"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - regulator-always-on; - vin-supply = <&vcc5v0_sys>; - }; - - vcc_0v9: vcc-0v9 { - compatible = "regulator-fixed"; - regulator-name = "vcc_0v9"; - regulator-always-on; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <900000>; - vin-supply = <&vcc3v3_sys>; - }; -}; - -&cpu_l0 { - cpu-supply = <&vdd_cpu_l>; -}; - -&cpu_l1 { - cpu-supply = <&vdd_cpu_l>; -}; - -&cpu_l2 { - cpu-supply = <&vdd_cpu_l>; -}; - -&cpu_l3 { - cpu-supply = <&vdd_cpu_l>; -}; - -&cpu_b0 { - cpu-supply = <&vdd_cpu_b>; -}; - -&cpu_b1 { - cpu-supply = <&vdd_cpu_b>; -}; - -&emmc_phy { - status = "okay"; -}; - -&gpu { - mali-supply = <&vdd_gpu>; - status = "okay"; -}; - -&hdmi { - avdd-0v9-supply = <&vcca0v9_hdmi>; - avdd-1v8-supply = <&vcca1v8_hdmi>; - ddc-i2c-bus = <&i2c3>; - pinctrl-names = "default"; - pinctrl-0 = <&hdmi_cec>; - status = "okay"; -}; - -&hdmi_sound { - status = "okay"; -}; - -&i2c0 { - clock-frequency = <400000>; - i2c-scl-rising-time-ns = <168>; - i2c-scl-falling-time-ns = <4>; - status = "okay"; - - vdd_cpu_b: regulator@40 { - compatible = "silergy,syr827"; - reg = <0x40>; - fcs,suspend-voltage-selector = <1>; - regulator-name = "vdd_cpu_b"; - regulator-min-microvolt = <712500>; - regulator-max-microvolt = <1500000>; - regulator-ramp-delay = <1000>; - regulator-always-on; - regulator-boot-on; - vin-supply = <&vcc5v0_sys>; - status = "okay"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_gpu: regulator@41 { - compatible = "silergy,syr828"; - reg = <0x41>; - fcs,suspend-voltage-selector = <1>; - regulator-name = "vdd_gpu"; - regulator-min-microvolt = <712500>; - regulator-max-microvolt = <1500000>; - regulator-ramp-delay = <1000>; - regulator-always-on; - regulator-boot-on; - vin-supply = <&vcc5v0_sys>; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - rk808: pmic@1b { - compatible = "rockchip,rk808"; - reg = <0x1b>; - interrupt-parent = <&gpio1>; - interrupts = <21 IRQ_TYPE_LEVEL_LOW>; - pinctrl-names = "default"; - pinctrl-0 = <&pmic_int_l>; - rockchip,system-power-controller; - wakeup-source; - #clock-cells = <1>; - clock-output-names = "xin32k", "rk808-clkout2"; - - vcc1-supply = <&vcc5v0_sys>; - vcc2-supply = <&vcc5v0_sys>; - vcc3-supply = <&vcc5v0_sys>; - vcc4-supply = <&vcc5v0_sys>; - vcc6-supply = <&vcc5v0_sys>; - vcc7-supply = <&vcc5v0_sys>; - vcc8-supply = <&vcc3v3_sys>; - vcc9-supply = <&vcc5v0_sys>; - vcc10-supply = <&vcc5v0_sys>; - vcc11-supply = <&vcc5v0_sys>; - vcc12-supply = <&vcc3v3_sys>; - vddio-supply = <&vcc_1v8>; - - regulators { - vdd_center: DCDC_REG1 { - regulator-name = "vdd_center"; - regulator-min-microvolt = <750000>; - regulator-max-microvolt = <1350000>; - regulator-always-on; - regulator-boot-on; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_cpu_l: DCDC_REG2 { - regulator-name = "vdd_cpu_l"; - regulator-min-microvolt = <750000>; - regulator-max-microvolt = <1350000>; - regulator-always-on; - regulator-boot-on; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_ddr: DCDC_REG3 { - regulator-name = "vcc_ddr"; - regulator-always-on; - regulator-boot-on; - regulator-state-mem { - regulator-on-in-suspend; - }; - }; - - vcc_1v8: DCDC_REG4 { - regulator-name = "vcc_1v8"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - regulator-boot-on; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vcc1v8_dvp: LDO_REG1 { - regulator-name = "vcc1v8_dvp"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - regulator-boot-on; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vcca1v8_hdmi: LDO_REG2 { - regulator-name = "vcca1v8_hdmi"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - regulator-boot-on; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vcca_1v8: LDO_REG3 { - regulator-name = "vcca_1v8"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - regulator-boot-on; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vcc_sd: LDO_REG4 { - regulator-name = "vcc_sd"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - regulator-boot-on; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <3300000>; - }; - }; - - vcc3v0_sd: LDO_REG5 { - regulator-name = "vcc3v0_sd"; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - regulator-always-on; - regulator-boot-on; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <3000000>; - }; - }; - - vcc_1v5: LDO_REG6 { - regulator-name = "vcc_1v5"; - regulator-min-microvolt = <1500000>; - regulator-max-microvolt = <1500000>; - regulator-always-on; - regulator-boot-on; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1500000>; - }; - }; - - vcca0v9_hdmi: LDO_REG7 { - regulator-name = "vcca0v9_hdmi"; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <900000>; - regulator-always-on; - regulator-boot-on; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <900000>; - }; - }; - - vcc_3v0: LDO_REG8 { - regulator-name = "vcc_3v0"; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - regulator-always-on; - regulator-boot-on; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <3000000>; - }; - }; - - vcc3v3_s3: SWITCH_REG1 { - regulator-name = "vcc3v3_s3"; - regulator-always-on; - regulator-boot-on; - regulator-state-mem { - regulator-on-in-suspend; - }; - }; - - vcc3v3_s0: SWITCH_REG2 { - regulator-name = "vcc3v3_s0"; - regulator-always-on; - regulator-boot-on; - regulator-state-mem { - regulator-on-in-suspend; - }; - }; - }; - }; -}; - -&i2c1 { - status = "okay"; -}; - -&i2c2 { - status = "okay"; -}; - -&i2c3 { - status = "okay"; -}; - -&i2c4 { - status = "okay"; -}; - -&i2s2 { - status = "okay"; -}; - -&io_domains { - bt656-supply = <&vcc1v8_s0>; /* bt656_gpio2ab_ms */ - audio-supply = <&vcc1v8_s0>; /* audio_gpio3d4a_ms */ - sdmmc-supply = <&vcc_sd>; /* sdmmc_gpio4b_ms */ - gpio1830-supply = <&vcc_3v0>; /* gpio1833_gpio4cd_ms */ - status = "okay"; -}; - -&pcie_phy { - status = "okay"; -}; - -&pcie0 { - num-lanes = <4>; - pinctrl-names = "default"; - pinctrl-0 = <&pcie_clkreqn_cpm>; - vpcie0v9-supply = <&vcc_0v9>; - vpcie1v8-supply = <&vcca_1v8>; - vpcie3v3-supply = <&vcc3v3_pcie>; - status = "okay"; -}; - -&pmu_io_domains { - pmu1830-supply = <&vcc_1v8>; - status = "okay"; -}; - -&pinctrl { - bt { - bt_enable_h: bt-enable-h { - rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - bt_host_wake_l: bt-host-wake-l { - rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - bt_wake_l: bt-wake-l { - rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - sdmmc { - sdmmc_bus1: sdmmc-bus1 { - rockchip,pins = - <4 RK_PB0 1 &pcfg_pull_up_8ma>; - }; - - sdmmc_bus4: sdmmc-bus4 { - rockchip,pins = - <4 RK_PB0 1 &pcfg_pull_up_8ma>, - <4 RK_PB1 1 &pcfg_pull_up_8ma>, - <4 RK_PB2 1 &pcfg_pull_up_8ma>, - <4 RK_PB3 1 &pcfg_pull_up_8ma>; - }; - - sdmmc_clk: sdmmc-clk { - rockchip,pins = - <4 RK_PB4 1 &pcfg_pull_none_18ma>; - }; - - sdmmc_cmd: sdmmc-cmd { - rockchip,pins = - <4 RK_PB5 1 &pcfg_pull_up_8ma>; - }; - }; - - sdio0 { - sdio0_bus4: sdio0-bus4 { - rockchip,pins = - <2 RK_PC4 1 &pcfg_pull_up_20ma>, - <2 RK_PC5 1 &pcfg_pull_up_20ma>, - <2 RK_PC6 1 &pcfg_pull_up_20ma>, - <2 RK_PC7 1 &pcfg_pull_up_20ma>; - }; - - sdio0_cmd: sdio0-cmd { - rockchip,pins = - <2 RK_PD0 1 &pcfg_pull_up_20ma>; - }; - - sdio0_clk: sdio0-clk { - rockchip,pins = - <2 RK_PD1 1 &pcfg_pull_none_20ma>; - }; - }; - - pmic { - pmic_int_l: pmic-int-l { - rockchip,pins = - <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>; - }; - - vsel1_pin: vsel1-pin { - rockchip,pins = - <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>; - }; - - vsel2_pin: vsel2-pin { - rockchip,pins = - <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>; - }; - }; - - sdio-pwrseq { - wifi_enable_h: wifi-enable-h { - rockchip,pins = - <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - wifi { - wifi_host_wake_l: wifi-host-wake-l { - rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; -}; - -&pwm2 { - status = "okay"; -}; - -&pwm3 { - status = "okay"; -}; - -&sdio0 { - bus-width = <4>; - clock-frequency = <50000000>; - cap-sdio-irq; - cap-sd-highspeed; - keep-power-in-suspend; - mmc-pwrseq = <&sdio_pwrseq>; - non-removable; - pinctrl-names = "default"; - pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>; - sd-uhs-sdr104; - #address-cells = <1>; - #size-cells = <0>; - status = "okay"; - - brcmf: wifi@1 { - compatible = "brcm,bcm4329-fmac"; - reg = <1>; - interrupt-parent = <&gpio0>; - interrupts = ; - interrupt-names = "host-wake"; - pinctrl-names = "default"; - pinctrl-0 = <&wifi_host_wake_l>; - }; -}; - -&sdhci { - bus-width = <8>; - mmc-hs400-1_8v; - mmc-hs400-enhanced-strobe; - non-removable; - status = "okay"; -}; - -&sdmmc { - bus-width = <4>; - cap-mmc-highspeed; - cap-sd-highspeed; - clock-frequency = <100000000>; - max-frequency = <100000000>; - cd-gpios = <&gpio0 7 GPIO_ACTIVE_LOW>; - disable-wp; - sd-uhs-sdr104; - vqmmc-supply = <&vcc_sd>; - card-detect-delay = <800>; - pinctrl-names = "default"; - pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>; - status = "okay"; -}; - -&tsadc { - rockchip,hw-tshut-mode = <1>; - rockchip,hw-tshut-polarity = <1>; - rockchip,hw-tshut-temp = <110000>; - status = "okay"; -}; - -&uart0 { - pinctrl-names = "default"; - pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>; - status = "okay"; - - bluetooth { - compatible = "brcm,bcm43438-bt"; - clocks = <&rk808 1>; - clock-names = "ext_clock"; - device-wakeup-gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_HIGH>; - host-wakeup-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>; - shutdown-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&bt_host_wake_l &bt_wake_l &bt_enable_h>; - }; -}; - -&uart2 { - status = "okay"; -}; - -&tcphy0 { - status = "okay"; -}; - -&tcphy1 { - status = "okay"; -}; - -&u2phy0 { - status = "okay"; -}; - -&u2phy1 { - status = "okay"; -}; - -&u2phy0_host { - phy-supply = <&vcc5v0_host>; - status = "okay"; -}; - -&u2phy1_host { - phy-supply = <&vcc5v0_host>; - status = "okay"; -}; - -&u2phy0_otg { - status = "okay"; -}; - -&u2phy1_otg { - status = "okay"; -}; - -&usb_host0_ehci { - status = "okay"; -}; - -&usb_host0_ohci { - status = "okay"; -}; - -&usb_host1_ehci { - status = "okay"; -}; - -&usb_host1_ohci { - status = "okay"; -}; - -&usbdrd3_0 { - status = "okay"; -}; - -&usbdrd_dwc3_0 { - status = "okay"; -}; - -&usbdrd3_1 { - status = "okay"; -}; - -&usbdrd_dwc3_1 { - status = "okay"; -}; - -&vopb { - status = "okay"; -}; - -&vopb_mmu { - status = "okay"; -}; - -&vopl { - status = "okay"; -}; - -&vopl_mmu { - status = "okay"; -}; diff --git a/arch/arm/dts/rk3399-rockpro64.dts b/arch/arm/dts/rk3399-rockpro64.dts deleted file mode 100644 index 4b42717800f..00000000000 --- a/arch/arm/dts/rk3399-rockpro64.dts +++ /dev/null @@ -1,30 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd. - * Copyright (c) 2018 Akash Gajjar - * Copyright (c) 2019 Katsuhiro Suzuki - */ - -/dts-v1/; -#include "rk3399-rockpro64.dtsi" - -/ { - model = "Pine64 RockPro64 v2.1"; - compatible = "pine64,rockpro64-v2.1", "pine64,rockpro64", "rockchip,rk3399"; -}; - -&i2c1 { - es8316: codec@11 { - compatible = "everest,es8316"; - reg = <0x11>; - clocks = <&cru SCLK_I2S_8CH_OUT>; - clock-names = "mclk"; - #sound-dai-cells = <0>; - - port { - es8316_p0_0: endpoint { - remote-endpoint = <&i2s1_p0_0>; - }; - }; - }; -}; diff --git a/arch/arm/dts/rk3399-rockpro64.dtsi b/arch/arm/dts/rk3399-rockpro64.dtsi deleted file mode 100644 index f30b82a10ca..00000000000 --- a/arch/arm/dts/rk3399-rockpro64.dtsi +++ /dev/null @@ -1,956 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd. - * Copyright (c) 2018 Akash Gajjar - */ - -#include -#include -#include "rk3399.dtsi" -#include "rk3399-opp.dtsi" - -/ { - aliases { - ethernet0 = &gmac; - mmc0 = &sdio0; - mmc1 = &sdmmc; - mmc2 = &sdhci; - }; - - chosen { - stdout-path = "serial2:1500000n8"; - }; - - /* enable for panel backlight support */ - backlight: backlight { - compatible = "pwm-backlight"; - brightness-levels = <0 4 8 16 32 64 128 255>; - default-brightness-level = <5>; - pwms = <&pwm0 0 1000000 0>; - status = "disabled"; - }; - - clkin_gmac: external-gmac-clock { - compatible = "fixed-clock"; - clock-frequency = <125000000>; - clock-output-names = "clkin_gmac"; - #clock-cells = <0>; - }; - - gpio-keys { - compatible = "gpio-keys"; - autorepeat; - pinctrl-names = "default"; - pinctrl-0 = <&pwrbtn>; - - key-power { - debounce-interval = <100>; - gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>; - label = "GPIO Key Power"; - linux,code = ; - wakeup-source; - }; - }; - - ir-receiver { - compatible = "gpio-ir-receiver"; - gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_LOW>; - pinctrl-0 = <&ir_int>; - pinctrl-names = "default"; - }; - - leds { - compatible = "gpio-leds"; - pinctrl-names = "default"; - pinctrl-0 = <&work_led_pin>, <&diy_led_pin>; - - work_led: led-0 { - label = "work"; - default-state = "on"; - gpios = <&gpio0 RK_PB3 GPIO_ACTIVE_HIGH>; - }; - - diy_led: led-1 { - label = "diy"; - default-state = "off"; - gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>; - }; - }; - - fan: pwm-fan { - compatible = "pwm-fan"; - cooling-levels = <0 100 150 200 255>; - #cooling-cells = <2>; - fan-supply = <&vcc12v_dcin>; - pwms = <&pwm1 0 50000 0>; - }; - - sdio_pwrseq: sdio-pwrseq { - compatible = "mmc-pwrseq-simple"; - clocks = <&rk808 1>; - clock-names = "ext_clock"; - pinctrl-names = "default"; - pinctrl-0 = <&wifi_enable_h>; - reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>; - }; - - sound { - compatible = "audio-graph-card"; - label = "Analog"; - dais = <&i2s1_p0>; - }; - - sound-dit { - compatible = "audio-graph-card"; - label = "SPDIF"; - dais = <&spdif_p0>; - }; - - spdif-dit { - compatible = "linux,spdif-dit"; - #sound-dai-cells = <0>; - - port { - dit_p0_0: endpoint { - remote-endpoint = <&spdif_p0_0>; - }; - }; - }; - - avdd: avdd-regulator { - compatible = "regulator-fixed"; - regulator-name = "avdd"; - regulator-min-microvolt = <11000000>; - regulator-max-microvolt = <11000000>; - vin-supply = <&vcc3v3_s0>; - }; - - vcc12v_dcin: vcc12v-dcin { - compatible = "regulator-fixed"; - regulator-name = "vcc12v_dcin"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <12000000>; - regulator-max-microvolt = <12000000>; - }; - - /* switched by pmic_sleep */ - vcc1v8_s3: vcca1v8_s3: vcc1v8-s3 { - compatible = "regulator-fixed"; - regulator-name = "vcc1v8_s3"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - vin-supply = <&vcc_1v8>; - }; - - /* micro SD card power */ - vcc3v0_sd: vcc3v0-sd { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <&gpio0 RK_PA1 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&sdmmc0_pwr_h>; - regulator-name = "vcc3v0_sd"; - regulator-always-on; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - vin-supply = <&vcc3v3_sys>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc3v3_pcie: vcc3v3-pcie-regulator { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <&gpio1 RK_PD0 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&pcie_pwr_en>; - regulator-name = "vcc3v3_pcie"; - regulator-always-on; - regulator-boot-on; - vin-supply = <&vcc12v_dcin>; - }; - - vcc3v3_sys: vcc3v3-sys { - compatible = "regulator-fixed"; - regulator-name = "vcc3v3_sys"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <&vcc5v0_sys>; - }; - - /* Actually 3 regulators (host0, 1, 2) controlled by the same gpio */ - vcc5v0_host: vcc5v0-host-regulator { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&vcc5v0_host_en>; - regulator-name = "vcc5v0_host"; - regulator-always-on; - vin-supply = <&vcc5v0_usb>; - }; - - vcc5v0_typec: vcc5v0-typec-regulator { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&vcc5v0_typec_en>; - regulator-name = "vcc5v0_typec"; - regulator-always-on; - vin-supply = <&vcc5v0_usb>; - }; - - vcc5v0_sys: vcc5v0-sys { - compatible = "regulator-fixed"; - regulator-name = "vcc5v0_sys"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - vin-supply = <&vcc12v_dcin>; - }; - - vcc5v0_usb: vcc5v0-usb { - compatible = "regulator-fixed"; - regulator-name = "vcc5v0_usb"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - vin-supply = <&vcc12v_dcin>; - }; - - vdd_log: vdd-log { - compatible = "pwm-regulator"; - pwms = <&pwm2 0 25000 1>; - pwm-supply = <&vcc5v0_sys>; - regulator-name = "vdd_log"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <1700000>; - }; -}; - -&cpu_l0 { - cpu-supply = <&vdd_cpu_l>; -}; - -&cpu_l1 { - cpu-supply = <&vdd_cpu_l>; -}; - -&cpu_l2 { - cpu-supply = <&vdd_cpu_l>; -}; - -&cpu_l3 { - cpu-supply = <&vdd_cpu_l>; -}; - -&cpu_b0 { - cpu-supply = <&vdd_cpu_b>; -}; - -&cpu_b1 { - cpu-supply = <&vdd_cpu_b>; -}; - -&cpu_thermal { - trips { - cpu_warm: cpu_warm { - temperature = <55000>; - hysteresis = <2000>; - type = "active"; - }; - - cpu_hot: cpu_hot { - temperature = <65000>; - hysteresis = <2000>; - type = "active"; - }; - }; - - cooling-maps { - map2 { - trip = <&cpu_warm>; - cooling-device = <&fan THERMAL_NO_LIMIT 1>; - }; - - map3 { - trip = <&cpu_hot>; - cooling-device = <&fan 2 THERMAL_NO_LIMIT>; - }; - }; -}; - -&emmc_phy { - status = "okay"; -}; - -&gmac { - assigned-clocks = <&cru SCLK_RMII_SRC>; - assigned-clock-parents = <&clkin_gmac>; - clock_in_out = "input"; - phy-supply = <&vcc_lan>; - phy-mode = "rgmii"; - pinctrl-names = "default"; - pinctrl-0 = <&rgmii_pins>; - snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; - snps,reset-active-low; - snps,reset-delays-us = <0 10000 50000>; - tx_delay = <0x28>; - rx_delay = <0x11>; - status = "okay"; -}; - -&hdmi { - ddc-i2c-bus = <&i2c3>; - pinctrl-names = "default"; - pinctrl-0 = <&hdmi_cec>; - status = "okay"; -}; - -&hdmi_sound { - status = "okay"; -}; - -&gpu { - mali-supply = <&vdd_gpu>; - status = "okay"; -}; - -&i2c0 { - clock-frequency = <400000>; - i2c-scl-rising-time-ns = <168>; - i2c-scl-falling-time-ns = <4>; - status = "okay"; - - rk808: pmic@1b { - compatible = "rockchip,rk808"; - reg = <0x1b>; - interrupt-parent = <&gpio3>; - interrupts = <10 IRQ_TYPE_LEVEL_LOW>; - #clock-cells = <1>; - clock-output-names = "xin32k", "rk808-clkout2"; - pinctrl-names = "default"; - pinctrl-0 = <&pmic_int_l>; - rockchip,system-power-controller; - wakeup-source; - - vcc1-supply = <&vcc5v0_sys>; - vcc2-supply = <&vcc5v0_sys>; - vcc3-supply = <&vcc5v0_sys>; - vcc4-supply = <&vcc5v0_sys>; - vcc6-supply = <&vcc5v0_sys>; - vcc7-supply = <&vcc5v0_sys>; - vcc8-supply = <&vcc3v3_sys>; - vcc9-supply = <&vcc5v0_sys>; - vcc10-supply = <&vcc5v0_sys>; - vcc11-supply = <&vcc5v0_sys>; - vcc12-supply = <&vcc3v3_sys>; - vddio-supply = <&vcca_1v8>; - - regulators { - vdd_center: DCDC_REG1 { - regulator-name = "vdd_center"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <750000>; - regulator-max-microvolt = <1350000>; - regulator-ramp-delay = <6001>; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_cpu_l: DCDC_REG2 { - regulator-name = "vdd_cpu_l"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <750000>; - regulator-max-microvolt = <1350000>; - regulator-ramp-delay = <6001>; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_ddr: DCDC_REG3 { - regulator-name = "vcc_ddr"; - regulator-always-on; - regulator-boot-on; - regulator-state-mem { - regulator-on-in-suspend; - }; - }; - - vcc_1v8: DCDC_REG4 { - regulator-name = "vcc_1v8"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vcc1v8_dvp: LDO_REG1 { - regulator-name = "vcc1v8_dvp"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc3v0_touch: LDO_REG2 { - regulator-name = "vcc3v0_touch"; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcca_1v8: LDO_REG3 { - regulator-name = "vcca_1v8"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vcc_sdio: LDO_REG4 { - regulator-name = "vcc_sdio"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3000000>; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <3000000>; - }; - }; - - vcca3v0_codec: LDO_REG5 { - regulator-name = "vcca3v0_codec"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_1v5: LDO_REG6 { - regulator-name = "vcc_1v5"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1500000>; - regulator-max-microvolt = <1500000>; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1500000>; - }; - }; - - vcca1v8_codec: LDO_REG7 { - regulator-name = "vcca1v8_codec"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_3v0: LDO_REG8 { - regulator-name = "vcc_3v0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <3000000>; - }; - }; - - vcc3v3_s3: vcc_lan: SWITCH_REG1 { - regulator-name = "vcc3v3_s3"; - regulator-always-on; - regulator-boot-on; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc3v3_s0: SWITCH_REG2 { - regulator-name = "vcc3v3_s0"; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - }; - }; - - vdd_cpu_b: regulator@40 { - compatible = "silergy,syr827"; - reg = <0x40>; - fcs,suspend-voltage-selector = <1>; - pinctrl-names = "default"; - pinctrl-0 = <&vsel1_pin>; - regulator-name = "vdd_cpu_b"; - regulator-min-microvolt = <712500>; - regulator-max-microvolt = <1500000>; - regulator-ramp-delay = <1000>; - regulator-always-on; - regulator-boot-on; - vin-supply = <&vcc5v0_sys>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_gpu: regulator@41 { - compatible = "silergy,syr828"; - reg = <0x41>; - fcs,suspend-voltage-selector = <1>; - pinctrl-names = "default"; - pinctrl-0 = <&vsel2_pin>; - regulator-name = "vdd_gpu"; - regulator-min-microvolt = <712500>; - regulator-max-microvolt = <1500000>; - regulator-ramp-delay = <1000>; - regulator-always-on; - regulator-boot-on; - vin-supply = <&vcc5v0_sys>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; -}; - -&i2c1 { - i2c-scl-rising-time-ns = <300>; - i2c-scl-falling-time-ns = <15>; - status = "okay"; -}; - -&i2c3 { - i2c-scl-rising-time-ns = <450>; - i2c-scl-falling-time-ns = <15>; - status = "okay"; -}; - -&i2c4 { - i2c-scl-rising-time-ns = <600>; - i2c-scl-falling-time-ns = <20>; - status = "okay"; - - fusb0: typec-portc@22 { - compatible = "fcs,fusb302"; - reg = <0x22>; - interrupt-parent = <&gpio1>; - interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&fusb0_int>; - vbus-supply = <&vcc5v0_typec>; - status = "okay"; - }; - - /* enable for pine64 touch screen support */ - touch: touchscreen@5d { - compatible = "goodix,gt911"; - reg = <0x5d>; - interrupt-parent = <&gpio4>; - interrupts = ; - AVDD28-supply = <&vcc3v0_touch>; - VDDIO-supply = <&vcc3v0_touch>; - irq-gpios = <&gpio4 RK_PD5 GPIO_ACTIVE_HIGH>; - reset-gpios = <&gpio4 RK_PD6 GPIO_ACTIVE_HIGH>; - status = "disabled"; - }; -}; - -&i2s0 { - rockchip,playback-channels = <8>; - rockchip,capture-channels = <8>; - status = "okay"; -}; - -&i2s1 { - rockchip,playback-channels = <2>; - rockchip,capture-channels = <2>; - status = "okay"; - - i2s1_p0: port { - i2s1_p0_0: endpoint { - dai-format = "i2s"; - mclk-fs = <256>; - remote-endpoint = <&es8316_p0_0>; - }; - }; -}; - -&i2s2 { - status = "okay"; -}; - -&io_domains { - status = "okay"; - - bt656-supply = <&vcc1v8_dvp>; - audio-supply = <&vcc_3v0>; - sdmmc-supply = <&vcc_sdio>; - gpio1830-supply = <&vcc_3v0>; -}; - -/* enable for pine64 panel display support */ -&mipi_dsi { - clock-master; - status = "disabled"; - - ports { - mipi_out: port@1 { - reg = <1>; - - mipi_out_panel: endpoint { - remote-endpoint = <&mipi_in_panel>; - }; - }; - }; - - mipi_panel: panel@0 { - compatible = "feiyang,fy07024di26a30d"; - reg = <0>; - avdd-supply = <&avdd>; - backlight = <&backlight>; - dvdd-supply = <&vcc3v3_s0>; - - port { - mipi_in_panel: endpoint { - remote-endpoint = <&mipi_out_panel>; - }; - }; - }; -}; - -&pcie0 { - ep-gpios = <&gpio2 RK_PD4 GPIO_ACTIVE_HIGH>; - num-lanes = <4>; - pinctrl-names = "default"; - pinctrl-0 = <&pcie_perst>; - vpcie12v-supply = <&vcc12v_dcin>; - vpcie3v3-supply = <&vcc3v3_pcie>; - status = "okay"; -}; - -&pcie_phy { - status = "okay"; -}; - -&pmu_io_domains { - pmu1830-supply = <&vcc_3v0>; - status = "okay"; -}; - -&pinctrl { - bt { - bt_enable_h: bt-enable-h { - rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - bt_host_wake_l: bt-host-wake-l { - rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_down>; - }; - - bt_wake_l: bt-wake-l { - rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - buttons { - pwrbtn: pwrbtn { - rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - fusb302x { - fusb0_int: fusb0-int { - rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - ir { - ir_int: ir-int { - rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - leds { - work_led_pin: work-led-pin { - rockchip,pins = <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - diy_led_pin: diy-led-pin { - rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - pcie { - pcie_perst: pcie-perst { - rockchip,pins = <2 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - pcie_pwr_en: pcie-pwr-en { - rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - pmic { - pmic_int_l: pmic-int-l { - rockchip,pins = <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>; - }; - - vsel1_pin: vsel1-pin { - rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>; - }; - - vsel2_pin: vsel2-pin { - rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>; - }; - }; - - sdcard { - sdmmc0_pwr_h: sdmmc0-pwr-h { - rockchip,pins = <0 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - }; - - sdio-pwrseq { - wifi_enable_h: wifi-enable-h { - rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - usb-typec { - vcc5v0_typec_en: vcc5v0_typec_en { - rockchip,pins = <1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - usb2 { - vcc5v0_host_en: vcc5v0-host-en { - rockchip,pins = <4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; -}; - -&pwm0 { - status = "okay"; -}; - -&pwm1 { - status = "okay"; -}; - -&pwm2 { - status = "okay"; -}; - -&saradc { - vref-supply = <&vcca1v8_s3>; - status = "okay"; -}; - -&sdio0 { - bus-width = <4>; - cap-sd-highspeed; - cap-sdio-irq; - disable-wp; - keep-power-in-suspend; - mmc-pwrseq = <&sdio_pwrseq>; - non-removable; - pinctrl-names = "default"; - pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>; - sd-uhs-sdr104; - status = "okay"; -}; - -&sdmmc { - bus-width = <4>; - cap-sd-highspeed; - cd-gpios = <&gpio0 7 GPIO_ACTIVE_LOW>; - disable-wp; - max-frequency = <150000000>; - pinctrl-names = "default"; - pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>; - vmmc-supply = <&vcc3v0_sd>; - vqmmc-supply = <&vcc_sdio>; - status = "okay"; -}; - -&sdhci { - bus-width = <8>; - mmc-hs200-1_8v; - non-removable; - status = "okay"; -}; - -&spdif { - pinctrl-0 = <&spdif_bus_1>; - - spdif_p0: port { - spdif_p0_0: endpoint { - remote-endpoint = <&dit_p0_0>; - }; - }; -}; - -&spi1 { - status = "okay"; - - flash@0 { - compatible = "jedec,spi-nor"; - reg = <0>; - spi-max-frequency = <10000000>; - }; -}; - -&tcphy0 { - status = "okay"; -}; - -&tcphy1 { - status = "okay"; -}; - -&tsadc { - /* tshut mode 0:CRU 1:GPIO */ - rockchip,hw-tshut-mode = <1>; - /* tshut polarity 0:LOW 1:HIGH */ - rockchip,hw-tshut-polarity = <1>; - status = "okay"; -}; - -&u2phy0 { - status = "okay"; - - u2phy0_otg: otg-port { - status = "okay"; - }; - - u2phy0_host: host-port { - phy-supply = <&vcc5v0_host>; - status = "okay"; - }; -}; - -&u2phy1 { - status = "okay"; - - u2phy1_otg: otg-port { - status = "okay"; - }; - - u2phy1_host: host-port { - phy-supply = <&vcc5v0_host>; - status = "okay"; - }; -}; - -&uart0 { - pinctrl-names = "default"; - pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>; - status = "okay"; - - bluetooth { - compatible = "brcm,bcm43438-bt"; - clocks = <&rk808 1>; - clock-names = "lpo"; - device-wakeup-gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_HIGH>; - host-wakeup-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>; - shutdown-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&bt_host_wake_l &bt_wake_l &bt_enable_h>; - vbat-supply = <&vcc3v3_sys>; - vddio-supply = <&vcc_1v8>; - }; -}; - -&uart2 { - status = "okay"; -}; - -&usb_host0_ehci { - status = "okay"; -}; - -&usb_host0_ohci { - status = "okay"; -}; - -&usb_host1_ehci { - status = "okay"; -}; - -&usb_host1_ohci { - status = "okay"; -}; - -&usbdrd3_0 { - status = "okay"; -}; - -&usbdrd_dwc3_0 { - status = "okay"; - dr_mode = "host"; -}; - -&usbdrd3_1 { - status = "okay"; -}; - -&usbdrd_dwc3_1 { - status = "okay"; - dr_mode = "host"; -}; - -&vopb { - status = "okay"; -}; - -&vopb_mmu { - status = "okay"; -}; - -&vopl { - status = "okay"; -}; - -&vopl_mmu { - status = "okay"; -}; diff --git a/arch/arm/dts/rk3399-t-opp.dtsi b/arch/arm/dts/rk3399-t-opp.dtsi deleted file mode 100644 index 1ababadda9d..00000000000 --- a/arch/arm/dts/rk3399-t-opp.dtsi +++ /dev/null @@ -1,114 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (c) 2016-2017 Fuzhou Rockchip Electronics Co., Ltd - * Copyright (c) 2022 Radxa Limited - */ - -/ { - cluster0_opp: opp-table-0 { - compatible = "operating-points-v2"; - opp-shared; - - opp00 { - opp-hz = /bits/ 64 <408000000>; - opp-microvolt = <875000 875000 1250000>; - clock-latency-ns = <40000>; - }; - opp01 { - opp-hz = /bits/ 64 <600000000>; - opp-microvolt = <875000 875000 1250000>; - }; - opp02 { - opp-hz = /bits/ 64 <816000000>; - opp-microvolt = <900000 900000 1250000>; - }; - opp03 { - opp-hz = /bits/ 64 <1008000000>; - opp-microvolt = <975000 975000 1250000>; - }; - }; - - cluster1_opp: opp-table-1 { - compatible = "operating-points-v2"; - opp-shared; - - opp00 { - opp-hz = /bits/ 64 <408000000>; - opp-microvolt = <875000 875000 1250000>; - clock-latency-ns = <40000>; - }; - opp01 { - opp-hz = /bits/ 64 <600000000>; - opp-microvolt = <875000 875000 1250000>; - }; - opp02 { - opp-hz = /bits/ 64 <816000000>; - opp-microvolt = <875000 875000 1250000>; - }; - opp03 { - opp-hz = /bits/ 64 <1008000000>; - opp-microvolt = <925000 925000 1250000>; - }; - opp04 { - opp-hz = /bits/ 64 <1200000000>; - opp-microvolt = <1000000 1000000 1250000>; - }; - opp05 { - opp-hz = /bits/ 64 <1416000000>; - opp-microvolt = <1075000 1075000 1250000>; - }; - opp06 { - opp-hz = /bits/ 64 <1512000000>; - opp-microvolt = <1150000 1150000 1250000>; - }; - }; - - gpu_opp_table: opp-table-2 { - compatible = "operating-points-v2"; - - opp00 { - opp-hz = /bits/ 64 <200000000>; - opp-microvolt = <875000 875000 1150000>; - }; - opp01 { - opp-hz = /bits/ 64 <300000000>; - opp-microvolt = <875000 875000 1150000>; - }; - opp02 { - opp-hz = /bits/ 64 <400000000>; - opp-microvolt = <875000 875000 1150000>; - }; - opp03 { - opp-hz = /bits/ 64 <600000000>; - opp-microvolt = <975000 975000 1150000>; - }; - }; -}; - -&cpu_l0 { - operating-points-v2 = <&cluster0_opp>; -}; - -&cpu_l1 { - operating-points-v2 = <&cluster0_opp>; -}; - -&cpu_l2 { - operating-points-v2 = <&cluster0_opp>; -}; - -&cpu_l3 { - operating-points-v2 = <&cluster0_opp>; -}; - -&cpu_b0 { - operating-points-v2 = <&cluster1_opp>; -}; - -&cpu_b1 { - operating-points-v2 = <&cluster1_opp>; -}; - -&gpu { - operating-points-v2 = <&gpu_opp_table>; -}; diff --git a/arch/arm/dts/rk3399.dtsi b/arch/arm/dts/rk3399.dtsi deleted file mode 100644 index 6e12c5a920c..00000000000 --- a/arch/arm/dts/rk3399.dtsi +++ /dev/null @@ -1,2945 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd - */ - -#include -#include -#include -#include -#include -#include -#include - -/ { - compatible = "rockchip,rk3399"; - - interrupt-parent = <&gic>; - #address-cells = <2>; - #size-cells = <2>; - - aliases { - gpio0 = &gpio0; - gpio1 = &gpio1; - gpio2 = &gpio2; - gpio3 = &gpio3; - gpio4 = &gpio4; - i2c0 = &i2c0; - i2c1 = &i2c1; - i2c2 = &i2c2; - i2c3 = &i2c3; - i2c4 = &i2c4; - i2c5 = &i2c5; - i2c6 = &i2c6; - i2c7 = &i2c7; - i2c8 = &i2c8; - serial0 = &uart0; - serial1 = &uart1; - serial2 = &uart2; - serial3 = &uart3; - serial4 = &uart4; - }; - - cpus { - #address-cells = <2>; - #size-cells = <0>; - - cpu-map { - cluster0 { - core0 { - cpu = <&cpu_l0>; - }; - core1 { - cpu = <&cpu_l1>; - }; - core2 { - cpu = <&cpu_l2>; - }; - core3 { - cpu = <&cpu_l3>; - }; - }; - - cluster1 { - core0 { - cpu = <&cpu_b0>; - }; - core1 { - cpu = <&cpu_b1>; - }; - }; - }; - - cpu_l0: cpu@0 { - device_type = "cpu"; - compatible = "arm,cortex-a53"; - reg = <0x0 0x0>; - enable-method = "psci"; - capacity-dmips-mhz = <485>; - clocks = <&cru ARMCLKL>; - #cooling-cells = <2>; /* min followed by max */ - dynamic-power-coefficient = <100>; - cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>; - }; - - cpu_l1: cpu@1 { - device_type = "cpu"; - compatible = "arm,cortex-a53"; - reg = <0x0 0x1>; - enable-method = "psci"; - capacity-dmips-mhz = <485>; - clocks = <&cru ARMCLKL>; - #cooling-cells = <2>; /* min followed by max */ - dynamic-power-coefficient = <100>; - cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>; - }; - - cpu_l2: cpu@2 { - device_type = "cpu"; - compatible = "arm,cortex-a53"; - reg = <0x0 0x2>; - enable-method = "psci"; - capacity-dmips-mhz = <485>; - clocks = <&cru ARMCLKL>; - #cooling-cells = <2>; /* min followed by max */ - dynamic-power-coefficient = <100>; - cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>; - }; - - cpu_l3: cpu@3 { - device_type = "cpu"; - compatible = "arm,cortex-a53"; - reg = <0x0 0x3>; - enable-method = "psci"; - capacity-dmips-mhz = <485>; - clocks = <&cru ARMCLKL>; - #cooling-cells = <2>; /* min followed by max */ - dynamic-power-coefficient = <100>; - cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>; - }; - - cpu_b0: cpu@100 { - device_type = "cpu"; - compatible = "arm,cortex-a72"; - reg = <0x0 0x100>; - enable-method = "psci"; - capacity-dmips-mhz = <1024>; - clocks = <&cru ARMCLKB>; - #cooling-cells = <2>; /* min followed by max */ - dynamic-power-coefficient = <436>; - cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>; - - thermal-idle { - #cooling-cells = <2>; - duration-us = <10000>; - exit-latency-us = <500>; - }; - }; - - cpu_b1: cpu@101 { - device_type = "cpu"; - compatible = "arm,cortex-a72"; - reg = <0x0 0x101>; - enable-method = "psci"; - capacity-dmips-mhz = <1024>; - clocks = <&cru ARMCLKB>; - #cooling-cells = <2>; /* min followed by max */ - dynamic-power-coefficient = <436>; - cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>; - - thermal-idle { - #cooling-cells = <2>; - duration-us = <10000>; - exit-latency-us = <500>; - }; - }; - - idle-states { - entry-method = "psci"; - - CPU_SLEEP: cpu-sleep { - compatible = "arm,idle-state"; - local-timer-stop; - arm,psci-suspend-param = <0x0010000>; - entry-latency-us = <120>; - exit-latency-us = <250>; - min-residency-us = <900>; - }; - - CLUSTER_SLEEP: cluster-sleep { - compatible = "arm,idle-state"; - local-timer-stop; - arm,psci-suspend-param = <0x1010000>; - entry-latency-us = <400>; - exit-latency-us = <500>; - min-residency-us = <2000>; - }; - }; - }; - - display-subsystem { - compatible = "rockchip,display-subsystem"; - ports = <&vopl_out>, <&vopb_out>; - }; - - dmc: memory-controller { - compatible = "rockchip,rk3399-dmc"; - rockchip,pmu = <&pmugrf>; - devfreq-events = <&dfi>; - clocks = <&cru SCLK_DDRC>; - clock-names = "dmc_clk"; - status = "disabled"; - }; - - pmu_a53 { - compatible = "arm,cortex-a53-pmu"; - interrupts = ; - }; - - pmu_a72 { - compatible = "arm,cortex-a72-pmu"; - interrupts = ; - }; - - psci { - compatible = "arm,psci-1.0"; - method = "smc"; - }; - - timer { - compatible = "arm,armv8-timer"; - interrupts = , - , - , - ; - arm,no-tick-in-suspend; - }; - - xin24m: xin24m { - compatible = "fixed-clock"; - clock-frequency = <24000000>; - clock-output-names = "xin24m"; - #clock-cells = <0>; - }; - - pcie0: pcie@f8000000 { - compatible = "rockchip,rk3399-pcie"; - reg = <0x0 0xf8000000 0x0 0x2000000>, - <0x0 0xfd000000 0x0 0x1000000>; - reg-names = "axi-base", "apb-base"; - device_type = "pci"; - #address-cells = <3>; - #size-cells = <2>; - #interrupt-cells = <1>; - aspm-no-l0s; - bus-range = <0x0 0x1f>; - clocks = <&cru ACLK_PCIE>, <&cru ACLK_PERF_PCIE>, - <&cru PCLK_PCIE>, <&cru SCLK_PCIE_PM>; - clock-names = "aclk", "aclk-perf", - "hclk", "pm"; - interrupts = , - , - ; - interrupt-names = "sys", "legacy", "client"; - interrupt-map-mask = <0 0 0 7>; - interrupt-map = <0 0 0 1 &pcie0_intc 0>, - <0 0 0 2 &pcie0_intc 1>, - <0 0 0 3 &pcie0_intc 2>, - <0 0 0 4 &pcie0_intc 3>; - max-link-speed = <1>; - msi-map = <0x0 &its 0x0 0x1000>; - phys = <&pcie_phy 0>, <&pcie_phy 1>, - <&pcie_phy 2>, <&pcie_phy 3>; - phy-names = "pcie-phy-0", "pcie-phy-1", - "pcie-phy-2", "pcie-phy-3"; - ranges = <0x82000000 0x0 0xfa000000 0x0 0xfa000000 0x0 0x1e00000>, - <0x81000000 0x0 0xfbe00000 0x0 0xfbe00000 0x0 0x100000>; - resets = <&cru SRST_PCIE_CORE>, <&cru SRST_PCIE_MGMT>, - <&cru SRST_PCIE_MGMT_STICKY>, <&cru SRST_PCIE_PIPE>, - <&cru SRST_PCIE_PM>, <&cru SRST_P_PCIE>, - <&cru SRST_A_PCIE>; - reset-names = "core", "mgmt", "mgmt-sticky", "pipe", - "pm", "pclk", "aclk"; - status = "disabled"; - - pcie0_intc: interrupt-controller { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <1>; - }; - }; - - pcie0_ep: pcie-ep@f8000000 { - compatible = "rockchip,rk3399-pcie-ep"; - reg = <0x0 0xfd000000 0x0 0x1000000>, - <0x0 0xfa000000 0x0 0x2000000>; - reg-names = "apb-base", "mem-base"; - clocks = <&cru ACLK_PCIE>, <&cru ACLK_PERF_PCIE>, - <&cru PCLK_PCIE>, <&cru SCLK_PCIE_PM>; - clock-names = "aclk", "aclk-perf", - "hclk", "pm"; - max-functions = /bits/ 8 <8>; - num-lanes = <4>; - resets = <&cru SRST_PCIE_CORE>, <&cru SRST_PCIE_MGMT>, - <&cru SRST_PCIE_MGMT_STICKY>, <&cru SRST_PCIE_PIPE>, - <&cru SRST_PCIE_PM>, <&cru SRST_P_PCIE>, - <&cru SRST_A_PCIE>; - reset-names = "core", "mgmt", "mgmt-sticky", "pipe", - "pm", "pclk", "aclk"; - phys = <&pcie_phy 0>, <&pcie_phy 1>, - <&pcie_phy 2>, <&pcie_phy 3>; - phy-names = "pcie-phy-0", "pcie-phy-1", - "pcie-phy-2", "pcie-phy-3"; - rockchip,max-outbound-regions = <32>; - pinctrl-names = "default"; - pinctrl-0 = <&pcie_clkreqnb_cpm>; - status = "disabled"; - }; - - gmac: ethernet@fe300000 { - compatible = "rockchip,rk3399-gmac"; - reg = <0x0 0xfe300000 0x0 0x10000>; - interrupts = ; - interrupt-names = "macirq"; - clocks = <&cru SCLK_MAC>, <&cru SCLK_MAC_RX>, - <&cru SCLK_MAC_TX>, <&cru SCLK_MACREF>, - <&cru SCLK_MACREF_OUT>, <&cru ACLK_GMAC>, - <&cru PCLK_GMAC>; - clock-names = "stmmaceth", "mac_clk_rx", - "mac_clk_tx", "clk_mac_ref", - "clk_mac_refout", "aclk_mac", - "pclk_mac"; - power-domains = <&power RK3399_PD_GMAC>; - resets = <&cru SRST_A_GMAC>; - reset-names = "stmmaceth"; - rockchip,grf = <&grf>; - snps,txpbl = <0x4>; - status = "disabled"; - }; - - sdio0: mmc@fe310000 { - compatible = "rockchip,rk3399-dw-mshc", - "rockchip,rk3288-dw-mshc"; - reg = <0x0 0xfe310000 0x0 0x4000>; - interrupts = ; - max-frequency = <150000000>; - clocks = <&cru HCLK_SDIO>, <&cru SCLK_SDIO>, - <&cru SCLK_SDIO_DRV>, <&cru SCLK_SDIO_SAMPLE>; - clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; - fifo-depth = <0x100>; - power-domains = <&power RK3399_PD_SDIOAUDIO>; - resets = <&cru SRST_SDIO0>; - reset-names = "reset"; - status = "disabled"; - }; - - sdmmc: mmc@fe320000 { - compatible = "rockchip,rk3399-dw-mshc", - "rockchip,rk3288-dw-mshc"; - reg = <0x0 0xfe320000 0x0 0x4000>; - interrupts = ; - max-frequency = <150000000>; - assigned-clocks = <&cru HCLK_SD>; - assigned-clock-rates = <200000000>; - clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>, - <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>; - clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; - fifo-depth = <0x100>; - power-domains = <&power RK3399_PD_SD>; - resets = <&cru SRST_SDMMC>; - reset-names = "reset"; - status = "disabled"; - }; - - sdhci: mmc@fe330000 { - compatible = "rockchip,rk3399-sdhci-5.1", "arasan,sdhci-5.1"; - reg = <0x0 0xfe330000 0x0 0x10000>; - interrupts = ; - arasan,soc-ctl-syscon = <&grf>; - assigned-clocks = <&cru SCLK_EMMC>; - assigned-clock-rates = <200000000>; - clocks = <&cru SCLK_EMMC>, <&cru ACLK_EMMC>; - clock-names = "clk_xin", "clk_ahb"; - clock-output-names = "emmc_cardclock"; - #clock-cells = <0>; - phys = <&emmc_phy>; - phy-names = "phy_arasan"; - power-domains = <&power RK3399_PD_EMMC>; - disable-cqe-dcmd; - status = "disabled"; - }; - - usb_host0_ehci: usb@fe380000 { - compatible = "generic-ehci"; - reg = <0x0 0xfe380000 0x0 0x20000>; - interrupts = ; - clocks = <&cru HCLK_HOST0>, <&cru HCLK_HOST0_ARB>, - <&u2phy0>; - phys = <&u2phy0_host>; - phy-names = "usb"; - status = "disabled"; - }; - - usb_host0_ohci: usb@fe3a0000 { - compatible = "generic-ohci"; - reg = <0x0 0xfe3a0000 0x0 0x20000>; - interrupts = ; - clocks = <&cru HCLK_HOST0>, <&cru HCLK_HOST0_ARB>, - <&u2phy0>; - phys = <&u2phy0_host>; - phy-names = "usb"; - status = "disabled"; - }; - - usb_host1_ehci: usb@fe3c0000 { - compatible = "generic-ehci"; - reg = <0x0 0xfe3c0000 0x0 0x20000>; - interrupts = ; - clocks = <&cru HCLK_HOST1>, <&cru HCLK_HOST1_ARB>, - <&u2phy1>; - phys = <&u2phy1_host>; - phy-names = "usb"; - status = "disabled"; - }; - - usb_host1_ohci: usb@fe3e0000 { - compatible = "generic-ohci"; - reg = <0x0 0xfe3e0000 0x0 0x20000>; - interrupts = ; - clocks = <&cru HCLK_HOST1>, <&cru HCLK_HOST1_ARB>, - <&u2phy1>; - phys = <&u2phy1_host>; - phy-names = "usb"; - status = "disabled"; - }; - - debug@fe430000 { - compatible = "arm,coresight-cpu-debug", "arm,primecell"; - reg = <0 0xfe430000 0 0x1000>; - clocks = <&cru PCLK_COREDBG_L>; - clock-names = "apb_pclk"; - cpu = <&cpu_l0>; - }; - - debug@fe432000 { - compatible = "arm,coresight-cpu-debug", "arm,primecell"; - reg = <0 0xfe432000 0 0x1000>; - clocks = <&cru PCLK_COREDBG_L>; - clock-names = "apb_pclk"; - cpu = <&cpu_l1>; - }; - - debug@fe434000 { - compatible = "arm,coresight-cpu-debug", "arm,primecell"; - reg = <0 0xfe434000 0 0x1000>; - clocks = <&cru PCLK_COREDBG_L>; - clock-names = "apb_pclk"; - cpu = <&cpu_l2>; - }; - - debug@fe436000 { - compatible = "arm,coresight-cpu-debug", "arm,primecell"; - reg = <0 0xfe436000 0 0x1000>; - clocks = <&cru PCLK_COREDBG_L>; - clock-names = "apb_pclk"; - cpu = <&cpu_l3>; - }; - - debug@fe610000 { - compatible = "arm,coresight-cpu-debug", "arm,primecell"; - reg = <0 0xfe610000 0 0x1000>; - clocks = <&cru PCLK_COREDBG_B>; - clock-names = "apb_pclk"; - cpu = <&cpu_b0>; - }; - - debug@fe710000 { - compatible = "arm,coresight-cpu-debug", "arm,primecell"; - reg = <0 0xfe710000 0 0x1000>; - clocks = <&cru PCLK_COREDBG_B>; - clock-names = "apb_pclk"; - cpu = <&cpu_b1>; - }; - - usbdrd3_0: usb@fe800000 { - compatible = "rockchip,rk3399-dwc3"; - #address-cells = <2>; - #size-cells = <2>; - ranges; - clocks = <&cru SCLK_USB3OTG0_REF>, <&cru SCLK_USB3OTG0_SUSPEND>, - <&cru ACLK_USB3OTG0>, <&cru ACLK_USB3_RKSOC_AXI_PERF>, - <&cru ACLK_USB3>, <&cru ACLK_USB3_GRF>; - clock-names = "ref_clk", "suspend_clk", - "bus_clk", "aclk_usb3_rksoc_axi_perf", - "aclk_usb3", "grf_clk"; - resets = <&cru SRST_A_USB3_OTG0>; - reset-names = "usb3-otg"; - status = "disabled"; - - usbdrd_dwc3_0: usb@fe800000 { - compatible = "snps,dwc3"; - reg = <0x0 0xfe800000 0x0 0x100000>; - interrupts = ; - clocks = <&cru SCLK_USB3OTG0_REF>, <&cru ACLK_USB3OTG0>, - <&cru SCLK_USB3OTG0_SUSPEND>; - clock-names = "ref", "bus_early", "suspend"; - dr_mode = "otg"; - phys = <&u2phy0_otg>, <&tcphy0_usb3>; - phy-names = "usb2-phy", "usb3-phy"; - phy_type = "utmi_wide"; - snps,dis_enblslpm_quirk; - snps,dis-u2-freeclk-exists-quirk; - snps,dis_u2_susphy_quirk; - snps,dis-del-phy-power-chg-quirk; - snps,dis-tx-ipgap-linecheck-quirk; - power-domains = <&power RK3399_PD_USB3>; - status = "disabled"; - }; - }; - - usbdrd3_1: usb@fe900000 { - compatible = "rockchip,rk3399-dwc3"; - #address-cells = <2>; - #size-cells = <2>; - ranges; - clocks = <&cru SCLK_USB3OTG1_REF>, <&cru SCLK_USB3OTG1_SUSPEND>, - <&cru ACLK_USB3OTG1>, <&cru ACLK_USB3_RKSOC_AXI_PERF>, - <&cru ACLK_USB3>, <&cru ACLK_USB3_GRF>; - clock-names = "ref_clk", "suspend_clk", - "bus_clk", "aclk_usb3_rksoc_axi_perf", - "aclk_usb3", "grf_clk"; - resets = <&cru SRST_A_USB3_OTG1>; - reset-names = "usb3-otg"; - status = "disabled"; - - usbdrd_dwc3_1: usb@fe900000 { - compatible = "snps,dwc3"; - reg = <0x0 0xfe900000 0x0 0x100000>; - interrupts = ; - clocks = <&cru SCLK_USB3OTG1_REF>, <&cru ACLK_USB3OTG1>, - <&cru SCLK_USB3OTG1_SUSPEND>; - clock-names = "ref", "bus_early", "suspend"; - dr_mode = "otg"; - phys = <&u2phy1_otg>, <&tcphy1_usb3>; - phy-names = "usb2-phy", "usb3-phy"; - phy_type = "utmi_wide"; - snps,dis_enblslpm_quirk; - snps,dis-u2-freeclk-exists-quirk; - snps,dis_u2_susphy_quirk; - snps,dis-del-phy-power-chg-quirk; - snps,dis-tx-ipgap-linecheck-quirk; - power-domains = <&power RK3399_PD_USB3>; - status = "disabled"; - }; - }; - - cdn_dp: dp@fec00000 { - compatible = "rockchip,rk3399-cdn-dp"; - reg = <0x0 0xfec00000 0x0 0x100000>; - interrupts = ; - assigned-clocks = <&cru SCLK_DP_CORE>, <&cru SCLK_SPDIF_REC_DPTX>; - assigned-clock-rates = <100000000>, <200000000>; - clocks = <&cru SCLK_DP_CORE>, <&cru PCLK_DP_CTRL>, - <&cru SCLK_SPDIF_REC_DPTX>, <&cru PCLK_VIO_GRF>; - clock-names = "core-clk", "pclk", "spdif", "grf"; - phys = <&tcphy0_dp>, <&tcphy1_dp>; - power-domains = <&power RK3399_PD_HDCP>; - resets = <&cru SRST_DPTX_SPDIF_REC>, <&cru SRST_P_UPHY0_DPTX>, - <&cru SRST_P_UPHY0_APB>, <&cru SRST_DP_CORE>; - reset-names = "spdif", "dptx", "apb", "core"; - rockchip,grf = <&grf>; - #sound-dai-cells = <1>; - status = "disabled"; - - ports { - dp_in: port { - #address-cells = <1>; - #size-cells = <0>; - - dp_in_vopb: endpoint@0 { - reg = <0>; - remote-endpoint = <&vopb_out_dp>; - }; - - dp_in_vopl: endpoint@1 { - reg = <1>; - remote-endpoint = <&vopl_out_dp>; - }; - }; - }; - }; - - gic: interrupt-controller@fee00000 { - compatible = "arm,gic-v3"; - #interrupt-cells = <4>; - #address-cells = <2>; - #size-cells = <2>; - ranges; - interrupt-controller; - - reg = <0x0 0xfee00000 0 0x10000>, /* GICD */ - <0x0 0xfef00000 0 0xc0000>, /* GICR */ - <0x0 0xfff00000 0 0x10000>, /* GICC */ - <0x0 0xfff10000 0 0x10000>, /* GICH */ - <0x0 0xfff20000 0 0x10000>; /* GICV */ - interrupts = ; - its: msi-controller@fee20000 { - compatible = "arm,gic-v3-its"; - msi-controller; - #msi-cells = <1>; - reg = <0x0 0xfee20000 0x0 0x20000>; - }; - - ppi-partitions { - ppi_cluster0: interrupt-partition-0 { - affinity = <&cpu_l0 &cpu_l1 &cpu_l2 &cpu_l3>; - }; - - ppi_cluster1: interrupt-partition-1 { - affinity = <&cpu_b0 &cpu_b1>; - }; - }; - }; - - saradc: saradc@ff100000 { - compatible = "rockchip,rk3399-saradc"; - reg = <0x0 0xff100000 0x0 0x100>; - interrupts = ; - #io-channel-cells = <1>; - clocks = <&cru SCLK_SARADC>, <&cru PCLK_SARADC>; - clock-names = "saradc", "apb_pclk"; - resets = <&cru SRST_P_SARADC>; - reset-names = "saradc-apb"; - status = "disabled"; - }; - - crypto0: crypto@ff8b0000 { - compatible = "rockchip,rk3399-crypto"; - reg = <0x0 0xff8b0000 0x0 0x4000>; - interrupts = ; - clocks = <&cru HCLK_M_CRYPTO0>, <&cru HCLK_S_CRYPTO0>, <&cru SCLK_CRYPTO0>; - clock-names = "hclk_master", "hclk_slave", "sclk"; - resets = <&cru SRST_CRYPTO0>, <&cru SRST_CRYPTO0_S>, <&cru SRST_CRYPTO0_M>; - reset-names = "master", "slave", "crypto-rst"; - }; - - crypto1: crypto@ff8b8000 { - compatible = "rockchip,rk3399-crypto"; - reg = <0x0 0xff8b8000 0x0 0x4000>; - interrupts = ; - clocks = <&cru HCLK_M_CRYPTO1>, <&cru HCLK_S_CRYPTO1>, <&cru SCLK_CRYPTO1>; - clock-names = "hclk_master", "hclk_slave", "sclk"; - resets = <&cru SRST_CRYPTO1>, <&cru SRST_CRYPTO1_S>, <&cru SRST_CRYPTO1_M>; - reset-names = "master", "slave", "crypto-rst"; - }; - - i2c1: i2c@ff110000 { - compatible = "rockchip,rk3399-i2c"; - reg = <0x0 0xff110000 0x0 0x1000>; - assigned-clocks = <&cru SCLK_I2C1>; - assigned-clock-rates = <200000000>; - clocks = <&cru SCLK_I2C1>, <&cru PCLK_I2C1>; - clock-names = "i2c", "pclk"; - interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&i2c1_xfer>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - i2c2: i2c@ff120000 { - compatible = "rockchip,rk3399-i2c"; - reg = <0x0 0xff120000 0x0 0x1000>; - assigned-clocks = <&cru SCLK_I2C2>; - assigned-clock-rates = <200000000>; - clocks = <&cru SCLK_I2C2>, <&cru PCLK_I2C2>; - clock-names = "i2c", "pclk"; - interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&i2c2_xfer>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - i2c3: i2c@ff130000 { - compatible = "rockchip,rk3399-i2c"; - reg = <0x0 0xff130000 0x0 0x1000>; - assigned-clocks = <&cru SCLK_I2C3>; - assigned-clock-rates = <200000000>; - clocks = <&cru SCLK_I2C3>, <&cru PCLK_I2C3>; - clock-names = "i2c", "pclk"; - interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&i2c3_xfer>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - i2c5: i2c@ff140000 { - compatible = "rockchip,rk3399-i2c"; - reg = <0x0 0xff140000 0x0 0x1000>; - assigned-clocks = <&cru SCLK_I2C5>; - assigned-clock-rates = <200000000>; - clocks = <&cru SCLK_I2C5>, <&cru PCLK_I2C5>; - clock-names = "i2c", "pclk"; - interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&i2c5_xfer>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - i2c6: i2c@ff150000 { - compatible = "rockchip,rk3399-i2c"; - reg = <0x0 0xff150000 0x0 0x1000>; - assigned-clocks = <&cru SCLK_I2C6>; - assigned-clock-rates = <200000000>; - clocks = <&cru SCLK_I2C6>, <&cru PCLK_I2C6>; - clock-names = "i2c", "pclk"; - interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&i2c6_xfer>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - i2c7: i2c@ff160000 { - compatible = "rockchip,rk3399-i2c"; - reg = <0x0 0xff160000 0x0 0x1000>; - assigned-clocks = <&cru SCLK_I2C7>; - assigned-clock-rates = <200000000>; - clocks = <&cru SCLK_I2C7>, <&cru PCLK_I2C7>; - clock-names = "i2c", "pclk"; - interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&i2c7_xfer>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - uart0: serial@ff180000 { - compatible = "rockchip,rk3399-uart", "snps,dw-apb-uart"; - reg = <0x0 0xff180000 0x0 0x100>; - clocks = <&cru SCLK_UART0>, <&cru PCLK_UART0>; - clock-names = "baudclk", "apb_pclk"; - interrupts = ; - reg-shift = <2>; - reg-io-width = <4>; - pinctrl-names = "default"; - pinctrl-0 = <&uart0_xfer>; - status = "disabled"; - }; - - uart1: serial@ff190000 { - compatible = "rockchip,rk3399-uart", "snps,dw-apb-uart"; - reg = <0x0 0xff190000 0x0 0x100>; - clocks = <&cru SCLK_UART1>, <&cru PCLK_UART1>; - clock-names = "baudclk", "apb_pclk"; - interrupts = ; - reg-shift = <2>; - reg-io-width = <4>; - pinctrl-names = "default"; - pinctrl-0 = <&uart1_xfer>; - status = "disabled"; - }; - - uart2: serial@ff1a0000 { - compatible = "rockchip,rk3399-uart", "snps,dw-apb-uart"; - reg = <0x0 0xff1a0000 0x0 0x100>; - clocks = <&cru SCLK_UART2>, <&cru PCLK_UART2>; - clock-names = "baudclk", "apb_pclk"; - interrupts = ; - reg-shift = <2>; - reg-io-width = <4>; - pinctrl-names = "default"; - pinctrl-0 = <&uart2c_xfer>; - status = "disabled"; - }; - - uart3: serial@ff1b0000 { - compatible = "rockchip,rk3399-uart", "snps,dw-apb-uart"; - reg = <0x0 0xff1b0000 0x0 0x100>; - clocks = <&cru SCLK_UART3>, <&cru PCLK_UART3>; - clock-names = "baudclk", "apb_pclk"; - interrupts = ; - reg-shift = <2>; - reg-io-width = <4>; - pinctrl-names = "default"; - pinctrl-0 = <&uart3_xfer>; - status = "disabled"; - }; - - spi0: spi@ff1c0000 { - compatible = "rockchip,rk3399-spi", "rockchip,rk3066-spi"; - reg = <0x0 0xff1c0000 0x0 0x1000>; - clocks = <&cru SCLK_SPI0>, <&cru PCLK_SPI0>; - clock-names = "spiclk", "apb_pclk"; - interrupts = ; - dmas = <&dmac_peri 10>, <&dmac_peri 11>; - dma-names = "tx", "rx"; - pinctrl-names = "default"; - pinctrl-0 = <&spi0_clk &spi0_tx &spi0_rx &spi0_cs0>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - spi1: spi@ff1d0000 { - compatible = "rockchip,rk3399-spi", "rockchip,rk3066-spi"; - reg = <0x0 0xff1d0000 0x0 0x1000>; - clocks = <&cru SCLK_SPI1>, <&cru PCLK_SPI1>; - clock-names = "spiclk", "apb_pclk"; - interrupts = ; - dmas = <&dmac_peri 12>, <&dmac_peri 13>; - dma-names = "tx", "rx"; - pinctrl-names = "default"; - pinctrl-0 = <&spi1_clk &spi1_tx &spi1_rx &spi1_cs0>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - spi2: spi@ff1e0000 { - compatible = "rockchip,rk3399-spi", "rockchip,rk3066-spi"; - reg = <0x0 0xff1e0000 0x0 0x1000>; - clocks = <&cru SCLK_SPI2>, <&cru PCLK_SPI2>; - clock-names = "spiclk", "apb_pclk"; - interrupts = ; - dmas = <&dmac_peri 14>, <&dmac_peri 15>; - dma-names = "tx", "rx"; - pinctrl-names = "default"; - pinctrl-0 = <&spi2_clk &spi2_tx &spi2_rx &spi2_cs0>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - spi4: spi@ff1f0000 { - compatible = "rockchip,rk3399-spi", "rockchip,rk3066-spi"; - reg = <0x0 0xff1f0000 0x0 0x1000>; - clocks = <&cru SCLK_SPI4>, <&cru PCLK_SPI4>; - clock-names = "spiclk", "apb_pclk"; - interrupts = ; - dmas = <&dmac_peri 18>, <&dmac_peri 19>; - dma-names = "tx", "rx"; - pinctrl-names = "default"; - pinctrl-0 = <&spi4_clk &spi4_tx &spi4_rx &spi4_cs0>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - spi5: spi@ff200000 { - compatible = "rockchip,rk3399-spi", "rockchip,rk3066-spi"; - reg = <0x0 0xff200000 0x0 0x1000>; - clocks = <&cru SCLK_SPI5>, <&cru PCLK_SPI5>; - clock-names = "spiclk", "apb_pclk"; - interrupts = ; - dmas = <&dmac_bus 8>, <&dmac_bus 9>; - dma-names = "tx", "rx"; - pinctrl-names = "default"; - pinctrl-0 = <&spi5_clk &spi5_tx &spi5_rx &spi5_cs0>; - power-domains = <&power RK3399_PD_SDIOAUDIO>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - thermal_zones: thermal-zones { - cpu_thermal: cpu-thermal { - polling-delay-passive = <100>; - polling-delay = <1000>; - - thermal-sensors = <&tsadc 0>; - - trips { - cpu_alert0: cpu_alert0 { - temperature = <70000>; - hysteresis = <2000>; - type = "passive"; - }; - cpu_alert1: cpu_alert1 { - temperature = <75000>; - hysteresis = <2000>; - type = "passive"; - }; - cpu_crit: cpu_crit { - temperature = <95000>; - hysteresis = <2000>; - type = "critical"; - }; - }; - - cooling-maps { - map0 { - trip = <&cpu_alert0>; - cooling-device = - <&cpu_b0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&cpu_b1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; - }; - map1 { - trip = <&cpu_alert1>; - cooling-device = - <&cpu_l0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&cpu_l1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&cpu_l2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&cpu_l3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&cpu_b0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&cpu_b1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; - }; - }; - }; - - gpu_thermal: gpu-thermal { - polling-delay-passive = <100>; - polling-delay = <1000>; - - thermal-sensors = <&tsadc 1>; - - trips { - gpu_alert0: gpu_alert0 { - temperature = <75000>; - hysteresis = <2000>; - type = "passive"; - }; - gpu_crit: gpu_crit { - temperature = <95000>; - hysteresis = <2000>; - type = "critical"; - }; - }; - - cooling-maps { - map0 { - trip = <&gpu_alert0>; - cooling-device = - <&gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; - }; - }; - }; - }; - - tsadc: tsadc@ff260000 { - compatible = "rockchip,rk3399-tsadc"; - reg = <0x0 0xff260000 0x0 0x100>; - interrupts = ; - assigned-clocks = <&cru SCLK_TSADC>; - assigned-clock-rates = <750000>; - clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>; - clock-names = "tsadc", "apb_pclk"; - resets = <&cru SRST_TSADC>; - reset-names = "tsadc-apb"; - rockchip,grf = <&grf>; - rockchip,hw-tshut-temp = <95000>; - pinctrl-names = "init", "default", "sleep"; - pinctrl-0 = <&otp_pin>; - pinctrl-1 = <&otp_out>; - pinctrl-2 = <&otp_pin>; - #thermal-sensor-cells = <1>; - status = "disabled"; - }; - - qos_emmc: qos@ffa58000 { - compatible = "rockchip,rk3399-qos", "syscon"; - reg = <0x0 0xffa58000 0x0 0x20>; - }; - - qos_gmac: qos@ffa5c000 { - compatible = "rockchip,rk3399-qos", "syscon"; - reg = <0x0 0xffa5c000 0x0 0x20>; - }; - - qos_pcie: qos@ffa60080 { - compatible = "rockchip,rk3399-qos", "syscon"; - reg = <0x0 0xffa60080 0x0 0x20>; - }; - - qos_usb_host0: qos@ffa60100 { - compatible = "rockchip,rk3399-qos", "syscon"; - reg = <0x0 0xffa60100 0x0 0x20>; - }; - - qos_usb_host1: qos@ffa60180 { - compatible = "rockchip,rk3399-qos", "syscon"; - reg = <0x0 0xffa60180 0x0 0x20>; - }; - - qos_usb_otg0: qos@ffa70000 { - compatible = "rockchip,rk3399-qos", "syscon"; - reg = <0x0 0xffa70000 0x0 0x20>; - }; - - qos_usb_otg1: qos@ffa70080 { - compatible = "rockchip,rk3399-qos", "syscon"; - reg = <0x0 0xffa70080 0x0 0x20>; - }; - - qos_sd: qos@ffa74000 { - compatible = "rockchip,rk3399-qos", "syscon"; - reg = <0x0 0xffa74000 0x0 0x20>; - }; - - qos_sdioaudio: qos@ffa76000 { - compatible = "rockchip,rk3399-qos", "syscon"; - reg = <0x0 0xffa76000 0x0 0x20>; - }; - - qos_hdcp: qos@ffa90000 { - compatible = "rockchip,rk3399-qos", "syscon"; - reg = <0x0 0xffa90000 0x0 0x20>; - }; - - qos_iep: qos@ffa98000 { - compatible = "rockchip,rk3399-qos", "syscon"; - reg = <0x0 0xffa98000 0x0 0x20>; - }; - - qos_isp0_m0: qos@ffaa0000 { - compatible = "rockchip,rk3399-qos", "syscon"; - reg = <0x0 0xffaa0000 0x0 0x20>; - }; - - qos_isp0_m1: qos@ffaa0080 { - compatible = "rockchip,rk3399-qos", "syscon"; - reg = <0x0 0xffaa0080 0x0 0x20>; - }; - - qos_isp1_m0: qos@ffaa8000 { - compatible = "rockchip,rk3399-qos", "syscon"; - reg = <0x0 0xffaa8000 0x0 0x20>; - }; - - qos_isp1_m1: qos@ffaa8080 { - compatible = "rockchip,rk3399-qos", "syscon"; - reg = <0x0 0xffaa8080 0x0 0x20>; - }; - - qos_rga_r: qos@ffab0000 { - compatible = "rockchip,rk3399-qos", "syscon"; - reg = <0x0 0xffab0000 0x0 0x20>; - }; - - qos_rga_w: qos@ffab0080 { - compatible = "rockchip,rk3399-qos", "syscon"; - reg = <0x0 0xffab0080 0x0 0x20>; - }; - - qos_video_m0: qos@ffab8000 { - compatible = "rockchip,rk3399-qos", "syscon"; - reg = <0x0 0xffab8000 0x0 0x20>; - }; - - qos_video_m1_r: qos@ffac0000 { - compatible = "rockchip,rk3399-qos", "syscon"; - reg = <0x0 0xffac0000 0x0 0x20>; - }; - - qos_video_m1_w: qos@ffac0080 { - compatible = "rockchip,rk3399-qos", "syscon"; - reg = <0x0 0xffac0080 0x0 0x20>; - }; - - qos_vop_big_r: qos@ffac8000 { - compatible = "rockchip,rk3399-qos", "syscon"; - reg = <0x0 0xffac8000 0x0 0x20>; - }; - - qos_vop_big_w: qos@ffac8080 { - compatible = "rockchip,rk3399-qos", "syscon"; - reg = <0x0 0xffac8080 0x0 0x20>; - }; - - qos_vop_little: qos@ffad0000 { - compatible = "rockchip,rk3399-qos", "syscon"; - reg = <0x0 0xffad0000 0x0 0x20>; - }; - - qos_perihp: qos@ffad8080 { - compatible = "rockchip,rk3399-qos", "syscon"; - reg = <0x0 0xffad8080 0x0 0x20>; - }; - - qos_gpu: qos@ffae0000 { - compatible = "rockchip,rk3399-qos", "syscon"; - reg = <0x0 0xffae0000 0x0 0x20>; - }; - - pmu: power-management@ff310000 { - compatible = "rockchip,rk3399-pmu", "syscon", "simple-mfd"; - reg = <0x0 0xff310000 0x0 0x1000>; - - /* - * Note: RK3399 supports 6 voltage domains including VD_CORE_L, - * VD_CORE_B, VD_CENTER, VD_GPU, VD_LOGIC and VD_PMU. - * Some of the power domains are grouped together for every - * voltage domain. - * The detail contents as below. - */ - power: power-controller { - compatible = "rockchip,rk3399-power-controller"; - #power-domain-cells = <1>; - #address-cells = <1>; - #size-cells = <0>; - - /* These power domains are grouped by VD_CENTER */ - power-domain@RK3399_PD_IEP { - reg = ; - clocks = <&cru ACLK_IEP>, - <&cru HCLK_IEP>; - pm_qos = <&qos_iep>; - #power-domain-cells = <0>; - }; - power-domain@RK3399_PD_RGA { - reg = ; - clocks = <&cru ACLK_RGA>, - <&cru HCLK_RGA>; - pm_qos = <&qos_rga_r>, - <&qos_rga_w>; - #power-domain-cells = <0>; - }; - power-domain@RK3399_PD_VCODEC { - reg = ; - clocks = <&cru ACLK_VCODEC>, - <&cru HCLK_VCODEC>; - pm_qos = <&qos_video_m0>; - #power-domain-cells = <0>; - }; - power-domain@RK3399_PD_VDU { - reg = ; - clocks = <&cru ACLK_VDU>, - <&cru HCLK_VDU>, - <&cru SCLK_VDU_CA>, - <&cru SCLK_VDU_CORE>; - pm_qos = <&qos_video_m1_r>, - <&qos_video_m1_w>; - #power-domain-cells = <0>; - }; - - /* These power domains are grouped by VD_GPU */ - power-domain@RK3399_PD_GPU { - reg = ; - clocks = <&cru ACLK_GPU>; - pm_qos = <&qos_gpu>; - #power-domain-cells = <0>; - }; - - /* These power domains are grouped by VD_LOGIC */ - power-domain@RK3399_PD_EDP { - reg = ; - clocks = <&cru PCLK_EDP_CTRL>; - #power-domain-cells = <0>; - }; - power-domain@RK3399_PD_EMMC { - reg = ; - clocks = <&cru ACLK_EMMC>; - pm_qos = <&qos_emmc>; - #power-domain-cells = <0>; - }; - power-domain@RK3399_PD_GMAC { - reg = ; - clocks = <&cru ACLK_GMAC>, - <&cru PCLK_GMAC>; - pm_qos = <&qos_gmac>; - #power-domain-cells = <0>; - }; - power-domain@RK3399_PD_SD { - reg = ; - clocks = <&cru HCLK_SDMMC>, - <&cru SCLK_SDMMC>; - pm_qos = <&qos_sd>; - #power-domain-cells = <0>; - }; - power-domain@RK3399_PD_SDIOAUDIO { - reg = ; - clocks = <&cru HCLK_SDIO>; - pm_qos = <&qos_sdioaudio>; - #power-domain-cells = <0>; - }; - power-domain@RK3399_PD_TCPD0 { - reg = ; - clocks = <&cru SCLK_UPHY0_TCPDCORE>, - <&cru SCLK_UPHY0_TCPDPHY_REF>; - #power-domain-cells = <0>; - }; - power-domain@RK3399_PD_TCPD1 { - reg = ; - clocks = <&cru SCLK_UPHY1_TCPDCORE>, - <&cru SCLK_UPHY1_TCPDPHY_REF>; - #power-domain-cells = <0>; - }; - power-domain@RK3399_PD_USB3 { - reg = ; - clocks = <&cru ACLK_USB3>; - pm_qos = <&qos_usb_otg0>, - <&qos_usb_otg1>; - #power-domain-cells = <0>; - }; - power-domain@RK3399_PD_VIO { - reg = ; - #power-domain-cells = <1>; - #address-cells = <1>; - #size-cells = <0>; - - power-domain@RK3399_PD_HDCP { - reg = ; - clocks = <&cru ACLK_HDCP>, - <&cru HCLK_HDCP>, - <&cru PCLK_HDCP>; - pm_qos = <&qos_hdcp>; - #power-domain-cells = <0>; - }; - power-domain@RK3399_PD_ISP0 { - reg = ; - clocks = <&cru ACLK_ISP0>, - <&cru HCLK_ISP0>; - pm_qos = <&qos_isp0_m0>, - <&qos_isp0_m1>; - #power-domain-cells = <0>; - }; - power-domain@RK3399_PD_ISP1 { - reg = ; - clocks = <&cru ACLK_ISP1>, - <&cru HCLK_ISP1>; - pm_qos = <&qos_isp1_m0>, - <&qos_isp1_m1>; - #power-domain-cells = <0>; - }; - power-domain@RK3399_PD_VO { - reg = ; - #power-domain-cells = <1>; - #address-cells = <1>; - #size-cells = <0>; - - power-domain@RK3399_PD_VOPB { - reg = ; - clocks = <&cru ACLK_VOP0>, - <&cru HCLK_VOP0>; - pm_qos = <&qos_vop_big_r>, - <&qos_vop_big_w>; - #power-domain-cells = <0>; - }; - power-domain@RK3399_PD_VOPL { - reg = ; - clocks = <&cru ACLK_VOP1>, - <&cru HCLK_VOP1>; - pm_qos = <&qos_vop_little>; - #power-domain-cells = <0>; - }; - }; - }; - }; - }; - - pmugrf: syscon@ff320000 { - compatible = "rockchip,rk3399-pmugrf", "syscon", "simple-mfd"; - reg = <0x0 0xff320000 0x0 0x1000>; - - pmu_io_domains: io-domains { - compatible = "rockchip,rk3399-pmu-io-voltage-domain"; - status = "disabled"; - }; - }; - - spi3: spi@ff350000 { - compatible = "rockchip,rk3399-spi", "rockchip,rk3066-spi"; - reg = <0x0 0xff350000 0x0 0x1000>; - clocks = <&pmucru SCLK_SPI3_PMU>, <&pmucru PCLK_SPI3_PMU>; - clock-names = "spiclk", "apb_pclk"; - interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&spi3_clk &spi3_tx &spi3_rx &spi3_cs0>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - uart4: serial@ff370000 { - compatible = "rockchip,rk3399-uart", "snps,dw-apb-uart"; - reg = <0x0 0xff370000 0x0 0x100>; - clocks = <&pmucru SCLK_UART4_PMU>, <&pmucru PCLK_UART4_PMU>; - clock-names = "baudclk", "apb_pclk"; - interrupts = ; - reg-shift = <2>; - reg-io-width = <4>; - pinctrl-names = "default"; - pinctrl-0 = <&uart4_xfer>; - status = "disabled"; - }; - - i2c0: i2c@ff3c0000 { - compatible = "rockchip,rk3399-i2c"; - reg = <0x0 0xff3c0000 0x0 0x1000>; - assigned-clocks = <&pmucru SCLK_I2C0_PMU>; - assigned-clock-rates = <200000000>; - clocks = <&pmucru SCLK_I2C0_PMU>, <&pmucru PCLK_I2C0_PMU>; - clock-names = "i2c", "pclk"; - interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&i2c0_xfer>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - i2c4: i2c@ff3d0000 { - compatible = "rockchip,rk3399-i2c"; - reg = <0x0 0xff3d0000 0x0 0x1000>; - assigned-clocks = <&pmucru SCLK_I2C4_PMU>; - assigned-clock-rates = <200000000>; - clocks = <&pmucru SCLK_I2C4_PMU>, <&pmucru PCLK_I2C4_PMU>; - clock-names = "i2c", "pclk"; - interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&i2c4_xfer>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - i2c8: i2c@ff3e0000 { - compatible = "rockchip,rk3399-i2c"; - reg = <0x0 0xff3e0000 0x0 0x1000>; - assigned-clocks = <&pmucru SCLK_I2C8_PMU>; - assigned-clock-rates = <200000000>; - clocks = <&pmucru SCLK_I2C8_PMU>, <&pmucru PCLK_I2C8_PMU>; - clock-names = "i2c", "pclk"; - interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&i2c8_xfer>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - pwm0: pwm@ff420000 { - compatible = "rockchip,rk3399-pwm", "rockchip,rk3288-pwm"; - reg = <0x0 0xff420000 0x0 0x10>; - #pwm-cells = <3>; - pinctrl-names = "default"; - pinctrl-0 = <&pwm0_pin>; - clocks = <&pmucru PCLK_RKPWM_PMU>; - status = "disabled"; - }; - - pwm1: pwm@ff420010 { - compatible = "rockchip,rk3399-pwm", "rockchip,rk3288-pwm"; - reg = <0x0 0xff420010 0x0 0x10>; - #pwm-cells = <3>; - pinctrl-names = "default"; - pinctrl-0 = <&pwm1_pin>; - clocks = <&pmucru PCLK_RKPWM_PMU>; - status = "disabled"; - }; - - pwm2: pwm@ff420020 { - compatible = "rockchip,rk3399-pwm", "rockchip,rk3288-pwm"; - reg = <0x0 0xff420020 0x0 0x10>; - #pwm-cells = <3>; - pinctrl-names = "default"; - pinctrl-0 = <&pwm2_pin>; - clocks = <&pmucru PCLK_RKPWM_PMU>; - status = "disabled"; - }; - - pwm3: pwm@ff420030 { - compatible = "rockchip,rk3399-pwm", "rockchip,rk3288-pwm"; - reg = <0x0 0xff420030 0x0 0x10>; - #pwm-cells = <3>; - pinctrl-names = "default"; - pinctrl-0 = <&pwm3a_pin>; - clocks = <&pmucru PCLK_RKPWM_PMU>; - status = "disabled"; - }; - - dfi: dfi@ff630000 { - reg = <0x00 0xff630000 0x00 0x4000>; - compatible = "rockchip,rk3399-dfi"; - rockchip,pmu = <&pmugrf>; - interrupts = ; - clocks = <&cru PCLK_DDR_MON>; - clock-names = "pclk_ddr_mon"; - }; - - vpu: video-codec@ff650000 { - compatible = "rockchip,rk3399-vpu"; - reg = <0x0 0xff650000 0x0 0x800>; - interrupts = , - ; - interrupt-names = "vepu", "vdpu"; - clocks = <&cru ACLK_VCODEC>, <&cru HCLK_VCODEC>; - clock-names = "aclk", "hclk"; - iommus = <&vpu_mmu>; - power-domains = <&power RK3399_PD_VCODEC>; - }; - - vpu_mmu: iommu@ff650800 { - compatible = "rockchip,iommu"; - reg = <0x0 0xff650800 0x0 0x40>; - interrupts = ; - clocks = <&cru ACLK_VCODEC>, <&cru HCLK_VCODEC>; - clock-names = "aclk", "iface"; - #iommu-cells = <0>; - power-domains = <&power RK3399_PD_VCODEC>; - }; - - vdec: video-codec@ff660000 { - compatible = "rockchip,rk3399-vdec"; - reg = <0x0 0xff660000 0x0 0x480>; - interrupts = ; - clocks = <&cru ACLK_VDU>, <&cru HCLK_VDU>, - <&cru SCLK_VDU_CA>, <&cru SCLK_VDU_CORE>; - clock-names = "axi", "ahb", "cabac", "core"; - iommus = <&vdec_mmu>; - power-domains = <&power RK3399_PD_VDU>; - }; - - vdec_mmu: iommu@ff660480 { - compatible = "rockchip,iommu"; - reg = <0x0 0xff660480 0x0 0x40>, <0x0 0xff6604c0 0x0 0x40>; - interrupts = ; - clocks = <&cru ACLK_VDU>, <&cru HCLK_VDU>; - clock-names = "aclk", "iface"; - power-domains = <&power RK3399_PD_VDU>; - #iommu-cells = <0>; - }; - - iep_mmu: iommu@ff670800 { - compatible = "rockchip,iommu"; - reg = <0x0 0xff670800 0x0 0x40>; - interrupts = ; - clocks = <&cru ACLK_IEP>, <&cru HCLK_IEP>; - clock-names = "aclk", "iface"; - #iommu-cells = <0>; - status = "disabled"; - }; - - rga: rga@ff680000 { - compatible = "rockchip,rk3399-rga"; - reg = <0x0 0xff680000 0x0 0x10000>; - interrupts = ; - clocks = <&cru ACLK_RGA>, <&cru HCLK_RGA>, <&cru SCLK_RGA_CORE>; - clock-names = "aclk", "hclk", "sclk"; - resets = <&cru SRST_RGA_CORE>, <&cru SRST_A_RGA>, <&cru SRST_H_RGA>; - reset-names = "core", "axi", "ahb"; - power-domains = <&power RK3399_PD_RGA>; - }; - - efuse0: efuse@ff690000 { - compatible = "rockchip,rk3399-efuse"; - reg = <0x0 0xff690000 0x0 0x80>; - #address-cells = <1>; - #size-cells = <1>; - clocks = <&cru PCLK_EFUSE1024NS>; - clock-names = "pclk_efuse"; - - /* Data cells */ - cpu_id: cpu-id@7 { - reg = <0x07 0x10>; - }; - cpub_leakage: cpu-leakage@17 { - reg = <0x17 0x1>; - }; - gpu_leakage: gpu-leakage@18 { - reg = <0x18 0x1>; - }; - center_leakage: center-leakage@19 { - reg = <0x19 0x1>; - }; - cpul_leakage: cpu-leakage@1a { - reg = <0x1a 0x1>; - }; - logic_leakage: logic-leakage@1b { - reg = <0x1b 0x1>; - }; - wafer_info: wafer-info@1c { - reg = <0x1c 0x1>; - }; - }; - - dmac_bus: dma-controller@ff6d0000 { - compatible = "arm,pl330", "arm,primecell"; - reg = <0x0 0xff6d0000 0x0 0x4000>; - interrupts = , - ; - #dma-cells = <1>; - arm,pl330-periph-burst; - clocks = <&cru ACLK_DMAC0_PERILP>; - clock-names = "apb_pclk"; - }; - - dmac_peri: dma-controller@ff6e0000 { - compatible = "arm,pl330", "arm,primecell"; - reg = <0x0 0xff6e0000 0x0 0x4000>; - interrupts = , - ; - #dma-cells = <1>; - arm,pl330-periph-burst; - clocks = <&cru ACLK_DMAC1_PERILP>; - clock-names = "apb_pclk"; - }; - - pmucru: clock-controller@ff750000 { - compatible = "rockchip,rk3399-pmucru"; - reg = <0x0 0xff750000 0x0 0x1000>; - clocks = <&xin24m>; - clock-names = "xin24m"; - rockchip,grf = <&pmugrf>; - #clock-cells = <1>; - #reset-cells = <1>; - assigned-clocks = <&pmucru PLL_PPLL>; - assigned-clock-rates = <676000000>; - }; - - cru: clock-controller@ff760000 { - compatible = "rockchip,rk3399-cru"; - reg = <0x0 0xff760000 0x0 0x1000>; - clocks = <&xin24m>; - clock-names = "xin24m"; - rockchip,grf = <&grf>; - #clock-cells = <1>; - #reset-cells = <1>; - assigned-clocks = - <&cru PLL_GPLL>, <&cru PLL_CPLL>, - <&cru PLL_NPLL>, - <&cru ACLK_PERIHP>, <&cru HCLK_PERIHP>, - <&cru PCLK_PERIHP>, - <&cru ACLK_PERILP0>, <&cru HCLK_PERILP0>, - <&cru PCLK_PERILP0>, <&cru ACLK_CCI>, - <&cru HCLK_PERILP1>, <&cru PCLK_PERILP1>, - <&cru ACLK_VIO>, <&cru ACLK_HDCP>, - <&cru ACLK_GIC_PRE>, - <&cru PCLK_DDR>, - <&cru ACLK_VDU>; - assigned-clock-rates = - <594000000>, <800000000>, - <1000000000>, - <150000000>, <75000000>, - <37500000>, - <100000000>, <100000000>, - <50000000>, <600000000>, - <100000000>, <50000000>, - <400000000>, <400000000>, - <200000000>, - <200000000>, - <400000000>; - }; - - grf: syscon@ff770000 { - compatible = "rockchip,rk3399-grf", "syscon", "simple-mfd"; - reg = <0x0 0xff770000 0x0 0x10000>; - #address-cells = <1>; - #size-cells = <1>; - - io_domains: io-domains { - compatible = "rockchip,rk3399-io-voltage-domain"; - status = "disabled"; - }; - - mipi_dphy_rx0: mipi-dphy-rx0 { - compatible = "rockchip,rk3399-mipi-dphy-rx0"; - clocks = <&cru SCLK_MIPIDPHY_REF>, - <&cru SCLK_DPHY_RX0_CFG>, - <&cru PCLK_VIO_GRF>; - clock-names = "dphy-ref", "dphy-cfg", "grf"; - power-domains = <&power RK3399_PD_VIO>; - #phy-cells = <0>; - status = "disabled"; - }; - - u2phy0: usb2phy@e450 { - compatible = "rockchip,rk3399-usb2phy"; - reg = <0xe450 0x10>; - clocks = <&cru SCLK_USB2PHY0_REF>; - clock-names = "phyclk"; - #clock-cells = <0>; - clock-output-names = "clk_usbphy0_480m"; - status = "disabled"; - - u2phy0_host: host-port { - #phy-cells = <0>; - interrupts = ; - interrupt-names = "linestate"; - status = "disabled"; - }; - - u2phy0_otg: otg-port { - #phy-cells = <0>; - interrupts = , - , - ; - interrupt-names = "otg-bvalid", "otg-id", - "linestate"; - status = "disabled"; - }; - }; - - u2phy1: usb2phy@e460 { - compatible = "rockchip,rk3399-usb2phy"; - reg = <0xe460 0x10>; - clocks = <&cru SCLK_USB2PHY1_REF>; - clock-names = "phyclk"; - #clock-cells = <0>; - clock-output-names = "clk_usbphy1_480m"; - status = "disabled"; - - u2phy1_host: host-port { - #phy-cells = <0>; - interrupts = ; - interrupt-names = "linestate"; - status = "disabled"; - }; - - u2phy1_otg: otg-port { - #phy-cells = <0>; - interrupts = , - , - ; - interrupt-names = "otg-bvalid", "otg-id", - "linestate"; - status = "disabled"; - }; - }; - - emmc_phy: phy@f780 { - compatible = "rockchip,rk3399-emmc-phy"; - reg = <0xf780 0x24>; - clocks = <&sdhci>; - clock-names = "emmcclk"; - drive-impedance-ohm = <50>; - #phy-cells = <0>; - status = "disabled"; - }; - - pcie_phy: pcie-phy { - compatible = "rockchip,rk3399-pcie-phy"; - clocks = <&cru SCLK_PCIEPHY_REF>; - clock-names = "refclk"; - #phy-cells = <1>; - resets = <&cru SRST_PCIEPHY>; - reset-names = "phy"; - status = "disabled"; - }; - }; - - tcphy0: phy@ff7c0000 { - compatible = "rockchip,rk3399-typec-phy"; - reg = <0x0 0xff7c0000 0x0 0x40000>; - clocks = <&cru SCLK_UPHY0_TCPDCORE>, - <&cru SCLK_UPHY0_TCPDPHY_REF>; - clock-names = "tcpdcore", "tcpdphy-ref"; - assigned-clocks = <&cru SCLK_UPHY0_TCPDCORE>; - assigned-clock-rates = <50000000>; - power-domains = <&power RK3399_PD_TCPD0>; - resets = <&cru SRST_UPHY0>, - <&cru SRST_UPHY0_PIPE_L00>, - <&cru SRST_P_UPHY0_TCPHY>; - reset-names = "uphy", "uphy-pipe", "uphy-tcphy"; - rockchip,grf = <&grf>; - status = "disabled"; - - tcphy0_dp: dp-port { - #phy-cells = <0>; - }; - - tcphy0_usb3: usb3-port { - #phy-cells = <0>; - }; - }; - - tcphy1: phy@ff800000 { - compatible = "rockchip,rk3399-typec-phy"; - reg = <0x0 0xff800000 0x0 0x40000>; - clocks = <&cru SCLK_UPHY1_TCPDCORE>, - <&cru SCLK_UPHY1_TCPDPHY_REF>; - clock-names = "tcpdcore", "tcpdphy-ref"; - assigned-clocks = <&cru SCLK_UPHY1_TCPDCORE>; - assigned-clock-rates = <50000000>; - power-domains = <&power RK3399_PD_TCPD1>; - resets = <&cru SRST_UPHY1>, - <&cru SRST_UPHY1_PIPE_L00>, - <&cru SRST_P_UPHY1_TCPHY>; - reset-names = "uphy", "uphy-pipe", "uphy-tcphy"; - rockchip,grf = <&grf>; - status = "disabled"; - - tcphy1_dp: dp-port { - #phy-cells = <0>; - }; - - tcphy1_usb3: usb3-port { - #phy-cells = <0>; - }; - }; - - watchdog@ff848000 { - compatible = "rockchip,rk3399-wdt", "snps,dw-wdt"; - reg = <0x0 0xff848000 0x0 0x100>; - clocks = <&cru PCLK_WDT>; - interrupts = ; - }; - - rktimer: rktimer@ff850000 { - compatible = "rockchip,rk3399-timer"; - reg = <0x0 0xff850000 0x0 0x1000>; - interrupts = ; - clocks = <&cru PCLK_TIMER0>, <&cru SCLK_TIMER00>; - clock-names = "pclk", "timer"; - }; - - spdif: spdif@ff870000 { - compatible = "rockchip,rk3399-spdif"; - reg = <0x0 0xff870000 0x0 0x1000>; - interrupts = ; - dmas = <&dmac_bus 7>; - dma-names = "tx"; - clock-names = "mclk", "hclk"; - clocks = <&cru SCLK_SPDIF_8CH>, <&cru HCLK_SPDIF>; - pinctrl-names = "default"; - pinctrl-0 = <&spdif_bus>; - power-domains = <&power RK3399_PD_SDIOAUDIO>; - #sound-dai-cells = <0>; - status = "disabled"; - }; - - i2s0: i2s@ff880000 { - compatible = "rockchip,rk3399-i2s", "rockchip,rk3066-i2s"; - reg = <0x0 0xff880000 0x0 0x1000>; - rockchip,grf = <&grf>; - interrupts = ; - dmas = <&dmac_bus 0>, <&dmac_bus 1>; - dma-names = "tx", "rx"; - clock-names = "i2s_clk", "i2s_hclk"; - clocks = <&cru SCLK_I2S0_8CH>, <&cru HCLK_I2S0_8CH>; - pinctrl-names = "bclk_on", "bclk_off"; - pinctrl-0 = <&i2s0_8ch_bus>; - pinctrl-1 = <&i2s0_8ch_bus_bclk_off>; - power-domains = <&power RK3399_PD_SDIOAUDIO>; - #sound-dai-cells = <0>; - status = "disabled"; - }; - - i2s1: i2s@ff890000 { - compatible = "rockchip,rk3399-i2s", "rockchip,rk3066-i2s"; - reg = <0x0 0xff890000 0x0 0x1000>; - interrupts = ; - dmas = <&dmac_bus 2>, <&dmac_bus 3>; - dma-names = "tx", "rx"; - clock-names = "i2s_clk", "i2s_hclk"; - clocks = <&cru SCLK_I2S1_8CH>, <&cru HCLK_I2S1_8CH>; - pinctrl-names = "default"; - pinctrl-0 = <&i2s1_2ch_bus>; - power-domains = <&power RK3399_PD_SDIOAUDIO>; - #sound-dai-cells = <0>; - status = "disabled"; - }; - - i2s2: i2s@ff8a0000 { - compatible = "rockchip,rk3399-i2s", "rockchip,rk3066-i2s"; - reg = <0x0 0xff8a0000 0x0 0x1000>; - interrupts = ; - dmas = <&dmac_bus 4>, <&dmac_bus 5>; - dma-names = "tx", "rx"; - clock-names = "i2s_clk", "i2s_hclk"; - clocks = <&cru SCLK_I2S2_8CH>, <&cru HCLK_I2S2_8CH>; - power-domains = <&power RK3399_PD_SDIOAUDIO>; - #sound-dai-cells = <0>; - status = "disabled"; - }; - - vopl: vop@ff8f0000 { - compatible = "rockchip,rk3399-vop-lit"; - reg = <0x0 0xff8f0000 0x0 0x2000>, <0x0 0xff8f2000 0x0 0x400>; - interrupts = ; - assigned-clocks = <&cru ACLK_VOP1>, <&cru HCLK_VOP1>; - assigned-clock-rates = <400000000>, <100000000>; - clocks = <&cru ACLK_VOP1>, <&cru DCLK_VOP1>, <&cru HCLK_VOP1>; - clock-names = "aclk_vop", "dclk_vop", "hclk_vop"; - iommus = <&vopl_mmu>; - power-domains = <&power RK3399_PD_VOPL>; - resets = <&cru SRST_A_VOP1>, <&cru SRST_H_VOP1>, <&cru SRST_D_VOP1>; - reset-names = "axi", "ahb", "dclk"; - status = "disabled"; - - vopl_out: port { - #address-cells = <1>; - #size-cells = <0>; - - vopl_out_mipi: endpoint@0 { - reg = <0>; - remote-endpoint = <&mipi_in_vopl>; - }; - - vopl_out_edp: endpoint@1 { - reg = <1>; - remote-endpoint = <&edp_in_vopl>; - }; - - vopl_out_hdmi: endpoint@2 { - reg = <2>; - remote-endpoint = <&hdmi_in_vopl>; - }; - - vopl_out_mipi1: endpoint@3 { - reg = <3>; - remote-endpoint = <&mipi1_in_vopl>; - }; - - vopl_out_dp: endpoint@4 { - reg = <4>; - remote-endpoint = <&dp_in_vopl>; - }; - }; - }; - - vopl_mmu: iommu@ff8f3f00 { - compatible = "rockchip,iommu"; - reg = <0x0 0xff8f3f00 0x0 0x100>; - interrupts = ; - clocks = <&cru ACLK_VOP1>, <&cru HCLK_VOP1>; - clock-names = "aclk", "iface"; - power-domains = <&power RK3399_PD_VOPL>; - #iommu-cells = <0>; - status = "disabled"; - }; - - vopb: vop@ff900000 { - compatible = "rockchip,rk3399-vop-big"; - reg = <0x0 0xff900000 0x0 0x2000>, <0x0 0xff902000 0x0 0x1000>; - interrupts = ; - assigned-clocks = <&cru ACLK_VOP0>, <&cru HCLK_VOP0>; - assigned-clock-rates = <400000000>, <100000000>; - clocks = <&cru ACLK_VOP0>, <&cru DCLK_VOP0>, <&cru HCLK_VOP0>; - clock-names = "aclk_vop", "dclk_vop", "hclk_vop"; - iommus = <&vopb_mmu>; - power-domains = <&power RK3399_PD_VOPB>; - resets = <&cru SRST_A_VOP0>, <&cru SRST_H_VOP0>, <&cru SRST_D_VOP0>; - reset-names = "axi", "ahb", "dclk"; - status = "disabled"; - - vopb_out: port { - #address-cells = <1>; - #size-cells = <0>; - - vopb_out_edp: endpoint@0 { - reg = <0>; - remote-endpoint = <&edp_in_vopb>; - }; - - vopb_out_mipi: endpoint@1 { - reg = <1>; - remote-endpoint = <&mipi_in_vopb>; - }; - - vopb_out_hdmi: endpoint@2 { - reg = <2>; - remote-endpoint = <&hdmi_in_vopb>; - }; - - vopb_out_mipi1: endpoint@3 { - reg = <3>; - remote-endpoint = <&mipi1_in_vopb>; - }; - - vopb_out_dp: endpoint@4 { - reg = <4>; - remote-endpoint = <&dp_in_vopb>; - }; - }; - }; - - vopb_mmu: iommu@ff903f00 { - compatible = "rockchip,iommu"; - reg = <0x0 0xff903f00 0x0 0x100>; - interrupts = ; - clocks = <&cru ACLK_VOP0>, <&cru HCLK_VOP0>; - clock-names = "aclk", "iface"; - power-domains = <&power RK3399_PD_VOPB>; - #iommu-cells = <0>; - status = "disabled"; - }; - - isp0: isp0@ff910000 { - compatible = "rockchip,rk3399-cif-isp"; - reg = <0x0 0xff910000 0x0 0x4000>; - interrupts = ; - clocks = <&cru SCLK_ISP0>, - <&cru ACLK_ISP0_WRAPPER>, - <&cru HCLK_ISP0_WRAPPER>; - clock-names = "isp", "aclk", "hclk"; - iommus = <&isp0_mmu>; - phys = <&mipi_dphy_rx0>; - phy-names = "dphy"; - power-domains = <&power RK3399_PD_ISP0>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - #address-cells = <1>; - #size-cells = <0>; - }; - }; - }; - - isp0_mmu: iommu@ff914000 { - compatible = "rockchip,iommu"; - reg = <0x0 0xff914000 0x0 0x100>, <0x0 0xff915000 0x0 0x100>; - interrupts = ; - clocks = <&cru ACLK_ISP0_WRAPPER>, <&cru HCLK_ISP0_WRAPPER>; - clock-names = "aclk", "iface"; - #iommu-cells = <0>; - power-domains = <&power RK3399_PD_ISP0>; - rockchip,disable-mmu-reset; - }; - - isp1: isp1@ff920000 { - compatible = "rockchip,rk3399-cif-isp"; - reg = <0x0 0xff920000 0x0 0x4000>; - interrupts = ; - clocks = <&cru SCLK_ISP1>, - <&cru ACLK_ISP1_WRAPPER>, - <&cru HCLK_ISP1_WRAPPER>; - clock-names = "isp", "aclk", "hclk"; - iommus = <&isp1_mmu>; - phys = <&mipi_dsi1>; - phy-names = "dphy"; - power-domains = <&power RK3399_PD_ISP1>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - #address-cells = <1>; - #size-cells = <0>; - }; - }; - }; - - isp1_mmu: iommu@ff924000 { - compatible = "rockchip,iommu"; - reg = <0x0 0xff924000 0x0 0x100>, <0x0 0xff925000 0x0 0x100>; - interrupts = ; - clocks = <&cru ACLK_ISP1_WRAPPER>, <&cru HCLK_ISP1_WRAPPER>; - clock-names = "aclk", "iface"; - #iommu-cells = <0>; - power-domains = <&power RK3399_PD_ISP1>; - rockchip,disable-mmu-reset; - }; - - hdmi_sound: hdmi-sound { - compatible = "simple-audio-card"; - simple-audio-card,format = "i2s"; - simple-audio-card,mclk-fs = <256>; - simple-audio-card,name = "hdmi-sound"; - status = "disabled"; - - simple-audio-card,cpu { - sound-dai = <&i2s2>; - }; - simple-audio-card,codec { - sound-dai = <&hdmi>; - }; - }; - - hdmi: hdmi@ff940000 { - compatible = "rockchip,rk3399-dw-hdmi"; - reg = <0x0 0xff940000 0x0 0x20000>; - interrupts = ; - clocks = <&cru PCLK_HDMI_CTRL>, - <&cru SCLK_HDMI_SFR>, - <&cru SCLK_HDMI_CEC>, - <&cru PCLK_VIO_GRF>, - <&cru PLL_VPLL>; - clock-names = "iahb", "isfr", "cec", "grf", "ref"; - power-domains = <&power RK3399_PD_HDCP>; - reg-io-width = <4>; - rockchip,grf = <&grf>; - #sound-dai-cells = <0>; - status = "disabled"; - - ports { - hdmi_in: port { - #address-cells = <1>; - #size-cells = <0>; - - hdmi_in_vopb: endpoint@0 { - reg = <0>; - remote-endpoint = <&vopb_out_hdmi>; - }; - hdmi_in_vopl: endpoint@1 { - reg = <1>; - remote-endpoint = <&vopl_out_hdmi>; - }; - }; - }; - }; - - mipi_dsi: dsi@ff960000 { - compatible = "rockchip,rk3399-mipi-dsi", "snps,dw-mipi-dsi"; - reg = <0x0 0xff960000 0x0 0x8000>; - interrupts = ; - clocks = <&cru SCLK_DPHY_PLL>, <&cru PCLK_MIPI_DSI0>, - <&cru SCLK_DPHY_TX0_CFG>, <&cru PCLK_VIO_GRF>; - clock-names = "ref", "pclk", "phy_cfg", "grf"; - power-domains = <&power RK3399_PD_VIO>; - resets = <&cru SRST_P_MIPI_DSI0>; - reset-names = "apb"; - rockchip,grf = <&grf>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - mipi_in: port@0 { - reg = <0>; - #address-cells = <1>; - #size-cells = <0>; - - mipi_in_vopb: endpoint@0 { - reg = <0>; - remote-endpoint = <&vopb_out_mipi>; - }; - - mipi_in_vopl: endpoint@1 { - reg = <1>; - remote-endpoint = <&vopl_out_mipi>; - }; - }; - - mipi_out: port@1 { - reg = <1>; - }; - }; - }; - - mipi_dsi1: dsi@ff968000 { - compatible = "rockchip,rk3399-mipi-dsi", "snps,dw-mipi-dsi"; - reg = <0x0 0xff968000 0x0 0x8000>; - interrupts = ; - clocks = <&cru SCLK_DPHY_PLL>, <&cru PCLK_MIPI_DSI1>, - <&cru SCLK_DPHY_TX1RX1_CFG>, <&cru PCLK_VIO_GRF>; - clock-names = "ref", "pclk", "phy_cfg", "grf"; - power-domains = <&power RK3399_PD_VIO>; - resets = <&cru SRST_P_MIPI_DSI1>; - reset-names = "apb"; - rockchip,grf = <&grf>; - #address-cells = <1>; - #size-cells = <0>; - #phy-cells = <0>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - mipi1_in: port@0 { - reg = <0>; - #address-cells = <1>; - #size-cells = <0>; - - mipi1_in_vopb: endpoint@0 { - reg = <0>; - remote-endpoint = <&vopb_out_mipi1>; - }; - - mipi1_in_vopl: endpoint@1 { - reg = <1>; - remote-endpoint = <&vopl_out_mipi1>; - }; - }; - - mipi1_out: port@1 { - reg = <1>; - }; - }; - }; - - edp: dp@ff970000 { - compatible = "rockchip,rk3399-edp"; - reg = <0x0 0xff970000 0x0 0x8000>; - interrupts = ; - clocks = <&cru PCLK_EDP>, <&cru PCLK_EDP_CTRL>, <&cru PCLK_VIO_GRF>; - clock-names = "dp", "pclk", "grf"; - pinctrl-names = "default"; - pinctrl-0 = <&edp_hpd>; - power-domains = <&power RK3399_PD_EDP>; - resets = <&cru SRST_P_EDP_CTRL>; - reset-names = "dp"; - rockchip,grf = <&grf>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - edp_in: port@0 { - reg = <0>; - #address-cells = <1>; - #size-cells = <0>; - - edp_in_vopb: endpoint@0 { - reg = <0>; - remote-endpoint = <&vopb_out_edp>; - }; - - edp_in_vopl: endpoint@1 { - reg = <1>; - remote-endpoint = <&vopl_out_edp>; - }; - }; - - edp_out: port@1 { - reg = <1>; - }; - }; - }; - - gpu: gpu@ff9a0000 { - compatible = "rockchip,rk3399-mali", "arm,mali-t860"; - reg = <0x0 0xff9a0000 0x0 0x10000>; - interrupts = , - , - ; - interrupt-names = "job", "mmu", "gpu"; - clocks = <&cru ACLK_GPU>; - #cooling-cells = <2>; - dynamic-power-coefficient = <2640>; - power-domains = <&power RK3399_PD_GPU>; - status = "disabled"; - }; - - pinctrl: pinctrl { - compatible = "rockchip,rk3399-pinctrl"; - rockchip,grf = <&grf>; - rockchip,pmu = <&pmugrf>; - #address-cells = <2>; - #size-cells = <2>; - ranges; - - gpio0: gpio@ff720000 { - compatible = "rockchip,gpio-bank"; - reg = <0x0 0xff720000 0x0 0x100>; - clocks = <&pmucru PCLK_GPIO0_PMU>; - interrupts = ; - - gpio-controller; - #gpio-cells = <0x2>; - - interrupt-controller; - #interrupt-cells = <0x2>; - }; - - gpio1: gpio@ff730000 { - compatible = "rockchip,gpio-bank"; - reg = <0x0 0xff730000 0x0 0x100>; - clocks = <&pmucru PCLK_GPIO1_PMU>; - interrupts = ; - - gpio-controller; - #gpio-cells = <0x2>; - - interrupt-controller; - #interrupt-cells = <0x2>; - }; - - gpio2: gpio@ff780000 { - compatible = "rockchip,gpio-bank"; - reg = <0x0 0xff780000 0x0 0x100>; - clocks = <&cru PCLK_GPIO2>; - interrupts = ; - - gpio-controller; - #gpio-cells = <0x2>; - - interrupt-controller; - #interrupt-cells = <0x2>; - }; - - gpio3: gpio@ff788000 { - compatible = "rockchip,gpio-bank"; - reg = <0x0 0xff788000 0x0 0x100>; - clocks = <&cru PCLK_GPIO3>; - interrupts = ; - - gpio-controller; - #gpio-cells = <0x2>; - - interrupt-controller; - #interrupt-cells = <0x2>; - }; - - gpio4: gpio@ff790000 { - compatible = "rockchip,gpio-bank"; - reg = <0x0 0xff790000 0x0 0x100>; - clocks = <&cru PCLK_GPIO4>; - interrupts = ; - - gpio-controller; - #gpio-cells = <0x2>; - - interrupt-controller; - #interrupt-cells = <0x2>; - }; - - pcfg_pull_up: pcfg-pull-up { - bias-pull-up; - }; - - pcfg_pull_down: pcfg-pull-down { - bias-pull-down; - }; - - pcfg_pull_none: pcfg-pull-none { - bias-disable; - }; - - pcfg_pull_none_12ma: pcfg-pull-none-12ma { - bias-disable; - drive-strength = <12>; - }; - - pcfg_pull_none_13ma: pcfg-pull-none-13ma { - bias-disable; - drive-strength = <13>; - }; - - pcfg_pull_none_18ma: pcfg-pull-none-18ma { - bias-disable; - drive-strength = <18>; - }; - - pcfg_pull_none_20ma: pcfg-pull-none-20ma { - bias-disable; - drive-strength = <20>; - }; - - pcfg_pull_up_2ma: pcfg-pull-up-2ma { - bias-pull-up; - drive-strength = <2>; - }; - - pcfg_pull_up_8ma: pcfg-pull-up-8ma { - bias-pull-up; - drive-strength = <8>; - }; - - pcfg_pull_up_18ma: pcfg-pull-up-18ma { - bias-pull-up; - drive-strength = <18>; - }; - - pcfg_pull_up_20ma: pcfg-pull-up-20ma { - bias-pull-up; - drive-strength = <20>; - }; - - pcfg_pull_down_4ma: pcfg-pull-down-4ma { - bias-pull-down; - drive-strength = <4>; - }; - - pcfg_pull_down_8ma: pcfg-pull-down-8ma { - bias-pull-down; - drive-strength = <8>; - }; - - pcfg_pull_down_12ma: pcfg-pull-down-12ma { - bias-pull-down; - drive-strength = <12>; - }; - - pcfg_pull_down_18ma: pcfg-pull-down-18ma { - bias-pull-down; - drive-strength = <18>; - }; - - pcfg_pull_down_20ma: pcfg-pull-down-20ma { - bias-pull-down; - drive-strength = <20>; - }; - - pcfg_output_high: pcfg-output-high { - output-high; - }; - - pcfg_output_low: pcfg-output-low { - output-low; - }; - - pcfg_input_enable: pcfg-input-enable { - input-enable; - }; - - pcfg_input_pull_up: pcfg-input-pull-up { - input-enable; - bias-pull-up; - }; - - pcfg_input_pull_down: pcfg-input-pull-down { - input-enable; - bias-pull-down; - }; - - clock { - clk_32k: clk-32k { - rockchip,pins = <0 RK_PA0 2 &pcfg_pull_none>; - }; - }; - - cif { - cif_clkin: cif-clkin { - rockchip,pins = - <2 RK_PB2 3 &pcfg_pull_none>; - }; - - cif_clkouta: cif-clkouta { - rockchip,pins = - <2 RK_PB3 3 &pcfg_pull_none>; - }; - }; - - edp { - edp_hpd: edp-hpd { - rockchip,pins = - <4 RK_PC7 2 &pcfg_pull_none>; - }; - }; - - gmac { - rgmii_pins: rgmii-pins { - rockchip,pins = - /* mac_txclk */ - <3 RK_PC1 1 &pcfg_pull_none_13ma>, - /* mac_rxclk */ - <3 RK_PB6 1 &pcfg_pull_none>, - /* mac_mdio */ - <3 RK_PB5 1 &pcfg_pull_none>, - /* mac_txen */ - <3 RK_PB4 1 &pcfg_pull_none_13ma>, - /* mac_clk */ - <3 RK_PB3 1 &pcfg_pull_none>, - /* mac_rxdv */ - <3 RK_PB1 1 &pcfg_pull_none>, - /* mac_mdc */ - <3 RK_PB0 1 &pcfg_pull_none>, - /* mac_rxd1 */ - <3 RK_PA7 1 &pcfg_pull_none>, - /* mac_rxd0 */ - <3 RK_PA6 1 &pcfg_pull_none>, - /* mac_txd1 */ - <3 RK_PA5 1 &pcfg_pull_none_13ma>, - /* mac_txd0 */ - <3 RK_PA4 1 &pcfg_pull_none_13ma>, - /* mac_rxd3 */ - <3 RK_PA3 1 &pcfg_pull_none>, - /* mac_rxd2 */ - <3 RK_PA2 1 &pcfg_pull_none>, - /* mac_txd3 */ - <3 RK_PA1 1 &pcfg_pull_none_13ma>, - /* mac_txd2 */ - <3 RK_PA0 1 &pcfg_pull_none_13ma>; - }; - - rmii_pins: rmii-pins { - rockchip,pins = - /* mac_mdio */ - <3 RK_PB5 1 &pcfg_pull_none>, - /* mac_txen */ - <3 RK_PB4 1 &pcfg_pull_none_13ma>, - /* mac_clk */ - <3 RK_PB3 1 &pcfg_pull_none>, - /* mac_rxer */ - <3 RK_PB2 1 &pcfg_pull_none>, - /* mac_rxdv */ - <3 RK_PB1 1 &pcfg_pull_none>, - /* mac_mdc */ - <3 RK_PB0 1 &pcfg_pull_none>, - /* mac_rxd1 */ - <3 RK_PA7 1 &pcfg_pull_none>, - /* mac_rxd0 */ - <3 RK_PA6 1 &pcfg_pull_none>, - /* mac_txd1 */ - <3 RK_PA5 1 &pcfg_pull_none_13ma>, - /* mac_txd0 */ - <3 RK_PA4 1 &pcfg_pull_none_13ma>; - }; - }; - - i2c0 { - i2c0_xfer: i2c0-xfer { - rockchip,pins = - <1 RK_PB7 2 &pcfg_pull_none>, - <1 RK_PC0 2 &pcfg_pull_none>; - }; - }; - - i2c1 { - i2c1_xfer: i2c1-xfer { - rockchip,pins = - <4 RK_PA2 1 &pcfg_pull_none>, - <4 RK_PA1 1 &pcfg_pull_none>; - }; - }; - - i2c2 { - i2c2_xfer: i2c2-xfer { - rockchip,pins = - <2 RK_PA1 2 &pcfg_pull_none_12ma>, - <2 RK_PA0 2 &pcfg_pull_none_12ma>; - }; - }; - - i2c3 { - i2c3_xfer: i2c3-xfer { - rockchip,pins = - <4 RK_PC1 1 &pcfg_pull_none>, - <4 RK_PC0 1 &pcfg_pull_none>; - }; - }; - - i2c4 { - i2c4_xfer: i2c4-xfer { - rockchip,pins = - <1 RK_PB4 1 &pcfg_pull_none>, - <1 RK_PB3 1 &pcfg_pull_none>; - }; - }; - - i2c5 { - i2c5_xfer: i2c5-xfer { - rockchip,pins = - <3 RK_PB3 2 &pcfg_pull_none>, - <3 RK_PB2 2 &pcfg_pull_none>; - }; - }; - - i2c6 { - i2c6_xfer: i2c6-xfer { - rockchip,pins = - <2 RK_PB2 2 &pcfg_pull_none>, - <2 RK_PB1 2 &pcfg_pull_none>; - }; - }; - - i2c7 { - i2c7_xfer: i2c7-xfer { - rockchip,pins = - <2 RK_PB0 2 &pcfg_pull_none>, - <2 RK_PA7 2 &pcfg_pull_none>; - }; - }; - - i2c8 { - i2c8_xfer: i2c8-xfer { - rockchip,pins = - <1 RK_PC5 1 &pcfg_pull_none>, - <1 RK_PC4 1 &pcfg_pull_none>; - }; - }; - - i2s0 { - i2s0_2ch_bus: i2s0-2ch-bus { - rockchip,pins = - <3 RK_PD0 1 &pcfg_pull_none>, - <3 RK_PD1 1 &pcfg_pull_none>, - <3 RK_PD2 1 &pcfg_pull_none>, - <3 RK_PD3 1 &pcfg_pull_none>, - <3 RK_PD7 1 &pcfg_pull_none>, - <4 RK_PA0 1 &pcfg_pull_none>; - }; - - i2s0_2ch_bus_bclk_off: i2s0-2ch-bus-bclk-off { - rockchip,pins = - <3 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>, - <3 RK_PD1 1 &pcfg_pull_none>, - <3 RK_PD2 1 &pcfg_pull_none>, - <3 RK_PD3 1 &pcfg_pull_none>, - <3 RK_PD7 1 &pcfg_pull_none>, - <4 RK_PA0 1 &pcfg_pull_none>; - }; - - i2s0_8ch_bus: i2s0-8ch-bus { - rockchip,pins = - <3 RK_PD0 1 &pcfg_pull_none>, - <3 RK_PD1 1 &pcfg_pull_none>, - <3 RK_PD2 1 &pcfg_pull_none>, - <3 RK_PD3 1 &pcfg_pull_none>, - <3 RK_PD4 1 &pcfg_pull_none>, - <3 RK_PD5 1 &pcfg_pull_none>, - <3 RK_PD6 1 &pcfg_pull_none>, - <3 RK_PD7 1 &pcfg_pull_none>, - <4 RK_PA0 1 &pcfg_pull_none>; - }; - - i2s0_8ch_bus_bclk_off: i2s0-8ch-bus-bclk-off { - rockchip,pins = - <3 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>, - <3 RK_PD1 1 &pcfg_pull_none>, - <3 RK_PD2 1 &pcfg_pull_none>, - <3 RK_PD3 1 &pcfg_pull_none>, - <3 RK_PD4 1 &pcfg_pull_none>, - <3 RK_PD5 1 &pcfg_pull_none>, - <3 RK_PD6 1 &pcfg_pull_none>, - <3 RK_PD7 1 &pcfg_pull_none>, - <4 RK_PA0 1 &pcfg_pull_none>; - }; - }; - - i2s1 { - i2s1_2ch_bus: i2s1-2ch-bus { - rockchip,pins = - <4 RK_PA3 1 &pcfg_pull_none>, - <4 RK_PA4 1 &pcfg_pull_none>, - <4 RK_PA5 1 &pcfg_pull_none>, - <4 RK_PA6 1 &pcfg_pull_none>, - <4 RK_PA7 1 &pcfg_pull_none>; - }; - - i2s1_2ch_bus_bclk_off: i2s1-2ch-bus-bclk-off { - rockchip,pins = - <4 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>, - <4 RK_PA4 1 &pcfg_pull_none>, - <4 RK_PA5 1 &pcfg_pull_none>, - <4 RK_PA6 1 &pcfg_pull_none>, - <4 RK_PA7 1 &pcfg_pull_none>; - }; - }; - - sdio0 { - sdio0_bus1: sdio0-bus1 { - rockchip,pins = - <2 RK_PC4 1 &pcfg_pull_up>; - }; - - sdio0_bus4: sdio0-bus4 { - rockchip,pins = - <2 RK_PC4 1 &pcfg_pull_up>, - <2 RK_PC5 1 &pcfg_pull_up>, - <2 RK_PC6 1 &pcfg_pull_up>, - <2 RK_PC7 1 &pcfg_pull_up>; - }; - - sdio0_cmd: sdio0-cmd { - rockchip,pins = - <2 RK_PD0 1 &pcfg_pull_up>; - }; - - sdio0_clk: sdio0-clk { - rockchip,pins = - <2 RK_PD1 1 &pcfg_pull_none>; - }; - - sdio0_cd: sdio0-cd { - rockchip,pins = - <2 RK_PD2 1 &pcfg_pull_up>; - }; - - sdio0_pwr: sdio0-pwr { - rockchip,pins = - <2 RK_PD3 1 &pcfg_pull_up>; - }; - - sdio0_bkpwr: sdio0-bkpwr { - rockchip,pins = - <2 RK_PD4 1 &pcfg_pull_up>; - }; - - sdio0_wp: sdio0-wp { - rockchip,pins = - <0 RK_PA3 1 &pcfg_pull_up>; - }; - - sdio0_int: sdio0-int { - rockchip,pins = - <0 RK_PA4 1 &pcfg_pull_up>; - }; - }; - - sdmmc { - sdmmc_bus1: sdmmc-bus1 { - rockchip,pins = - <4 RK_PB0 1 &pcfg_pull_up>; - }; - - sdmmc_bus4: sdmmc-bus4 { - rockchip,pins = - <4 RK_PB0 1 &pcfg_pull_up>, - <4 RK_PB1 1 &pcfg_pull_up>, - <4 RK_PB2 1 &pcfg_pull_up>, - <4 RK_PB3 1 &pcfg_pull_up>; - }; - - sdmmc_clk: sdmmc-clk { - rockchip,pins = - <4 RK_PB4 1 &pcfg_pull_none>; - }; - - sdmmc_cmd: sdmmc-cmd { - rockchip,pins = - <4 RK_PB5 1 &pcfg_pull_up>; - }; - - sdmmc_cd: sdmmc-cd { - rockchip,pins = - <0 RK_PA7 1 &pcfg_pull_up>; - }; - - sdmmc_wp: sdmmc-wp { - rockchip,pins = - <0 RK_PB0 1 &pcfg_pull_up>; - }; - }; - - suspend { - ap_pwroff: ap-pwroff { - rockchip,pins = <1 RK_PA5 1 &pcfg_pull_none>; - }; - - ddrio_pwroff: ddrio-pwroff { - rockchip,pins = <0 RK_PA1 1 &pcfg_pull_none>; - }; - }; - - spdif { - spdif_bus: spdif-bus { - rockchip,pins = - <4 RK_PC5 1 &pcfg_pull_none>; - }; - - spdif_bus_1: spdif-bus-1 { - rockchip,pins = - <3 RK_PC0 3 &pcfg_pull_none>; - }; - }; - - spi0 { - spi0_clk: spi0-clk { - rockchip,pins = - <3 RK_PA6 2 &pcfg_pull_up>; - }; - spi0_cs0: spi0-cs0 { - rockchip,pins = - <3 RK_PA7 2 &pcfg_pull_up>; - }; - spi0_cs1: spi0-cs1 { - rockchip,pins = - <3 RK_PB0 2 &pcfg_pull_up>; - }; - spi0_tx: spi0-tx { - rockchip,pins = - <3 RK_PA5 2 &pcfg_pull_up>; - }; - spi0_rx: spi0-rx { - rockchip,pins = - <3 RK_PA4 2 &pcfg_pull_up>; - }; - }; - - spi1 { - spi1_clk: spi1-clk { - rockchip,pins = - <1 RK_PB1 2 &pcfg_pull_up>; - }; - spi1_cs0: spi1-cs0 { - rockchip,pins = - <1 RK_PB2 2 &pcfg_pull_up>; - }; - spi1_rx: spi1-rx { - rockchip,pins = - <1 RK_PA7 2 &pcfg_pull_up>; - }; - spi1_tx: spi1-tx { - rockchip,pins = - <1 RK_PB0 2 &pcfg_pull_up>; - }; - }; - - spi2 { - spi2_clk: spi2-clk { - rockchip,pins = - <2 RK_PB3 1 &pcfg_pull_up>; - }; - spi2_cs0: spi2-cs0 { - rockchip,pins = - <2 RK_PB4 1 &pcfg_pull_up>; - }; - spi2_rx: spi2-rx { - rockchip,pins = - <2 RK_PB1 1 &pcfg_pull_up>; - }; - spi2_tx: spi2-tx { - rockchip,pins = - <2 RK_PB2 1 &pcfg_pull_up>; - }; - }; - - spi3 { - spi3_clk: spi3-clk { - rockchip,pins = - <1 RK_PC1 1 &pcfg_pull_up>; - }; - spi3_cs0: spi3-cs0 { - rockchip,pins = - <1 RK_PC2 1 &pcfg_pull_up>; - }; - spi3_rx: spi3-rx { - rockchip,pins = - <1 RK_PB7 1 &pcfg_pull_up>; - }; - spi3_tx: spi3-tx { - rockchip,pins = - <1 RK_PC0 1 &pcfg_pull_up>; - }; - }; - - spi4 { - spi4_clk: spi4-clk { - rockchip,pins = - <3 RK_PA2 2 &pcfg_pull_up>; - }; - spi4_cs0: spi4-cs0 { - rockchip,pins = - <3 RK_PA3 2 &pcfg_pull_up>; - }; - spi4_rx: spi4-rx { - rockchip,pins = - <3 RK_PA0 2 &pcfg_pull_up>; - }; - spi4_tx: spi4-tx { - rockchip,pins = - <3 RK_PA1 2 &pcfg_pull_up>; - }; - }; - - spi5 { - spi5_clk: spi5-clk { - rockchip,pins = - <2 RK_PC6 2 &pcfg_pull_up>; - }; - spi5_cs0: spi5-cs0 { - rockchip,pins = - <2 RK_PC7 2 &pcfg_pull_up>; - }; - spi5_rx: spi5-rx { - rockchip,pins = - <2 RK_PC4 2 &pcfg_pull_up>; - }; - spi5_tx: spi5-tx { - rockchip,pins = - <2 RK_PC5 2 &pcfg_pull_up>; - }; - }; - - testclk { - test_clkout0: test-clkout0 { - rockchip,pins = - <0 RK_PA0 1 &pcfg_pull_none>; - }; - - test_clkout1: test-clkout1 { - rockchip,pins = - <2 RK_PD1 2 &pcfg_pull_none>; - }; - - test_clkout2: test-clkout2 { - rockchip,pins = - <0 RK_PB0 3 &pcfg_pull_none>; - }; - }; - - tsadc { - otp_pin: otp-pin { - rockchip,pins = <1 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - otp_out: otp-out { - rockchip,pins = <1 RK_PA6 1 &pcfg_pull_none>; - }; - }; - - uart0 { - uart0_xfer: uart0-xfer { - rockchip,pins = - <2 RK_PC0 1 &pcfg_pull_up>, - <2 RK_PC1 1 &pcfg_pull_none>; - }; - - uart0_cts: uart0-cts { - rockchip,pins = - <2 RK_PC2 1 &pcfg_pull_none>; - }; - - uart0_rts: uart0-rts { - rockchip,pins = - <2 RK_PC3 1 &pcfg_pull_none>; - }; - }; - - uart1 { - uart1_xfer: uart1-xfer { - rockchip,pins = - <3 RK_PB4 2 &pcfg_pull_up>, - <3 RK_PB5 2 &pcfg_pull_none>; - }; - }; - - uart2a { - uart2a_xfer: uart2a-xfer { - rockchip,pins = - <4 RK_PB0 2 &pcfg_pull_up>, - <4 RK_PB1 2 &pcfg_pull_none>; - }; - }; - - uart2b { - uart2b_xfer: uart2b-xfer { - rockchip,pins = - <4 RK_PC0 2 &pcfg_pull_up>, - <4 RK_PC1 2 &pcfg_pull_none>; - }; - }; - - uart2c { - uart2c_xfer: uart2c-xfer { - rockchip,pins = - <4 RK_PC3 1 &pcfg_pull_up>, - <4 RK_PC4 1 &pcfg_pull_none>; - }; - }; - - uart3 { - uart3_xfer: uart3-xfer { - rockchip,pins = - <3 RK_PB6 2 &pcfg_pull_up>, - <3 RK_PB7 2 &pcfg_pull_none>; - }; - - uart3_cts: uart3-cts { - rockchip,pins = - <3 RK_PC0 2 &pcfg_pull_none>; - }; - - uart3_rts: uart3-rts { - rockchip,pins = - <3 RK_PC1 2 &pcfg_pull_none>; - }; - }; - - uart4 { - uart4_xfer: uart4-xfer { - rockchip,pins = - <1 RK_PA7 1 &pcfg_pull_up>, - <1 RK_PB0 1 &pcfg_pull_none>; - }; - }; - - uarthdcp { - uarthdcp_xfer: uarthdcp-xfer { - rockchip,pins = - <4 RK_PC5 2 &pcfg_pull_up>, - <4 RK_PC6 2 &pcfg_pull_none>; - }; - }; - - pwm0 { - pwm0_pin: pwm0-pin { - rockchip,pins = - <4 RK_PC2 1 &pcfg_pull_none>; - }; - - pwm0_pin_pull_down: pwm0-pin-pull-down { - rockchip,pins = - <4 RK_PC2 1 &pcfg_pull_down>; - }; - - vop0_pwm_pin: vop0-pwm-pin { - rockchip,pins = - <4 RK_PC2 2 &pcfg_pull_none>; - }; - - vop1_pwm_pin: vop1-pwm-pin { - rockchip,pins = - <4 RK_PC2 3 &pcfg_pull_none>; - }; - }; - - pwm1 { - pwm1_pin: pwm1-pin { - rockchip,pins = - <4 RK_PC6 1 &pcfg_pull_none>; - }; - - pwm1_pin_pull_down: pwm1-pin-pull-down { - rockchip,pins = - <4 RK_PC6 1 &pcfg_pull_down>; - }; - }; - - pwm2 { - pwm2_pin: pwm2-pin { - rockchip,pins = - <1 RK_PC3 1 &pcfg_pull_none>; - }; - - pwm2_pin_pull_down: pwm2-pin-pull-down { - rockchip,pins = - <1 RK_PC3 1 &pcfg_pull_down>; - }; - }; - - pwm3a { - pwm3a_pin: pwm3a-pin { - rockchip,pins = - <0 RK_PA6 1 &pcfg_pull_none>; - }; - }; - - pwm3b { - pwm3b_pin: pwm3b-pin { - rockchip,pins = - <1 RK_PB6 1 &pcfg_pull_none>; - }; - }; - - hdmi { - hdmi_i2c_xfer: hdmi-i2c-xfer { - rockchip,pins = - <4 RK_PC1 3 &pcfg_pull_none>, - <4 RK_PC0 3 &pcfg_pull_none>; - }; - - hdmi_cec: hdmi-cec { - rockchip,pins = - <4 RK_PC7 1 &pcfg_pull_none>; - }; - }; - - pcie { - pcie_clkreqn_cpm: pci-clkreqn-cpm { - rockchip,pins = - <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - pcie_clkreqnb_cpm: pci-clkreqnb-cpm { - rockchip,pins = - <4 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - }; -}; diff --git a/arch/arm/dts/rk3399pro-rock-pi-n10.dts b/arch/arm/dts/rk3399pro-rock-pi-n10.dts deleted file mode 100644 index bf026786fa9..00000000000 --- a/arch/arm/dts/rk3399pro-rock-pi-n10.dts +++ /dev/null @@ -1,22 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd - * Copyright (c) 2019 Radxa Limited - * Copyright (c) 2019 Amarula Solutions(India) - */ - -/dts-v1/; -#include "rk3399.dtsi" -#include "rk3399-opp.dtsi" -#include -#include "rk3399pro-vmarc-som.dtsi" - -/ { - model = "Radxa ROCK Pi N10"; - compatible = "radxa,rockpi-n10", "vamrs,rk3399pro-vmarc-som", - "rockchip,rk3399pro"; - - chosen { - stdout-path = "serial2:1500000n8"; - }; -}; diff --git a/arch/arm/dts/rk3399pro-vmarc-som.dtsi b/arch/arm/dts/rk3399pro-vmarc-som.dtsi deleted file mode 100644 index 8823c924dc1..00000000000 --- a/arch/arm/dts/rk3399pro-vmarc-som.dtsi +++ /dev/null @@ -1,477 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd - * Copyright (c) 2019 Vamrs Limited - * Copyright (c) 2019 Amarula Solutions(India) - */ - -#include -#include -#include - -/ { - compatible = "vamrs,rk3399pro-vmarc-som", "rockchip,rk3399pro"; - - aliases { - ethernet0 = &gmac; - mmc0 = &sdhci; - mmc1 = &sdmmc; - }; - - vcc3v3_pcie: vcc-pcie-regulator { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <&gpio4 RK_PD4 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&pcie_pwr>; - regulator-name = "vcc3v3_pcie"; - regulator-always-on; - regulator-boot-on; - vin-supply = <&vcc5v0_sys>; - }; -}; - -&cpu_l0 { - cpu-supply = <&vdd_cpu_l>; -}; - -&cpu_l1 { - cpu-supply = <&vdd_cpu_l>; -}; - -&cpu_l2 { - cpu-supply = <&vdd_cpu_l>; -}; - -&cpu_l3 { - cpu-supply = <&vdd_cpu_l>; -}; - -&emmc_phy { - status = "okay"; -}; - -&gmac { - assigned-clocks = <&cru SCLK_RMII_SRC>; - phy-supply = <&vcc_lan>; - snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; -}; - -&hdmi { - ddc-i2c-bus = <&i2c3>; - pinctrl-names = "default"; - pinctrl-0 = <&hdmi_cec>; -}; - -&i2c0 { - clock-frequency = <400000>; - i2c-scl-falling-time-ns = <30>; - i2c-scl-rising-time-ns = <180>; - status = "okay"; - - rk809: pmic@20 { - compatible = "rockchip,rk809"; - reg = <0x20>; - interrupt-parent = <&gpio1>; - interrupts = ; - #clock-cells = <1>; - clock-output-names = "rk808-clkout1", "rk808-clkout2"; - pinctrl-names = "default"; - pinctrl-0 = <&pmic_int_l>; - rockchip,system-power-controller; - wakeup-source; - - vcc1-supply = <&vcc5v0_sys>; - vcc2-supply = <&vcc5v0_sys>; - vcc3-supply = <&vcc5v0_sys>; - vcc4-supply = <&vcc5v0_sys>; - vcc5-supply = <&vcc_buck5>; - vcc6-supply = <&vcc_buck5>; - vcc7-supply = <&vcc5v0_sys>; - vcc8-supply = <&vcc3v3_sys>; - vcc9-supply = <&vcc5v0_sys>; - - regulators { - vdd_log: DCDC_REG1 { - regulator-name = "vdd_log"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <750000>; - regulator-max-microvolt = <1350000>; - regulator-initial-mode = <0x2>; - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <900000>; - }; - }; - - vdd_cpu_l: DCDC_REG2 { - regulator-name = "vdd_cpu_l"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <750000>; - regulator-max-microvolt = <1350000>; - regulator-ramp-delay = <6001>; - regulator-initial-mode = <0x2>; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_ddr: DCDC_REG3 { - regulator-name = "vcc_ddr"; - regulator-always-on; - regulator-boot-on; - regulator-initial-mode = <0x2>; - regulator-state-mem { - regulator-on-in-suspend; - }; - }; - - vcc3v3_sys: DCDC_REG4 { - regulator-name = "vcc3v3_sys"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-initial-mode = <0x2>; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <3300000>; - }; - }; - - vcc_buck5: DCDC_REG5 { - regulator-name = "vcc_buck5"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <2200000>; - regulator-max-microvolt = <2200000>; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <2200000>; - }; - }; - - vcca_0v9: LDO_REG1 { - regulator-name = "vcca_0v9"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <900000>; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <900000>; - }; - }; - - vcc_1v8: LDO_REG2 { - regulator-name = "vcc_1v8"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vcc_0v9: LDO_REG3 { - regulator-name = "vcc_0v9"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <900000>; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <900000>; - }; - }; - - vcca_1v8: LDO_REG4 { - regulator-name = "vcca_1v8"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1850000>; - regulator-max-microvolt = <1850000>; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1850000>; - }; - }; - - /* - * As per BSP, but schematic not showing any regulator - * pin for LD05. - */ - vdd1v5_dvp: LDO_REG5 { - regulator-name = "vdd1v5_dvp"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1500000>; - regulator-max-microvolt = <1500000>; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_1v5: LDO_REG6 { - regulator-name = "vcc_1v5"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1500000>; - regulator-max-microvolt = <1500000>; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vccio_3v0: LDO_REG7 { - regulator-name = "vccio_3v0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vccio_sd: LDO_REG8 { - regulator-name = "vccio_sd"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - /* - * As per BSP, but schematic not showing any regulator - * pin for LD09. - */ - vcc_sd: LDO_REG9 { - regulator-name = "vcc_sd"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc5v0_usb2: SWITCH_REG1 { - regulator-name = "vcc5v0_usb2"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <5000000>; - }; - }; - - vccio_3v3: vcc_lan: SWITCH_REG2 { - regulator-name = "vccio_3v3"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - }; - }; -}; - -&i2c1 { - i2c-scl-falling-time-ns = <30>; - i2c-scl-rising-time-ns = <140>; - status = "okay"; -}; - -&i2c2 { - clock-frequency = <400000>; - status = "okay"; - - hym8563: rtc@51 { - compatible = "haoyu,hym8563"; - reg = <0x51>; - #clock-cells = <0>; - clock-output-names = "hym8563"; - pinctrl-names = "default"; - pinctrl-0 = <&hym8563_int>; - interrupt-parent = <&gpio4>; - interrupts = ; - }; -}; - -&i2c3 { - i2c-scl-rising-time-ns = <450>; - i2c-scl-falling-time-ns = <15>; - status = "okay"; -}; - -&io_domains { - status = "okay"; - bt656-supply = <&vcca_1v8>; - gpio1830-supply = <&vccio_3v0>; - sdmmc-supply = <&vccio_sd>; -}; - -&pcie_phy { - status = "okay"; -}; - -&pcie0 { - ep-gpios = <&gpio0 RK_PB4 GPIO_ACTIVE_HIGH>; - num-lanes = <4>; - pinctrl-0 = <&pcie_clkreqnb_cpm>; - pinctrl-names = "default"; - vpcie0v9-supply = <&vcca_0v9>; /* VCC_0V9_S0 */ - vpcie1v8-supply = <&vcca_1v8>; /* VCC_1V8_S0 */ - vpcie3v3-supply = <&vcc3v3_pcie>; - status = "okay"; -}; - -&pinctrl { - hym8563 { - hym8563_int: hym8563-int { - rockchip,pins = <4 RK_PD6 0 &pcfg_pull_up>; - }; - }; - - pcie { - pcie_pwr: pcie-pwr { - rockchip,pins = <4 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - pmic { - pmic_int_l: pmic-int-l { - rockchip,pins = <1 RK_PC2 0 &pcfg_pull_up>; - }; - }; - - sdio-pwrseq { - wifi_enable_h: wifi-enable-h { - rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - vbus_host { - usb1_en_oc: usb1-en-oc { - rockchip,pins = <4 RK_PD1 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - vbus_typec { - usb0_en_oc: usb0-en-oc { - rockchip,pins = <4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; -}; - -&pmu_io_domains { - status = "okay"; - pmu1830-supply = <&vcc_1v8>; -}; - -&sdio_pwrseq { - /* - * On the module itself this is one of these (depending - * on the actual card populated): - * - SDIO_RESET_L_WL_REG_ON - * - PDN (power down when low) - */ - reset-gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_LOW>; -}; - -&sdhci { - bus-width = <8>; - mmc-hs400-1_8v; - mmc-hs400-enhanced-strobe; - non-removable; - status = "okay"; -}; - -&sdmmc { - cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>; - max-frequency = <150000000>; -}; - -&tcphy0 { - status = "okay"; -}; - -&tsadc { - rockchip,hw-tshut-mode = <1>; - rockchip,hw-tshut-polarity = <1>; - status = "okay"; -}; - -&u2phy0 { - status = "okay"; - - u2phy0_otg: otg-port { - phy-supply = <&vbus_typec>; - status = "okay"; - }; - - u2phy0_host: host-port { - phy-supply = <&vbus_host>; - status = "okay"; - }; -}; - - -&u2phy1 { - status = "okay"; - - u2phy1_host: host-port { - phy-supply = <&vbus_host>; - status = "okay"; - }; -}; - -&usb_host0_ehci { - status = "okay"; -}; - -&usb_host0_ohci { - status = "okay"; -}; - -&usb_host1_ehci { - status = "okay"; -}; - -&usb_host1_ohci { - status = "okay"; -}; - -&usbdrd3_0 { - status = "okay"; -}; - -&usbdrd_dwc3_0 { - status = "okay"; -}; - -&vbus_host { - enable-active-high; - gpio = <&gpio4 RK_PD1 GPIO_ACTIVE_HIGH>; /* USB1_EN_OC# */ - pinctrl-names = "default"; - pinctrl-0 = <&usb1_en_oc>; -}; - -&vbus_typec { - enable-active-high; - gpio = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>; /* USB0_EN_OC# */ - pinctrl-names = "default"; - pinctrl-0 = <&usb0_en_oc>; -}; diff --git a/arch/arm/dts/rk3399pro.dtsi b/arch/arm/dts/rk3399pro.dtsi deleted file mode 100644 index bb5ebf6608b..00000000000 --- a/arch/arm/dts/rk3399pro.dtsi +++ /dev/null @@ -1,22 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -// Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd. - -#include "rk3399.dtsi" - -/ { - compatible = "rockchip,rk3399pro"; -}; - -/* Default to enabled since AP talk to NPU part over pcie */ -&pcie_phy { - status = "okay"; -}; - -/* Default to enabled since AP talk to NPU part over pcie */ -&pcie0 { - ep-gpios = <&gpio0 RK_PB4 GPIO_ACTIVE_HIGH>; - num-lanes = <4>; - pinctrl-names = "default"; - pinctrl-0 = <&pcie_clkreqn_cpm>; - status = "okay"; -}; diff --git a/doc/device-tree-bindings/clock/rockchip,rk3399-dmc.txt b/doc/device-tree-bindings/clock/rockchip,rk3399-dmc.txt deleted file mode 100644 index 4a56f78f555..00000000000 --- a/doc/device-tree-bindings/clock/rockchip,rk3399-dmc.txt +++ /dev/null @@ -1,42 +0,0 @@ -Rockchip Dynamic Memory Controller Driver -Required properties: -- compatible: "rockchip,rk3399-dmc", "syscon" -- rockchip,cru: this driver should access cru regs, so need get cru here -- rockchip,pmucru: this driver should access pmucru regs, so need get pmucru here -- rockchip,pmugrf: this driver should access pmugrf regs, so need get pmugrf here -- rockchip,pmusgrf: this driver should access pmusgrf regs, so need get pmusgrf here -- rockchip,cic: this driver should access cic regs, so need get cic here -- reg: dynamic ram protocol controller(PCTL) address, PHY Independent(PI) address, phy controller(PHYCTL) address and memory schedule(MSCH) address -- clock: must include clock specifiers corresponding to entries in the clock-names property. - Must contain - dmc_clk: for ddr working frequency -- rockchip,sdram-params: SDRAM parameters, including all the information by ddr driver: - Must contain - Genarate by vendor tool and adjust for U-Boot dtsi. - -Example: - dmc: dmc { - bootph-all; - compatible = "rockchip,rk3399-dmc"; - devfreq-events = <&dfi>; - interrupts = ; - clocks = <&cru SCLK_DDRCLK>; - clock-names = "dmc_clk"; - reg = <0x0 0xffa80000 0x0 0x0800 - 0x0 0xffa80800 0x0 0x1800 - 0x0 0xffa82000 0x0 0x2000 - 0x0 0xffa84000 0x0 0x1000 - 0x0 0xffa88000 0x0 0x0800 - 0x0 0xffa88800 0x0 0x1800 - 0x0 0xffa8a000 0x0 0x2000 - 0x0 0xffa8c000 0x0 0x1000>; - }; - - &dmc { - rockchip,sdram-params = < - 0x2 - 0xa - 0x3 - ... - >; - }; diff --git a/include/dt-bindings/clock/rk3399-cru.h b/include/dt-bindings/clock/rk3399-cru.h deleted file mode 100644 index 39169d94a44..00000000000 --- a/include/dt-bindings/clock/rk3399-cru.h +++ /dev/null @@ -1,751 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later */ -/* - * Copyright (c) 2016 Rockchip Electronics Co. Ltd. - * Author: Xing Zheng - */ - -#ifndef _DT_BINDINGS_CLK_ROCKCHIP_RK3399_H -#define _DT_BINDINGS_CLK_ROCKCHIP_RK3399_H - -/* core clocks */ -#define PLL_APLLL 1 -#define PLL_APLLB 2 -#define PLL_DPLL 3 -#define PLL_CPLL 4 -#define PLL_GPLL 5 -#define PLL_NPLL 6 -#define PLL_VPLL 7 -#define ARMCLKL 8 -#define ARMCLKB 9 - -/* sclk gates (special clocks) */ -#define SCLK_I2C1 65 -#define SCLK_I2C2 66 -#define SCLK_I2C3 67 -#define SCLK_I2C5 68 -#define SCLK_I2C6 69 -#define SCLK_I2C7 70 -#define SCLK_SPI0 71 -#define SCLK_SPI1 72 -#define SCLK_SPI2 73 -#define SCLK_SPI4 74 -#define SCLK_SPI5 75 -#define SCLK_SDMMC 76 -#define SCLK_SDIO 77 -#define SCLK_EMMC 78 -#define SCLK_TSADC 79 -#define SCLK_SARADC 80 -#define SCLK_UART0 81 -#define SCLK_UART1 82 -#define SCLK_UART2 83 -#define SCLK_UART3 84 -#define SCLK_SPDIF_8CH 85 -#define SCLK_I2S0_8CH 86 -#define SCLK_I2S1_8CH 87 -#define SCLK_I2S2_8CH 88 -#define SCLK_I2S_8CH_OUT 89 -#define SCLK_TIMER00 90 -#define SCLK_TIMER01 91 -#define SCLK_TIMER02 92 -#define SCLK_TIMER03 93 -#define SCLK_TIMER04 94 -#define SCLK_TIMER05 95 -#define SCLK_TIMER06 96 -#define SCLK_TIMER07 97 -#define SCLK_TIMER08 98 -#define SCLK_TIMER09 99 -#define SCLK_TIMER10 100 -#define SCLK_TIMER11 101 -#define SCLK_MACREF 102 -#define SCLK_MAC_RX 103 -#define SCLK_MAC_TX 104 -#define SCLK_MAC 105 -#define SCLK_MACREF_OUT 106 -#define SCLK_VOP0_PWM 107 -#define SCLK_VOP1_PWM 108 -#define SCLK_RGA_CORE 109 -#define SCLK_ISP0 110 -#define SCLK_ISP1 111 -#define SCLK_HDMI_CEC 112 -#define SCLK_HDMI_SFR 113 -#define SCLK_DP_CORE 114 -#define SCLK_PVTM_CORE_L 115 -#define SCLK_PVTM_CORE_B 116 -#define SCLK_PVTM_GPU 117 -#define SCLK_PVTM_DDR 118 -#define SCLK_MIPIDPHY_REF 119 -#define SCLK_MIPIDPHY_CFG 120 -#define SCLK_HSICPHY 121 -#define SCLK_USBPHY480M 122 -#define SCLK_USB2PHY0_REF 123 -#define SCLK_USB2PHY1_REF 124 -#define SCLK_UPHY0_TCPDPHY_REF 125 -#define SCLK_UPHY0_TCPDCORE 126 -#define SCLK_UPHY1_TCPDPHY_REF 127 -#define SCLK_UPHY1_TCPDCORE 128 -#define SCLK_USB3OTG0_REF 129 -#define SCLK_USB3OTG1_REF 130 -#define SCLK_USB3OTG0_SUSPEND 131 -#define SCLK_USB3OTG1_SUSPEND 132 -#define SCLK_CRYPTO0 133 -#define SCLK_CRYPTO1 134 -#define SCLK_CCI_TRACE 135 -#define SCLK_CS 136 -#define SCLK_CIF_OUT 137 -#define SCLK_PCIEPHY_REF 138 -#define SCLK_PCIE_CORE 139 -#define SCLK_M0_PERILP 140 -#define SCLK_M0_PERILP_DEC 141 -#define SCLK_CM0S 142 -#define SCLK_DBG_NOC 143 -#define SCLK_DBG_PD_CORE_B 144 -#define SCLK_DBG_PD_CORE_L 145 -#define SCLK_DFIMON0_TIMER 146 -#define SCLK_DFIMON1_TIMER 147 -#define SCLK_INTMEM0 148 -#define SCLK_INTMEM1 149 -#define SCLK_INTMEM2 150 -#define SCLK_INTMEM3 151 -#define SCLK_INTMEM4 152 -#define SCLK_INTMEM5 153 -#define SCLK_SDMMC_DRV 154 -#define SCLK_SDMMC_SAMPLE 155 -#define SCLK_SDIO_DRV 156 -#define SCLK_SDIO_SAMPLE 157 -#define SCLK_VDU_CORE 158 -#define SCLK_VDU_CA 159 -#define SCLK_PCIE_PM 160 -#define SCLK_SPDIF_REC_DPTX 161 -#define SCLK_DPHY_PLL 162 -#define SCLK_DPHY_TX0_CFG 163 -#define SCLK_DPHY_TX1RX1_CFG 164 -#define SCLK_DPHY_RX0_CFG 165 -#define SCLK_RMII_SRC 166 -#define SCLK_PCIEPHY_REF100M 167 -#define SCLK_DDRC 168 -#define SCLK_TESTCLKOUT1 169 -#define SCLK_TESTCLKOUT2 170 - -#define DCLK_VOP0 180 -#define DCLK_VOP1 181 -#define DCLK_VOP0_DIV 182 -#define DCLK_VOP1_DIV 183 -#define DCLK_M0_PERILP 184 -#define DCLK_VOP0_FRAC 185 -#define DCLK_VOP1_FRAC 186 - -#define FCLK_CM0S 190 - -/* aclk gates */ -#define ACLK_PERIHP 192 -#define ACLK_PERIHP_NOC 193 -#define ACLK_PERILP0 194 -#define ACLK_PERILP0_NOC 195 -#define ACLK_PERF_PCIE 196 -#define ACLK_PCIE 197 -#define ACLK_INTMEM 198 -#define ACLK_TZMA 199 -#define ACLK_DCF 200 -#define ACLK_CCI 201 -#define ACLK_CCI_NOC0 202 -#define ACLK_CCI_NOC1 203 -#define ACLK_CCI_GRF 204 -#define ACLK_CENTER 205 -#define ACLK_CENTER_MAIN_NOC 206 -#define ACLK_CENTER_PERI_NOC 207 -#define ACLK_GPU 208 -#define ACLK_PERF_GPU 209 -#define ACLK_GPU_GRF 210 -#define ACLK_DMAC0_PERILP 211 -#define ACLK_DMAC1_PERILP 212 -#define ACLK_GMAC 213 -#define ACLK_GMAC_NOC 214 -#define ACLK_PERF_GMAC 215 -#define ACLK_VOP0_NOC 216 -#define ACLK_VOP0 217 -#define ACLK_VOP1_NOC 218 -#define ACLK_VOP1 219 -#define ACLK_RGA 220 -#define ACLK_RGA_NOC 221 -#define ACLK_HDCP 222 -#define ACLK_HDCP_NOC 223 -#define ACLK_HDCP22 224 -#define ACLK_IEP 225 -#define ACLK_IEP_NOC 226 -#define ACLK_VIO 227 -#define ACLK_VIO_NOC 228 -#define ACLK_ISP0 229 -#define ACLK_ISP1 230 -#define ACLK_ISP0_NOC 231 -#define ACLK_ISP1_NOC 232 -#define ACLK_ISP0_WRAPPER 233 -#define ACLK_ISP1_WRAPPER 234 -#define ACLK_VCODEC 235 -#define ACLK_VCODEC_NOC 236 -#define ACLK_VDU 237 -#define ACLK_VDU_NOC 238 -#define ACLK_PERI 239 -#define ACLK_EMMC 240 -#define ACLK_EMMC_CORE 241 -#define ACLK_EMMC_NOC 242 -#define ACLK_EMMC_GRF 243 -#define ACLK_USB3 244 -#define ACLK_USB3_NOC 245 -#define ACLK_USB3OTG0 246 -#define ACLK_USB3OTG1 247 -#define ACLK_USB3_RKSOC_AXI_PERF 248 -#define ACLK_USB3_GRF 249 -#define ACLK_GIC 250 -#define ACLK_GIC_NOC 251 -#define ACLK_GIC_ADB400_CORE_L_2_GIC 252 -#define ACLK_GIC_ADB400_CORE_B_2_GIC 253 -#define ACLK_GIC_ADB400_GIC_2_CORE_L 254 -#define ACLK_GIC_ADB400_GIC_2_CORE_B 255 -#define ACLK_CORE_ADB400_CORE_L_2_CCI500 256 -#define ACLK_CORE_ADB400_CORE_B_2_CCI500 257 -#define ACLK_ADB400M_PD_CORE_L 258 -#define ACLK_ADB400M_PD_CORE_B 259 -#define ACLK_PERF_CORE_L 260 -#define ACLK_PERF_CORE_B 261 -#define ACLK_GIC_PRE 262 -#define ACLK_VOP0_PRE 263 -#define ACLK_VOP1_PRE 264 - -/* pclk gates */ -#define PCLK_PERIHP 320 -#define PCLK_PERIHP_NOC 321 -#define PCLK_PERILP0 322 -#define PCLK_PERILP1 323 -#define PCLK_PERILP1_NOC 324 -#define PCLK_PERILP_SGRF 325 -#define PCLK_PERIHP_GRF 326 -#define PCLK_PCIE 327 -#define PCLK_SGRF 328 -#define PCLK_INTR_ARB 329 -#define PCLK_CENTER_MAIN_NOC 330 -#define PCLK_CIC 331 -#define PCLK_COREDBG_B 332 -#define PCLK_COREDBG_L 333 -#define PCLK_DBG_CXCS_PD_CORE_B 334 -#define PCLK_DCF 335 -#define PCLK_GPIO2 336 -#define PCLK_GPIO3 337 -#define PCLK_GPIO4 338 -#define PCLK_GRF 339 -#define PCLK_HSICPHY 340 -#define PCLK_I2C1 341 -#define PCLK_I2C2 342 -#define PCLK_I2C3 343 -#define PCLK_I2C5 344 -#define PCLK_I2C6 345 -#define PCLK_I2C7 346 -#define PCLK_SPI0 347 -#define PCLK_SPI1 348 -#define PCLK_SPI2 349 -#define PCLK_SPI4 350 -#define PCLK_SPI5 351 -#define PCLK_UART0 352 -#define PCLK_UART1 353 -#define PCLK_UART2 354 -#define PCLK_UART3 355 -#define PCLK_TSADC 356 -#define PCLK_SARADC 357 -#define PCLK_GMAC 358 -#define PCLK_GMAC_NOC 359 -#define PCLK_TIMER0 360 -#define PCLK_TIMER1 361 -#define PCLK_EDP 362 -#define PCLK_EDP_NOC 363 -#define PCLK_EDP_CTRL 364 -#define PCLK_VIO 365 -#define PCLK_VIO_NOC 366 -#define PCLK_VIO_GRF 367 -#define PCLK_MIPI_DSI0 368 -#define PCLK_MIPI_DSI1 369 -#define PCLK_HDCP 370 -#define PCLK_HDCP_NOC 371 -#define PCLK_HDMI_CTRL 372 -#define PCLK_DP_CTRL 373 -#define PCLK_HDCP22 374 -#define PCLK_GASKET 375 -#define PCLK_DDR 376 -#define PCLK_DDR_MON 377 -#define PCLK_DDR_SGRF 378 -#define PCLK_ISP1_WRAPPER 379 -#define PCLK_WDT 380 -#define PCLK_EFUSE1024NS 381 -#define PCLK_EFUSE1024S 382 -#define PCLK_PMU_INTR_ARB 383 -#define PCLK_MAILBOX0 384 -#define PCLK_USBPHY_MUX_G 385 -#define PCLK_UPHY0_TCPHY_G 386 -#define PCLK_UPHY0_TCPD_G 387 -#define PCLK_UPHY1_TCPHY_G 388 -#define PCLK_UPHY1_TCPD_G 389 -#define PCLK_ALIVE 390 - -/* hclk gates */ -#define HCLK_PERIHP 448 -#define HCLK_PERILP0 449 -#define HCLK_PERILP1 450 -#define HCLK_PERILP0_NOC 451 -#define HCLK_PERILP1_NOC 452 -#define HCLK_M0_PERILP 453 -#define HCLK_M0_PERILP_NOC 454 -#define HCLK_AHB1TOM 455 -#define HCLK_HOST0 456 -#define HCLK_HOST0_ARB 457 -#define HCLK_HOST1 458 -#define HCLK_HOST1_ARB 459 -#define HCLK_HSIC 460 -#define HCLK_SD 461 -#define HCLK_SDMMC 462 -#define HCLK_SDMMC_NOC 463 -#define HCLK_M_CRYPTO0 464 -#define HCLK_M_CRYPTO1 465 -#define HCLK_S_CRYPTO0 466 -#define HCLK_S_CRYPTO1 467 -#define HCLK_I2S0_8CH 468 -#define HCLK_I2S1_8CH 469 -#define HCLK_I2S2_8CH 470 -#define HCLK_SPDIF 471 -#define HCLK_VOP0_NOC 472 -#define HCLK_VOP0 473 -#define HCLK_VOP1_NOC 474 -#define HCLK_VOP1 475 -#define HCLK_ROM 476 -#define HCLK_IEP 477 -#define HCLK_IEP_NOC 478 -#define HCLK_ISP0 479 -#define HCLK_ISP1 480 -#define HCLK_ISP0_NOC 481 -#define HCLK_ISP1_NOC 482 -#define HCLK_ISP0_WRAPPER 483 -#define HCLK_ISP1_WRAPPER 484 -#define HCLK_RGA 485 -#define HCLK_RGA_NOC 486 -#define HCLK_HDCP 487 -#define HCLK_HDCP_NOC 488 -#define HCLK_HDCP22 489 -#define HCLK_VCODEC 490 -#define HCLK_VCODEC_NOC 491 -#define HCLK_VDU 492 -#define HCLK_VDU_NOC 493 -#define HCLK_SDIO 494 -#define HCLK_SDIO_NOC 495 -#define HCLK_SDIOAUDIO_NOC 496 - -#define CLK_NR_CLKS (HCLK_SDIOAUDIO_NOC + 1) - -/* pmu-clocks indices */ - -#define PLL_PPLL 1 - -#define SCLK_32K_SUSPEND_PMU 2 -#define SCLK_SPI3_PMU 3 -#define SCLK_TIMER12_PMU 4 -#define SCLK_TIMER13_PMU 5 -#define SCLK_UART4_PMU 6 -#define SCLK_PVTM_PMU 7 -#define SCLK_WIFI_PMU 8 -#define SCLK_I2C0_PMU 9 -#define SCLK_I2C4_PMU 10 -#define SCLK_I2C8_PMU 11 - -#define PCLK_SRC_PMU 19 -#define PCLK_PMU 20 -#define PCLK_PMUGRF_PMU 21 -#define PCLK_INTMEM1_PMU 22 -#define PCLK_GPIO0_PMU 23 -#define PCLK_GPIO1_PMU 24 -#define PCLK_SGRF_PMU 25 -#define PCLK_NOC_PMU 26 -#define PCLK_I2C0_PMU 27 -#define PCLK_I2C4_PMU 28 -#define PCLK_I2C8_PMU 29 -#define PCLK_RKPWM_PMU 30 -#define PCLK_SPI3_PMU 31 -#define PCLK_TIMER_PMU 32 -#define PCLK_MAILBOX_PMU 33 -#define PCLK_UART4_PMU 34 -#define PCLK_WDT_M0_PMU 35 - -#define FCLK_CM0S_SRC_PMU 44 -#define FCLK_CM0S_PMU 45 -#define SCLK_CM0S_PMU 46 -#define HCLK_CM0S_PMU 47 -#define DCLK_CM0S_PMU 48 -#define PCLK_INTR_ARB_PMU 49 -#define HCLK_NOC_PMU 50 - -#define CLKPMU_NR_CLKS (HCLK_NOC_PMU + 1) - -/* soft-reset indices */ - -/* cru_softrst_con0 */ -#define SRST_CORE_L0 0 -#define SRST_CORE_B0 1 -#define SRST_CORE_PO_L0 2 -#define SRST_CORE_PO_B0 3 -#define SRST_L2_L 4 -#define SRST_L2_B 5 -#define SRST_ADB_L 6 -#define SRST_ADB_B 7 -#define SRST_A_CCI 8 -#define SRST_A_CCIM0_NOC 9 -#define SRST_A_CCIM1_NOC 10 -#define SRST_DBG_NOC 11 - -/* cru_softrst_con1 */ -#define SRST_CORE_L0_T 16 -#define SRST_CORE_L1 17 -#define SRST_CORE_L2 18 -#define SRST_CORE_L3 19 -#define SRST_CORE_PO_L0_T 20 -#define SRST_CORE_PO_L1 21 -#define SRST_CORE_PO_L2 22 -#define SRST_CORE_PO_L3 23 -#define SRST_A_ADB400_GIC2COREL 24 -#define SRST_A_ADB400_COREL2GIC 25 -#define SRST_P_DBG_L 26 -#define SRST_L2_L_T 28 -#define SRST_ADB_L_T 29 -#define SRST_A_RKPERF_L 30 -#define SRST_PVTM_CORE_L 31 - -/* cru_softrst_con2 */ -#define SRST_CORE_B0_T 32 -#define SRST_CORE_B1 33 -#define SRST_CORE_PO_B0_T 36 -#define SRST_CORE_PO_B1 37 -#define SRST_A_ADB400_GIC2COREB 40 -#define SRST_A_ADB400_COREB2GIC 41 -#define SRST_P_DBG_B 42 -#define SRST_L2_B_T 43 -#define SRST_ADB_B_T 45 -#define SRST_A_RKPERF_B 46 -#define SRST_PVTM_CORE_B 47 - -/* cru_softrst_con3 */ -#define SRST_A_CCI_T 50 -#define SRST_A_CCIM0_NOC_T 51 -#define SRST_A_CCIM1_NOC_T 52 -#define SRST_A_ADB400M_PD_CORE_B_T 53 -#define SRST_A_ADB400M_PD_CORE_L_T 54 -#define SRST_DBG_NOC_T 55 -#define SRST_DBG_CXCS 56 -#define SRST_CCI_TRACE 57 -#define SRST_P_CCI_GRF 58 - -/* cru_softrst_con4 */ -#define SRST_A_CENTER_MAIN_NOC 64 -#define SRST_A_CENTER_PERI_NOC 65 -#define SRST_P_CENTER_MAIN 66 -#define SRST_P_DDRMON 67 -#define SRST_P_CIC 68 -#define SRST_P_CENTER_SGRF 69 -#define SRST_DDR0_MSCH 70 -#define SRST_DDRCFG0_MSCH 71 -#define SRST_DDR0 72 -#define SRST_DDRPHY0 73 -#define SRST_DDR1_MSCH 74 -#define SRST_DDRCFG1_MSCH 75 -#define SRST_DDR1 76 -#define SRST_DDRPHY1 77 -#define SRST_DDR_CIC 78 -#define SRST_PVTM_DDR 79 - -/* cru_softrst_con5 */ -#define SRST_A_VCODEC_NOC 80 -#define SRST_A_VCODEC 81 -#define SRST_H_VCODEC_NOC 82 -#define SRST_H_VCODEC 83 -#define SRST_A_VDU_NOC 88 -#define SRST_A_VDU 89 -#define SRST_H_VDU_NOC 90 -#define SRST_H_VDU 91 -#define SRST_VDU_CORE 92 -#define SRST_VDU_CA 93 - -/* cru_softrst_con6 */ -#define SRST_A_IEP_NOC 96 -#define SRST_A_VOP_IEP 97 -#define SRST_A_IEP 98 -#define SRST_H_IEP_NOC 99 -#define SRST_H_IEP 100 -#define SRST_A_RGA_NOC 102 -#define SRST_A_RGA 103 -#define SRST_H_RGA_NOC 104 -#define SRST_H_RGA 105 -#define SRST_RGA_CORE 106 -#define SRST_EMMC_NOC 108 -#define SRST_EMMC 109 -#define SRST_EMMC_GRF 110 - -/* cru_softrst_con7 */ -#define SRST_A_PERIHP_NOC 112 -#define SRST_P_PERIHP_GRF 113 -#define SRST_H_PERIHP_NOC 114 -#define SRST_USBHOST0 115 -#define SRST_HOSTC0_AUX 116 -#define SRST_HOST0_ARB 117 -#define SRST_USBHOST1 118 -#define SRST_HOSTC1_AUX 119 -#define SRST_HOST1_ARB 120 -#define SRST_SDIO0 121 -#define SRST_SDMMC 122 -#define SRST_HSIC 123 -#define SRST_HSIC_AUX 124 -#define SRST_AHB1TOM 125 -#define SRST_P_PERIHP_NOC 126 -#define SRST_HSICPHY 127 - -/* cru_softrst_con8 */ -#define SRST_A_PCIE 128 -#define SRST_P_PCIE 129 -#define SRST_PCIE_CORE 130 -#define SRST_PCIE_MGMT 131 -#define SRST_PCIE_MGMT_STICKY 132 -#define SRST_PCIE_PIPE 133 -#define SRST_PCIE_PM 134 -#define SRST_PCIEPHY 135 -#define SRST_A_GMAC_NOC 136 -#define SRST_A_GMAC 137 -#define SRST_P_GMAC_NOC 138 -#define SRST_P_GMAC_GRF 140 -#define SRST_HSICPHY_POR 142 -#define SRST_HSICPHY_UTMI 143 - -/* cru_softrst_con9 */ -#define SRST_USB2PHY0_POR 144 -#define SRST_USB2PHY0_UTMI_PORT0 145 -#define SRST_USB2PHY0_UTMI_PORT1 146 -#define SRST_USB2PHY0_EHCIPHY 147 -#define SRST_UPHY0_PIPE_L00 148 -#define SRST_UPHY0 149 -#define SRST_UPHY0_TCPDPWRUP 150 -#define SRST_USB2PHY1_POR 152 -#define SRST_USB2PHY1_UTMI_PORT0 153 -#define SRST_USB2PHY1_UTMI_PORT1 154 -#define SRST_USB2PHY1_EHCIPHY 155 -#define SRST_UPHY1_PIPE_L00 156 -#define SRST_UPHY1 157 -#define SRST_UPHY1_TCPDPWRUP 158 - -/* cru_softrst_con10 */ -#define SRST_A_PERILP0_NOC 160 -#define SRST_A_DCF 161 -#define SRST_GIC500 162 -#define SRST_DMAC0_PERILP0 163 -#define SRST_DMAC1_PERILP0 164 -#define SRST_TZMA 165 -#define SRST_INTMEM 166 -#define SRST_ADB400_MST0 167 -#define SRST_ADB400_MST1 168 -#define SRST_ADB400_SLV0 169 -#define SRST_ADB400_SLV1 170 -#define SRST_H_PERILP0 171 -#define SRST_H_PERILP0_NOC 172 -#define SRST_ROM 173 -#define SRST_CRYPTO0_S 174 -#define SRST_CRYPTO0_M 175 - -/* cru_softrst_con11 */ -#define SRST_P_DCF 176 -#define SRST_CM0S_NOC 177 -#define SRST_CM0S 178 -#define SRST_CM0S_DBG 179 -#define SRST_CM0S_PO 180 -#define SRST_CRYPTO0 181 -#define SRST_P_PERILP1_SGRF 182 -#define SRST_P_PERILP1_GRF 183 -#define SRST_CRYPTO1_S 184 -#define SRST_CRYPTO1_M 185 -#define SRST_CRYPTO1 186 -#define SRST_GIC_NOC 188 -#define SRST_SD_NOC 189 -#define SRST_SDIOAUDIO_BRG 190 - -/* cru_softrst_con12 */ -#define SRST_H_PERILP1 192 -#define SRST_H_PERILP1_NOC 193 -#define SRST_H_I2S0_8CH 194 -#define SRST_H_I2S1_8CH 195 -#define SRST_H_I2S2_8CH 196 -#define SRST_H_SPDIF_8CH 197 -#define SRST_P_PERILP1_NOC 198 -#define SRST_P_EFUSE_1024 199 -#define SRST_P_EFUSE_1024S 200 -#define SRST_P_I2C0 201 -#define SRST_P_I2C1 202 -#define SRST_P_I2C2 203 -#define SRST_P_I2C3 204 -#define SRST_P_I2C4 205 -#define SRST_P_I2C5 206 -#define SRST_P_MAILBOX0 207 - -/* cru_softrst_con13 */ -#define SRST_P_UART0 208 -#define SRST_P_UART1 209 -#define SRST_P_UART2 210 -#define SRST_P_UART3 211 -#define SRST_P_SARADC 212 -#define SRST_P_TSADC 213 -#define SRST_P_SPI0 214 -#define SRST_P_SPI1 215 -#define SRST_P_SPI2 216 -#define SRST_P_SPI3 217 -#define SRST_P_SPI4 218 -#define SRST_SPI0 219 -#define SRST_SPI1 220 -#define SRST_SPI2 221 -#define SRST_SPI3 222 -#define SRST_SPI4 223 - -/* cru_softrst_con14 */ -#define SRST_I2S0_8CH 224 -#define SRST_I2S1_8CH 225 -#define SRST_I2S2_8CH 226 -#define SRST_SPDIF_8CH 227 -#define SRST_UART0 228 -#define SRST_UART1 229 -#define SRST_UART2 230 -#define SRST_UART3 231 -#define SRST_TSADC 232 -#define SRST_I2C0 233 -#define SRST_I2C1 234 -#define SRST_I2C2 235 -#define SRST_I2C3 236 -#define SRST_I2C4 237 -#define SRST_I2C5 238 -#define SRST_SDIOAUDIO_NOC 239 - -/* cru_softrst_con15 */ -#define SRST_A_VIO_NOC 240 -#define SRST_A_HDCP_NOC 241 -#define SRST_A_HDCP 242 -#define SRST_H_HDCP_NOC 243 -#define SRST_H_HDCP 244 -#define SRST_P_HDCP_NOC 245 -#define SRST_P_HDCP 246 -#define SRST_P_HDMI_CTRL 247 -#define SRST_P_DP_CTRL 248 -#define SRST_S_DP_CTRL 249 -#define SRST_C_DP_CTRL 250 -#define SRST_P_MIPI_DSI0 251 -#define SRST_P_MIPI_DSI1 252 -#define SRST_DP_CORE 253 -#define SRST_DP_I2S 254 - -/* cru_softrst_con16 */ -#define SRST_GASKET 256 -#define SRST_VIO_GRF 258 -#define SRST_DPTX_SPDIF_REC 259 -#define SRST_HDMI_CTRL 260 -#define SRST_HDCP_CTRL 261 -#define SRST_A_ISP0_NOC 262 -#define SRST_A_ISP1_NOC 263 -#define SRST_H_ISP0_NOC 266 -#define SRST_H_ISP1_NOC 267 -#define SRST_H_ISP0 268 -#define SRST_H_ISP1 269 -#define SRST_ISP0 270 -#define SRST_ISP1 271 - -/* cru_softrst_con17 */ -#define SRST_A_VOP0_NOC 272 -#define SRST_A_VOP1_NOC 273 -#define SRST_A_VOP0 274 -#define SRST_A_VOP1 275 -#define SRST_H_VOP0_NOC 276 -#define SRST_H_VOP1_NOC 277 -#define SRST_H_VOP0 278 -#define SRST_H_VOP1 279 -#define SRST_D_VOP0 280 -#define SRST_D_VOP1 281 -#define SRST_VOP0_PWM 282 -#define SRST_VOP1_PWM 283 -#define SRST_P_EDP_NOC 284 -#define SRST_P_EDP_CTRL 285 - -/* cru_softrst_con18 */ -#define SRST_A_GPU 288 -#define SRST_A_GPU_NOC 289 -#define SRST_A_GPU_GRF 290 -#define SRST_PVTM_GPU 291 -#define SRST_A_USB3_NOC 292 -#define SRST_A_USB3_OTG0 293 -#define SRST_A_USB3_OTG1 294 -#define SRST_A_USB3_GRF 295 -#define SRST_PMU 296 - -/* cru_softrst_con19 */ -#define SRST_P_TIMER0_5 304 -#define SRST_TIMER0 305 -#define SRST_TIMER1 306 -#define SRST_TIMER2 307 -#define SRST_TIMER3 308 -#define SRST_TIMER4 309 -#define SRST_TIMER5 310 -#define SRST_P_TIMER6_11 311 -#define SRST_TIMER6 312 -#define SRST_TIMER7 313 -#define SRST_TIMER8 314 -#define SRST_TIMER9 315 -#define SRST_TIMER10 316 -#define SRST_TIMER11 317 -#define SRST_P_INTR_ARB_PMU 318 -#define SRST_P_ALIVE_SGRF 319 - -/* cru_softrst_con20 */ -#define SRST_P_GPIO2 320 -#define SRST_P_GPIO3 321 -#define SRST_P_GPIO4 322 -#define SRST_P_GRF 323 -#define SRST_P_ALIVE_NOC 324 -#define SRST_P_WDT0 325 -#define SRST_P_WDT1 326 -#define SRST_P_INTR_ARB 327 -#define SRST_P_UPHY0_DPTX 328 -#define SRST_P_UPHY0_APB 330 -#define SRST_P_UPHY0_TCPHY 332 -#define SRST_P_UPHY1_TCPHY 333 -#define SRST_P_UPHY0_TCPDCTRL 334 -#define SRST_P_UPHY1_TCPDCTRL 335 - -/* pmu soft-reset indices */ - -/* pmu_cru_softrst_con0 */ -#define SRST_P_NOC 0 -#define SRST_P_INTMEM 1 -#define SRST_H_CM0S 2 -#define SRST_H_CM0S_NOC 3 -#define SRST_DBG_CM0S 4 -#define SRST_PO_CM0S 5 -#define SRST_P_SPI6 6 -#define SRST_SPI6 7 -#define SRST_P_TIMER_0_1 8 -#define SRST_P_TIMER_0 9 -#define SRST_P_TIMER_1 10 -#define SRST_P_UART4 11 -#define SRST_UART4 12 -#define SRST_P_WDT 13 - -/* pmu_cru_softrst_con1 */ -#define SRST_P_I2C6 16 -#define SRST_P_I2C7 17 -#define SRST_P_I2C8 18 -#define SRST_P_MAILBOX 19 -#define SRST_P_RKPWM 20 -#define SRST_P_PMUGRF 21 -#define SRST_P_SGRF 22 -#define SRST_P_GPIO0 23 -#define SRST_P_GPIO1 24 -#define SRST_P_CRU 25 -#define SRST_P_INTR 26 -#define SRST_PVTM 27 -#define SRST_I2C6 28 -#define SRST_I2C7 29 -#define SRST_I2C8 30 - -#endif diff --git a/include/dt-bindings/power/rk3399-power.h b/include/dt-bindings/power/rk3399-power.h deleted file mode 100644 index 168b3bfbd6f..00000000000 --- a/include/dt-bindings/power/rk3399-power.h +++ /dev/null @@ -1,53 +0,0 @@ -#ifndef __DT_BINDINGS_POWER_RK3399_POWER_H__ -#define __DT_BINDINGS_POWER_RK3399_POWER_H__ - -/* VD_CORE_L */ -#define RK3399_PD_A53_L0 0 -#define RK3399_PD_A53_L1 1 -#define RK3399_PD_A53_L2 2 -#define RK3399_PD_A53_L3 3 -#define RK3399_PD_SCU_L 4 - -/* VD_CORE_B */ -#define RK3399_PD_A72_B0 5 -#define RK3399_PD_A72_B1 6 -#define RK3399_PD_SCU_B 7 - -/* VD_LOGIC */ -#define RK3399_PD_TCPD0 8 -#define RK3399_PD_TCPD1 9 -#define RK3399_PD_CCI 10 -#define RK3399_PD_CCI0 11 -#define RK3399_PD_CCI1 12 -#define RK3399_PD_PERILP 13 -#define RK3399_PD_PERIHP 14 -#define RK3399_PD_VIO 15 -#define RK3399_PD_VO 16 -#define RK3399_PD_VOPB 17 -#define RK3399_PD_VOPL 18 -#define RK3399_PD_ISP0 19 -#define RK3399_PD_ISP1 20 -#define RK3399_PD_HDCP 21 -#define RK3399_PD_GMAC 22 -#define RK3399_PD_EMMC 23 -#define RK3399_PD_USB3 24 -#define RK3399_PD_EDP 25 -#define RK3399_PD_GIC 26 -#define RK3399_PD_SD 27 -#define RK3399_PD_SDIOAUDIO 28 -#define RK3399_PD_ALIVE 29 - -/* VD_CENTER */ -#define RK3399_PD_CENTER 30 -#define RK3399_PD_VCODEC 31 -#define RK3399_PD_VDU 32 -#define RK3399_PD_RGA 33 -#define RK3399_PD_IEP 34 - -/* VD_GPU */ -#define RK3399_PD_GPU 35 - -/* VD_PMU */ -#define RK3399_PD_PMU 36 - -#endif -- cgit v1.2.3 From 893f2eff8871f3cc8fd6a472e26fc609b7d08a26 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Sat, 4 May 2024 19:43:01 +0000 Subject: rockchip: rk356x: Remove redundant device tree files Remove redundant device tree files now that RK356x boards have been migrated to use OF_UPSTREAM. Signed-off-by: Jonas Karlman Reviewed-by: Kever Yang --- arch/arm/dts/rk3566-anbernic-rgxx3.dtsi | 788 -------- arch/arm/dts/rk3566-quartz64-a.dts | 838 -------- arch/arm/dts/rk3566-quartz64-b.dts | 737 ------- arch/arm/dts/rk3566-radxa-cm3-io.dts | 281 --- arch/arm/dts/rk3566-radxa-cm3.dtsi | 425 ---- arch/arm/dts/rk3566-soquartz-blade.dts | 198 -- arch/arm/dts/rk3566-soquartz-cm4.dts | 196 -- arch/arm/dts/rk3566-soquartz-model-a.dts | 236 --- arch/arm/dts/rk3566-soquartz.dtsi | 684 ------- arch/arm/dts/rk3566.dtsi | 35 - arch/arm/dts/rk3568-bpi-r2-pro.dts | 852 -------- arch/arm/dts/rk3568-evb.dts | 689 ------- arch/arm/dts/rk3568-lubancat-2.dts | 730 ------- arch/arm/dts/rk3568-nanopi-r5c.dts | 112 -- arch/arm/dts/rk3568-nanopi-r5s.dts | 136 -- arch/arm/dts/rk3568-nanopi-r5s.dtsi | 587 ------ arch/arm/dts/rk3568-odroid-m1.dts | 741 ------- arch/arm/dts/rk3568-pinctrl.dtsi | 3214 ------------------------------ arch/arm/dts/rk3568-radxa-cm3i.dtsi | 412 ---- arch/arm/dts/rk3568-radxa-e25.dts | 236 --- arch/arm/dts/rk3568-rock-3a.dts | 859 -------- arch/arm/dts/rk3568.dtsi | 267 --- arch/arm/dts/rk356x.dtsi | 1886 ------------------ include/dt-bindings/clock/rk3568-cru.h | 926 --------- include/dt-bindings/power/rk3568-power.h | 32 - 25 files changed, 16097 deletions(-) delete mode 100644 arch/arm/dts/rk3566-anbernic-rgxx3.dtsi delete mode 100644 arch/arm/dts/rk3566-quartz64-a.dts delete mode 100644 arch/arm/dts/rk3566-quartz64-b.dts delete mode 100644 arch/arm/dts/rk3566-radxa-cm3-io.dts delete mode 100644 arch/arm/dts/rk3566-radxa-cm3.dtsi delete mode 100644 arch/arm/dts/rk3566-soquartz-blade.dts delete mode 100644 arch/arm/dts/rk3566-soquartz-cm4.dts delete mode 100644 arch/arm/dts/rk3566-soquartz-model-a.dts delete mode 100644 arch/arm/dts/rk3566-soquartz.dtsi delete mode 100644 arch/arm/dts/rk3566.dtsi delete mode 100644 arch/arm/dts/rk3568-bpi-r2-pro.dts delete mode 100644 arch/arm/dts/rk3568-evb.dts delete mode 100644 arch/arm/dts/rk3568-lubancat-2.dts delete mode 100644 arch/arm/dts/rk3568-nanopi-r5c.dts delete mode 100644 arch/arm/dts/rk3568-nanopi-r5s.dts delete mode 100644 arch/arm/dts/rk3568-nanopi-r5s.dtsi delete mode 100644 arch/arm/dts/rk3568-odroid-m1.dts delete mode 100644 arch/arm/dts/rk3568-pinctrl.dtsi delete mode 100644 arch/arm/dts/rk3568-radxa-cm3i.dtsi delete mode 100644 arch/arm/dts/rk3568-radxa-e25.dts delete mode 100644 arch/arm/dts/rk3568-rock-3a.dts delete mode 100644 arch/arm/dts/rk3568.dtsi delete mode 100644 arch/arm/dts/rk356x.dtsi delete mode 100644 include/dt-bindings/clock/rk3568-cru.h delete mode 100644 include/dt-bindings/power/rk3568-power.h (limited to 'include') diff --git a/arch/arm/dts/rk3566-anbernic-rgxx3.dtsi b/arch/arm/dts/rk3566-anbernic-rgxx3.dtsi deleted file mode 100644 index 8cbf3d9a4f2..00000000000 --- a/arch/arm/dts/rk3566-anbernic-rgxx3.dtsi +++ /dev/null @@ -1,788 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) - -/dts-v1/; - -#include -#include -#include -#include -#include -#include "rk3566.dtsi" - -/ { - chosen: chosen { - stdout-path = "serial2:1500000n8"; - }; - - adc-joystick { - compatible = "adc-joystick"; - io-channels = <&adc_mux 0>, - <&adc_mux 1>, - <&adc_mux 2>, - <&adc_mux 3>; - pinctrl-0 = <&joy_mux_en>; - pinctrl-names = "default"; - poll-interval = <60>; - #address-cells = <1>; - #size-cells = <0>; - - axis@0 { - reg = <0>; - abs-flat = <32>; - abs-fuzz = <32>; - abs-range = <1023 15>; - linux,code = ; - }; - - axis@1 { - reg = <1>; - abs-flat = <32>; - abs-fuzz = <32>; - abs-range = <15 1023>; - linux,code = ; - }; - - axis@2 { - reg = <2>; - abs-flat = <32>; - abs-fuzz = <32>; - abs-range = <15 1023>; - linux,code = ; - }; - - axis@3 { - reg = <3>; - abs-flat = <32>; - abs-fuzz = <32>; - abs-range = <1023 15>; - linux,code = ; - }; - }; - - adc_keys: adc-keys { - compatible = "adc-keys"; - io-channels = <&saradc 0>; - io-channel-names = "buttons"; - keyup-threshold-microvolt = <1800000>; - poll-interval = <60>; - - /* - * Button is mapped to F key in BSP kernel, but - * according to input guidelines it should be mode. - */ - button-mode { - label = "MODE"; - linux,code = ; - press-threshold-microvolt = <1750>; - }; - }; - - adc_mux: adc-mux { - compatible = "io-channel-mux"; - channels = "left_x", "right_x", "left_y", "right_y"; - #io-channel-cells = <1>; - io-channels = <&saradc 3>; - io-channel-names = "parent"; - mux-controls = <&gpio_mux>; - settle-time-us = <100>; - }; - - gpio_keys_control: gpio-keys-control { - compatible = "gpio-keys"; - pinctrl-0 = <&btn_pins_ctrl>; - pinctrl-names = "default"; - - button-b { - gpios = <&gpio3 RK_PC3 GPIO_ACTIVE_LOW>; - label = "SOUTH"; - linux,code = ; - }; - - button-down { - gpios = <&gpio3 RK_PA4 GPIO_ACTIVE_LOW>; - label = "DPAD-DOWN"; - linux,code = ; - }; - - button-l1 { - gpios = <&gpio3 RK_PB1 GPIO_ACTIVE_LOW>; - label = "TL"; - linux,code = ; - }; - - button-l2 { - gpios = <&gpio3 RK_PB2 GPIO_ACTIVE_LOW>; - label = "TL2"; - linux,code = ; - }; - - button-select { - gpios = <&gpio3 RK_PB6 GPIO_ACTIVE_LOW>; - label = "SELECT"; - linux,code = ; - }; - - button-start { - gpios = <&gpio3 RK_PB5 GPIO_ACTIVE_LOW>; - label = "START"; - linux,code = ; - }; - - button-thumbl { - gpios = <&gpio3 RK_PA1 GPIO_ACTIVE_LOW>; - label = "THUMBL"; - linux,code = ; - }; - - button-thumbr { - gpios = <&gpio3 RK_PA2 GPIO_ACTIVE_LOW>; - label = "THUMBR"; - linux,code = ; - }; - - button-up { - gpios = <&gpio3 RK_PA3 GPIO_ACTIVE_LOW>; - label = "DPAD-UP"; - linux,code = ; - }; - - button-x { - gpios = <&gpio3 RK_PC0 GPIO_ACTIVE_LOW>; - label = "NORTH"; - linux,code = ; - }; - }; - - gpio_keys_vol: gpio-keys-vol { - compatible = "gpio-keys"; - autorepeat; - pinctrl-0 = <&btn_pins_vol>; - pinctrl-names = "default"; - - button-vol-down { - gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_LOW>; - label = "VOLUMEDOWN"; - linux,code = ; - }; - - button-vol-up { - gpios = <&gpio3 RK_PA7 GPIO_ACTIVE_LOW>; - label = "VOLUMEUP"; - linux,code = ; - }; - }; - - gpio_mux: mux-controller { - compatible = "gpio-mux"; - mux-gpios = <&gpio0 RK_PB6 GPIO_ACTIVE_LOW>, - <&gpio0 RK_PB7 GPIO_ACTIVE_LOW>; - #mux-control-cells = <0>; - }; - - hdmi-con { - compatible = "hdmi-connector"; - ddc-i2c-bus = <&i2c5>; - type = "c"; - - port { - hdmi_con_in: endpoint { - remote-endpoint = <&hdmi_out_con>; - }; - }; - }; - - leds: pwm-leds { - compatible = "pwm-leds"; - - green_led: led-0 { - color = ; - default-state = "on"; - function = LED_FUNCTION_POWER; - max-brightness = <255>; - pwms = <&pwm6 0 25000 0>; - }; - - amber_led: led-1 { - color = ; - function = LED_FUNCTION_CHARGING; - max-brightness = <255>; - pwms = <&pwm7 0 25000 0>; - }; - - red_led: led-2 { - color = ; - default-state = "off"; - function = LED_FUNCTION_STATUS; - max-brightness = <255>; - pwms = <&pwm0 0 25000 0>; - }; - }; - - sdio_pwrseq: sdio-pwrseq { - compatible = "mmc-pwrseq-simple"; - clocks = <&rk817 1>; - clock-names = "ext_clock"; - pinctrl-0 = <&wifi_enable_h>; - pinctrl-names = "default"; - post-power-on-delay-ms = <200>; - reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_LOW>; - }; - - vcc3v3_lcd0_n: regulator-vcc3v3-lcd0 { - compatible = "regulator-fixed"; - gpio = <&gpio0 RK_PC2 GPIO_ACTIVE_HIGH>; - enable-active-high; - pinctrl-0 = <&vcc_lcd_h>; - pinctrl-names = "default"; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-name = "vcc3v3_lcd0_n"; - vin-supply = <&vcc_3v3>; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_sys: regulator-vcc-sys { - compatible = "regulator-fixed"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3800000>; - regulator-max-microvolt = <3800000>; - regulator-name = "vcc_sys"; - }; - - vcc_wifi: regulator-vcc-wifi { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>; - pinctrl-0 = <&vcc_wifi_h>; - pinctrl-names = "default"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-name = "vcc_wifi"; - }; - - vibrator: pwm-vibrator { - compatible = "pwm-vibrator"; - pwm-names = "enable"; - pwms = <&pwm5 0 1000000000 0>; - }; -}; - -&combphy1 { - status = "okay"; -}; - -&cpu0 { - cpu-supply = <&vdd_cpu>; -}; - -&cpu1 { - cpu-supply = <&vdd_cpu>; -}; - -&cpu2 { - cpu-supply = <&vdd_cpu>; -}; - -&cpu3 { - cpu-supply = <&vdd_cpu>; -}; - -&gpu { - mali-supply = <&vdd_gpu>; - status = "okay"; -}; - -&hdmi { - ddc-i2c-bus = <&i2c5>; - pinctrl-0 = <&hdmitxm0_cec>; - pinctrl-names = "default"; - status = "okay"; -}; - -&hdmi_in { - hdmi_in_vp0: endpoint { - remote-endpoint = <&vp0_out_hdmi>; - }; -}; - -&hdmi_out { - hdmi_out_con: endpoint { - remote-endpoint = <&hdmi_con_in>; - }; -}; - -&hdmi_sound { - status = "okay"; -}; - -&i2c0 { - status = "okay"; - - rk817: pmic@20 { - compatible = "rockchip,rk817"; - reg = <0x20>; - interrupt-parent = <&gpio0>; - interrupts = ; - clock-output-names = "rk808-clkout1", "rk808-clkout2"; - clock-names = "mclk"; - clocks = <&cru I2S1_MCLKOUT_TX>; - assigned-clocks = <&cru I2S1_MCLKOUT_TX>; - assigned-clock-parents = <&cru CLK_I2S1_8CH_TX>; - #clock-cells = <1>; - #sound-dai-cells = <0>; - pinctrl-names = "default"; - pinctrl-0 = <&i2s1m0_mclk>, <&pmic_int_l>; - wakeup-source; - - vcc1-supply = <&vcc_sys>; - vcc2-supply = <&vcc_sys>; - vcc3-supply = <&vcc_sys>; - vcc4-supply = <&vcc_sys>; - vcc5-supply = <&vcc_sys>; - vcc6-supply = <&vcc_sys>; - vcc7-supply = <&vcc_sys>; - vcc8-supply = <&vcc_sys>; - vcc9-supply = <&dcdc_boost>; - - regulators { - vdd_logic: DCDC_REG1 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <500000>; - regulator-max-microvolt = <1350000>; - regulator-ramp-delay = <6001>; - regulator-initial-mode = <0x2>; - regulator-name = "vdd_logic"; - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <900000>; - }; - }; - - vdd_gpu: DCDC_REG2 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <500000>; - regulator-max-microvolt = <1350000>; - regulator-ramp-delay = <6001>; - regulator-initial-mode = <0x2>; - regulator-name = "vdd_gpu"; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_ddr: DCDC_REG3 { - regulator-always-on; - regulator-boot-on; - regulator-initial-mode = <0x2>; - regulator-name = "vcc_ddr"; - regulator-state-mem { - regulator-on-in-suspend; - }; - }; - - vcc_3v3: DCDC_REG4 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-initial-mode = <0x2>; - regulator-name = "vcc_3v3"; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <3300000>; - }; - }; - - vcca1v8_pmu: LDO_REG1 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-name = "vcca1v8_pmu"; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vdda_0v9: LDO_REG2 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <900000>; - regulator-name = "vdda_0v9"; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdda0v9_pmu: LDO_REG3 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <900000>; - regulator-name = "vdda0v9_pmu"; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <900000>; - }; - }; - - vccio_acodec: LDO_REG4 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-name = "vccio_acodec"; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vccio_sd: LDO_REG5 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - regulator-name = "vccio_sd"; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc3v3_pmu: LDO_REG6 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-name = "vcc3v3_pmu"; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <3300000>; - }; - }; - - vcc_1v8: LDO_REG7 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-name = "vcc_1v8"; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc1v8_dvp: LDO_REG8 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - regulator-name = "vcc1v8_dvp"; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc2v8_dvp: LDO_REG9 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <2800000>; - regulator-max-microvolt = <2800000>; - regulator-name = "vcc2v8_dvp"; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - dcdc_boost: BOOST { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <4700000>; - regulator-max-microvolt = <5400000>; - regulator-name = "boost"; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - otg_switch: OTG_SWITCH { - regulator-name = "otg_switch"; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - }; - }; - - vdd_cpu: regulator@40 { - compatible = "fcs,fan53555"; - reg = <0x40>; - fcs,suspend-voltage-selector = <1>; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <712500>; - regulator-max-microvolt = <1390000>; - regulator-name = "vdd_cpu"; - regulator-ramp-delay = <2300>; - vin-supply = <&vcc_sys>; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; -}; - -&i2c1 { - /* Unknown/unused device at 0x3c */ - status = "disabled"; -}; - -&i2c5 { - pinctrl-0 = <&i2c5m1_xfer>; - pinctrl-names = "default"; - status = "okay"; -}; - -&i2s0_8ch { - status = "okay"; -}; - -&i2s1_8ch { - pinctrl-0 = <&i2s1m0_sclktx - &i2s1m0_lrcktx - &i2s1m0_sdi0 - &i2s1m0_sdo0>; - pinctrl-names = "default"; - rockchip,trcm-sync-tx-only; - status = "okay"; -}; - -&pinctrl { - gpio-btns { - btn_pins_ctrl: btn-pins-ctrl { - rockchip,pins = - <3 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>, - <3 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>, - <3 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>, - <3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>, - <3 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>, - <3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>, - <3 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>, - <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>, - <3 RK_PB3 RK_FUNC_GPIO &pcfg_pull_up>, - <3 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>, - <3 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>, - <3 RK_PB6 RK_FUNC_GPIO &pcfg_pull_up>, - <3 RK_PC0 RK_FUNC_GPIO &pcfg_pull_up>, - <3 RK_PC1 RK_FUNC_GPIO &pcfg_pull_up>, - <3 RK_PC2 RK_FUNC_GPIO &pcfg_pull_up>, - <3 RK_PC3 RK_FUNC_GPIO &pcfg_pull_up>; - }; - - btn_pins_vol: btn-pins-vol { - rockchip,pins = - <3 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>, - <3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - joy-mux { - joy_mux_en: joy-mux-en { - rockchip,pins = - <0 RK_PB5 RK_FUNC_GPIO &pcfg_output_low>; - }; - }; - - pmic { - pmic_int_l: pmic-int-l { - rockchip,pins = - <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - sdio-pwrseq { - wifi_enable_h: wifi-enable-h { - rockchip,pins = - <4 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - vcc3v3-lcd { - vcc_lcd_h: vcc-lcd-h { - rockchip,pins = - <0 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - vcc-wifi { - vcc_wifi_h: vcc-wifi-h { - rockchip,pins = - <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; -}; - -&pmu_io_domains { - status = "okay"; - pmuio1-supply = <&vcc3v3_pmu>; - pmuio2-supply = <&vcc3v3_pmu>; - vccio1-supply = <&vccio_acodec>; - vccio3-supply = <&vccio_sd>; - vccio4-supply = <&vcc_1v8>; - vccio5-supply = <&vcc_3v3>; - vccio6-supply = <&vcc1v8_dvp>; - vccio7-supply = <&vcc_3v3>; -}; - -&pwm0 { - pinctrl-0 = <&pwm0m1_pins>; - pinctrl-names = "default"; - status = "okay"; -}; - -&pwm5 { - status = "okay"; -}; - -&pwm6 { - status = "okay"; -}; - -&pwm7 { - status = "okay"; -}; - -&saradc { - vref-supply = <&vcc_1v8>; - status = "okay"; -}; - -&sdmmc0 { - bus-width = <4>; - cap-sd-highspeed; - cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>; - disable-wp; - pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>; - pinctrl-names = "default"; - sd-uhs-sdr104; - vmmc-supply = <&vcc_3v3>; - vqmmc-supply = <&vccio_sd>; - status = "okay"; -}; - -&sdmmc1 { - bus-width = <4>; - cap-sd-highspeed; - cd-gpios = <&gpio2 RK_PB2 GPIO_ACTIVE_LOW>; - disable-wp; - pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk &sdmmc1_det>; - pinctrl-names = "default"; - sd-uhs-sdr104; - vmmc-supply = <&vcc_3v3>; - vqmmc-supply = <&vcc1v8_dvp>; - status = "okay"; -}; - -&sdmmc2 { - bus-width = <4>; - cap-sd-highspeed; - cap-sdio-irq; - keep-power-in-suspend; - mmc-pwrseq = <&sdio_pwrseq>; - non-removable; - pinctrl-0 = <&sdmmc2m0_bus4 &sdmmc2m0_cmd &sdmmc2m0_clk>; - pinctrl-names = "default"; - vmmc-supply = <&vcc_wifi>; - vqmmc-supply = <&vcca1v8_pmu>; - status = "okay"; -}; - -&tsadc { - rockchip,hw-tshut-mode = <1>; - rockchip,hw-tshut-polarity = <0>; - status = "okay"; -}; - -&uart1 { - pinctrl-0 = <&uart1m1_xfer &uart1m1_ctsn &uart1m1_rtsn>; - pinctrl-names = "default"; - uart-has-rtscts; - status = "okay"; - - bluetooth { - compatible = "realtek,rtl8821cs-bt", "realtek,rtl8723bs-bt"; - device-wake-gpios = <&gpio4 4 GPIO_ACTIVE_HIGH>; - enable-gpios = <&gpio4 3 GPIO_ACTIVE_HIGH>; - host-wake-gpios = <&gpio4 5 GPIO_ACTIVE_HIGH>; - }; -}; - -&uart2 { - status = "okay"; -}; - -/* - * Lack the schematics to verify, but port works as a peripheral - * (and not a host or OTG port). - */ -&usb_host0_xhci { - dr_mode = "peripheral"; - phys = <&usb2phy0_otg>; - phy-names = "usb2-phy"; - status = "okay"; -}; - -&usb_host1_ehci { - status = "okay"; -}; - -&usb_host1_ohci { - status = "okay"; -}; - -&usb_host1_xhci { - phy-names = "usb2-phy", "usb3-phy"; - phys = <&usb2phy1_host>, <&combphy1 PHY_TYPE_USB3>; - status = "okay"; -}; - -&usb2phy0 { - status = "okay"; -}; - -&usb2phy0_otg { - status = "okay"; -}; - -&usb2phy1 { - status = "okay"; -}; - -&usb2phy1_host { - status = "okay"; -}; - -&vop { - assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>; - assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>; - status = "okay"; -}; - -&vop_mmu { - status = "okay"; -}; - -&vp0 { - vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 { - reg = ; - remote-endpoint = <&hdmi_in_vp0>; - }; -}; diff --git a/arch/arm/dts/rk3566-quartz64-a.dts b/arch/arm/dts/rk3566-quartz64-a.dts deleted file mode 100644 index 59843a7a199..00000000000 --- a/arch/arm/dts/rk3566-quartz64-a.dts +++ /dev/null @@ -1,838 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) - -/dts-v1/; - -#include -#include -#include -#include "rk3566.dtsi" - -/ { - model = "Pine64 RK3566 Quartz64-A Board"; - compatible = "pine64,quartz64-a", "rockchip,rk3566"; - - aliases { - ethernet0 = &gmac1; - mmc0 = &sdmmc0; - mmc1 = &sdhci; - }; - - chosen: chosen { - stdout-path = "serial2:1500000n8"; - }; - - gmac1_clkin: external-gmac1-clock { - compatible = "fixed-clock"; - clock-frequency = <125000000>; - clock-output-names = "gmac1_clkin"; - #clock-cells = <0>; - }; - - fan: gpio_fan { - compatible = "gpio-fan"; - gpios = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>; - gpio-fan,speed-map = - < 0 0>, - <4500 1>; - pinctrl-names = "default"; - pinctrl-0 = <&fan_en_h>; - #cooling-cells = <2>; - }; - - hdmi-con { - compatible = "hdmi-connector"; - type = "a"; - - port { - hdmi_con_in: endpoint { - remote-endpoint = <&hdmi_out_con>; - }; - }; - }; - - leds { - compatible = "gpio-leds"; - - led-work { - label = "work-led"; - default-state = "off"; - gpios = <&gpio0 RK_PD3 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&work_led_enable_h>; - retain-state-suspended; - }; - - led-diy { - label = "diy-led"; - default-state = "on"; - gpios = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>; - linux,default-trigger = "heartbeat"; - pinctrl-names = "default"; - pinctrl-0 = <&diy_led_enable_h>; - retain-state-suspended; - }; - }; - - rk817-sound { - compatible = "simple-audio-card"; - simple-audio-card,format = "i2s"; - simple-audio-card,name = "Analog RK817"; - simple-audio-card,mclk-fs = <256>; - - simple-audio-card,cpu { - sound-dai = <&i2s1_8ch>; - }; - - simple-audio-card,codec { - sound-dai = <&rk817>; - }; - }; - - sdio_pwrseq: sdio-pwrseq { - compatible = "mmc-pwrseq-simple"; - clocks = <&rk817 1>; - clock-names = "ext_clock"; - pinctrl-names = "default"; - pinctrl-0 = <&wifi_enable_h>; - post-power-on-delay-ms = <100>; - power-off-delay-us = <5000000>; - reset-gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_LOW>; - }; - - spdif_dit: spdif-dit { - compatible = "linux,spdif-dit"; - #sound-dai-cells = <0>; - }; - - spdif_sound: spdif-sound { - compatible = "simple-audio-card"; - simple-audio-card,name = "SPDIF"; - - simple-audio-card,cpu { - sound-dai = <&spdif>; - }; - - simple-audio-card,codec { - sound-dai = <&spdif_dit>; - }; - }; - - vcc12v_dcin: vcc12v_dcin { - compatible = "regulator-fixed"; - regulator-name = "vcc12v_dcin"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <12000000>; - regulator-max-microvolt = <12000000>; - }; - - /* vbus feeds the rk817 usb input. - * With no battery attached, also feeds vcc_bat+ - * via ON/OFF_BAT jumper - */ - vbus: vbus { - compatible = "regulator-fixed"; - regulator-name = "vbus"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - vin-supply = <&vcc12v_dcin>; - }; - - vcc3v3_pcie_p: vcc3v3-pcie-p-regulator { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&pcie_enable_h>; - regulator-name = "vcc3v3_pcie_p"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <&vcc_3v3>; - }; - - vcc5v0_usb: vcc5v0_usb { - compatible = "regulator-fixed"; - regulator-name = "vcc5v0_usb"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - vin-supply = <&vcc12v_dcin>; - }; - - /* all four ports are controlled by one gpio - * the host ports are sourced from vcc5v0_usb - * the otg port is sourced from vcc5v0_midu - */ - vcc5v0_usb20_host: vcc5v0_usb20_host { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <&gpio4 RK_PB5 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&vcc5v0_usb20_host_en>; - regulator-name = "vcc5v0_usb20_host"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - vin-supply = <&vcc5v0_usb>; - }; - - vcc5v0_usb20_otg: vcc5v0_usb20_otg { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <&gpio4 RK_PB5 GPIO_ACTIVE_HIGH>; - regulator-name = "vcc5v0_usb20_otg"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - vin-supply = <&dcdc_boost>; - }; - - vcc3v3_sd: vcc3v3_sd { - compatible = "regulator-fixed"; - gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>; - pinctrl-names = "default"; - pinctrl-0 = <&vcc_sd_h>; - regulator-boot-on; - regulator-name = "vcc3v3_sd"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <&vcc_3v3>; - }; - - /* sourced from vbus and vcc_bat+ via rk817 sw5 */ - vcc_sys: vcc_sys { - compatible = "regulator-fixed"; - regulator-name = "vcc_sys"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <4400000>; - regulator-max-microvolt = <4400000>; - vin-supply = <&vbus>; - }; - - /* sourced from vcc_sys, sdio module operates internally at 3.3v */ - vcc_wl: vcc_wl { - compatible = "regulator-fixed"; - regulator-name = "vcc_wl"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <&vcc_sys>; - }; -}; - -&combphy1 { - status = "okay"; -}; - -&combphy2 { - status = "okay"; -}; - -&cpu0 { - cpu-supply = <&vdd_cpu>; -}; - -&cpu1 { - cpu-supply = <&vdd_cpu>; -}; - -&cpu2 { - cpu-supply = <&vdd_cpu>; -}; - -&cpu3 { - cpu-supply = <&vdd_cpu>; -}; - -&cpu_thermal { - trips { - cpu_hot: cpu_hot { - temperature = <55000>; - hysteresis = <2000>; - type = "active"; - }; - }; - - cooling-maps { - map1 { - trip = <&cpu_hot>; - cooling-device = <&fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; - }; - }; -}; - -&gmac1 { - assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru SCLK_GMAC1>; - assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru SCLK_GMAC1>, <&gmac1_clkin>; - clock_in_out = "input"; - phy-supply = <&vcc_3v3>; - phy-mode = "rgmii"; - pinctrl-names = "default"; - pinctrl-0 = <&gmac1m0_miim - &gmac1m0_tx_bus2 - &gmac1m0_rx_bus2 - &gmac1m0_rgmii_clk - &gmac1m0_clkinout - &gmac1m0_rgmii_bus>; - snps,reset-gpio = <&gpio0 RK_PC3 GPIO_ACTIVE_LOW>; - snps,reset-active-low; - /* Reset time is 20ms, 100ms for rtl8211f */ - snps,reset-delays-us = <0 20000 100000>; - tx_delay = <0x30>; - rx_delay = <0x10>; - phy-handle = <&rgmii_phy1>; - status = "okay"; -}; - -&gpu { - mali-supply = <&vdd_gpu>; - status = "okay"; -}; - -&hdmi { - avdd-0v9-supply = <&vdda_0v9>; - avdd-1v8-supply = <&vcc_1v8>; - status = "okay"; -}; - -&hdmi_in { - hdmi_in_vp0: endpoint { - remote-endpoint = <&vp0_out_hdmi>; - }; -}; - -&hdmi_out { - hdmi_out_con: endpoint { - remote-endpoint = <&hdmi_con_in>; - }; -}; - -&hdmi_sound { - status = "okay"; -}; - -&i2c0 { - status = "okay"; - - vdd_cpu: regulator@1c { - compatible = "tcs,tcs4525"; - reg = <0x1c>; - fcs,suspend-voltage-selector = <1>; - regulator-name = "vdd_cpu"; - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <1150000>; - regulator-ramp-delay = <2300>; - regulator-always-on; - regulator-boot-on; - vin-supply = <&vcc_sys>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - rk817: pmic@20 { - compatible = "rockchip,rk817"; - reg = <0x20>; - interrupt-parent = <&gpio0>; - interrupts = ; - assigned-clocks = <&cru I2S1_MCLKOUT_TX>; - assigned-clock-parents = <&cru CLK_I2S1_8CH_TX>; - clock-names = "mclk"; - clocks = <&cru I2S1_MCLKOUT_TX>; - clock-output-names = "rk808-clkout1", "rk808-clkout2"; - #clock-cells = <1>; - pinctrl-names = "default"; - pinctrl-0 = <&pmic_int_l>, <&i2s1m0_mclk>; - rockchip,system-power-controller; - #sound-dai-cells = <0>; - wakeup-source; - - vcc1-supply = <&vcc_sys>; - vcc2-supply = <&vcc_sys>; - vcc3-supply = <&vcc_sys>; - vcc4-supply = <&vcc_sys>; - vcc5-supply = <&vcc_sys>; - vcc6-supply = <&vcc_sys>; - vcc7-supply = <&vcc_sys>; - vcc8-supply = <&vcc_sys>; - vcc9-supply = <&dcdc_boost>; - - regulators { - vdd_logic: DCDC_REG1 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <500000>; - regulator-max-microvolt = <1350000>; - regulator-ramp-delay = <6001>; - regulator-initial-mode = <0x2>; - regulator-name = "vdd_logic"; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <900000>; - }; - }; - - vdd_gpu: DCDC_REG2 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <500000>; - regulator-max-microvolt = <1350000>; - regulator-ramp-delay = <6001>; - regulator-initial-mode = <0x2>; - regulator-name = "vdd_gpu"; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_ddr: DCDC_REG3 { - regulator-always-on; - regulator-boot-on; - regulator-initial-mode = <0x2>; - regulator-name = "vcc_ddr"; - regulator-state-mem { - regulator-on-in-suspend; - }; - }; - - vcc_3v3: DCDC_REG4 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-initial-mode = <0x2>; - regulator-name = "vcc_3v3"; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcca1v8_pmu: LDO_REG1 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-name = "vcca1v8_pmu"; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vdda_0v9: LDO_REG2 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <900000>; - regulator-name = "vdda_0v9"; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdda0v9_pmu: LDO_REG3 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <900000>; - regulator-name = "vdda0v9_pmu"; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <900000>; - }; - }; - - vccio_acodec: LDO_REG4 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-name = "vccio_acodec"; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vccio_sd: LDO_REG5 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - regulator-name = "vccio_sd"; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc3v3_pmu: LDO_REG6 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-name = "vcc3v3_pmu"; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <3300000>; - }; - }; - - vcc_1v8: LDO_REG7 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-name = "vcc_1v8"; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc1v8_dvp: LDO_REG8 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-name = "vcc1v8_dvp"; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc2v8_dvp: LDO_REG9 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <2800000>; - regulator-max-microvolt = <2800000>; - regulator-name = "vcc2v8_dvp"; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - dcdc_boost: BOOST { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - regulator-name = "boost"; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - otg_switch: OTG_SWITCH { - regulator-name = "otg_switch"; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - }; - }; -}; - -/* i2c3 is exposed on con40 - * pin 3 - i2c3_sda_m0, pullup to vcc_3v3 - * pin 5 - i2c3_scl_m0, pullup to vcc_3v3 - */ -&i2c3 { - status = "okay"; -}; - -&i2s0_8ch { - status = "okay"; -}; - -&i2s1_8ch { - pinctrl-names = "default"; - pinctrl-0 = <&i2s1m0_sclktx - &i2s1m0_lrcktx - &i2s1m0_sdi0 - &i2s1m0_sdo0>; - rockchip,trcm-sync-tx-only; - status = "okay"; -}; - -&mdio1 { - rgmii_phy1: ethernet-phy@0 { - compatible = "ethernet-phy-ieee802.3-c22"; - reg = <0>; - }; -}; - -&pcie2x1 { - pinctrl-names = "default"; - pinctrl-0 = <&pcie_reset_h>; - reset-gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>; - vpcie3v3-supply = <&vcc3v3_pcie_p>; - status = "okay"; -}; - -&pinctrl { - bt { - bt_enable_h: bt-enable-h { - rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - bt_host_wake_l: bt-host-wake-l { - rockchip,pins = <2 RK_PC0 RK_FUNC_GPIO &pcfg_pull_down>; - }; - - bt_wake_l: bt-wake-l { - rockchip,pins = <2 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - fan { - fan_en_h: fan-en-h { - rockchip,pins = <0 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - leds { - work_led_enable_h: work-led-enable-h { - rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - diy_led_enable_h: diy-led-enable-h { - rockchip,pins = <0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - pcie { - pcie_enable_h: pcie-enable-h { - rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - pcie_reset_h: pcie-reset-h { - rockchip,pins = <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - pmic { - pmic_int_l: pmic-int-l { - rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - usb2 { - vcc5v0_usb20_host_en: vcc5v0-usb20-host-en { - rockchip,pins = <4 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - sdio-pwrseq { - wifi_enable_h: wifi-enable-h { - rockchip,pins = <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - vcc_sd { - vcc_sd_h: vcc-sd-h { - rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; -}; - -&pmu_io_domains { - pmuio1-supply = <&vcc3v3_pmu>; - pmuio2-supply = <&vcc3v3_pmu>; - vccio1-supply = <&vccio_acodec>; - vccio2-supply = <&vcc_1v8>; - vccio3-supply = <&vccio_sd>; - vccio4-supply = <&vcc_1v8>; - vccio5-supply = <&vcc_3v3>; - vccio6-supply = <&vcc1v8_dvp>; - vccio7-supply = <&vcc_3v3>; - status = "okay"; -}; - -&sdhci { - bus-width = <8>; - mmc-hs200-1_8v; - non-removable; - vmmc-supply = <&vcc_3v3>; - vqmmc-supply = <&vcc_1v8>; - status = "okay"; -}; - -&sdmmc0 { - bus-width = <4>; - cap-sd-highspeed; - cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>; - disable-wp; - pinctrl-names = "default"; - pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>; - sd-uhs-sdr104; - vmmc-supply = <&vcc3v3_sd>; - vqmmc-supply = <&vccio_sd>; - status = "okay"; -}; - -&sdmmc1 { - bus-width = <4>; - cap-sd-highspeed; - cap-sdio-irq; - keep-power-in-suspend; - mmc-pwrseq = <&sdio_pwrseq>; - non-removable; - pinctrl-names = "default"; - pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk>; - sd-uhs-sdr104; - vmmc-supply = <&vcc_wl>; - vqmmc-supply = <&vcc_1v8>; - status = "okay"; -}; - -&sfc { - pinctrl-0 = <&fspi_pins>; - pinctrl-names = "default"; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - - flash@0 { - compatible = "jedec,spi-nor"; - reg = <0>; - spi-max-frequency = <24000000>; - spi-rx-bus-width = <4>; - spi-tx-bus-width = <1>; - }; -}; - -/* spdif is exposed on con40 pin 18 */ -&spdif { - status = "okay"; -}; - -/* spi1 is exposed on con40 - * pin 11 - spi1_mosi_m1 - * pin 13 - spi1_miso_m1 - * pin 15 - spi1_clk_m1 - * pin 17 - spi1_cs0_m1 - */ -&spi1 { - pinctrl-names = "default"; - pinctrl-0 = <&spi1m1_cs0 &spi1m1_pins>; -}; - -&tsadc { - /* tshut mode 0:CRU 1:GPIO */ - rockchip,hw-tshut-mode = <1>; - /* tshut polarity 0:LOW 1:HIGH */ - rockchip,hw-tshut-polarity = <0>; - status = "okay"; -}; - -/* uart0 is exposed on con40 - * pin 12 - uart0_tx - * pin 14 - uart0_rx - */ -&uart0 { - pinctrl-names = "default"; - pinctrl-0 = <&uart0_xfer>; - status = "okay"; -}; - -&uart1 { - pinctrl-names = "default"; - pinctrl-0 = <&uart1m0_xfer &uart1m0_ctsn &uart1m0_rtsn>; - status = "okay"; - uart-has-rtscts; - - bluetooth { - compatible = "brcm,bcm43438-bt"; - clocks = <&rk817 1>; - clock-names = "lpo"; - host-wakeup-gpios = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>; - device-wakeup-gpios = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>; - shutdown-gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&bt_host_wake_l &bt_wake_l &bt_enable_h>; - vbat-supply = <&vcc_sys>; - vddio-supply = <&vcca1v8_pmu>; - max-speed = <3000000>; - }; -}; - -/* uart2 is exposed on con40 - * pin 8 - uart2_tx_m0_debug - * pin 10 - uart2_rx_m0_debug - */ -&uart2 { - status = "okay"; -}; - -&usb_host0_ehci { - status = "okay"; -}; - -&usb_host0_ohci { - status = "okay"; -}; - -&usb_host1_ehci { - status = "okay"; -}; - -&usb_host1_ohci { - status = "okay"; -}; - -&usb_host0_xhci { - dr_mode = "host"; - status = "okay"; -}; - -/* usb3 controller is muxed with sata1 */ -&usb_host1_xhci { - status = "okay"; -}; - -&usb2phy0 { - status = "okay"; -}; - -&usb2phy0_host { - phy-supply = <&vcc5v0_usb20_host>; - status = "okay"; -}; - -&usb2phy0_otg { - phy-supply = <&vcc5v0_usb20_otg>; - status = "okay"; -}; - -&usb2phy1 { - status = "okay"; -}; - -&usb2phy1_host { - phy-supply = <&vcc5v0_usb20_host>; - status = "okay"; -}; - -&usb2phy1_otg { - phy-supply = <&vcc5v0_usb20_host>; - status = "okay"; -}; - -&vop { - assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>; - assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>; - status = "okay"; -}; - -&vop_mmu { - status = "okay"; -}; - -&vp0 { - vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 { - reg = ; - remote-endpoint = <&hdmi_in_vp0>; - }; -}; diff --git a/arch/arm/dts/rk3566-quartz64-b.dts b/arch/arm/dts/rk3566-quartz64-b.dts deleted file mode 100644 index 2d92713be2a..00000000000 --- a/arch/arm/dts/rk3566-quartz64-b.dts +++ /dev/null @@ -1,737 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) - -/dts-v1/; - -#include -#include -#include -#include "rk3566.dtsi" - -/ { - model = "Pine64 RK3566 Quartz64-B Board"; - compatible = "pine64,quartz64-b", "rockchip,rk3566"; - - aliases { - ethernet0 = &gmac1; - mmc0 = &sdmmc0; - mmc1 = &sdhci; - mmc2 = &sdmmc1; - }; - - chosen: chosen { - stdout-path = "serial2:1500000n8"; - }; - - gmac1_clkin: external-gmac1-clock { - compatible = "fixed-clock"; - clock-frequency = <125000000>; - clock-output-names = "gmac1_clkin"; - #clock-cells = <0>; - }; - - hdmi-con { - compatible = "hdmi-connector"; - type = "a"; - - port { - hdmi_con_in: endpoint { - remote-endpoint = <&hdmi_out_con>; - }; - }; - }; - - leds { - compatible = "gpio-leds"; - - led-user { - label = "user-led"; - default-state = "on"; - gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>; - linux,default-trigger = "heartbeat"; - pinctrl-names = "default"; - pinctrl-0 = <&user_led_enable_h>; - retain-state-suspended; - }; - }; - - sound { - compatible = "simple-audio-card"; - simple-audio-card,format = "i2s"; - simple-audio-card,name = "Analog RK809"; - simple-audio-card,mclk-fs = <256>; - - simple-audio-card,cpu { - sound-dai = <&i2s1_8ch>; - }; - - simple-audio-card,codec { - sound-dai = <&rk809>; - }; - }; - - sdio_pwrseq: sdio-pwrseq { - status = "okay"; - compatible = "mmc-pwrseq-simple"; - clocks = <&rk809 1>; - clock-names = "ext_clock"; - pinctrl-names = "default"; - pinctrl-0 = <&wifi_enable_h>; - reset-gpios = <&gpio0 RK_PC0 GPIO_ACTIVE_LOW>; - post-power-on-delay-ms = <100>; - power-off-delay-us = <5000000>; - }; - - vcc3v3_pcie_p: vcc3v3-pcie-p-regulator { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&pcie_enable_h>; - regulator-name = "vcc3v3_pcie_p"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <&vcc_3v3>; - }; - - vcc5v0_in: vcc5v0-in-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc5v0_in"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - }; - - vcc5v0_sys: vcc5v0-sys-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc5v0_sys"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - vin-supply = <&vcc5v0_in>; - }; - - vcc3v3_sys: vcc3v3-sys-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc3v3_sys"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - vin-supply = <&vcc5v0_sys>; - }; - - vcc5v0_usb30_host: vcc5v0-usb30-host-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc5v0_usb30_host"; - enable-active-high; - gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&vcc5v0_usb30_host_en_h>; - regulator-always-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - vin-supply = <&vcc5v0_sys>; - }; - - vcc5v0_usb_otg: vcc5v0-usb-otg-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc5v0_usb_otg"; - enable-active-high; - gpio = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&vcc5v0_usb_otg_en_h>; - regulator-always-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - vin-supply = <&vcc5v0_sys>; - }; -}; - -&combphy1 { - status = "okay"; -}; - -&combphy2 { - status = "okay"; -}; - -&cpu0 { - cpu-supply = <&vdd_cpu>; -}; - -&cpu1 { - cpu-supply = <&vdd_cpu>; -}; - -&cpu2 { - cpu-supply = <&vdd_cpu>; -}; - -&cpu3 { - cpu-supply = <&vdd_cpu>; -}; - -&gmac1 { - assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru SCLK_GMAC1>; - assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru SCLK_GMAC1>, <&gmac1_clkin>; - clock_in_out = "input"; - phy-mode = "rgmii"; - phy-supply = <&vcc_3v3>; - pinctrl-names = "default"; - pinctrl-0 = <&gmac1m1_miim - &gmac1m1_tx_bus2 - &gmac1m1_rx_bus2 - &gmac1m1_rgmii_clk - &gmac1m1_clkinout - &gmac1m1_rgmii_bus>; - snps,reset-gpio = <&gpio3 RK_PC0 GPIO_ACTIVE_LOW>; - snps,reset-active-low; - /* Reset time is 20ms, 100ms for rtl8211f, also works well here */ - snps,reset-delays-us = <0 20000 100000>; - tx_delay = <0x4f>; - rx_delay = <0x24>; - phy-handle = <&rgmii_phy1>; - status = "okay"; -}; - -&gpu { - mali-supply = <&vdd_gpu>; - status = "okay"; -}; - -&hdmi { - avdd-0v9-supply = <&vdda0v9_image>; - avdd-1v8-supply = <&vcca1v8_image>; - status = "okay"; -}; - -&hdmi_in { - hdmi_in_vp0: endpoint { - remote-endpoint = <&vp0_out_hdmi>; - }; -}; - -&hdmi_out { - hdmi_out_con: endpoint { - remote-endpoint = <&hdmi_con_in>; - }; -}; - -&hdmi_sound { - status = "okay"; -}; - -&i2c0 { - status = "okay"; - - vdd_cpu: regulator@1c { - compatible = "tcs,tcs4525"; - reg = <0x1c>; - fcs,suspend-voltage-selector = <1>; - regulator-name = "vdd_cpu"; - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <1150000>; - regulator-ramp-delay = <2300>; - regulator-always-on; - regulator-boot-on; - vin-supply = <&vcc5v0_sys>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - rk809: pmic@20 { - compatible = "rockchip,rk809"; - reg = <0x20>; - interrupt-parent = <&gpio0>; - interrupts = ; - assigned-clocks = <&cru I2S1_MCLKOUT_TX>; - assigned-clock-parents = <&cru CLK_I2S1_8CH_TX>; - clock-names = "mclk"; - clocks = <&cru I2S1_MCLKOUT_TX>; - clock-output-names = "rk808-clkout1", "rk808-clkout2"; - - pinctrl-names = "default"; - pinctrl-0 = <&pmic_int>, <&i2s1m0_mclk>; - rockchip,system-power-controller; - #sound-dai-cells = <0>; - wakeup-source; - #clock-cells = <1>; - - vcc1-supply = <&vcc3v3_sys>; - vcc2-supply = <&vcc3v3_sys>; - vcc3-supply = <&vcc3v3_sys>; - vcc4-supply = <&vcc3v3_sys>; - vcc5-supply = <&vcc3v3_sys>; - vcc6-supply = <&vcc3v3_sys>; - vcc7-supply = <&vcc3v3_sys>; - vcc8-supply = <&vcc3v3_sys>; - vcc9-supply = <&vcc3v3_sys>; - - regulators { - vdd_log: DCDC_REG1 { - regulator-name = "vdd_log"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <500000>; - regulator-max-microvolt = <1350000>; - regulator-ramp-delay = <6001>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <900000>; - }; - }; - - vdd_gpu: DCDC_REG2 { - regulator-name = "vdd_gpu"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <1350000>; - regulator-ramp-delay = <6001>; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <900000>; - }; - }; - - vcc_ddr: DCDC_REG3 { - regulator-name = "vcc_ddr"; - regulator-always-on; - regulator-boot-on; - regulator-initial-mode = <0x2>; - regulator-state-mem { - regulator-on-in-suspend; - }; - }; - - vdd_npu: DCDC_REG4 { - regulator-name = "vdd_npu"; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <1350000>; - regulator-initial-mode = <0x2>; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_1v8: DCDC_REG5 { - regulator-name = "vcc_1v8"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vdda0v9_image: LDO_REG1 { - regulator-name = "vdda0v9_image"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <900000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <900000>; - }; - }; - - vdda_0v9: LDO_REG2 { - regulator-name = "vdda_0v9"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <900000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <900000>; - }; - }; - - vdda0v9_pmu: LDO_REG3 { - regulator-name = "vdda0v9_pmu"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <900000>; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <900000>; - }; - }; - - vccio_acodec: LDO_REG4 { - regulator-name = "vccio_acodec"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <3300000>; - - }; - }; - - vccio_sd: LDO_REG5 { - regulator-name = "vccio_sd"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <3300000>; - }; - }; - - vcc3v3_pmu: LDO_REG6 { - regulator-name = "vcc3v3_pmu"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <3300000>; - }; - }; - - vcca_1v8: LDO_REG7 { - regulator-name = "vcca_1v8"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vcca1v8_pmu: LDO_REG8 { - regulator-name = "vcca1v8_pmu"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vcca1v8_image: LDO_REG9 { - regulator-name = "vcca1v8_image"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vcc_3v3: SWITCH_REG1 { - regulator-boot-on; - regulator-name = "vcc_3v3"; - }; - - vcc3v3_sd: SWITCH_REG2 { - regulator-name = "vcc3v3_sd"; - }; - }; - }; -}; - -/* i2c2_m1 exposed on csi port, pulled up to vcc_3v3 */ -&i2c2 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c2m1_xfer>; - status = "okay"; -}; - -/* i2c3_m1 exposed on dsi port, pulled up to vcc_3v3 */ -&i2c3 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c3m1_xfer>; - status = "okay"; -}; - -/* - * i2c4_m0 is exposed on PI40, pulled up to vcc_3v3 - * pin 27 - i2c4_sda_m0 - * pin 28 - i2c4_scl_m0 - */ -&i2c4 { - status = "okay"; -}; - -/* - * i2c5_m0 is exposed on PI40 - * pin 29 - i2c5_scl_m0 - * pin 31 - i2c5_sda_m0 - */ -&i2c5 { - status = "disabled"; -}; - -&i2s0_8ch { - status = "okay"; -}; - -&i2s1_8ch { - pinctrl-names = "default"; - pinctrl-0 = <&i2s1m0_sclktx - &i2s1m0_lrcktx - &i2s1m0_sdi0 - &i2s1m0_sdo0>; - rockchip,trcm-sync-tx-only; - status = "okay"; -}; - -&mdio1 { - rgmii_phy1: ethernet-phy@1 { - compatible = "ethernet-phy-ieee802.3-c22"; - reg = <0x1>; - }; -}; - -&pcie2x1 { - pinctrl-names = "default"; - pinctrl-0 = <&pcie_reset_h>; - reset-gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>; - vpcie3v3-supply = <&vcc3v3_pcie_p>; - status = "okay"; -}; - -&pinctrl { - bt { - bt_enable_h: bt-enable-h { - rockchip,pins = <0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - bt_host_wake_l: bt-host-wake-l { - rockchip,pins = <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_down>; - }; - - bt_wake_l: bt-wake-l { - rockchip,pins = <0 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - leds { - user_led_enable_h: user-led-enable-h { - rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - pcie { - pcie_enable_h: pcie-enable-h { - rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - pcie_reset_h: pcie-reset-h { - rockchip,pins = <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - pmic { - pmic_int: pmic_int { - rockchip,pins = - <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - sdio-pwrseq { - wifi_enable_h: wifi-enable-h { - rockchip,pins = <0 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - usb { - vcc5v0_usb30_host_en_h: vcc5v0-usb30-host-en_h { - rockchip,pins = <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - vcc5v0_usb_otg_en_h: vcc5v0-usb-otg-en_h { - rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; -}; - -&pmu_io_domains { - status = "okay"; - pmuio1-supply = <&vcc3v3_pmu>; - pmuio2-supply = <&vcca1v8_pmu>; - vccio1-supply = <&vccio_acodec>; - vccio2-supply = <&vcc_1v8>; - vccio3-supply = <&vccio_sd>; - vccio4-supply = <&vcca1v8_pmu>; - vccio5-supply = <&vcc_3v3>; - vccio6-supply = <&vcc_3v3>; - vccio7-supply = <&vcc_3v3>; -}; - -&saradc { - vref-supply = <&vcca_1v8>; - status = "okay"; -}; - -&sdhci { - bus-width = <8>; - mmc-hs200-1_8v; - non-removable; - vmmc-supply = <&vcc_3v3>; - vqmmc-supply = <&vcc_1v8>; - status = "okay"; -}; - -&sdmmc0 { - bus-width = <4>; - cap-sd-highspeed; - cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>; - disable-wp; - pinctrl-names = "default"; - pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>; - sd-uhs-sdr50; - vmmc-supply = <&vcc3v3_sd>; - vqmmc-supply = <&vccio_sd>; - status = "okay"; -}; - -&sdmmc1 { - bus-width = <4>; - cap-sd-highspeed; - cap-sdio-irq; - keep-power-in-suspend; - mmc-pwrseq = <&sdio_pwrseq>; - non-removable; - pinctrl-names = "default"; - pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk>; - vmmc-supply = <&vcc3v3_sys>; - vqmmc-supply = <&vcca1v8_pmu>; - status = "okay"; -}; - -&sfc { - pinctrl-0 = <&fspi_pins>; - pinctrl-names = "default"; - #address-cells = <1>; - #size-cells = <0>; - status = "okay"; - - flash@0 { - compatible = "jedec,spi-nor"; - reg = <0>; - spi-max-frequency = <24000000>; - spi-rx-bus-width = <4>; - spi-tx-bus-width = <1>; - }; -}; - -&tsadc { - status = "okay"; -}; - -&uart1 { - pinctrl-names = "default"; - pinctrl-0 = <&uart1m0_xfer &uart1m0_ctsn &uart1m0_rtsn>; - status = "okay"; - uart-has-rtscts; - - bluetooth { - compatible = "brcm,bcm4345c5"; - clocks = <&rk809 1>; - clock-names = "lpo"; - device-wakeup-gpios = <&gpio0 RK_PB4 GPIO_ACTIVE_HIGH>; - host-wakeup-gpios = <&gpio0 RK_PB3 GPIO_ACTIVE_HIGH>; - shutdown-gpios = <&gpio0 RK_PC1 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&bt_host_wake_l &bt_wake_l &bt_enable_h>; - vbat-supply = <&vcc3v3_sys>; - vddio-supply = <&vcca1v8_pmu>; - }; -}; - -/* - * uart2_m0 is exposed on PI40 - * pin 8 - uart2_tx_m0 - * pin 10 - uart2_rx_m0 - */ -&uart2 { - status = "okay"; -}; - -&usb2phy0_host { - phy-supply = <&vcc5v0_usb30_host>; - status = "okay"; -}; - -&usb2phy0_otg { - phy-supply = <&vcc5v0_usb_otg>; - status = "okay"; -}; - -&usb2phy1_otg { - phy-supply = <&vcc5v0_usb30_host>; - status = "okay"; -}; - -&usb2phy0 { - status = "okay"; -}; - -&usb2phy1 { - status = "okay"; -}; - -&usb_host0_xhci { - status = "okay"; -}; - -&usb_host1_xhci { - status = "okay"; -}; - -&usb_host0_ehci { - status = "okay"; -}; - -&usb_host0_ohci { - status = "okay"; -}; - -&vop { - assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>; - assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>; - status = "okay"; -}; - -&vop_mmu { - status = "okay"; -}; - -&vp0 { - vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 { - reg = ; - remote-endpoint = <&hdmi_in_vp0>; - }; -}; diff --git a/arch/arm/dts/rk3566-radxa-cm3-io.dts b/arch/arm/dts/rk3566-radxa-cm3-io.dts deleted file mode 100644 index 3ae24e39450..00000000000 --- a/arch/arm/dts/rk3566-radxa-cm3-io.dts +++ /dev/null @@ -1,281 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (c) 2022 Radxa Limited - * Copyright (c) 2022 Amarula Solutions(India) - */ - -/dts-v1/; -#include -#include "rk3566.dtsi" -#include "rk3566-radxa-cm3.dtsi" - -/ { - model = "Radxa Compute Module 3(CM3) IO Board"; - compatible = "radxa,cm3-io", "radxa,cm3", "rockchip,rk3566"; - - aliases { - ethernet0 = &gmac1; - mmc1 = &sdmmc0; - }; - - chosen: chosen { - stdout-path = "serial2:1500000n8"; - }; - - gmac1_clkin: external-gmac1-clock { - compatible = "fixed-clock"; - clock-frequency = <125000000>; - clock-output-names = "gmac1_clkin"; - #clock-cells = <0>; - }; - - hdmi-con { - compatible = "hdmi-connector"; - type = "a"; - - port { - hdmi_con_in: endpoint { - remote-endpoint = <&hdmi_out_con>; - }; - }; - }; - - leds { - compatible = "gpio-leds"; - - led-1 { - gpios = <&gpio4 RK_PA4 GPIO_ACTIVE_LOW>; - color = ; - function = LED_FUNCTION_ACTIVITY; - linux,default-trigger = "heartbeat"; - pinctrl-names = "default"; - pinctrl-0 = <&pi_nled_activity>; - }; - }; - - vcc5v0_usb30: vcc5v0-usb30-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc5v0_usb30"; - enable-active-high; - gpio = <&gpio3 RK_PC2 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&vcc5v0_usb30_en_h>; - regulator-always-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - vin-supply = <&vcc_sys>; - }; - - vcca1v8_image: vcca1v8-image-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcca1v8_image"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - vin-supply = <&vcc_1v8_p>; - }; - - vdda0v9_image: vdda0v9-image-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcca0v9_image"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <900000>; - vin-supply = <&vdda_0v9>; - }; -}; - -&combphy1 { - status = "okay"; -}; - -&gmac1 { - assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>; - assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&gmac1_clkin>; - assigned-clock-rates = <0>, <125000000>; - clock_in_out = "input"; - phy-handle = <&rgmii_phy1>; - phy-mode = "rgmii"; - pinctrl-names = "default"; - pinctrl-0 = <&gmac1m0_miim - &gmac1m0_tx_bus2 - &gmac1m0_rx_bus2 - &gmac1m0_rgmii_clk - &gmac1m0_rgmii_bus - &gmac1m0_clkinout>; - snps,reset-gpio = <&gpio4 RK_PC2 GPIO_ACTIVE_LOW>; - snps,reset-active-low; - /* Reset time is 20ms, 100ms for rtl8211f */ - snps,reset-delays-us = <0 20000 100000>; - tx_delay = <0x46>; - rx_delay = <0x2e>; - status = "okay"; -}; - -&hdmi { - avdd-0v9-supply = <&vdda0v9_image>; - avdd-1v8-supply = <&vcca1v8_image>; - status = "okay"; -}; - -&hdmi_in { - hdmi_in_vp0: endpoint { - remote-endpoint = <&vp0_out_hdmi>; - }; -}; - -&hdmi_out { - hdmi_out_con: endpoint { - remote-endpoint = <&hdmi_con_in>; - }; -}; - -&hdmi_sound { - status = "okay"; -}; - -&mdio1 { - rgmii_phy1: ethernet-phy@0 { - compatible = "ethernet-phy-ieee802.3-c22"; - reg = <0x0>; - }; -}; - -&pinctrl { - gmac1 { - gmac1m0_miim: gmac1m0-miim { - rockchip,pins = - /* gmac1_mdcm0 */ - <3 RK_PC4 3 &pcfg_pull_none_drv_level_15>, - /* gmac1_mdiom0 */ - <3 RK_PC5 3 &pcfg_pull_none_drv_level_15>; - }; - - gmac1m0_rx_bus2: gmac1m0-rx-bus2 { - rockchip,pins = - /* gmac1_rxd0m0 */ - <3 RK_PB1 3 &pcfg_pull_none_drv_level_15>, - /* gmac1_rxd1m0 */ - <3 RK_PB2 3 &pcfg_pull_none_drv_level_15>, - /* gmac1_rxdvcrsm0 */ - <3 RK_PB3 3 &pcfg_pull_none_drv_level_15>; - }; - - gmac1m0_tx_bus2: gmac1m0-tx-bus2 { - rockchip,pins = - /* gmac1_txd0m0 */ - <3 RK_PB5 3 &pcfg_pull_none_drv_level_15>, - /* gmac1_txd1m0 */ - <3 RK_PB6 3 &pcfg_pull_none_drv_level_15>, - /* gmac1_txenm0 */ - <3 RK_PB7 3 &pcfg_pull_none_drv_level_15>; - }; - - gmac1m0_rgmii_clk: gmac1m0-rgmii-clk { - rockchip,pins = - /* gmac1_rxclkm0 */ - <3 RK_PA7 3 &pcfg_pull_none_drv_level_15>, - /* gmac1_txclkm0 */ - <3 RK_PA6 3 &pcfg_pull_none_drv_level_15>; - }; - - gmac1m0_rgmii_bus: gmac1m0-rgmii-bus { - rockchip,pins = - /* gmac1_rxd2m0 */ - <3 RK_PA4 3 &pcfg_pull_none_drv_level_15>, - /* gmac1_rxd3m0 */ - <3 RK_PA5 3 &pcfg_pull_none_drv_level_15>, - /* gmac1_txd2m0 */ - <3 RK_PA2 3 &pcfg_pull_none_drv_level_15>, - /* gmac1_txd3m0 */ - <3 RK_PA3 3 &pcfg_pull_none_drv_level_15>; - }; - - gmac1m0_clkinout: gmac1m0-clkinout { - rockchip,pins = - /* gmac1_mclkinoutm0 */ - <3 RK_PC0 3 &pcfg_pull_none_drv_level_15>; - }; - }; - - leds { - pi_nled_activity: pi-nled-activity { - rockchip,pins = <4 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - sdcard { - sdmmc_pwren: sdmmc-pwren { - rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - usb { - vcc5v0_usb30_en_h: vcc5v0-host-en-h { - rockchip,pins = <3 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; -}; - -&sdmmc0 { - bus-width = <4>; - cap-mmc-highspeed; - cap-sd-highspeed; - disable-wp; - vqmmc-supply = <&vccio_sd>; - pinctrl-names = "default"; - pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det &sdmmc0_pwren>; - status = "okay"; -}; - -&uart2 { - status = "okay"; -}; - -&usb2phy0_host { - phy-supply = <&vcc5v0_usb30>; - status = "okay"; -}; - -&usb2phy1_host { - status = "okay"; -}; - -&usb2phy1_otg { - status = "okay"; -}; - -&usb_host0_ehci { - status = "okay"; -}; - -&usb_host1_xhci { - status = "okay"; -}; - -&usb2phy0_otg { - status = "okay"; -}; - -&usb_host0_xhci { - status = "okay"; -}; - -&vop { - assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>; - assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>; - status = "okay"; -}; - -&vop_mmu { - status = "okay"; -}; - -&vp0 { - vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 { - reg = ; - remote-endpoint = <&hdmi_in_vp0>; - }; -}; diff --git a/arch/arm/dts/rk3566-radxa-cm3.dtsi b/arch/arm/dts/rk3566-radxa-cm3.dtsi deleted file mode 100644 index 45de2630bb5..00000000000 --- a/arch/arm/dts/rk3566-radxa-cm3.dtsi +++ /dev/null @@ -1,425 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (c) 2022 Radxa Limited - * Copyright (c) 2022 Amarula Solutions(India) - */ - -#include -#include - -/ { - compatible = "radxa,cm3", "rockchip,rk3566"; - - aliases { - mmc0 = &sdhci; - }; - - leds { - compatible = "gpio-leds"; - - led-0 { - gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>; - color = ; - function = LED_FUNCTION_STATUS; - linux,default-trigger = "timer"; - default-state = "on"; - pinctrl-names = "default"; - pinctrl-0 = <&user_led2>; - }; - }; - - vcc_sys: vcc-sys-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc_sys"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - }; - - vcc_1v8: vcc-1v8-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc_1v8"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - vin-supply = <&vcc_1v8_p>; - }; - - vcc_3v3: vcc-3v3-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc_3v3"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <&vcc3v3_sys>; - }; - - vcca_1v8: vcca-1v8-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcca_1v8"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - vin-supply = <&vcc_1v8_p>; - }; - - sdio_pwrseq: pwrseq-sdio { - compatible = "mmc-pwrseq-simple"; - clocks = <&rk817 1>; - clock-names = "ext_clock"; - pinctrl-names = "default"; - pinctrl-0 = <&wifi_reg_on_h>; - reset-gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_LOW>; - }; -}; - -&cpu0 { - cpu-supply = <&vdd_cpu>; -}; - -&cpu1 { - cpu-supply = <&vdd_cpu>; -}; - -&cpu2 { - cpu-supply = <&vdd_cpu>; -}; - -&cpu3 { - cpu-supply = <&vdd_cpu>; -}; - -&gpu { - mali-supply = <&vdd_gpu_npu>; - status = "okay"; -}; - -&i2c0 { - status = "okay"; - - vdd_cpu: regulator@1c { - compatible = "tcs,tcs4525"; - reg = <0x1c>; - fcs,suspend-voltage-selector = <1>; - regulator-name = "vdd_cpu"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <712500>; - regulator-max-microvolt = <1390000>; - regulator-ramp-delay = <2300>; - vin-supply = <&vcc_sys>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - rk817: pmic@20 { - compatible = "rockchip,rk817"; - reg = <0x20>; - #clock-cells = <1>; - clock-output-names = "rk817-clkout1", "rk817-clkout2"; - interrupt-parent = <&gpio0>; - interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pmic_int_l>; - rockchip,system-power-controller; - wakeup-source; - - vcc1-supply = <&vcc_sys>; - vcc2-supply = <&vcc_sys>; - vcc3-supply = <&vcc_sys>; - vcc4-supply = <&vcc_sys>; - vcc5-supply = <&vcc_sys>; - vcc6-supply = <&vcc_sys>; - vcc7-supply = <&vcc_sys>; - - regulators { - vdd_logic: DCDC_REG1 { - regulator-name = "vdd_logic"; - regulator-always-on; - regulator-boot-on; - regulator-initial-mode = <0x2>; - regulator-min-microvolt = <500000>; - regulator-max-microvolt = <1350000>; - regulator-ramp-delay = <6001>; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <900000>; - }; - }; - - vdd_gpu_npu: DCDC_REG2 { - regulator-name = "vdd_gpu_npu"; - regulator-always-on; - regulator-boot-on; - regulator-initial-mode = <0x2>; - regulator-min-microvolt = <500000>; - regulator-max-microvolt = <1350000>; - regulator-ramp-delay = <6001>; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_ddr: DCDC_REG3 { - regulator-name = "vcc_ddr"; - regulator-always-on; - regulator-boot-on; - regulator-initial-mode = <0x2>; - regulator-state-mem { - regulator-on-in-suspend; - }; - }; - - vcc3v3_sys: DCDC_REG4 { - regulator-name = "vcc3v3_sys"; - regulator-always-on; - regulator-boot-on; - regulator-initial-mode = <0x2>; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <3300000>; - }; - }; - - vcca1v8_pmu: LDO_REG1 { - regulator-name = "vcca1v8_pmu"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vdda_0v9: LDO_REG2 { - regulator-name = "vdda_0v9"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <900000>; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdda0v9_pmu: LDO_REG3 { - regulator-name = "vdda0v9_pmu"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <900000>; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <900000>; - }; - }; - - vccio_acodec: LDO_REG4 { - regulator-name = "vccio_acodec"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vccio_sd: LDO_REG5 { - regulator-name = "vccio_sd"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc3v3_pmu: LDO_REG6 { - regulator-name = "vcc3v3_pmu"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <3300000>; - }; - }; - - vcc_1v8_p: LDO_REG7 { - regulator-name = "vcc_1v8_p"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc1v8_dvp: LDO_REG8 { - regulator-name = "vcc1v8_dvp"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc2v8_dvp: LDO_REG9 { - regulator-name = "vcc2v8_dvp"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <2800000>; - regulator-max-microvolt = <2800000>; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - }; - }; -}; - -&pinctrl { - bluetooth { - bt_host_wake_h: bt-host-wake-h { - rockchip,pins = <2 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - bt_reg_on_h: bt-reg-on-h { - rockchip,pins = <2 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - bt_wake_host_h: bt-wake-host-h { - rockchip,pins = <2 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - pmic { - pmic_int_l: pmic-int-l { - rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - leds { - user_led2: user-led2 { - rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - wifi { - wifi_reg_on_h: wifi-reg-on-h { - rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - wifi_host_wake_h: wifi-host-wake-h { - rockchip,pins = <2 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; -}; - -&pmu_io_domains { - pmuio1-supply = <&vcc3v3_pmu>; - pmuio2-supply = <&vcc_3v3>; - vccio1-supply = <&vccio_acodec>; - vccio2-supply = <&vcc_1v8>; - vccio3-supply = <&vccio_sd>; - vccio4-supply = <&vcc_1v8>; - vccio5-supply = <&vcc_3v3>; - vccio6-supply = <&vcc_3v3>; - vccio7-supply = <&vcc_3v3>; - status = "okay"; -}; - -&saradc { - vref-supply = <&vcca_1v8>; - status = "okay"; -}; - -&sdmmc1 { - #address-cells = <1>; - #size-cells = <0>; - bus-width = <4>; - disable-wp; - cap-sd-highspeed; - cap-sdio-irq; - keep-power-in-suspend; - mmc-pwrseq = <&sdio_pwrseq>; - non-removable; - pinctrl-names = "default"; - pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_clk &sdmmc1_cmd>; - sd-uhs-sdr104; - vmmc-supply = <&vcc_3v3>; - vqmmc-supply = <&vcc_1v8>; - status = "okay"; - - wifi@1 { - compatible = "brcm,bcm43455-fmac"; - reg = <1>; - interrupt-parent = <&gpio2>; - interrupts = ; - interrupt-names = "host-wake"; - pinctrl-names = "default"; - pinctrl-0 = <&wifi_host_wake_h>; - }; -}; - -&sdhci { - bus-width = <8>; - max-frequency = <200000000>; - mmc-hs200-1_8v; - non-removable; - pinctrl-names = "default"; - pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>; - vmmc-supply = <&vcc_3v3>; - vqmmc-supply = <&vcc_1v8>; - status = "okay"; -}; - -&uart1 { - pinctrl-names = "default"; - pinctrl-0 = <&uart1m0_ctsn &uart1m0_rtsn &uart1m0_xfer>; - status = "okay"; - - bluetooth { - compatible = "brcm,bcm4345c5"; - clocks = <&rk817 1>; - clock-names = "lpo"; - device-wakeup-gpios = <&gpio2 RK_PB2 GPIO_ACTIVE_HIGH>; - host-wakeup-gpios = <&gpio2 RK_PB1 GPIO_ACTIVE_HIGH>; - reset-gpios = <&gpio2 RK_PC0 GPIO_ACTIVE_LOW>; - pinctrl-names = "default"; - pinctrl-0 = <&bt_host_wake_h &bt_reg_on_h &bt_wake_host_h>; - vbat-supply = <&vcc_3v3>; - vddio-supply = <&vcc_1v8>; - }; -}; - -&usb2phy0 { - status = "okay"; -}; - -&usb2phy1 { - status = "okay"; -}; - -&tsadc { - rockchip,hw-tshut-mode = <1>; - rockchip,hw-tshut-polarity = <0>; - status = "okay"; -}; diff --git a/arch/arm/dts/rk3566-soquartz-blade.dts b/arch/arm/dts/rk3566-soquartz-blade.dts deleted file mode 100644 index fdbf1c78324..00000000000 --- a/arch/arm/dts/rk3566-soquartz-blade.dts +++ /dev/null @@ -1,198 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) - -/dts-v1/; - -#include -#include -#include -#include - -#include "rk3566-soquartz.dtsi" - -/ { - model = "PINE64 RK3566 SOQuartz on Blade carrier board"; - compatible = "pine64,soquartz-blade", "pine64,soquartz", "rockchip,rk3566"; - - aliases { - ethernet0 = &gmac1; - }; - - /* labeled VCC3V0_SD in schematic to not conflict with PMIC regulator */ - vcc3v0_sd: vcc3v0-sd-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc3v0_sd"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <&vcc3v3_sys>; - }; - - /* labeled VCC_SSD in schematic */ - vcc3v3_pcie_p: vcc3v3-pcie-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc3v3_pcie_p"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <&vbus>; - }; - - vcc5v_dcin: vcc5v-dcin-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc5v_dcin"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - }; -}; - -&combphy2 { - phy-supply = <&vcc3v3_sys>; - status = "okay"; -}; - -&gmac1 { - status = "okay"; -}; - -/* - * i2c1 is exposed on CM1 / Module1A - * pin 80 - SCL0 - i2c1_scl_m0, pullup to vcc3v3_pmu - * pin 82 - SDA0 - i2c1_sda_m0, pullup to vcc3v3_pmu - */ -&i2c1 { - status = "okay"; - -}; - -/* - * i2c2 is exposed on CM1 / Module1A - to PI40 - * pin 56 - GPIO3 - i2c2_scl_m1, pullup to vcc_3v3, shared with i2s1_8ch - * pin 58 - GPIO2 - i2c2_sda_m1, pullup to vcc_3v3 - */ -&i2c2 { - status = "disabled"; -}; - -/* - * i2c3 is exposed on CM1 / Module1A - to PI40 - * pin 35 - ID_SC(GPIO28) - i2c3_scl_m0, pullup to vcc_3v3 - * pin 36 - ID_SD(GPIO27) - i2c3_sda_m0, pullup to vcc_3v3 - */ -&i2c3 { - status = "disabled"; -}; - -/* - * i2c4 is exposed on CM2 / Module1B - to PI40 - * pin 45 - GPIO24 - i2c4_scl_m1 - * pin 47 - GPIO23 - i2c4_sda_m1 - */ -&i2c4 { - status = "disabled"; -}; - -/* - * i2s1_8ch is exposed on CM1 / Module1A - to PI40 - * pin 24 - GPIO26 - i2s1_sdi1_m1 - * pin 25 - GPIO21 - i2s1_sdo0_m1 - * pin 26 - GPIO19 - i2s1_lrck_tx_m1 - * pin 27 - GPIO20 - i2s1_sdi0_m1 - * pin 29 - GPIO16 - i2s1_sdi3_m1 - * pin 30 - GPIO6 - i2s1_sdi2_m1 - * pin 40 - GPIO9 - i2s1_sdo1_m1, shared with spi3 - * pin 41 - GPIO25 - i2s1_sdo2_m1 - * pin 49 - GPIO18 - i2s1_sclk_tx_m1 - * pin 50 - GPIO17 - i2s1_mclk_m1 - * pin 56 - GPIO3 - i2s1_sdo3_m1, shared with i2c2 - */ -&i2s1_8ch { - status = "disabled"; -}; - -&led_diy { - color = ; - function = LED_FUNCTION_DISK_ACTIVITY; - linux,default-trigger = "disk-activity"; - status = "okay"; -}; - -&led_work { - color = ; - function = LED_FUNCTION_STATUS; - linux,default-trigger = "heartbeat"; - status = "okay"; -}; - -&pcie2x1 { - vpcie3v3-supply = <&vcc3v3_pcie_p>; - status = "okay"; -}; - -&rgmii_phy1 { - status = "okay"; -}; - -/* - * saradc is exposed on CM1 / Module1A - to J2 - * pin 94 - AIN1 - saradc_vin3 - * pin 96 - AIN0 - saradc_vin2 - */ -&saradc { - status = "disabled"; -}; - -&sdmmc0 { - vmmc-supply = <&vcc3v0_sd>; - status = "okay"; -}; - -/* - * spi3 is exposed on CM1 / Module1A - to PI40 - * pin 37 - GPIO7 - spi3_cs1_m0 - * pin 38 - GPIO11 - spi3_clk_m0 - * pin 39 - GPIO8 - spi3_cs0_m0 - * pin 40 - GPIO9 - spi3_miso_m0, shared with i2s1_8ch - * pin 44 - GPIO10 - spi3_mosi_m0 - */ -&spi3 { - status = "disabled"; -}; - -/* - * uart2 is exposed on CM1 / Module1A - to PI40 - * pin 51 - GPIO15 - uart2_rx_m0 - * pin 55 - GPIO14 - uart2_tx_m0 - */ -&uart2 { - status = "okay"; -}; - -/* - * uart7 is exposed on CM1 / Module1A - to PI40 - * pin 46 - GPIO22 - uart7_tx_m2 - * pin 47 - GPIO23 - uart7_rx_m2 - */ -&uart7 { - status = "okay"; -}; - -&usb2phy0 { - status = "okay"; -}; - -&usb2phy0_otg { - phy-supply = <&vbus>; - status = "okay"; -}; - -&usb_host0_xhci { - status = "okay"; -}; - -&vbus { - vin-supply = <&vcc5v_dcin>; -}; diff --git a/arch/arm/dts/rk3566-soquartz-cm4.dts b/arch/arm/dts/rk3566-soquartz-cm4.dts deleted file mode 100644 index 6ed3fa4aee3..00000000000 --- a/arch/arm/dts/rk3566-soquartz-cm4.dts +++ /dev/null @@ -1,196 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) - -/dts-v1/; - -#include "rk3566-soquartz.dtsi" - -/ { - model = "Pine64 RK3566 SoQuartz with CM4-IO Carrier Board"; - compatible = "pine64,soquartz-cm4io", "pine64,soquartz", "rockchip,rk3566"; - - aliases { - ethernet0 = &gmac1; - }; - - /* labeled +12v in schematic */ - vcc12v_dcin: vcc12v-dcin-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc12v_dcin"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <12000000>; - regulator-max-microvolt = <12000000>; - }; - - /* labeled +5v in schematic */ - vcc_5v: vcc-5v-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc_5v"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - vin-supply = <&vcc12v_dcin>; - }; - - vcc_sd_pwr: vcc-sd-pwr-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc_sd_pwr"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <&vcc3v3_sys>; - }; -}; - -/* phy for pcie */ -&combphy2 { - phy-supply = <&vcc3v3_sys>; - status = "okay"; -}; - -&gmac1 { - status = "okay"; -}; - -/* - * i2c1 is exposed on CM1 / Module1A - * pin 80 - SCL0 - i2c1_scl_m0, pullup to vcc3v3_pmu - * pin 82 - SDA0 - i2c1_sda_m0, pullup to vcc3v3_pmu - */ -&i2c1 { - status = "okay"; - - /* - * the rtc interrupt is tied to PMIC_PWRON, - * it will force reset the board if triggered. - */ - pcf85063: rtc@51 { - compatible = "nxp,pcf85063"; - reg = <0x51>; - }; -}; - -/* - * i2c2 is exposed on CM1 / Module1A - to PI40 - * pin 56 - GPIO3 - i2c2_scl_m1, pullup to vcc_3v3, shared with i2s1_8ch - * pin 58 - GPIO2 - i2c2_sda_m1, pullup to vcc_3v3 - */ -&i2c2 { - status = "disabled"; -}; - -/* - * i2c3 is exposed on CM1 / Module1A - to PI40 - * pin 35 - ID_SC(GPIO28) - i2c3_scl_m0, pullup to vcc_3v3 - * pin 36 - ID_SD(GPIO27) - i2c3_sda_m0, pullup to vcc_3v3 - */ -&i2c3 { - status = "disabled"; -}; - -/* - * i2c4 is exposed on CM2 / Module1B - to PI40 - * pin 45 - GPIO24 - i2c4_scl_m1 - * pin 47 - GPIO23 - i2c4_sda_m1 - */ -&i2c4 { - status = "disabled"; -}; - -/* - * i2s1_8ch is exposed on CM1 / Module1A - to PI40 - * pin 24 - GPIO26 - i2s1_sdi1_m1 - * pin 25 - GPIO21 - i2s1_sdo0_m1 - * pin 26 - GPIO19 - i2s1_lrck_tx_m1 - * pin 27 - GPIO20 - i2s1_sdi0_m1 - * pin 29 - GPIO16 - i2s1_sdi3_m1 - * pin 30 - GPIO6 - i2s1_sdi2_m1 - * pin 40 - GPIO9 - i2s1_sdo1_m1, shared with spi3 - * pin 41 - GPIO25 - i2s1_sdo2_m1 - * pin 49 - GPIO18 - i2s1_sclk_tx_m1 - * pin 50 - GPIO17 - i2s1_mclk_m1 - * pin 56 - GPIO3 - i2s1_sdo3_m1, shared with i2c2 - */ -&i2s1_8ch { - status = "disabled"; -}; - -&led_diy { - status = "okay"; -}; - -&led_work { - status = "okay"; -}; - -&pcie2x1 { - vpcie3v3-supply = <&vcc_3v3>; - status = "okay"; -}; - -&rgmii_phy1 { - status = "okay"; -}; - -/* - * saradc is exposed on CM1 / Module1A - to J2 - * pin 94 - AIN1 - saradc_vin3 - * pin 96 - AIN0 - saradc_vin2 - */ -&saradc { - status = "disabled"; -}; - -&sdmmc0 { - vmmc-supply = <&vcc_sd_pwr>; - status = "okay"; -}; - -/* - * spi3 is exposed on CM1 / Module1A - to PI40 - * pin 37 - GPIO7 - spi3_cs1_m0 - * pin 38 - GPIO11 - spi3_clk_m0 - * pin 39 - GPIO8 - spi3_cs0_m0 - * pin 40 - GPIO9 - spi3_miso_m0, shared with i2s1_8ch - * pin 44 - GPIO10 - spi3_mosi_m0 - */ -&spi3 { - status = "disabled"; -}; - -/* - * uart2 is exposed on CM1 / Module1A - to PI40 - * pin 51 - GPIO15 - uart2_rx_m0 - * pin 55 - GPIO14 - uart2_tx_m0 - */ -&uart2 { - status = "okay"; -}; - -/* - * uart7 is exposed on CM1 / Module1A - to PI40 - * pin 46 - GPIO22 - uart7_tx_m2 - * pin 47 - GPIO23 - uart7_rx_m2 - */ -&uart7 { - status = "okay"; -}; - -&usb2phy0 { - status = "okay"; -}; - -&usb2phy0_otg { - phy-supply = <&vcc_5v>; - status = "okay"; -}; - -&usb_host0_xhci { - status = "okay"; -}; - -&vbus { - vin-supply = <&vcc_5v>; -}; diff --git a/arch/arm/dts/rk3566-soquartz-model-a.dts b/arch/arm/dts/rk3566-soquartz-model-a.dts deleted file mode 100644 index f2095dfa4ea..00000000000 --- a/arch/arm/dts/rk3566-soquartz-model-a.dts +++ /dev/null @@ -1,236 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) - -/dts-v1/; - -#include "rk3566-soquartz.dtsi" - -/ { - model = "PINE64 RK3566 SOQuartz on Model A carrier board"; - compatible = "pine64,soquartz-model-a", "pine64,soquartz", "rockchip,rk3566"; - - aliases { - ethernet0 = &gmac1; - }; - - /* labeled DCIN_12V in schematic */ - vcc12v_dcin: vcc12v-dcin-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc12v_dcin"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <12000000>; - regulator-max-microvolt = <12000000>; - }; - - vcc5v0_usb: vcc5v0-usb-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc5v0_usb"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - vin-supply = <&vcc12v_dcin>; - }; - - /* - * Labelled VCC3V0_SD in schematic to not conflict with PMIC - * regulator, it's 3.3v in actuality - */ - vcc3v0_sd: vcc3v0-sd-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc3v0_sd"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <&vcc3v3_sys>; - }; - - vcc3v3_pcie: vcc3v3-pcie-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc3v3_pcie"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <&vcc12v_dcin>; - }; - - vcc12v_pcie: vcc12v-pcie-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc12v_pcie"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <12000000>; - regulator-max-microvolt = <12000000>; - vin-supply = <&vcc12v_dcin>; - }; -}; - -/* phy for pcie */ -&combphy2 { - phy-supply = <&vcc3v3_sys>; - status = "okay"; -}; - -&gmac1 { - status = "okay"; -}; - -/* - * i2c1 is exposed on CM1 / Module1A - * pin 80 - SCL0 - i2c1_scl_m0, pullup to vcc3v3_pmu - * pin 82 - SDA0 - i2c1_sda_m0, pullup to vcc3v3_pmu - */ -&i2c1 { - status = "okay"; - - /* - * the rtc interrupt is tied to PMIC_PWRON, - * it will force reset the board if triggered. - */ - pcf85063: rtc@51 { - compatible = "nxp,pcf85063"; - reg = <0x51>; - }; -}; - -/* - * i2c2 is exposed on CM1 / Module1A - to PI40 - * pin 56 - GPIO3 - i2c2_scl_m1, pullup to vcc_3v3, shared with i2s1_8ch - * pin 58 - GPIO2 - i2c2_sda_m1, pullup to vcc_3v3 - */ -&i2c2 { - status = "disabled"; -}; - -/* - * i2c3 is exposed on CM1 / Module1A - to PI40 - * pin 35 - ID_SC(GPIO28) - i2c3_scl_m0, pullup to vcc_3v3 - * pin 36 - ID_SD(GPIO27) - i2c3_sda_m0, pullup to vcc_3v3 - */ -&i2c3 { - status = "disabled"; -}; - -/* - * i2c4 is exposed on CM2 / Module1B - to PI40 - * pin 45 - GPIO24 - i2c4_scl_m1 - * pin 47 - GPIO23 - i2c4_sda_m1 - */ -&i2c4 { - status = "disabled"; -}; - -/* - * i2s1_8ch is exposed on CM1 / Module1A - to PI40 - * pin 24 - GPIO26 - i2s1_sdi1_m1 - * pin 25 - GPIO21 - i2s1_sdo0_m1 - * pin 26 - GPIO19 - i2s1_lrck_tx_m1 - * pin 27 - GPIO20 - i2s1_sdi0_m1 - * pin 29 - GPIO16 - i2s1_sdi3_m1 - * pin 30 - GPIO6 - i2s1_sdi2_m1 - * pin 40 - GPIO9 - i2s1_sdo1_m1, shared with spi3 - * pin 41 - GPIO25 - i2s1_sdo2_m1 - * pin 49 - GPIO18 - i2s1_sclk_tx_m1 - * pin 50 - GPIO17 - i2s1_mclk_m1 - * pin 56 - GPIO3 - i2s1_sdo3_m1, shared with i2c2 - */ -&i2s1_8ch { - status = "disabled"; -}; - -&led_diy { - status = "okay"; -}; - -&led_work { - status = "okay"; -}; - -&pcie2x1 { - vpcie3v3-supply = <&vcc3v3_pcie>; - status = "okay"; -}; - -&rgmii_phy1 { - status = "okay"; -}; - -&rgmii_phy1 { - status = "okay"; -}; - -/* - * saradc is exposed on CM1 / Module1A - to J2 - * pin 94 - AIN1 - saradc_vin3 - * pin 96 - AIN0 - saradc_vin2 - */ -&saradc { - status = "disabled"; -}; - -/* - * vmmc-supply is vcc3v3_sd on v1.0 and vcc3v0_sd on v1.1+ - * the soquartz SoM has SDMMC_PWR (CM1 pin 75) hardwired to vcc3v3_sys, - * so we use vcc3v3_sd here to ensure the regulator is enabled on older boards. - */ -&sdmmc0 { - vmmc-supply = <&vcc3v3_sd>; - status = "okay"; -}; - -/* - * spi3 is exposed on CM1 / Module1A - to PI40 - * pin 37 - GPIO7 - spi3_cs1_m0 - * pin 38 - GPIO11 - spi3_clk_m0 - * pin 39 - GPIO8 - spi3_cs0_m0 - * pin 40 - GPIO9 - spi3_miso_m0, shared with i2s1_8ch - * pin 44 - GPIO10 - spi3_mosi_m0 - */ -&spi3 { - status = "disabled"; -}; - -/* - * uart2 is exposed on CM1 / Module1A - to PI40 - * pin 51 - GPIO15 - uart2_rx_m0 - * pin 55 - GPIO14 - uart2_tx_m0 - */ -&uart2 { - status = "okay"; -}; - -/* - * uart7 is exposed on CM1 / Module1A - to PI40 - * pin 46 - GPIO22 - uart7_tx_m2 - * pin 47 - GPIO23 - uart7_rx_m2 - */ -&uart7 { - status = "okay"; -}; - -&usb2phy0 { - status = "okay"; -}; - -&usb2phy0_otg { - phy-supply = <&vcc5v0_usb>; - status = "okay"; -}; - -&usb_host0_xhci { - status = "okay"; -}; - -&vbus { - vin-supply = <&vcc5v0_usb>; -}; - -&vcc3v3_sd { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - status = "okay"; -}; diff --git a/arch/arm/dts/rk3566-soquartz.dtsi b/arch/arm/dts/rk3566-soquartz.dtsi deleted file mode 100644 index bfb7b952f4c..00000000000 --- a/arch/arm/dts/rk3566-soquartz.dtsi +++ /dev/null @@ -1,684 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) - -/dts-v1/; - -#include -#include -#include -#include "rk3566.dtsi" - -/ { - model = "Pine64 RK3566 SoQuartz SOM"; - compatible = "pine64,soquartz", "rockchip,rk3566"; - - aliases { - mmc0 = &sdmmc0; - mmc1 = &sdhci; - mmc2 = &sdmmc1; - }; - - chosen: chosen { - stdout-path = "serial2:1500000n8"; - }; - - gmac1_clkin: external-gmac1-clock { - compatible = "fixed-clock"; - clock-frequency = <125000000>; - clock-output-names = "gmac1_clkin"; - #clock-cells = <0>; - }; - - hdmi-con { - compatible = "hdmi-connector"; - type = "a"; - - port { - hdmi_con_in: endpoint { - remote-endpoint = <&hdmi_out_con>; - }; - }; - }; - - leds { - compatible = "gpio-leds"; - - led_diy: led-diy { - label = "diy-led"; - default-state = "on"; - gpios = <&gpio0 RK_PC1 GPIO_ACTIVE_LOW>; - linux,default-trigger = "heartbeat"; - pinctrl-names = "default"; - pinctrl-0 = <&diy_led_enable_h>; - retain-state-suspended; - status = "disabled"; - }; - - led_work: led-work { - label = "work-led"; - default-state = "off"; - gpios = <&gpio0 RK_PC0 GPIO_ACTIVE_LOW>; - pinctrl-names = "default"; - pinctrl-0 = <&work_led_enable_h>; - retain-state-suspended; - status = "disabled"; - }; - }; - - sdio_pwrseq: sdio-pwrseq { - status = "okay"; - compatible = "mmc-pwrseq-simple"; - clocks = <&rk809 1>; - clock-names = "ext_clock"; - pinctrl-names = "default"; - pinctrl-0 = <&wifi_enable_h>; - reset-gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_LOW>; - }; - - vbus: vbus-regulator { - compatible = "regulator-fixed"; - regulator-name = "vbus"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - }; - - /* sourced from vbus, vbus is provided by the carrier board */ - vcc5v0_sys: vcc5v0-sys-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc5v0_sys"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - vin-supply = <&vbus>; - }; - - vcc3v3_sys: vcc3v3-sys-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc3v3_sys"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <&vcc5v0_sys>; - }; -}; - -&cpu0 { - cpu-supply = <&vdd_cpu>; -}; - -&cpu1 { - cpu-supply = <&vdd_cpu>; -}; - -&cpu2 { - cpu-supply = <&vdd_cpu>; -}; - -&cpu3 { - cpu-supply = <&vdd_cpu>; -}; - -&gmac1 { - assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru SCLK_GMAC1>; - assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru SCLK_GMAC1>, <&gmac1_clkin>; - clock_in_out = "input"; - phy-supply = <&vcc_3v3>; - phy-mode = "rgmii"; - pinctrl-names = "default"; - pinctrl-0 = <&gmac1m0_miim - &gmac1m0_tx_bus2 - &gmac1m0_rx_bus2 - &gmac1m0_rgmii_clk - &gmac1m0_clkinout - &gmac1m0_rgmii_bus>; - snps,reset-gpio = <&gpio0 RK_PC3 GPIO_ACTIVE_LOW>; - snps,reset-active-low; - /* Reset time is 20ms, 100ms for rtl8211f, also works well here */ - snps,reset-delays-us = <0 20000 100000>; - tx_delay = <0x30>; - rx_delay = <0x10>; - phy-handle = <&rgmii_phy1>; - status = "disabled"; -}; - -&gpio0 { - nextrst-hog { - gpio-hog; - /* - * GPIO_ACTIVE_LOW + output-low here means that the pin is set - * to high, because output-low decides the value pre-inversion. - */ - gpios = ; - line-name = "nEXTRST"; - output-low; - }; -}; - -&gpu { - mali-supply = <&vdd_gpu>; - status = "okay"; -}; - -&hdmi { - avdd-0v9-supply = <&vdda0v9_image>; - avdd-1v8-supply = <&vcca1v8_image>; - status = "okay"; -}; - -&hdmi_in { - hdmi_in_vp0: endpoint { - remote-endpoint = <&vp0_out_hdmi>; - }; -}; - -&hdmi_out { - hdmi_out_con: endpoint { - remote-endpoint = <&hdmi_con_in>; - }; -}; - -&hdmi_sound { - status = "okay"; -}; - -&i2c0 { - status = "okay"; - - vdd_cpu: regulator@1c { - compatible = "tcs,tcs4525"; - reg = <0x1c>; - fcs,suspend-voltage-selector = <1>; - regulator-name = "vdd_cpu"; - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <1150000>; - regulator-ramp-delay = <2300>; - regulator-always-on; - regulator-boot-on; - vin-supply = <&vcc5v0_sys>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - rk809: pmic@20 { - compatible = "rockchip,rk809"; - reg = <0x20>; - interrupt-parent = <&gpio0>; - interrupts = ; - #clock-cells = <1>; - clock-output-names = "rk808-clkout1", "rk808-clkout2"; - pinctrl-names = "default"; - pinctrl-0 = <&pmic_int_l>; - rockchip,system-power-controller; - wakeup-source; - - vcc1-supply = <&vcc3v3_sys>; - vcc2-supply = <&vcc3v3_sys>; - vcc3-supply = <&vcc3v3_sys>; - vcc4-supply = <&vcc3v3_sys>; - vcc5-supply = <&vcc3v3_sys>; - vcc6-supply = <&vcc3v3_sys>; - vcc7-supply = <&vcc3v3_sys>; - vcc8-supply = <&vcc3v3_sys>; - vcc9-supply = <&vcc3v3_sys>; - - regulators { - vdd_logic: DCDC_REG1 { - regulator-name = "vdd_logic"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <500000>; - regulator-max-microvolt = <1350000>; - regulator-ramp-delay = <6001>; - regulator-initial-mode = <0x2>; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <900000>; - }; - }; - - vdd_gpu: DCDC_REG2 { - regulator-name = "vdd_gpu"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <500000>; - regulator-max-microvolt = <1350000>; - regulator-ramp-delay = <6001>; - regulator-initial-mode = <0x2>; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_ddr: DCDC_REG3 { - regulator-always-on; - regulator-boot-on; - regulator-initial-mode = <0x2>; - regulator-name = "vcc_ddr"; - regulator-state-mem { - regulator-on-in-suspend; - }; - }; - - vdd_npu: DCDC_REG4 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <500000>; - regulator-max-microvolt = <1350000>; - regulator-initial-mode = <0x2>; - regulator-name = "vdd_npu"; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_1v8: DCDC_REG5 { - regulator-name = "vcc_1v8"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vdda0v9_image: LDO_REG1 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <900000>; - regulator-name = "vdda0v9_image"; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <900000>; - }; - }; - - vdda_0v9: LDO_REG2 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <900000>; - regulator-name = "vdda_0v9"; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdda0v9_pmu: LDO_REG3 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <900000>; - regulator-name = "vdda0v9_pmu"; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <900000>; - }; - }; - - vccio_acodec: LDO_REG4 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-name = "vccio_acodec"; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vccio_sd: LDO_REG5 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - regulator-name = "vccio_sd"; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc3v3_pmu: LDO_REG6 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-name = "vcc3v3_pmu"; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <3300000>; - }; - }; - - vcca_1v8: LDO_REG7 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-name = "vcca_1v8"; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcca1v8_pmu: LDO_REG8 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-name = "vcca1v8_pmu"; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcca1v8_image: LDO_REG9 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-name = "vcca1v8_image"; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_3v3: SWITCH_REG1 { - regulator-name = "vcc_3v3"; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc3v3_sd: SWITCH_REG2 { - regulator-name = "vcc3v3_sd"; - status = "disabled"; - regulator-state-mem { - regulator-on-in-suspend; - }; - }; - - }; - }; -}; - -/* - * i2c1 is exposed on CM1 / Module1A - * pin 80 - i2c1_scl_m0, pullup to vcc3v3_pmu - * pin 82 - i2c1_sda_m0, pullup to vcc3v3_pmu - */ -&i2c1 { - status = "disabled"; -}; - -/* - * i2c2 is exposed on CM1 / Module1A - * pin 56 - i2c2_scl_m1, pullup to vcc_3v3, shared with i2s1_8ch - * pin 58 - i2c2_sda_m1, pullup to vcc_3v3 - */ -&i2c2 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c2m1_xfer>; - status = "disabled"; -}; - -/* - * i2c3 is exposed on CM1 / Module1A - * pin 35 - i2c3_scl_m0, pullup to vcc_3v3 - * pin 36 - i2c3_sda_m0, pullup to vcc_3v3 - */ -&i2c3 { - status = "disabled"; -}; - -/* - * i2c4 is exposed on CM2 / Module1B - * pin 45 - i2c4_scl_m1 - * pin 47 - i2c4_sda_m1 - */ -&i2c4 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c4m1_xfer>; - status = "disabled"; -}; - -&i2s0_8ch { - status = "okay"; -}; - -/* - * i2s1_8ch is exposed on CM1 / Module1A - * pin 24 - i2s1_sdi1_m1 - * pin 25 - i2s1_sdo0_m1 - * pin 26 - i2s1_lrck_tx_m1 - * pin 27 - i2s1_sdi0_m1 - * pin 29 - i2s1_sdi3_m1 - * pin 30 - i2s1_sdi2_m1 - * pin 40 - i2s1_sdo1_m1, shared with spi3 - * pin 41 - i2s1_sdo2_m1 - * pin 49 - i2s1_sclk_tx_m1 - * pin 50 - i2s1_mclk_m1 - * pin 56 - i2s1_sdo3_m1, shared with i2c2 - */ -&i2s1_8ch { - pinctrl-names = "default"; - pinctrl-0 = <&i2s1m1_sclktx &i2s1m1_sclkrx - &i2s1m1_lrcktx &i2s1m1_lrckrx - &i2s1m1_sdi0 &i2s1m1_sdi1 - &i2s1m1_sdi2 &i2s1m1_sdi3 - &i2s1m1_sdo0 &i2s1m1_sdo1 - &i2s1m1_sdo2 &i2s1m1_sdo3>; - status = "disabled"; -}; - -&mdio1 { - rgmii_phy1: ethernet-phy@0 { - compatible = "ethernet-phy-ieee802.3-c22"; - reg = <0>; - status = "disabled"; - }; -}; - -&pcie2x1 { - pinctrl-names = "default"; - pinctrl-0 = <&pcie_reset_h>; - reset-gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>; -}; - -&pinctrl { - bt { - bt_enable_h: bt-enable-h { - rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - bt_host_wake_l: bt-host-wake-l { - rockchip,pins = <2 RK_PC0 RK_FUNC_GPIO &pcfg_pull_down>; - }; - - bt_wake_l: bt-wake-l { - rockchip,pins = <2 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - leds { - work_led_enable_h: work-led-enable-h { - rockchip,pins = <0 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - diy_led_enable_h: diy-led-enable-h { - rockchip,pins = <0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - pcie { - pcie_clkreq_h: pcie-clkreq-h { - rockchip,pins = <1 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; - }; - pcie_reset_h: pcie-reset-h { - rockchip,pins = <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - pmic { - pmic_int_l: pmic-int-l { - rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - sdio-pwrseq { - wifi_enable_h: wifi-enable-h { - rockchip,pins = <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; -}; - -&pmu_io_domains { - pmuio1-supply = <&vcc3v3_pmu>; - pmuio2-supply = <&vcc3v3_pmu>; - vccio1-supply = <&vcc_3v3>; - vccio2-supply = <&vcc_1v8>; - vccio3-supply = <&vccio_sd>; - vccio4-supply = <&vcc_1v8>; - vccio5-supply = <&vcc_3v3>; - vccio6-supply = <&vcc_3v3>; - vccio7-supply = <&vcc_3v3>; - status = "okay"; -}; - -/* - * saradc is exposed on CM1 / Module1A - * pin 94 - saradc_vin3 - * pin 96 - saradc_vin2 - */ -&saradc { - vref-supply = <&vcca_1v8>; - status = "disabled"; -}; - -&sdhci { - bus-width = <8>; - mmc-hs200-1_8v; - non-removable; - vmmc-supply = <&vcc_3v3>; - vqmmc-supply = <&vcc_1v8>; - status = "okay"; -}; - -&sdmmc0 { - broken-cd; - bus-width = <4>; - cap-sd-highspeed; - disable-wp; - pinctrl-names = "default"; - pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>; - vqmmc-supply = <&vccio_sd>; - status = "disabled"; -}; - -&sdmmc1 { - bus-width = <4>; - cap-sd-highspeed; - cap-sdio-irq; - keep-power-in-suspend; - mmc-pwrseq = <&sdio_pwrseq>; - non-removable; - pinctrl-names = "default"; - pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk>; - sd-uhs-sdr50; - vmmc-supply = <&vcc3v3_sys>; - vqmmc-supply = <&vcc_1v8>; - status = "okay"; -}; - -/* - * spi3 is exposed on CM1 / Module1A - * pin 37 - spi3_cs1_m0 - * pin 38 - spi3_clk_m0 - * pin 39 - spi3_cs0_m0 - * pin 40 - spi3_miso_m0, shared with i2s1_8ch - * pin 44 - spi3_mosi_m0 - */ -&spi3 { - status = "disabled"; -}; - -&tsadc { - status = "okay"; -}; - -&uart1 { - pinctrl-names = "default"; - pinctrl-0 = <&uart1m0_xfer &uart1m0_ctsn &uart1m0_rtsn>; - uart-has-rtscts; - status = "okay"; - - bluetooth { - compatible = "brcm,bcm43438-bt"; - clocks = <&rk809 1>; - clock-names = "lpo"; - device-wakeup-gpios = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>; - host-wakeup-gpios = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>; - shutdown-gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&bt_host_wake_l &bt_wake_l &bt_enable_h>; - vbat-supply = <&vcc3v3_sys>; - vddio-supply = <&vcca1v8_pmu>; - }; -}; - -/* - * uart2 is exposed on CM1 / Module1A - * pin 51 - uart2_rx_m0 - * pin 55 - uart2_tx_m0 - */ -&uart2 { - status = "disabled"; -}; - -/* - * uart7 is exposed on CM1 / Module1A - * pin 46 - uart7_tx_m2 - * pin 47 - uart7_rx_m2 - */ -&uart7 { - pinctrl-names = "default"; - pinctrl-0 = <&uart7m2_xfer>; - status = "disabled"; -}; - -/* dwc3_otg is the only usb port available */ -&usb2phy0 { - status = "disabled"; -}; - -&usb2phy0_otg { - status = "disabled"; -}; - -&usb_host0_xhci { - status = "disabled"; -}; - -&vop { - assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>; - assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>; - status = "okay"; -}; - -&vop_mmu { - status = "okay"; -}; - -&vp0 { - vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 { - reg = ; - remote-endpoint = <&hdmi_in_vp0>; - }; -}; diff --git a/arch/arm/dts/rk3566.dtsi b/arch/arm/dts/rk3566.dtsi deleted file mode 100644 index 6c4b17d27bd..00000000000 --- a/arch/arm/dts/rk3566.dtsi +++ /dev/null @@ -1,35 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) - -#include "rk356x.dtsi" - -/ { - compatible = "rockchip,rk3566"; -}; - -&pipegrf { - compatible = "rockchip,rk3566-pipe-grf", "syscon"; -}; - -&power { - power-domain@RK3568_PD_PIPE { - reg = ; - clocks = <&cru PCLK_PIPE>; - pm_qos = <&qos_pcie2x1>, - <&qos_sata1>, - <&qos_sata2>, - <&qos_usb3_0>, - <&qos_usb3_1>; - #power-domain-cells = <0>; - }; -}; - -&usb_host0_xhci { - phys = <&usb2phy0_otg>; - phy-names = "usb2-phy"; - extcon = <&usb2phy0>; - maximum-speed = "high-speed"; -}; - -&vop { - compatible = "rockchip,rk3566-vop"; -}; diff --git a/arch/arm/dts/rk3568-bpi-r2-pro.dts b/arch/arm/dts/rk3568-bpi-r2-pro.dts deleted file mode 100644 index f9127ddfbb7..00000000000 --- a/arch/arm/dts/rk3568-bpi-r2-pro.dts +++ /dev/null @@ -1,852 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Author: Frank Wunderlich - * - */ - -/dts-v1/; -#include -#include -#include -#include -#include "rk3568.dtsi" - -/ { - model = "Bananapi-R2 Pro (RK3568) DDR4 Board"; - compatible = "rockchip,rk3568-bpi-r2pro", "rockchip,rk3568"; - - aliases { - ethernet0 = &gmac0; - ethernet1 = &gmac1; - mmc0 = &sdmmc0; - mmc1 = &sdhci; - }; - - chosen: chosen { - stdout-path = "serial2:1500000n8"; - }; - - leds { - compatible = "gpio-leds"; - pinctrl-names = "default"; - pinctrl-0 = <&blue_led_pin &green_led_pin>; - - blue_led: led-0 { - color = ; - default-state = "off"; - function = LED_FUNCTION_STATUS; - gpios = <&gpio0 RK_PD6 GPIO_ACTIVE_HIGH>; - }; - - green_led: led-1 { - color = ; - default-state = "on"; - function = LED_FUNCTION_POWER; - gpios = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>; - }; - }; - - dc_12v: dc-12v-regulator { - compatible = "regulator-fixed"; - regulator-name = "dc_12v"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <12000000>; - regulator-max-microvolt = <12000000>; - }; - - hdmi-con { - compatible = "hdmi-connector"; - type = "a"; - - port { - hdmi_con_in: endpoint { - remote-endpoint = <&hdmi_out_con>; - }; - }; - }; - - ir-receiver { - compatible = "gpio-ir-receiver"; - gpios = <&gpio0 RK_PC2 GPIO_ACTIVE_LOW>; - pinctrl-names = "default"; - pinctrl-0 = <&ir_receiver_pin>; - }; - - vcc3v3_sys: vcc3v3-sys-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc3v3_sys"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <&dc_12v>; - }; - - vcc5v0_sys: vcc5v0-sys-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc5v0_sys"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - vin-supply = <&dc_12v>; - }; - - pcie30_avdd0v9: pcie30-avdd0v9-regulator { - compatible = "regulator-fixed"; - regulator-name = "pcie30_avdd0v9"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <900000>; - vin-supply = <&vcc3v3_sys>; - }; - - pcie30_avdd1v8: pcie30-avdd1v8-regulator { - compatible = "regulator-fixed"; - regulator-name = "pcie30_avdd1v8"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - vin-supply = <&vcc3v3_sys>; - }; - - /* pi6c pcie clock generator feeds both ports */ - vcc3v3_pi6c_05: vcc3v3-pi6c-05-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc3v3_pcie"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - enable-active-high; - gpios = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>; - startup-delay-us = <200000>; - vin-supply = <&vcc5v0_sys>; - }; - - /* actually fed by vcc3v3_sys, dependent on pi6c clock generator */ - vcc3v3_minipcie: vcc3v3-minipcie-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc3v3_minipcie"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - enable-active-high; - gpio = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&minipcie_enable_h>; - startup-delay-us = <50000>; - vin-supply = <&vcc3v3_pi6c_05>; - }; - - /* actually fed by vcc3v3_sys, dependent on pi6c clock generator */ - vcc3v3_ngff: vcc3v3-ngff-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc3v3_ngff"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - enable-active-high; - gpio = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&ngffpcie_enable_h>; - startup-delay-us = <50000>; - vin-supply = <&vcc3v3_pi6c_05>; - }; - - vcc5v0_usb: vcc5v0-usb-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc5v0_usb"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - vin-supply = <&dc_12v>; - }; - - vcc5v0_usb_host: vcc5v0-usb-host-regulator { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&vcc5v0_usb_host_en>; - regulator-name = "vcc5v0_usb_host"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - vin-supply = <&vcc5v0_usb>; - }; - - vcc5v0_usb_otg: vcc5v0-usb-otg-regulator { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&vcc5v0_usb_otg_en>; - regulator-name = "vcc5v0_usb_otg"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - vin-supply = <&vcc5v0_usb>; - }; -}; - -&combphy0 { - /* used for USB3 */ - status = "okay"; -}; - -&combphy1 { - /* used for USB3 */ - status = "okay"; -}; - -&combphy2 { - /* used for SATA */ - status = "okay"; -}; - -&gmac0 { - assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>; - assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>, <&cru CLK_MAC0_2TOP>; - clock_in_out = "input"; - phy-mode = "rgmii"; - pinctrl-names = "default"; - pinctrl-0 = <&gmac0_miim - &gmac0_tx_bus2 - &gmac0_rx_bus2 - &gmac0_rgmii_clk - &gmac0_rgmii_bus>; - snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; - snps,reset-active-low; - /* Reset time is 20ms, 100ms for rtl8211f */ - snps,reset-delays-us = <0 20000 100000>; - tx_delay = <0x4f>; - rx_delay = <0x0f>; - status = "okay"; - - fixed-link { - speed = <1000>; - full-duplex; - pause; - }; -}; - -&gmac1 { - assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>; - assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru CLK_MAC1_2TOP>; - clock_in_out = "output"; - phy-handle = <&rgmii_phy1>; - phy-mode = "rgmii"; - pinctrl-names = "default"; - pinctrl-0 = <&gmac1m1_miim - &gmac1m1_tx_bus2 - &gmac1m1_rx_bus2 - &gmac1m1_rgmii_clk - &gmac1m1_rgmii_bus>; - - snps,reset-gpio = <&gpio3 RK_PB0 GPIO_ACTIVE_LOW>; - snps,reset-active-low; - /* Reset time is 20ms, 100ms for rtl8211f */ - snps,reset-delays-us = <0 20000 100000>; - - tx_delay = <0x3c>; - rx_delay = <0x2f>; - - status = "okay"; -}; - -&gpu { - mali-supply = <&vdd_gpu>; - status = "okay"; -}; - -&hdmi { - avdd-0v9-supply = <&vdda0v9_image>; - avdd-1v8-supply = <&vcca1v8_image>; - status = "okay"; -}; - -&hdmi_in { - hdmi_in_vp0: endpoint { - remote-endpoint = <&vp0_out_hdmi>; - }; -}; - -&hdmi_out { - hdmi_out_con: endpoint { - remote-endpoint = <&hdmi_con_in>; - }; -}; - -&hdmi_sound { - status = "okay"; -}; - -&i2c0 { - status = "okay"; - - rk809: pmic@20 { - compatible = "rockchip,rk809"; - reg = <0x20>; - interrupt-parent = <&gpio0>; - interrupts = ; - #clock-cells = <1>; - pinctrl-names = "default"; - pinctrl-0 = <&pmic_int>; - rockchip,system-power-controller; - vcc1-supply = <&vcc3v3_sys>; - vcc2-supply = <&vcc3v3_sys>; - vcc3-supply = <&vcc3v3_sys>; - vcc4-supply = <&vcc3v3_sys>; - vcc5-supply = <&vcc3v3_sys>; - vcc6-supply = <&vcc3v3_sys>; - vcc7-supply = <&vcc3v3_sys>; - vcc8-supply = <&vcc3v3_sys>; - vcc9-supply = <&vcc3v3_sys>; - wakeup-source; - - regulators { - vdd_logic: DCDC_REG1 { - regulator-name = "vdd_logic"; - regulator-always-on; - regulator-boot-on; - regulator-initial-mode = <0x2>; - regulator-min-microvolt = <500000>; - regulator-max-microvolt = <1350000>; - regulator-ramp-delay = <6001>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_gpu: DCDC_REG2 { - regulator-name = "vdd_gpu"; - regulator-always-on; - regulator-initial-mode = <0x2>; - regulator-min-microvolt = <500000>; - regulator-max-microvolt = <1350000>; - regulator-ramp-delay = <6001>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_ddr: DCDC_REG3 { - regulator-name = "vcc_ddr"; - regulator-always-on; - regulator-boot-on; - regulator-initial-mode = <0x2>; - - regulator-state-mem { - regulator-on-in-suspend; - }; - }; - - vdd_npu: DCDC_REG4 { - regulator-name = "vdd_npu"; - regulator-initial-mode = <0x2>; - regulator-min-microvolt = <500000>; - regulator-max-microvolt = <1350000>; - regulator-ramp-delay = <6001>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_1v8: DCDC_REG5 { - regulator-name = "vcc_1v8"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdda0v9_image: LDO_REG1 { - regulator-name = "vdda0v9_image"; - regulator-always-on; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <900000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdda_0v9: LDO_REG2 { - regulator-name = "vdda_0v9"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <900000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdda0v9_pmu: LDO_REG3 { - regulator-name = "vdda0v9_pmu"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <900000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <900000>; - }; - }; - - vccio_acodec: LDO_REG4 { - regulator-name = "vccio_acodec"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vccio_sd: LDO_REG5 { - regulator-name = "vccio_sd"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc3v3_pmu: LDO_REG6 { - regulator-name = "vcc3v3_pmu"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <3300000>; - }; - }; - - vcca_1v8: LDO_REG7 { - regulator-name = "vcca_1v8"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcca1v8_pmu: LDO_REG8 { - regulator-name = "vcca1v8_pmu"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vcca1v8_image: LDO_REG9 { - regulator-name = "vcca1v8_image"; - regulator-always-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_3v3: SWITCH_REG1 { - regulator-name = "vcc_3v3"; - regulator-always-on; - regulator-boot-on; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc3v3_sd: SWITCH_REG2 { - regulator-name = "vcc3v3_sd"; - regulator-always-on; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - }; - }; -}; - -&i2c3 { - status = "okay"; - - hym8563: rtc@51 { - compatible = "haoyu,hym8563"; - reg = <0x51>; - interrupt-parent = <&gpio0>; - interrupts = ; - #clock-cells = <0>; - clock-output-names = "rtcic_32kout"; - pinctrl-names = "default"; - pinctrl-0 = <&hym8563_int>; - wakeup-source; - }; -}; - -&i2c5 { - /* pin 3 (SDA) + 4 (SCL) of header con2 */ - status = "disabled"; -}; - -&i2s0_8ch { - /* hdmi sound */ - status = "okay"; -}; - -&mdio0 { - #address-cells = <1>; - #size-cells = <0>; - - switch@0 { - compatible = "mediatek,mt7531"; - reg = <0>; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@1 { - reg = <1>; - label = "lan0"; - }; - - port@2 { - reg = <2>; - label = "lan1"; - }; - - port@3 { - reg = <3>; - label = "lan2"; - }; - - port@4 { - reg = <4>; - label = "lan3"; - }; - - port@5 { - reg = <5>; - label = "cpu"; - ethernet = <&gmac0>; - phy-mode = "rgmii"; - - fixed-link { - speed = <1000>; - full-duplex; - pause; - }; - }; - }; - }; -}; - -&mdio1 { - rgmii_phy1: ethernet-phy@0 { - compatible = "ethernet-phy-ieee802.3-c22"; - reg = <0x0>; - }; -}; - -&pcie30phy { - data-lanes = <1 2>; - phy-supply = <&vcc3v3_pi6c_05>; - status = "okay"; -}; - -&pcie3x1 { - /* M.2 slot */ - num-lanes = <1>; - pinctrl-names = "default"; - pinctrl-0 = <&ngffpcie_reset_h>; - reset-gpios = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>; - vpcie3v3-supply = <&vcc3v3_ngff>; - status = "okay"; -}; - -&pcie3x2 { - /* mPCIe slot */ - num-lanes = <1>; - pinctrl-names = "default"; - pinctrl-0 = <&minipcie_reset_h>; - reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>; - vpcie3v3-supply = <&vcc3v3_minipcie>; - status = "okay"; -}; - -&pinctrl { - leds { - blue_led_pin: blue-led-pin { - rockchip,pins = <0 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>; - }; - green_led_pin: green-led-pin { - rockchip,pins = <0 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - hym8563 { - hym8563_int: hym8563-int { - rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - ir-receiver { - ir_receiver_pin: ir-receiver-pin { - rockchip,pins = <0 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - pcie { - minipcie_enable_h: minipcie-enable-h { - rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none_drv_level_5>; - }; - - ngffpcie_enable_h: ngffpcie-enable-h { - rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none_drv_level_5>; - }; - - minipcie_reset_h: minipcie-reset-h { - rockchip,pins = <2 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none_drv_level_5>; - }; - - ngffpcie_reset_h: ngffpcie-reset-h { - rockchip,pins = <3 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none_drv_level_5>; - }; - }; - - pmic { - pmic_int: pmic_int { - rockchip,pins = - <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - usb { - vcc5v0_usb_host_en: vcc5v0_usb_host_en { - rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - vcc5v0_usb_otg_en: vcc5v0_usb_otg_en { - rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; -}; - -&pmu_io_domains { - pmuio1-supply = <&vcc3v3_pmu>; - pmuio2-supply = <&vcc3v3_pmu>; - vccio1-supply = <&vccio_acodec>; - vccio3-supply = <&vccio_sd>; - vccio4-supply = <&vcc_3v3>; - vccio5-supply = <&vcc_3v3>; - vccio6-supply = <&vcc_1v8>; - vccio7-supply = <&vcc_3v3>; - status = "okay"; -}; - -&pwm8 { - /* fan 5v - gnd - pwm */ - status = "okay"; -}; - -&pwm10 { - /* pin 7 of header con2 */ - status = "disabled"; -}; - -&pwm11 { - /* pin 15 of header con2 */ - status = "disabled"; -}; - -&pwm12 { - /* pin 21 of header con2 */ - /* shared with uart9 + spi3 */ - pinctrl-0 = <&pwm12m1_pins>; - status = "disabled"; -}; - -&pwm13 { - /* pin 24 of header con2 */ - /* shared with uart9 */ - pinctrl-0 = <&pwm13m1_pins>; - status = "disabled"; -}; - -&pwm14 { - /* pin 23 of header con2 */ - /* shared with spi3 */ - pinctrl-0 = <&pwm14m1_pins>; - status = "disabled"; -}; - -&pwm15 { - /* pin 19 of header con2 */ - /* shared with spi3 */ - pinctrl-0 = <&pwm15m1_pins>; - status = "disabled"; -}; - -&saradc { - vref-supply = <&vcca_1v8>; - status = "okay"; -}; - -&sata2 { - status = "okay"; -}; - -&sdhci { - bus-width = <8>; - max-frequency = <200000000>; - non-removable; - pinctrl-names = "default"; - pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>; - status = "okay"; -}; - -&sdmmc0 { - bus-width = <4>; - cap-sd-highspeed; - cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>; - disable-wp; - pinctrl-names = "default"; - pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>; - sd-uhs-sdr104; - vmmc-supply = <&vcc3v3_sd>; - vqmmc-supply = <&vccio_sd>; - status = "okay"; -}; - -&spi3 { - /* pin 19 (MO) + 21 (MI) + 23 (CK) of header con2 */ - /* shared with pwm12/14/15 and uart9 */ - pinctrl-0 = <&spi3m1_pins>; - status = "disabled"; -}; - -&tsadc { - rockchip,hw-tshut-mode = <1>; - rockchip,hw-tshut-polarity = <0>; - status = "okay"; -}; - -&uart0 { - /* pin 8 (TX) + 10 (RX) (RTS:16, CTS:18) of header con2 */ - status = "disabled"; -}; - -&uart2 { - /* debug-uart */ - status = "okay"; -}; - -&uart7 { - /* pin 11 (TX) + 13 (RX) of header con2 */ - pinctrl-0 = <&uart7m1_xfer>; - status = "disabled"; -}; - -&uart9 { - /* pin 21 (TX) + 24 (RX) of header con2 */ - /* shared with pwm13 and pwm12/spi3 */ - pinctrl-0 = <&uart9m1_xfer>; - status = "disabled"; -}; - -&usb_host0_ehci { - status = "okay"; -}; - -&usb_host0_ohci { - status = "okay"; -}; - -&usb_host0_xhci { - dr_mode = "host"; - status = "okay"; -}; - -&usb_host1_ehci { - status = "okay"; -}; - -&usb_host1_ohci { - status = "okay"; -}; - -&usb_host1_xhci { - status = "okay"; -}; - -&usb2phy0 { - status = "okay"; -}; - -&usb2phy0_host { - phy-supply = <&vcc5v0_usb_host>; - status = "okay"; -}; - -&usb2phy0_otg { - phy-supply = <&vcc5v0_usb_otg>; - status = "okay"; -}; - -&usb2phy1 { - /* USB for PCIe/M2 */ - status = "okay"; -}; - -&usb2phy1_host { - status = "okay"; -}; - -&usb2phy1_otg { - status = "okay"; -}; - -&vop { - assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>; - assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>; - status = "okay"; -}; - -&vop_mmu { - status = "okay"; -}; - -&vp0 { - vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 { - reg = ; - remote-endpoint = <&hdmi_in_vp0>; - }; -}; diff --git a/arch/arm/dts/rk3568-evb.dts b/arch/arm/dts/rk3568-evb.dts deleted file mode 100644 index 19f8fc369b1..00000000000 --- a/arch/arm/dts/rk3568-evb.dts +++ /dev/null @@ -1,689 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (c) 2021 Rockchip Electronics Co., Ltd. - * - */ - -/dts-v1/; -#include -#include -#include -#include -#include "rk3568.dtsi" - -/ { - model = "Rockchip RK3568 EVB1 DDR4 V10 Board"; - compatible = "rockchip,rk3568-evb1-v10", "rockchip,rk3568"; - - aliases { - ethernet0 = &gmac0; - ethernet1 = &gmac1; - mmc0 = &sdmmc0; - mmc1 = &sdhci; - }; - - chosen: chosen { - stdout-path = "serial2:1500000n8"; - }; - - dc_12v: dc-12v { - compatible = "regulator-fixed"; - regulator-name = "dc_12v"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <12000000>; - regulator-max-microvolt = <12000000>; - }; - - hdmi-con { - compatible = "hdmi-connector"; - type = "a"; - - port { - hdmi_con_in: endpoint { - remote-endpoint = <&hdmi_out_con>; - }; - }; - }; - - leds { - compatible = "gpio-leds"; - - led_work: led-0 { - gpios = <&gpio0 RK_PC0 GPIO_ACTIVE_HIGH>; - function = LED_FUNCTION_HEARTBEAT; - color = ; - linux,default-trigger = "heartbeat"; - pinctrl-names = "default"; - pinctrl-0 = <&led_work_en>; - }; - }; - - rk809-sound { - compatible = "simple-audio-card"; - simple-audio-card,format = "i2s"; - simple-audio-card,name = "Analog RK809"; - simple-audio-card,mclk-fs = <256>; - - simple-audio-card,cpu { - sound-dai = <&i2s1_8ch>; - }; - simple-audio-card,codec { - sound-dai = <&rk809>; - }; - }; - - vcc3v3_sys: vcc3v3-sys { - compatible = "regulator-fixed"; - regulator-name = "vcc3v3_sys"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <&dc_12v>; - }; - - vcc5v0_sys: vcc5v0-sys { - compatible = "regulator-fixed"; - regulator-name = "vcc5v0_sys"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - vin-supply = <&dc_12v>; - }; - - vcc5v0_usb: vcc5v0-usb { - compatible = "regulator-fixed"; - regulator-name = "vcc5v0_usb"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - vin-supply = <&dc_12v>; - }; - - vcc5v0_usb_host: vcc5v0-usb-host { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&vcc5v0_usb_host_en>; - regulator-name = "vcc5v0_usb_host"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - vin-supply = <&vcc5v0_usb>; - }; - - vcc5v0_usb_otg: vcc5v0-usb-otg { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&vcc5v0_usb_otg_en>; - regulator-name = "vcc5v0_usb_otg"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - vin-supply = <&vcc5v0_usb>; - }; - - vcc3v3_lcd0_n: vcc3v3-lcd0-n { - compatible = "regulator-fixed"; - regulator-name = "vcc3v3_lcd0_n"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - enable-active-high; - gpio = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>; - vin-supply = <&vcc3v3_sys>; - pinctrl-names = "default"; - pinctrl-0 = <&vcc3v3_lcd0_n_en>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc3v3_lcd1_n: vcc3v3-lcd1-n { - compatible = "regulator-fixed"; - regulator-name = "vcc3v3_lcd1_n"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - enable-active-high; - gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>; - vin-supply = <&vcc3v3_sys>; - pinctrl-names = "default"; - pinctrl-0 = <&vcc3v3_lcd1_n_en>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; -}; - -&combphy0 { - status = "okay"; -}; - -&combphy1 { - status = "okay"; -}; - -&cpu0 { - cpu-supply = <&vdd_cpu>; -}; - -&cpu1 { - cpu-supply = <&vdd_cpu>; -}; - -&cpu2 { - cpu-supply = <&vdd_cpu>; -}; - -&cpu3 { - cpu-supply = <&vdd_cpu>; -}; - -&gmac0 { - assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>; - assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>; - assigned-clock-rates = <0>, <125000000>; - clock_in_out = "output"; - phy-handle = <&rgmii_phy0>; - phy-mode = "rgmii-id"; - pinctrl-names = "default"; - pinctrl-0 = <&gmac0_miim - &gmac0_tx_bus2 - &gmac0_rx_bus2 - &gmac0_rgmii_clk - &gmac0_rgmii_bus>; - status = "okay"; -}; - -&gmac1 { - assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>; - assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>; - assigned-clock-rates = <0>, <125000000>; - clock_in_out = "output"; - phy-handle = <&rgmii_phy1>; - phy-mode = "rgmii-id"; - pinctrl-names = "default"; - pinctrl-0 = <&gmac1m1_miim - &gmac1m1_tx_bus2 - &gmac1m1_rx_bus2 - &gmac1m1_rgmii_clk - &gmac1m1_rgmii_bus>; - status = "okay"; -}; - -&gpu { - mali-supply = <&vdd_gpu>; - status = "okay"; -}; - -&hdmi { - avdd-0v9-supply = <&vdda0v9_image>; - avdd-1v8-supply = <&vcca1v8_image>; - status = "okay"; -}; - -&hdmi_in { - hdmi_in_vp0: endpoint { - remote-endpoint = <&vp0_out_hdmi>; - }; -}; - -&hdmi_out { - hdmi_out_con: endpoint { - remote-endpoint = <&hdmi_con_in>; - }; -}; - -&hdmi_sound { - status = "okay"; -}; - -&i2c0 { - status = "okay"; - - vdd_cpu: regulator@1c { - compatible = "tcs,tcs4525"; - reg = <0x1c>; - fcs,suspend-voltage-selector = <1>; - regulator-name = "vdd_cpu"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <1150000>; - regulator-ramp-delay = <2300>; - vin-supply = <&vcc5v0_sys>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - rk809: pmic@20 { - compatible = "rockchip,rk809"; - reg = <0x20>; - interrupt-parent = <&gpio0>; - interrupts = ; - assigned-clocks = <&cru I2S1_MCLKOUT_TX>; - assigned-clock-parents = <&cru CLK_I2S1_8CH_TX>; - #clock-cells = <1>; - clock-names = "mclk"; - clocks = <&cru I2S1_MCLKOUT_TX>; - pinctrl-names = "default"; - pinctrl-0 = <&pmic_int>, <&i2s1m0_mclk>; - rockchip,system-power-controller; - #sound-dai-cells = <0>; - vcc1-supply = <&vcc3v3_sys>; - vcc2-supply = <&vcc3v3_sys>; - vcc3-supply = <&vcc3v3_sys>; - vcc4-supply = <&vcc3v3_sys>; - vcc5-supply = <&vcc3v3_sys>; - vcc6-supply = <&vcc3v3_sys>; - vcc7-supply = <&vcc3v3_sys>; - vcc8-supply = <&vcc3v3_sys>; - vcc9-supply = <&vcc3v3_sys>; - wakeup-source; - - regulators { - vdd_logic: DCDC_REG1 { - regulator-name = "vdd_logic"; - regulator-always-on; - regulator-boot-on; - regulator-initial-mode = <0x2>; - regulator-min-microvolt = <500000>; - regulator-max-microvolt = <1350000>; - regulator-ramp-delay = <6001>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_gpu: DCDC_REG2 { - regulator-name = "vdd_gpu"; - regulator-always-on; - regulator-initial-mode = <0x2>; - regulator-min-microvolt = <500000>; - regulator-max-microvolt = <1350000>; - regulator-ramp-delay = <6001>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_ddr: DCDC_REG3 { - regulator-name = "vcc_ddr"; - regulator-always-on; - regulator-boot-on; - regulator-initial-mode = <0x2>; - - regulator-state-mem { - regulator-on-in-suspend; - }; - }; - - vdd_npu: DCDC_REG4 { - regulator-name = "vdd_npu"; - regulator-initial-mode = <0x2>; - regulator-min-microvolt = <500000>; - regulator-max-microvolt = <1350000>; - regulator-ramp-delay = <6001>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_1v8: DCDC_REG5 { - regulator-name = "vcc_1v8"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdda0v9_image: LDO_REG1 { - regulator-name = "vdda0v9_image"; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <900000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdda_0v9: LDO_REG2 { - regulator-name = "vdda_0v9"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <900000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdda0v9_pmu: LDO_REG3 { - regulator-name = "vdda0v9_pmu"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <900000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <900000>; - }; - }; - - vccio_acodec: LDO_REG4 { - regulator-name = "vccio_acodec"; - regulator-always-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vccio_sd: LDO_REG5 { - regulator-name = "vccio_sd"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc3v3_pmu: LDO_REG6 { - regulator-name = "vcc3v3_pmu"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <3300000>; - }; - }; - - vcca_1v8: LDO_REG7 { - regulator-name = "vcca_1v8"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcca1v8_pmu: LDO_REG8 { - regulator-name = "vcca1v8_pmu"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vcca1v8_image: LDO_REG9 { - regulator-name = "vcca1v8_image"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_3v3: SWITCH_REG1 { - regulator-name = "vcc_3v3"; - regulator-always-on; - regulator-boot-on; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc3v3_sd: SWITCH_REG2 { - regulator-name = "vcc3v3_sd"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - }; - - codec { - mic-in-differential; - }; - }; -}; - -&i2c1 { - status = "okay"; - - touchscreen0: goodix@14 { - compatible = "goodix,gt1151"; - reg = <0x14>; - interrupt-parent = <&gpio0>; - interrupts = ; - AVDD28-supply = <&vcc3v3_lcd0_n>; - irq-gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&touch_int &touch_rst>; - reset-gpios = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>; - VDDIO-supply = <&vcc3v3_lcd0_n>; - }; -}; - -&i2s0_8ch { - status = "okay"; -}; - -&i2s1_8ch { - rockchip,trcm-sync-tx-only; - status = "okay"; -}; - -&mdio0 { - rgmii_phy0: ethernet-phy@0 { - compatible = "ethernet-phy-ieee802.3-c22"; - reg = <0x0>; - reset-assert-us = <20000>; - reset-deassert-us = <100000>; - reset-gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_LOW>; - }; -}; - -&mdio1 { - rgmii_phy1: ethernet-phy@0 { - compatible = "ethernet-phy-ieee802.3-c22"; - reg = <0x0>; - reset-assert-us = <20000>; - reset-deassert-us = <100000>; - reset-gpios = <&gpio2 RK_PD1 GPIO_ACTIVE_LOW>; - }; -}; - -&pinctrl { - display { - vcc3v3_lcd0_n_en: vcc3v3_lcd0_n_en { - rockchip,pins = <0 RK_PC7 0 &pcfg_pull_none>; - }; - vcc3v3_lcd1_n_en: vcc3v3_lcd1_n_en { - rockchip,pins = <0 RK_PC5 0 &pcfg_pull_none>; - }; - }; - - leds { - led_work_en: led_work_en { - rockchip,pins = <0 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - pmic { - pmic_int: pmic_int { - rockchip,pins = - <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - touchscreen { - touch_int: touch_int { - rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>; - }; - touch_rst: touch_rst { - rockchip,pins = <0 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - usb { - vcc5v0_usb_host_en: vcc5v0_usb_host_en { - rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; - }; - vcc5v0_usb_otg_en: vcc5v0_usb_otg_en { - rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; -}; - -&pmu_io_domains { - pmuio1-supply = <&vcc3v3_pmu>; - pmuio2-supply = <&vcc3v3_pmu>; - vccio1-supply = <&vccio_acodec>; - vccio2-supply = <&vcc_1v8>; - vccio3-supply = <&vccio_sd>; - vccio4-supply = <&vcc_1v8>; - vccio5-supply = <&vcc_3v3>; - vccio6-supply = <&vcc_1v8>; - vccio7-supply = <&vcc_3v3>; - status = "okay"; -}; - -&saradc { - vref-supply = <&vcca_1v8>; - status = "okay"; -}; - -&sdhci { - bus-width = <8>; - max-frequency = <200000000>; - non-removable; - pinctrl-names = "default"; - pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>; - status = "okay"; -}; - -&sdmmc0 { - bus-width = <4>; - cap-sd-highspeed; - cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>; - disable-wp; - pinctrl-names = "default"; - pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>; - sd-uhs-sdr104; - vmmc-supply = <&vcc3v3_sd>; - vqmmc-supply = <&vccio_sd>; - status = "okay"; -}; - -&tsadc { - rockchip,hw-tshut-mode = <1>; - rockchip,hw-tshut-polarity = <0>; - status = "okay"; -}; - -&uart2 { - status = "okay"; -}; - -&usb_host0_ehci { - status = "okay"; -}; - -&usb_host0_ohci { - status = "okay"; -}; - -&usb_host0_xhci { - extcon = <&usb2phy0>; - status = "okay"; -}; - -&usb_host1_ehci { - status = "okay"; -}; - -&usb_host1_ohci { - status = "okay"; -}; - -&usb_host1_xhci { - status = "okay"; -}; - -&usb2phy0 { - status = "okay"; -}; - -&usb2phy0_host { - phy-supply = <&vcc5v0_usb_host>; - status = "okay"; -}; - -&usb2phy0_otg { - phy-supply = <&vcc5v0_usb_otg>; - status = "okay"; -}; - -&usb2phy1 { - status = "okay"; -}; - -&usb2phy1_host { - phy-supply = <&vcc5v0_usb_host>; - status = "okay"; -}; - -&usb2phy1_otg { - phy-supply = <&vcc5v0_usb_host>; - status = "okay"; -}; - -&vop { - assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>; - assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>; - status = "okay"; -}; - -&vop_mmu { - status = "okay"; -}; - -&vp0 { - vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 { - reg = ; - remote-endpoint = <&hdmi_in_vp0>; - }; -}; diff --git a/arch/arm/dts/rk3568-lubancat-2.dts b/arch/arm/dts/rk3568-lubancat-2.dts deleted file mode 100644 index a8a4cc190eb..00000000000 --- a/arch/arm/dts/rk3568-lubancat-2.dts +++ /dev/null @@ -1,730 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) - -/* - * Copyright (c) 2021 Rockchip Electronics Co., Ltd. - * Copyright (c) 2022 EmbedFire - */ - -/dts-v1/; -#include -#include -#include -#include -#include "rk3568.dtsi" - -/ { - model = "EmbedFire LubanCat 2"; - compatible = "embedfire,lubancat-2", "rockchip,rk3568"; - - aliases { - ethernet0 = &gmac0; - ethernet1 = &gmac1; - mmc0 = &sdmmc0; - mmc1 = &sdhci; - }; - - chosen: chosen { - stdout-path = "serial2:1500000n8"; - }; - - leds { - compatible = "gpio-leds"; - - user_led: user-led { - label = "user_led"; - linux,default-trigger = "heartbeat"; - default-state = "on"; - gpios = <&gpio0 RK_PC7 GPIO_ACTIVE_LOW>; - pinctrl-names = "default"; - pinctrl-0 = <&user_led_pin>; - }; - }; - - hdmi-con { - compatible = "hdmi-connector"; - type = "a"; - - port { - hdmi_con_in: endpoint { - remote-endpoint = <&hdmi_out_con>; - }; - }; - }; - - dc_5v: dc-5v-regulator { - compatible = "regulator-fixed"; - regulator-name = "dc_5v"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - }; - - vcc3v3_sys: vcc3v3-sys-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc3v3_sys"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <&vcc5v0_sys>; - }; - - vcc5v0_sys: vcc5v0-sys-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc5v0_sys"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - vin-supply = <&dc_5v>; - }; - - vcc3v3_m2_pcie: vcc3v3-m2-pcie-regulator { - compatible = "regulator-fixed"; - regulator-name = "m2_pcie_3v3"; - enable-active-high; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - gpios = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>; - pinctrl-0 = <&vcc3v3_m2_pcie_en>; - pinctrl-names = "default"; - startup-delay-us = <200000>; - vin-supply = <&vcc5v0_sys>; - }; - - vcc3v3_mini_pcie: vcc3v3-mini-pcie-regulator { - compatible = "regulator-fixed"; - regulator-name = "minipcie_3v3"; - enable-active-high; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - gpio = <&gpio3 RK_PC3 GPIO_ACTIVE_HIGH>; - pinctrl-0 = <&vcc3v3_mini_pcie_en>; - pinctrl-names = "default"; - startup-delay-us = <5000>; - vin-supply = <&vcc5v0_sys>; - }; - - vcc5v0_usb20_host: vcc5v0-usb20-host-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc5v0_usb20_host"; - enable-active-high; - gpio = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>; - pinctrl-0 = <&vcc5v0_usb20_host_en>; - pinctrl-names = "default"; - }; - - vcc5v0_usb30_host: vcc5v0-usb30-host-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc5v0_usb30_host"; - enable-active-high; - gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_HIGH>; - pinctrl-0 = <&vcc5v0_usb30_host_en>; - pinctrl-names = "default"; - }; - - vcc5v0_otg_vbus: vcc5v0-otg-vbus-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc5v0_otg_vbus"; - enable-active-high; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - gpio = <&gpio0 RK_PD3 GPIO_ACTIVE_HIGH>; - pinctrl-0 = <&vcc5v0_otg_vbus_en>; - pinctrl-names = "default"; - }; -}; - -&combphy0 { - status = "okay"; -}; - -&combphy1 { - status = "okay"; -}; - -&combphy2 { - status = "okay"; -}; - -&cpu0 { - cpu-supply = <&vdd_cpu>; -}; - -&cpu1 { - cpu-supply = <&vdd_cpu>; -}; - -&cpu2 { - cpu-supply = <&vdd_cpu>; -}; - -&cpu3 { - cpu-supply = <&vdd_cpu>; -}; - -&gpu { - mali-supply = <&vdd_gpu>; - status = "okay"; -}; - -&hdmi { - avdd-0v9-supply = <&vdda0v9_image>; - avdd-1v8-supply = <&vcca1v8_image>; - status = "okay"; -}; - -&hdmi_in { - hdmi_in_vp0: endpoint { - remote-endpoint = <&vp0_out_hdmi>; - }; -}; - -&hdmi_out { - hdmi_out_con: endpoint { - remote-endpoint = <&hdmi_con_in>; - }; -}; - -&hdmi_sound { - status = "okay"; -}; - -&i2c0 { - status = "okay"; - - vdd_cpu: regulator@1c { - compatible = "tcs,tcs4525"; - reg = <0x1c>; - fcs,suspend-voltage-selector = <1>; - regulator-name = "vdd_cpu"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <1150000>; - regulator-ramp-delay = <2300>; - vin-supply = <&vcc5v0_sys>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - rk809: pmic@20 { - compatible = "rockchip,rk809"; - reg = <0x20>; - interrupt-parent = <&gpio0>; - interrupts = ; - assigned-clocks = <&cru I2S1_MCLKOUT_TX>; - assigned-clock-parents = <&cru CLK_I2S1_8CH_TX>; - #clock-cells = <1>; - clock-names = "mclk"; - clocks = <&cru I2S1_MCLKOUT_TX>; - pinctrl-names = "default"; - pinctrl-0 = <&pmic_int>; - rockchip,system-power-controller; - #sound-dai-cells = <0>; - vcc1-supply = <&vcc3v3_sys>; - vcc2-supply = <&vcc3v3_sys>; - vcc3-supply = <&vcc3v3_sys>; - vcc4-supply = <&vcc3v3_sys>; - vcc5-supply = <&vcc3v3_sys>; - vcc6-supply = <&vcc3v3_sys>; - vcc7-supply = <&vcc3v3_sys>; - vcc8-supply = <&vcc3v3_sys>; - vcc9-supply = <&vcc3v3_sys>; - wakeup-source; - - regulators { - vdd_logic: DCDC_REG1 { - regulator-name = "vdd_logic"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <500000>; - regulator-max-microvolt = <1350000>; - regulator-ramp-delay = <6001>; - regulator-initial-mode = <0x2>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_gpu: DCDC_REG2 { - regulator-name = "vdd_gpu"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <500000>; - regulator-max-microvolt = <1350000>; - regulator-ramp-delay = <6001>; - regulator-initial-mode = <0x2>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_ddr: DCDC_REG3 { - regulator-name = "vcc_ddr"; - regulator-always-on; - regulator-boot-on; - regulator-initial-mode = <0x2>; - - regulator-state-mem { - regulator-on-in-suspend; - }; - }; - - vdd_npu: DCDC_REG4 { - regulator-name = "vdd_npu"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <500000>; - regulator-max-microvolt = <1350000>; - regulator-ramp-delay = <6001>; - regulator-initial-mode = <0x2>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_1v8: DCDC_REG5 { - regulator-name = "vcc_1v8"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdda0v9_image: LDO_REG1 { - regulator-name = "vdda0v9_image"; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <900000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdda_0v9: LDO_REG2 { - regulator-name = "vdda_0v9"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <900000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdda0v9_pmu: LDO_REG3 { - regulator-name = "vdda0v9_pmu"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <900000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <900000>; - }; - }; - - vccio_acodec: LDO_REG4 { - regulator-name = "vccio_acodec"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vccio_sd: LDO_REG5 { - regulator-name = "vccio_sd"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc3v3_pmu: LDO_REG6 { - regulator-name = "vcc3v3_pmu"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <3300000>; - }; - }; - - vcca_1v8: LDO_REG7 { - regulator-name = "vcca_1v8"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcca1v8_pmu: LDO_REG8 { - regulator-name = "vcca1v8_pmu"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vcca1v8_image: LDO_REG9 { - regulator-name = "vcca1v8_image"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_3v3: SWITCH_REG1 { - regulator-name = "vcc_3v3"; - regulator-always-on; - regulator-boot-on; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc3v3_sd: SWITCH_REG2 { - regulator-name = "vcc3v3_sd"; - regulator-always-on; - regulator-boot-on; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - }; - }; -}; - -&i2s1_8ch { - rockchip,trcm-sync-tx-only; - status = "okay"; -}; - -&gmac0 { - phy-mode = "rgmii"; - clock_in_out = "output"; - - snps,reset-gpio = <&gpio2 RK_PD3 GPIO_ACTIVE_LOW>; - snps,reset-active-low; - /* Reset time is 20ms, 100ms for rtl8211f */ - snps,reset-delays-us = <0 20000 100000>; - - assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>; - assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>, <&cru CLK_MAC0_2TOP>; - - pinctrl-names = "default"; - pinctrl-0 = <&gmac0_miim - &gmac0_tx_bus2 - &gmac0_rx_bus2 - &gmac0_rgmii_clk - &gmac0_rgmii_bus>; - - tx_delay = <0x22>; - rx_delay = <0x0e>; - - phy-handle = <&rgmii_phy0>; - status = "okay"; -}; - -&mdio0 { - rgmii_phy0: phy@0 { - compatible = "ethernet-phy-ieee802.3-c22"; - reg = <0x0>; - }; -}; - -&gmac1 { - phy-mode = "rgmii"; - clock_in_out = "output"; - - snps,reset-gpio = <&gpio3 RK_PA2 GPIO_ACTIVE_LOW>; - snps,reset-active-low; - /* Reset time is 20ms, 100ms for rtl8211f */ - snps,reset-delays-us = <0 20000 100000>; - - assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>; - assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru CLK_MAC1_2TOP>; - - pinctrl-names = "default"; - pinctrl-0 = <&gmac1m1_miim - &gmac1m1_tx_bus2 - &gmac1m1_rx_bus2 - &gmac1m1_rgmii_clk - &gmac1m1_rgmii_bus>; - - tx_delay = <0x21>; - rx_delay = <0x0e>; - - phy-handle = <&rgmii_phy1>; - status = "okay"; -}; - -&mdio1 { - rgmii_phy1: phy@0 { - compatible = "ethernet-phy-ieee802.3-c22"; - reg = <0x0>; - }; -}; - -&gic { - mbi-ranges = <94 31>, <229 31>, <289 31>; -}; - -&pcie30phy { - status = "okay"; -}; - -&pcie3x2 { - reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>; - vpcie3v3-supply = <&vcc3v3_m2_pcie>; - status = "okay"; -}; - -&pcie2x1 { - reset-gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>; - disable-gpios = <&gpio3 RK_PC2 GPIO_ACTIVE_HIGH>; - vpcie3v3-supply = <&vcc3v3_mini_pcie>; - status = "okay"; -}; - -&pmu_io_domains { - pmuio2-supply = <&vcc3v3_pmu>; - vccio1-supply = <&vccio_acodec>; - vccio3-supply = <&vccio_sd>; - vccio4-supply = <&vcc_1v8>; - vccio5-supply = <&vcc_3v3>; - vccio6-supply = <&vcc_1v8>; - vccio7-supply = <&vcc_3v3>; - status = "okay"; -}; - -&pwm8 { - status = "okay"; -}; - -&pwm9 { - status = "disabled"; -}; - -&pwm10 { - status = "disabled"; -}; - -&pwm14 { - status = "disabled"; -}; - -&spi3 { - pinctrl-0 = <&spi3m1_pins>; - status = "disabled"; -}; - -&uart2 { - status = "okay"; -}; - -&uart3 { - pinctrl-names = "default"; - pinctrl-0 = <&uart3m1_xfer>; - status = "disabled"; -}; - -&saradc { - vref-supply = <&vcca_1v8>; - status = "okay"; -}; - -&tsadc { - rockchip,hw-tshut-mode = <1>; - rockchip,hw-tshut-polarity = <0>; - status = "okay"; -}; - -&sdhci { - assigned-clocks = <&cru BCLK_EMMC>, <&cru TCLK_EMMC>, <&cru CCLK_EMMC>; - assigned-clock-rates = <200000000>, <24000000>, <200000000>; - bus-width = <8>; - max-frequency = <200000000>; - mmc-hs200-1_8v; - non-removable; - pinctrl-names = "default"; - pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd>; - supports-emmc; - status = "okay"; -}; - -&sdmmc0 { - max-frequency = <150000000>; - no-sdio; - no-mmc; - bus-width = <4>; - cap-mmc-highspeed; - cap-sd-highspeed; - disable-wp; - sd-uhs-sdr104; - vmmc-supply = <&vcc3v3_sd>; - vqmmc-supply = <&vccio_sd>; - pinctrl-names = "default"; - pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>; - status = "okay"; -}; - -/* USB OTG/USB Host_1 USB 2.0 Comb */ -&usb2phy0 { - status = "okay"; -}; - -&usb2phy0_host { - phy-supply = <&vcc5v0_usb30_host>; - status = "okay"; -}; - -&usb2phy0_otg { - phy-supply = <&vcc5v0_otg_vbus>; - status = "okay"; -}; - -&usb_host0_ehci { - status = "okay"; -}; - -&usb_host0_ohci { - status = "okay"; -}; - -/* USB Host_2/USB Host_3 USB 2.0 Comb */ -&usb2phy1 { - status = "okay"; -}; - -&usb2phy1_host { - status = "okay"; -}; - -&usb2phy1_otg { - phy-supply = <&vcc5v0_usb20_host>; - status = "okay"; -}; - -&usb_host1_ehci { - status = "okay"; -}; - -&usb_host1_ohci { - status = "okay"; -}; - -/* MULTI_PHY0 For SATA0, USB3.0 OTG Only USB2.0 */ -&usb_host0_xhci { - phys = <&usb2phy0_otg>; - phy-names = "usb2-phy"; - extcon = <&usb2phy0>; - maximum-speed = "high-speed"; - dr_mode = "host"; - status = "okay"; -}; - -&sata0 { - status = "okay"; -}; - -/* USB3.0 Host */ -&usb_host1_xhci { - status = "okay"; -}; - -&vop { - assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>; - assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>; - status = "okay"; -}; - -&vop_mmu { - status = "okay"; -}; - -&vp0 { - vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 { - reg = ; - remote-endpoint = <&hdmi_in_vp0>; - }; -}; - -&pinctrl { - leds { - user_led_pin: user-status-led-pin { - rockchip,pins = <0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - usb { - vcc5v0_usb20_host_en: vcc5v0-usb20-host-en { - rockchip,pins = <0 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - vcc5v0_usb30_host_en: vcc5v0-usb30-host-en { - rockchip,pins = <0 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - vcc5v0_otg_vbus_en: vcc5v0-otg-vbus-en { - rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - pcie { - vcc3v3_m2_pcie_en: vcc3v3-m2-pcie-en { - rockchip,pins = <0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - vcc3v3_mini_pcie_en: vcc3v3-mini-pcie-en { - rockchip,pins = <3 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - pmic { - pmic_int: pmic-int { - rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; -}; diff --git a/arch/arm/dts/rk3568-nanopi-r5c.dts b/arch/arm/dts/rk3568-nanopi-r5c.dts deleted file mode 100644 index c718b8dbb9c..00000000000 --- a/arch/arm/dts/rk3568-nanopi-r5c.dts +++ /dev/null @@ -1,112 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later OR MIT -/* - * Copyright (c) 2022 FriendlyElec Computer Tech. Co., Ltd. - * (http://www.friendlyelec.com) - * - * Copyright (c) 2023 Tianling Shen - */ - -/dts-v1/; -#include "rk3568-nanopi-r5s.dtsi" - -/ { - model = "FriendlyElec NanoPi R5C"; - compatible = "friendlyarm,nanopi-r5c", "rockchip,rk3568"; - - gpio-keys { - compatible = "gpio-keys"; - pinctrl-names = "default"; - pinctrl-0 = <&reset_button_pin>; - - button-reset { - debounce-interval = <50>; - gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_LOW>; - label = "reset"; - linux,code = ; - }; - }; - - gpio-leds { - compatible = "gpio-leds"; - pinctrl-names = "default"; - pinctrl-0 = <&lan_led_pin>, <&power_led_pin>, <&wan_led_pin>, <&wlan_led_pin>; - - led-lan { - color = ; - function = LED_FUNCTION_LAN; - gpios = <&gpio3 RK_PA3 GPIO_ACTIVE_HIGH>; - }; - - power_led: led-power { - color = ; - function = LED_FUNCTION_POWER; - linux,default-trigger = "heartbeat"; - gpios = <&gpio3 RK_PA2 GPIO_ACTIVE_HIGH>; - }; - - led-wan { - color = ; - function = LED_FUNCTION_WAN; - gpios = <&gpio3 RK_PA4 GPIO_ACTIVE_HIGH>; - }; - - led-wlan { - color = ; - function = LED_FUNCTION_WLAN; - gpios = <&gpio3 RK_PA5 GPIO_ACTIVE_HIGH>; - }; - }; -}; - -&pcie2x1 { - pinctrl-names = "default"; - pinctrl-0 = <&pcie20_reset_pin>; - reset-gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>; - status = "okay"; -}; - -&pcie3x1 { - num-lanes = <1>; - reset-gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>; - vpcie3v3-supply = <&vcc3v3_pcie>; - status = "okay"; -}; - -&pcie3x2 { - num-lanes = <1>; - reset-gpios = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>; - vpcie3v3-supply = <&vcc3v3_pcie>; - status = "okay"; -}; - -&pinctrl { - gpio-leds { - lan_led_pin: lan-led-pin { - rockchip,pins = <3 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - power_led_pin: power-led-pin { - rockchip,pins = <3 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - wan_led_pin: wan-led-pin { - rockchip,pins = <3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - wlan_led_pin: wlan-led-pin { - rockchip,pins = <3 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - pcie { - pcie20_reset_pin: pcie20-reset-pin { - rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - rockchip-key { - reset_button_pin: reset-button-pin { - rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; -}; diff --git a/arch/arm/dts/rk3568-nanopi-r5s.dts b/arch/arm/dts/rk3568-nanopi-r5s.dts deleted file mode 100644 index b6ad8328c7e..00000000000 --- a/arch/arm/dts/rk3568-nanopi-r5s.dts +++ /dev/null @@ -1,136 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later OR MIT -/* - * Copyright (c) 2022 FriendlyElec Computer Tech. Co., Ltd. - * (http://www.friendlyelec.com) - * - * Copyright (c) 2023 Tianling Shen - */ - -/dts-v1/; -#include "rk3568-nanopi-r5s.dtsi" - -/ { - model = "FriendlyElec NanoPi R5S"; - compatible = "friendlyarm,nanopi-r5s", "rockchip,rk3568"; - - aliases { - ethernet0 = &gmac0; - }; - - gpio-leds { - compatible = "gpio-leds"; - pinctrl-names = "default"; - pinctrl-0 = <&lan1_led_pin>, <&lan2_led_pin>, <&power_led_pin>, <&wan_led_pin>; - - led-lan1 { - color = ; - function = LED_FUNCTION_LAN; - function-enumerator = <1>; - gpios = <&gpio3 RK_PD6 GPIO_ACTIVE_HIGH>; - }; - - led-lan2 { - color = ; - function = LED_FUNCTION_LAN; - function-enumerator = <2>; - gpios = <&gpio3 RK_PD7 GPIO_ACTIVE_HIGH>; - }; - - power_led: led-power { - color = ; - function = LED_FUNCTION_POWER; - linux,default-trigger = "heartbeat"; - gpios = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>; - }; - - led-wan { - color = ; - function = LED_FUNCTION_WAN; - gpios = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>; - }; - }; -}; - -&gmac0 { - assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>; - assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>, <&cru CLK_MAC0_2TOP>; - assigned-clock-rates = <0>, <125000000>; - clock_in_out = "output"; - phy-handle = <&rgmii_phy0>; - phy-mode = "rgmii"; - pinctrl-names = "default"; - pinctrl-0 = <&gmac0_miim - &gmac0_tx_bus2 - &gmac0_rx_bus2 - &gmac0_rgmii_clk - &gmac0_rgmii_bus>; - snps,reset-gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_LOW>; - snps,reset-active-low; - /* Reset time is 15ms, 50ms for rtl8211f */ - snps,reset-delays-us = <0 15000 50000>; - tx_delay = <0x3c>; - rx_delay = <0x2f>; - status = "okay"; -}; - -&mdio0 { - rgmii_phy0: ethernet-phy@1 { - compatible = "ethernet-phy-ieee802.3-c22"; - reg = <1>; - pinctrl-0 = <ð_phy0_reset_pin>; - pinctrl-names = "default"; - }; -}; - -&pcie2x1 { - num-lanes = <1>; - reset-gpios = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>; - status = "okay"; -}; - -&pcie30phy { - data-lanes = <1 2>; - status = "okay"; -}; - -&pcie3x1 { - num-lanes = <1>; - reset-gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>; - vpcie3v3-supply = <&vcc3v3_pcie>; - status = "okay"; -}; - -&pcie3x2 { - num-lanes = <1>; - num-ib-windows = <8>; - num-ob-windows = <8>; - reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>; - vpcie3v3-supply = <&vcc3v3_pcie>; - status = "okay"; -}; - -&pinctrl { - gmac0 { - eth_phy0_reset_pin: eth-phy0-reset-pin { - rockchip,pins = <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - gpio-leds { - lan1_led_pin: lan1-led-pin { - rockchip,pins = <3 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - lan2_led_pin: lan2-led-pin { - rockchip,pins = <3 RK_PD7 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - power_led_pin: power-led-pin { - rockchip,pins = <4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - wan_led_pin: wan-led-pin { - rockchip,pins = <2 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; -}; diff --git a/arch/arm/dts/rk3568-nanopi-r5s.dtsi b/arch/arm/dts/rk3568-nanopi-r5s.dtsi deleted file mode 100644 index 93189f83064..00000000000 --- a/arch/arm/dts/rk3568-nanopi-r5s.dtsi +++ /dev/null @@ -1,587 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later OR MIT -/* - * Copyright (c) 2022 FriendlyElec Computer Tech. Co., Ltd. - * (http://www.friendlyelec.com) - * - * Copyright (c) 2023 Tianling Shen - */ - -/dts-v1/; -#include -#include -#include -#include -#include -#include "rk3568.dtsi" - -/ { - aliases { - mmc0 = &sdmmc0; - mmc1 = &sdhci; - }; - - chosen: chosen { - stdout-path = "serial2:1500000n8"; - }; - - hdmi-con { - compatible = "hdmi-connector"; - type = "a"; - - port { - hdmi_con_in: endpoint { - remote-endpoint = <&hdmi_out_con>; - }; - }; - }; - - vdd_usbc: vdd-usbc-regulator { - compatible = "regulator-fixed"; - regulator-name = "vdd_usbc"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - }; - - vcc3v3_sys: vcc3v3-sys-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc3v3_sys"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <&vdd_usbc>; - }; - - vcc5v0_sys: vcc5v0-sys-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc5v0_sys"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - vin-supply = <&vdd_usbc>; - }; - - vcc3v3_pcie: vcc3v3-pcie-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc3v3_pcie"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - enable-active-high; - gpios = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>; - startup-delay-us = <200000>; - vin-supply = <&vcc5v0_sys>; - }; - - vcc5v0_usb: vcc5v0-usb-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc5v0_usb"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - vin-supply = <&vdd_usbc>; - }; - - vcc5v0_usb_host: vcc5v0-usb-host-regulator { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&vcc5v0_usb_host_en>; - regulator-name = "vcc5v0_usb_host"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - vin-supply = <&vcc5v0_usb>; - }; - - vcc5v0_usb_otg: vcc5v0-usb-otg-regulator { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&vcc5v0_usb_otg_en>; - regulator-name = "vcc5v0_usb_otg"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - vin-supply = <&vcc5v0_usb>; - }; - - pcie30_avdd0v9: pcie30-avdd0v9-regulator { - compatible = "regulator-fixed"; - regulator-name = "pcie30_avdd0v9"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <900000>; - vin-supply = <&vcc3v3_sys>; - }; - - pcie30_avdd1v8: pcie30-avdd1v8-regulator { - compatible = "regulator-fixed"; - regulator-name = "pcie30_avdd1v8"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - vin-supply = <&vcc3v3_sys>; - }; -}; - -&combphy0 { - status = "okay"; -}; - -&combphy1 { - status = "okay"; -}; - -&combphy2 { - status = "okay"; -}; - -&cpu0 { - cpu-supply = <&vdd_cpu>; -}; - -&cpu1 { - cpu-supply = <&vdd_cpu>; -}; - -&cpu2 { - cpu-supply = <&vdd_cpu>; -}; - -&cpu3 { - cpu-supply = <&vdd_cpu>; -}; - -&gpu { - mali-supply = <&vdd_gpu>; - status = "okay"; -}; - -&hdmi { - avdd-0v9-supply = <&vdda0v9_image>; - avdd-1v8-supply = <&vcca1v8_image>; - status = "okay"; -}; - -&hdmi_in { - hdmi_in_vp0: endpoint { - remote-endpoint = <&vp0_out_hdmi>; - }; -}; - -&hdmi_out { - hdmi_out_con: endpoint { - remote-endpoint = <&hdmi_con_in>; - }; -}; - -&hdmi_sound { - status = "okay"; -}; - -&i2c0 { - status = "okay"; - - vdd_cpu: regulator@1c { - compatible = "tcs,tcs4525"; - reg = <0x1c>; - fcs,suspend-voltage-selector = <1>; - regulator-name = "vdd_cpu"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <1150000>; - regulator-ramp-delay = <2300>; - vin-supply = <&vcc5v0_sys>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - rk809: pmic@20 { - compatible = "rockchip,rk809"; - reg = <0x20>; - interrupt-parent = <&gpio0>; - interrupts = ; - #clock-cells = <1>; - pinctrl-names = "default"; - pinctrl-0 = <&pmic_int>; - rockchip,system-power-controller; - vcc1-supply = <&vcc3v3_sys>; - vcc2-supply = <&vcc3v3_sys>; - vcc3-supply = <&vcc3v3_sys>; - vcc4-supply = <&vcc3v3_sys>; - vcc5-supply = <&vcc3v3_sys>; - vcc6-supply = <&vcc3v3_sys>; - vcc7-supply = <&vcc3v3_sys>; - vcc8-supply = <&vcc3v3_sys>; - vcc9-supply = <&vcc3v3_sys>; - wakeup-source; - - regulators { - vdd_logic: DCDC_REG1 { - regulator-name = "vdd_logic"; - regulator-always-on; - regulator-boot-on; - regulator-initial-mode = <0x2>; - regulator-min-microvolt = <500000>; - regulator-max-microvolt = <1350000>; - regulator-ramp-delay = <6001>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_gpu: DCDC_REG2 { - regulator-name = "vdd_gpu"; - regulator-always-on; - regulator-initial-mode = <0x2>; - regulator-min-microvolt = <500000>; - regulator-max-microvolt = <1350000>; - regulator-ramp-delay = <6001>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_ddr: DCDC_REG3 { - regulator-name = "vcc_ddr"; - regulator-always-on; - regulator-boot-on; - regulator-initial-mode = <0x2>; - - regulator-state-mem { - regulator-on-in-suspend; - }; - }; - - vdd_npu: DCDC_REG4 { - regulator-name = "vdd_npu"; - regulator-initial-mode = <0x2>; - regulator-min-microvolt = <500000>; - regulator-max-microvolt = <1350000>; - regulator-ramp-delay = <6001>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_1v8: DCDC_REG5 { - regulator-name = "vcc_1v8"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdda0v9_image: LDO_REG1 { - regulator-name = "vdda0v9_image"; - regulator-min-microvolt = <950000>; - regulator-max-microvolt = <950000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdda_0v9: LDO_REG2 { - regulator-name = "vdda_0v9"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <900000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdda0v9_pmu: LDO_REG3 { - regulator-name = "vdda0v9_pmu"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <900000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <900000>; - }; - }; - - vccio_acodec: LDO_REG4 { - regulator-name = "vccio_acodec"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vccio_sd: LDO_REG5 { - regulator-name = "vccio_sd"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc3v3_pmu: LDO_REG6 { - regulator-name = "vcc3v3_pmu"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <3300000>; - }; - }; - - vcca_1v8: LDO_REG7 { - regulator-name = "vcca_1v8"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcca1v8_pmu: LDO_REG8 { - regulator-name = "vcca1v8_pmu"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vcca1v8_image: LDO_REG9 { - regulator-name = "vcca1v8_image"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_3v3: SWITCH_REG1 { - regulator-name = "vcc_3v3"; - regulator-always-on; - regulator-boot-on; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc3v3_sd: SWITCH_REG2 { - regulator-name = "vcc3v3_sd"; - regulator-always-on; - regulator-boot-on; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - }; - - }; -}; - -&i2c5 { - status = "okay"; - - hym8563: rtc@51 { - compatible = "haoyu,hym8563"; - reg = <0x51>; - interrupt-parent = <&gpio0>; - interrupts = ; - #clock-cells = <0>; - clock-output-names = "rtcic_32kout"; - pinctrl-names = "default"; - pinctrl-0 = <&hym8563_int>; - wakeup-source; - }; -}; - -&i2s0_8ch { - status = "okay"; -}; - -&pcie30phy { - data-lanes = <1 2>; - status = "okay"; -}; - -&pinctrl { - hym8563 { - hym8563_int: hym8563-int { - rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - pmic { - pmic_int: pmic-int { - rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - usb { - vcc5v0_usb_host_en: vcc5v0-usb-host-en { - rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - vcc5v0_usb_otg_en: vcc5v0-usb-otg-en { - rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; -}; - -&pmu_io_domains { - pmuio1-supply = <&vcc3v3_pmu>; - pmuio2-supply = <&vcc3v3_pmu>; - vccio1-supply = <&vccio_acodec>; - vccio3-supply = <&vccio_sd>; - vccio4-supply = <&vcc_1v8>; - vccio5-supply = <&vcc_3v3>; - vccio6-supply = <&vcc_1v8>; - vccio7-supply = <&vcc_3v3>; - status = "okay"; -}; - -&saradc { - vref-supply = <&vcca_1v8>; - status = "okay"; -}; - -&sdhci { - bus-width = <8>; - max-frequency = <200000000>; - non-removable; - pinctrl-names = "default"; - pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd>; - status = "okay"; -}; - -&sdmmc0 { - max-frequency = <150000000>; - no-sdio; - no-mmc; - bus-width = <4>; - cap-mmc-highspeed; - cap-sd-highspeed; - disable-wp; - vmmc-supply = <&vcc3v3_sd>; - vqmmc-supply = <&vccio_sd>; - pinctrl-names = "default"; - pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>; - status = "okay"; -}; - -&tsadc { - rockchip,hw-tshut-mode = <1>; - rockchip,hw-tshut-polarity = <0>; - status = "okay"; -}; - -&uart2 { - status = "okay"; -}; - -&usb_host0_ehci { - status = "okay"; -}; - -&usb_host0_ohci { - status = "okay"; -}; - -&usb_host0_xhci { - extcon = <&usb2phy0>; - dr_mode = "host"; - status = "okay"; -}; - -&usb_host1_ehci { - status = "okay"; -}; - -&usb_host1_ohci { - status = "okay"; -}; - -&usb_host1_xhci { - status = "okay"; -}; - -&usb2phy0 { - status = "okay"; -}; - -&usb2phy0_host { - phy-supply = <&vcc5v0_usb_host>; - status = "okay"; -}; - -&usb2phy0_otg { - status = "okay"; -}; - -&usb2phy1 { - status = "okay"; -}; - -&usb2phy1_host { - phy-supply = <&vcc5v0_usb_otg>; - status = "okay"; -}; - -&usb2phy1_otg { - status = "okay"; -}; - -&vop { - assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>; - assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>; - status = "okay"; -}; - -&vop_mmu { - status = "okay"; -}; - -&vp0 { - vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 { - reg = ; - remote-endpoint = <&hdmi_in_vp0>; - }; -}; diff --git a/arch/arm/dts/rk3568-odroid-m1.dts b/arch/arm/dts/rk3568-odroid-m1.dts deleted file mode 100644 index a337f547caf..00000000000 --- a/arch/arm/dts/rk3568-odroid-m1.dts +++ /dev/null @@ -1,741 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (c) 2022 Hardkernel Co., Ltd. - * - */ - -/dts-v1/; -#include -#include -#include -#include -#include "rk3568.dtsi" - -/ { - model = "Hardkernel ODROID-M1"; - compatible = "rockchip,rk3568-odroid-m1", "rockchip,rk3568"; - - aliases { - ethernet0 = &gmac0; - i2c0 = &i2c3; - i2c3 = &i2c0; - mmc0 = &sdhci; - mmc1 = &sdmmc0; - serial0 = &uart1; - serial1 = &uart0; - }; - - chosen { - stdout-path = "serial2:1500000n8"; - }; - - dc_12v: dc-12v-regulator { - compatible = "regulator-fixed"; - regulator-name = "dc_12v"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <12000000>; - regulator-max-microvolt = <12000000>; - }; - - hdmi-con { - compatible = "hdmi-connector"; - type = "a"; - - port { - hdmi_con_in: endpoint { - remote-endpoint = <&hdmi_out_con>; - }; - }; - }; - - ir-receiver { - compatible = "gpio-ir-receiver"; - gpios = <&gpio0 RK_PC2 GPIO_ACTIVE_LOW>; - pinctrl-names = "default"; - pinctrl-0 = <&ir_receiver_pin>; - }; - - leds { - compatible = "gpio-leds"; - - led_power: led-0 { - gpios = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>; - function = LED_FUNCTION_POWER; - color = ; - default-state = "keep"; - linux,default-trigger = "default-on"; - pinctrl-names = "default"; - pinctrl-0 = <&led_power_pin>; - }; - led_work: led-1 { - gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>; - function = LED_FUNCTION_HEARTBEAT; - color = ; - linux,default-trigger = "heartbeat"; - pinctrl-names = "default"; - pinctrl-0 = <&led_work_pin>; - }; - }; - - rk809-sound { - compatible = "simple-audio-card"; - pinctrl-names = "default"; - pinctrl-0 = <&hp_det_pin>; - simple-audio-card,name = "Analog RK817"; - simple-audio-card,format = "i2s"; - simple-audio-card,hp-det-gpio = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>; - simple-audio-card,mclk-fs = <256>; - simple-audio-card,widgets = - "Headphone", "Headphones", - "Speaker", "Speaker"; - simple-audio-card,routing = - "Headphones", "HPOL", - "Headphones", "HPOR", - "Speaker", "SPKO"; - - simple-audio-card,cpu { - sound-dai = <&i2s1_8ch>; - }; - - simple-audio-card,codec { - sound-dai = <&rk809>; - }; - }; - - vcc3v3_pcie: vcc3v3-pcie-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc3v3_pcie"; - enable-active-high; - gpio = <&gpio4 RK_PA7 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&vcc3v3_pcie_en_pin>; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - startup-delay-us = <5000>; - vin-supply = <&vcc3v3_sys>; - }; - - vcc3v3_sys: vcc3v3-sys-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc3v3_sys"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <&dc_12v>; - }; - - vcc5v0_sys: vcc5v0-sys-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc5v0_sys"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - vin-supply = <&dc_12v>; - }; - - vcc5v0_usb_host: vcc5v0-usb-host-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc5v0_usb_host"; - enable-active-high; - gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&vcc5v0_usb_host_en_pin>; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - vin-supply = <&vcc5v0_sys>; - }; - - vcc5v0_usb_otg: vcc5v0-usb-otg-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc5v0_usb_otg"; - enable-active-high; - gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&vcc5v0_usb_otg_en_pin>; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - vin-supply = <&vcc5v0_sys>; - }; -}; - -&combphy0 { - /* Used for USB3 */ - phy-supply = <&vcc5v0_usb_host>; - status = "okay"; -}; - -&combphy1 { - /* Used for USB3 */ - phy-supply = <&vcc5v0_usb_otg>; - status = "okay"; -}; - -&combphy2 { - /* used for SATA */ - status = "okay"; -}; - -&cpu0 { - cpu-supply = <&vdd_cpu>; -}; - -&cpu1 { - cpu-supply = <&vdd_cpu>; -}; - -&cpu2 { - cpu-supply = <&vdd_cpu>; -}; - -&cpu3 { - cpu-supply = <&vdd_cpu>; -}; - -&gmac0 { - assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>; - assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>; - assigned-clock-rates = <0>, <125000000>; - clock_in_out = "output"; - phy-handle = <&rgmii_phy0>; - phy-mode = "rgmii"; - phy-supply = <&vcc3v3_sys>; - pinctrl-names = "default"; - pinctrl-0 = <&gmac0_miim - &gmac0_tx_bus2 - &gmac0_rx_bus2 - &gmac0_rgmii_clk - &gmac0_rgmii_bus>; - status = "okay"; - - tx_delay = <0x4f>; - rx_delay = <0x2d>; -}; - -&gpu { - mali-supply = <&vdd_gpu>; - status = "okay"; -}; - -&hdmi { - avdd-0v9-supply = <&vdda0v9_image>; - avdd-1v8-supply = <&vcca1v8_image>; - status = "okay"; -}; - -&hdmi_in { - hdmi_in_vp0: endpoint { - remote-endpoint = <&vp0_out_hdmi>; - }; -}; - -&hdmi_out { - hdmi_out_con: endpoint { - remote-endpoint = <&hdmi_con_in>; - }; -}; - -&hdmi_sound { - status = "okay"; -}; - -&i2c0 { - status = "okay"; - - vdd_cpu: regulator@1c { - compatible = "tcs,tcs4525"; - reg = <0x1c>; - fcs,suspend-voltage-selector = <1>; - regulator-name = "vdd_cpu"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <1150000>; - regulator-ramp-delay = <2300>; - vin-supply = <&vcc3v3_sys>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - rk809: pmic@20 { - compatible = "rockchip,rk809"; - reg = <0x20>; - interrupt-parent = <&gpio0>; - interrupts = ; - assigned-clocks = <&cru I2S1_MCLKOUT_TX>; - assigned-clock-parents = <&cru CLK_I2S1_8CH_TX>; - #clock-cells = <1>; - clock-names = "mclk"; - clocks = <&cru I2S1_MCLKOUT_TX>; - pinctrl-names = "default"; - pinctrl-0 = <&pmic_int_l>, <&i2s1m0_mclk>; - rockchip,system-power-controller; - #sound-dai-cells = <0>; - vcc1-supply = <&vcc3v3_sys>; - vcc2-supply = <&vcc3v3_sys>; - vcc3-supply = <&vcc3v3_sys>; - vcc4-supply = <&vcc3v3_sys>; - vcc5-supply = <&vcc3v3_sys>; - vcc6-supply = <&vcc3v3_sys>; - vcc7-supply = <&vcc3v3_sys>; - vcc8-supply = <&vcc3v3_sys>; - vcc9-supply = <&vcc3v3_sys>; - wakeup-source; - - regulators { - vdd_logic: DCDC_REG1 { - regulator-name = "vdd_logic"; - regulator-always-on; - regulator-boot-on; - regulator-initial-mode = <0x2>; - regulator-min-microvolt = <500000>; - regulator-max-microvolt = <1350000>; - regulator-ramp-delay = <6001>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_gpu: DCDC_REG2 { - regulator-name = "vdd_gpu"; - regulator-always-on; - regulator-initial-mode = <0x2>; - regulator-min-microvolt = <500000>; - regulator-max-microvolt = <1350000>; - regulator-ramp-delay = <6001>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_ddr: DCDC_REG3 { - regulator-name = "vcc_ddr"; - regulator-always-on; - regulator-boot-on; - regulator-initial-mode = <0x2>; - - regulator-state-mem { - regulator-on-in-suspend; - }; - }; - - vdd_npu: DCDC_REG4 { - regulator-name = "vdd_npu"; - regulator-initial-mode = <0x2>; - regulator-min-microvolt = <500000>; - regulator-max-microvolt = <1350000>; - regulator-ramp-delay = <6001>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_1v8: DCDC_REG5 { - regulator-name = "vcc_1v8"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdda0v9_image: LDO_REG1 { - regulator-name = "vdda0v9_image"; - regulator-always-on; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <900000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdda_0v9: LDO_REG2 { - regulator-name = "vdda_0v9"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <900000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdda0v9_pmu: LDO_REG3 { - regulator-name = "vdda0v9_pmu"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <900000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <900000>; - }; - }; - - vccio_acodec: LDO_REG4 { - regulator-name = "vccio_acodec"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vccio_sd: LDO_REG5 { - regulator-name = "vccio_sd"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc3v3_pmu: LDO_REG6 { - regulator-name = "vcc3v3_pmu"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <3300000>; - }; - }; - - vcca_1v8: LDO_REG7 { - regulator-name = "vcca_1v8"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcca1v8_pmu: LDO_REG8 { - regulator-name = "vcca1v8_pmu"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vcca1v8_image: LDO_REG9 { - regulator-name = "vcca1v8_image"; - regulator-always-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_3v3: SWITCH_REG1 { - regulator-name = "vcc_3v3"; - regulator-always-on; - regulator-boot-on; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc3v3_sd: SWITCH_REG2 { - regulator-name = "vcc3v3_sd"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - }; - }; -}; - -&i2s0_8ch { - status = "okay"; -}; - -&i2s1_8ch { - rockchip,trcm-sync-tx-only; - status = "okay"; -}; - -&mdio0 { - rgmii_phy0: ethernet-phy@0 { - compatible = "ethernet-phy-ieee802.3-c22"; - reg = <0x0>; - reset-assert-us = <20000>; - reset-deassert-us = <100000>; - reset-gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; - }; -}; - -&pcie30phy { - status = "okay"; -}; - -&pcie3x2 { - pinctrl-names = "default"; - pinctrl-0 = <&pcie_reset_pin>; - reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>; - vpcie3v3-supply = <&vcc3v3_pcie>; - status = "okay"; -}; - -&pinctrl { - fspi { - fspi_dual_io_pins: fspi-dual-io-pins { - rockchip,pins = - /* fspi_clk */ - <1 RK_PD0 1 &pcfg_pull_none>, - /* fspi_cs0n */ - <1 RK_PD3 1 &pcfg_pull_none>, - /* fspi_d0 */ - <1 RK_PD1 1 &pcfg_pull_none>, - /* fspi_d1 */ - <1 RK_PD2 1 &pcfg_pull_none>; - }; - }; - - ir-receiver { - ir_receiver_pin: ir-receiver-pin { - /* external pullup to VCC3V3_SYS */ - rockchip,pins = <0 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - leds { - led_power_pin: led-power-pin { - rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; - }; - led_work_pin: led-work-pin { - rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - pcie { - pcie_reset_pin: pcie-reset-pin { - rockchip,pins = <2 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>; - }; - vcc3v3_pcie_en_pin: vcc3v3-pcie-en-pin { - rockchip,pins = <4 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - pmic { - pmic_int_l: pmic-int-l { - rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - rk809 { - hp_det_pin: hp-det-pin { - rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - usb { - vcc5v0_usb_host_en_pin: vcc5v0-usb-host-en-pin { - rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; - }; - vcc5v0_usb_otg_en_pin: vcc5v0-usb-dr-en-pin { - rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; -}; - -&pmu_io_domains { - pmuio1-supply = <&vcc3v3_pmu>; - pmuio2-supply = <&vcc3v3_pmu>; - vccio1-supply = <&vccio_acodec>; - vccio2-supply = <&vcc_1v8>; - vccio3-supply = <&vccio_sd>; - vccio4-supply = <&vcc_1v8>; - vccio5-supply = <&vcc_3v3>; - vccio6-supply = <&vcc_3v3>; - vccio7-supply = <&vcc_3v3>; - status = "okay"; -}; - -&saradc { - vref-supply = <&vcca_1v8>; - status = "okay"; -}; - -&sata2 { - status = "okay"; -}; - -&sdhci { - bus-width = <8>; - max-frequency = <200000000>; - non-removable; - pinctrl-names = "default"; - pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe &emmc_rstnout>; - vmmc-supply = <&vcc_3v3>; - vqmmc-supply = <&vcc_1v8>; - status = "okay"; -}; - -&sdmmc0 { - bus-width = <4>; - cap-sd-highspeed; - cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>; - disable-wp; - pinctrl-names = "default"; - pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>; - sd-uhs-sdr50; - vmmc-supply = <&vcc3v3_sd>; - vqmmc-supply = <&vccio_sd>; - status = "okay"; -}; - -&sfc { - /* Dual I/O mode as the D2 pin conflicts with the eMMC */ - pinctrl-0 = <&fspi_dual_io_pins>; - pinctrl-names = "default"; - #address-cells = <1>; - #size-cells = <0>; - status = "okay"; - - flash@0 { - compatible = "jedec,spi-nor"; - reg = <0>; - spi-max-frequency = <100000000>; - spi-rx-bus-width = <2>; - spi-tx-bus-width = <1>; - - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - - partition@0 { - label = "SPL"; - reg = <0x0 0xe0000>; - }; - partition@e0000 { - label = "U-Boot Env"; - reg = <0xe0000 0x20000>; - }; - partition@100000 { - label = "U-Boot"; - reg = <0x100000 0x200000>; - }; - partition@300000 { - label = "splash"; - reg = <0x300000 0x100000>; - }; - partition@400000 { - label = "Filesystem"; - reg = <0x400000 0xc00000>; - }; - }; - }; -}; - -&tsadc { - rockchip,hw-tshut-mode = <1>; - rockchip,hw-tshut-polarity = <0>; - status = "okay"; -}; - -&uart2 { - status = "okay"; -}; - -&usb_host0_ehci { - status = "okay"; -}; - -&usb_host0_ohci { - status = "okay"; -}; - -&usb_host0_xhci { - dr_mode = "host"; - status = "okay"; -}; - -&usb_host1_ehci { - status = "okay"; -}; - -&usb_host1_ohci { - status = "okay"; -}; - -&usb_host1_xhci { - status = "okay"; -}; - -&usb2phy0 { - status = "okay"; -}; - -&usb2phy0_host { - phy-supply = <&vcc5v0_usb_host>; - status = "okay"; -}; - -&usb2phy0_otg { - phy-supply = <&vcc5v0_usb_otg>; - status = "okay"; -}; - -&usb2phy1 { - status = "okay"; -}; - -&usb2phy1_host { - phy-supply = <&vcc5v0_usb_host>; - status = "okay"; -}; - -&usb2phy1_otg { - phy-supply = <&vcc5v0_usb_host>; - status = "okay"; -}; - -&vop { - assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>; - assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>; - status = "okay"; -}; - -&vop_mmu { - status = "okay"; -}; - -&vp0 { - vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 { - reg = ; - remote-endpoint = <&hdmi_in_vp0>; - }; -}; diff --git a/arch/arm/dts/rk3568-pinctrl.dtsi b/arch/arm/dts/rk3568-pinctrl.dtsi deleted file mode 100644 index 0a979bfb63d..00000000000 --- a/arch/arm/dts/rk3568-pinctrl.dtsi +++ /dev/null @@ -1,3214 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (c) 2021 Rockchip Electronics Co., Ltd. - */ - -#include -#include "rockchip-pinconf.dtsi" - -/* - * This file is auto generated by pin2dts tool, please keep these code - * by adding changes at end of this file. - */ -&pinctrl { - acodec { - /omit-if-no-ref/ - acodec_pins: acodec-pins { - rockchip,pins = - /* acodec_adc_sync */ - <1 RK_PB1 5 &pcfg_pull_none>, - /* acodec_adcclk */ - <1 RK_PA1 5 &pcfg_pull_none>, - /* acodec_adcdata */ - <1 RK_PA0 5 &pcfg_pull_none>, - /* acodec_dac_datal */ - <1 RK_PA7 5 &pcfg_pull_none>, - /* acodec_dac_datar */ - <1 RK_PB0 5 &pcfg_pull_none>, - /* acodec_dacclk */ - <1 RK_PA3 5 &pcfg_pull_none>, - /* acodec_dacsync */ - <1 RK_PA5 5 &pcfg_pull_none>; - }; - }; - - audiopwm { - /omit-if-no-ref/ - audiopwm_lout: audiopwm-lout { - rockchip,pins = - /* audiopwm_lout */ - <1 RK_PA0 4 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - audiopwm_loutn: audiopwm-loutn { - rockchip,pins = - /* audiopwm_loutn */ - <1 RK_PA1 6 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - audiopwm_loutp: audiopwm-loutp { - rockchip,pins = - /* audiopwm_loutp */ - <1 RK_PA0 6 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - audiopwm_rout: audiopwm-rout { - rockchip,pins = - /* audiopwm_rout */ - <1 RK_PA1 4 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - audiopwm_routn: audiopwm-routn { - rockchip,pins = - /* audiopwm_routn */ - <1 RK_PA7 4 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - audiopwm_routp: audiopwm-routp { - rockchip,pins = - /* audiopwm_routp */ - <1 RK_PA6 4 &pcfg_pull_none>; - }; - }; - - bt656 { - /omit-if-no-ref/ - bt656m0_pins: bt656m0-pins { - rockchip,pins = - /* bt656_clkm0 */ - <3 RK_PA0 2 &pcfg_pull_none>, - /* bt656_d0m0 */ - <2 RK_PD0 2 &pcfg_pull_none>, - /* bt656_d1m0 */ - <2 RK_PD1 2 &pcfg_pull_none>, - /* bt656_d2m0 */ - <2 RK_PD2 2 &pcfg_pull_none>, - /* bt656_d3m0 */ - <2 RK_PD3 2 &pcfg_pull_none>, - /* bt656_d4m0 */ - <2 RK_PD4 2 &pcfg_pull_none>, - /* bt656_d5m0 */ - <2 RK_PD5 2 &pcfg_pull_none>, - /* bt656_d6m0 */ - <2 RK_PD6 2 &pcfg_pull_none>, - /* bt656_d7m0 */ - <2 RK_PD7 2 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - bt656m1_pins: bt656m1-pins { - rockchip,pins = - /* bt656_clkm1 */ - <4 RK_PB4 5 &pcfg_pull_none>, - /* bt656_d0m1 */ - <3 RK_PC6 5 &pcfg_pull_none>, - /* bt656_d1m1 */ - <3 RK_PC7 5 &pcfg_pull_none>, - /* bt656_d2m1 */ - <3 RK_PD0 5 &pcfg_pull_none>, - /* bt656_d3m1 */ - <3 RK_PD1 5 &pcfg_pull_none>, - /* bt656_d4m1 */ - <3 RK_PD2 5 &pcfg_pull_none>, - /* bt656_d5m1 */ - <3 RK_PD3 5 &pcfg_pull_none>, - /* bt656_d6m1 */ - <3 RK_PD4 5 &pcfg_pull_none>, - /* bt656_d7m1 */ - <3 RK_PD5 5 &pcfg_pull_none>; - }; - }; - - bt1120 { - /omit-if-no-ref/ - bt1120_pins: bt1120-pins { - rockchip,pins = - /* bt1120_clk */ - <3 RK_PA6 2 &pcfg_pull_none>, - /* bt1120_d0 */ - <3 RK_PA1 2 &pcfg_pull_none>, - /* bt1120_d1 */ - <3 RK_PA2 2 &pcfg_pull_none>, - /* bt1120_d2 */ - <3 RK_PA3 2 &pcfg_pull_none>, - /* bt1120_d3 */ - <3 RK_PA4 2 &pcfg_pull_none>, - /* bt1120_d4 */ - <3 RK_PA5 2 &pcfg_pull_none>, - /* bt1120_d5 */ - <3 RK_PA7 2 &pcfg_pull_none>, - /* bt1120_d6 */ - <3 RK_PB0 2 &pcfg_pull_none>, - /* bt1120_d7 */ - <3 RK_PB1 2 &pcfg_pull_none>, - /* bt1120_d8 */ - <3 RK_PB2 2 &pcfg_pull_none>, - /* bt1120_d9 */ - <3 RK_PB3 2 &pcfg_pull_none>, - /* bt1120_d10 */ - <3 RK_PB4 2 &pcfg_pull_none>, - /* bt1120_d11 */ - <3 RK_PB5 2 &pcfg_pull_none>, - /* bt1120_d12 */ - <3 RK_PB6 2 &pcfg_pull_none>, - /* bt1120_d13 */ - <3 RK_PC1 2 &pcfg_pull_none>, - /* bt1120_d14 */ - <3 RK_PC2 2 &pcfg_pull_none>, - /* bt1120_d15 */ - <3 RK_PC3 2 &pcfg_pull_none>; - }; - }; - - cam { - /omit-if-no-ref/ - cam_clkout0: cam-clkout0 { - rockchip,pins = - /* cam_clkout0 */ - <4 RK_PA7 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - cam_clkout1: cam-clkout1 { - rockchip,pins = - /* cam_clkout1 */ - <4 RK_PB0 1 &pcfg_pull_none>; - }; - }; - - can0 { - /omit-if-no-ref/ - can0m0_pins: can0m0-pins { - rockchip,pins = - /* can0_rxm0 */ - <0 RK_PB4 2 &pcfg_pull_none>, - /* can0_txm0 */ - <0 RK_PB3 2 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - can0m1_pins: can0m1-pins { - rockchip,pins = - /* can0_rxm1 */ - <2 RK_PA2 4 &pcfg_pull_none>, - /* can0_txm1 */ - <2 RK_PA1 4 &pcfg_pull_none>; - }; - }; - - can1 { - /omit-if-no-ref/ - can1m0_pins: can1m0-pins { - rockchip,pins = - /* can1_rxm0 */ - <1 RK_PA0 3 &pcfg_pull_none>, - /* can1_txm0 */ - <1 RK_PA1 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - can1m1_pins: can1m1-pins { - rockchip,pins = - /* can1_rxm1 */ - <4 RK_PC2 3 &pcfg_pull_none>, - /* can1_txm1 */ - <4 RK_PC3 3 &pcfg_pull_none>; - }; - }; - - can2 { - /omit-if-no-ref/ - can2m0_pins: can2m0-pins { - rockchip,pins = - /* can2_rxm0 */ - <4 RK_PB4 3 &pcfg_pull_none>, - /* can2_txm0 */ - <4 RK_PB5 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - can2m1_pins: can2m1-pins { - rockchip,pins = - /* can2_rxm1 */ - <2 RK_PB1 4 &pcfg_pull_none>, - /* can2_txm1 */ - <2 RK_PB2 4 &pcfg_pull_none>; - }; - }; - - cif { - /omit-if-no-ref/ - cif_clk: cif-clk { - rockchip,pins = - /* cif_clkout */ - <4 RK_PC0 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - cif_dvp_clk: cif-dvp-clk { - rockchip,pins = - /* cif_clkin */ - <4 RK_PC1 1 &pcfg_pull_none>, - /* cif_href */ - <4 RK_PB6 1 &pcfg_pull_none>, - /* cif_vsync */ - <4 RK_PB7 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - cif_dvp_bus16: cif-dvp-bus16 { - rockchip,pins = - /* cif_d8 */ - <3 RK_PD6 1 &pcfg_pull_none>, - /* cif_d9 */ - <3 RK_PD7 1 &pcfg_pull_none>, - /* cif_d10 */ - <4 RK_PA0 1 &pcfg_pull_none>, - /* cif_d11 */ - <4 RK_PA1 1 &pcfg_pull_none>, - /* cif_d12 */ - <4 RK_PA2 1 &pcfg_pull_none>, - /* cif_d13 */ - <4 RK_PA3 1 &pcfg_pull_none>, - /* cif_d14 */ - <4 RK_PA4 1 &pcfg_pull_none>, - /* cif_d15 */ - <4 RK_PA5 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - cif_dvp_bus8: cif-dvp-bus8 { - rockchip,pins = - /* cif_d0 */ - <3 RK_PC6 1 &pcfg_pull_none>, - /* cif_d1 */ - <3 RK_PC7 1 &pcfg_pull_none>, - /* cif_d2 */ - <3 RK_PD0 1 &pcfg_pull_none>, - /* cif_d3 */ - <3 RK_PD1 1 &pcfg_pull_none>, - /* cif_d4 */ - <3 RK_PD2 1 &pcfg_pull_none>, - /* cif_d5 */ - <3 RK_PD3 1 &pcfg_pull_none>, - /* cif_d6 */ - <3 RK_PD4 1 &pcfg_pull_none>, - /* cif_d7 */ - <3 RK_PD5 1 &pcfg_pull_none>; - }; - }; - - clk32k { - /omit-if-no-ref/ - clk32k_in: clk32k-in { - rockchip,pins = - /* clk32k_in */ - <0 RK_PB0 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - clk32k_out0: clk32k-out0 { - rockchip,pins = - /* clk32k_out0 */ - <0 RK_PB0 2 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - clk32k_out1: clk32k-out1 { - rockchip,pins = - /* clk32k_out1 */ - <2 RK_PC6 1 &pcfg_pull_none>; - }; - }; - - cpu { - /omit-if-no-ref/ - cpu_pins: cpu-pins { - rockchip,pins = - /* cpu_avs */ - <0 RK_PB7 2 &pcfg_pull_none>; - }; - }; - - ebc { - /omit-if-no-ref/ - ebc_extern: ebc-extern { - rockchip,pins = - /* ebc_sdce1 */ - <4 RK_PA7 2 &pcfg_pull_none>, - /* ebc_sdce2 */ - <4 RK_PB0 2 &pcfg_pull_none>, - /* ebc_sdce3 */ - <4 RK_PB1 2 &pcfg_pull_none>, - /* ebc_sdshr */ - <4 RK_PB5 2 &pcfg_pull_none>, - /* ebc_vcom */ - <4 RK_PB2 2 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - ebc_pins: ebc-pins { - rockchip,pins = - /* ebc_gdclk */ - <4 RK_PC0 2 &pcfg_pull_none>, - /* ebc_gdoe */ - <4 RK_PB3 2 &pcfg_pull_none>, - /* ebc_gdsp */ - <4 RK_PB4 2 &pcfg_pull_none>, - /* ebc_sdce0 */ - <4 RK_PA6 2 &pcfg_pull_none>, - /* ebc_sdclk */ - <4 RK_PC1 2 &pcfg_pull_none>, - /* ebc_sddo0 */ - <3 RK_PC6 2 &pcfg_pull_none>, - /* ebc_sddo1 */ - <3 RK_PC7 2 &pcfg_pull_none>, - /* ebc_sddo2 */ - <3 RK_PD0 2 &pcfg_pull_none>, - /* ebc_sddo3 */ - <3 RK_PD1 2 &pcfg_pull_none>, - /* ebc_sddo4 */ - <3 RK_PD2 2 &pcfg_pull_none>, - /* ebc_sddo5 */ - <3 RK_PD3 2 &pcfg_pull_none>, - /* ebc_sddo6 */ - <3 RK_PD4 2 &pcfg_pull_none>, - /* ebc_sddo7 */ - <3 RK_PD5 2 &pcfg_pull_none>, - /* ebc_sddo8 */ - <3 RK_PD6 2 &pcfg_pull_none>, - /* ebc_sddo9 */ - <3 RK_PD7 2 &pcfg_pull_none>, - /* ebc_sddo10 */ - <4 RK_PA0 2 &pcfg_pull_none>, - /* ebc_sddo11 */ - <4 RK_PA1 2 &pcfg_pull_none>, - /* ebc_sddo12 */ - <4 RK_PA2 2 &pcfg_pull_none>, - /* ebc_sddo13 */ - <4 RK_PA3 2 &pcfg_pull_none>, - /* ebc_sddo14 */ - <4 RK_PA4 2 &pcfg_pull_none>, - /* ebc_sddo15 */ - <4 RK_PA5 2 &pcfg_pull_none>, - /* ebc_sdle */ - <4 RK_PB6 2 &pcfg_pull_none>, - /* ebc_sdoe */ - <4 RK_PB7 2 &pcfg_pull_none>; - }; - }; - - edpdp { - /omit-if-no-ref/ - edpdpm0_pins: edpdpm0-pins { - rockchip,pins = - /* edpdp_hpdinm0 */ - <4 RK_PC4 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - edpdpm1_pins: edpdpm1-pins { - rockchip,pins = - /* edpdp_hpdinm1 */ - <0 RK_PC2 2 &pcfg_pull_none>; - }; - }; - - emmc { - /omit-if-no-ref/ - emmc_rstnout: emmc-rstnout { - rockchip,pins = - /* emmc_rstn */ - <1 RK_PC7 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - emmc_bus8: emmc-bus8 { - rockchip,pins = - /* emmc_d0 */ - <1 RK_PB4 1 &pcfg_pull_up_drv_level_2>, - /* emmc_d1 */ - <1 RK_PB5 1 &pcfg_pull_up_drv_level_2>, - /* emmc_d2 */ - <1 RK_PB6 1 &pcfg_pull_up_drv_level_2>, - /* emmc_d3 */ - <1 RK_PB7 1 &pcfg_pull_up_drv_level_2>, - /* emmc_d4 */ - <1 RK_PC0 1 &pcfg_pull_up_drv_level_2>, - /* emmc_d5 */ - <1 RK_PC1 1 &pcfg_pull_up_drv_level_2>, - /* emmc_d6 */ - <1 RK_PC2 1 &pcfg_pull_up_drv_level_2>, - /* emmc_d7 */ - <1 RK_PC3 1 &pcfg_pull_up_drv_level_2>; - }; - - /omit-if-no-ref/ - emmc_clk: emmc-clk { - rockchip,pins = - /* emmc_clkout */ - <1 RK_PC5 1 &pcfg_pull_up_drv_level_2>; - }; - - /omit-if-no-ref/ - emmc_cmd: emmc-cmd { - rockchip,pins = - /* emmc_cmd */ - <1 RK_PC4 1 &pcfg_pull_up_drv_level_2>; - }; - - /omit-if-no-ref/ - emmc_datastrobe: emmc-datastrobe { - rockchip,pins = - /* emmc_datastrobe */ - <1 RK_PC6 1 &pcfg_pull_none>; - }; - }; - - eth0 { - /omit-if-no-ref/ - eth0_pins: eth0-pins { - rockchip,pins = - /* eth0_refclko25m */ - <2 RK_PC1 2 &pcfg_pull_none>; - }; - }; - - eth1 { - /omit-if-no-ref/ - eth1m0_pins: eth1m0-pins { - rockchip,pins = - /* eth1_refclko25mm0 */ - <3 RK_PB0 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - eth1m1_pins: eth1m1-pins { - rockchip,pins = - /* eth1_refclko25mm1 */ - <4 RK_PB3 3 &pcfg_pull_none>; - }; - }; - - flash { - /omit-if-no-ref/ - flash_pins: flash-pins { - rockchip,pins = - /* flash_ale */ - <1 RK_PD0 2 &pcfg_pull_none>, - /* flash_cle */ - <1 RK_PC6 3 &pcfg_pull_none>, - /* flash_cs0n */ - <1 RK_PD3 2 &pcfg_pull_none>, - /* flash_cs1n */ - <1 RK_PD4 2 &pcfg_pull_none>, - /* flash_d0 */ - <1 RK_PB4 2 &pcfg_pull_none>, - /* flash_d1 */ - <1 RK_PB5 2 &pcfg_pull_none>, - /* flash_d2 */ - <1 RK_PB6 2 &pcfg_pull_none>, - /* flash_d3 */ - <1 RK_PB7 2 &pcfg_pull_none>, - /* flash_d4 */ - <1 RK_PC0 2 &pcfg_pull_none>, - /* flash_d5 */ - <1 RK_PC1 2 &pcfg_pull_none>, - /* flash_d6 */ - <1 RK_PC2 2 &pcfg_pull_none>, - /* flash_d7 */ - <1 RK_PC3 2 &pcfg_pull_none>, - /* flash_dqs */ - <1 RK_PC5 2 &pcfg_pull_none>, - /* flash_rdn */ - <1 RK_PD2 2 &pcfg_pull_none>, - /* flash_rdy */ - <1 RK_PD1 2 &pcfg_pull_none>, - /* flash_volsel */ - <0 RK_PA7 1 &pcfg_pull_none>, - /* flash_wpn */ - <1 RK_PC7 3 &pcfg_pull_none>, - /* flash_wrn */ - <1 RK_PC4 2 &pcfg_pull_none>; - }; - }; - - fspi { - /omit-if-no-ref/ - fspi_pins: fspi-pins { - rockchip,pins = - /* fspi_clk */ - <1 RK_PD0 1 &pcfg_pull_none>, - /* fspi_cs0n */ - <1 RK_PD3 1 &pcfg_pull_none>, - /* fspi_d0 */ - <1 RK_PD1 1 &pcfg_pull_none>, - /* fspi_d1 */ - <1 RK_PD2 1 &pcfg_pull_none>, - /* fspi_d2 */ - <1 RK_PC7 2 &pcfg_pull_none>, - /* fspi_d3 */ - <1 RK_PD4 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - fspi_cs1: fspi-cs1 { - rockchip,pins = - /* fspi_cs1n */ - <1 RK_PC6 2 &pcfg_pull_up>; - }; - }; - - gmac0 { - /omit-if-no-ref/ - gmac0_miim: gmac0-miim { - rockchip,pins = - /* gmac0_mdc */ - <2 RK_PC3 2 &pcfg_pull_none>, - /* gmac0_mdio */ - <2 RK_PC4 2 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - gmac0_clkinout: gmac0-clkinout { - rockchip,pins = - /* gmac0_mclkinout */ - <2 RK_PC2 2 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - gmac0_rx_er: gmac0-rx-er { - rockchip,pins = - /* gmac0_rxer */ - <2 RK_PC5 2 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - gmac0_rx_bus2: gmac0-rx-bus2 { - rockchip,pins = - /* gmac0_rxd0 */ - <2 RK_PB6 1 &pcfg_pull_none>, - /* gmac0_rxd1 */ - <2 RK_PB7 2 &pcfg_pull_none>, - /* gmac0_rxdvcrs */ - <2 RK_PC0 2 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - gmac0_tx_bus2: gmac0-tx-bus2 { - rockchip,pins = - /* gmac0_txd0 */ - <2 RK_PB3 1 &pcfg_pull_none_drv_level_2>, - /* gmac0_txd1 */ - <2 RK_PB4 1 &pcfg_pull_none_drv_level_2>, - /* gmac0_txen */ - <2 RK_PB5 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - gmac0_rgmii_clk: gmac0-rgmii-clk { - rockchip,pins = - /* gmac0_rxclk */ - <2 RK_PA5 2 &pcfg_pull_none>, - /* gmac0_txclk */ - <2 RK_PB0 2 &pcfg_pull_none_drv_level_1>; - }; - - /omit-if-no-ref/ - gmac0_rgmii_bus: gmac0-rgmii-bus { - rockchip,pins = - /* gmac0_rxd2 */ - <2 RK_PA3 2 &pcfg_pull_none>, - /* gmac0_rxd3 */ - <2 RK_PA4 2 &pcfg_pull_none>, - /* gmac0_txd2 */ - <2 RK_PA6 2 &pcfg_pull_none_drv_level_2>, - /* gmac0_txd3 */ - <2 RK_PA7 2 &pcfg_pull_none_drv_level_2>; - }; - }; - - gmac1 { - /omit-if-no-ref/ - gmac1m0_miim: gmac1m0-miim { - rockchip,pins = - /* gmac1_mdcm0 */ - <3 RK_PC4 3 &pcfg_pull_none>, - /* gmac1_mdiom0 */ - <3 RK_PC5 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - gmac1m0_clkinout: gmac1m0-clkinout { - rockchip,pins = - /* gmac1_mclkinoutm0 */ - <3 RK_PC0 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - gmac1m0_rx_er: gmac1m0-rx-er { - rockchip,pins = - /* gmac1_rxerm0 */ - <3 RK_PB4 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - gmac1m0_rx_bus2: gmac1m0-rx-bus2 { - rockchip,pins = - /* gmac1_rxd0m0 */ - <3 RK_PB1 3 &pcfg_pull_none>, - /* gmac1_rxd1m0 */ - <3 RK_PB2 3 &pcfg_pull_none>, - /* gmac1_rxdvcrsm0 */ - <3 RK_PB3 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - gmac1m0_tx_bus2: gmac1m0-tx-bus2 { - rockchip,pins = - /* gmac1_txd0m0 */ - <3 RK_PB5 3 &pcfg_pull_none_drv_level_2>, - /* gmac1_txd1m0 */ - <3 RK_PB6 3 &pcfg_pull_none_drv_level_2>, - /* gmac1_txenm0 */ - <3 RK_PB7 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - gmac1m0_rgmii_clk: gmac1m0-rgmii-clk { - rockchip,pins = - /* gmac1_rxclkm0 */ - <3 RK_PA7 3 &pcfg_pull_none>, - /* gmac1_txclkm0 */ - <3 RK_PA6 3 &pcfg_pull_none_drv_level_1>; - }; - - /omit-if-no-ref/ - gmac1m0_rgmii_bus: gmac1m0-rgmii-bus { - rockchip,pins = - /* gmac1_rxd2m0 */ - <3 RK_PA4 3 &pcfg_pull_none>, - /* gmac1_rxd3m0 */ - <3 RK_PA5 3 &pcfg_pull_none>, - /* gmac1_txd2m0 */ - <3 RK_PA2 3 &pcfg_pull_none_drv_level_2>, - /* gmac1_txd3m0 */ - <3 RK_PA3 3 &pcfg_pull_none_drv_level_2>; - }; - - /omit-if-no-ref/ - gmac1m1_miim: gmac1m1-miim { - rockchip,pins = - /* gmac1_mdcm1 */ - <4 RK_PB6 3 &pcfg_pull_none>, - /* gmac1_mdiom1 */ - <4 RK_PB7 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - gmac1m1_clkinout: gmac1m1-clkinout { - rockchip,pins = - /* gmac1_mclkinoutm1 */ - <4 RK_PC1 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - gmac1m1_rx_er: gmac1m1-rx-er { - rockchip,pins = - /* gmac1_rxerm1 */ - <4 RK_PB2 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - gmac1m1_rx_bus2: gmac1m1-rx-bus2 { - rockchip,pins = - /* gmac1_rxd0m1 */ - <4 RK_PA7 3 &pcfg_pull_none>, - /* gmac1_rxd1m1 */ - <4 RK_PB0 3 &pcfg_pull_none>, - /* gmac1_rxdvcrsm1 */ - <4 RK_PB1 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - gmac1m1_tx_bus2: gmac1m1-tx-bus2 { - rockchip,pins = - /* gmac1_txd0m1 */ - <4 RK_PA4 3 &pcfg_pull_none_drv_level_2>, - /* gmac1_txd1m1 */ - <4 RK_PA5 3 &pcfg_pull_none_drv_level_2>, - /* gmac1_txenm1 */ - <4 RK_PA6 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - gmac1m1_rgmii_clk: gmac1m1-rgmii-clk { - rockchip,pins = - /* gmac1_rxclkm1 */ - <4 RK_PA3 3 &pcfg_pull_none>, - /* gmac1_txclkm1 */ - <4 RK_PA0 3 &pcfg_pull_none_drv_level_1>; - }; - - /omit-if-no-ref/ - gmac1m1_rgmii_bus: gmac1m1-rgmii-bus { - rockchip,pins = - /* gmac1_rxd2m1 */ - <4 RK_PA1 3 &pcfg_pull_none>, - /* gmac1_rxd3m1 */ - <4 RK_PA2 3 &pcfg_pull_none>, - /* gmac1_txd2m1 */ - <3 RK_PD6 3 &pcfg_pull_none_drv_level_2>, - /* gmac1_txd3m1 */ - <3 RK_PD7 3 &pcfg_pull_none_drv_level_2>; - }; - }; - - gpu { - /omit-if-no-ref/ - gpu_pins: gpu-pins { - rockchip,pins = - /* gpu_avs */ - <0 RK_PC0 2 &pcfg_pull_none>, - /* gpu_pwren */ - <0 RK_PA6 4 &pcfg_pull_none>; - }; - }; - - hdmitx { - /omit-if-no-ref/ - hdmitxm0_cec: hdmitxm0-cec { - rockchip,pins = - /* hdmitxm0_cec */ - <4 RK_PD1 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - hdmitxm1_cec: hdmitxm1-cec { - rockchip,pins = - /* hdmitxm1_cec */ - <0 RK_PC7 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - hdmitx_scl: hdmitx-scl { - rockchip,pins = - /* hdmitx_scl */ - <4 RK_PC7 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - hdmitx_sda: hdmitx-sda { - rockchip,pins = - /* hdmitx_sda */ - <4 RK_PD0 1 &pcfg_pull_none>; - }; - }; - - i2c0 { - /omit-if-no-ref/ - i2c0_xfer: i2c0-xfer { - rockchip,pins = - /* i2c0_scl */ - <0 RK_PB1 1 &pcfg_pull_none_smt>, - /* i2c0_sda */ - <0 RK_PB2 1 &pcfg_pull_none_smt>; - }; - }; - - i2c1 { - /omit-if-no-ref/ - i2c1_xfer: i2c1-xfer { - rockchip,pins = - /* i2c1_scl */ - <0 RK_PB3 1 &pcfg_pull_none_smt>, - /* i2c1_sda */ - <0 RK_PB4 1 &pcfg_pull_none_smt>; - }; - }; - - i2c2 { - /omit-if-no-ref/ - i2c2m0_xfer: i2c2m0-xfer { - rockchip,pins = - /* i2c2_sclm0 */ - <0 RK_PB5 1 &pcfg_pull_none_smt>, - /* i2c2_sdam0 */ - <0 RK_PB6 1 &pcfg_pull_none_smt>; - }; - - /omit-if-no-ref/ - i2c2m1_xfer: i2c2m1-xfer { - rockchip,pins = - /* i2c2_sclm1 */ - <4 RK_PB5 1 &pcfg_pull_none_smt>, - /* i2c2_sdam1 */ - <4 RK_PB4 1 &pcfg_pull_none_smt>; - }; - }; - - i2c3 { - /omit-if-no-ref/ - i2c3m0_xfer: i2c3m0-xfer { - rockchip,pins = - /* i2c3_sclm0 */ - <1 RK_PA1 1 &pcfg_pull_none_smt>, - /* i2c3_sdam0 */ - <1 RK_PA0 1 &pcfg_pull_none_smt>; - }; - - /omit-if-no-ref/ - i2c3m1_xfer: i2c3m1-xfer { - rockchip,pins = - /* i2c3_sclm1 */ - <3 RK_PB5 4 &pcfg_pull_none_smt>, - /* i2c3_sdam1 */ - <3 RK_PB6 4 &pcfg_pull_none_smt>; - }; - }; - - i2c4 { - /omit-if-no-ref/ - i2c4m0_xfer: i2c4m0-xfer { - rockchip,pins = - /* i2c4_sclm0 */ - <4 RK_PB3 1 &pcfg_pull_none_smt>, - /* i2c4_sdam0 */ - <4 RK_PB2 1 &pcfg_pull_none_smt>; - }; - - /omit-if-no-ref/ - i2c4m1_xfer: i2c4m1-xfer { - rockchip,pins = - /* i2c4_sclm1 */ - <2 RK_PB2 2 &pcfg_pull_none_smt>, - /* i2c4_sdam1 */ - <2 RK_PB1 2 &pcfg_pull_none_smt>; - }; - }; - - i2c5 { - /omit-if-no-ref/ - i2c5m0_xfer: i2c5m0-xfer { - rockchip,pins = - /* i2c5_sclm0 */ - <3 RK_PB3 4 &pcfg_pull_none_smt>, - /* i2c5_sdam0 */ - <3 RK_PB4 4 &pcfg_pull_none_smt>; - }; - - /omit-if-no-ref/ - i2c5m1_xfer: i2c5m1-xfer { - rockchip,pins = - /* i2c5_sclm1 */ - <4 RK_PC7 2 &pcfg_pull_none_smt>, - /* i2c5_sdam1 */ - <4 RK_PD0 2 &pcfg_pull_none_smt>; - }; - }; - - i2s1 { - /omit-if-no-ref/ - i2s1m0_lrckrx: i2s1m0-lrckrx { - rockchip,pins = - /* i2s1m0_lrckrx */ - <1 RK_PA6 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s1m0_lrcktx: i2s1m0-lrcktx { - rockchip,pins = - /* i2s1m0_lrcktx */ - <1 RK_PA5 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s1m0_mclk: i2s1m0-mclk { - rockchip,pins = - /* i2s1m0_mclk */ - <1 RK_PA2 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s1m0_sclkrx: i2s1m0-sclkrx { - rockchip,pins = - /* i2s1m0_sclkrx */ - <1 RK_PA4 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s1m0_sclktx: i2s1m0-sclktx { - rockchip,pins = - /* i2s1m0_sclktx */ - <1 RK_PA3 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s1m0_sdi0: i2s1m0-sdi0 { - rockchip,pins = - /* i2s1m0_sdi0 */ - <1 RK_PB3 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s1m0_sdi1: i2s1m0-sdi1 { - rockchip,pins = - /* i2s1m0_sdi1 */ - <1 RK_PB2 2 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s1m0_sdi2: i2s1m0-sdi2 { - rockchip,pins = - /* i2s1m0_sdi2 */ - <1 RK_PB1 2 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s1m0_sdi3: i2s1m0-sdi3 { - rockchip,pins = - /* i2s1m0_sdi3 */ - <1 RK_PB0 2 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s1m0_sdo0: i2s1m0-sdo0 { - rockchip,pins = - /* i2s1m0_sdo0 */ - <1 RK_PA7 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s1m0_sdo1: i2s1m0-sdo1 { - rockchip,pins = - /* i2s1m0_sdo1 */ - <1 RK_PB0 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s1m0_sdo2: i2s1m0-sdo2 { - rockchip,pins = - /* i2s1m0_sdo2 */ - <1 RK_PB1 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s1m0_sdo3: i2s1m0-sdo3 { - rockchip,pins = - /* i2s1m0_sdo3 */ - <1 RK_PB2 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s1m1_lrckrx: i2s1m1-lrckrx { - rockchip,pins = - /* i2s1m1_lrckrx */ - <4 RK_PA7 5 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s1m1_lrcktx: i2s1m1-lrcktx { - rockchip,pins = - /* i2s1m1_lrcktx */ - <3 RK_PD0 4 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s1m1_mclk: i2s1m1-mclk { - rockchip,pins = - /* i2s1m1_mclk */ - <3 RK_PC6 4 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s1m1_sclkrx: i2s1m1-sclkrx { - rockchip,pins = - /* i2s1m1_sclkrx */ - <4 RK_PA6 5 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s1m1_sclktx: i2s1m1-sclktx { - rockchip,pins = - /* i2s1m1_sclktx */ - <3 RK_PC7 4 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s1m1_sdi0: i2s1m1-sdi0 { - rockchip,pins = - /* i2s1m1_sdi0 */ - <3 RK_PD2 4 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s1m1_sdi1: i2s1m1-sdi1 { - rockchip,pins = - /* i2s1m1_sdi1 */ - <3 RK_PD3 4 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s1m1_sdi2: i2s1m1-sdi2 { - rockchip,pins = - /* i2s1m1_sdi2 */ - <3 RK_PD4 4 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s1m1_sdi3: i2s1m1-sdi3 { - rockchip,pins = - /* i2s1m1_sdi3 */ - <3 RK_PD5 4 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s1m1_sdo0: i2s1m1-sdo0 { - rockchip,pins = - /* i2s1m1_sdo0 */ - <3 RK_PD1 4 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s1m1_sdo1: i2s1m1-sdo1 { - rockchip,pins = - /* i2s1m1_sdo1 */ - <4 RK_PB0 5 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s1m1_sdo2: i2s1m1-sdo2 { - rockchip,pins = - /* i2s1m1_sdo2 */ - <4 RK_PB1 4 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s1m1_sdo3: i2s1m1-sdo3 { - rockchip,pins = - /* i2s1m1_sdo3 */ - <4 RK_PB5 4 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s1m2_lrckrx: i2s1m2-lrckrx { - rockchip,pins = - /* i2s1m2_lrckrx */ - <3 RK_PC5 5 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s1m2_lrcktx: i2s1m2-lrcktx { - rockchip,pins = - /* i2s1m2_lrcktx */ - <2 RK_PD2 5 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s1m2_mclk: i2s1m2-mclk { - rockchip,pins = - /* i2s1m2_mclk */ - <2 RK_PD0 5 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s1m2_sclkrx: i2s1m2-sclkrx { - rockchip,pins = - /* i2s1m2_sclkrx */ - <3 RK_PC3 5 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s1m2_sclktx: i2s1m2-sclktx { - rockchip,pins = - /* i2s1m2_sclktx */ - <2 RK_PD1 5 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s1m2_sdi0: i2s1m2-sdi0 { - rockchip,pins = - /* i2s1m2_sdi0 */ - <2 RK_PD3 5 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s1m2_sdi1: i2s1m2-sdi1 { - rockchip,pins = - /* i2s1m2_sdi1 */ - <2 RK_PD4 5 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s1m2_sdi2: i2s1m2-sdi2 { - rockchip,pins = - /* i2s1m2_sdi2 */ - <2 RK_PD5 5 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s1m2_sdi3: i2s1m2-sdi3 { - rockchip,pins = - /* i2s1m2_sdi3 */ - <2 RK_PD6 5 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s1m2_sdo0: i2s1m2-sdo0 { - rockchip,pins = - /* i2s1m2_sdo0 */ - <2 RK_PD7 5 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s1m2_sdo1: i2s1m2-sdo1 { - rockchip,pins = - /* i2s1m2_sdo1 */ - <3 RK_PA0 5 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s1m2_sdo2: i2s1m2-sdo2 { - rockchip,pins = - /* i2s1m2_sdo2 */ - <3 RK_PC1 5 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s1m2_sdo3: i2s1m2-sdo3 { - rockchip,pins = - /* i2s1m2_sdo3 */ - <3 RK_PC2 5 &pcfg_pull_none>; - }; - }; - - i2s2 { - /omit-if-no-ref/ - i2s2m0_lrckrx: i2s2m0-lrckrx { - rockchip,pins = - /* i2s2m0_lrckrx */ - <2 RK_PC0 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s2m0_lrcktx: i2s2m0-lrcktx { - rockchip,pins = - /* i2s2m0_lrcktx */ - <2 RK_PC3 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s2m0_mclk: i2s2m0-mclk { - rockchip,pins = - /* i2s2m0_mclk */ - <2 RK_PC1 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s2m0_sclkrx: i2s2m0-sclkrx { - rockchip,pins = - /* i2s2m0_sclkrx */ - <2 RK_PB7 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s2m0_sclktx: i2s2m0-sclktx { - rockchip,pins = - /* i2s2m0_sclktx */ - <2 RK_PC2 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s2m0_sdi: i2s2m0-sdi { - rockchip,pins = - /* i2s2m0_sdi */ - <2 RK_PC5 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s2m0_sdo: i2s2m0-sdo { - rockchip,pins = - /* i2s2m0_sdo */ - <2 RK_PC4 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s2m1_lrckrx: i2s2m1-lrckrx { - rockchip,pins = - /* i2s2m1_lrckrx */ - <4 RK_PA5 5 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s2m1_lrcktx: i2s2m1-lrcktx { - rockchip,pins = - /* i2s2m1_lrcktx */ - <4 RK_PA4 5 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s2m1_mclk: i2s2m1-mclk { - rockchip,pins = - /* i2s2m1_mclk */ - <4 RK_PB6 5 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s2m1_sclkrx: i2s2m1-sclkrx { - rockchip,pins = - /* i2s2m1_sclkrx */ - <4 RK_PC1 5 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s2m1_sclktx: i2s2m1-sclktx { - rockchip,pins = - /* i2s2m1_sclktx */ - <4 RK_PB7 4 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s2m1_sdi: i2s2m1-sdi { - rockchip,pins = - /* i2s2m1_sdi */ - <4 RK_PB2 5 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s2m1_sdo: i2s2m1-sdo { - rockchip,pins = - /* i2s2m1_sdo */ - <4 RK_PB3 5 &pcfg_pull_none>; - }; - }; - - i2s3 { - /omit-if-no-ref/ - i2s3m0_lrck: i2s3m0-lrck { - rockchip,pins = - /* i2s3m0_lrck */ - <3 RK_PA4 4 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s3m0_mclk: i2s3m0-mclk { - rockchip,pins = - /* i2s3m0_mclk */ - <3 RK_PA2 4 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s3m0_sclk: i2s3m0-sclk { - rockchip,pins = - /* i2s3m0_sclk */ - <3 RK_PA3 4 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s3m0_sdi: i2s3m0-sdi { - rockchip,pins = - /* i2s3m0_sdi */ - <3 RK_PA6 4 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s3m0_sdo: i2s3m0-sdo { - rockchip,pins = - /* i2s3m0_sdo */ - <3 RK_PA5 4 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s3m1_lrck: i2s3m1-lrck { - rockchip,pins = - /* i2s3m1_lrck */ - <4 RK_PC4 5 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s3m1_mclk: i2s3m1-mclk { - rockchip,pins = - /* i2s3m1_mclk */ - <4 RK_PC2 5 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s3m1_sclk: i2s3m1-sclk { - rockchip,pins = - /* i2s3m1_sclk */ - <4 RK_PC3 5 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s3m1_sdi: i2s3m1-sdi { - rockchip,pins = - /* i2s3m1_sdi */ - <4 RK_PC6 5 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s3m1_sdo: i2s3m1-sdo { - rockchip,pins = - /* i2s3m1_sdo */ - <4 RK_PC5 5 &pcfg_pull_none>; - }; - }; - - isp { - /omit-if-no-ref/ - isp_pins: isp-pins { - rockchip,pins = - /* isp_flashtrigin */ - <4 RK_PB4 4 &pcfg_pull_none>, - /* isp_flashtrigout */ - <4 RK_PA6 1 &pcfg_pull_none>, - /* isp_prelighttrig */ - <4 RK_PB1 1 &pcfg_pull_none>; - }; - }; - - jtag { - /omit-if-no-ref/ - jtag_pins: jtag-pins { - rockchip,pins = - /* jtag_tck */ - <1 RK_PD7 2 &pcfg_pull_none>, - /* jtag_tms */ - <2 RK_PA0 2 &pcfg_pull_none>; - }; - }; - - lcdc { - /omit-if-no-ref/ - lcdc_ctl: lcdc-ctl { - rockchip,pins = - /* lcdc_clk */ - <3 RK_PA0 1 &pcfg_pull_none>, - /* lcdc_d0 */ - <2 RK_PD0 1 &pcfg_pull_none>, - /* lcdc_d1 */ - <2 RK_PD1 1 &pcfg_pull_none>, - /* lcdc_d2 */ - <2 RK_PD2 1 &pcfg_pull_none>, - /* lcdc_d3 */ - <2 RK_PD3 1 &pcfg_pull_none>, - /* lcdc_d4 */ - <2 RK_PD4 1 &pcfg_pull_none>, - /* lcdc_d5 */ - <2 RK_PD5 1 &pcfg_pull_none>, - /* lcdc_d6 */ - <2 RK_PD6 1 &pcfg_pull_none>, - /* lcdc_d7 */ - <2 RK_PD7 1 &pcfg_pull_none>, - /* lcdc_d8 */ - <3 RK_PA1 1 &pcfg_pull_none>, - /* lcdc_d9 */ - <3 RK_PA2 1 &pcfg_pull_none>, - /* lcdc_d10 */ - <3 RK_PA3 1 &pcfg_pull_none>, - /* lcdc_d11 */ - <3 RK_PA4 1 &pcfg_pull_none>, - /* lcdc_d12 */ - <3 RK_PA5 1 &pcfg_pull_none>, - /* lcdc_d13 */ - <3 RK_PA6 1 &pcfg_pull_none>, - /* lcdc_d14 */ - <3 RK_PA7 1 &pcfg_pull_none>, - /* lcdc_d15 */ - <3 RK_PB0 1 &pcfg_pull_none>, - /* lcdc_d16 */ - <3 RK_PB1 1 &pcfg_pull_none>, - /* lcdc_d17 */ - <3 RK_PB2 1 &pcfg_pull_none>, - /* lcdc_d18 */ - <3 RK_PB3 1 &pcfg_pull_none>, - /* lcdc_d19 */ - <3 RK_PB4 1 &pcfg_pull_none>, - /* lcdc_d20 */ - <3 RK_PB5 1 &pcfg_pull_none>, - /* lcdc_d21 */ - <3 RK_PB6 1 &pcfg_pull_none>, - /* lcdc_d22 */ - <3 RK_PB7 1 &pcfg_pull_none>, - /* lcdc_d23 */ - <3 RK_PC0 1 &pcfg_pull_none>, - /* lcdc_den */ - <3 RK_PC3 1 &pcfg_pull_none>, - /* lcdc_hsync */ - <3 RK_PC1 1 &pcfg_pull_none>, - /* lcdc_vsync */ - <3 RK_PC2 1 &pcfg_pull_none>; - }; - }; - - mcu { - /omit-if-no-ref/ - mcu_pins: mcu-pins { - rockchip,pins = - /* mcu_jtagtck */ - <0 RK_PB4 4 &pcfg_pull_none>, - /* mcu_jtagtdi */ - <0 RK_PC1 4 &pcfg_pull_none>, - /* mcu_jtagtdo */ - <0 RK_PB3 4 &pcfg_pull_none>, - /* mcu_jtagtms */ - <0 RK_PC2 4 &pcfg_pull_none>, - /* mcu_jtagtrstn */ - <0 RK_PC3 4 &pcfg_pull_none>; - }; - }; - - npu { - /omit-if-no-ref/ - npu_pins: npu-pins { - rockchip,pins = - /* npu_avs */ - <0 RK_PC1 2 &pcfg_pull_none>; - }; - }; - - pcie20 { - /omit-if-no-ref/ - pcie20m0_pins: pcie20m0-pins { - rockchip,pins = - /* pcie20_clkreqnm0 */ - <0 RK_PA5 3 &pcfg_pull_none>, - /* pcie20_perstnm0 */ - <0 RK_PB6 3 &pcfg_pull_none>, - /* pcie20_wakenm0 */ - <0 RK_PB5 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pcie20m1_pins: pcie20m1-pins { - rockchip,pins = - /* pcie20_clkreqnm1 */ - <2 RK_PD0 4 &pcfg_pull_none>, - /* pcie20_perstnm1 */ - <3 RK_PC1 4 &pcfg_pull_none>, - /* pcie20_wakenm1 */ - <2 RK_PD1 4 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pcie20m2_pins: pcie20m2-pins { - rockchip,pins = - /* pcie20_clkreqnm2 */ - <1 RK_PB0 4 &pcfg_pull_none>, - /* pcie20_perstnm2 */ - <1 RK_PB2 4 &pcfg_pull_none>, - /* pcie20_wakenm2 */ - <1 RK_PB1 4 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pcie20_buttonrstn: pcie20-buttonrstn { - rockchip,pins = - /* pcie20_buttonrstn */ - <0 RK_PB4 3 &pcfg_pull_none>; - }; - }; - - pcie30x1 { - /omit-if-no-ref/ - pcie30x1m0_pins: pcie30x1m0-pins { - rockchip,pins = - /* pcie30x1_clkreqnm0 */ - <0 RK_PA4 3 &pcfg_pull_none>, - /* pcie30x1_perstnm0 */ - <0 RK_PC3 3 &pcfg_pull_none>, - /* pcie30x1_wakenm0 */ - <0 RK_PC2 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pcie30x1m1_pins: pcie30x1m1-pins { - rockchip,pins = - /* pcie30x1_clkreqnm1 */ - <2 RK_PD2 4 &pcfg_pull_none>, - /* pcie30x1_perstnm1 */ - <3 RK_PA1 4 &pcfg_pull_none>, - /* pcie30x1_wakenm1 */ - <2 RK_PD3 4 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pcie30x1m2_pins: pcie30x1m2-pins { - rockchip,pins = - /* pcie30x1_clkreqnm2 */ - <1 RK_PA5 4 &pcfg_pull_none>, - /* pcie30x1_perstnm2 */ - <1 RK_PA2 4 &pcfg_pull_none>, - /* pcie30x1_wakenm2 */ - <1 RK_PA3 4 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pcie30x1_buttonrstn: pcie30x1-buttonrstn { - rockchip,pins = - /* pcie30x1_buttonrstn */ - <0 RK_PB3 3 &pcfg_pull_none>; - }; - }; - - pcie30x2 { - /omit-if-no-ref/ - pcie30x2m0_pins: pcie30x2m0-pins { - rockchip,pins = - /* pcie30x2_clkreqnm0 */ - <0 RK_PA6 2 &pcfg_pull_none>, - /* pcie30x2_perstnm0 */ - <0 RK_PC6 3 &pcfg_pull_none>, - /* pcie30x2_wakenm0 */ - <0 RK_PC5 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pcie30x2m1_pins: pcie30x2m1-pins { - rockchip,pins = - /* pcie30x2_clkreqnm1 */ - <2 RK_PD4 4 &pcfg_pull_none>, - /* pcie30x2_perstnm1 */ - <2 RK_PD6 4 &pcfg_pull_none>, - /* pcie30x2_wakenm1 */ - <2 RK_PD5 4 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pcie30x2m2_pins: pcie30x2m2-pins { - rockchip,pins = - /* pcie30x2_clkreqnm2 */ - <4 RK_PC2 4 &pcfg_pull_none>, - /* pcie30x2_perstnm2 */ - <4 RK_PC4 4 &pcfg_pull_none>, - /* pcie30x2_wakenm2 */ - <4 RK_PC3 4 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pcie30x2_buttonrstn: pcie30x2-buttonrstn { - rockchip,pins = - /* pcie30x2_buttonrstn */ - <0 RK_PB0 3 &pcfg_pull_none>; - }; - }; - - pdm { - /omit-if-no-ref/ - pdmm0_clk: pdmm0-clk { - rockchip,pins = - /* pdm_clk0m0 */ - <1 RK_PA6 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pdmm0_clk1: pdmm0-clk1 { - rockchip,pins = - /* pdmm0_clk1 */ - <1 RK_PA4 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pdmm0_sdi0: pdmm0-sdi0 { - rockchip,pins = - /* pdmm0_sdi0 */ - <1 RK_PB3 2 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pdmm0_sdi1: pdmm0-sdi1 { - rockchip,pins = - /* pdmm0_sdi1 */ - <1 RK_PB2 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pdmm0_sdi2: pdmm0-sdi2 { - rockchip,pins = - /* pdmm0_sdi2 */ - <1 RK_PB1 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pdmm0_sdi3: pdmm0-sdi3 { - rockchip,pins = - /* pdmm0_sdi3 */ - <1 RK_PB0 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pdmm1_clk: pdmm1-clk { - rockchip,pins = - /* pdm_clk0m1 */ - <3 RK_PD6 5 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pdmm1_clk1: pdmm1-clk1 { - rockchip,pins = - /* pdmm1_clk1 */ - <4 RK_PA0 4 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pdmm1_sdi0: pdmm1-sdi0 { - rockchip,pins = - /* pdmm1_sdi0 */ - <3 RK_PD7 5 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pdmm1_sdi1: pdmm1-sdi1 { - rockchip,pins = - /* pdmm1_sdi1 */ - <4 RK_PA1 4 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pdmm1_sdi2: pdmm1-sdi2 { - rockchip,pins = - /* pdmm1_sdi2 */ - <4 RK_PA2 5 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pdmm1_sdi3: pdmm1-sdi3 { - rockchip,pins = - /* pdmm1_sdi3 */ - <4 RK_PA3 5 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pdmm2_clk1: pdmm2-clk1 { - rockchip,pins = - /* pdmm2_clk1 */ - <3 RK_PC4 5 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pdmm2_sdi0: pdmm2-sdi0 { - rockchip,pins = - /* pdmm2_sdi0 */ - <3 RK_PB3 5 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pdmm2_sdi1: pdmm2-sdi1 { - rockchip,pins = - /* pdmm2_sdi1 */ - <3 RK_PB4 5 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pdmm2_sdi2: pdmm2-sdi2 { - rockchip,pins = - /* pdmm2_sdi2 */ - <3 RK_PB7 5 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pdmm2_sdi3: pdmm2-sdi3 { - rockchip,pins = - /* pdmm2_sdi3 */ - <3 RK_PC0 5 &pcfg_pull_none>; - }; - }; - - pmic { - /omit-if-no-ref/ - pmic_pins: pmic-pins { - rockchip,pins = - /* pmic_sleep */ - <0 RK_PA2 1 &pcfg_pull_none>; - }; - }; - - pmu { - /omit-if-no-ref/ - pmu_pins: pmu-pins { - rockchip,pins = - /* pmu_debug0 */ - <0 RK_PA5 4 &pcfg_pull_none>, - /* pmu_debug1 */ - <0 RK_PA6 3 &pcfg_pull_none>, - /* pmu_debug2 */ - <0 RK_PC4 4 &pcfg_pull_none>, - /* pmu_debug3 */ - <0 RK_PC5 4 &pcfg_pull_none>, - /* pmu_debug4 */ - <0 RK_PC6 4 &pcfg_pull_none>, - /* pmu_debug5 */ - <0 RK_PC7 4 &pcfg_pull_none>; - }; - }; - - pwm0 { - /omit-if-no-ref/ - pwm0m0_pins: pwm0m0-pins { - rockchip,pins = - /* pwm0_m0 */ - <0 RK_PB7 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pwm0m1_pins: pwm0m1-pins { - rockchip,pins = - /* pwm0_m1 */ - <0 RK_PC7 2 &pcfg_pull_none>; - }; - }; - - pwm1 { - /omit-if-no-ref/ - pwm1m0_pins: pwm1m0-pins { - rockchip,pins = - /* pwm1_m0 */ - <0 RK_PC0 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pwm1m1_pins: pwm1m1-pins { - rockchip,pins = - /* pwm1_m1 */ - <0 RK_PB5 4 &pcfg_pull_none>; - }; - }; - - pwm2 { - /omit-if-no-ref/ - pwm2m0_pins: pwm2m0-pins { - rockchip,pins = - /* pwm2_m0 */ - <0 RK_PC1 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pwm2m1_pins: pwm2m1-pins { - rockchip,pins = - /* pwm2_m1 */ - <0 RK_PB6 4 &pcfg_pull_none>; - }; - }; - - pwm3 { - /omit-if-no-ref/ - pwm3_pins: pwm3-pins { - rockchip,pins = - /* pwm3_ir */ - <0 RK_PC2 1 &pcfg_pull_none>; - }; - }; - - pwm4 { - /omit-if-no-ref/ - pwm4_pins: pwm4-pins { - rockchip,pins = - /* pwm4 */ - <0 RK_PC3 1 &pcfg_pull_none>; - }; - }; - - pwm5 { - /omit-if-no-ref/ - pwm5_pins: pwm5-pins { - rockchip,pins = - /* pwm5 */ - <0 RK_PC4 1 &pcfg_pull_none>; - }; - }; - - pwm6 { - /omit-if-no-ref/ - pwm6_pins: pwm6-pins { - rockchip,pins = - /* pwm6 */ - <0 RK_PC5 1 &pcfg_pull_none>; - }; - }; - - pwm7 { - /omit-if-no-ref/ - pwm7_pins: pwm7-pins { - rockchip,pins = - /* pwm7_ir */ - <0 RK_PC6 1 &pcfg_pull_none>; - }; - }; - - pwm8 { - /omit-if-no-ref/ - pwm8m0_pins: pwm8m0-pins { - rockchip,pins = - /* pwm8_m0 */ - <3 RK_PB1 5 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pwm8m1_pins: pwm8m1-pins { - rockchip,pins = - /* pwm8_m1 */ - <1 RK_PD5 4 &pcfg_pull_none>; - }; - }; - - pwm9 { - /omit-if-no-ref/ - pwm9m0_pins: pwm9m0-pins { - rockchip,pins = - /* pwm9_m0 */ - <3 RK_PB2 5 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pwm9m1_pins: pwm9m1-pins { - rockchip,pins = - /* pwm9_m1 */ - <1 RK_PD6 4 &pcfg_pull_none>; - }; - }; - - pwm10 { - /omit-if-no-ref/ - pwm10m0_pins: pwm10m0-pins { - rockchip,pins = - /* pwm10_m0 */ - <3 RK_PB5 5 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pwm10m1_pins: pwm10m1-pins { - rockchip,pins = - /* pwm10_m1 */ - <2 RK_PA1 2 &pcfg_pull_none>; - }; - }; - - pwm11 { - /omit-if-no-ref/ - pwm11m0_pins: pwm11m0-pins { - rockchip,pins = - /* pwm11_irm0 */ - <3 RK_PB6 5 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pwm11m1_pins: pwm11m1-pins { - rockchip,pins = - /* pwm11_irm1 */ - <4 RK_PC0 3 &pcfg_pull_none>; - }; - }; - - pwm12 { - /omit-if-no-ref/ - pwm12m0_pins: pwm12m0-pins { - rockchip,pins = - /* pwm12_m0 */ - <3 RK_PB7 2 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pwm12m1_pins: pwm12m1-pins { - rockchip,pins = - /* pwm12_m1 */ - <4 RK_PC5 1 &pcfg_pull_none>; - }; - }; - - pwm13 { - /omit-if-no-ref/ - pwm13m0_pins: pwm13m0-pins { - rockchip,pins = - /* pwm13_m0 */ - <3 RK_PC0 2 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pwm13m1_pins: pwm13m1-pins { - rockchip,pins = - /* pwm13_m1 */ - <4 RK_PC6 1 &pcfg_pull_none>; - }; - }; - - pwm14 { - /omit-if-no-ref/ - pwm14m0_pins: pwm14m0-pins { - rockchip,pins = - /* pwm14_m0 */ - <3 RK_PC4 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pwm14m1_pins: pwm14m1-pins { - rockchip,pins = - /* pwm14_m1 */ - <4 RK_PC2 1 &pcfg_pull_none>; - }; - }; - - pwm15 { - /omit-if-no-ref/ - pwm15m0_pins: pwm15m0-pins { - rockchip,pins = - /* pwm15_irm0 */ - <3 RK_PC5 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pwm15m1_pins: pwm15m1-pins { - rockchip,pins = - /* pwm15_irm1 */ - <4 RK_PC3 1 &pcfg_pull_none>; - }; - }; - - refclk { - /omit-if-no-ref/ - refclk_pins: refclk-pins { - rockchip,pins = - /* refclk_ou */ - <0 RK_PA0 1 &pcfg_pull_none>; - }; - }; - - sata { - /omit-if-no-ref/ - sata_pins: sata-pins { - rockchip,pins = - /* sata_cpdet */ - <0 RK_PA4 2 &pcfg_pull_none>, - /* sata_cppod */ - <0 RK_PA6 1 &pcfg_pull_none>, - /* sata_mpswitch */ - <0 RK_PA5 2 &pcfg_pull_none>; - }; - }; - - sata0 { - /omit-if-no-ref/ - sata0_pins: sata0-pins { - rockchip,pins = - /* sata0_actled */ - <4 RK_PC6 3 &pcfg_pull_none>; - }; - }; - - sata1 { - /omit-if-no-ref/ - sata1_pins: sata1-pins { - rockchip,pins = - /* sata1_actled */ - <4 RK_PC5 3 &pcfg_pull_none>; - }; - }; - - sata2 { - /omit-if-no-ref/ - sata2_pins: sata2-pins { - rockchip,pins = - /* sata2_actled */ - <4 RK_PC4 3 &pcfg_pull_none>; - }; - }; - - scr { - /omit-if-no-ref/ - scr_pins: scr-pins { - rockchip,pins = - /* scr_clk */ - <1 RK_PA2 3 &pcfg_pull_none>, - /* scr_det */ - <1 RK_PA7 3 &pcfg_pull_up>, - /* scr_io */ - <1 RK_PA3 3 &pcfg_pull_up>, - /* scr_rst */ - <1 RK_PA5 3 &pcfg_pull_none>; - }; - }; - - sdmmc0 { - /omit-if-no-ref/ - sdmmc0_bus4: sdmmc0-bus4 { - rockchip,pins = - /* sdmmc0_d0 */ - <1 RK_PD5 1 &pcfg_pull_up_drv_level_2>, - /* sdmmc0_d1 */ - <1 RK_PD6 1 &pcfg_pull_up_drv_level_2>, - /* sdmmc0_d2 */ - <1 RK_PD7 1 &pcfg_pull_up_drv_level_2>, - /* sdmmc0_d3 */ - <2 RK_PA0 1 &pcfg_pull_up_drv_level_2>; - }; - - /omit-if-no-ref/ - sdmmc0_clk: sdmmc0-clk { - rockchip,pins = - /* sdmmc0_clk */ - <2 RK_PA2 1 &pcfg_pull_up_drv_level_2>; - }; - - /omit-if-no-ref/ - sdmmc0_cmd: sdmmc0-cmd { - rockchip,pins = - /* sdmmc0_cmd */ - <2 RK_PA1 1 &pcfg_pull_up_drv_level_2>; - }; - - /omit-if-no-ref/ - sdmmc0_det: sdmmc0-det { - rockchip,pins = - /* sdmmc0_det */ - <0 RK_PA4 1 &pcfg_pull_up>; - }; - - /omit-if-no-ref/ - sdmmc0_pwren: sdmmc0-pwren { - rockchip,pins = - /* sdmmc0_pwren */ - <0 RK_PA5 1 &pcfg_pull_none>; - }; - }; - - sdmmc1 { - /omit-if-no-ref/ - sdmmc1_bus4: sdmmc1-bus4 { - rockchip,pins = - /* sdmmc1_d0 */ - <2 RK_PA3 1 &pcfg_pull_up_drv_level_2>, - /* sdmmc1_d1 */ - <2 RK_PA4 1 &pcfg_pull_up_drv_level_2>, - /* sdmmc1_d2 */ - <2 RK_PA5 1 &pcfg_pull_up_drv_level_2>, - /* sdmmc1_d3 */ - <2 RK_PA6 1 &pcfg_pull_up_drv_level_2>; - }; - - /omit-if-no-ref/ - sdmmc1_clk: sdmmc1-clk { - rockchip,pins = - /* sdmmc1_clk */ - <2 RK_PB0 1 &pcfg_pull_up_drv_level_2>; - }; - - /omit-if-no-ref/ - sdmmc1_cmd: sdmmc1-cmd { - rockchip,pins = - /* sdmmc1_cmd */ - <2 RK_PA7 1 &pcfg_pull_up_drv_level_2>; - }; - - /omit-if-no-ref/ - sdmmc1_det: sdmmc1-det { - rockchip,pins = - /* sdmmc1_det */ - <2 RK_PB2 1 &pcfg_pull_up>; - }; - - /omit-if-no-ref/ - sdmmc1_pwren: sdmmc1-pwren { - rockchip,pins = - /* sdmmc1_pwren */ - <2 RK_PB1 1 &pcfg_pull_none>; - }; - }; - - sdmmc2 { - /omit-if-no-ref/ - sdmmc2m0_bus4: sdmmc2m0-bus4 { - rockchip,pins = - /* sdmmc2_d0m0 */ - <3 RK_PC6 3 &pcfg_pull_up_drv_level_2>, - /* sdmmc2_d1m0 */ - <3 RK_PC7 3 &pcfg_pull_up_drv_level_2>, - /* sdmmc2_d2m0 */ - <3 RK_PD0 3 &pcfg_pull_up_drv_level_2>, - /* sdmmc2_d3m0 */ - <3 RK_PD1 3 &pcfg_pull_up_drv_level_2>; - }; - - /omit-if-no-ref/ - sdmmc2m0_clk: sdmmc2m0-clk { - rockchip,pins = - /* sdmmc2_clkm0 */ - <3 RK_PD3 3 &pcfg_pull_up_drv_level_2>; - }; - - /omit-if-no-ref/ - sdmmc2m0_cmd: sdmmc2m0-cmd { - rockchip,pins = - /* sdmmc2_cmdm0 */ - <3 RK_PD2 3 &pcfg_pull_up_drv_level_2>; - }; - - /omit-if-no-ref/ - sdmmc2m0_det: sdmmc2m0-det { - rockchip,pins = - /* sdmmc2_detm0 */ - <3 RK_PD4 3 &pcfg_pull_up>; - }; - - /omit-if-no-ref/ - sdmmc2m0_pwren: sdmmc2m0-pwren { - rockchip,pins = - /* sdmmc2m0_pwren */ - <3 RK_PD5 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - sdmmc2m1_bus4: sdmmc2m1-bus4 { - rockchip,pins = - /* sdmmc2_d0m1 */ - <3 RK_PA1 5 &pcfg_pull_up_drv_level_2>, - /* sdmmc2_d1m1 */ - <3 RK_PA2 5 &pcfg_pull_up_drv_level_2>, - /* sdmmc2_d2m1 */ - <3 RK_PA3 5 &pcfg_pull_up_drv_level_2>, - /* sdmmc2_d3m1 */ - <3 RK_PA4 5 &pcfg_pull_up_drv_level_2>; - }; - - /omit-if-no-ref/ - sdmmc2m1_clk: sdmmc2m1-clk { - rockchip,pins = - /* sdmmc2_clkm1 */ - <3 RK_PA6 5 &pcfg_pull_up_drv_level_2>; - }; - - /omit-if-no-ref/ - sdmmc2m1_cmd: sdmmc2m1-cmd { - rockchip,pins = - /* sdmmc2_cmdm1 */ - <3 RK_PA5 5 &pcfg_pull_up_drv_level_2>; - }; - - /omit-if-no-ref/ - sdmmc2m1_det: sdmmc2m1-det { - rockchip,pins = - /* sdmmc2_detm1 */ - <3 RK_PA7 4 &pcfg_pull_up>; - }; - - /omit-if-no-ref/ - sdmmc2m1_pwren: sdmmc2m1-pwren { - rockchip,pins = - /* sdmmc2m1_pwren */ - <3 RK_PB0 4 &pcfg_pull_none>; - }; - }; - - spdif { - /omit-if-no-ref/ - spdifm0_tx: spdifm0-tx { - rockchip,pins = - /* spdifm0_tx */ - <1 RK_PA4 4 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - spdifm1_tx: spdifm1-tx { - rockchip,pins = - /* spdifm1_tx */ - <3 RK_PC5 2 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - spdifm2_tx: spdifm2-tx { - rockchip,pins = - /* spdifm2_tx */ - <4 RK_PC4 2 &pcfg_pull_none>; - }; - }; - - spi0 { - /omit-if-no-ref/ - spi0m0_pins: spi0m0-pins { - rockchip,pins = - /* spi0_clkm0 */ - <0 RK_PB5 2 &pcfg_pull_none>, - /* spi0_misom0 */ - <0 RK_PC5 2 &pcfg_pull_none>, - /* spi0_mosim0 */ - <0 RK_PB6 2 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - spi0m0_cs0: spi0m0-cs0 { - rockchip,pins = - /* spi0_cs0m0 */ - <0 RK_PC6 2 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - spi0m0_cs1: spi0m0-cs1 { - rockchip,pins = - /* spi0_cs1m0 */ - <0 RK_PC4 2 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - spi0m1_pins: spi0m1-pins { - rockchip,pins = - /* spi0_clkm1 */ - <2 RK_PD3 3 &pcfg_pull_none>, - /* spi0_misom1 */ - <2 RK_PD0 3 &pcfg_pull_none>, - /* spi0_mosim1 */ - <2 RK_PD1 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - spi0m1_cs0: spi0m1-cs0 { - rockchip,pins = - /* spi0_cs0m1 */ - <2 RK_PD2 3 &pcfg_pull_none>; - }; - }; - - spi1 { - /omit-if-no-ref/ - spi1m0_pins: spi1m0-pins { - rockchip,pins = - /* spi1_clkm0 */ - <2 RK_PB5 3 &pcfg_pull_none>, - /* spi1_misom0 */ - <2 RK_PB6 3 &pcfg_pull_none>, - /* spi1_mosim0 */ - <2 RK_PB7 4 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - spi1m0_cs0: spi1m0-cs0 { - rockchip,pins = - /* spi1_cs0m0 */ - <2 RK_PC0 4 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - spi1m0_cs1: spi1m0-cs1 { - rockchip,pins = - /* spi1_cs1m0 */ - <2 RK_PC6 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - spi1m1_pins: spi1m1-pins { - rockchip,pins = - /* spi1_clkm1 */ - <3 RK_PC3 3 &pcfg_pull_none>, - /* spi1_misom1 */ - <3 RK_PC2 3 &pcfg_pull_none>, - /* spi1_mosim1 */ - <3 RK_PC1 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - spi1m1_cs0: spi1m1-cs0 { - rockchip,pins = - /* spi1_cs0m1 */ - <3 RK_PA1 3 &pcfg_pull_none>; - }; - }; - - spi2 { - /omit-if-no-ref/ - spi2m0_pins: spi2m0-pins { - rockchip,pins = - /* spi2_clkm0 */ - <2 RK_PC1 4 &pcfg_pull_none>, - /* spi2_misom0 */ - <2 RK_PC2 4 &pcfg_pull_none>, - /* spi2_mosim0 */ - <2 RK_PC3 4 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - spi2m0_cs0: spi2m0-cs0 { - rockchip,pins = - /* spi2_cs0m0 */ - <2 RK_PC4 4 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - spi2m0_cs1: spi2m0-cs1 { - rockchip,pins = - /* spi2_cs1m0 */ - <2 RK_PC5 4 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - spi2m1_pins: spi2m1-pins { - rockchip,pins = - /* spi2_clkm1 */ - <3 RK_PA0 3 &pcfg_pull_none>, - /* spi2_misom1 */ - <2 RK_PD7 3 &pcfg_pull_none>, - /* spi2_mosim1 */ - <2 RK_PD6 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - spi2m1_cs0: spi2m1-cs0 { - rockchip,pins = - /* spi2_cs0m1 */ - <2 RK_PD5 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - spi2m1_cs1: spi2m1-cs1 { - rockchip,pins = - /* spi2_cs1m1 */ - <2 RK_PD4 3 &pcfg_pull_none>; - }; - }; - - spi3 { - /omit-if-no-ref/ - spi3m0_pins: spi3m0-pins { - rockchip,pins = - /* spi3_clkm0 */ - <4 RK_PB3 4 &pcfg_pull_none>, - /* spi3_misom0 */ - <4 RK_PB0 4 &pcfg_pull_none>, - /* spi3_mosim0 */ - <4 RK_PB2 4 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - spi3m0_cs0: spi3m0-cs0 { - rockchip,pins = - /* spi3_cs0m0 */ - <4 RK_PA6 4 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - spi3m0_cs1: spi3m0-cs1 { - rockchip,pins = - /* spi3_cs1m0 */ - <4 RK_PA7 4 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - spi3m1_pins: spi3m1-pins { - rockchip,pins = - /* spi3_clkm1 */ - <4 RK_PC2 2 &pcfg_pull_none>, - /* spi3_misom1 */ - <4 RK_PC5 2 &pcfg_pull_none>, - /* spi3_mosim1 */ - <4 RK_PC3 2 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - spi3m1_cs0: spi3m1-cs0 { - rockchip,pins = - /* spi3_cs0m1 */ - <4 RK_PC6 2 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - spi3m1_cs1: spi3m1-cs1 { - rockchip,pins = - /* spi3_cs1m1 */ - <4 RK_PD1 2 &pcfg_pull_none>; - }; - }; - - tsadc { - /omit-if-no-ref/ - tsadcm0_shut: tsadcm0-shut { - rockchip,pins = - /* tsadcm0_shut */ - <0 RK_PA1 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - tsadcm1_shut: tsadcm1-shut { - rockchip,pins = - /* tsadcm1_shut */ - <0 RK_PA2 2 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - tsadc_shutorg: tsadc-shutorg { - rockchip,pins = - /* tsadc_shutorg */ - <0 RK_PA1 2 &pcfg_pull_none>; - }; - }; - - uart0 { - /omit-if-no-ref/ - uart0_xfer: uart0-xfer { - rockchip,pins = - /* uart0_rx */ - <0 RK_PC0 3 &pcfg_pull_up>, - /* uart0_tx */ - <0 RK_PC1 3 &pcfg_pull_up>; - }; - - /omit-if-no-ref/ - uart0_ctsn: uart0-ctsn { - rockchip,pins = - /* uart0_ctsn */ - <0 RK_PC7 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - uart0_rtsn: uart0-rtsn { - rockchip,pins = - /* uart0_rtsn */ - <0 RK_PC4 3 &pcfg_pull_none>; - }; - }; - - uart1 { - /omit-if-no-ref/ - uart1m0_xfer: uart1m0-xfer { - rockchip,pins = - /* uart1_rxm0 */ - <2 RK_PB3 2 &pcfg_pull_up>, - /* uart1_txm0 */ - <2 RK_PB4 2 &pcfg_pull_up>; - }; - - /omit-if-no-ref/ - uart1m0_ctsn: uart1m0-ctsn { - rockchip,pins = - /* uart1m0_ctsn */ - <2 RK_PB6 2 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - uart1m0_rtsn: uart1m0-rtsn { - rockchip,pins = - /* uart1m0_rtsn */ - <2 RK_PB5 2 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - uart1m1_xfer: uart1m1-xfer { - rockchip,pins = - /* uart1_rxm1 */ - <3 RK_PD7 4 &pcfg_pull_up>, - /* uart1_txm1 */ - <3 RK_PD6 4 &pcfg_pull_up>; - }; - - /omit-if-no-ref/ - uart1m1_ctsn: uart1m1-ctsn { - rockchip,pins = - /* uart1m1_ctsn */ - <4 RK_PC1 4 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - uart1m1_rtsn: uart1m1-rtsn { - rockchip,pins = - /* uart1m1_rtsn */ - <4 RK_PB6 4 &pcfg_pull_none>; - }; - }; - - uart2 { - /omit-if-no-ref/ - uart2m0_xfer: uart2m0-xfer { - rockchip,pins = - /* uart2_rxm0 */ - <0 RK_PD0 1 &pcfg_pull_up>, - /* uart2_txm0 */ - <0 RK_PD1 1 &pcfg_pull_up>; - }; - - /omit-if-no-ref/ - uart2m1_xfer: uart2m1-xfer { - rockchip,pins = - /* uart2_rxm1 */ - <1 RK_PD6 2 &pcfg_pull_up>, - /* uart2_txm1 */ - <1 RK_PD5 2 &pcfg_pull_up>; - }; - }; - - uart3 { - /omit-if-no-ref/ - uart3m0_xfer: uart3m0-xfer { - rockchip,pins = - /* uart3_rxm0 */ - <1 RK_PA0 2 &pcfg_pull_up>, - /* uart3_txm0 */ - <1 RK_PA1 2 &pcfg_pull_up>; - }; - - /omit-if-no-ref/ - uart3m0_ctsn: uart3m0-ctsn { - rockchip,pins = - /* uart3m0_ctsn */ - <1 RK_PA3 2 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - uart3m0_rtsn: uart3m0-rtsn { - rockchip,pins = - /* uart3m0_rtsn */ - <1 RK_PA2 2 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - uart3m1_xfer: uart3m1-xfer { - rockchip,pins = - /* uart3_rxm1 */ - <3 RK_PC0 4 &pcfg_pull_up>, - /* uart3_txm1 */ - <3 RK_PB7 4 &pcfg_pull_up>; - }; - }; - - uart4 { - /omit-if-no-ref/ - uart4m0_xfer: uart4m0-xfer { - rockchip,pins = - /* uart4_rxm0 */ - <1 RK_PA4 2 &pcfg_pull_up>, - /* uart4_txm0 */ - <1 RK_PA6 2 &pcfg_pull_up>; - }; - - /omit-if-no-ref/ - uart4m0_ctsn: uart4m0-ctsn { - rockchip,pins = - /* uart4m0_ctsn */ - <1 RK_PA7 2 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - uart4m0_rtsn: uart4m0-rtsn { - rockchip,pins = - /* uart4m0_rtsn */ - <1 RK_PA5 2 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - uart4m1_xfer: uart4m1-xfer { - rockchip,pins = - /* uart4_rxm1 */ - <3 RK_PB1 4 &pcfg_pull_up>, - /* uart4_txm1 */ - <3 RK_PB2 4 &pcfg_pull_up>; - }; - }; - - uart5 { - /omit-if-no-ref/ - uart5m0_xfer: uart5m0-xfer { - rockchip,pins = - /* uart5_rxm0 */ - <2 RK_PA1 3 &pcfg_pull_up>, - /* uart5_txm0 */ - <2 RK_PA2 3 &pcfg_pull_up>; - }; - - /omit-if-no-ref/ - uart5m0_ctsn: uart5m0-ctsn { - rockchip,pins = - /* uart5m0_ctsn */ - <1 RK_PD7 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - uart5m0_rtsn: uart5m0-rtsn { - rockchip,pins = - /* uart5m0_rtsn */ - <2 RK_PA0 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - uart5m1_xfer: uart5m1-xfer { - rockchip,pins = - /* uart5_rxm1 */ - <3 RK_PC3 4 &pcfg_pull_up>, - /* uart5_txm1 */ - <3 RK_PC2 4 &pcfg_pull_up>; - }; - }; - - uart6 { - /omit-if-no-ref/ - uart6m0_xfer: uart6m0-xfer { - rockchip,pins = - /* uart6_rxm0 */ - <2 RK_PA3 3 &pcfg_pull_up>, - /* uart6_txm0 */ - <2 RK_PA4 3 &pcfg_pull_up>; - }; - - /omit-if-no-ref/ - uart6m0_ctsn: uart6m0-ctsn { - rockchip,pins = - /* uart6m0_ctsn */ - <2 RK_PC0 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - uart6m0_rtsn: uart6m0-rtsn { - rockchip,pins = - /* uart6m0_rtsn */ - <2 RK_PB7 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - uart6m1_xfer: uart6m1-xfer { - rockchip,pins = - /* uart6_rxm1 */ - <1 RK_PD6 3 &pcfg_pull_up>, - /* uart6_txm1 */ - <1 RK_PD5 3 &pcfg_pull_up>; - }; - }; - - uart7 { - /omit-if-no-ref/ - uart7m0_xfer: uart7m0-xfer { - rockchip,pins = - /* uart7_rxm0 */ - <2 RK_PA5 3 &pcfg_pull_up>, - /* uart7_txm0 */ - <2 RK_PA6 3 &pcfg_pull_up>; - }; - - /omit-if-no-ref/ - uart7m0_ctsn: uart7m0-ctsn { - rockchip,pins = - /* uart7m0_ctsn */ - <2 RK_PC2 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - uart7m0_rtsn: uart7m0-rtsn { - rockchip,pins = - /* uart7m0_rtsn */ - <2 RK_PC1 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - uart7m1_xfer: uart7m1-xfer { - rockchip,pins = - /* uart7_rxm1 */ - <3 RK_PC5 4 &pcfg_pull_up>, - /* uart7_txm1 */ - <3 RK_PC4 4 &pcfg_pull_up>; - }; - - /omit-if-no-ref/ - uart7m2_xfer: uart7m2-xfer { - rockchip,pins = - /* uart7_rxm2 */ - <4 RK_PA3 4 &pcfg_pull_up>, - /* uart7_txm2 */ - <4 RK_PA2 4 &pcfg_pull_up>; - }; - }; - - uart8 { - /omit-if-no-ref/ - uart8m0_xfer: uart8m0-xfer { - rockchip,pins = - /* uart8_rxm0 */ - <2 RK_PC6 2 &pcfg_pull_up>, - /* uart8_txm0 */ - <2 RK_PC5 3 &pcfg_pull_up>; - }; - - /omit-if-no-ref/ - uart8m0_ctsn: uart8m0-ctsn { - rockchip,pins = - /* uart8m0_ctsn */ - <2 RK_PB2 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - uart8m0_rtsn: uart8m0-rtsn { - rockchip,pins = - /* uart8m0_rtsn */ - <2 RK_PB1 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - uart8m1_xfer: uart8m1-xfer { - rockchip,pins = - /* uart8_rxm1 */ - <3 RK_PA0 4 &pcfg_pull_up>, - /* uart8_txm1 */ - <2 RK_PD7 4 &pcfg_pull_up>; - }; - }; - - uart9 { - /omit-if-no-ref/ - uart9m0_xfer: uart9m0-xfer { - rockchip,pins = - /* uart9_rxm0 */ - <2 RK_PA7 3 &pcfg_pull_up>, - /* uart9_txm0 */ - <2 RK_PB0 3 &pcfg_pull_up>; - }; - - /omit-if-no-ref/ - uart9m0_ctsn: uart9m0-ctsn { - rockchip,pins = - /* uart9m0_ctsn */ - <2 RK_PC4 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - uart9m0_rtsn: uart9m0-rtsn { - rockchip,pins = - /* uart9m0_rtsn */ - <2 RK_PC3 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - uart9m1_xfer: uart9m1-xfer { - rockchip,pins = - /* uart9_rxm1 */ - <4 RK_PC6 4 &pcfg_pull_up>, - /* uart9_txm1 */ - <4 RK_PC5 4 &pcfg_pull_up>; - }; - - /omit-if-no-ref/ - uart9m2_xfer: uart9m2-xfer { - rockchip,pins = - /* uart9_rxm2 */ - <4 RK_PA5 4 &pcfg_pull_up>, - /* uart9_txm2 */ - <4 RK_PA4 4 &pcfg_pull_up>; - }; - }; - - vop { - /omit-if-no-ref/ - vopm0_pins: vopm0-pins { - rockchip,pins = - /* vop_pwmm0 */ - <0 RK_PC3 2 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - vopm1_pins: vopm1-pins { - rockchip,pins = - /* vop_pwmm1 */ - <3 RK_PC4 2 &pcfg_pull_none>; - }; - }; -}; - -/* - * This part is edited handly. - */ -&pinctrl { - spi0-hs { - /omit-if-no-ref/ - spi0m0_pins_hs: spi0m0-pins { - rockchip,pins = - /* spi0_clkm0 */ - <0 RK_PB5 2 &pcfg_pull_up_drv_level_1>, - /* spi0_misom0 */ - <0 RK_PC5 2 &pcfg_pull_up_drv_level_1>, - /* spi0_mosim0 */ - <0 RK_PB6 2 &pcfg_pull_up_drv_level_1>; - }; - - /omit-if-no-ref/ - spi0m0_cs0_hs: spi0m0-cs0 { - rockchip,pins = - /* spi0_cs0m0 */ - <0 RK_PC6 2 &pcfg_pull_up_drv_level_1>; - }; - - /omit-if-no-ref/ - spi0m0_cs1_hs: spi0m0-cs1 { - rockchip,pins = - /* spi0_cs1m0 */ - <0 RK_PC4 2 &pcfg_pull_up_drv_level_1>; - }; - - /omit-if-no-ref/ - spi0m1_pins_hs: spi0m1-pins { - rockchip,pins = - /* spi0_clkm1 */ - <2 RK_PD3 3 &pcfg_pull_up_drv_level_1>, - /* spi0_misom1 */ - <2 RK_PD0 3 &pcfg_pull_up_drv_level_1>, - /* spi0_mosim1 */ - <2 RK_PD1 3 &pcfg_pull_up_drv_level_1>; - }; - - /omit-if-no-ref/ - spi0m1_cs0_hs: spi0m1-cs0 { - rockchip,pins = - /* spi0_cs0m1 */ - <2 RK_PD2 3 &pcfg_pull_up_drv_level_1>; - }; - }; - - spi1-hs { - /omit-if-no-ref/ - spi1m0_pins_hs: spi1m0-pins { - rockchip,pins = - /* spi1_clkm0 */ - <2 RK_PB5 3 &pcfg_pull_up_drv_level_1>, - /* spi1_misom0 */ - <2 RK_PB6 3 &pcfg_pull_up_drv_level_1>, - /* spi1_mosim0 */ - <2 RK_PB7 4 &pcfg_pull_up_drv_level_1>; - }; - - /omit-if-no-ref/ - spi1m0_cs0_hs: spi1m0-cs0 { - rockchip,pins = - /* spi1_cs0m0 */ - <2 RK_PC0 4 &pcfg_pull_up_drv_level_1>; - }; - - /omit-if-no-ref/ - spi1m0_cs1_hs: spi1m0-cs1 { - rockchip,pins = - /* spi1_cs1m0 */ - <2 RK_PC6 3 &pcfg_pull_up_drv_level_1>; - }; - - /omit-if-no-ref/ - spi1m1_pins_hs: spi1m1-pins { - rockchip,pins = - /* spi1_clkm1 */ - <3 RK_PC3 3 &pcfg_pull_up_drv_level_1>, - /* spi1_misom1 */ - <3 RK_PC2 3 &pcfg_pull_up_drv_level_1>, - /* spi1_mosim1 */ - <3 RK_PC1 3 &pcfg_pull_up_drv_level_1>; - }; - - /omit-if-no-ref/ - spi1m1_cs0_hs: spi1m1-cs0 { - rockchip,pins = - /* spi1_cs0m1 */ - <3 RK_PA1 3 &pcfg_pull_up_drv_level_1>; - }; - }; - - spi2-hs { - /omit-if-no-ref/ - spi2m0_pins_hs: spi2m0-pins { - rockchip,pins = - /* spi2_clkm0 */ - <2 RK_PC1 4 &pcfg_pull_up_drv_level_1>, - /* spi2_misom0 */ - <2 RK_PC2 4 &pcfg_pull_up_drv_level_1>, - /* spi2_mosim0 */ - <2 RK_PC3 4 &pcfg_pull_up_drv_level_1>; - }; - - /omit-if-no-ref/ - spi2m0_cs0_hs: spi2m0-cs0 { - rockchip,pins = - /* spi2_cs0m0 */ - <2 RK_PC4 4 &pcfg_pull_up_drv_level_1>; - }; - - /omit-if-no-ref/ - spi2m0_cs1_hs: spi2m0-cs1 { - rockchip,pins = - /* spi2_cs1m0 */ - <2 RK_PC5 4 &pcfg_pull_up_drv_level_1>; - }; - - /omit-if-no-ref/ - spi2m1_pins_hs: spi2m1-pins { - rockchip,pins = - /* spi2_clkm1 */ - <3 RK_PA0 3 &pcfg_pull_up_drv_level_1>, - /* spi2_misom1 */ - <2 RK_PD7 3 &pcfg_pull_up_drv_level_1>, - /* spi2_mosim1 */ - <2 RK_PD6 3 &pcfg_pull_up_drv_level_1>; - }; - - /omit-if-no-ref/ - spi2m1_cs0_hs: spi2m1-cs0 { - rockchip,pins = - /* spi2_cs0m1 */ - <2 RK_PD5 3 &pcfg_pull_up_drv_level_1>; - }; - - /omit-if-no-ref/ - spi2m1_cs1_hs: spi2m1-cs1 { - rockchip,pins = - /* spi2_cs1m1 */ - <2 RK_PD4 3 &pcfg_pull_up_drv_level_1>; - }; - }; - - spi3-hs { - /omit-if-no-ref/ - spi3m0_pins_hs: spi3m0-pins { - rockchip,pins = - /* spi3_clkm0 */ - <4 RK_PB3 4 &pcfg_pull_up_drv_level_1>, - /* spi3_misom0 */ - <4 RK_PB0 4 &pcfg_pull_up_drv_level_1>, - /* spi3_mosim0 */ - <4 RK_PB2 4 &pcfg_pull_up_drv_level_1>; - }; - - /omit-if-no-ref/ - spi3m0_cs0_hs: spi3m0-cs0 { - rockchip,pins = - /* spi3_cs0m0 */ - <4 RK_PA6 4 &pcfg_pull_up_drv_level_1>; - }; - - /omit-if-no-ref/ - spi3m0_cs1_hs: spi3m0-cs1 { - rockchip,pins = - /* spi3_cs1m0 */ - <4 RK_PA7 4 &pcfg_pull_up_drv_level_1>; - }; - - /omit-if-no-ref/ - spi3m1_pins_hs: spi3m1-pins { - rockchip,pins = - /* spi3_clkm1 */ - <4 RK_PC2 2 &pcfg_pull_up_drv_level_1>, - /* spi3_misom1 */ - <4 RK_PC5 2 &pcfg_pull_up_drv_level_1>, - /* spi3_mosim1 */ - <4 RK_PC3 2 &pcfg_pull_up_drv_level_1>; - }; - - /omit-if-no-ref/ - spi3m1_cs0_hs: spi3m1-cs0 { - rockchip,pins = - /* spi3_cs0m1 */ - <4 RK_PC6 2 &pcfg_pull_up_drv_level_1>; - }; - - /omit-if-no-ref/ - spi3m1_cs1_hs: spi3m1-cs1 { - rockchip,pins = - /* spi3_cs1m1 */ - <4 RK_PD1 2 &pcfg_pull_up_drv_level_1>; - }; - }; - - gmac-txd-level3 { - /omit-if-no-ref/ - gmac0_tx_bus2_level3: gmac0-tx-bus2-level3 { - rockchip,pins = - /* gmac0_txd0 */ - <2 RK_PB3 1 &pcfg_pull_none_drv_level_3>, - /* gmac0_txd1 */ - <2 RK_PB4 1 &pcfg_pull_none_drv_level_3>, - /* gmac0_txen */ - <2 RK_PB5 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - gmac0_rgmii_bus_level3: gmac0-rgmii-bus-level3 { - rockchip,pins = - /* gmac0_rxd2 */ - <2 RK_PA3 2 &pcfg_pull_none>, - /* gmac0_rxd3 */ - <2 RK_PA4 2 &pcfg_pull_none>, - /* gmac0_txd2 */ - <2 RK_PA6 2 &pcfg_pull_none_drv_level_3>, - /* gmac0_txd3 */ - <2 RK_PA7 2 &pcfg_pull_none_drv_level_3>; - }; - - /omit-if-no-ref/ - gmac1m0_tx_bus2_level3: gmac1m0-tx-bus2-level3 { - rockchip,pins = - /* gmac1_txd0m0 */ - <3 RK_PB5 3 &pcfg_pull_none_drv_level_3>, - /* gmac1_txd1m0 */ - <3 RK_PB6 3 &pcfg_pull_none_drv_level_3>, - /* gmac1_txenm0 */ - <3 RK_PB7 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - gmac1m0_rgmii_bus_level3: gmac1m0-rgmii-bus-level3 { - rockchip,pins = - /* gmac1_rxd2m0 */ - <3 RK_PA4 3 &pcfg_pull_none>, - /* gmac1_rxd3m0 */ - <3 RK_PA5 3 &pcfg_pull_none>, - /* gmac1_txd2m0 */ - <3 RK_PA2 3 &pcfg_pull_none_drv_level_3>, - /* gmac1_txd3m0 */ - <3 RK_PA3 3 &pcfg_pull_none_drv_level_3>; - }; - - /omit-if-no-ref/ - gmac1m1_tx_bus2_level3: gmac1m1-tx-bus2-level3 { - rockchip,pins = - /* gmac1_txd0m1 */ - <4 RK_PA4 3 &pcfg_pull_none_drv_level_3>, - /* gmac1_txd1m1 */ - <4 RK_PA5 3 &pcfg_pull_none_drv_level_3>, - /* gmac1_txenm1 */ - <4 RK_PA6 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - gmac1m1_rgmii_bus_level3: gmac1m1-rgmii-bus-level3 { - rockchip,pins = - /* gmac1_rxd2m1 */ - <4 RK_PA1 3 &pcfg_pull_none>, - /* gmac1_rxd3m1 */ - <4 RK_PA2 3 &pcfg_pull_none>, - /* gmac1_txd2m1 */ - <3 RK_PD6 3 &pcfg_pull_none_drv_level_3>, - /* gmac1_txd3m1 */ - <3 RK_PD7 3 &pcfg_pull_none_drv_level_3>; - }; - }; - - gmac-txc-level2 { - /omit-if-no-ref/ - gmac0_rgmii_clk_level2: gmac0-rgmii-clk-level2 { - rockchip,pins = - /* gmac0_rxclk */ - <2 RK_PA5 2 &pcfg_pull_none>, - /* gmac0_txclk */ - <2 RK_PB0 2 &pcfg_pull_none_drv_level_2>; - }; - - /omit-if-no-ref/ - gmac1m0_rgmii_clk_level2: gmac1m0-rgmii-clk-level2 { - rockchip,pins = - /* gmac1_rxclkm0 */ - <3 RK_PA7 3 &pcfg_pull_none>, - /* gmac1_txclkm0 */ - <3 RK_PA6 3 &pcfg_pull_none_drv_level_2>; - }; - - /omit-if-no-ref/ - gmac1m1_rgmii_clk_level2: gmac1m1-rgmii-clk-level2 { - rockchip,pins = - /* gmac1_rxclkm1 */ - <4 RK_PA3 3 &pcfg_pull_none>, - /* gmac1_txclkm1 */ - <4 RK_PA0 3 &pcfg_pull_none_drv_level_2>; - }; - }; - - tsadc { - /omit-if-no-ref/ - tsadc_pin: tsadc-pin { - rockchip,pins = - /* tsadc_pin */ - <0 RK_PA1 0 &pcfg_pull_none>; - }; - }; - - lcdc { - /omit-if-no-ref/ - lcdc_clock: lcdc-clock { - rockchip,pins = - /* lcdc_clk */ - <3 RK_PA0 1 &pcfg_pull_none>, - /* lcdc_den */ - <3 RK_PC3 1 &pcfg_pull_none>, - /* lcdc_hsync */ - <3 RK_PC1 1 &pcfg_pull_none>, - /* lcdc_vsync */ - <3 RK_PC2 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - lcdc_data16: lcdc-data16 { - rockchip,pins = - /* lcdc_d3 */ - <2 RK_PD3 1 &pcfg_pull_none>, - /* lcdc_d4 */ - <2 RK_PD4 1 &pcfg_pull_none>, - /* lcdc_d5 */ - <2 RK_PD5 1 &pcfg_pull_none>, - /* lcdc_d6 */ - <2 RK_PD6 1 &pcfg_pull_none>, - /* lcdc_d7 */ - <2 RK_PD7 1 &pcfg_pull_none>, - /* lcdc_d10 */ - <3 RK_PA3 1 &pcfg_pull_none>, - /* lcdc_d11 */ - <3 RK_PA4 1 &pcfg_pull_none>, - /* lcdc_d12 */ - <3 RK_PA5 1 &pcfg_pull_none>, - /* lcdc_d13 */ - <3 RK_PA6 1 &pcfg_pull_none>, - /* lcdc_d14 */ - <3 RK_PA7 1 &pcfg_pull_none>, - /* lcdc_d15 */ - <3 RK_PB0 1 &pcfg_pull_none>, - /* lcdc_d19 */ - <3 RK_PB4 1 &pcfg_pull_none>, - /* lcdc_d20 */ - <3 RK_PB5 1 &pcfg_pull_none>, - /* lcdc_d21 */ - <3 RK_PB6 1 &pcfg_pull_none>, - /* lcdc_d22 */ - <3 RK_PB7 1 &pcfg_pull_none>, - /* lcdc_d23 */ - <3 RK_PC0 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - lcdc_data18: lcdc-data18 { - rockchip,pins = - /* lcdc_d2 */ - <2 RK_PD2 1 &pcfg_pull_none>, - /* lcdc_d3 */ - <2 RK_PD3 1 &pcfg_pull_none>, - /* lcdc_d4 */ - <2 RK_PD4 1 &pcfg_pull_none>, - /* lcdc_d5 */ - <2 RK_PD5 1 &pcfg_pull_none>, - /* lcdc_d6 */ - <2 RK_PD6 1 &pcfg_pull_none>, - /* lcdc_d7 */ - <2 RK_PD7 1 &pcfg_pull_none>, - /* lcdc_d10 */ - <3 RK_PA3 1 &pcfg_pull_none>, - /* lcdc_d11 */ - <3 RK_PA4 1 &pcfg_pull_none>, - /* lcdc_d12 */ - <3 RK_PA5 1 &pcfg_pull_none>, - /* lcdc_d13 */ - <3 RK_PA6 1 &pcfg_pull_none>, - /* lcdc_d14 */ - <3 RK_PA7 1 &pcfg_pull_none>, - /* lcdc_d15 */ - <3 RK_PB0 1 &pcfg_pull_none>, - /* lcdc_d18 */ - <3 RK_PB3 1 &pcfg_pull_none>, - /* lcdc_d19 */ - <3 RK_PB4 1 &pcfg_pull_none>, - /* lcdc_d20 */ - <3 RK_PB5 1 &pcfg_pull_none>, - /* lcdc_d21 */ - <3 RK_PB6 1 &pcfg_pull_none>, - /* lcdc_d22 */ - <3 RK_PB7 1 &pcfg_pull_none>, - /* lcdc_d23 */ - <3 RK_PC0 1 &pcfg_pull_none>; - }; - }; - -}; diff --git a/arch/arm/dts/rk3568-radxa-cm3i.dtsi b/arch/arm/dts/rk3568-radxa-cm3i.dtsi deleted file mode 100644 index 45b03dcbbad..00000000000 --- a/arch/arm/dts/rk3568-radxa-cm3i.dtsi +++ /dev/null @@ -1,412 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) - -#include -#include -#include -#include "rk3568.dtsi" - -/ { - compatible = "radxa,cm3i", "rockchip,rk3568"; - - aliases { - mmc0 = &sdhci; - }; - - chosen { - stdout-path = "serial2:115200n8"; - }; - - gpio-leds { - compatible = "gpio-leds"; - - led_user: led-0 { - gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>; - function = LED_FUNCTION_HEARTBEAT; - color = ; - linux,default-trigger = "heartbeat"; - pinctrl-names = "default"; - pinctrl-0 = <&led_user_en>; - }; - }; - - pcie30_avdd0v9: pcie30-avdd0v9-regulator { - compatible = "regulator-fixed"; - regulator-name = "pcie30_avdd0v9"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <900000>; - vin-supply = <&vcc3v3_sys>; - }; - - pcie30_avdd1v8: pcie30-avdd1v8-regulator { - compatible = "regulator-fixed"; - regulator-name = "pcie30_avdd1v8"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - vin-supply = <&vcc3v3_sys>; - }; - - vcc3v3_sys: vcc3v3-sys-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc3v3_sys"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <&vcc5v_input>; - }; - - vcc5v0_sys: vcc5v0-sys-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc5v0_sys"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - vin-supply = <&vcc5v_input>; - }; - - /* labeled +5v_input in schematic */ - vcc5v_input: vcc5v-input-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc5v_input"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - }; -}; - -&combphy0 { - status = "okay"; -}; - -&combphy1 { - status = "okay"; -}; - -&combphy2 { - status = "okay"; -}; - -&cpu0 { - cpu-supply = <&vdd_cpu>; -}; - -&cpu1 { - cpu-supply = <&vdd_cpu>; -}; - -&cpu2 { - cpu-supply = <&vdd_cpu>; -}; - -&cpu3 { - cpu-supply = <&vdd_cpu>; -}; - -&display_subsystem { - status = "disabled"; -}; - -&gpu { - mali-supply = <&vdd_gpu>; - status = "okay"; -}; - -&i2c0 { - status = "okay"; - - vdd_cpu: regulator@1c { - compatible = "tcs,tcs4525"; - reg = <0x1c>; - fcs,suspend-voltage-selector = <1>; - regulator-name = "vdd_cpu"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <1150000>; - regulator-ramp-delay = <2300>; - vin-supply = <&vcc5v_input>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - rk809: pmic@20 { - compatible = "rockchip,rk809"; - reg = <0x20>; - interrupt-parent = <&gpio0>; - interrupts = ; - #clock-cells = <1>; - pinctrl-names = "default"; - pinctrl-0 = <&pmic_int>; - rockchip,system-power-controller; - wakeup-source; - - vcc1-supply = <&vcc3v3_sys>; - vcc2-supply = <&vcc3v3_sys>; - vcc3-supply = <&vcc3v3_sys>; - vcc4-supply = <&vcc3v3_sys>; - vcc5-supply = <&vcc3v3_sys>; - vcc6-supply = <&vcc3v3_sys>; - vcc7-supply = <&vcc3v3_sys>; - vcc8-supply = <&vcc3v3_sys>; - vcc9-supply = <&vcc3v3_sys>; - - regulators { - vdd_logic: DCDC_REG1 { - regulator-name = "vdd_logic"; - regulator-always-on; - regulator-boot-on; - regulator-initial-mode = <0x2>; - regulator-min-microvolt = <500000>; - regulator-max-microvolt = <1350000>; - regulator-ramp-delay = <6001>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_gpu: DCDC_REG2 { - regulator-name = "vdd_gpu"; - regulator-always-on; - regulator-initial-mode = <0x2>; - regulator-min-microvolt = <500000>; - regulator-max-microvolt = <1350000>; - regulator-ramp-delay = <6001>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_ddr: DCDC_REG3 { - regulator-name = "vcc_ddr"; - regulator-always-on; - regulator-boot-on; - regulator-initial-mode = <0x2>; - - regulator-state-mem { - regulator-on-in-suspend; - }; - }; - - vdd_npu: DCDC_REG4 { - regulator-name = "vdd_npu"; - regulator-initial-mode = <0x2>; - regulator-min-microvolt = <500000>; - regulator-max-microvolt = <1350000>; - regulator-ramp-delay = <6001>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_1v8: DCDC_REG5 { - regulator-name = "vcc_1v8"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdda0v9_image: LDO_REG1 { - regulator-name = "vdda0v9_image"; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <900000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdda_0v9: LDO_REG2 { - regulator-name = "vdda_0v9"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <900000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdda0v9_pmu: LDO_REG3 { - regulator-name = "vdda0v9_pmu"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <900000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <900000>; - }; - }; - - vccio_acodec: LDO_REG4 { - regulator-name = "vccio_acodec"; - regulator-always-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vccio_sd: LDO_REG5 { - regulator-name = "vccio_sd"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc3v3_pmu: LDO_REG6 { - regulator-name = "vcc3v3_pmu"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <3300000>; - }; - }; - - vcca_1v8: LDO_REG7 { - regulator-name = "vcca_1v8"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcca1v8_pmu: LDO_REG8 { - regulator-name = "vcca1v8_pmu"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vcca1v8_image: LDO_REG9 { - regulator-name = "vcca1v8_image"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_3v3: SWITCH_REG1 { - regulator-name = "vcc_3v3"; - regulator-always-on; - regulator-boot-on; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc3v3_sd: SWITCH_REG2 { - regulator-name = "vcc3v3_sd"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - }; - }; -}; - -&pinctrl { - leds { - led_user_en: led_user_en { - rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - pmic { - pmic_int: pmic_int { - rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; -}; - -&pmu_io_domains { - pmuio1-supply = <&vcc3v3_pmu>; - pmuio2-supply = <&vcc3v3_pmu>; - vccio1-supply = <&vccio_acodec>; - vccio2-supply = <&vcc_1v8>; - vccio3-supply = <&vccio_sd>; - vccio4-supply = <&vcc_1v8>; - vccio5-supply = <&vcc_3v3>; - vccio6-supply = <&vcc_1v8>; - vccio7-supply = <&vcc_3v3>; - status = "okay"; -}; - -&saradc { - vref-supply = <&vcca_1v8>; - status = "okay"; -}; - -&sdhci { - bus-width = <8>; - max-frequency = <200000000>; - non-removable; - pinctrl-names = "default"; - pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>; - vmmc-supply = <&vcc_3v3>; - vqmmc-supply = <&vcc_1v8>; - status = "okay"; -}; - -&tsadc { - rockchip,hw-tshut-mode = <1>; - rockchip,hw-tshut-polarity = <0>; - status = "okay"; -}; - -&uart2 { - status = "okay"; -}; - -&usb2phy0 { - status = "okay"; -}; - -&usb2phy1 { - status = "okay"; -}; - -&usb_host0_xhci { - extcon = <&usb2phy0>; -}; diff --git a/arch/arm/dts/rk3568-radxa-e25.dts b/arch/arm/dts/rk3568-radxa-e25.dts deleted file mode 100644 index 72ad74c38a2..00000000000 --- a/arch/arm/dts/rk3568-radxa-e25.dts +++ /dev/null @@ -1,236 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) - -/dts-v1/; -#include "rk3568-radxa-cm3i.dtsi" - -/ { - model = "Radxa E25 Carrier Board"; - compatible = "radxa,e25", "radxa,cm3i", "rockchip,rk3568"; - - aliases { - mmc1 = &sdmmc0; - }; - - pwm-leds { - compatible = "pwm-leds-multicolor"; - - multi-led { - color = ; - max-brightness = <255>; - - led-red { - color = ; - pwms = <&pwm1 0 1000000 0>; - }; - - led-green { - color = ; - pwms = <&pwm2 0 1000000 0>; - }; - - led-blue { - color = ; - pwms = <&pwm12 0 1000000 0>; - }; - }; - }; - - vbus_typec: vbus-typec-regulator { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&vbus_typec_en>; - regulator-name = "vbus_typec"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - vin-supply = <&vcc5v0_sys>; - }; - - /* actually fed by vcc5v0_sys, dependent - * on pi6c clock generator - */ - vcc3v3_minipcie: vcc3v3-minipcie-regulator { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <&gpio3 RK_PA7 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&minipcie_enable_h>; - regulator-name = "vcc3v3_minipcie"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <&vcc3v3_pi6c_05>; - }; - - vcc3v3_ngff: vcc3v3-ngff-regulator { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&ngffpcie_enable_h>; - regulator-name = "vcc3v3_ngff"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <&vcc5v0_sys>; - }; - - vcc3v3_pcie30x1: vcc3v3-pcie30x1-regulator { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&pcie30x1_enable_h>; - regulator-name = "vcc3v3_pcie30x1"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <&vcc5v0_sys>; - }; - - vcc3v3_pi6c_05: vcc3v3-pi6c-05-regulator { - compatible = "regulator-fixed"; - enable-active-high; - gpios = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&pcie_enable_h>; - regulator-name = "vcc3v3_pcie"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <&vcc5v0_sys>; - }; -}; - -&combphy1 { - phy-supply = <&vcc3v3_pcie30x1>; -}; - -&pcie2x1 { - pinctrl-names = "default"; - pinctrl-0 = <&pcie20_reset_h>; - reset-gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>; - vpcie3v3-supply = <&vcc3v3_pi6c_05>; - status = "okay"; -}; - -&pcie30phy { - data-lanes = <1 2>; - status = "okay"; -}; - -&pcie3x1 { - num-lanes = <1>; - pinctrl-names = "default"; - pinctrl-0 = <&pcie30x1m0_pins>; - reset-gpios = <&gpio0 RK_PC3 GPIO_ACTIVE_HIGH>; - vpcie3v3-supply = <&vcc3v3_minipcie>; - status = "okay"; -}; - -&pcie3x2 { - num-lanes = <1>; - pinctrl-names = "default"; - pinctrl-0 = <&pcie30x2_reset_h>; - reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>; - vpcie3v3-supply = <&vcc3v3_pi6c_05>; - status = "okay"; -}; - -&pinctrl { - pcie { - pcie20_reset_h: pcie20-reset-h { - rockchip,pins = <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - pcie30x1_enable_h: pcie30x1-enable-h { - rockchip,pins = <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - pcie30x2_reset_h: pcie30x2-reset-h { - rockchip,pins = <2 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - pcie_enable_h: pcie-enable-h { - rockchip,pins = <0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - usb { - minipcie_enable_h: minipcie-enable-h { - rockchip,pins = <3 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - ngffpcie_enable_h: ngffpcie-enable-h { - rockchip,pins = <0 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - vbus_typec_en: vbus_typec_en { - rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; -}; - -&pwm1 { - status = "okay"; -}; - -&pwm2 { - status = "okay"; -}; - -&pwm12 { - pinctrl-names = "default"; - pinctrl-0 = <&pwm12m1_pins>; - status = "okay"; -}; - -&sata1 { - status = "okay"; -}; - -&sdmmc0 { - bus-width = <4>; - cap-sd-highspeed; - cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>; - /* Also used in pcie30x1_clkreqnm0 */ - disable-wp; - pinctrl-names = "default"; - pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd>; - sd-uhs-sdr104; - vmmc-supply = <&vcc3v3_sd>; - vqmmc-supply = <&vccio_sd>; - status = "okay"; -}; - -&usb_host0_ehci { - status = "okay"; -}; - -&usb_host0_ohci { - status = "okay"; -}; - -&usb_host0_xhci { - status = "okay"; -}; - -&usb_host1_ehci { - status = "okay"; -}; - -&usb_host1_ohci { - status = "okay"; -}; - -&usb2phy0_otg { - phy-supply = <&vbus_typec>; - status = "okay"; -}; - -&usb2phy1_host { - phy-supply = <&vcc3v3_minipcie>; - status = "okay"; -}; - -&usb2phy1_otg { - phy-supply = <&vcc3v3_ngff>; - status = "okay"; -}; diff --git a/arch/arm/dts/rk3568-rock-3a.dts b/arch/arm/dts/rk3568-rock-3a.dts deleted file mode 100644 index a5e974ea659..00000000000 --- a/arch/arm/dts/rk3568-rock-3a.dts +++ /dev/null @@ -1,859 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) - -/dts-v1/; -#include -#include -#include -#include -#include "rk3568.dtsi" - -/ { - model = "Radxa ROCK3 Model A"; - compatible = "radxa,rock3a", "rockchip,rk3568"; - - aliases { - ethernet0 = &gmac1; - mmc0 = &sdhci; - mmc1 = &sdmmc0; - mmc2 = &sdmmc2; - }; - - chosen: chosen { - stdout-path = "serial2:1500000n8"; - }; - - hdmi-con { - compatible = "hdmi-connector"; - type = "a"; - - port { - hdmi_con_in: endpoint { - remote-endpoint = <&hdmi_out_con>; - }; - }; - }; - - gmac1_clkin: external-gmac1-clock { - compatible = "fixed-clock"; - clock-frequency = <125000000>; - clock-output-names = "gmac1_clkin"; - #clock-cells = <0>; - }; - - leds { - compatible = "gpio-leds"; - - led_user: led-0 { - gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>; - function = LED_FUNCTION_HEARTBEAT; - color = ; - linux,default-trigger = "heartbeat"; - pinctrl-names = "default"; - pinctrl-0 = <&led_user_en>; - }; - }; - - rk809-sound { - compatible = "simple-audio-card"; - simple-audio-card,format = "i2s"; - simple-audio-card,name = "Analog RK809"; - simple-audio-card,mclk-fs = <256>; - - simple-audio-card,cpu { - sound-dai = <&i2s1_8ch>; - }; - - simple-audio-card,codec { - sound-dai = <&rk809>; - }; - }; - - sdio_pwrseq: sdio-pwrseq { - compatible = "mmc-pwrseq-simple"; - clocks = <&rk809 1>; - clock-names = "ext_clock"; - pinctrl-names = "default"; - pinctrl-0 = <&wifi_enable>; - post-power-on-delay-ms = <100>; - power-off-delay-us = <5000000>; - reset-gpios = <&gpio3 RK_PD4 GPIO_ACTIVE_LOW>; - }; - - vcc12v_dcin: vcc12v-dcin-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc12v_dcin"; - regulator-always-on; - regulator-boot-on; - }; - - pcie30_avdd0v9: pcie30-avdd0v9-regulator { - compatible = "regulator-fixed"; - regulator-name = "pcie30_avdd0v9"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <900000>; - vin-supply = <&vcc3v3_sys>; - }; - - pcie30_avdd1v8: pcie30-avdd1v8-regulator { - compatible = "regulator-fixed"; - regulator-name = "pcie30_avdd1v8"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - vin-supply = <&vcc3v3_sys>; - }; - - /* pi6c pcie clock generator */ - vcc3v3_pi6c_03: vcc3v3-pi6c-03-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc3v3_pi6c_03"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <&vcc5v0_sys>; - }; - - vcc3v3_pcie: vcc3v3-pcie-regulator { - compatible = "regulator-fixed"; - enable-active-high; - gpios = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&pcie_enable_h>; - regulator-name = "vcc3v3_pcie"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <&vcc5v0_sys>; - }; - - vcc3v3_sys: vcc3v3-sys-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc3v3_sys"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <&vcc12v_dcin>; - }; - - vcc5v0_sys: vcc5v0-sys-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc5v0_sys"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - vin-supply = <&vcc12v_dcin>; - }; - - vcc5v0_usb: vcc5v0-usb-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc5v0_usb"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - vin-supply = <&vcc12v_dcin>; - }; - - vcc5v0_usb_host: vcc5v0-usb-host-regulator { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&vcc5v0_usb_host_en>; - regulator-name = "vcc5v0_usb_host"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - vin-supply = <&vcc5v0_usb>; - }; - - vcc5v0_usb_hub: vcc5v0-usb-hub-regulator { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&vcc5v0_usb_hub_en>; - regulator-name = "vcc5v0_usb_hub"; - regulator-always-on; - vin-supply = <&vcc5v0_usb>; - }; - - vcc5v0_usb_otg: vcc5v0-usb-otg-regulator { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&vcc5v0_usb_otg_en>; - regulator-name = "vcc5v0_usb_otg"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - vin-supply = <&vcc5v0_usb>; - }; - - vcc_cam: vcc-cam-regulator { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <&gpio1 RK_PB1 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&vcc_cam_en>; - regulator-name = "vcc_cam"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <&vcc3v3_sys>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_mipi: vcc-mipi-regulator { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <&gpio3 RK_PC0 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&vcc_mipi_en>; - regulator-name = "vcc_mipi"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <&vcc3v3_sys>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; -}; - -&combphy0 { - status = "okay"; -}; - -&combphy1 { - status = "okay"; -}; - -&combphy2 { - status = "okay"; -}; - -&cpu0 { - cpu-supply = <&vdd_cpu>; -}; - -&cpu1 { - cpu-supply = <&vdd_cpu>; -}; - -&cpu2 { - cpu-supply = <&vdd_cpu>; -}; - -&cpu3 { - cpu-supply = <&vdd_cpu>; -}; - -&gmac1 { - assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>; - assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&gmac1_clkin>; - clock_in_out = "input"; - phy-handle = <&rgmii_phy1>; - phy-mode = "rgmii-id"; - phy-supply = <&vcc_3v3>; - pinctrl-names = "default"; - pinctrl-0 = <&gmac1m1_miim - &gmac1m1_tx_bus2 - &gmac1m1_rx_bus2 - &gmac1m1_rgmii_clk - &gmac1m1_clkinout - &gmac1m1_rgmii_bus>; - status = "okay"; -}; - -&gpu { - mali-supply = <&vdd_gpu>; - status = "okay"; -}; - -&hdmi { - avdd-0v9-supply = <&vdda0v9_image>; - avdd-1v8-supply = <&vcca1v8_image>; - pinctrl-names = "default"; - pinctrl-0 = <&hdmitx_scl &hdmitx_sda &hdmitxm1_cec>; - status = "okay"; -}; - -&hdmi_in { - hdmi_in_vp0: endpoint { - remote-endpoint = <&vp0_out_hdmi>; - }; -}; - -&hdmi_out { - hdmi_out_con: endpoint { - remote-endpoint = <&hdmi_con_in>; - }; -}; - -&hdmi_sound { - status = "okay"; -}; - -&i2c0 { - status = "okay"; - - vdd_cpu: regulator@1c { - compatible = "tcs,tcs4525"; - reg = <0x1c>; - fcs,suspend-voltage-selector = <1>; - regulator-name = "vdd_cpu"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <1150000>; - regulator-ramp-delay = <2300>; - vin-supply = <&vcc5v0_sys>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - rk809: pmic@20 { - compatible = "rockchip,rk809"; - reg = <0x20>; - interrupt-parent = <&gpio0>; - interrupts = ; - assigned-clocks = <&cru I2S1_MCLKOUT_TX>; - assigned-clock-parents = <&cru CLK_I2S1_8CH_TX>; - #clock-cells = <1>; - clock-names = "mclk"; - clocks = <&cru I2S1_MCLKOUT_TX>; - pinctrl-names = "default"; - pinctrl-0 = <&pmic_int>, <&i2s1m0_mclk>; - rockchip,system-power-controller; - #sound-dai-cells = <0>; - vcc1-supply = <&vcc3v3_sys>; - vcc2-supply = <&vcc3v3_sys>; - vcc3-supply = <&vcc3v3_sys>; - vcc4-supply = <&vcc3v3_sys>; - vcc5-supply = <&vcc3v3_sys>; - vcc6-supply = <&vcc3v3_sys>; - vcc7-supply = <&vcc3v3_sys>; - vcc8-supply = <&vcc3v3_sys>; - vcc9-supply = <&vcc3v3_sys>; - wakeup-source; - - regulators { - vdd_logic: DCDC_REG1 { - regulator-name = "vdd_logic"; - regulator-always-on; - regulator-boot-on; - regulator-initial-mode = <0x2>; - regulator-min-microvolt = <500000>; - regulator-max-microvolt = <1350000>; - regulator-ramp-delay = <6001>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_gpu: DCDC_REG2 { - regulator-name = "vdd_gpu"; - regulator-always-on; - regulator-initial-mode = <0x2>; - regulator-min-microvolt = <500000>; - regulator-max-microvolt = <1350000>; - regulator-ramp-delay = <6001>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_ddr: DCDC_REG3 { - regulator-name = "vcc_ddr"; - regulator-always-on; - regulator-boot-on; - regulator-initial-mode = <0x2>; - - regulator-state-mem { - regulator-on-in-suspend; - }; - }; - - vdd_npu: DCDC_REG4 { - regulator-name = "vdd_npu"; - regulator-initial-mode = <0x2>; - regulator-min-microvolt = <500000>; - regulator-max-microvolt = <1350000>; - regulator-ramp-delay = <6001>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_1v8: DCDC_REG5 { - regulator-name = "vcc_1v8"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdda0v9_image: LDO_REG1 { - regulator-name = "vdda0v9_image"; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <900000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdda_0v9: LDO_REG2 { - regulator-name = "vdda_0v9"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <900000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdda0v9_pmu: LDO_REG3 { - regulator-name = "vdda0v9_pmu"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <900000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <900000>; - }; - }; - - vccio_acodec: LDO_REG4 { - regulator-name = "vccio_acodec"; - regulator-always-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vccio_sd: LDO_REG5 { - regulator-name = "vccio_sd"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc3v3_pmu: LDO_REG6 { - regulator-name = "vcc3v3_pmu"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <3300000>; - }; - }; - - vcca_1v8: LDO_REG7 { - regulator-name = "vcca_1v8"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcca1v8_pmu: LDO_REG8 { - regulator-name = "vcca1v8_pmu"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vcca1v8_image: LDO_REG9 { - regulator-name = "vcca1v8_image"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_3v3: SWITCH_REG1 { - regulator-name = "vcc_3v3"; - regulator-always-on; - regulator-boot-on; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc3v3_sd: SWITCH_REG2 { - regulator-name = "vcc3v3_sd"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - }; - - codec { - mic-in-differential; - }; - }; -}; - -&i2c3 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c3m1_xfer>; - status = "disabled"; -}; - -&i2c4 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c4m1_xfer>; - status = "disabled"; -}; - -&i2c5 { - status = "okay"; - - hym8563: rtc@51 { - compatible = "haoyu,hym8563"; - reg = <0x51>; - interrupt-parent = <&gpio0>; - interrupts = ; - #clock-cells = <0>; - clock-output-names = "rtcic_32kout"; - pinctrl-names = "default"; - pinctrl-0 = <&hym8563_int>; - wakeup-source; - }; -}; - -&i2s0_8ch { - status = "okay"; -}; - -&i2s1_8ch { - pinctrl-names = "default"; - pinctrl-0 = <&i2s1m0_sclktx &i2s1m0_lrcktx &i2s1m0_sdi0 &i2s1m0_sdo0>; - rockchip,trcm-sync-tx-only; - status = "okay"; -}; - -&i2s2_2ch { - rockchip,trcm-sync-tx-only; - status = "okay"; -}; - -&mdio1 { - rgmii_phy1: ethernet-phy@0 { - compatible = "ethernet-phy-ieee802.3-c22"; - reg = <0x0>; - pinctrl-names = "default"; - pinctrl-0 = <ð_phy_rst>; - reset-assert-us = <20000>; - reset-deassert-us = <100000>; - reset-gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_LOW>; - }; -}; - -&pcie2x1 { - pinctrl-names = "default"; - pinctrl-0 = <&pcie_reset_h>; - reset-gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>; - vpcie3v3-supply = <&vcc3v3_pcie>; - status = "okay"; -}; - -&pcie30phy { - phy-supply = <&vcc3v3_pi6c_03>; - status = "okay"; -}; - -&pcie3x2 { - pinctrl-names = "default"; - pinctrl-0 = <&pcie30x2m1_pins>; - reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>; - vpcie3v3-supply = <&vcc3v3_pcie>; - status = "okay"; -}; - -&pinctrl { - cam { - vcc_cam_en: vcc_cam_en { - rockchip,pins = <1 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - display { - vcc_mipi_en: vcc_mipi_en { - rockchip,pins = <3 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - ethernet { - eth_phy_rst: eth_phy_rst { - rockchip,pins = <3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - hym8563 { - hym8563_int: hym8563-int { - rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - leds { - led_user_en: led_user_en { - rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - pcie { - pcie_enable_h: pcie-enable-h { - rockchip,pins = <0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - pcie_reset_h: pcie-reset-h { - rockchip,pins = <3 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - pmic { - pmic_int: pmic_int { - rockchip,pins = - <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - usb { - vcc5v0_usb_host_en: vcc5v0_usb_host_en { - rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; - }; - vcc5v0_usb_hub_en: vcc5v0_usb_hub_en { - rockchip,pins = <0 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>; - }; - vcc5v0_usb_otg_en: vcc5v0_usb_otg_en { - rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - bt { - bt_enable: bt-enable { - rockchip,pins = <4 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - bt_host_wake: bt-host-wake { - rockchip,pins = <4 RK_PB4 RK_FUNC_GPIO &pcfg_pull_down>; - }; - - bt_wake: bt-wake { - rockchip,pins = <4 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - sdio-pwrseq { - wifi_enable: wifi-enable { - rockchip,pins = <3 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; -}; - -&pmu_io_domains { - pmuio1-supply = <&vcc3v3_pmu>; - pmuio2-supply = <&vcc3v3_pmu>; - vccio1-supply = <&vccio_acodec>; - vccio2-supply = <&vcc_1v8>; - vccio3-supply = <&vccio_sd>; - vccio4-supply = <&vcc_1v8>; - vccio5-supply = <&vcc_3v3>; - vccio6-supply = <&vcc_1v8>; - vccio7-supply = <&vcc_3v3>; - status = "okay"; -}; - -&saradc { - vref-supply = <&vcca_1v8>; - status = "okay"; -}; - -&sdhci { - bus-width = <8>; - max-frequency = <200000000>; - non-removable; - pinctrl-names = "default"; - pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>; - vmmc-supply = <&vcc_3v3>; - vqmmc-supply = <&vcc_1v8>; - status = "okay"; -}; - -&sdmmc0 { - bus-width = <4>; - cap-sd-highspeed; - cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>; - disable-wp; - pinctrl-names = "default"; - pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>; - sd-uhs-sdr50; - vmmc-supply = <&vcc3v3_sd>; - vqmmc-supply = <&vccio_sd>; - status = "okay"; -}; - -&sdmmc2 { - bus-width = <4>; - disable-wp; - cap-sd-highspeed; - cap-sdio-irq; - keep-power-in-suspend; - mmc-pwrseq = <&sdio_pwrseq>; - non-removable; - pinctrl-names = "default"; - pinctrl-0 = <&sdmmc2m0_bus4 &sdmmc2m0_cmd &sdmmc2m0_clk>; - sd-uhs-sdr12; - sd-uhs-sdr25; - sd-uhs-sdr50; - sd-uhs-sdr104; - vmmc-supply = <&vcc3v3_sys>; - vqmmc-supply = <&vcc_1v8>; - status = "okay"; -}; - -&tsadc { - rockchip,hw-tshut-mode = <1>; - rockchip,hw-tshut-polarity = <0>; - status = "okay"; -}; - -&uart1 { - pinctrl-names = "default"; - pinctrl-0 = <&uart1m0_xfer &uart1m0_ctsn &uart1m0_rtsn>; - uart-has-rtscts; - status = "okay"; - - bluetooth { - compatible = "brcm,bcm43438-bt"; - clocks = <&rk809 1>; - clock-names = "lpo"; - device-wakeup-gpios = <&gpio4 RK_PB5 GPIO_ACTIVE_HIGH>; - host-wakeup-gpios = <&gpio4 RK_PB4 GPIO_ACTIVE_HIGH>; - shutdown-gpios = <&gpio4 RK_PB2 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&bt_host_wake &bt_wake &bt_enable>; - vbat-supply = <&vcc3v3_sys>; - vddio-supply = <&vcc_1v8>; - /* vddio comes from regulator on module, use IO bank voltage instead */ - }; -}; - -&uart2 { - status = "okay"; -}; - -&usb_host0_ehci { - status = "okay"; -}; - -&usb_host0_ohci { - status = "okay"; -}; - -&usb_host0_xhci { - extcon = <&usb2phy0>; - status = "okay"; -}; - -&usb_host1_ehci { - status = "okay"; -}; - -&usb_host1_ohci { - status = "okay"; -}; - -&usb_host1_xhci { - status = "okay"; -}; - -&usb2phy0 { - status = "okay"; -}; - -&usb2phy0_host { - phy-supply = <&vcc5v0_usb_host>; - status = "okay"; -}; - -&usb2phy0_otg { - phy-supply = <&vcc5v0_usb_otg>; - status = "okay"; -}; - -&usb2phy1 { - status = "okay"; -}; - -&usb2phy1_host { - phy-supply = <&vcc5v0_usb_host>; - status = "okay"; -}; - -&usb2phy1_otg { - phy-supply = <&vcc5v0_usb_host>; - status = "okay"; -}; - -&vop { - assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>; - assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>; - status = "okay"; -}; - -&vop_mmu { - status = "okay"; -}; - -&vp0 { - vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 { - reg = ; - remote-endpoint = <&hdmi_in_vp0>; - }; -}; diff --git a/arch/arm/dts/rk3568.dtsi b/arch/arm/dts/rk3568.dtsi deleted file mode 100644 index f1be76a54ce..00000000000 --- a/arch/arm/dts/rk3568.dtsi +++ /dev/null @@ -1,267 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (c) 2021 Rockchip Electronics Co., Ltd. - */ - -#include "rk356x.dtsi" - -/ { - compatible = "rockchip,rk3568"; - - sata0: sata@fc000000 { - compatible = "rockchip,rk3568-dwc-ahci", "snps,dwc-ahci"; - reg = <0 0xfc000000 0 0x1000>; - clocks = <&cru ACLK_SATA0>, <&cru CLK_SATA0_PMALIVE>, - <&cru CLK_SATA0_RXOOB>; - clock-names = "sata", "pmalive", "rxoob"; - interrupts = ; - phys = <&combphy0 PHY_TYPE_SATA>; - phy-names = "sata-phy"; - ports-implemented = <0x1>; - power-domains = <&power RK3568_PD_PIPE>; - status = "disabled"; - }; - - pipe_phy_grf0: syscon@fdc70000 { - compatible = "rockchip,rk3568-pipe-phy-grf", "syscon"; - reg = <0x0 0xfdc70000 0x0 0x1000>; - }; - - qos_pcie3x1: qos@fe190080 { - compatible = "rockchip,rk3568-qos", "syscon"; - reg = <0x0 0xfe190080 0x0 0x20>; - }; - - qos_pcie3x2: qos@fe190100 { - compatible = "rockchip,rk3568-qos", "syscon"; - reg = <0x0 0xfe190100 0x0 0x20>; - }; - - qos_sata0: qos@fe190200 { - compatible = "rockchip,rk3568-qos", "syscon"; - reg = <0x0 0xfe190200 0x0 0x20>; - }; - - pcie30_phy_grf: syscon@fdcb8000 { - compatible = "rockchip,rk3568-pcie3-phy-grf", "syscon"; - reg = <0x0 0xfdcb8000 0x0 0x10000>; - }; - - pcie30phy: phy@fe8c0000 { - compatible = "rockchip,rk3568-pcie3-phy"; - reg = <0x0 0xfe8c0000 0x0 0x20000>; - #phy-cells = <0>; - clocks = <&pmucru CLK_PCIE30PHY_REF_M>, <&pmucru CLK_PCIE30PHY_REF_N>, - <&cru PCLK_PCIE30PHY>; - clock-names = "refclk_m", "refclk_n", "pclk"; - resets = <&cru SRST_PCIE30PHY>; - reset-names = "phy"; - rockchip,phy-grf = <&pcie30_phy_grf>; - status = "disabled"; - }; - - pcie3x1: pcie@fe270000 { - compatible = "rockchip,rk3568-pcie"; - #address-cells = <3>; - #size-cells = <2>; - bus-range = <0x0 0xf>; - clocks = <&cru ACLK_PCIE30X1_MST>, <&cru ACLK_PCIE30X1_SLV>, - <&cru ACLK_PCIE30X1_DBI>, <&cru PCLK_PCIE30X1>, - <&cru CLK_PCIE30X1_AUX_NDFT>; - clock-names = "aclk_mst", "aclk_slv", - "aclk_dbi", "pclk", "aux"; - device_type = "pci"; - interrupts = , - , - , - , - ; - interrupt-names = "sys", "pmc", "msg", "legacy", "err"; - #interrupt-cells = <1>; - interrupt-map-mask = <0 0 0 7>; - interrupt-map = <0 0 0 1 &pcie3x1_intc 0>, - <0 0 0 2 &pcie3x1_intc 1>, - <0 0 0 3 &pcie3x1_intc 2>, - <0 0 0 4 &pcie3x1_intc 3>; - linux,pci-domain = <1>; - num-ib-windows = <6>; - num-ob-windows = <2>; - max-link-speed = <3>; - msi-map = <0x0 &gic 0x1000 0x1000>; - num-lanes = <1>; - phys = <&pcie30phy>; - phy-names = "pcie-phy"; - power-domains = <&power RK3568_PD_PIPE>; - reg = <0x3 0xc0400000 0x0 0x00400000>, - <0x0 0xfe270000 0x0 0x00010000>, - <0x0 0xf2000000 0x0 0x00100000>; - ranges = <0x01000000 0x0 0xf2100000 0x0 0xf2100000 0x0 0x00100000>, - <0x02000000 0x0 0xf2200000 0x0 0xf2200000 0x0 0x01e00000>, - <0x03000000 0x0 0x40000000 0x3 0x40000000 0x0 0x40000000>; - reg-names = "dbi", "apb", "config"; - resets = <&cru SRST_PCIE30X1_POWERUP>; - reset-names = "pipe"; - /* bifurcation; lane1 when using 1+1 */ - status = "disabled"; - - pcie3x1_intc: legacy-interrupt-controller { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <1>; - interrupt-parent = <&gic>; - interrupts = ; - }; - }; - - pcie3x2: pcie@fe280000 { - compatible = "rockchip,rk3568-pcie"; - #address-cells = <3>; - #size-cells = <2>; - bus-range = <0x0 0xf>; - clocks = <&cru ACLK_PCIE30X2_MST>, <&cru ACLK_PCIE30X2_SLV>, - <&cru ACLK_PCIE30X2_DBI>, <&cru PCLK_PCIE30X2>, - <&cru CLK_PCIE30X2_AUX_NDFT>; - clock-names = "aclk_mst", "aclk_slv", - "aclk_dbi", "pclk", "aux"; - device_type = "pci"; - interrupts = , - , - , - , - ; - interrupt-names = "sys", "pmc", "msg", "legacy", "err"; - #interrupt-cells = <1>; - interrupt-map-mask = <0 0 0 7>; - interrupt-map = <0 0 0 1 &pcie3x2_intc 0>, - <0 0 0 2 &pcie3x2_intc 1>, - <0 0 0 3 &pcie3x2_intc 2>, - <0 0 0 4 &pcie3x2_intc 3>; - linux,pci-domain = <2>; - num-ib-windows = <6>; - num-ob-windows = <2>; - max-link-speed = <3>; - msi-map = <0x0 &gic 0x2000 0x1000>; - num-lanes = <2>; - phys = <&pcie30phy>; - phy-names = "pcie-phy"; - power-domains = <&power RK3568_PD_PIPE>; - reg = <0x3 0xc0800000 0x0 0x00400000>, - <0x0 0xfe280000 0x0 0x00010000>, - <0x0 0xf0000000 0x0 0x00100000>; - ranges = <0x01000000 0x0 0xf0100000 0x0 0xf0100000 0x0 0x00100000>, - <0x02000000 0x0 0xf0200000 0x0 0xf0200000 0x0 0x01e00000>, - <0x03000000 0x0 0x40000000 0x3 0x80000000 0x0 0x40000000>; - reg-names = "dbi", "apb", "config"; - resets = <&cru SRST_PCIE30X2_POWERUP>; - reset-names = "pipe"; - /* bifurcation; lane0 when using 1+1 */ - status = "disabled"; - - pcie3x2_intc: legacy-interrupt-controller { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <1>; - interrupt-parent = <&gic>; - interrupts = ; - }; - }; - - gmac0: ethernet@fe2a0000 { - compatible = "rockchip,rk3568-gmac", "snps,dwmac-4.20a"; - reg = <0x0 0xfe2a0000 0x0 0x10000>; - interrupts = , - ; - interrupt-names = "macirq", "eth_wake_irq"; - clocks = <&cru SCLK_GMAC0>, <&cru SCLK_GMAC0_RX_TX>, - <&cru SCLK_GMAC0_RX_TX>, <&cru CLK_MAC0_REFOUT>, - <&cru ACLK_GMAC0>, <&cru PCLK_GMAC0>, - <&cru SCLK_GMAC0_RX_TX>, <&cru CLK_GMAC0_PTP_REF>; - clock-names = "stmmaceth", "mac_clk_rx", - "mac_clk_tx", "clk_mac_refout", - "aclk_mac", "pclk_mac", - "clk_mac_speed", "ptp_ref"; - resets = <&cru SRST_A_GMAC0>; - reset-names = "stmmaceth"; - rockchip,grf = <&grf>; - snps,axi-config = <&gmac0_stmmac_axi_setup>; - snps,mixed-burst; - snps,mtl-rx-config = <&gmac0_mtl_rx_setup>; - snps,mtl-tx-config = <&gmac0_mtl_tx_setup>; - snps,tso; - status = "disabled"; - - mdio0: mdio { - compatible = "snps,dwmac-mdio"; - #address-cells = <0x1>; - #size-cells = <0x0>; - }; - - gmac0_stmmac_axi_setup: stmmac-axi-config { - snps,blen = <0 0 0 0 16 8 4>; - snps,rd_osr_lmt = <8>; - snps,wr_osr_lmt = <4>; - }; - - gmac0_mtl_rx_setup: rx-queues-config { - snps,rx-queues-to-use = <1>; - queue0 {}; - }; - - gmac0_mtl_tx_setup: tx-queues-config { - snps,tx-queues-to-use = <1>; - queue0 {}; - }; - }; - - combphy0: phy@fe820000 { - compatible = "rockchip,rk3568-naneng-combphy"; - reg = <0x0 0xfe820000 0x0 0x100>; - clocks = <&pmucru CLK_PCIEPHY0_REF>, - <&cru PCLK_PIPEPHY0>, - <&cru PCLK_PIPE>; - clock-names = "ref", "apb", "pipe"; - assigned-clocks = <&pmucru CLK_PCIEPHY0_REF>; - assigned-clock-rates = <100000000>; - resets = <&cru SRST_PIPEPHY0>; - rockchip,pipe-grf = <&pipegrf>; - rockchip,pipe-phy-grf = <&pipe_phy_grf0>; - #phy-cells = <1>; - status = "disabled"; - }; -}; - -&cpu0_opp_table { - opp-1992000000 { - opp-hz = /bits/ 64 <1992000000>; - opp-microvolt = <1150000 1150000 1150000>; - }; -}; - -&pipegrf { - compatible = "rockchip,rk3568-pipe-grf", "syscon"; -}; - -&power { - power-domain@RK3568_PD_PIPE { - reg = ; - clocks = <&cru PCLK_PIPE>; - pm_qos = <&qos_pcie2x1>, - <&qos_pcie3x1>, - <&qos_pcie3x2>, - <&qos_sata0>, - <&qos_sata1>, - <&qos_sata2>, - <&qos_usb3_0>, - <&qos_usb3_1>; - #power-domain-cells = <0>; - }; -}; - -&usb_host0_xhci { - phys = <&usb2phy0_otg>, <&combphy0 PHY_TYPE_USB3>; - phy-names = "usb2-phy", "usb3-phy"; -}; - -&vop { - compatible = "rockchip,rk3568-vop"; -}; diff --git a/arch/arm/dts/rk356x.dtsi b/arch/arm/dts/rk356x.dtsi deleted file mode 100644 index c19c0f1b377..00000000000 --- a/arch/arm/dts/rk356x.dtsi +++ /dev/null @@ -1,1886 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (c) 2021 Rockchip Electronics Co., Ltd. - */ - -#include -#include -#include -#include -#include -#include -#include -#include - -/ { - interrupt-parent = <&gic>; - #address-cells = <2>; - #size-cells = <2>; - - aliases { - gpio0 = &gpio0; - gpio1 = &gpio1; - gpio2 = &gpio2; - gpio3 = &gpio3; - gpio4 = &gpio4; - i2c0 = &i2c0; - i2c1 = &i2c1; - i2c2 = &i2c2; - i2c3 = &i2c3; - i2c4 = &i2c4; - i2c5 = &i2c5; - serial0 = &uart0; - serial1 = &uart1; - serial2 = &uart2; - serial3 = &uart3; - serial4 = &uart4; - serial5 = &uart5; - serial6 = &uart6; - serial7 = &uart7; - serial8 = &uart8; - serial9 = &uart9; - spi0 = &spi0; - spi1 = &spi1; - spi2 = &spi2; - spi3 = &spi3; - }; - - cpus { - #address-cells = <2>; - #size-cells = <0>; - - cpu0: cpu@0 { - device_type = "cpu"; - compatible = "arm,cortex-a55"; - reg = <0x0 0x0>; - clocks = <&scmi_clk 0>; - #cooling-cells = <2>; - enable-method = "psci"; - operating-points-v2 = <&cpu0_opp_table>; - }; - - cpu1: cpu@100 { - device_type = "cpu"; - compatible = "arm,cortex-a55"; - reg = <0x0 0x100>; - #cooling-cells = <2>; - enable-method = "psci"; - operating-points-v2 = <&cpu0_opp_table>; - }; - - cpu2: cpu@200 { - device_type = "cpu"; - compatible = "arm,cortex-a55"; - reg = <0x0 0x200>; - #cooling-cells = <2>; - enable-method = "psci"; - operating-points-v2 = <&cpu0_opp_table>; - }; - - cpu3: cpu@300 { - device_type = "cpu"; - compatible = "arm,cortex-a55"; - reg = <0x0 0x300>; - #cooling-cells = <2>; - enable-method = "psci"; - operating-points-v2 = <&cpu0_opp_table>; - }; - }; - - cpu0_opp_table: opp-table-0 { - compatible = "operating-points-v2"; - opp-shared; - - opp-408000000 { - opp-hz = /bits/ 64 <408000000>; - opp-microvolt = <900000 900000 1150000>; - clock-latency-ns = <40000>; - }; - - opp-600000000 { - opp-hz = /bits/ 64 <600000000>; - opp-microvolt = <900000 900000 1150000>; - }; - - opp-816000000 { - opp-hz = /bits/ 64 <816000000>; - opp-microvolt = <900000 900000 1150000>; - opp-suspend; - }; - - opp-1104000000 { - opp-hz = /bits/ 64 <1104000000>; - opp-microvolt = <900000 900000 1150000>; - }; - - opp-1416000000 { - opp-hz = /bits/ 64 <1416000000>; - opp-microvolt = <900000 900000 1150000>; - }; - - opp-1608000000 { - opp-hz = /bits/ 64 <1608000000>; - opp-microvolt = <975000 975000 1150000>; - }; - - opp-1800000000 { - opp-hz = /bits/ 64 <1800000000>; - opp-microvolt = <1050000 1050000 1150000>; - }; - }; - - display_subsystem: display-subsystem { - compatible = "rockchip,display-subsystem"; - ports = <&vop_out>; - }; - - firmware { - scmi: scmi { - compatible = "arm,scmi-smc"; - arm,smc-id = <0x82000010>; - shmem = <&scmi_shmem>; - #address-cells = <1>; - #size-cells = <0>; - - scmi_clk: protocol@14 { - reg = <0x14>; - #clock-cells = <1>; - }; - }; - }; - - gpu_opp_table: opp-table-1 { - compatible = "operating-points-v2"; - - opp-200000000 { - opp-hz = /bits/ 64 <200000000>; - opp-microvolt = <825000>; - }; - - opp-300000000 { - opp-hz = /bits/ 64 <300000000>; - opp-microvolt = <825000>; - }; - - opp-400000000 { - opp-hz = /bits/ 64 <400000000>; - opp-microvolt = <825000>; - }; - - opp-600000000 { - opp-hz = /bits/ 64 <600000000>; - opp-microvolt = <825000>; - }; - - opp-700000000 { - opp-hz = /bits/ 64 <700000000>; - opp-microvolt = <900000>; - }; - - opp-800000000 { - opp-hz = /bits/ 64 <800000000>; - opp-microvolt = <1000000>; - }; - }; - - hdmi_sound: hdmi-sound { - compatible = "simple-audio-card"; - simple-audio-card,name = "HDMI"; - simple-audio-card,format = "i2s"; - simple-audio-card,mclk-fs = <256>; - status = "disabled"; - - simple-audio-card,codec { - sound-dai = <&hdmi>; - }; - - simple-audio-card,cpu { - sound-dai = <&i2s0_8ch>; - }; - }; - - pmu { - compatible = "arm,cortex-a55-pmu"; - interrupts = , - , - , - ; - interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; - }; - - psci { - compatible = "arm,psci-1.0"; - method = "smc"; - }; - - timer { - compatible = "arm,armv8-timer"; - interrupts = , - , - , - ; - arm,no-tick-in-suspend; - }; - - xin24m: xin24m { - compatible = "fixed-clock"; - clock-frequency = <24000000>; - clock-output-names = "xin24m"; - #clock-cells = <0>; - }; - - xin32k: xin32k { - compatible = "fixed-clock"; - clock-frequency = <32768>; - clock-output-names = "xin32k"; - pinctrl-0 = <&clk32k_out0>; - pinctrl-names = "default"; - #clock-cells = <0>; - }; - - sram@10f000 { - compatible = "mmio-sram"; - reg = <0x0 0x0010f000 0x0 0x100>; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0x0 0x0010f000 0x100>; - - scmi_shmem: sram@0 { - compatible = "arm,scmi-shmem"; - reg = <0x0 0x100>; - }; - }; - - sata1: sata@fc400000 { - compatible = "rockchip,rk3568-dwc-ahci", "snps,dwc-ahci"; - reg = <0 0xfc400000 0 0x1000>; - clocks = <&cru ACLK_SATA1>, <&cru CLK_SATA1_PMALIVE>, - <&cru CLK_SATA1_RXOOB>; - clock-names = "sata", "pmalive", "rxoob"; - interrupts = ; - phys = <&combphy1 PHY_TYPE_SATA>; - phy-names = "sata-phy"; - ports-implemented = <0x1>; - power-domains = <&power RK3568_PD_PIPE>; - status = "disabled"; - }; - - sata2: sata@fc800000 { - compatible = "rockchip,rk3568-dwc-ahci", "snps,dwc-ahci"; - reg = <0 0xfc800000 0 0x1000>; - clocks = <&cru ACLK_SATA2>, <&cru CLK_SATA2_PMALIVE>, - <&cru CLK_SATA2_RXOOB>; - clock-names = "sata", "pmalive", "rxoob"; - interrupts = ; - phys = <&combphy2 PHY_TYPE_SATA>; - phy-names = "sata-phy"; - ports-implemented = <0x1>; - power-domains = <&power RK3568_PD_PIPE>; - status = "disabled"; - }; - - usb_host0_xhci: usb@fcc00000 { - compatible = "rockchip,rk3568-dwc3", "snps,dwc3"; - reg = <0x0 0xfcc00000 0x0 0x400000>; - interrupts = ; - clocks = <&cru CLK_USB3OTG0_REF>, <&cru CLK_USB3OTG0_SUSPEND>, - <&cru ACLK_USB3OTG0>; - clock-names = "ref_clk", "suspend_clk", - "bus_clk"; - dr_mode = "otg"; - phy_type = "utmi_wide"; - power-domains = <&power RK3568_PD_PIPE>; - resets = <&cru SRST_USB3OTG0>; - snps,dis_u2_susphy_quirk; - status = "disabled"; - }; - - usb_host1_xhci: usb@fd000000 { - compatible = "rockchip,rk3568-dwc3", "snps,dwc3"; - reg = <0x0 0xfd000000 0x0 0x400000>; - interrupts = ; - clocks = <&cru CLK_USB3OTG1_REF>, <&cru CLK_USB3OTG1_SUSPEND>, - <&cru ACLK_USB3OTG1>; - clock-names = "ref_clk", "suspend_clk", - "bus_clk"; - dr_mode = "host"; - phys = <&usb2phy0_host>, <&combphy1 PHY_TYPE_USB3>; - phy-names = "usb2-phy", "usb3-phy"; - phy_type = "utmi_wide"; - power-domains = <&power RK3568_PD_PIPE>; - resets = <&cru SRST_USB3OTG1>; - snps,dis_u2_susphy_quirk; - status = "disabled"; - }; - - gic: interrupt-controller@fd400000 { - compatible = "arm,gic-v3"; - reg = <0x0 0xfd400000 0 0x10000>, /* GICD */ - <0x0 0xfd460000 0 0x80000>; /* GICR */ - interrupts = ; - interrupt-controller; - #interrupt-cells = <3>; - mbi-alias = <0x0 0xfd410000>; - mbi-ranges = <296 24>; - msi-controller; - }; - - usb_host0_ehci: usb@fd800000 { - compatible = "generic-ehci"; - reg = <0x0 0xfd800000 0x0 0x40000>; - interrupts = ; - clocks = <&cru HCLK_USB2HOST0>, <&cru HCLK_USB2HOST0_ARB>, - <&cru PCLK_USB>; - phys = <&usb2phy1_otg>; - phy-names = "usb"; - status = "disabled"; - }; - - usb_host0_ohci: usb@fd840000 { - compatible = "generic-ohci"; - reg = <0x0 0xfd840000 0x0 0x40000>; - interrupts = ; - clocks = <&cru HCLK_USB2HOST0>, <&cru HCLK_USB2HOST0_ARB>, - <&cru PCLK_USB>; - phys = <&usb2phy1_otg>; - phy-names = "usb"; - status = "disabled"; - }; - - usb_host1_ehci: usb@fd880000 { - compatible = "generic-ehci"; - reg = <0x0 0xfd880000 0x0 0x40000>; - interrupts = ; - clocks = <&cru HCLK_USB2HOST1>, <&cru HCLK_USB2HOST1_ARB>, - <&cru PCLK_USB>; - phys = <&usb2phy1_host>; - phy-names = "usb"; - status = "disabled"; - }; - - usb_host1_ohci: usb@fd8c0000 { - compatible = "generic-ohci"; - reg = <0x0 0xfd8c0000 0x0 0x40000>; - interrupts = ; - clocks = <&cru HCLK_USB2HOST1>, <&cru HCLK_USB2HOST1_ARB>, - <&cru PCLK_USB>; - phys = <&usb2phy1_host>; - phy-names = "usb"; - status = "disabled"; - }; - - pmugrf: syscon@fdc20000 { - compatible = "rockchip,rk3568-pmugrf", "syscon", "simple-mfd"; - reg = <0x0 0xfdc20000 0x0 0x10000>; - - pmu_io_domains: io-domains { - compatible = "rockchip,rk3568-pmu-io-voltage-domain"; - status = "disabled"; - }; - }; - - pipegrf: syscon@fdc50000 { - reg = <0x0 0xfdc50000 0x0 0x1000>; - }; - - grf: syscon@fdc60000 { - compatible = "rockchip,rk3568-grf", "syscon", "simple-mfd"; - reg = <0x0 0xfdc60000 0x0 0x10000>; - }; - - pipe_phy_grf1: syscon@fdc80000 { - compatible = "rockchip,rk3568-pipe-phy-grf", "syscon"; - reg = <0x0 0xfdc80000 0x0 0x1000>; - }; - - pipe_phy_grf2: syscon@fdc90000 { - compatible = "rockchip,rk3568-pipe-phy-grf", "syscon"; - reg = <0x0 0xfdc90000 0x0 0x1000>; - }; - - usb2phy0_grf: syscon@fdca0000 { - compatible = "rockchip,rk3568-usb2phy-grf", "syscon"; - reg = <0x0 0xfdca0000 0x0 0x8000>; - }; - - usb2phy1_grf: syscon@fdca8000 { - compatible = "rockchip,rk3568-usb2phy-grf", "syscon"; - reg = <0x0 0xfdca8000 0x0 0x8000>; - }; - - pmucru: clock-controller@fdd00000 { - compatible = "rockchip,rk3568-pmucru"; - reg = <0x0 0xfdd00000 0x0 0x1000>; - #clock-cells = <1>; - #reset-cells = <1>; - }; - - cru: clock-controller@fdd20000 { - compatible = "rockchip,rk3568-cru"; - reg = <0x0 0xfdd20000 0x0 0x1000>; - clocks = <&xin24m>; - clock-names = "xin24m"; - #clock-cells = <1>; - #reset-cells = <1>; - assigned-clocks = <&pmucru CLK_RTC_32K>, <&cru PLL_GPLL>, <&pmucru PLL_PPLL>; - assigned-clock-rates = <32768>, <1200000000>, <200000000>; - assigned-clock-parents = <&pmucru CLK_RTC32K_FRAC>; - rockchip,grf = <&grf>; - }; - - i2c0: i2c@fdd40000 { - compatible = "rockchip,rk3568-i2c", "rockchip,rk3399-i2c"; - reg = <0x0 0xfdd40000 0x0 0x1000>; - interrupts = ; - clocks = <&pmucru CLK_I2C0>, <&pmucru PCLK_I2C0>; - clock-names = "i2c", "pclk"; - pinctrl-0 = <&i2c0_xfer>; - pinctrl-names = "default"; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - uart0: serial@fdd50000 { - compatible = "rockchip,rk3568-uart", "snps,dw-apb-uart"; - reg = <0x0 0xfdd50000 0x0 0x100>; - interrupts = ; - clocks = <&pmucru SCLK_UART0>, <&pmucru PCLK_UART0>; - clock-names = "baudclk", "apb_pclk"; - dmas = <&dmac0 0>, <&dmac0 1>; - pinctrl-0 = <&uart0_xfer>; - pinctrl-names = "default"; - reg-io-width = <4>; - reg-shift = <2>; - status = "disabled"; - }; - - pwm0: pwm@fdd70000 { - compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm"; - reg = <0x0 0xfdd70000 0x0 0x10>; - clocks = <&pmucru CLK_PWM0>, <&pmucru PCLK_PWM0>; - clock-names = "pwm", "pclk"; - pinctrl-0 = <&pwm0m0_pins>; - pinctrl-names = "default"; - #pwm-cells = <3>; - status = "disabled"; - }; - - pwm1: pwm@fdd70010 { - compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm"; - reg = <0x0 0xfdd70010 0x0 0x10>; - clocks = <&pmucru CLK_PWM0>, <&pmucru PCLK_PWM0>; - clock-names = "pwm", "pclk"; - pinctrl-0 = <&pwm1m0_pins>; - pinctrl-names = "default"; - #pwm-cells = <3>; - status = "disabled"; - }; - - pwm2: pwm@fdd70020 { - compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm"; - reg = <0x0 0xfdd70020 0x0 0x10>; - clocks = <&pmucru CLK_PWM0>, <&pmucru PCLK_PWM0>; - clock-names = "pwm", "pclk"; - pinctrl-0 = <&pwm2m0_pins>; - pinctrl-names = "default"; - #pwm-cells = <3>; - status = "disabled"; - }; - - pwm3: pwm@fdd70030 { - compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm"; - reg = <0x0 0xfdd70030 0x0 0x10>; - clocks = <&pmucru CLK_PWM0>, <&pmucru PCLK_PWM0>; - clock-names = "pwm", "pclk"; - pinctrl-0 = <&pwm3_pins>; - pinctrl-names = "default"; - #pwm-cells = <3>; - status = "disabled"; - }; - - pmu: power-management@fdd90000 { - compatible = "rockchip,rk3568-pmu", "syscon", "simple-mfd"; - reg = <0x0 0xfdd90000 0x0 0x1000>; - - power: power-controller { - compatible = "rockchip,rk3568-power-controller"; - #power-domain-cells = <1>; - #address-cells = <1>; - #size-cells = <0>; - - /* These power domains are grouped by VD_GPU */ - power-domain@RK3568_PD_GPU { - reg = ; - clocks = <&cru ACLK_GPU_PRE>, - <&cru PCLK_GPU_PRE>; - pm_qos = <&qos_gpu>; - #power-domain-cells = <0>; - }; - - /* These power domains are grouped by VD_LOGIC */ - power-domain@RK3568_PD_VI { - reg = ; - clocks = <&cru HCLK_VI>, - <&cru PCLK_VI>; - pm_qos = <&qos_isp>, - <&qos_vicap0>, - <&qos_vicap1>; - #power-domain-cells = <0>; - }; - - power-domain@RK3568_PD_VO { - reg = ; - clocks = <&cru HCLK_VO>, - <&cru PCLK_VO>, - <&cru ACLK_VOP_PRE>; - pm_qos = <&qos_hdcp>, - <&qos_vop_m0>, - <&qos_vop_m1>; - #power-domain-cells = <0>; - }; - - power-domain@RK3568_PD_RGA { - reg = ; - clocks = <&cru HCLK_RGA_PRE>, - <&cru PCLK_RGA_PRE>; - pm_qos = <&qos_ebc>, - <&qos_iep>, - <&qos_jpeg_dec>, - <&qos_jpeg_enc>, - <&qos_rga_rd>, - <&qos_rga_wr>; - #power-domain-cells = <0>; - }; - - power-domain@RK3568_PD_VPU { - reg = ; - clocks = <&cru HCLK_VPU_PRE>; - pm_qos = <&qos_vpu>; - #power-domain-cells = <0>; - }; - - power-domain@RK3568_PD_RKVDEC { - clocks = <&cru HCLK_RKVDEC_PRE>; - reg = ; - pm_qos = <&qos_rkvdec>; - #power-domain-cells = <0>; - }; - - power-domain@RK3568_PD_RKVENC { - reg = ; - clocks = <&cru HCLK_RKVENC_PRE>; - pm_qos = <&qos_rkvenc_rd_m0>, - <&qos_rkvenc_rd_m1>, - <&qos_rkvenc_wr_m0>; - #power-domain-cells = <0>; - }; - }; - }; - - gpu: gpu@fde60000 { - compatible = "rockchip,rk3568-mali", "arm,mali-bifrost"; - reg = <0x0 0xfde60000 0x0 0x4000>; - interrupts = , - , - ; - interrupt-names = "job", "mmu", "gpu"; - clocks = <&scmi_clk 1>, <&cru CLK_GPU>; - clock-names = "gpu", "bus"; - #cooling-cells = <2>; - operating-points-v2 = <&gpu_opp_table>; - power-domains = <&power RK3568_PD_GPU>; - status = "disabled"; - }; - - vpu: video-codec@fdea0400 { - compatible = "rockchip,rk3568-vpu"; - reg = <0x0 0xfdea0000 0x0 0x800>; - interrupts = ; - clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>; - clock-names = "aclk", "hclk"; - iommus = <&vdpu_mmu>; - power-domains = <&power RK3568_PD_VPU>; - }; - - vdpu_mmu: iommu@fdea0800 { - compatible = "rockchip,rk3568-iommu"; - reg = <0x0 0xfdea0800 0x0 0x40>; - interrupts = ; - clock-names = "aclk", "iface"; - clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>; - power-domains = <&power RK3568_PD_VPU>; - #iommu-cells = <0>; - }; - - rga: rga@fdeb0000 { - compatible = "rockchip,rk3568-rga", "rockchip,rk3288-rga"; - reg = <0x0 0xfdeb0000 0x0 0x180>; - interrupts = ; - clocks = <&cru ACLK_RGA>, <&cru HCLK_RGA>, <&cru CLK_RGA_CORE>; - clock-names = "aclk", "hclk", "sclk"; - resets = <&cru SRST_RGA_CORE>, <&cru SRST_A_RGA>, <&cru SRST_H_RGA>; - reset-names = "core", "axi", "ahb"; - power-domains = <&power RK3568_PD_RGA>; - }; - - vepu: video-codec@fdee0000 { - compatible = "rockchip,rk3568-vepu"; - reg = <0x0 0xfdee0000 0x0 0x800>; - interrupts = ; - clocks = <&cru ACLK_JENC>, <&cru HCLK_JENC>; - clock-names = "aclk", "hclk"; - iommus = <&vepu_mmu>; - power-domains = <&power RK3568_PD_RGA>; - }; - - vepu_mmu: iommu@fdee0800 { - compatible = "rockchip,rk3568-iommu"; - reg = <0x0 0xfdee0800 0x0 0x40>; - interrupts = ; - clocks = <&cru ACLK_JENC>, <&cru HCLK_JENC>; - clock-names = "aclk", "iface"; - power-domains = <&power RK3568_PD_RGA>; - #iommu-cells = <0>; - }; - - sdmmc2: mmc@fe000000 { - compatible = "rockchip,rk3568-dw-mshc", "rockchip,rk3288-dw-mshc"; - reg = <0x0 0xfe000000 0x0 0x4000>; - interrupts = ; - clocks = <&cru HCLK_SDMMC2>, <&cru CLK_SDMMC2>, - <&cru SCLK_SDMMC2_DRV>, <&cru SCLK_SDMMC2_SAMPLE>; - clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; - fifo-depth = <0x100>; - max-frequency = <150000000>; - resets = <&cru SRST_SDMMC2>; - reset-names = "reset"; - status = "disabled"; - }; - - gmac1: ethernet@fe010000 { - compatible = "rockchip,rk3568-gmac", "snps,dwmac-4.20a"; - reg = <0x0 0xfe010000 0x0 0x10000>; - interrupts = , - ; - interrupt-names = "macirq", "eth_wake_irq"; - clocks = <&cru SCLK_GMAC1>, <&cru SCLK_GMAC1_RX_TX>, - <&cru SCLK_GMAC1_RX_TX>, <&cru CLK_MAC1_REFOUT>, - <&cru ACLK_GMAC1>, <&cru PCLK_GMAC1>, - <&cru SCLK_GMAC1_RX_TX>, <&cru CLK_GMAC1_PTP_REF>; - clock-names = "stmmaceth", "mac_clk_rx", - "mac_clk_tx", "clk_mac_refout", - "aclk_mac", "pclk_mac", - "clk_mac_speed", "ptp_ref"; - resets = <&cru SRST_A_GMAC1>; - reset-names = "stmmaceth"; - rockchip,grf = <&grf>; - snps,axi-config = <&gmac1_stmmac_axi_setup>; - snps,mixed-burst; - snps,mtl-rx-config = <&gmac1_mtl_rx_setup>; - snps,mtl-tx-config = <&gmac1_mtl_tx_setup>; - snps,tso; - status = "disabled"; - - mdio1: mdio { - compatible = "snps,dwmac-mdio"; - #address-cells = <0x1>; - #size-cells = <0x0>; - }; - - gmac1_stmmac_axi_setup: stmmac-axi-config { - snps,blen = <0 0 0 0 16 8 4>; - snps,rd_osr_lmt = <8>; - snps,wr_osr_lmt = <4>; - }; - - gmac1_mtl_rx_setup: rx-queues-config { - snps,rx-queues-to-use = <1>; - queue0 {}; - }; - - gmac1_mtl_tx_setup: tx-queues-config { - snps,tx-queues-to-use = <1>; - queue0 {}; - }; - }; - - vop: vop@fe040000 { - reg = <0x0 0xfe040000 0x0 0x3000>, <0x0 0xfe044000 0x0 0x1000>; - reg-names = "vop", "gamma-lut"; - interrupts = ; - clocks = <&cru ACLK_VOP>, <&cru HCLK_VOP>, <&cru DCLK_VOP0>, - <&cru DCLK_VOP1>, <&cru DCLK_VOP2>; - clock-names = "aclk", "hclk", "dclk_vp0", "dclk_vp1", "dclk_vp2"; - iommus = <&vop_mmu>; - power-domains = <&power RK3568_PD_VO>; - rockchip,grf = <&grf>; - status = "disabled"; - - vop_out: ports { - #address-cells = <1>; - #size-cells = <0>; - - vp0: port@0 { - reg = <0>; - #address-cells = <1>; - #size-cells = <0>; - }; - - vp1: port@1 { - reg = <1>; - #address-cells = <1>; - #size-cells = <0>; - }; - - vp2: port@2 { - reg = <2>; - #address-cells = <1>; - #size-cells = <0>; - }; - }; - }; - - vop_mmu: iommu@fe043e00 { - compatible = "rockchip,rk3568-iommu"; - reg = <0x0 0xfe043e00 0x0 0x100>, <0x0 0xfe043f00 0x0 0x100>; - interrupts = ; - clocks = <&cru ACLK_VOP>, <&cru HCLK_VOP>; - clock-names = "aclk", "iface"; - #iommu-cells = <0>; - status = "disabled"; - }; - - dsi0: dsi@fe060000 { - compatible = "rockchip,rk3568-mipi-dsi", "snps,dw-mipi-dsi"; - reg = <0x00 0xfe060000 0x00 0x10000>; - interrupts = ; - clock-names = "pclk"; - clocks = <&cru PCLK_DSITX_0>; - phy-names = "dphy"; - phys = <&dsi_dphy0>; - power-domains = <&power RK3568_PD_VO>; - reset-names = "apb"; - resets = <&cru SRST_P_DSITX_0>; - rockchip,grf = <&grf>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - dsi0_in: port@0 { - reg = <0>; - }; - - dsi0_out: port@1 { - reg = <1>; - }; - }; - }; - - dsi1: dsi@fe070000 { - compatible = "rockchip,rk3568-mipi-dsi", "snps,dw-mipi-dsi"; - reg = <0x0 0xfe070000 0x0 0x10000>; - interrupts = ; - clock-names = "pclk"; - clocks = <&cru PCLK_DSITX_1>; - phy-names = "dphy"; - phys = <&dsi_dphy1>; - power-domains = <&power RK3568_PD_VO>; - reset-names = "apb"; - resets = <&cru SRST_P_DSITX_1>; - rockchip,grf = <&grf>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - dsi1_in: port@0 { - reg = <0>; - }; - - dsi1_out: port@1 { - reg = <1>; - }; - }; - }; - - hdmi: hdmi@fe0a0000 { - compatible = "rockchip,rk3568-dw-hdmi"; - reg = <0x0 0xfe0a0000 0x0 0x20000>; - interrupts = ; - clocks = <&cru PCLK_HDMI_HOST>, - <&cru CLK_HDMI_SFR>, - <&cru CLK_HDMI_CEC>, - <&pmucru CLK_HDMI_REF>, - <&cru HCLK_VO>; - clock-names = "iahb", "isfr", "cec", "ref"; - pinctrl-names = "default"; - pinctrl-0 = <&hdmitx_scl &hdmitx_sda &hdmitxm0_cec>; - power-domains = <&power RK3568_PD_VO>; - reg-io-width = <4>; - rockchip,grf = <&grf>; - #sound-dai-cells = <0>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - hdmi_in: port@0 { - reg = <0>; - }; - - hdmi_out: port@1 { - reg = <1>; - }; - }; - }; - - qos_gpu: qos@fe128000 { - compatible = "rockchip,rk3568-qos", "syscon"; - reg = <0x0 0xfe128000 0x0 0x20>; - }; - - qos_rkvenc_rd_m0: qos@fe138080 { - compatible = "rockchip,rk3568-qos", "syscon"; - reg = <0x0 0xfe138080 0x0 0x20>; - }; - - qos_rkvenc_rd_m1: qos@fe138100 { - compatible = "rockchip,rk3568-qos", "syscon"; - reg = <0x0 0xfe138100 0x0 0x20>; - }; - - qos_rkvenc_wr_m0: qos@fe138180 { - compatible = "rockchip,rk3568-qos", "syscon"; - reg = <0x0 0xfe138180 0x0 0x20>; - }; - - qos_isp: qos@fe148000 { - compatible = "rockchip,rk3568-qos", "syscon"; - reg = <0x0 0xfe148000 0x0 0x20>; - }; - - qos_vicap0: qos@fe148080 { - compatible = "rockchip,rk3568-qos", "syscon"; - reg = <0x0 0xfe148080 0x0 0x20>; - }; - - qos_vicap1: qos@fe148100 { - compatible = "rockchip,rk3568-qos", "syscon"; - reg = <0x0 0xfe148100 0x0 0x20>; - }; - - qos_vpu: qos@fe150000 { - compatible = "rockchip,rk3568-qos", "syscon"; - reg = <0x0 0xfe150000 0x0 0x20>; - }; - - qos_ebc: qos@fe158000 { - compatible = "rockchip,rk3568-qos", "syscon"; - reg = <0x0 0xfe158000 0x0 0x20>; - }; - - qos_iep: qos@fe158100 { - compatible = "rockchip,rk3568-qos", "syscon"; - reg = <0x0 0xfe158100 0x0 0x20>; - }; - - qos_jpeg_dec: qos@fe158180 { - compatible = "rockchip,rk3568-qos", "syscon"; - reg = <0x0 0xfe158180 0x0 0x20>; - }; - - qos_jpeg_enc: qos@fe158200 { - compatible = "rockchip,rk3568-qos", "syscon"; - reg = <0x0 0xfe158200 0x0 0x20>; - }; - - qos_rga_rd: qos@fe158280 { - compatible = "rockchip,rk3568-qos", "syscon"; - reg = <0x0 0xfe158280 0x0 0x20>; - }; - - qos_rga_wr: qos@fe158300 { - compatible = "rockchip,rk3568-qos", "syscon"; - reg = <0x0 0xfe158300 0x0 0x20>; - }; - - qos_npu: qos@fe180000 { - compatible = "rockchip,rk3568-qos", "syscon"; - reg = <0x0 0xfe180000 0x0 0x20>; - }; - - qos_pcie2x1: qos@fe190000 { - compatible = "rockchip,rk3568-qos", "syscon"; - reg = <0x0 0xfe190000 0x0 0x20>; - }; - - qos_sata1: qos@fe190280 { - compatible = "rockchip,rk3568-qos", "syscon"; - reg = <0x0 0xfe190280 0x0 0x20>; - }; - - qos_sata2: qos@fe190300 { - compatible = "rockchip,rk3568-qos", "syscon"; - reg = <0x0 0xfe190300 0x0 0x20>; - }; - - qos_usb3_0: qos@fe190380 { - compatible = "rockchip,rk3568-qos", "syscon"; - reg = <0x0 0xfe190380 0x0 0x20>; - }; - - qos_usb3_1: qos@fe190400 { - compatible = "rockchip,rk3568-qos", "syscon"; - reg = <0x0 0xfe190400 0x0 0x20>; - }; - - qos_rkvdec: qos@fe198000 { - compatible = "rockchip,rk3568-qos", "syscon"; - reg = <0x0 0xfe198000 0x0 0x20>; - }; - - qos_hdcp: qos@fe1a8000 { - compatible = "rockchip,rk3568-qos", "syscon"; - reg = <0x0 0xfe1a8000 0x0 0x20>; - }; - - qos_vop_m0: qos@fe1a8080 { - compatible = "rockchip,rk3568-qos", "syscon"; - reg = <0x0 0xfe1a8080 0x0 0x20>; - }; - - qos_vop_m1: qos@fe1a8100 { - compatible = "rockchip,rk3568-qos", "syscon"; - reg = <0x0 0xfe1a8100 0x0 0x20>; - }; - - dfi: dfi@fe230000 { - compatible = "rockchip,rk3568-dfi"; - reg = <0x00 0xfe230000 0x00 0x400>; - interrupts = ; - rockchip,pmu = <&pmugrf>; - }; - - pcie2x1: pcie@fe260000 { - compatible = "rockchip,rk3568-pcie"; - reg = <0x3 0xc0000000 0x0 0x00400000>, - <0x0 0xfe260000 0x0 0x00010000>, - <0x0 0xf4000000 0x0 0x00100000>; - reg-names = "dbi", "apb", "config"; - interrupts = , - , - , - , - ; - interrupt-names = "sys", "pmc", "msg", "legacy", "err"; - bus-range = <0x0 0xf>; - clocks = <&cru ACLK_PCIE20_MST>, <&cru ACLK_PCIE20_SLV>, - <&cru ACLK_PCIE20_DBI>, <&cru PCLK_PCIE20>, - <&cru CLK_PCIE20_AUX_NDFT>; - clock-names = "aclk_mst", "aclk_slv", - "aclk_dbi", "pclk", "aux"; - device_type = "pci"; - #interrupt-cells = <1>; - interrupt-map-mask = <0 0 0 7>; - interrupt-map = <0 0 0 1 &pcie_intc 0>, - <0 0 0 2 &pcie_intc 1>, - <0 0 0 3 &pcie_intc 2>, - <0 0 0 4 &pcie_intc 3>; - linux,pci-domain = <0>; - num-ib-windows = <6>; - num-ob-windows = <2>; - max-link-speed = <2>; - msi-map = <0x0 &gic 0x0 0x1000>; - num-lanes = <1>; - phys = <&combphy2 PHY_TYPE_PCIE>; - phy-names = "pcie-phy"; - power-domains = <&power RK3568_PD_PIPE>; - ranges = <0x01000000 0x0 0xf4100000 0x0 0xf4100000 0x0 0x00100000>, - <0x02000000 0x0 0xf4200000 0x0 0xf4200000 0x0 0x01e00000>, - <0x03000000 0x0 0x40000000 0x3 0x00000000 0x0 0x40000000>; - resets = <&cru SRST_PCIE20_POWERUP>; - reset-names = "pipe"; - #address-cells = <3>; - #size-cells = <2>; - status = "disabled"; - - pcie_intc: legacy-interrupt-controller { - #address-cells = <0>; - #interrupt-cells = <1>; - interrupt-controller; - interrupt-parent = <&gic>; - interrupts = ; - }; - }; - - sdmmc0: mmc@fe2b0000 { - compatible = "rockchip,rk3568-dw-mshc", "rockchip,rk3288-dw-mshc"; - reg = <0x0 0xfe2b0000 0x0 0x4000>; - interrupts = ; - clocks = <&cru HCLK_SDMMC0>, <&cru CLK_SDMMC0>, - <&cru SCLK_SDMMC0_DRV>, <&cru SCLK_SDMMC0_SAMPLE>; - clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; - fifo-depth = <0x100>; - max-frequency = <150000000>; - resets = <&cru SRST_SDMMC0>; - reset-names = "reset"; - status = "disabled"; - }; - - sdmmc1: mmc@fe2c0000 { - compatible = "rockchip,rk3568-dw-mshc", "rockchip,rk3288-dw-mshc"; - reg = <0x0 0xfe2c0000 0x0 0x4000>; - interrupts = ; - clocks = <&cru HCLK_SDMMC1>, <&cru CLK_SDMMC1>, - <&cru SCLK_SDMMC1_DRV>, <&cru SCLK_SDMMC1_SAMPLE>; - clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; - fifo-depth = <0x100>; - max-frequency = <150000000>; - resets = <&cru SRST_SDMMC1>; - reset-names = "reset"; - status = "disabled"; - }; - - sfc: spi@fe300000 { - compatible = "rockchip,sfc"; - reg = <0x0 0xfe300000 0x0 0x4000>; - interrupts = ; - clocks = <&cru SCLK_SFC>, <&cru HCLK_SFC>; - clock-names = "clk_sfc", "hclk_sfc"; - pinctrl-0 = <&fspi_pins>; - pinctrl-names = "default"; - status = "disabled"; - }; - - sdhci: mmc@fe310000 { - compatible = "rockchip,rk3568-dwcmshc"; - reg = <0x0 0xfe310000 0x0 0x10000>; - interrupts = ; - assigned-clocks = <&cru BCLK_EMMC>, <&cru TCLK_EMMC>; - assigned-clock-rates = <200000000>, <24000000>; - clocks = <&cru CCLK_EMMC>, <&cru HCLK_EMMC>, - <&cru ACLK_EMMC>, <&cru BCLK_EMMC>, - <&cru TCLK_EMMC>; - clock-names = "core", "bus", "axi", "block", "timer"; - status = "disabled"; - }; - - i2s0_8ch: i2s@fe400000 { - compatible = "rockchip,rk3568-i2s-tdm"; - reg = <0x0 0xfe400000 0x0 0x1000>; - interrupts = ; - assigned-clocks = <&cru CLK_I2S0_8CH_TX_SRC>, <&cru CLK_I2S0_8CH_RX_SRC>; - assigned-clock-rates = <1188000000>, <1188000000>; - clocks = <&cru MCLK_I2S0_8CH_TX>, <&cru MCLK_I2S0_8CH_RX>, <&cru HCLK_I2S0_8CH>; - clock-names = "mclk_tx", "mclk_rx", "hclk"; - dmas = <&dmac1 0>; - dma-names = "tx"; - resets = <&cru SRST_M_I2S0_8CH_TX>, <&cru SRST_M_I2S0_8CH_RX>; - reset-names = "tx-m", "rx-m"; - rockchip,grf = <&grf>; - #sound-dai-cells = <0>; - status = "disabled"; - }; - - i2s1_8ch: i2s@fe410000 { - compatible = "rockchip,rk3568-i2s-tdm"; - reg = <0x0 0xfe410000 0x0 0x1000>; - interrupts = ; - assigned-clocks = <&cru CLK_I2S1_8CH_TX_SRC>, <&cru CLK_I2S1_8CH_RX_SRC>; - assigned-clock-rates = <1188000000>, <1188000000>; - clocks = <&cru MCLK_I2S1_8CH_TX>, <&cru MCLK_I2S1_8CH_RX>, - <&cru HCLK_I2S1_8CH>; - clock-names = "mclk_tx", "mclk_rx", "hclk"; - dmas = <&dmac1 3>, <&dmac1 2>; - dma-names = "rx", "tx"; - resets = <&cru SRST_M_I2S1_8CH_TX>, <&cru SRST_M_I2S1_8CH_RX>; - reset-names = "tx-m", "rx-m"; - rockchip,grf = <&grf>; - pinctrl-names = "default"; - pinctrl-0 = <&i2s1m0_sclktx &i2s1m0_sclkrx - &i2s1m0_lrcktx &i2s1m0_lrckrx - &i2s1m0_sdi0 &i2s1m0_sdi1 - &i2s1m0_sdi2 &i2s1m0_sdi3 - &i2s1m0_sdo0 &i2s1m0_sdo1 - &i2s1m0_sdo2 &i2s1m0_sdo3>; - #sound-dai-cells = <0>; - status = "disabled"; - }; - - i2s2_2ch: i2s@fe420000 { - compatible = "rockchip,rk3568-i2s-tdm"; - reg = <0x0 0xfe420000 0x0 0x1000>; - interrupts = ; - assigned-clocks = <&cru CLK_I2S2_2CH_SRC>; - assigned-clock-rates = <1188000000>; - clocks = <&cru MCLK_I2S2_2CH>, <&cru MCLK_I2S2_2CH>, <&cru HCLK_I2S2_2CH>; - clock-names = "mclk_tx", "mclk_rx", "hclk"; - dmas = <&dmac1 4>, <&dmac1 5>; - dma-names = "tx", "rx"; - resets = <&cru SRST_M_I2S2_2CH>; - reset-names = "m"; - rockchip,grf = <&grf>; - pinctrl-names = "default"; - pinctrl-0 = <&i2s2m0_sclktx - &i2s2m0_lrcktx - &i2s2m0_sdi - &i2s2m0_sdo>; - #sound-dai-cells = <0>; - status = "disabled"; - }; - - i2s3_2ch: i2s@fe430000 { - compatible = "rockchip,rk3568-i2s-tdm"; - reg = <0x0 0xfe430000 0x0 0x1000>; - interrupts = ; - clocks = <&cru MCLK_I2S3_2CH_TX>, <&cru MCLK_I2S3_2CH_RX>, - <&cru HCLK_I2S3_2CH>; - clock-names = "mclk_tx", "mclk_rx", "hclk"; - dmas = <&dmac1 6>, <&dmac1 7>; - dma-names = "tx", "rx"; - resets = <&cru SRST_M_I2S3_2CH_TX>, <&cru SRST_M_I2S3_2CH_RX>; - reset-names = "tx-m", "rx-m"; - rockchip,grf = <&grf>; - #sound-dai-cells = <0>; - status = "disabled"; - }; - - pdm: pdm@fe440000 { - compatible = "rockchip,rk3568-pdm"; - reg = <0x0 0xfe440000 0x0 0x1000>; - interrupts = ; - clocks = <&cru MCLK_PDM>, <&cru HCLK_PDM>; - clock-names = "pdm_clk", "pdm_hclk"; - dmas = <&dmac1 9>; - dma-names = "rx"; - pinctrl-0 = <&pdmm0_clk - &pdmm0_clk1 - &pdmm0_sdi0 - &pdmm0_sdi1 - &pdmm0_sdi2 - &pdmm0_sdi3>; - pinctrl-names = "default"; - resets = <&cru SRST_M_PDM>; - reset-names = "pdm-m"; - #sound-dai-cells = <0>; - status = "disabled"; - }; - - spdif: spdif@fe460000 { - compatible = "rockchip,rk3568-spdif"; - reg = <0x0 0xfe460000 0x0 0x1000>; - interrupts = ; - clock-names = "mclk", "hclk"; - clocks = <&cru MCLK_SPDIF_8CH>, <&cru HCLK_SPDIF_8CH>; - dmas = <&dmac1 1>; - dma-names = "tx"; - pinctrl-names = "default"; - pinctrl-0 = <&spdifm0_tx>; - #sound-dai-cells = <0>; - status = "disabled"; - }; - - dmac0: dma-controller@fe530000 { - compatible = "arm,pl330", "arm,primecell"; - reg = <0x0 0xfe530000 0x0 0x4000>; - interrupts = , - ; - arm,pl330-periph-burst; - clocks = <&cru ACLK_BUS>; - clock-names = "apb_pclk"; - #dma-cells = <1>; - }; - - dmac1: dma-controller@fe550000 { - compatible = "arm,pl330", "arm,primecell"; - reg = <0x0 0xfe550000 0x0 0x4000>; - interrupts = , - ; - arm,pl330-periph-burst; - clocks = <&cru ACLK_BUS>; - clock-names = "apb_pclk"; - #dma-cells = <1>; - }; - - i2c1: i2c@fe5a0000 { - compatible = "rockchip,rk3568-i2c", "rockchip,rk3399-i2c"; - reg = <0x0 0xfe5a0000 0x0 0x1000>; - interrupts = ; - clocks = <&cru CLK_I2C1>, <&cru PCLK_I2C1>; - clock-names = "i2c", "pclk"; - pinctrl-0 = <&i2c1_xfer>; - pinctrl-names = "default"; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - i2c2: i2c@fe5b0000 { - compatible = "rockchip,rk3568-i2c", "rockchip,rk3399-i2c"; - reg = <0x0 0xfe5b0000 0x0 0x1000>; - interrupts = ; - clocks = <&cru CLK_I2C2>, <&cru PCLK_I2C2>; - clock-names = "i2c", "pclk"; - pinctrl-0 = <&i2c2m0_xfer>; - pinctrl-names = "default"; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - i2c3: i2c@fe5c0000 { - compatible = "rockchip,rk3568-i2c", "rockchip,rk3399-i2c"; - reg = <0x0 0xfe5c0000 0x0 0x1000>; - interrupts = ; - clocks = <&cru CLK_I2C3>, <&cru PCLK_I2C3>; - clock-names = "i2c", "pclk"; - pinctrl-0 = <&i2c3m0_xfer>; - pinctrl-names = "default"; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - i2c4: i2c@fe5d0000 { - compatible = "rockchip,rk3568-i2c", "rockchip,rk3399-i2c"; - reg = <0x0 0xfe5d0000 0x0 0x1000>; - interrupts = ; - clocks = <&cru CLK_I2C4>, <&cru PCLK_I2C4>; - clock-names = "i2c", "pclk"; - pinctrl-0 = <&i2c4m0_xfer>; - pinctrl-names = "default"; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - i2c5: i2c@fe5e0000 { - compatible = "rockchip,rk3568-i2c", "rockchip,rk3399-i2c"; - reg = <0x0 0xfe5e0000 0x0 0x1000>; - interrupts = ; - clocks = <&cru CLK_I2C5>, <&cru PCLK_I2C5>; - clock-names = "i2c", "pclk"; - pinctrl-0 = <&i2c5m0_xfer>; - pinctrl-names = "default"; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - wdt: watchdog@fe600000 { - compatible = "rockchip,rk3568-wdt", "snps,dw-wdt"; - reg = <0x0 0xfe600000 0x0 0x100>; - interrupts = ; - clocks = <&cru TCLK_WDT_NS>, <&cru PCLK_WDT_NS>; - clock-names = "tclk", "pclk"; - }; - - spi0: spi@fe610000 { - compatible = "rockchip,rk3568-spi", "rockchip,rk3066-spi"; - reg = <0x0 0xfe610000 0x0 0x1000>; - interrupts = ; - clocks = <&cru CLK_SPI0>, <&cru PCLK_SPI0>; - clock-names = "spiclk", "apb_pclk"; - dmas = <&dmac0 20>, <&dmac0 21>; - dma-names = "tx", "rx"; - pinctrl-names = "default"; - pinctrl-0 = <&spi0m0_cs0 &spi0m0_cs1 &spi0m0_pins>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - spi1: spi@fe620000 { - compatible = "rockchip,rk3568-spi", "rockchip,rk3066-spi"; - reg = <0x0 0xfe620000 0x0 0x1000>; - interrupts = ; - clocks = <&cru CLK_SPI1>, <&cru PCLK_SPI1>; - clock-names = "spiclk", "apb_pclk"; - dmas = <&dmac0 22>, <&dmac0 23>; - dma-names = "tx", "rx"; - pinctrl-names = "default"; - pinctrl-0 = <&spi1m0_cs0 &spi1m0_cs1 &spi1m0_pins>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - spi2: spi@fe630000 { - compatible = "rockchip,rk3568-spi", "rockchip,rk3066-spi"; - reg = <0x0 0xfe630000 0x0 0x1000>; - interrupts = ; - clocks = <&cru CLK_SPI2>, <&cru PCLK_SPI2>; - clock-names = "spiclk", "apb_pclk"; - dmas = <&dmac0 24>, <&dmac0 25>; - dma-names = "tx", "rx"; - pinctrl-names = "default"; - pinctrl-0 = <&spi2m0_cs0 &spi2m0_cs1 &spi2m0_pins>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - spi3: spi@fe640000 { - compatible = "rockchip,rk3568-spi", "rockchip,rk3066-spi"; - reg = <0x0 0xfe640000 0x0 0x1000>; - interrupts = ; - clocks = <&cru CLK_SPI3>, <&cru PCLK_SPI3>; - clock-names = "spiclk", "apb_pclk"; - dmas = <&dmac0 26>, <&dmac0 27>; - dma-names = "tx", "rx"; - pinctrl-names = "default"; - pinctrl-0 = <&spi3m0_cs0 &spi3m0_cs1 &spi3m0_pins>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - uart1: serial@fe650000 { - compatible = "rockchip,rk3568-uart", "snps,dw-apb-uart"; - reg = <0x0 0xfe650000 0x0 0x100>; - interrupts = ; - clocks = <&cru SCLK_UART1>, <&cru PCLK_UART1>; - clock-names = "baudclk", "apb_pclk"; - dmas = <&dmac0 2>, <&dmac0 3>; - pinctrl-0 = <&uart1m0_xfer>; - pinctrl-names = "default"; - reg-io-width = <4>; - reg-shift = <2>; - status = "disabled"; - }; - - uart2: serial@fe660000 { - compatible = "rockchip,rk3568-uart", "snps,dw-apb-uart"; - reg = <0x0 0xfe660000 0x0 0x100>; - interrupts = ; - clocks = <&cru SCLK_UART2>, <&cru PCLK_UART2>; - clock-names = "baudclk", "apb_pclk"; - dmas = <&dmac0 4>, <&dmac0 5>; - pinctrl-0 = <&uart2m0_xfer>; - pinctrl-names = "default"; - reg-io-width = <4>; - reg-shift = <2>; - status = "disabled"; - }; - - uart3: serial@fe670000 { - compatible = "rockchip,rk3568-uart", "snps,dw-apb-uart"; - reg = <0x0 0xfe670000 0x0 0x100>; - interrupts = ; - clocks = <&cru SCLK_UART3>, <&cru PCLK_UART3>; - clock-names = "baudclk", "apb_pclk"; - dmas = <&dmac0 6>, <&dmac0 7>; - pinctrl-0 = <&uart3m0_xfer>; - pinctrl-names = "default"; - reg-io-width = <4>; - reg-shift = <2>; - status = "disabled"; - }; - - uart4: serial@fe680000 { - compatible = "rockchip,rk3568-uart", "snps,dw-apb-uart"; - reg = <0x0 0xfe680000 0x0 0x100>; - interrupts = ; - clocks = <&cru SCLK_UART4>, <&cru PCLK_UART4>; - clock-names = "baudclk", "apb_pclk"; - dmas = <&dmac0 8>, <&dmac0 9>; - pinctrl-0 = <&uart4m0_xfer>; - pinctrl-names = "default"; - reg-io-width = <4>; - reg-shift = <2>; - status = "disabled"; - }; - - uart5: serial@fe690000 { - compatible = "rockchip,rk3568-uart", "snps,dw-apb-uart"; - reg = <0x0 0xfe690000 0x0 0x100>; - interrupts = ; - clocks = <&cru SCLK_UART5>, <&cru PCLK_UART5>; - clock-names = "baudclk", "apb_pclk"; - dmas = <&dmac0 10>, <&dmac0 11>; - pinctrl-0 = <&uart5m0_xfer>; - pinctrl-names = "default"; - reg-io-width = <4>; - reg-shift = <2>; - status = "disabled"; - }; - - uart6: serial@fe6a0000 { - compatible = "rockchip,rk3568-uart", "snps,dw-apb-uart"; - reg = <0x0 0xfe6a0000 0x0 0x100>; - interrupts = ; - clocks = <&cru SCLK_UART6>, <&cru PCLK_UART6>; - clock-names = "baudclk", "apb_pclk"; - dmas = <&dmac0 12>, <&dmac0 13>; - pinctrl-0 = <&uart6m0_xfer>; - pinctrl-names = "default"; - reg-io-width = <4>; - reg-shift = <2>; - status = "disabled"; - }; - - uart7: serial@fe6b0000 { - compatible = "rockchip,rk3568-uart", "snps,dw-apb-uart"; - reg = <0x0 0xfe6b0000 0x0 0x100>; - interrupts = ; - clocks = <&cru SCLK_UART7>, <&cru PCLK_UART7>; - clock-names = "baudclk", "apb_pclk"; - dmas = <&dmac0 14>, <&dmac0 15>; - pinctrl-0 = <&uart7m0_xfer>; - pinctrl-names = "default"; - reg-io-width = <4>; - reg-shift = <2>; - status = "disabled"; - }; - - uart8: serial@fe6c0000 { - compatible = "rockchip,rk3568-uart", "snps,dw-apb-uart"; - reg = <0x0 0xfe6c0000 0x0 0x100>; - interrupts = ; - clocks = <&cru SCLK_UART8>, <&cru PCLK_UART8>; - clock-names = "baudclk", "apb_pclk"; - dmas = <&dmac0 16>, <&dmac0 17>; - pinctrl-0 = <&uart8m0_xfer>; - pinctrl-names = "default"; - reg-io-width = <4>; - reg-shift = <2>; - status = "disabled"; - }; - - uart9: serial@fe6d0000 { - compatible = "rockchip,rk3568-uart", "snps,dw-apb-uart"; - reg = <0x0 0xfe6d0000 0x0 0x100>; - interrupts = ; - clocks = <&cru SCLK_UART9>, <&cru PCLK_UART9>; - clock-names = "baudclk", "apb_pclk"; - dmas = <&dmac0 18>, <&dmac0 19>; - pinctrl-0 = <&uart9m0_xfer>; - pinctrl-names = "default"; - reg-io-width = <4>; - reg-shift = <2>; - status = "disabled"; - }; - - thermal_zones: thermal-zones { - cpu_thermal: cpu-thermal { - polling-delay-passive = <100>; - polling-delay = <1000>; - - thermal-sensors = <&tsadc 0>; - - trips { - cpu_alert0: cpu_alert0 { - temperature = <70000>; - hysteresis = <2000>; - type = "passive"; - }; - cpu_alert1: cpu_alert1 { - temperature = <75000>; - hysteresis = <2000>; - type = "passive"; - }; - cpu_crit: cpu_crit { - temperature = <95000>; - hysteresis = <2000>; - type = "critical"; - }; - }; - - cooling-maps { - map0 { - trip = <&cpu_alert0>; - cooling-device = - <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; - }; - }; - }; - - gpu_thermal: gpu-thermal { - polling-delay-passive = <20>; /* milliseconds */ - polling-delay = <1000>; /* milliseconds */ - - thermal-sensors = <&tsadc 1>; - - trips { - gpu_threshold: gpu-threshold { - temperature = <70000>; - hysteresis = <2000>; - type = "passive"; - }; - gpu_target: gpu-target { - temperature = <75000>; - hysteresis = <2000>; - type = "passive"; - }; - gpu_crit: gpu-crit { - temperature = <95000>; - hysteresis = <2000>; - type = "critical"; - }; - }; - - cooling-maps { - map0 { - trip = <&gpu_target>; - cooling-device = - <&gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; - }; - }; - }; - }; - - tsadc: tsadc@fe710000 { - compatible = "rockchip,rk3568-tsadc"; - reg = <0x0 0xfe710000 0x0 0x100>; - interrupts = ; - assigned-clocks = <&cru CLK_TSADC_TSEN>, <&cru CLK_TSADC>; - assigned-clock-rates = <17000000>, <700000>; - clocks = <&cru CLK_TSADC>, <&cru PCLK_TSADC>; - clock-names = "tsadc", "apb_pclk"; - resets = <&cru SRST_P_TSADC>, <&cru SRST_TSADC>, - <&cru SRST_TSADCPHY>; - rockchip,grf = <&grf>; - rockchip,hw-tshut-temp = <95000>; - pinctrl-names = "init", "default", "sleep"; - pinctrl-0 = <&tsadc_pin>; - pinctrl-1 = <&tsadc_shutorg>; - pinctrl-2 = <&tsadc_pin>; - #thermal-sensor-cells = <1>; - status = "disabled"; - }; - - saradc: saradc@fe720000 { - compatible = "rockchip,rk3568-saradc", "rockchip,rk3399-saradc"; - reg = <0x0 0xfe720000 0x0 0x100>; - interrupts = ; - clocks = <&cru CLK_SARADC>, <&cru PCLK_SARADC>; - clock-names = "saradc", "apb_pclk"; - resets = <&cru SRST_P_SARADC>; - reset-names = "saradc-apb"; - #io-channel-cells = <1>; - status = "disabled"; - }; - - pwm4: pwm@fe6e0000 { - compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm"; - reg = <0x0 0xfe6e0000 0x0 0x10>; - clocks = <&cru CLK_PWM1>, <&cru PCLK_PWM1>; - clock-names = "pwm", "pclk"; - pinctrl-0 = <&pwm4_pins>; - pinctrl-names = "default"; - #pwm-cells = <3>; - status = "disabled"; - }; - - pwm5: pwm@fe6e0010 { - compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm"; - reg = <0x0 0xfe6e0010 0x0 0x10>; - clocks = <&cru CLK_PWM1>, <&cru PCLK_PWM1>; - clock-names = "pwm", "pclk"; - pinctrl-0 = <&pwm5_pins>; - pinctrl-names = "default"; - #pwm-cells = <3>; - status = "disabled"; - }; - - pwm6: pwm@fe6e0020 { - compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm"; - reg = <0x0 0xfe6e0020 0x0 0x10>; - clocks = <&cru CLK_PWM1>, <&cru PCLK_PWM1>; - clock-names = "pwm", "pclk"; - pinctrl-0 = <&pwm6_pins>; - pinctrl-names = "default"; - #pwm-cells = <3>; - status = "disabled"; - }; - - pwm7: pwm@fe6e0030 { - compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm"; - reg = <0x0 0xfe6e0030 0x0 0x10>; - clocks = <&cru CLK_PWM1>, <&cru PCLK_PWM1>; - clock-names = "pwm", "pclk"; - pinctrl-0 = <&pwm7_pins>; - pinctrl-names = "default"; - #pwm-cells = <3>; - status = "disabled"; - }; - - pwm8: pwm@fe6f0000 { - compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm"; - reg = <0x0 0xfe6f0000 0x0 0x10>; - clocks = <&cru CLK_PWM2>, <&cru PCLK_PWM2>; - clock-names = "pwm", "pclk"; - pinctrl-0 = <&pwm8m0_pins>; - pinctrl-names = "default"; - #pwm-cells = <3>; - status = "disabled"; - }; - - pwm9: pwm@fe6f0010 { - compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm"; - reg = <0x0 0xfe6f0010 0x0 0x10>; - clocks = <&cru CLK_PWM2>, <&cru PCLK_PWM2>; - clock-names = "pwm", "pclk"; - pinctrl-0 = <&pwm9m0_pins>; - pinctrl-names = "default"; - #pwm-cells = <3>; - status = "disabled"; - }; - - pwm10: pwm@fe6f0020 { - compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm"; - reg = <0x0 0xfe6f0020 0x0 0x10>; - clocks = <&cru CLK_PWM2>, <&cru PCLK_PWM2>; - clock-names = "pwm", "pclk"; - pinctrl-0 = <&pwm10m0_pins>; - pinctrl-names = "default"; - #pwm-cells = <3>; - status = "disabled"; - }; - - pwm11: pwm@fe6f0030 { - compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm"; - reg = <0x0 0xfe6f0030 0x0 0x10>; - clocks = <&cru CLK_PWM2>, <&cru PCLK_PWM2>; - clock-names = "pwm", "pclk"; - pinctrl-0 = <&pwm11m0_pins>; - pinctrl-names = "default"; - #pwm-cells = <3>; - status = "disabled"; - }; - - pwm12: pwm@fe700000 { - compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm"; - reg = <0x0 0xfe700000 0x0 0x10>; - clocks = <&cru CLK_PWM3>, <&cru PCLK_PWM3>; - clock-names = "pwm", "pclk"; - pinctrl-0 = <&pwm12m0_pins>; - pinctrl-names = "default"; - #pwm-cells = <3>; - status = "disabled"; - }; - - pwm13: pwm@fe700010 { - compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm"; - reg = <0x0 0xfe700010 0x0 0x10>; - clocks = <&cru CLK_PWM3>, <&cru PCLK_PWM3>; - clock-names = "pwm", "pclk"; - pinctrl-0 = <&pwm13m0_pins>; - pinctrl-names = "default"; - #pwm-cells = <3>; - status = "disabled"; - }; - - pwm14: pwm@fe700020 { - compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm"; - reg = <0x0 0xfe700020 0x0 0x10>; - clocks = <&cru CLK_PWM3>, <&cru PCLK_PWM3>; - clock-names = "pwm", "pclk"; - pinctrl-0 = <&pwm14m0_pins>; - pinctrl-names = "default"; - #pwm-cells = <3>; - status = "disabled"; - }; - - pwm15: pwm@fe700030 { - compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm"; - reg = <0x0 0xfe700030 0x0 0x10>; - clocks = <&cru CLK_PWM3>, <&cru PCLK_PWM3>; - clock-names = "pwm", "pclk"; - pinctrl-0 = <&pwm15m0_pins>; - pinctrl-names = "default"; - #pwm-cells = <3>; - status = "disabled"; - }; - - combphy1: phy@fe830000 { - compatible = "rockchip,rk3568-naneng-combphy"; - reg = <0x0 0xfe830000 0x0 0x100>; - clocks = <&pmucru CLK_PCIEPHY1_REF>, - <&cru PCLK_PIPEPHY1>, - <&cru PCLK_PIPE>; - clock-names = "ref", "apb", "pipe"; - assigned-clocks = <&pmucru CLK_PCIEPHY1_REF>; - assigned-clock-rates = <100000000>; - resets = <&cru SRST_PIPEPHY1>; - rockchip,pipe-grf = <&pipegrf>; - rockchip,pipe-phy-grf = <&pipe_phy_grf1>; - #phy-cells = <1>; - status = "disabled"; - }; - - combphy2: phy@fe840000 { - compatible = "rockchip,rk3568-naneng-combphy"; - reg = <0x0 0xfe840000 0x0 0x100>; - clocks = <&pmucru CLK_PCIEPHY2_REF>, - <&cru PCLK_PIPEPHY2>, - <&cru PCLK_PIPE>; - clock-names = "ref", "apb", "pipe"; - assigned-clocks = <&pmucru CLK_PCIEPHY2_REF>; - assigned-clock-rates = <100000000>; - resets = <&cru SRST_PIPEPHY2>; - rockchip,pipe-grf = <&pipegrf>; - rockchip,pipe-phy-grf = <&pipe_phy_grf2>; - #phy-cells = <1>; - status = "disabled"; - }; - - csi_dphy: phy@fe870000 { - compatible = "rockchip,rk3568-csi-dphy"; - reg = <0x0 0xfe870000 0x0 0x10000>; - clocks = <&cru PCLK_MIPICSIPHY>; - clock-names = "pclk"; - #phy-cells = <0>; - resets = <&cru SRST_P_MIPICSIPHY>; - reset-names = "apb"; - rockchip,grf = <&grf>; - status = "disabled"; - }; - - dsi_dphy0: mipi-dphy@fe850000 { - compatible = "rockchip,rk3568-dsi-dphy"; - reg = <0x0 0xfe850000 0x0 0x10000>; - clock-names = "ref", "pclk"; - clocks = <&pmucru CLK_MIPIDSIPHY0_REF>, <&cru PCLK_MIPIDSIPHY0>; - #phy-cells = <0>; - power-domains = <&power RK3568_PD_VO>; - reset-names = "apb"; - resets = <&cru SRST_P_MIPIDSIPHY0>; - status = "disabled"; - }; - - dsi_dphy1: mipi-dphy@fe860000 { - compatible = "rockchip,rk3568-dsi-dphy"; - reg = <0x0 0xfe860000 0x0 0x10000>; - clock-names = "ref", "pclk"; - clocks = <&pmucru CLK_MIPIDSIPHY1_REF>, <&cru PCLK_MIPIDSIPHY1>; - #phy-cells = <0>; - power-domains = <&power RK3568_PD_VO>; - reset-names = "apb"; - resets = <&cru SRST_P_MIPIDSIPHY1>; - status = "disabled"; - }; - - usb2phy0: usb2phy@fe8a0000 { - compatible = "rockchip,rk3568-usb2phy"; - reg = <0x0 0xfe8a0000 0x0 0x10000>; - clocks = <&pmucru CLK_USBPHY0_REF>; - clock-names = "phyclk"; - clock-output-names = "clk_usbphy0_480m"; - interrupts = ; - rockchip,usbgrf = <&usb2phy0_grf>; - #clock-cells = <0>; - status = "disabled"; - - usb2phy0_host: host-port { - #phy-cells = <0>; - status = "disabled"; - }; - - usb2phy0_otg: otg-port { - #phy-cells = <0>; - status = "disabled"; - }; - }; - - usb2phy1: usb2phy@fe8b0000 { - compatible = "rockchip,rk3568-usb2phy"; - reg = <0x0 0xfe8b0000 0x0 0x10000>; - clocks = <&pmucru CLK_USBPHY1_REF>; - clock-names = "phyclk"; - clock-output-names = "clk_usbphy1_480m"; - interrupts = ; - rockchip,usbgrf = <&usb2phy1_grf>; - #clock-cells = <0>; - status = "disabled"; - - usb2phy1_host: host-port { - #phy-cells = <0>; - status = "disabled"; - }; - - usb2phy1_otg: otg-port { - #phy-cells = <0>; - status = "disabled"; - }; - }; - - pinctrl: pinctrl { - compatible = "rockchip,rk3568-pinctrl"; - rockchip,grf = <&grf>; - rockchip,pmu = <&pmugrf>; - #address-cells = <2>; - #size-cells = <2>; - ranges; - - gpio0: gpio@fdd60000 { - compatible = "rockchip,gpio-bank"; - reg = <0x0 0xfdd60000 0x0 0x100>; - interrupts = ; - clocks = <&pmucru PCLK_GPIO0>, <&pmucru DBCLK_GPIO0>; - gpio-controller; - gpio-ranges = <&pinctrl 0 0 32>; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpio1: gpio@fe740000 { - compatible = "rockchip,gpio-bank"; - reg = <0x0 0xfe740000 0x0 0x100>; - interrupts = ; - clocks = <&cru PCLK_GPIO1>, <&cru DBCLK_GPIO1>; - gpio-controller; - gpio-ranges = <&pinctrl 0 32 32>; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpio2: gpio@fe750000 { - compatible = "rockchip,gpio-bank"; - reg = <0x0 0xfe750000 0x0 0x100>; - interrupts = ; - clocks = <&cru PCLK_GPIO2>, <&cru DBCLK_GPIO2>; - gpio-controller; - gpio-ranges = <&pinctrl 0 64 32>; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpio3: gpio@fe760000 { - compatible = "rockchip,gpio-bank"; - reg = <0x0 0xfe760000 0x0 0x100>; - interrupts = ; - clocks = <&cru PCLK_GPIO3>, <&cru DBCLK_GPIO3>; - gpio-controller; - gpio-ranges = <&pinctrl 0 96 32>; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpio4: gpio@fe770000 { - compatible = "rockchip,gpio-bank"; - reg = <0x0 0xfe770000 0x0 0x100>; - interrupts = ; - clocks = <&cru PCLK_GPIO4>, <&cru DBCLK_GPIO4>; - gpio-controller; - gpio-ranges = <&pinctrl 0 128 32>; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - }; - }; -}; - -#include "rk3568-pinctrl.dtsi" diff --git a/include/dt-bindings/clock/rk3568-cru.h b/include/dt-bindings/clock/rk3568-cru.h deleted file mode 100644 index d2989086515..00000000000 --- a/include/dt-bindings/clock/rk3568-cru.h +++ /dev/null @@ -1,926 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (c) 2021 Rockchip Electronics Co. Ltd. - * Author: Elaine Zhang - */ - -#ifndef _DT_BINDINGS_CLK_ROCKCHIP_RK3568_H -#define _DT_BINDINGS_CLK_ROCKCHIP_RK3568_H - -/* pmucru-clocks indices */ - -/* pmucru plls */ -#define PLL_PPLL 1 -#define PLL_HPLL 2 - -/* pmucru clocks */ -#define XIN_OSC0_DIV 4 -#define CLK_RTC_32K 5 -#define CLK_PMU 6 -#define CLK_I2C0 7 -#define CLK_RTC32K_FRAC 8 -#define CLK_UART0_DIV 9 -#define CLK_UART0_FRAC 10 -#define SCLK_UART0 11 -#define DBCLK_GPIO0 12 -#define CLK_PWM0 13 -#define CLK_CAPTURE_PWM0_NDFT 14 -#define CLK_PMUPVTM 15 -#define CLK_CORE_PMUPVTM 16 -#define CLK_REF24M 17 -#define XIN_OSC0_USBPHY0_G 18 -#define CLK_USBPHY0_REF 19 -#define XIN_OSC0_USBPHY1_G 20 -#define CLK_USBPHY1_REF 21 -#define XIN_OSC0_MIPIDSIPHY0_G 22 -#define CLK_MIPIDSIPHY0_REF 23 -#define XIN_OSC0_MIPIDSIPHY1_G 24 -#define CLK_MIPIDSIPHY1_REF 25 -#define CLK_WIFI_DIV 26 -#define CLK_WIFI_OSC0 27 -#define CLK_WIFI 28 -#define CLK_PCIEPHY0_DIV 29 -#define CLK_PCIEPHY0_OSC0 30 -#define CLK_PCIEPHY0_REF 31 -#define CLK_PCIEPHY1_DIV 32 -#define CLK_PCIEPHY1_OSC0 33 -#define CLK_PCIEPHY1_REF 34 -#define CLK_PCIEPHY2_DIV 35 -#define CLK_PCIEPHY2_OSC0 36 -#define CLK_PCIEPHY2_REF 37 -#define CLK_PCIE30PHY_REF_M 38 -#define CLK_PCIE30PHY_REF_N 39 -#define CLK_HDMI_REF 40 -#define XIN_OSC0_EDPPHY_G 41 -#define PCLK_PDPMU 42 -#define PCLK_PMU 43 -#define PCLK_UART0 44 -#define PCLK_I2C0 45 -#define PCLK_GPIO0 46 -#define PCLK_PMUPVTM 47 -#define PCLK_PWM0 48 -#define CLK_PDPMU 49 -#define SCLK_32K_IOE 50 - -#define CLKPMU_NR_CLKS (SCLK_32K_IOE + 1) - -/* cru-clocks indices */ - -/* cru plls */ -#define PLL_APLL 1 -#define PLL_DPLL 2 -#define PLL_CPLL 3 -#define PLL_GPLL 4 -#define PLL_VPLL 5 -#define PLL_NPLL 6 - -/* cru clocks */ -#define CPLL_333M 9 -#define ARMCLK 10 -#define USB480M 11 -#define ACLK_CORE_NIU2BUS 18 -#define CLK_CORE_PVTM 19 -#define CLK_CORE_PVTM_CORE 20 -#define CLK_CORE_PVTPLL 21 -#define CLK_GPU_SRC 22 -#define CLK_GPU_PRE_NDFT 23 -#define CLK_GPU_PRE_MUX 24 -#define ACLK_GPU_PRE 25 -#define PCLK_GPU_PRE 26 -#define CLK_GPU 27 -#define CLK_GPU_NP5 28 -#define PCLK_GPU_PVTM 29 -#define CLK_GPU_PVTM 30 -#define CLK_GPU_PVTM_CORE 31 -#define CLK_GPU_PVTPLL 32 -#define CLK_NPU_SRC 33 -#define CLK_NPU_PRE_NDFT 34 -#define CLK_NPU 35 -#define CLK_NPU_NP5 36 -#define HCLK_NPU_PRE 37 -#define PCLK_NPU_PRE 38 -#define ACLK_NPU_PRE 39 -#define ACLK_NPU 40 -#define HCLK_NPU 41 -#define PCLK_NPU_PVTM 42 -#define CLK_NPU_PVTM 43 -#define CLK_NPU_PVTM_CORE 44 -#define CLK_NPU_PVTPLL 45 -#define CLK_DDRPHY1X_SRC 46 -#define CLK_DDRPHY1X_HWFFC_SRC 47 -#define CLK_DDR1X 48 -#define CLK_MSCH 49 -#define CLK24_DDRMON 50 -#define ACLK_GIC_AUDIO 51 -#define HCLK_GIC_AUDIO 52 -#define HCLK_SDMMC_BUFFER 53 -#define DCLK_SDMMC_BUFFER 54 -#define ACLK_GIC600 55 -#define ACLK_SPINLOCK 56 -#define HCLK_I2S0_8CH 57 -#define HCLK_I2S1_8CH 58 -#define HCLK_I2S2_2CH 59 -#define HCLK_I2S3_2CH 60 -#define CLK_I2S0_8CH_TX_SRC 61 -#define CLK_I2S0_8CH_TX_FRAC 62 -#define MCLK_I2S0_8CH_TX 63 -#define I2S0_MCLKOUT_TX 64 -#define CLK_I2S0_8CH_RX_SRC 65 -#define CLK_I2S0_8CH_RX_FRAC 66 -#define MCLK_I2S0_8CH_RX 67 -#define I2S0_MCLKOUT_RX 68 -#define CLK_I2S1_8CH_TX_SRC 69 -#define CLK_I2S1_8CH_TX_FRAC 70 -#define MCLK_I2S1_8CH_TX 71 -#define I2S1_MCLKOUT_TX 72 -#define CLK_I2S1_8CH_RX_SRC 73 -#define CLK_I2S1_8CH_RX_FRAC 74 -#define MCLK_I2S1_8CH_RX 75 -#define I2S1_MCLKOUT_RX 76 -#define CLK_I2S2_2CH_SRC 77 -#define CLK_I2S2_2CH_FRAC 78 -#define MCLK_I2S2_2CH 79 -#define I2S2_MCLKOUT 80 -#define CLK_I2S3_2CH_TX_SRC 81 -#define CLK_I2S3_2CH_TX_FRAC 82 -#define MCLK_I2S3_2CH_TX 83 -#define I2S3_MCLKOUT_TX 84 -#define CLK_I2S3_2CH_RX_SRC 85 -#define CLK_I2S3_2CH_RX_FRAC 86 -#define MCLK_I2S3_2CH_RX 87 -#define I2S3_MCLKOUT_RX 88 -#define HCLK_PDM 89 -#define MCLK_PDM 90 -#define HCLK_VAD 91 -#define HCLK_SPDIF_8CH 92 -#define MCLK_SPDIF_8CH_SRC 93 -#define MCLK_SPDIF_8CH_FRAC 94 -#define MCLK_SPDIF_8CH 95 -#define HCLK_AUDPWM 96 -#define SCLK_AUDPWM_SRC 97 -#define SCLK_AUDPWM_FRAC 98 -#define SCLK_AUDPWM 99 -#define HCLK_ACDCDIG 100 -#define CLK_ACDCDIG_I2C 101 -#define CLK_ACDCDIG_DAC 102 -#define CLK_ACDCDIG_ADC 103 -#define ACLK_SECURE_FLASH 104 -#define HCLK_SECURE_FLASH 105 -#define ACLK_CRYPTO_NS 106 -#define HCLK_CRYPTO_NS 107 -#define CLK_CRYPTO_NS_CORE 108 -#define CLK_CRYPTO_NS_PKA 109 -#define CLK_CRYPTO_NS_RNG 110 -#define HCLK_TRNG_NS 111 -#define CLK_TRNG_NS 112 -#define PCLK_OTPC_NS 113 -#define CLK_OTPC_NS_SBPI 114 -#define CLK_OTPC_NS_USR 115 -#define HCLK_NANDC 116 -#define NCLK_NANDC 117 -#define HCLK_SFC 118 -#define HCLK_SFC_XIP 119 -#define SCLK_SFC 120 -#define ACLK_EMMC 121 -#define HCLK_EMMC 122 -#define BCLK_EMMC 123 -#define CCLK_EMMC 124 -#define TCLK_EMMC 125 -#define ACLK_PIPE 126 -#define PCLK_PIPE 127 -#define PCLK_PIPE_GRF 128 -#define ACLK_PCIE20_MST 129 -#define ACLK_PCIE20_SLV 130 -#define ACLK_PCIE20_DBI 131 -#define PCLK_PCIE20 132 -#define CLK_PCIE20_AUX_NDFT 133 -#define CLK_PCIE20_AUX_DFT 134 -#define CLK_PCIE20_PIPE_DFT 135 -#define ACLK_PCIE30X1_MST 136 -#define ACLK_PCIE30X1_SLV 137 -#define ACLK_PCIE30X1_DBI 138 -#define PCLK_PCIE30X1 139 -#define CLK_PCIE30X1_AUX_NDFT 140 -#define CLK_PCIE30X1_AUX_DFT 141 -#define CLK_PCIE30X1_PIPE_DFT 142 -#define ACLK_PCIE30X2_MST 143 -#define ACLK_PCIE30X2_SLV 144 -#define ACLK_PCIE30X2_DBI 145 -#define PCLK_PCIE30X2 146 -#define CLK_PCIE30X2_AUX_NDFT 147 -#define CLK_PCIE30X2_AUX_DFT 148 -#define CLK_PCIE30X2_PIPE_DFT 149 -#define ACLK_SATA0 150 -#define CLK_SATA0_PMALIVE 151 -#define CLK_SATA0_RXOOB 152 -#define CLK_SATA0_PIPE_NDFT 153 -#define CLK_SATA0_PIPE_DFT 154 -#define ACLK_SATA1 155 -#define CLK_SATA1_PMALIVE 156 -#define CLK_SATA1_RXOOB 157 -#define CLK_SATA1_PIPE_NDFT 158 -#define CLK_SATA1_PIPE_DFT 159 -#define ACLK_SATA2 160 -#define CLK_SATA2_PMALIVE 161 -#define CLK_SATA2_RXOOB 162 -#define CLK_SATA2_PIPE_NDFT 163 -#define CLK_SATA2_PIPE_DFT 164 -#define ACLK_USB3OTG0 165 -#define CLK_USB3OTG0_REF 166 -#define CLK_USB3OTG0_SUSPEND 167 -#define ACLK_USB3OTG1 168 -#define CLK_USB3OTG1_REF 169 -#define CLK_USB3OTG1_SUSPEND 170 -#define CLK_XPCS_EEE 171 -#define PCLK_XPCS 172 -#define ACLK_PHP 173 -#define HCLK_PHP 174 -#define PCLK_PHP 175 -#define HCLK_SDMMC0 176 -#define CLK_SDMMC0 177 -#define HCLK_SDMMC1 178 -#define CLK_SDMMC1 179 -#define ACLK_GMAC0 180 -#define PCLK_GMAC0 181 -#define CLK_MAC0_2TOP 182 -#define CLK_MAC0_OUT 183 -#define CLK_MAC0_REFOUT 184 -#define CLK_GMAC0_PTP_REF 185 -#define ACLK_USB 186 -#define HCLK_USB 187 -#define PCLK_USB 188 -#define HCLK_USB2HOST0 189 -#define HCLK_USB2HOST0_ARB 190 -#define HCLK_USB2HOST1 191 -#define HCLK_USB2HOST1_ARB 192 -#define HCLK_SDMMC2 193 -#define CLK_SDMMC2 194 -#define ACLK_GMAC1 195 -#define PCLK_GMAC1 196 -#define CLK_MAC1_2TOP 197 -#define CLK_MAC1_OUT 198 -#define CLK_MAC1_REFOUT 199 -#define CLK_GMAC1_PTP_REF 200 -#define ACLK_PERIMID 201 -#define HCLK_PERIMID 202 -#define ACLK_VI 203 -#define HCLK_VI 204 -#define PCLK_VI 205 -#define ACLK_VICAP 206 -#define HCLK_VICAP 207 -#define DCLK_VICAP 208 -#define ICLK_VICAP_G 209 -#define ACLK_ISP 210 -#define HCLK_ISP 211 -#define CLK_ISP 212 -#define PCLK_CSI2HOST1 213 -#define CLK_CIF_OUT 214 -#define CLK_CAM0_OUT 215 -#define CLK_CAM1_OUT 216 -#define ACLK_VO 217 -#define HCLK_VO 218 -#define PCLK_VO 219 -#define ACLK_VOP_PRE 220 -#define ACLK_VOP 221 -#define HCLK_VOP 222 -#define DCLK_VOP0 223 -#define DCLK_VOP1 224 -#define DCLK_VOP2 225 -#define CLK_VOP_PWM 226 -#define ACLK_HDCP 227 -#define HCLK_HDCP 228 -#define PCLK_HDCP 229 -#define PCLK_HDMI_HOST 230 -#define CLK_HDMI_SFR 231 -#define PCLK_DSITX_0 232 -#define PCLK_DSITX_1 233 -#define PCLK_EDP_CTRL 234 -#define CLK_EDP_200M 235 -#define ACLK_VPU_PRE 236 -#define HCLK_VPU_PRE 237 -#define ACLK_VPU 238 -#define HCLK_VPU 239 -#define ACLK_RGA_PRE 240 -#define HCLK_RGA_PRE 241 -#define PCLK_RGA_PRE 242 -#define ACLK_RGA 243 -#define HCLK_RGA 244 -#define CLK_RGA_CORE 245 -#define ACLK_IEP 246 -#define HCLK_IEP 247 -#define CLK_IEP_CORE 248 -#define HCLK_EBC 249 -#define DCLK_EBC 250 -#define ACLK_JDEC 251 -#define HCLK_JDEC 252 -#define ACLK_JENC 253 -#define HCLK_JENC 254 -#define PCLK_EINK 255 -#define HCLK_EINK 256 -#define ACLK_RKVENC_PRE 257 -#define HCLK_RKVENC_PRE 258 -#define ACLK_RKVENC 259 -#define HCLK_RKVENC 260 -#define CLK_RKVENC_CORE 261 -#define ACLK_RKVDEC_PRE 262 -#define HCLK_RKVDEC_PRE 263 -#define ACLK_RKVDEC 264 -#define HCLK_RKVDEC 265 -#define CLK_RKVDEC_CA 266 -#define CLK_RKVDEC_CORE 267 -#define CLK_RKVDEC_HEVC_CA 268 -#define ACLK_BUS 269 -#define PCLK_BUS 270 -#define PCLK_TSADC 271 -#define CLK_TSADC_TSEN 272 -#define CLK_TSADC 273 -#define PCLK_SARADC 274 -#define CLK_SARADC 275 -#define PCLK_SCR 276 -#define PCLK_WDT_NS 277 -#define TCLK_WDT_NS 278 -#define ACLK_DMAC0 279 -#define ACLK_DMAC1 280 -#define ACLK_MCU 281 -#define PCLK_INTMUX 282 -#define PCLK_MAILBOX 283 -#define PCLK_UART1 284 -#define CLK_UART1_SRC 285 -#define CLK_UART1_FRAC 286 -#define SCLK_UART1 287 -#define PCLK_UART2 288 -#define CLK_UART2_SRC 289 -#define CLK_UART2_FRAC 290 -#define SCLK_UART2 291 -#define PCLK_UART3 292 -#define CLK_UART3_SRC 293 -#define CLK_UART3_FRAC 294 -#define SCLK_UART3 295 -#define PCLK_UART4 296 -#define CLK_UART4_SRC 297 -#define CLK_UART4_FRAC 298 -#define SCLK_UART4 299 -#define PCLK_UART5 300 -#define CLK_UART5_SRC 301 -#define CLK_UART5_FRAC 302 -#define SCLK_UART5 303 -#define PCLK_UART6 304 -#define CLK_UART6_SRC 305 -#define CLK_UART6_FRAC 306 -#define SCLK_UART6 307 -#define PCLK_UART7 308 -#define CLK_UART7_SRC 309 -#define CLK_UART7_FRAC 310 -#define SCLK_UART7 311 -#define PCLK_UART8 312 -#define CLK_UART8_SRC 313 -#define CLK_UART8_FRAC 314 -#define SCLK_UART8 315 -#define PCLK_UART9 316 -#define CLK_UART9_SRC 317 -#define CLK_UART9_FRAC 318 -#define SCLK_UART9 319 -#define PCLK_CAN0 320 -#define CLK_CAN0 321 -#define PCLK_CAN1 322 -#define CLK_CAN1 323 -#define PCLK_CAN2 324 -#define CLK_CAN2 325 -#define CLK_I2C 326 -#define PCLK_I2C1 327 -#define CLK_I2C1 328 -#define PCLK_I2C2 329 -#define CLK_I2C2 330 -#define PCLK_I2C3 331 -#define CLK_I2C3 332 -#define PCLK_I2C4 333 -#define CLK_I2C4 334 -#define PCLK_I2C5 335 -#define CLK_I2C5 336 -#define PCLK_SPI0 337 -#define CLK_SPI0 338 -#define PCLK_SPI1 339 -#define CLK_SPI1 340 -#define PCLK_SPI2 341 -#define CLK_SPI2 342 -#define PCLK_SPI3 343 -#define CLK_SPI3 344 -#define PCLK_PWM1 345 -#define CLK_PWM1 346 -#define CLK_PWM1_CAPTURE 347 -#define PCLK_PWM2 348 -#define CLK_PWM2 349 -#define CLK_PWM2_CAPTURE 350 -#define PCLK_PWM3 351 -#define CLK_PWM3 352 -#define CLK_PWM3_CAPTURE 353 -#define DBCLK_GPIO 354 -#define PCLK_GPIO1 355 -#define DBCLK_GPIO1 356 -#define PCLK_GPIO2 357 -#define DBCLK_GPIO2 358 -#define PCLK_GPIO3 359 -#define DBCLK_GPIO3 360 -#define PCLK_GPIO4 361 -#define DBCLK_GPIO4 362 -#define OCC_SCAN_CLK_GPIO 363 -#define PCLK_TIMER 364 -#define CLK_TIMER0 365 -#define CLK_TIMER1 366 -#define CLK_TIMER2 367 -#define CLK_TIMER3 368 -#define CLK_TIMER4 369 -#define CLK_TIMER5 370 -#define ACLK_TOP_HIGH 371 -#define ACLK_TOP_LOW 372 -#define HCLK_TOP 373 -#define PCLK_TOP 374 -#define PCLK_PCIE30PHY 375 -#define CLK_OPTC_ARB 376 -#define PCLK_MIPICSIPHY 377 -#define PCLK_MIPIDSIPHY0 378 -#define PCLK_MIPIDSIPHY1 379 -#define PCLK_PIPEPHY0 380 -#define PCLK_PIPEPHY1 381 -#define PCLK_PIPEPHY2 382 -#define PCLK_CPU_BOOST 383 -#define CLK_CPU_BOOST 384 -#define PCLK_OTPPHY 385 -#define SCLK_GMAC0 386 -#define SCLK_GMAC0_RGMII_SPEED 387 -#define SCLK_GMAC0_RMII_SPEED 388 -#define SCLK_GMAC0_RX_TX 389 -#define SCLK_GMAC1 390 -#define SCLK_GMAC1_RGMII_SPEED 391 -#define SCLK_GMAC1_RMII_SPEED 392 -#define SCLK_GMAC1_RX_TX 393 -#define SCLK_SDMMC0_DRV 394 -#define SCLK_SDMMC0_SAMPLE 395 -#define SCLK_SDMMC1_DRV 396 -#define SCLK_SDMMC1_SAMPLE 397 -#define SCLK_SDMMC2_DRV 398 -#define SCLK_SDMMC2_SAMPLE 399 -#define SCLK_EMMC_DRV 400 -#define SCLK_EMMC_SAMPLE 401 -#define PCLK_EDPPHY_GRF 402 -#define CLK_HDMI_CEC 403 -#define CLK_I2S0_8CH_TX 404 -#define CLK_I2S0_8CH_RX 405 -#define CLK_I2S1_8CH_TX 406 -#define CLK_I2S1_8CH_RX 407 -#define CLK_I2S2_2CH 408 -#define CLK_I2S3_2CH_TX 409 -#define CLK_I2S3_2CH_RX 410 -#define CPLL_500M 411 -#define CPLL_250M 412 -#define CPLL_125M 413 -#define CPLL_62P5M 414 -#define CPLL_50M 415 -#define CPLL_25M 416 -#define CPLL_100M 417 -#define SCLK_DDRCLK 418 - -#define PCLK_CORE_PVTM 450 - -#define CLK_NR_CLKS (PCLK_CORE_PVTM + 1) - -/* pmu soft-reset indices */ -/* pmucru_softrst_con0 */ -#define SRST_P_PDPMU_NIU 0 -#define SRST_P_PMUCRU 1 -#define SRST_P_PMUGRF 2 -#define SRST_P_I2C0 3 -#define SRST_I2C0 4 -#define SRST_P_UART0 5 -#define SRST_S_UART0 6 -#define SRST_P_PWM0 7 -#define SRST_PWM0 8 -#define SRST_P_GPIO0 9 -#define SRST_GPIO0 10 -#define SRST_P_PMUPVTM 11 -#define SRST_PMUPVTM 12 - -/* soft-reset indices */ - -/* cru_softrst_con0 */ -#define SRST_NCORERESET0 0 -#define SRST_NCORERESET1 1 -#define SRST_NCORERESET2 2 -#define SRST_NCORERESET3 3 -#define SRST_NCPUPORESET0 4 -#define SRST_NCPUPORESET1 5 -#define SRST_NCPUPORESET2 6 -#define SRST_NCPUPORESET3 7 -#define SRST_NSRESET 8 -#define SRST_NSPORESET 9 -#define SRST_NATRESET 10 -#define SRST_NGICRESET 11 -#define SRST_NPRESET 12 -#define SRST_NPERIPHRESET 13 - -/* cru_softrst_con1 */ -#define SRST_A_CORE_NIU2DDR 16 -#define SRST_A_CORE_NIU2BUS 17 -#define SRST_P_DBG_NIU 18 -#define SRST_P_DBG 19 -#define SRST_P_DBG_DAPLITE 20 -#define SRST_DAP 21 -#define SRST_A_ADB400_CORE2GIC 22 -#define SRST_A_ADB400_GIC2CORE 23 -#define SRST_P_CORE_GRF 24 -#define SRST_P_CORE_PVTM 25 -#define SRST_CORE_PVTM 26 -#define SRST_CORE_PVTPLL 27 - -/* cru_softrst_con2 */ -#define SRST_GPU 32 -#define SRST_A_GPU_NIU 33 -#define SRST_P_GPU_NIU 34 -#define SRST_P_GPU_PVTM 35 -#define SRST_GPU_PVTM 36 -#define SRST_GPU_PVTPLL 37 -#define SRST_A_NPU_NIU 40 -#define SRST_H_NPU_NIU 41 -#define SRST_P_NPU_NIU 42 -#define SRST_A_NPU 43 -#define SRST_H_NPU 44 -#define SRST_P_NPU_PVTM 45 -#define SRST_NPU_PVTM 46 -#define SRST_NPU_PVTPLL 47 - -/* cru_softrst_con3 */ -#define SRST_A_MSCH 51 -#define SRST_HWFFC_CTRL 52 -#define SRST_DDR_ALWAYSON 53 -#define SRST_A_DDRSPLIT 54 -#define SRST_DDRDFI_CTL 55 -#define SRST_A_DMA2DDR 57 - -/* cru_softrst_con4 */ -#define SRST_A_PERIMID_NIU 64 -#define SRST_H_PERIMID_NIU 65 -#define SRST_A_GIC_AUDIO_NIU 66 -#define SRST_H_GIC_AUDIO_NIU 67 -#define SRST_A_GIC600 68 -#define SRST_A_GIC600_DEBUG 69 -#define SRST_A_GICADB_CORE2GIC 70 -#define SRST_A_GICADB_GIC2CORE 71 -#define SRST_A_SPINLOCK 72 -#define SRST_H_SDMMC_BUFFER 73 -#define SRST_D_SDMMC_BUFFER 74 -#define SRST_H_I2S0_8CH 75 -#define SRST_H_I2S1_8CH 76 -#define SRST_H_I2S2_2CH 77 -#define SRST_H_I2S3_2CH 78 - -/* cru_softrst_con5 */ -#define SRST_M_I2S0_8CH_TX 80 -#define SRST_M_I2S0_8CH_RX 81 -#define SRST_M_I2S1_8CH_TX 82 -#define SRST_M_I2S1_8CH_RX 83 -#define SRST_M_I2S2_2CH 84 -#define SRST_M_I2S3_2CH_TX 85 -#define SRST_M_I2S3_2CH_RX 86 -#define SRST_H_PDM 87 -#define SRST_M_PDM 88 -#define SRST_H_VAD 89 -#define SRST_H_SPDIF_8CH 90 -#define SRST_M_SPDIF_8CH 91 -#define SRST_H_AUDPWM 92 -#define SRST_S_AUDPWM 93 -#define SRST_H_ACDCDIG 94 -#define SRST_ACDCDIG 95 - -/* cru_softrst_con6 */ -#define SRST_A_SECURE_FLASH_NIU 96 -#define SRST_H_SECURE_FLASH_NIU 97 -#define SRST_A_CRYPTO_NS 103 -#define SRST_H_CRYPTO_NS 104 -#define SRST_CRYPTO_NS_CORE 105 -#define SRST_CRYPTO_NS_PKA 106 -#define SRST_CRYPTO_NS_RNG 107 -#define SRST_H_TRNG_NS 108 -#define SRST_TRNG_NS 109 - -/* cru_softrst_con7 */ -#define SRST_H_NANDC 112 -#define SRST_N_NANDC 113 -#define SRST_H_SFC 114 -#define SRST_H_SFC_XIP 115 -#define SRST_S_SFC 116 -#define SRST_A_EMMC 117 -#define SRST_H_EMMC 118 -#define SRST_B_EMMC 119 -#define SRST_C_EMMC 120 -#define SRST_T_EMMC 121 - -/* cru_softrst_con8 */ -#define SRST_A_PIPE_NIU 128 -#define SRST_P_PIPE_NIU 130 -#define SRST_P_PIPE_GRF 133 -#define SRST_A_SATA0 134 -#define SRST_SATA0_PIPE 135 -#define SRST_SATA0_PMALIVE 136 -#define SRST_SATA0_RXOOB 137 -#define SRST_A_SATA1 138 -#define SRST_SATA1_PIPE 139 -#define SRST_SATA1_PMALIVE 140 -#define SRST_SATA1_RXOOB 141 - -/* cru_softrst_con9 */ -#define SRST_A_SATA2 144 -#define SRST_SATA2_PIPE 145 -#define SRST_SATA2_PMALIVE 146 -#define SRST_SATA2_RXOOB 147 -#define SRST_USB3OTG0 148 -#define SRST_USB3OTG1 149 -#define SRST_XPCS 150 -#define SRST_XPCS_TX_DIV10 151 -#define SRST_XPCS_RX_DIV10 152 -#define SRST_XPCS_XGXS_RX 153 - -/* cru_softrst_con10 */ -#define SRST_P_PCIE20 160 -#define SRST_PCIE20_POWERUP 161 -#define SRST_MSTR_ARESET_PCIE20 162 -#define SRST_SLV_ARESET_PCIE20 163 -#define SRST_DBI_ARESET_PCIE20 164 -#define SRST_BRESET_PCIE20 165 -#define SRST_PERST_PCIE20 166 -#define SRST_CORE_RST_PCIE20 167 -#define SRST_NSTICKY_RST_PCIE20 168 -#define SRST_STICKY_RST_PCIE20 169 -#define SRST_PWR_RST_PCIE20 170 - -/* cru_softrst_con11 */ -#define SRST_P_PCIE30X1 176 -#define SRST_PCIE30X1_POWERUP 177 -#define SRST_M_ARESET_PCIE30X1 178 -#define SRST_S_ARESET_PCIE30X1 179 -#define SRST_D_ARESET_PCIE30X1 180 -#define SRST_BRESET_PCIE30X1 181 -#define SRST_PERST_PCIE30X1 182 -#define SRST_CORE_RST_PCIE30X1 183 -#define SRST_NSTC_RST_PCIE30X1 184 -#define SRST_STC_RST_PCIE30X1 185 -#define SRST_PWR_RST_PCIE30X1 186 - -/* cru_softrst_con12 */ -#define SRST_P_PCIE30X2 192 -#define SRST_PCIE30X2_POWERUP 193 -#define SRST_M_ARESET_PCIE30X2 194 -#define SRST_S_ARESET_PCIE30X2 195 -#define SRST_D_ARESET_PCIE30X2 196 -#define SRST_BRESET_PCIE30X2 197 -#define SRST_PERST_PCIE30X2 198 -#define SRST_CORE_RST_PCIE30X2 199 -#define SRST_NSTC_RST_PCIE30X2 200 -#define SRST_STC_RST_PCIE30X2 201 -#define SRST_PWR_RST_PCIE30X2 202 - -/* cru_softrst_con13 */ -#define SRST_A_PHP_NIU 208 -#define SRST_H_PHP_NIU 209 -#define SRST_P_PHP_NIU 210 -#define SRST_H_SDMMC0 211 -#define SRST_SDMMC0 212 -#define SRST_H_SDMMC1 213 -#define SRST_SDMMC1 214 -#define SRST_A_GMAC0 215 -#define SRST_GMAC0_TIMESTAMP 216 - -/* cru_softrst_con14 */ -#define SRST_A_USB_NIU 224 -#define SRST_H_USB_NIU 225 -#define SRST_P_USB_NIU 226 -#define SRST_P_USB_GRF 227 -#define SRST_H_USB2HOST0 228 -#define SRST_H_USB2HOST0_ARB 229 -#define SRST_USB2HOST0_UTMI 230 -#define SRST_H_USB2HOST1 231 -#define SRST_H_USB2HOST1_ARB 232 -#define SRST_USB2HOST1_UTMI 233 -#define SRST_H_SDMMC2 234 -#define SRST_SDMMC2 235 -#define SRST_A_GMAC1 236 -#define SRST_GMAC1_TIMESTAMP 237 - -/* cru_softrst_con15 */ -#define SRST_A_VI_NIU 240 -#define SRST_H_VI_NIU 241 -#define SRST_P_VI_NIU 242 -#define SRST_A_VICAP 247 -#define SRST_H_VICAP 248 -#define SRST_D_VICAP 249 -#define SRST_I_VICAP 250 -#define SRST_P_VICAP 251 -#define SRST_H_ISP 252 -#define SRST_ISP 253 -#define SRST_P_CSI2HOST1 255 - -/* cru_softrst_con16 */ -#define SRST_A_VO_NIU 256 -#define SRST_H_VO_NIU 257 -#define SRST_P_VO_NIU 258 -#define SRST_A_VOP_NIU 259 -#define SRST_A_VOP 260 -#define SRST_H_VOP 261 -#define SRST_VOP0 262 -#define SRST_VOP1 263 -#define SRST_VOP2 264 -#define SRST_VOP_PWM 265 -#define SRST_A_HDCP 266 -#define SRST_H_HDCP 267 -#define SRST_P_HDCP 268 -#define SRST_P_HDMI_HOST 270 -#define SRST_HDMI_HOST 271 - -/* cru_softrst_con17 */ -#define SRST_P_DSITX_0 272 -#define SRST_P_DSITX_1 273 -#define SRST_P_EDP_CTRL 274 -#define SRST_EDP_24M 275 -#define SRST_A_VPU_NIU 280 -#define SRST_H_VPU_NIU 281 -#define SRST_A_VPU 282 -#define SRST_H_VPU 283 -#define SRST_H_EINK 286 -#define SRST_P_EINK 287 - -/* cru_softrst_con18 */ -#define SRST_A_RGA_NIU 288 -#define SRST_H_RGA_NIU 289 -#define SRST_P_RGA_NIU 290 -#define SRST_A_RGA 292 -#define SRST_H_RGA 293 -#define SRST_RGA_CORE 294 -#define SRST_A_IEP 295 -#define SRST_H_IEP 296 -#define SRST_IEP_CORE 297 -#define SRST_H_EBC 298 -#define SRST_D_EBC 299 -#define SRST_A_JDEC 300 -#define SRST_H_JDEC 301 -#define SRST_A_JENC 302 -#define SRST_H_JENC 303 - -/* cru_softrst_con19 */ -#define SRST_A_VENC_NIU 304 -#define SRST_H_VENC_NIU 305 -#define SRST_A_RKVENC 307 -#define SRST_H_RKVENC 308 -#define SRST_RKVENC_CORE 309 - -/* cru_softrst_con20 */ -#define SRST_A_RKVDEC_NIU 320 -#define SRST_H_RKVDEC_NIU 321 -#define SRST_A_RKVDEC 322 -#define SRST_H_RKVDEC 323 -#define SRST_RKVDEC_CA 324 -#define SRST_RKVDEC_CORE 325 -#define SRST_RKVDEC_HEVC_CA 326 - -/* cru_softrst_con21 */ -#define SRST_A_BUS_NIU 336 -#define SRST_P_BUS_NIU 338 -#define SRST_P_CAN0 340 -#define SRST_CAN0 341 -#define SRST_P_CAN1 342 -#define SRST_CAN1 343 -#define SRST_P_CAN2 344 -#define SRST_CAN2 345 -#define SRST_P_GPIO1 346 -#define SRST_GPIO1 347 -#define SRST_P_GPIO2 348 -#define SRST_GPIO2 349 -#define SRST_P_GPIO3 350 -#define SRST_GPIO3 351 - -/* cru_softrst_con22 */ -#define SRST_P_GPIO4 352 -#define SRST_GPIO4 353 -#define SRST_P_I2C1 354 -#define SRST_I2C1 355 -#define SRST_P_I2C2 356 -#define SRST_I2C2 357 -#define SRST_P_I2C3 358 -#define SRST_I2C3 359 -#define SRST_P_I2C4 360 -#define SRST_I2C4 361 -#define SRST_P_I2C5 362 -#define SRST_I2C5 363 -#define SRST_P_OTPC_NS 364 -#define SRST_OTPC_NS_SBPI 365 -#define SRST_OTPC_NS_USR 366 - -/* cru_softrst_con23 */ -#define SRST_P_PWM1 368 -#define SRST_PWM1 369 -#define SRST_P_PWM2 370 -#define SRST_PWM2 371 -#define SRST_P_PWM3 372 -#define SRST_PWM3 373 -#define SRST_P_SPI0 374 -#define SRST_SPI0 375 -#define SRST_P_SPI1 376 -#define SRST_SPI1 377 -#define SRST_P_SPI2 378 -#define SRST_SPI2 379 -#define SRST_P_SPI3 380 -#define SRST_SPI3 381 - -/* cru_softrst_con24 */ -#define SRST_P_SARADC 384 -#define SRST_P_TSADC 385 -#define SRST_TSADC 386 -#define SRST_P_TIMER 387 -#define SRST_TIMER0 388 -#define SRST_TIMER1 389 -#define SRST_TIMER2 390 -#define SRST_TIMER3 391 -#define SRST_TIMER4 392 -#define SRST_TIMER5 393 -#define SRST_P_UART1 394 -#define SRST_S_UART1 395 - -/* cru_softrst_con25 */ -#define SRST_P_UART2 400 -#define SRST_S_UART2 401 -#define SRST_P_UART3 402 -#define SRST_S_UART3 403 -#define SRST_P_UART4 404 -#define SRST_S_UART4 405 -#define SRST_P_UART5 406 -#define SRST_S_UART5 407 -#define SRST_P_UART6 408 -#define SRST_S_UART6 409 -#define SRST_P_UART7 410 -#define SRST_S_UART7 411 -#define SRST_P_UART8 412 -#define SRST_S_UART8 413 -#define SRST_P_UART9 414 -#define SRST_S_UART9 415 - -/* cru_softrst_con26 */ -#define SRST_P_GRF 416 -#define SRST_P_GRF_VCCIO12 417 -#define SRST_P_GRF_VCCIO34 418 -#define SRST_P_GRF_VCCIO567 419 -#define SRST_P_SCR 420 -#define SRST_P_WDT_NS 421 -#define SRST_T_WDT_NS 422 -#define SRST_P_DFT2APB 423 -#define SRST_A_MCU 426 -#define SRST_P_INTMUX 427 -#define SRST_P_MAILBOX 428 - -/* cru_softrst_con27 */ -#define SRST_A_TOP_HIGH_NIU 432 -#define SRST_A_TOP_LOW_NIU 433 -#define SRST_H_TOP_NIU 434 -#define SRST_P_TOP_NIU 435 -#define SRST_P_TOP_CRU 438 -#define SRST_P_DDRPHY 439 -#define SRST_DDRPHY 440 -#define SRST_P_MIPICSIPHY 442 -#define SRST_P_MIPIDSIPHY0 443 -#define SRST_P_MIPIDSIPHY1 444 -#define SRST_P_PCIE30PHY 445 -#define SRST_PCIE30PHY 446 -#define SRST_P_PCIE30PHY_GRF 447 - -/* cru_softrst_con28 */ -#define SRST_P_APB2ASB_LEFT 448 -#define SRST_P_APB2ASB_BOTTOM 449 -#define SRST_P_ASB2APB_LEFT 450 -#define SRST_P_ASB2APB_BOTTOM 451 -#define SRST_P_PIPEPHY0 452 -#define SRST_PIPEPHY0 453 -#define SRST_P_PIPEPHY1 454 -#define SRST_PIPEPHY1 455 -#define SRST_P_PIPEPHY2 456 -#define SRST_PIPEPHY2 457 -#define SRST_P_USB2PHY0_GRF 458 -#define SRST_P_USB2PHY1_GRF 459 -#define SRST_P_CPU_BOOST 460 -#define SRST_CPU_BOOST 461 -#define SRST_P_OTPPHY 462 -#define SRST_OTPPHY 463 - -/* cru_softrst_con29 */ -#define SRST_USB2PHY0_POR 464 -#define SRST_USB2PHY0_USB3OTG0 465 -#define SRST_USB2PHY0_USB3OTG1 466 -#define SRST_USB2PHY1_POR 467 -#define SRST_USB2PHY1_USB2HOST0 468 -#define SRST_USB2PHY1_USB2HOST1 469 -#define SRST_P_EDPPHY_GRF 470 -#define SRST_TSADCPHY 471 -#define SRST_GMAC0_DELAYLINE 472 -#define SRST_GMAC1_DELAYLINE 473 -#define SRST_OTPC_ARB 474 -#define SRST_P_PIPEPHY0_GRF 475 -#define SRST_P_PIPEPHY1_GRF 476 -#define SRST_P_PIPEPHY2_GRF 477 - -#endif diff --git a/include/dt-bindings/power/rk3568-power.h b/include/dt-bindings/power/rk3568-power.h deleted file mode 100644 index 6cc1af1a9d2..00000000000 --- a/include/dt-bindings/power/rk3568-power.h +++ /dev/null @@ -1,32 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -#ifndef __DT_BINDINGS_POWER_RK3568_POWER_H__ -#define __DT_BINDINGS_POWER_RK3568_POWER_H__ - -/* VD_CORE */ -#define RK3568_PD_CPU_0 0 -#define RK3568_PD_CPU_1 1 -#define RK3568_PD_CPU_2 2 -#define RK3568_PD_CPU_3 3 -#define RK3568_PD_CORE_ALIVE 4 - -/* VD_PMU */ -#define RK3568_PD_PMU 5 - -/* VD_NPU */ -#define RK3568_PD_NPU 6 - -/* VD_GPU */ -#define RK3568_PD_GPU 7 - -/* VD_LOGIC */ -#define RK3568_PD_VI 8 -#define RK3568_PD_VO 9 -#define RK3568_PD_RGA 10 -#define RK3568_PD_VPU 11 -#define RK3568_PD_CENTER 12 -#define RK3568_PD_RKVDEC 13 -#define RK3568_PD_RKVENC 14 -#define RK3568_PD_PIPE 15 -#define RK3568_PD_LOGIC_ALIVE 16 - -#endif -- cgit v1.2.3 From 8719193045d8aa77c58f3396f9c235b78f4115eb Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Sat, 4 May 2024 19:43:08 +0000 Subject: rockchip: rk3588: Remove redundant device tree files Remove redundant device tree files now that RK3588 boards have been migrated to use OF_UPSTREAM. Signed-off-by: Jonas Karlman Reviewed-by: Kever Yang --- arch/arm/dts/rk3588-coolpi-cm5-evb.dts | 216 -- arch/arm/dts/rk3588-coolpi-cm5.dtsi | 649 ----- arch/arm/dts/rk3588-edgeble-neu6a-io.dts | 23 - arch/arm/dts/rk3588-edgeble-neu6a.dtsi | 31 - arch/arm/dts/rk3588-edgeble-neu6b-io.dts | 89 - arch/arm/dts/rk3588-edgeble-neu6b.dtsi | 389 --- arch/arm/dts/rk3588-evb1-v10.dts | 1080 ------- arch/arm/dts/rk3588-jaguar.dts | 803 ------ arch/arm/dts/rk3588-nanopc-t6.dts | 916 ------ arch/arm/dts/rk3588-orangepi-5-plus.dts | 847 ------ arch/arm/dts/rk3588-pinctrl.dtsi | 516 ---- arch/arm/dts/rk3588-quartzpro64.dts | 1137 -------- arch/arm/dts/rk3588-rock-5b.dts | 776 ----- arch/arm/dts/rk3588-turing-rk1.dts | 21 - arch/arm/dts/rk3588-turing-rk1.dtsi | 612 ---- arch/arm/dts/rk3588.dtsi | 341 --- arch/arm/dts/rk3588j.dtsi | 7 - arch/arm/dts/rk3588s-coolpi-4b.dts | 812 ------ arch/arm/dts/rk3588s-orangepi-5.dts | 667 ----- arch/arm/dts/rk3588s-pinctrl.dtsi | 3447 ----------------------- arch/arm/dts/rk3588s-rock-5a.dts | 744 ----- arch/arm/dts/rk3588s.dtsi | 2485 ---------------- include/dt-bindings/clock/rockchip,rk3588-cru.h | 766 ----- include/dt-bindings/power/rk3588-power.h | 69 - include/dt-bindings/reset/rockchip,rk3588-cru.h | 754 ----- 25 files changed, 18197 deletions(-) delete mode 100644 arch/arm/dts/rk3588-coolpi-cm5-evb.dts delete mode 100644 arch/arm/dts/rk3588-coolpi-cm5.dtsi delete mode 100644 arch/arm/dts/rk3588-edgeble-neu6a-io.dts delete mode 100644 arch/arm/dts/rk3588-edgeble-neu6a.dtsi delete mode 100644 arch/arm/dts/rk3588-edgeble-neu6b-io.dts delete mode 100644 arch/arm/dts/rk3588-edgeble-neu6b.dtsi delete mode 100644 arch/arm/dts/rk3588-evb1-v10.dts delete mode 100644 arch/arm/dts/rk3588-jaguar.dts delete mode 100644 arch/arm/dts/rk3588-nanopc-t6.dts delete mode 100644 arch/arm/dts/rk3588-orangepi-5-plus.dts delete mode 100644 arch/arm/dts/rk3588-pinctrl.dtsi delete mode 100644 arch/arm/dts/rk3588-quartzpro64.dts delete mode 100644 arch/arm/dts/rk3588-rock-5b.dts delete mode 100644 arch/arm/dts/rk3588-turing-rk1.dts delete mode 100644 arch/arm/dts/rk3588-turing-rk1.dtsi delete mode 100644 arch/arm/dts/rk3588.dtsi delete mode 100644 arch/arm/dts/rk3588j.dtsi delete mode 100644 arch/arm/dts/rk3588s-coolpi-4b.dts delete mode 100644 arch/arm/dts/rk3588s-orangepi-5.dts delete mode 100644 arch/arm/dts/rk3588s-pinctrl.dtsi delete mode 100644 arch/arm/dts/rk3588s-rock-5a.dts delete mode 100644 arch/arm/dts/rk3588s.dtsi delete mode 100644 include/dt-bindings/clock/rockchip,rk3588-cru.h delete mode 100644 include/dt-bindings/power/rk3588-power.h delete mode 100644 include/dt-bindings/reset/rockchip,rk3588-cru.h (limited to 'include') diff --git a/arch/arm/dts/rk3588-coolpi-cm5-evb.dts b/arch/arm/dts/rk3588-coolpi-cm5-evb.dts deleted file mode 100644 index a4946cdc3bb..00000000000 --- a/arch/arm/dts/rk3588-coolpi-cm5-evb.dts +++ /dev/null @@ -1,216 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (c) 2023 Rockchip Electronics Co., Ltd. - * - */ - -/dts-v1/; - -#include -#include "rk3588-coolpi-cm5.dtsi" - -/ { - model = "RK3588 CoolPi CM5 EVB"; - compatible = "coolpi,pi-cm5-evb", "coolpi,pi-cm5", "rockchip,rk3588"; - - backlight: backlight { - compatible = "pwm-backlight"; - enable-gpios = <&gpio4 RK_PA3 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&bl_en>; - power-supply = <&vcc12v_dcin>; - pwms = <&pwm2 0 25000 0>; - }; - - leds: leds { - compatible = "gpio-leds"; - - green_led: led-0 { - color = ; - function = LED_FUNCTION_STATUS; - gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_HIGH>; - linux,default-trigger = "heartbeat"; - }; - }; - - vcc12v_dcin: vcc12v-dcin-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc12v_dcin"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <12000000>; - regulator-max-microvolt = <12000000>; - }; - - vcc5v0_sys: vcc5v0-sys-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc5v0_sys"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - vin-supply = <&vcc12v_dcin>; - }; - - vcc3v3_sys: vcc3v3-sys-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc3v3_sys"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <&vcc12v_dcin>; - }; - - vcc3v3_lcd: vcc3v3-lcd-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc3v3_lcd"; - enable-active-high; - gpio = <&gpio1 RK_PC4 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&lcdpwr_en>; - vin-supply = <&vcc3v3_sys>; - }; - - vcc5v0_usb_host1: vcc5v0_usb_host2: vcc5v0-usb-host-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc5v0_host"; - regulator-boot-on; - regulator-always-on; - enable-active-high; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - gpio = <&gpio1 RK_PD5 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&usb_host_pwren>; - vin-supply = <&vcc5v0_sys>; - }; - - vcc5v0_usb30_otg: vcc5v0-usb30-otg-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc5v0_otg"; - regulator-boot-on; - regulator-always-on; - enable-active-high; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&usb_otg_pwren>; - vin-supply = <&vcc5v0_sys>; - }; -}; - -/* M.2 E-Key */ -&pcie2x1l1 { - reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>; - vpcie3v3-supply = <&vcc3v3_sys>; - pinctrl-names = "default"; - pinctrl-0 = <&pcie_clkreq &pcie_wake &pcie_rst &wifi_pwron &bt_pwron>; - status = "okay"; -}; - -&pcie30phy { - status = "okay"; -}; - -/* Standard pcie */ -&pcie3x2 { - reset-gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_HIGH>; - vpcie3v3-supply = <&vcc3v3_sys>; - status = "okay"; -}; - -/* M.2 M-Key ssd */ -&pcie3x4 { - num-lanes = <2>; - reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>; - vpcie3v3-supply = <&vcc3v3_sys>; - status = "okay"; -}; - -&pinctrl { - lcd { - lcdpwr_en: lcdpwr-en { - rockchip,pins = <1 RK_PC4 RK_FUNC_GPIO &pcfg_pull_down>; - }; - - bl_en: bl-en { - rockchip,pins = <4 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - usb { - usb_host_pwren: usb-host-pwren { - rockchip,pins = <1 RK_PD5 RK_FUNC_GPIO &pcfg_pull_up>; - }; - - usb_otg_pwren: usb-otg-pwren { - rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - wifi { - bt_pwron: bt-pwron { - rockchip,pins = <3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>; - }; - - pcie_clkreq: pcie-clkreq { - rockchip,pins = <4 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>; - }; - - pcie_rst: pcie-rst { - rockchip,pins = <4 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>; - }; - - wifi_pwron: wifi-pwron { - rockchip,pins = <3 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>; - }; - - pcie_wake: pcie-wake { - rockchip,pins = <4 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; -}; - -&pwm2 { - status = "okay"; -}; - -&sata1 { - status = "okay"; -}; - -&u2phy2 { - status = "okay"; -}; - -&u2phy3 { - status = "okay"; -}; - -&u2phy2_host { - phy-supply = <&vcc5v0_usb_host1>; - status = "okay"; -}; - -&u2phy3_host { - phy-supply = <&vcc5v0_usb_host2>; - status = "okay"; -}; - -&usb_host0_ehci { - status = "okay"; -}; - -&usb_host0_ohci { - status = "okay"; -}; - -&usb_host1_ehci { - status = "okay"; -}; - -&usb_host1_ohci { - status = "okay"; -}; diff --git a/arch/arm/dts/rk3588-coolpi-cm5.dtsi b/arch/arm/dts/rk3588-coolpi-cm5.dtsi deleted file mode 100644 index 9cb6d566da6..00000000000 --- a/arch/arm/dts/rk3588-coolpi-cm5.dtsi +++ /dev/null @@ -1,649 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (c) 2023 Rockchip Electronics Co., Ltd. - * - */ - -/dts-v1/; - -#include -#include -#include -#include "rk3588.dtsi" - -/ { - compatible = "coolpi,pi-cm5", "rockchip,rk3588"; - - aliases { - mmc0 = &sdhci; - mmc1 = &sdmmc; - mmc2 = &sdio; - }; - - analog-sound { - compatible = "audio-graph-card"; - dais = <&i2s0_8ch_p0>; - label = "rk3588-es8316"; - routing = "MIC2", "Mic Jack", - "Headphones", "HPOL", - "Headphones", "HPOR"; - widgets = "Microphone", "Mic Jack", - "Headphone", "Headphones"; - }; - - chosen { - stdout-path = "serial2:1500000n8"; - }; - - avdd0v85_pcie20: avdd0v85-pcie20-regulator { - compatible = "regulator-fixed"; - regulator-name = "avdd0v85_pcie20"; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <850000>; - regulator-max-microvolt = <850000>; - vin-supply = <&vdd_0v85_s0>; - }; - - avdd1v8_pcie20: avdd1v8-pcie20-regulator { - compatible = "regulator-fixed"; - regulator-name = "avdd1v8_pcie20"; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - vin-supply = <&avcc_1v8_s0>; - }; - - avdd0v75_pcie30: avdd0v75-pcie30-regulator { - compatible = "regulator-fixed"; - regulator-name = "avdd0v75_pcie30"; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <750000>; - regulator-max-microvolt = <750000>; - vin-supply = <&avdd_0v75_s0>; - }; - - pcie30_avdd1v8: avdd1v8-pcie30-regulator { - compatible = "regulator-fixed"; - regulator-name = "pcie30_avdd1v8"; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - vin-supply = <&avcc_1v8_s0>; - }; -}; - -&combphy0_ps { - status = "okay"; -}; - -&combphy1_ps { - status = "okay"; -}; - -&combphy2_psu { - status = "okay"; -}; - -&cpu_b0 { - cpu-supply = <&vdd_cpu_big0_s0>; -}; - -&cpu_b1 { - cpu-supply = <&vdd_cpu_big0_s0>; -}; - -&cpu_b2 { - cpu-supply = <&vdd_cpu_big1_s0>; -}; - -&cpu_b3 { - cpu-supply = <&vdd_cpu_big1_s0>; -}; - -&cpu_l0 { - cpu-supply = <&vdd_cpu_lit_s0>; -}; - -&cpu_l1 { - cpu-supply = <&vdd_cpu_lit_s0>; -}; - -&cpu_l2 { - cpu-supply = <&vdd_cpu_lit_s0>; -}; - -&cpu_l3 { - cpu-supply = <&vdd_cpu_lit_s0>; -}; - -&gmac0 { - clock_in_out = "output"; - phy-handle = <&rgmii_phy>; - phy-mode = "rgmii-rxid"; - pinctrl-0 = <&gmac0_miim - &gmac0_tx_bus2 - &gmac0_rx_bus2 - &gmac0_rgmii_clk - &gmac0_rgmii_bus>; - pinctrl-names = "default"; - rx_delay = <0x00>; - tx_delay = <0x43>; - status = "okay"; -}; - -&i2c0 { - pinctrl-0 = <&i2c0m2_xfer>; - status = "okay"; - - vdd_cpu_big0_s0: regulator@42 { - compatible = "rockchip,rk8602"; - reg = <0x42>; - fcs,suspend-voltage-selector = <1>; - regulator-name = "vdd_cpu_big0_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <550000>; - regulator-max-microvolt = <1050000>; - regulator-ramp-delay = <2300>; - vin-supply = <&vcc5v0_sys>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_cpu_big1_s0: regulator@43 { - compatible = "rockchip,rk8603", "rockchip,rk8602"; - reg = <0x43>; - fcs,suspend-voltage-selector = <1>; - regulator-name = "vdd_cpu_big1_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <550000>; - regulator-max-microvolt = <1050000>; - regulator-ramp-delay = <2300>; - vin-supply = <&vcc5v0_sys>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; -}; - -&i2c2 { - status = "okay"; - - vdd_npu_s0: regulator@42 { - compatible = "rockchip,rk8602"; - reg = <0x42>; - fcs,suspend-voltage-selector = <1>; - regulator-name = "vdd_npu_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <550000>; - regulator-max-microvolt = <950000>; - regulator-ramp-delay = <2300>; - vin-supply = <&vcc5v0_sys>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; -}; - -&i2c6 { - status = "okay"; - - hym8563: rtc@51 { - compatible = "haoyu,hym8563"; - reg = <0x51>; - interrupt-parent = <&gpio0>; - interrupts = ; - #clock-cells = <0>; - clock-output-names = "hym8563"; - pinctrl-names = "default"; - pinctrl-0 = <&hym8563_int>; - wakeup-source; - }; -}; - -&i2c7 { - pinctrl-0 = <&i2c7m0_xfer>; - status = "okay"; - - es8316: audio-codec@11 { - compatible = "everest,es8316"; - reg = <0x11>; - assigned-clocks = <&cru I2S0_8CH_MCLKOUT>; - assigned-clock-rates = <12288000>; - clocks = <&cru I2S0_8CH_MCLKOUT>; - clock-names = "mclk"; - #sound-dai-cells = <0>; - - port { - es8316_p0_0: endpoint { - remote-endpoint = <&i2s0_8ch_p0_0>; - }; - }; - }; -}; - -&i2s0_8ch { - pinctrl-0 = <&i2s0_lrck - &i2s0_mclk - &i2s0_sclk - &i2s0_sdi0 - &i2s0_sdo0>; - status = "okay"; - - i2s0_8ch_p0: port { - i2s0_8ch_p0_0: endpoint { - dai-format = "i2s"; - mclk-fs = <256>; - remote-endpoint = <&es8316_p0_0>; - }; - }; -}; - -&mdio0 { - rgmii_phy: ethernet-phy@1 { - /* YT8531C/H */ - compatible = "ethernet-phy-ieee802.3-c22"; - reg = <0x1>; - pinctrl-names = "default"; - pinctrl-0 = <&yt8531_rst>; - reset-assert-us = <20000>; - reset-deassert-us = <100000>; - reset-gpios = <&gpio4 RK_PB3 GPIO_ACTIVE_LOW>; - }; -}; - -/* ethernet */ -&pcie2x1l2 { - reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_HIGH>; - vpcie3v3-supply = <&vcc3v3_sys>; - pinctrl-names = "default"; - pinctrl-0 = <&yt6801_isolate>; - status = "okay"; -}; - -&pinctrl { - hym8563 { - hym8563_int: hym8563-int { - rockchip,pins = <0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - yt6801 { - yt6801_isolate: yt6801-isolate { - rockchip,pins = <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - yt8531 { - yt8531_rst: yt8531-rst { - rockchip,pins = <4 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; -}; - -&saradc { - vref-supply = <&vcc_1v8_s0>; - status = "okay"; -}; - -&sdhci { - bus-width = <8>; - max-frequency = <200000000>; - mmc-hs400-1_8v; - mmc-hs400-enhanced-strobe; - no-sdio; - no-sd; - non-removable; - status = "okay"; -}; - -&sdmmc { - bus-width = <4>; - cap-mmc-highspeed; - cap-sd-highspeed; - disable-wp; - max-frequency = <150000000>; - no-sdio; - no-mmc; - sd-uhs-sdr104; - vqmmc-supply = <&vccio_sd_s0>; - status = "okay"; -}; - -&spi2 { - assigned-clocks = <&cru CLK_SPI2>; - assigned-clock-rates = <200000000>; - num-cs = <1>; - pinctrl-names = "default"; - pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>; - status = "okay"; - - pmic@0 { - compatible = "rockchip,rk806"; - reg = <0x0>; - interrupt-parent = <&gpio0>; - interrupts = <7 IRQ_TYPE_LEVEL_LOW>; - gpio-controller; - #gpio-cells = <2>; - pinctrl-names = "default"; - pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>, - <&rk806_dvs2_null>, <&rk806_dvs3_null>; - spi-max-frequency = <1000000>; - vcc1-supply = <&vcc5v0_sys>; - vcc2-supply = <&vcc5v0_sys>; - vcc3-supply = <&vcc5v0_sys>; - vcc4-supply = <&vcc5v0_sys>; - vcc5-supply = <&vcc5v0_sys>; - vcc6-supply = <&vcc5v0_sys>; - vcc7-supply = <&vcc5v0_sys>; - vcc8-supply = <&vcc5v0_sys>; - vcc9-supply = <&vcc5v0_sys>; - vcc10-supply = <&vcc5v0_sys>; - vcc11-supply = <&vcc_2v0_pldo_s3>; - vcc12-supply = <&vcc5v0_sys>; - vcc13-supply = <&vcc_2v0_pldo_s3>; - vcc14-supply = <&vcc_2v0_pldo_s3>; - vcca-supply = <&vcc5v0_sys>; - - rk806_dvs1_null: dvs1-null-pins { - pins = "gpio_pwrctrl2"; - function = "pin_fun0"; - }; - - rk806_dvs2_null: dvs2-null-pins { - pins = "gpio_pwrctrl2"; - function = "pin_fun0"; - }; - - rk806_dvs3_null: dvs3-null-pins { - pins = "gpio_pwrctrl3"; - function = "pin_fun0"; - }; - - regulators { - vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 { - regulator-boot-on; - regulator-min-microvolt = <550000>; - regulator-max-microvolt = <950000>; - regulator-ramp-delay = <12500>; - regulator-name = "vdd_gpu_s0"; - regulator-enable-ramp-delay = <400>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <550000>; - regulator-max-microvolt = <950000>; - regulator-ramp-delay = <12500>; - regulator-name = "vdd_cpu_lit_s0"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_log_s0: dcdc-reg3 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <675000>; - regulator-max-microvolt = <750000>; - regulator-ramp-delay = <12500>; - regulator-name = "vdd_log_s0"; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <750000>; - }; - }; - - vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <550000>; - regulator-max-microvolt = <950000>; - regulator-ramp-delay = <12500>; - regulator-name = "vdd_vdenc_s0"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_ddr_s0: dcdc-reg5 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <675000>; - regulator-max-microvolt = <900000>; - regulator-ramp-delay = <12500>; - regulator-name = "vdd_ddr_s0"; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <850000>; - }; - }; - - vdd2_ddr_s3: dcdc-reg6 { - regulator-always-on; - regulator-boot-on; - regulator-name = "vdd2_ddr_s3"; - - regulator-state-mem { - regulator-on-in-suspend; - }; - }; - - vcc_2v0_pldo_s3: dcdc-reg7 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <2000000>; - regulator-max-microvolt = <2000000>; - regulator-ramp-delay = <12500>; - regulator-name = "vdd_2v0_pldo_s3"; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <2000000>; - }; - }; - - vcc_3v3_s3: dcdc-reg8 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-name = "vcc_3v3_s3"; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <3300000>; - }; - }; - - vddq_ddr_s0: dcdc-reg9 { - regulator-always-on; - regulator-boot-on; - regulator-name = "vddq_ddr_s0"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_1v8_s3: dcdc-reg10 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-name = "vcc_1v8_s3"; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - avcc_1v8_s0: pldo-reg1 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-name = "avcc_1v8_s0"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_1v8_s0: pldo-reg2 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-name = "vcc_1v8_s0"; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - avdd_1v2_s0: pldo-reg3 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1200000>; - regulator-name = "avdd_1v2_s0"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_3v3_s0: pldo-reg4 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-ramp-delay = <12500>; - regulator-name = "vcc_3v3_s0"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vccio_sd_s0: pldo-reg5 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - regulator-ramp-delay = <12500>; - regulator-name = "vccio_sd_s0"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - pldo6_s3: pldo-reg6 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-name = "pldo6_s3"; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vdd_0v75_s3: nldo-reg1 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <750000>; - regulator-max-microvolt = <750000>; - regulator-name = "vdd_0v75_s3"; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <750000>; - }; - }; - - vdd_ddr_pll_s0: nldo-reg2 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <850000>; - regulator-max-microvolt = <850000>; - regulator-name = "vdd_ddr_pll_s0"; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <850000>; - }; - }; - - avdd_0v75_s0: nldo-reg3 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <750000>; - regulator-max-microvolt = <750000>; - regulator-name = "avdd_0v75_s0"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_0v85_s0: nldo-reg4 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <850000>; - regulator-max-microvolt = <850000>; - regulator-name = "vdd_0v85_s0"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_0v75_s0: nldo-reg5 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <750000>; - regulator-max-microvolt = <750000>; - regulator-name = "vdd_0v75_s0"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - }; - }; -}; - -&tsadc { - status = "okay"; -}; - -&uart2 { - pinctrl-0 = <&uart2m0_xfer>; - status = "okay"; -}; diff --git a/arch/arm/dts/rk3588-edgeble-neu6a-io.dts b/arch/arm/dts/rk3588-edgeble-neu6a-io.dts deleted file mode 100644 index be6a4f4f90f..00000000000 --- a/arch/arm/dts/rk3588-edgeble-neu6a-io.dts +++ /dev/null @@ -1,23 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (c) 2022 Edgeble AI Technologies Pvt. Ltd. - */ - -/dts-v1/; -#include "rk3588.dtsi" -#include "rk3588-edgeble-neu6a.dtsi" - -/ { - model = "Edgeble Neu6A IO Board"; - compatible = "edgeble,neural-compute-module-6a-io", - "edgeble,neural-compute-module-6a", "rockchip,rk3588"; - - chosen { - stdout-path = "serial2:1500000n8"; - }; -}; - -&uart2 { - pinctrl-0 = <&uart2m0_xfer>; - status = "okay"; -}; diff --git a/arch/arm/dts/rk3588-edgeble-neu6a.dtsi b/arch/arm/dts/rk3588-edgeble-neu6a.dtsi deleted file mode 100644 index 727580aaa10..00000000000 --- a/arch/arm/dts/rk3588-edgeble-neu6a.dtsi +++ /dev/null @@ -1,31 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (c) 2022 Edgeble AI Technologies Pvt. Ltd. - */ - -/ { - compatible = "edgeble,neural-compute-module-6a", "rockchip,rk3588"; - - aliases { - mmc0 = &sdhci; - }; - - vcc12v_dcin: vcc12v-dcin-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc12v_dcin"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <12000000>; - regulator-max-microvolt = <12000000>; - }; -}; - -&sdhci { - bus-width = <8>; - no-sdio; - no-sd; - non-removable; - mmc-hs400-1_8v; - mmc-hs400-enhanced-strobe; - status = "okay"; -}; diff --git a/arch/arm/dts/rk3588-edgeble-neu6b-io.dts b/arch/arm/dts/rk3588-edgeble-neu6b-io.dts deleted file mode 100644 index 070baeb6343..00000000000 --- a/arch/arm/dts/rk3588-edgeble-neu6b-io.dts +++ /dev/null @@ -1,89 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (c) 2023 Edgeble AI Technologies Pvt. Ltd. - */ - -/dts-v1/; -#include "rk3588j.dtsi" -#include "rk3588-edgeble-neu6b.dtsi" - -/ { - model = "Edgeble Neu6B IO Board"; - compatible = "edgeble,neural-compute-module-6a-io", - "edgeble,neural-compute-module-6b", "rockchip,rk3588"; - - chosen { - stdout-path = "serial2:1500000n8"; - }; -}; - -&combphy0_ps { - status = "okay"; -}; - -&i2c6 { - status = "okay"; - - hym8563: rtc@51 { - compatible = "haoyu,hym8563"; - reg = <0x51>; - interrupt-parent = <&gpio0>; - interrupts = ; - #clock-cells = <0>; - clock-output-names = "hym8563"; - pinctrl-names = "default"; - pinctrl-0 = <&hym8563_int>; - wakeup-source; - }; -}; - -&pinctrl { - hym8563 { - hym8563_int: hym8563-int { - rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; -}; - -/* FAN */ -&pwm2 { - pinctrl-0 = <&pwm2m1_pins>; - pinctrl-names = "default"; - status = "okay"; -}; - -&sata0 { - status = "okay"; -}; - -&sdmmc { - bus-width = <4>; - cap-mmc-highspeed; - cap-sd-highspeed; - disable-wp; - no-sdio; - no-mmc; - sd-uhs-sdr104; - vmmc-supply = <&vcc_3v3_s3>; - vqmmc-supply = <&vccio_sd_s0>; - status = "okay"; -}; - -&uart2 { - pinctrl-0 = <&uart2m0_xfer>; - status = "okay"; -}; - -/* RS232 */ -&uart6 { - pinctrl-0 = <&uart6m0_xfer>; - pinctrl-names = "default"; - status = "okay"; -}; - -/* RS485 */ -&uart7 { - pinctrl-0 = <&uart7m2_xfer>; - pinctrl-names = "default"; - status = "okay"; -}; diff --git a/arch/arm/dts/rk3588-edgeble-neu6b.dtsi b/arch/arm/dts/rk3588-edgeble-neu6b.dtsi deleted file mode 100644 index 017559bba37..00000000000 --- a/arch/arm/dts/rk3588-edgeble-neu6b.dtsi +++ /dev/null @@ -1,389 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (c) 2023 Edgeble AI Technologies Pvt. Ltd. - */ - -/ { - compatible = "edgeble,neural-compute-module-6b", "rockchip,rk3588"; - - aliases { - mmc0 = &sdhci; - }; - - vcc12v_dcin: vcc12v-dcin-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc12v_dcin"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <12000000>; - regulator-max-microvolt = <12000000>; - }; - - vcc5v0_sys: vcc5v0-sys-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc5v0_sys"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - vin-supply = <&vcc12v_dcin>; - }; - - vcc_1v1_nldo_s3: vcc-1v1-nldo-s3-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc_1v1_nldo_s3"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1100000>; - regulator-max-microvolt = <1100000>; - vin-supply = <&vcc5v0_sys>; - }; -}; - -&cpu_l0 { - cpu-supply = <&vdd_cpu_lit_s0>; -}; - -&cpu_l1 { - cpu-supply = <&vdd_cpu_lit_s0>; -}; - -&cpu_l2 { - cpu-supply = <&vdd_cpu_lit_s0>; -}; - -&cpu_l3 { - cpu-supply = <&vdd_cpu_lit_s0>; -}; - -&sdhci { - bus-width = <8>; - no-sdio; - no-sd; - non-removable; - mmc-hs400-1_8v; - mmc-hs400-enhanced-strobe; - status = "okay"; -}; - -&spi2 { - status = "okay"; - assigned-clocks = <&cru CLK_SPI2>; - assigned-clock-rates = <200000000>; - num-cs = <1>; - pinctrl-names = "default"; - pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>; - - pmic@0 { - compatible = "rockchip,rk806"; - spi-max-frequency = <1000000>; - reg = <0x0>; - interrupt-parent = <&gpio0>; - interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>, - <&rk806_dvs2_null>, <&rk806_dvs3_null>; - - vcc1-supply = <&vcc5v0_sys>; - vcc2-supply = <&vcc5v0_sys>; - vcc3-supply = <&vcc5v0_sys>; - vcc4-supply = <&vcc5v0_sys>; - vcc5-supply = <&vcc5v0_sys>; - vcc6-supply = <&vcc5v0_sys>; - vcc7-supply = <&vcc5v0_sys>; - vcc8-supply = <&vcc5v0_sys>; - vcc9-supply = <&vcc5v0_sys>; - vcc10-supply = <&vcc5v0_sys>; - vcc11-supply = <&vcc_2v0_pldo_s3>; - vcc12-supply = <&vcc5v0_sys>; - vcc13-supply = <&vcc_1v1_nldo_s3>; - vcc14-supply = <&vcc_1v1_nldo_s3>; - vcca-supply = <&vcc5v0_sys>; - - gpio-controller; - #gpio-cells = <2>; - - rk806_dvs1_null: dvs1-null-pins { - pins = "gpio_pwrctrl2"; - function = "pin_fun0"; - }; - - rk806_dvs2_null: dvs2-null-pins { - pins = "gpio_pwrctrl2"; - function = "pin_fun0"; - }; - - rk806_dvs3_null: dvs3-null-pins { - pins = "gpio_pwrctrl3"; - function = "pin_fun0"; - }; - - regulators { - vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 { - regulator-name = "vdd_gpu_s0"; - regulator-boot-on; - regulator-min-microvolt = <550000>; - regulator-max-microvolt = <950000>; - regulator-ramp-delay = <12500>; - regulator-enable-ramp-delay = <400>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 { - regulator-name = "vdd_cpu_lit_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <550000>; - regulator-max-microvolt = <950000>; - regulator-ramp-delay = <12500>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_log_s0: dcdc-reg3 { - regulator-name = "vdd_log_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <675000>; - regulator-max-microvolt = <750000>; - regulator-ramp-delay = <12500>; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <750000>; - }; - }; - - vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 { - regulator-name = "vdd_vdenc_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <550000>; - regulator-max-microvolt = <950000>; - regulator-init-microvolt = <750000>; - regulator-ramp-delay = <12500>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_ddr_s0: dcdc-reg5 { - regulator-name = "vdd_ddr_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <675000>; - regulator-max-microvolt = <900000>; - regulator-ramp-delay = <12500>; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <850000>; - }; - }; - - vdd2_ddr_s3: dcdc-reg6 { - regulator-name = "vdd2_ddr_s3"; - regulator-always-on; - regulator-boot-on; - - regulator-state-mem { - regulator-on-in-suspend; - }; - }; - - vcc_2v0_pldo_s3: dcdc-reg7 { - regulator-name = "vdd_2v0_pldo_s3"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <2000000>; - regulator-max-microvolt = <2000000>; - regulator-ramp-delay = <12500>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <2000000>; - }; - }; - - vcc_3v3_s3: dcdc-reg8 { - regulator-name = "vcc_3v3_s3"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <3300000>; - }; - }; - - vddq_ddr_s0: dcdc-reg9 { - regulator-name = "vddq_ddr_s0"; - regulator-always-on; - regulator-boot-on; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_1v8_s3: dcdc-reg10 { - regulator-name = "vcc_1v8_s3"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - avcc_1v8_s0: pldo-reg1 { - regulator-name = "avcc_1v8_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_1v8_s0: pldo-reg2 { - regulator-name = "vcc_1v8_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - avdd_1v2_s0: pldo-reg3 { - regulator-name = "avdd_1v2_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1200000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_3v3_s0: pldo-reg4 { - regulator-name = "vcc_3v3_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-ramp-delay = <12500>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vccio_sd_s0: pldo-reg5 { - regulator-name = "vccio_sd_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - regulator-ramp-delay = <12500>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - pldo6_s3: pldo-reg6 { - regulator-name = "pldo6_s3"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vdd_0v75_s3: nldo-reg1 { - regulator-name = "vdd_0v75_s3"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <750000>; - regulator-max-microvolt = <750000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <750000>; - }; - }; - - vdd_ddr_pll_s0: nldo-reg2 { - regulator-name = "vdd_ddr_pll_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <850000>; - regulator-max-microvolt = <850000>; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <850000>; - }; - }; - - avdd_0v75_s0: nldo-reg3 { - regulator-name = "avdd_0v75_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <750000>; - regulator-max-microvolt = <750000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_0v85_s0: nldo-reg4 { - regulator-name = "vdd_0v85_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <850000>; - regulator-max-microvolt = <850000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_0v75_s0: nldo-reg5 { - regulator-name = "vdd_0v75_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <750000>; - regulator-max-microvolt = <750000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - }; - }; -}; diff --git a/arch/arm/dts/rk3588-evb1-v10.dts b/arch/arm/dts/rk3588-evb1-v10.dts deleted file mode 100644 index ac7c677b0fb..00000000000 --- a/arch/arm/dts/rk3588-evb1-v10.dts +++ /dev/null @@ -1,1080 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (c) 2021 Rockchip Electronics Co., Ltd. - * - */ - -/dts-v1/; - -#include -#include -#include -#include "rk3588.dtsi" - -/ { - model = "Rockchip RK3588 EVB1 V10 Board"; - compatible = "rockchip,rk3588-evb1-v10", "rockchip,rk3588"; - - aliases { - ethernet0 = &gmac0; - mmc0 = &sdhci; - }; - - chosen { - stdout-path = "serial2:1500000n8"; - }; - - adc-keys { - compatible = "adc-keys"; - io-channels = <&saradc 1>; - io-channel-names = "buttons"; - keyup-threshold-microvolt = <1800000>; - poll-interval = <100>; - - button-vol-up { - label = "Volume Up"; - linux,code = ; - press-threshold-microvolt = <17000>; - }; - - button-vol-down { - label = "Volume Down"; - linux,code = ; - press-threshold-microvolt = <417000>; - }; - - button-menu { - label = "Menu"; - linux,code = ; - press-threshold-microvolt = <890000>; - }; - - button-escape { - label = "Escape"; - linux,code = ; - press-threshold-microvolt = <1235000>; - }; - }; - - analog-sound { - compatible = "simple-audio-card"; - pinctrl-names = "default"; - pinctrl-0 = <&hp_detect>; - simple-audio-card,name = "RK3588 EVB1 Audio"; - simple-audio-card,aux-devs = <&_headphone>, <&_speaker>; - simple-audio-card,bitclock-master = <&masterdai>; - simple-audio-card,format = "i2s"; - simple-audio-card,frame-master = <&masterdai>; - simple-audio-card,hp-det-gpio = <&gpio1 RK_PD5 GPIO_ACTIVE_LOW>; - simple-audio-card,mclk-fs = <256>; - simple-audio-card,pin-switches = "Headphones", "Speaker"; - simple-audio-card,routing = - "Speaker Amplifier INL", "LOUT2", - "Speaker Amplifier INR", "ROUT2", - "Speaker", "Speaker Amplifier OUTL", - "Speaker", "Speaker Amplifier OUTR", - "Headphones Amplifier INL", "LOUT1", - "Headphones Amplifier INR", "ROUT1", - "Headphones", "Headphones Amplifier OUTL", - "Headphones", "Headphones Amplifier OUTR", - "LINPUT1", "Onboard Microphone", - "RINPUT1", "Onboard Microphone", - "LINPUT2", "Microphone Jack", - "RINPUT2", "Microphone Jack"; - simple-audio-card,widgets = - "Microphone", "Microphone Jack", - "Microphone", "Onboard Microphone", - "Headphone", "Headphones", - "Speaker", "Speaker"; - - simple-audio-card,cpu { - sound-dai = <&i2s0_8ch>; - }; - - masterdai: simple-audio-card,codec { - sound-dai = <&es8388>; - system-clock-frequency = <12288000>; - }; - }; - - amp_headphone: headphone-amplifier { - compatible = "simple-audio-amplifier"; - enable-gpios = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&headphone_amplifier_en>; - sound-name-prefix = "Headphones Amplifier"; - }; - - amp_speaker: speaker-amplifier { - compatible = "simple-audio-amplifier"; - enable-gpios = <&gpio1 RK_PD3 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&speaker_amplifier_en>; - sound-name-prefix = "Speaker Amplifier"; - }; - - backlight: backlight { - compatible = "pwm-backlight"; - power-supply = <&vcc12v_dcin>; - pwms = <&pwm2 0 25000 0>; - }; - - pcie20_avdd0v85: pcie20-avdd0v85-regulator { - compatible = "regulator-fixed"; - regulator-name = "pcie20_avdd0v85"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <850000>; - regulator-max-microvolt = <850000>; - vin-supply = <&avdd_0v85_s0>; - }; - - pcie20_avdd1v8: pcie20-avdd1v8-regulator { - compatible = "regulator-fixed"; - regulator-name = "pcie20_avdd1v8"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - vin-supply = <&avcc_1v8_s0>; - }; - - pcie30_avdd0v75: pcie30-avdd0v75-regulator { - compatible = "regulator-fixed"; - regulator-name = "pcie30_avdd0v75"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <750000>; - regulator-max-microvolt = <750000>; - vin-supply = <&avdd_0v75_s0>; - }; - - pcie30_avdd1v8: pcie30-avdd1v8-regulator { - compatible = "regulator-fixed"; - regulator-name = "pcie30_avdd1v8"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - vin-supply = <&avcc_1v8_s0>; - }; - - vcc12v_dcin: vcc12v-dcin-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc12v_dcin"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <12000000>; - regulator-max-microvolt = <12000000>; - }; - - vcc3v3_pcie30: vcc3v3-pcie30-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc3v3_pcie30"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - enable-active-high; - gpios = <&gpio3 RK_PC3 GPIO_ACTIVE_HIGH>; - startup-delay-us = <5000>; - vin-supply = <&vcc12v_dcin>; - pinctrl-names = "default"; - pinctrl-0 = <&vcc3v3_pcie30_en>; - }; - - vcc5v0_host: vcc5v0-host-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc5v0_host"; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - enable-active-high; - gpio = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&vcc5v0_host_en>; - vin-supply = <&vcc5v0_usb>; - }; - - vcc5v0_sys: vcc5v0-sys-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc5v0_sys"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - vin-supply = <&vcc12v_dcin>; - }; - - vcc5v0_usbdcin: vcc5v0-usbdcin-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc5v0_usbdcin"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - vin-supply = <&vcc12v_dcin>; - }; - - vcc5v0_usb: vcc5v0-usb-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc5v0_usb"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - vin-supply = <&vcc5v0_usbdcin>; - }; -}; - -&combphy0_ps { - status = "okay"; -}; - -&combphy2_psu { - status = "okay"; -}; - -&cpu_b0 { - cpu-supply = <&vdd_cpu_big0_s0>; -}; - -&cpu_b1 { - cpu-supply = <&vdd_cpu_big0_s0>; -}; - -&cpu_b2 { - cpu-supply = <&vdd_cpu_big1_s0>; -}; - -&cpu_b3 { - cpu-supply = <&vdd_cpu_big1_s0>; -}; - -&cpu_l0 { - cpu-supply = <&vdd_cpu_lit_s0>; -}; - -&cpu_l1 { - cpu-supply = <&vdd_cpu_lit_s0>; -}; - -&cpu_l2 { - cpu-supply = <&vdd_cpu_lit_s0>; -}; - -&cpu_l3 { - cpu-supply = <&vdd_cpu_lit_s0>; -}; - -&gmac0 { - clock_in_out = "output"; - phy-handle = <&rgmii_phy>; - phy-mode = "rgmii-rxid"; - pinctrl-0 = <&gmac0_miim - &gmac0_tx_bus2 - &gmac0_rx_bus2 - &gmac0_rgmii_clk - &gmac0_rgmii_bus>; - pinctrl-names = "default"; - rx_delay = <0x00>; - tx_delay = <0x43>; - status = "okay"; -}; - -&i2c2 { - status = "okay"; - - hym8563: rtc@51 { - compatible = "haoyu,hym8563"; - reg = <0x51>; - #clock-cells = <0>; - clock-output-names = "hym8563"; - pinctrl-names = "default"; - pinctrl-0 = <&hym8563_int>; - interrupt-parent = <&gpio0>; - interrupts = ; - wakeup-source; - }; -}; - -&i2c7 { - status = "okay"; - - es8388: audio-codec@11 { - compatible = "everest,es8388"; - reg = <0x11>; - clocks = <&cru I2S0_8CH_MCLKOUT>; - assigned-clocks = <&cru I2S0_8CH_MCLKOUT>; - assigned-clock-rates = <12288000>; - AVDD-supply = <&avcc_1v8_codec_s0>; - DVDD-supply = <&avcc_1v8_codec_s0>; - HPVDD-supply = <&vcc_3v3_s0>; - PVDD-supply = <&vcc_3v3_s0>; - #sound-dai-cells = <0>; - }; -}; - -&i2s0_8ch { - pinctrl-0 = <&i2s0_lrck - &i2s0_mclk - &i2s0_sclk - &i2s0_sdi0 - &i2s0_sdo0>; - status = "okay"; -}; - -&mdio0 { - rgmii_phy: ethernet-phy@1 { - /* RTL8211F */ - compatible = "ethernet-phy-id001c.c916"; - reg = <0x1>; - pinctrl-names = "default"; - pinctrl-0 = <&rtl8211f_rst>; - reset-assert-us = <20000>; - reset-deassert-us = <100000>; - reset-gpios = <&gpio4 RK_PB3 GPIO_ACTIVE_LOW>; - }; -}; - -&pcie2x1l1 { - reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&pcie2_1_rst>, <&rtl8111_isolate>; - status = "okay"; -}; - -&pcie30phy { - status = "okay"; -}; - -&pcie3x4 { - pinctrl-names = "default"; - pinctrl-0 = <&pcie3_reset>; - reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>; - vpcie3v3-supply = <&vcc3v3_pcie30>; - status = "okay"; -}; - -&pinctrl { - audio { - hp_detect: headphone-detect { - rockchip,pins = <1 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - headphone_amplifier_en: headphone-amplifier-en { - rockchip,pins = <1 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - speaker_amplifier_en: speaker-amplifier-en { - rockchip,pins = <1 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - rtl8111 { - rtl8111_isolate: rtl8111-isolate { - rockchip,pins = <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - rtl8211f { - rtl8211f_rst: rtl8211f-rst { - rockchip,pins = <4 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - }; - - hym8563 { - hym8563_int: hym8563-int { - rockchip,pins = <0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - pcie2 { - pcie2_1_rst: pcie2-1-rst { - rockchip,pins = <4 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - pcie3 { - pcie3_reset: pcie3-reset { - rockchip,pins = <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - vcc3v3_pcie30_en: vcc3v3-pcie30-en { - rockchip,pins = <3 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - usb { - vcc5v0_host_en: vcc5v0-host-en { - rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; -}; - -&pwm2 { - status = "okay"; -}; - -&saradc { - vref-supply = <&vcc_1v8_s0>; - status = "okay"; -}; - -&sdhci { - bus-width = <8>; - no-sdio; - no-sd; - non-removable; - mmc-hs400-1_8v; - mmc-hs400-enhanced-strobe; - status = "okay"; -}; - -&spi2 { - status = "okay"; - assigned-clocks = <&cru CLK_SPI2>; - assigned-clock-rates = <200000000>; - num-cs = <2>; - - pmic@0 { - compatible = "rockchip,rk806"; - reg = <0x0>; - #gpio-cells = <2>; - gpio-controller; - interrupt-parent = <&gpio0>; - interrupts = <7 IRQ_TYPE_LEVEL_LOW>; - pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>, - <&rk806_dvs2_null>, <&rk806_dvs3_null>; - pinctrl-names = "default"; - spi-max-frequency = <1000000>; - - vcc1-supply = <&vcc5v0_sys>; - vcc2-supply = <&vcc5v0_sys>; - vcc3-supply = <&vcc5v0_sys>; - vcc4-supply = <&vcc5v0_sys>; - vcc5-supply = <&vcc5v0_sys>; - vcc6-supply = <&vcc5v0_sys>; - vcc7-supply = <&vcc5v0_sys>; - vcc8-supply = <&vcc5v0_sys>; - vcc9-supply = <&vcc5v0_sys>; - vcc10-supply = <&vcc5v0_sys>; - vcc11-supply = <&vcc_2v0_pldo_s3>; - vcc12-supply = <&vcc5v0_sys>; - vcc13-supply = <&vcc5v0_sys>; - vcc14-supply = <&vcc_1v1_nldo_s3>; - vcca-supply = <&vcc5v0_sys>; - - rk806_dvs1_null: dvs1-null-pins { - pins = "gpio_pwrctrl1"; - function = "pin_fun0"; - }; - - rk806_dvs2_null: dvs2-null-pins { - pins = "gpio_pwrctrl2"; - function = "pin_fun0"; - }; - - rk806_dvs3_null: dvs3-null-pins { - pins = "gpio_pwrctrl3"; - function = "pin_fun0"; - }; - - - regulators { - vdd_gpu_s0: dcdc-reg1 { - regulator-boot-on; - regulator-min-microvolt = <550000>; - regulator-max-microvolt = <950000>; - regulator-ramp-delay = <12500>; - regulator-name = "vdd_gpu_s0"; - regulator-enable-ramp-delay = <400>; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_npu_s0: dcdc-reg2 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <550000>; - regulator-max-microvolt = <950000>; - regulator-ramp-delay = <12500>; - regulator-name = "vdd_npu_s0"; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_log_s0: dcdc-reg3 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <675000>; - regulator-max-microvolt = <750000>; - regulator-ramp-delay = <12500>; - regulator-name = "vdd_log_s0"; - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <750000>; - }; - }; - - vdd_vdenc_s0: dcdc-reg4 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <550000>; - regulator-max-microvolt = <950000>; - regulator-ramp-delay = <12500>; - regulator-name = "vdd_vdenc_s0"; - regulator-state-mem { - regulator-off-in-suspend; - }; - - }; - - vdd_gpu_mem_s0: dcdc-reg5 { - regulator-boot-on; - regulator-min-microvolt = <675000>; - regulator-max-microvolt = <950000>; - regulator-ramp-delay = <12500>; - regulator-enable-ramp-delay = <400>; - regulator-name = "vdd_gpu_mem_s0"; - regulator-state-mem { - regulator-off-in-suspend; - }; - - }; - - vdd_npu_mem_s0: dcdc-reg6 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <675000>; - regulator-max-microvolt = <950000>; - regulator-ramp-delay = <12500>; - regulator-name = "vdd_npu_mem_s0"; - regulator-state-mem { - regulator-off-in-suspend; - }; - - }; - - vcc_2v0_pldo_s3: dcdc-reg7 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <2000000>; - regulator-max-microvolt = <2000000>; - regulator-ramp-delay = <12500>; - regulator-name = "vdd_2v0_pldo_s3"; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <2000000>; - }; - }; - - vdd_vdenc_mem_s0: dcdc-reg8 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <675000>; - regulator-max-microvolt = <950000>; - regulator-ramp-delay = <12500>; - regulator-name = "vdd_vdenc_mem_s0"; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd2_ddr_s3: dcdc-reg9 { - regulator-always-on; - regulator-boot-on; - regulator-name = "vdd2_ddr_s3"; - regulator-state-mem { - regulator-on-in-suspend; - }; - }; - - vcc_1v1_nldo_s3: dcdc-reg10 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1100000>; - regulator-max-microvolt = <1100000>; - regulator-ramp-delay = <12500>; - regulator-name = "vcc_1v1_nldo_s3"; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1100000>; - }; - }; - - avcc_1v8_s0: pldo-reg1 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-ramp-delay = <12500>; - regulator-name = "avcc_1v8_s0"; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd1_1v8_ddr_s3: pldo-reg2 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-ramp-delay = <12500>; - regulator-name = "vdd1_1v8_ddr_s3"; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - avcc_1v8_codec_s0: pldo-reg3 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-ramp-delay = <12500>; - regulator-name = "avcc_1v8_codec_s0"; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_3v3_s3: pldo-reg4 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-ramp-delay = <12500>; - regulator-name = "vcc_3v3_s3"; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <3300000>; - }; - }; - - vccio_sd_s0: pldo-reg5 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - regulator-ramp-delay = <12500>; - regulator-name = "vccio_sd_s0"; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vccio_1v8_s3: pldo-reg6 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-ramp-delay = <12500>; - regulator-name = "vccio_1v8_s3"; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vdd_0v75_s3: nldo-reg1 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <750000>; - regulator-max-microvolt = <750000>; - regulator-ramp-delay = <12500>; - regulator-name = "vdd_0v75_s3"; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <750000>; - }; - }; - - vdd2l_0v9_ddr_s3: nldo-reg2 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <900000>; - regulator-name = "vdd2l_0v9_ddr_s3"; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <900000>; - }; - }; - - vdd_0v75_hdmi_edp_s0: nldo-reg3 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <750000>; - regulator-max-microvolt = <750000>; - regulator-name = "vdd_0v75_hdmi_edp_s0"; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - avdd_0v75_s0: nldo-reg4 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <750000>; - regulator-max-microvolt = <750000>; - regulator-name = "avdd_0v75_s0"; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_0v85_s0: nldo-reg5 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <850000>; - regulator-max-microvolt = <850000>; - regulator-name = "vdd_0v85_s0"; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - }; - }; - - pmic@1 { - compatible = "rockchip,rk806"; - reg = <0x01>; - #gpio-cells = <2>; - gpio-controller; - interrupt-parent = <&gpio0>; - interrupts = <7 IRQ_TYPE_LEVEL_LOW>; - pinctrl-0 = <&rk806_slave_dvs1_null>, <&rk806_slave_dvs2_null>, - <&rk806_slave_dvs3_null>; - pinctrl-names = "default"; - spi-max-frequency = <1000000>; - - vcc1-supply = <&vcc5v0_sys>; - vcc2-supply = <&vcc5v0_sys>; - vcc3-supply = <&vcc5v0_sys>; - vcc4-supply = <&vcc5v0_sys>; - vcc5-supply = <&vcc5v0_sys>; - vcc6-supply = <&vcc5v0_sys>; - vcc7-supply = <&vcc5v0_sys>; - vcc8-supply = <&vcc5v0_sys>; - vcc9-supply = <&vcc5v0_sys>; - vcc10-supply = <&vcc5v0_sys>; - vcc11-supply = <&vcc_2v0_pldo_s3>; - vcc12-supply = <&vcc5v0_sys>; - vcc13-supply = <&vcc_1v1_nldo_s3>; - vcc14-supply = <&vcc_2v0_pldo_s3>; - vcca-supply = <&vcc5v0_sys>; - - rk806_slave_dvs1_null: dvs1-null-pins { - pins = "gpio_pwrctrl1"; - function = "pin_fun0"; - }; - - rk806_slave_dvs2_null: dvs2-null-pins { - pins = "gpio_pwrctrl2"; - function = "pin_fun0"; - }; - - rk806_slave_dvs3_null: dvs3-null-pins { - pins = "gpio_pwrctrl3"; - function = "pin_fun0"; - }; - - regulators { - vdd_cpu_big1_s0: dcdc-reg1 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <550000>; - regulator-max-microvolt = <1050000>; - regulator-ramp-delay = <12500>; - regulator-name = "vdd_cpu_big1_s0"; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_cpu_big0_s0: dcdc-reg2 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <550000>; - regulator-max-microvolt = <1050000>; - regulator-ramp-delay = <12500>; - regulator-name = "vdd_cpu_big0_s0"; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_cpu_lit_s0: dcdc-reg3 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <550000>; - regulator-max-microvolt = <950000>; - regulator-ramp-delay = <12500>; - regulator-name = "vdd_cpu_lit_s0"; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_3v3_s0: dcdc-reg4 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-ramp-delay = <12500>; - regulator-name = "vcc_3v3_s0"; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_cpu_big1_mem_s0: dcdc-reg5 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <675000>; - regulator-max-microvolt = <1050000>; - regulator-ramp-delay = <12500>; - regulator-name = "vdd_cpu_big1_mem_s0"; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - - vdd_cpu_big0_mem_s0: dcdc-reg6 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <675000>; - regulator-max-microvolt = <1050000>; - regulator-ramp-delay = <12500>; - regulator-name = "vdd_cpu_big0_mem_s0"; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_1v8_s0: dcdc-reg7 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-ramp-delay = <12500>; - regulator-name = "vcc_1v8_s0"; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_cpu_lit_mem_s0: dcdc-reg8 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <675000>; - regulator-max-microvolt = <950000>; - regulator-ramp-delay = <12500>; - regulator-name = "vdd_cpu_lit_mem_s0"; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vddq_ddr_s0: dcdc-reg9 { - regulator-always-on; - regulator-boot-on; - regulator-name = "vddq_ddr_s0"; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_ddr_s0: dcdc-reg10 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <675000>; - regulator-max-microvolt = <900000>; - regulator-ramp-delay = <12500>; - regulator-name = "vdd_ddr_s0"; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_1v8_cam_s0: pldo-reg1 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-ramp-delay = <12500>; - regulator-name = "vcc_1v8_cam_s0"; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - avdd1v8_ddr_pll_s0: pldo-reg2 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-ramp-delay = <12500>; - regulator-name = "avdd1v8_ddr_pll_s0"; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_1v8_pll_s0: pldo-reg3 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-ramp-delay = <12500>; - regulator-name = "vdd_1v8_pll_s0"; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_3v3_sd_s0: pldo-reg4 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-ramp-delay = <12500>; - regulator-name = "vcc_3v3_sd_s0"; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_2v8_cam_s0: pldo-reg5 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <2800000>; - regulator-max-microvolt = <2800000>; - regulator-ramp-delay = <12500>; - regulator-name = "vcc_2v8_cam_s0"; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - pldo6_s3: pldo-reg6 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-name = "pldo6_s3"; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vdd_0v75_pll_s0: nldo-reg1 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <750000>; - regulator-max-microvolt = <750000>; - regulator-ramp-delay = <12500>; - regulator-name = "vdd_0v75_pll_s0"; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_ddr_pll_s0: nldo-reg2 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <850000>; - regulator-max-microvolt = <850000>; - regulator-name = "vdd_ddr_pll_s0"; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - avdd_0v85_s0: nldo-reg3 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <850000>; - regulator-max-microvolt = <850000>; - regulator-ramp-delay = <12500>; - regulator-name = "avdd_0v85_s0"; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - avdd_1v2_cam_s0: nldo-reg4 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1200000>; - regulator-ramp-delay = <12500>; - regulator-name = "avdd_1v2_cam_s0"; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - avdd_1v2_s0: nldo-reg5 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1200000>; - regulator-ramp-delay = <12500>; - regulator-name = "avdd_1v2_s0"; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - }; - }; -}; - -&sata0 { - status = "okay"; -}; - -&u2phy2 { - status = "okay"; -}; - -&u2phy2_host { - phy-supply = <&vcc5v0_host>; - status = "okay"; -}; - -&u2phy3 { - status = "okay"; -}; - -&u2phy3_host { - phy-supply = <&vcc5v0_host>; - status = "okay"; -}; - -&uart2 { - pinctrl-0 = <&uart2m0_xfer>; - status = "okay"; -}; - -&usb_host0_ehci { - status = "okay"; -}; - -&usb_host0_ohci { - status = "okay"; -}; - -&usb_host1_ehci { - status = "okay"; -}; - -&usb_host1_ohci { - status = "okay"; -}; diff --git a/arch/arm/dts/rk3588-jaguar.dts b/arch/arm/dts/rk3588-jaguar.dts deleted file mode 100644 index 4ce70fb75a3..00000000000 --- a/arch/arm/dts/rk3588-jaguar.dts +++ /dev/null @@ -1,803 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (c) 2023 Theobroma Systems Design und Consulting GmbH - */ - -/dts-v1/; -#include -#include -#include -#include -#include -#include "rk3588.dtsi" - -/ { - model = "Theobroma Systems RK3588-SBC Jaguar"; - compatible = "tsd,rk3588-jaguar", "rockchip,rk3588"; - - adc-keys { - compatible = "adc-keys"; - io-channels = <&saradc 0>; - io-channel-names = "buttons"; - keyup-threshold-microvolt = <1800000>; - poll-interval = <100>; - - /* Can be controlled through SW2 but also GPIO1 on CP2102 on P20 */ - button-bios-disable { - label = "BIOS_DISABLE"; - linux,code = ; - press-threshold-microvolt = <0>; - }; - }; - - aliases { - ethernet0 = &gmac0; - mmc0 = &sdhci; - mmc1 = &sdmmc; - rtc0 = &rtc_twi; - }; - - chosen { - stdout-path = "serial2:115200n8"; - }; - - /* DCIN is 12-24V but standard is 12V */ - dc_12v: dc-12v-regulator { - compatible = "regulator-fixed"; - regulator-name = "dc_12v"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <12000000>; - regulator-max-microvolt = <12000000>; - }; - - emmc_pwrseq: emmc-pwrseq { - compatible = "mmc-pwrseq-emmc"; - pinctrl-0 = <&emmc_reset>; - pinctrl-names = "default"; - reset-gpios = <&gpio2 RK_PA3 GPIO_ACTIVE_HIGH>; - }; - - leds { - compatible = "gpio-leds"; - pinctrl-names = "default"; - pinctrl-0 = <&led1_pin>; - status = "okay"; - - /* LED1 on PCB */ - led-1 { - gpios = <&gpio1 RK_PD4 GPIO_ACTIVE_HIGH>; - function = LED_FUNCTION_HEARTBEAT; - linux,default-trigger = "heartbeat"; - color = ; - }; - }; - - pps { - compatible = "pps-gpio"; - gpios = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>; - }; - - vcc_1v1_nldo_s3: vcc-1v1-nldo-s3-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc_1v1_nldo_s3"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1100000>; - regulator-max-microvolt = <1100000>; - vin-supply = <&vcc5v0_sys>; - }; - - vcc_1v2_s3: vcc-1v2-s3-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc_1v2_s3"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1200000>; - vin-supply = <&vcc5v0_sys>; - }; - - /* Exposed on P14 and P15 */ - vcc_2v8_s3: vcc-2v8-s3-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc_2v8_s3"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <2800000>; - regulator-max-microvolt = <2800000>; - vin-supply = <&vcc_3v3_s3>; - }; - - vcc_5v0_usb_a: vcc-5v0-usb-a-regulator { - compatible = "regulator-fixed"; - regulator-name = "usb_a_vcc"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - vin-supply = <&vcc5v0_sys>; - gpio = <&gpio1 RK_PB4 GPIO_ACTIVE_HIGH>; - enable-active-high; - }; - - vcc_5v0_usb_c1: vcc-5v0-usb-c1-regulator { - compatible = "regulator-fixed"; - regulator-name = "5v_usbc1"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - vin-supply = <&vcc5v0_usb>; - gpio = <&gpio4 RK_PB5 GPIO_ACTIVE_HIGH>; - enable-active-high; - }; - - vcc_5v0_usb_c2: vcc-5v0-usb-c2-regulator { - compatible = "regulator-fixed"; - regulator-name = "5v_usbc2"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - vin-supply = <&vcc5v0_usb>; - gpio = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>; - enable-active-high; - }; - - vcc3v3_mdot2: vcc3v3-mdot2-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc3v3_mdot2"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <&dc_12v>; - }; - - vcc5v0_sys: vcc5v0-sys-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc5v0_sys"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - vin-supply = <&dc_12v>; - }; - - vcc5v0_usb: vcc5v0-usb-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc5v0_usb"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - vin-supply = <&vcc5v0_sys>; - }; -}; - -&combphy1_ps { - status = "okay"; -}; - -&cpu_b0 { - cpu-supply = <&vdd_cpu_big0_s0>; -}; - -&cpu_b1 { - cpu-supply = <&vdd_cpu_big0_s0>; -}; - -&cpu_b2 { - cpu-supply = <&vdd_cpu_big1_s0>; -}; - -&cpu_b3 { - cpu-supply = <&vdd_cpu_big1_s0>; -}; - -&cpu_l0 { - cpu-supply = <&vdd_cpu_lit_s0>; -}; - -&cpu_l1 { - cpu-supply = <&vdd_cpu_lit_s0>; -}; - -&cpu_l2 { - cpu-supply = <&vdd_cpu_lit_s0>; -}; - -&cpu_l3 { - cpu-supply = <&vdd_cpu_lit_s0>; -}; - -&gmac0 { - clock_in_out = "output"; - phy-handle = <&rgmii_phy>; - phy-mode = "rgmii"; - phy-supply = <&vcc_1v2_s3>; - pinctrl-names = "default"; - pinctrl-0 = <&gmac0_miim - &gmac0_rx_bus2 - &gmac0_tx_bus2 - &gmac0_rgmii_clk - &gmac0_rgmii_bus - ð0_pins - ð_reset>; - tx_delay = <0x10>; - rx_delay = <0x10>; - snps,reset-gpio = <&gpio4 RK_PC3 GPIO_ACTIVE_LOW>; - snps,reset-active-low; - snps,reset-delays-us = <0 10000 100000>; - - status = "okay"; -}; - -&gpio1 { - mdot2e-w-disable1-n-hog { - gpios = ; - output-low; - line-name = "m.2 E-key W_DISABLE1#"; - gpio-hog; - }; -}; - -&gpio4 { - mdot2e-w-disable2-n-hog { - gpios = ; - output-low; - line-name = "m.2 E-key W_DISABLE2#"; - gpio-hog; - }; -}; - -&i2c0 { - pinctrl-0 = <&i2c0m2_xfer>; - status = "okay"; - - fan@18 { - compatible = "ti,amc6821"; - reg = <0x18>; - }; - - vdd_npu_s0: regulator@42 { - compatible = "rockchip,rk8602"; - reg = <0x42>; - fcs,suspend-voltage-selector = <1>; - regulator-name = "vdd_npu_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <550000>; - regulator-max-microvolt = <950000>; - regulator-ramp-delay = <2300>; - vin-supply = <&vcc5v0_sys>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_cpu_big1_s0: regulator@43 { - compatible = "rockchip,rk8603", "rockchip,rk8602"; - reg = <0x43>; - fcs,suspend-voltage-selector = <1>; - regulator-name = "vdd_cpu_big1_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <550000>; - regulator-max-microvolt = <1050000>; - regulator-ramp-delay = <2300>; - vin-supply = <&vcc5v0_sys>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - rtc_twi: rtc@6f { - compatible = "isil,isl1208"; - reg = <0x6f>; - }; -}; - -&i2c1 { - pinctrl-0 = <&i2c1m4_xfer>; -}; - -&i2c6 { - pinctrl-0 = <&i2c6m4_xfer>; -}; - -&i2c7 { - status = "okay"; - - /* SE050 Secure Element at 0x48; GPIO1_A4 for enable pin */ - - /* Also on 0x55 */ - eeprom@54 { - compatible = "st,24c04", "atmel,24c04"; - reg = <0x54>; - pagesize = <16>; - vcc-supply = <&vcc_3v3_s3>; - }; -}; - -&i2c8 { - pinctrl-0 = <&i2c8m2_xfer>; - status = "okay"; - - vdd_cpu_big0_s0: regulator@42 { - compatible = "rockchip,rk8602"; - reg = <0x42>; - fcs,suspend-voltage-selector = <1>; - regulator-name = "vdd_cpu_big0_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <550000>; - regulator-max-microvolt = <1050000>; - regulator-ramp-delay = <2300>; - vin-supply = <&vcc5v0_sys>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; -}; - -&mdio0 { - rgmii_phy: ethernet-phy@6 { - /* KSZ9031 or KSZ9131 */ - compatible = "ethernet-phy-ieee802.3-c22"; - reg = <0x6>; - clocks = <&cru REFCLKO25M_ETH0_OUT>; - }; -}; - -&pcie2x1l0 { - reset-gpios = <&gpio4 RK_PB3 GPIO_ACTIVE_HIGH>; /* WIFI_PERST0# */ - vpcie3v3-supply = <&vcc3v3_mdot2>; - status = "okay"; -}; - -&pinctrl { - emmc { - emmc_reset: emmc-reset { - rockchip,pins = <2 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - ethernet { - eth_reset: eth-reset { - rockchip,pins = <4 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - leds { - led1_pin: led1-pin { - rockchip,pins = <1 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; -}; - -&saradc { - vref-supply = <&vcc_1v8_s0>; - status = "okay"; -}; - -&sdhci { - bus-width = <8>; - cap-mmc-highspeed; - mmc-ddr-1_8v; - mmc-hs200-1_8v; - mmc-hs400-1_8v; - mmc-hs400-enhanced-strobe; - mmc-pwrseq = <&emmc_pwrseq>; - no-sdio; - no-sd; - non-removable; - pinctrl-names = "default"; - pinctrl-0 = <&emmc_bus8 &emmc_cmd &emmc_clk &emmc_data_strobe>; - supports-cqe; - vmmc-supply = <&vcc_3v3_s3>; - vqmmc-supply = <&vcc_1v8_s3>; - status = "okay"; -}; - -&sdmmc { - broken-cd; - bus-width = <4>; - cap-sd-highspeed; - disable-wp; - max-frequency = <150000000>; - pinctrl-names = "default"; - pinctrl-0 = <&sdmmc_bus4 &sdmmc_cmd &sdmmc_clk>; - sd-uhs-sdr12; - sd-uhs-sdr25; - sd-uhs-sdr50; - sd-uhs-ddr50; - sd-uhs-sdr104; - vmmc-supply = <&vcc_3v3_s3>; - vqmmc-supply = <&vccio_sd_s0>; - status = "okay"; -}; - -&spi2 { - assigned-clocks = <&cru CLK_SPI2>; - assigned-clock-rates = <200000000>; - num-cs = <1>; - pinctrl-names = "default"; - pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>; - status = "okay"; - - pmic@0 { - compatible = "rockchip,rk806"; - reg = <0x0>; - interrupt-parent = <&gpio0>; - interrupts = <7 IRQ_TYPE_LEVEL_LOW>; - gpio-controller; - #gpio-cells = <2>; - pinctrl-names = "default"; - pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>, - <&rk806_dvs2_null>, <&rk806_dvs3_null>; - spi-max-frequency = <1000000>; - system-power-controller; - vcc1-supply = <&vcc5v0_sys>; - vcc2-supply = <&vcc5v0_sys>; - vcc3-supply = <&vcc5v0_sys>; - vcc4-supply = <&vcc5v0_sys>; - vcc5-supply = <&vcc5v0_sys>; - vcc6-supply = <&vcc5v0_sys>; - vcc7-supply = <&vcc5v0_sys>; - vcc8-supply = <&vcc5v0_sys>; - vcc9-supply = <&vcc5v0_sys>; - vcc10-supply = <&vcc5v0_sys>; - vcc11-supply = <&vcc_2v0_pldo_s3>; - vcc12-supply = <&vcc5v0_sys>; - vcc13-supply = <&vcc_1v1_nldo_s3>; - vcc14-supply = <&vcc_1v1_nldo_s3>; - vcca-supply = <&vcc5v0_sys>; - - rk806_dvs1_null: dvs1-null-pins { - pins = "gpio_pwrctrl2"; - function = "pin_fun0"; - }; - - rk806_dvs2_null: dvs2-null-pins { - pins = "gpio_pwrctrl2"; - function = "pin_fun0"; - }; - - rk806_dvs3_null: dvs3-null-pins { - pins = "gpio_pwrctrl3"; - function = "pin_fun0"; - }; - - regulators { - vdd_gpu_s0: dcdc-reg1 { - regulator-boot-on; - regulator-min-microvolt = <550000>; - regulator-max-microvolt = <950000>; - regulator-ramp-delay = <12500>; - regulator-name = "vdd_gpu_s0"; - regulator-enable-ramp-delay = <400>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_cpu_lit_s0: dcdc-reg2 { - regulator-name = "vdd_cpu_lit_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <550000>; - regulator-max-microvolt = <950000>; - regulator-ramp-delay = <12500>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_log_s0: dcdc-reg3 { - regulator-name = "vdd_log_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <675000>; - regulator-max-microvolt = <750000>; - regulator-ramp-delay = <12500>; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <750000>; - }; - }; - - vdd_vdenc_s0: dcdc-reg4 { - regulator-name = "vdd_vdenc_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <550000>; - regulator-max-microvolt = <950000>; - regulator-ramp-delay = <12500>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_ddr_s0: dcdc-reg5 { - regulator-name = "vdd_ddr_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <675000>; - regulator-max-microvolt = <900000>; - regulator-ramp-delay = <12500>; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <850000>; - }; - }; - - vdd2_ddr_s3: dcdc-reg6 { - regulator-name = "vdd2_ddr_s3"; - regulator-always-on; - regulator-boot-on; - - regulator-state-mem { - regulator-on-in-suspend; - }; - }; - - vcc_2v0_pldo_s3: dcdc-reg7 { - regulator-name = "vdd_2v0_pldo_s3"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <2000000>; - regulator-max-microvolt = <2000000>; - regulator-ramp-delay = <12500>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <2000000>; - }; - }; - - vcc_3v3_s3: dcdc-reg8 { - regulator-name = "vcc_3v3_s3"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <3300000>; - }; - }; - - vddq_ddr_s0: dcdc-reg9 { - regulator-name = "vddq_ddr_s0"; - regulator-always-on; - regulator-boot-on; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_1v8_s3: dcdc-reg10 { - regulator-name = "vcc_1v8_s3"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vcca_1v8_s0: pldo-reg1 { - regulator-name = "vcca_1v8_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_1v8_s0: pldo-reg2 { - regulator-name = "vcc_1v8_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vdda_1v2_s0: pldo-reg3 { - regulator-name = "vdda_1v2_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1200000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcca_3v3_s0: pldo-reg4 { - regulator-name = "vcca_3v3_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-ramp-delay = <12500>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vccio_sd_s0: pldo-reg5 { - regulator-name = "vccio_sd_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - regulator-ramp-delay = <12500>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - pldo6_s3: pldo-reg6 { - regulator-name = "pldo6_s3"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vdd_0v75_s3: nldo-reg1 { - regulator-name = "vdd_0v75_s3"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <750000>; - regulator-max-microvolt = <750000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <750000>; - }; - }; - - vdda_ddr_pll_s0: nldo-reg2 { - regulator-name = "vdda_ddr_pll_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <850000>; - regulator-max-microvolt = <850000>; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <850000>; - }; - }; - - vdda_0v75_s0: nldo-reg3 { - regulator-name = "vdda_0v75_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <750000>; - regulator-max-microvolt = <750000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdda_0v85_s0: nldo-reg4 { - regulator-name = "vdda_0v85_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <850000>; - regulator-max-microvolt = <850000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_0v75_s0: nldo-reg5 { - regulator-name = "vdd_0v75_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <750000>; - regulator-max-microvolt = <750000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - }; - }; -}; - -&tsadc { - status = "okay"; -}; - -&u2phy2 { - status = "okay"; -}; - -&u2phy2_host { - phy-supply = <&vcc_5v0_usb_a>; - status = "okay"; -}; - -&u2phy3 { - status = "okay"; -}; - -&u2phy3_host { - status = "okay"; -}; - -/* Mule-ATtiny debug UART; typically baudrate 9600 */ -&uart0 { - pinctrl-0 = <&uart0m0_xfer>; - status = "okay"; -}; - -/* Main debug interface on P20 micro-USB B port and P21 header */ -&uart2 { - pinctrl-0 = <&uart2m0_xfer>; - status = "okay"; -}; - -/* RS485 on P19 */ -&uart3 { - pinctrl-0 = <&uart3m2_xfer &uart3_rtsn>; - linux,rs485-enabled-at-boot-time; - status = "okay"; -}; - -/* Mule-ATtiny UPDI flashing UART */ -&uart7 { - pinctrl-0 = <&uart7m0_xfer>; - status = "okay"; -}; - -/* host0 on P10 USB-A */ -&usb_host0_ehci { - status = "okay"; -}; - -/* host0 on P10 USB-A */ -&usb_host0_ohci { - status = "okay"; -}; - -/* host1 on M.2 E-key */ -&usb_host1_ehci { - status = "okay"; -}; - -/* host1 on M.2 E-key */ -&usb_host1_ohci { - status = "okay"; -}; diff --git a/arch/arm/dts/rk3588-nanopc-t6.dts b/arch/arm/dts/rk3588-nanopc-t6.dts deleted file mode 100644 index d7722772ecd..00000000000 --- a/arch/arm/dts/rk3588-nanopc-t6.dts +++ /dev/null @@ -1,916 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (c) 2021 Rockchip Electronics Co., Ltd. - * Copyright (c) 2023 Thomas McKahan - * - */ - -/dts-v1/; - -#include -#include -#include -#include "rk3588.dtsi" - -/ { - model = "FriendlyElec NanoPC-T6"; - compatible = "friendlyarm,nanopc-t6", "rockchip,rk3588"; - - aliases { - mmc0 = &sdhci; - mmc1 = &sdmmc; - }; - - chosen { - stdout-path = "serial2:1500000n8"; - }; - - leds { - compatible = "gpio-leds"; - - sys_led: led-0 { - gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>; - label = "system-led"; - linux,default-trigger = "heartbeat"; - pinctrl-names = "default"; - pinctrl-0 = <&sys_led_pin>; - }; - - usr_led: led-1 { - gpios = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>; - label = "user-led"; - pinctrl-names = "default"; - pinctrl-0 = <&usr_led_pin>; - }; - }; - - sound { - compatible = "simple-audio-card"; - pinctrl-names = "default"; - pinctrl-0 = <&hp_det>; - - simple-audio-card,name = "realtek,rt5616-codec"; - simple-audio-card,format = "i2s"; - simple-audio-card,mclk-fs = <256>; - - simple-audio-card,hp-det-gpio = <&gpio1 RK_PC4 GPIO_ACTIVE_LOW>; - simple-audio-card,hp-pin-name = "Headphones"; - - simple-audio-card,widgets = - "Headphone", "Headphones", - "Microphone", "Microphone Jack"; - simple-audio-card,routing = - "Headphones", "HPOL", - "Headphones", "HPOR", - "MIC1", "Microphone Jack", - "Microphone Jack", "micbias1"; - - simple-audio-card,cpu { - sound-dai = <&i2s0_8ch>; - }; - simple-audio-card,codec { - sound-dai = <&rt5616>; - }; - }; - - vcc12v_dcin: vcc12v-dcin-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc12v_dcin"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <12000000>; - regulator-max-microvolt = <12000000>; - }; - - /* vcc5v0_sys powers peripherals */ - vcc5v0_sys: vcc5v0-sys-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc5v0_sys"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - vin-supply = <&vcc12v_dcin>; - }; - - /* vcc4v0_sys powers the RK806, RK860's */ - vcc4v0_sys: vcc4v0-sys-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc4v0_sys"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <4000000>; - regulator-max-microvolt = <4000000>; - vin-supply = <&vcc12v_dcin>; - }; - - vcc_1v1_nldo_s3: vcc-1v1-nldo-s3-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc-1v1-nldo-s3"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1100000>; - regulator-max-microvolt = <1100000>; - vin-supply = <&vcc4v0_sys>; - }; - - vcc_3v3_pcie20: vcc3v3-pcie20-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc_3v3_pcie20"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <&vcc_3v3_s3>; - }; - - vbus5v0_typec: vbus5v0-typec-regulator { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&typec5v_pwren>; - regulator-name = "vbus5v0_typec"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - vin-supply = <&vcc5v0_sys>; - }; - - vcc3v3_pcie2x1l0: vcc3v3-pcie2x1l0-regulator { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <&gpio4 RK_PC2 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&pcie_m2_1_pwren>; - regulator-name = "vcc3v3_pcie2x1l0"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <&vcc5v0_sys>; - }; - - vcc3v3_pcie30: vcc3v3-pcie30-regulator { - compatible = "regulator-fixed"; - enable-active-high; - gpios = <&gpio2 RK_PC5 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&pcie_m2_0_pwren>; - regulator-name = "vcc3v3_pcie30"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <&vcc5v0_sys>; - }; -}; - -&combphy0_ps { - status = "okay"; -}; - -&combphy1_ps { - status = "okay"; -}; - -&combphy2_psu { - status = "okay"; -}; - -&cpu_l0 { - cpu-supply = <&vdd_cpu_lit_s0>; -}; - -&cpu_l1 { - cpu-supply = <&vdd_cpu_lit_s0>; -}; - -&cpu_l2 { - cpu-supply = <&vdd_cpu_lit_s0>; -}; - -&cpu_l3 { - cpu-supply = <&vdd_cpu_lit_s0>; -}; - -&cpu_b0{ - cpu-supply = <&vdd_cpu_big0_s0>; -}; - -&cpu_b1{ - cpu-supply = <&vdd_cpu_big0_s0>; -}; - -&cpu_b2{ - cpu-supply = <&vdd_cpu_big1_s0>; -}; - -&cpu_b3{ - cpu-supply = <&vdd_cpu_big1_s0>; -}; - -&gpio0 { - gpio-line-names = /* GPIO0 A0-A7 */ - "", "", "", "", - "", "", "", "", - /* GPIO0 B0-B7 */ - "", "", "", "", - "", "", "", "", - /* GPIO0 C0-C7 */ - "", "", "", "", - "HEADER_10", "HEADER_08", "HEADER_32", "", - /* GPIO0 D0-D7 */ - "", "", "", "", - "", "", "", ""; -}; - -&gpio1 { - gpio-line-names = /* GPIO1 A0-A7 */ - "HEADER_27", "HEADER_28", "", "", - "", "", "", "HEADER_15", - /* GPIO1 B0-B7 */ - "HEADER_26", "HEADER_21", "HEADER_19", "HEADER_23", - "HEADER_24", "HEADER_22", "", "", - /* GPIO1 C0-C7 */ - "", "", "", "", - "", "", "", "", - /* GPIO1 D0-D7 */ - "", "", "", "", - "", "", "HEADER_05", "HEADER_03"; -}; - -&gpio2 { - gpio-line-names = /* GPIO2 A0-A7 */ - "", "", "", "", - "", "", "", "", - /* GPIO2 B0-B7 */ - "", "", "", "", - "", "", "", "", - /* GPIO2 C0-C7 */ - "", "CSI1_11", "CSI1_12", "", - "", "", "", "", - /* GPIO2 D0-D7 */ - "", "", "", "", - "", "", "", ""; -}; - -&gpio3 { - gpio-line-names = /* GPIO3 A0-A7 */ - "HEADER_35", "HEADER_38", "HEADER_40", "HEADER_36", - "HEADER_37", "", "DSI0_12", "", - /* GPIO3 B0-B7 */ - "HEADER_33", "DSI0_10", "HEADER_07", "HEADER_16", - "HEADER_18", "HEADER_29", "HEADER_31", "HEADER_12", - /* GPIO3 C0-C7 */ - "DSI0_08", "DSI0_14", "HEADER_11", "HEADER_13", - "", "", "", "", - /* GPIO3 D0-D7 */ - "", "", "", "", - "", "DSI1_10", "", ""; -}; - -&gpio4 { - gpio-line-names = /* GPIO4 A0-A7 */ - "DSI1_08", "DSI1_14", "", "DSI1_12", - "", "", "", "", - /* GPIO4 B0-B7 */ - "", "", "", "", - "", "", "", "", - /* GPIO4 C0-C7 */ - "", "", "", "", - "CSI0_11", "CSI0_12", "", "", - /* GPIO4 D0-D7 */ - "", "", "", "", - "", "", "", ""; -}; - -&i2c0 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c0m2_xfer>; - status = "okay"; - - vdd_cpu_big0_s0: regulator@42 { - compatible = "rockchip,rk8602"; - reg = <0x42>; - fcs,suspend-voltage-selector = <1>; - regulator-name = "vdd_cpu_big0_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <550000>; - regulator-max-microvolt = <1050000>; - regulator-ramp-delay = <2300>; - vin-supply = <&vcc4v0_sys>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_cpu_big1_s0: regulator@43 { - compatible = "rockchip,rk8603", "rockchip,rk8602"; - reg = <0x43>; - fcs,suspend-voltage-selector = <1>; - regulator-name = "vdd_cpu_big1_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <550000>; - regulator-max-microvolt = <1050000>; - regulator-ramp-delay = <2300>; - vin-supply = <&vcc4v0_sys>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; -}; - -&i2c2 { - status = "okay"; - - vdd_npu_s0: regulator@42 { - compatible = "rockchip,rk8602"; - reg = <0x42>; - rockchip,suspend-voltage-selector = <1>; - regulator-name = "vdd_npu_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <550000>; - regulator-max-microvolt = <950000>; - regulator-ramp-delay = <2300>; - vin-supply = <&vcc4v0_sys>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; -}; - -&i2c6 { - clock-frequency = <200000>; - status = "okay"; - - fusb302: typec-portc@22 { - compatible = "fcs,fusb302"; - reg = <0x22>; - interrupt-parent = <&gpio0>; - interrupts = ; - pinctrl-0 = <&usbc0_int>; - pinctrl-names = "default"; - vbus-supply = <&vbus5v0_typec>; - - connector { - compatible = "usb-c-connector"; - data-role = "dual"; - label = "USB-C"; - power-role = "dual"; - try-power-role = "sink"; - source-pdos = ; - sink-pdos = ; - op-sink-microwatt = <1000000>; - }; - }; - - hym8563: rtc@51 { - compatible = "haoyu,hym8563"; - reg = <0x51>; - #clock-cells = <0>; - clock-output-names = "hym8563"; - pinctrl-names = "default"; - pinctrl-0 = <&hym8563_int>; - interrupt-parent = <&gpio0>; - interrupts = ; - wakeup-source; - }; -}; - -&i2c7 { - clock-frequency = <200000>; - status = "okay"; - - rt5616: codec@1b { - compatible = "realtek,rt5616"; - reg = <0x1b>; - clocks = <&cru I2S0_8CH_MCLKOUT>; - clock-names = "mclk"; - #sound-dai-cells = <0>; - assigned-clocks = <&cru I2S0_8CH_MCLKOUT>; - assigned-clock-rates = <12288000>; - - port { - rt5616_p0_0: endpoint { - remote-endpoint = <&i2s0_8ch_p0_0>; - }; - }; - }; - - /* connected with MIPI-CSI1 */ -}; - -&i2c8 { - pinctrl-0 = <&i2c8m2_xfer>; -}; - -&i2s0_8ch { - pinctrl-names = "default"; - pinctrl-0 = <&i2s0_lrck - &i2s0_mclk - &i2s0_sclk - &i2s0_sdi0 - &i2s0_sdo0>; - status = "okay"; - - i2s0_8ch_p0: port { - i2s0_8ch_p0_0: endpoint { - dai-format = "i2s"; - mclk-fs = <256>; - remote-endpoint = <&rt5616_p0_0>; - }; - }; -}; - -&pcie2x1l0 { - reset-gpios = <&gpio4 RK_PB3 GPIO_ACTIVE_HIGH>; - vpcie3v3-supply = <&vcc_3v3_pcie20>; - pinctrl-names = "default"; - pinctrl-0 = <&pcie2_0_rst>; - status = "okay"; -}; - -&pcie2x1l1 { - reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>; - vpcie3v3-supply = <&vcc3v3_pcie2x1l0>; - pinctrl-names = "default"; - pinctrl-0 = <&pcie2_1_rst>; - status = "okay"; -}; - -&pcie2x1l2 { - reset-gpios = <&gpio4 RK_PA4 GPIO_ACTIVE_HIGH>; - vpcie3v3-supply = <&vcc_3v3_pcie20>; - pinctrl-names = "default"; - pinctrl-0 = <&pcie2_2_rst>; - status = "okay"; -}; - -&pcie30phy { - status = "okay"; -}; - -&pcie3x4 { - reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>; - vpcie3v3-supply = <&vcc3v3_pcie30>; - status = "okay"; -}; - -&pinctrl { - gpio-leds { - sys_led_pin: sys-led-pin { - rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - usr_led_pin: usr-led-pin { - rockchip,pins = <2 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - headphone { - hp_det: hp-det { - rockchip,pins = <1 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - hym8563 { - hym8563_int: hym8563-int { - rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - pcie { - pcie2_0_rst: pcie2-0-rst { - rockchip,pins = <4 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - pcie2_1_rst: pcie2-1-rst { - rockchip,pins = <4 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - pcie2_2_rst: pcie2-2-rst { - rockchip,pins = <4 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - pcie_m2_0_pwren: pcie-m20-pwren { - rockchip,pins = <2 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - pcie_m2_1_pwren: pcie-m21-pwren { - rockchip,pins = <4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - usb { - typec5v_pwren: typec5v-pwren { - rockchip,pins = <1 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - usbc0_int: usbc0-int { - rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; -}; - -&pwm1 { - pinctrl-0 = <&pwm1m1_pins>; - status = "okay"; -}; - -&saradc { - vref-supply = <&avcc_1v8_s0>; - status = "okay"; -}; - -&sdhci { - bus-width = <8>; - no-sdio; - no-sd; - non-removable; - max-frequency = <200000000>; - mmc-hs400-1_8v; - mmc-hs400-enhanced-strobe; - status = "okay"; -}; - -&sdmmc { - bus-width = <4>; - cap-mmc-highspeed; - cap-sd-highspeed; - disable-wp; - no-mmc; - no-sdio; - sd-uhs-sdr104; - vmmc-supply = <&vcc_3v3_s3>; - vqmmc-supply = <&vccio_sd_s0>; - status = "okay"; -}; - -&spi2 { - status = "okay"; - assigned-clocks = <&cru CLK_SPI2>; - assigned-clock-rates = <200000000>; - pinctrl-names = "default"; - pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>; - num-cs = <1>; - - pmic@0 { - compatible = "rockchip,rk806"; - spi-max-frequency = <1000000>; - reg = <0x0>; - - interrupt-parent = <&gpio0>; - interrupts = <7 IRQ_TYPE_LEVEL_LOW>; - - pinctrl-names = "default"; - pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>, - <&rk806_dvs2_null>, <&rk806_dvs3_null>; - - system-power-controller; - - vcc1-supply = <&vcc4v0_sys>; - vcc2-supply = <&vcc4v0_sys>; - vcc3-supply = <&vcc4v0_sys>; - vcc4-supply = <&vcc4v0_sys>; - vcc5-supply = <&vcc4v0_sys>; - vcc6-supply = <&vcc4v0_sys>; - vcc7-supply = <&vcc4v0_sys>; - vcc8-supply = <&vcc4v0_sys>; - vcc9-supply = <&vcc4v0_sys>; - vcc10-supply = <&vcc4v0_sys>; - vcc11-supply = <&vcc_2v0_pldo_s3>; - vcc12-supply = <&vcc4v0_sys>; - vcc13-supply = <&vcc_1v1_nldo_s3>; - vcc14-supply = <&vcc_1v1_nldo_s3>; - vcca-supply = <&vcc4v0_sys>; - - gpio-controller; - #gpio-cells = <2>; - - rk806_dvs1_null: dvs1-null-pins { - pins = "gpio_pwrctrl1"; - function = "pin_fun0"; - }; - - rk806_dvs2_null: dvs2-null-pins { - pins = "gpio_pwrctrl2"; - function = "pin_fun0"; - }; - - rk806_dvs3_null: dvs3-null-pins { - pins = "gpio_pwrctrl3"; - function = "pin_fun0"; - }; - - regulators { - vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 { - regulator-boot-on; - regulator-min-microvolt = <550000>; - regulator-max-microvolt = <950000>; - regulator-ramp-delay = <12500>; - regulator-name = "vdd_gpu_s0"; - regulator-enable-ramp-delay = <400>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <550000>; - regulator-max-microvolt = <950000>; - regulator-ramp-delay = <12500>; - regulator-name = "vdd_cpu_lit_s0"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_log_s0: dcdc-reg3 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <675000>; - regulator-max-microvolt = <750000>; - regulator-ramp-delay = <12500>; - regulator-name = "vdd_log_s0"; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <750000>; - }; - }; - - vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <550000>; - regulator-max-microvolt = <950000>; - regulator-init-microvolt = <750000>; - regulator-ramp-delay = <12500>; - regulator-name = "vdd_vdenc_s0"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_ddr_s0: dcdc-reg5 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <675000>; - regulator-max-microvolt = <900000>; - regulator-ramp-delay = <12500>; - regulator-name = "vdd_ddr_s0"; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <850000>; - }; - }; - - vdd2_ddr_s3: dcdc-reg6 { - regulator-always-on; - regulator-boot-on; - regulator-name = "vdd2_ddr_s3"; - - regulator-state-mem { - regulator-on-in-suspend; - }; - }; - - vcc_2v0_pldo_s3: dcdc-reg7 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <2000000>; - regulator-max-microvolt = <2000000>; - regulator-ramp-delay = <12500>; - regulator-name = "vdd_2v0_pldo_s3"; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <2000000>; - }; - }; - - vcc_3v3_s3: dcdc-reg8 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-name = "vcc_3v3_s3"; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <3300000>; - }; - }; - - vddq_ddr_s0: dcdc-reg9 { - regulator-always-on; - regulator-boot-on; - regulator-name = "vddq_ddr_s0"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_1v8_s3: dcdc-reg10 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-name = "vcc_1v8_s3"; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - avcc_1v8_s0: pldo-reg1 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-name = "avcc_1v8_s0"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_1v8_s0: pldo-reg2 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-name = "vcc_1v8_s0"; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - avdd_1v2_s0: pldo-reg3 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1200000>; - regulator-name = "avdd_1v2_s0"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_3v3_s0: pldo-reg4 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-ramp-delay = <12500>; - regulator-name = "vcc_3v3_s0"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vccio_sd_s0: pldo-reg5 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - regulator-ramp-delay = <12500>; - regulator-name = "vccio_sd_s0"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - pldo6_s3: pldo-reg6 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-name = "pldo6_s3"; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vdd_0v75_s3: nldo-reg1 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <750000>; - regulator-max-microvolt = <750000>; - regulator-name = "vdd_0v75_s3"; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <750000>; - }; - }; - - vdd_ddr_pll_s0: nldo-reg2 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <850000>; - regulator-max-microvolt = <850000>; - regulator-name = "vdd_ddr_pll_s0"; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <850000>; - }; - }; - - avdd_0v75_s0: nldo-reg3 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <750000>; - regulator-max-microvolt = <750000>; - regulator-name = "avdd_0v75_s0"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_0v85_s0: nldo-reg4 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <850000>; - regulator-max-microvolt = <850000>; - regulator-name = "vdd_0v85_s0"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_0v75_s0: nldo-reg5 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <750000>; - regulator-max-microvolt = <750000>; - regulator-name = "vdd_0v75_s0"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - }; - }; -}; - -&tsadc { - status = "okay"; -}; - -&uart2 { - pinctrl-0 = <&uart2m0_xfer>; - status = "okay"; -}; - -&u2phy2_host { - status = "okay"; -}; - -&u2phy3_host { - status = "okay"; -}; - -&u2phy2 { - status = "okay"; -}; - -&u2phy3 { - status = "okay"; -}; - -&usb_host0_ehci { - status = "okay"; -}; - -&usb_host0_ohci { - status = "okay"; -}; - -&usb_host1_ehci { - status = "okay"; -}; - -&usb_host1_ohci { - status = "okay"; -}; diff --git a/arch/arm/dts/rk3588-orangepi-5-plus.dts b/arch/arm/dts/rk3588-orangepi-5-plus.dts deleted file mode 100644 index 3e660ff6cd5..00000000000 --- a/arch/arm/dts/rk3588-orangepi-5-plus.dts +++ /dev/null @@ -1,847 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (c) 2023 Ondřej Jirman - */ - -/dts-v1/; - -#include -#include -#include -#include -#include -#include "rk3588.dtsi" - -/ { - model = "Xunlong Orange Pi 5 Plus"; - compatible = "xunlong,orangepi-5-plus", "rockchip,rk3588"; - - aliases { - mmc0 = &sdhci; - mmc1 = &sdmmc; - }; - - chosen { - stdout-path = "serial2:1500000n8"; - }; - - adc-keys-0 { - compatible = "adc-keys"; - io-channels = <&saradc 0>; - io-channel-names = "buttons"; - keyup-threshold-microvolt = <1800000>; - poll-interval = <100>; - - button-maskrom { - label = "Mask Rom"; - linux,code = ; - press-threshold-microvolt = <2000>; - }; - }; - - adc-keys-1 { - compatible = "adc-keys"; - io-channels = <&saradc 1>; - io-channel-names = "buttons"; - keyup-threshold-microvolt = <1800000>; - poll-interval = <100>; - - button-recovery { - label = "Recovery"; - linux,code = ; - press-threshold-microvolt = <2000>; - }; - }; - - speaker_amp: speaker-audio-amplifier { - compatible = "simple-audio-amplifier"; - enable-gpios = <&gpio3 RK_PC0 GPIO_ACTIVE_HIGH>; - sound-name-prefix = "Speaker Amp"; - }; - - headphone_amp: headphones-audio-amplifier { - compatible = "simple-audio-amplifier"; - enable-gpios = <&gpio3 RK_PA7 GPIO_ACTIVE_HIGH>; - sound-name-prefix = "Headphones Amp"; - }; - - ir-receiver { - compatible = "gpio-ir-receiver"; - gpios = <&gpio4 RK_PB3 GPIO_ACTIVE_LOW>; - pinctrl-names = "default"; - pinctrl-0 = <&ir_receiver_pin>; - }; - - gpio-leds { - compatible = "gpio-leds"; - pinctrl-names = "default"; - pinctrl-0 = <&blue_led_pin>; - - led { - color = ; - function = LED_FUNCTION_INDICATOR; - function-enumerator = <1>; - gpios = <&gpio3 RK_PA6 GPIO_ACTIVE_HIGH>; - }; - }; - - fan: pwm-fan { - compatible = "pwm-fan"; - cooling-levels = <0 70 75 80 100>; - fan-supply = <&vcc5v0_sys>; - pwms = <&pwm3 0 50000 0>; - #cooling-cells = <2>; - }; - - pwm-leds { - compatible = "pwm-leds"; - - led { - color = ; - function = LED_FUNCTION_INDICATOR; - function-enumerator = <2>; - max-brightness = <255>; - pwms = <&pwm2 0 25000 0>; - }; - }; - - sound { - compatible = "simple-audio-card"; - pinctrl-names = "default"; - pinctrl-0 = <&hp_detect>; - simple-audio-card,name = "Analog"; - simple-audio-card,aux-devs = <&speaker_amp>, <&headphone_amp>; - simple-audio-card,format = "i2s"; - simple-audio-card,mclk-fs = <256>; - simple-audio-card,hp-det-gpio = <&gpio1 RK_PD3 GPIO_ACTIVE_LOW>; - simple-audio-card,bitclock-master = <&daicpu>; - simple-audio-card,frame-master = <&daicpu>; - /*TODO: SARADC_IN3 is used as MIC detection / key input */ - - simple-audio-card,widgets = - "Microphone", "Onboard Microphone", - "Microphone", "Microphone Jack", - "Speaker", "Speaker", - "Headphone", "Headphones"; - - simple-audio-card,routing = - "Headphones", "LOUT1", - "Headphones", "ROUT1", - "Speaker", "LOUT2", - "Speaker", "ROUT2", - - "Headphones", "Headphones Amp OUTL", - "Headphones", "Headphones Amp OUTR", - "Headphones Amp INL", "LOUT1", - "Headphones Amp INR", "ROUT1", - - "Speaker", "Speaker Amp OUTL", - "Speaker", "Speaker Amp OUTR", - "Speaker Amp INL", "LOUT2", - "Speaker Amp INR", "ROUT2", - - /* single ended signal to LINPUT1 */ - "LINPUT1", "Microphone Jack", - "RINPUT1", "Microphone Jack", - /* differential signal */ - "LINPUT2", "Onboard Microphone", - "RINPUT2", "Onboard Microphone"; - - daicpu: simple-audio-card,cpu { - sound-dai = <&i2s0_8ch>; - system-clock-frequency = <12288000>; - }; - - daicodec: simple-audio-card,codec { - sound-dai = <&es8388>; - system-clock-frequency = <12288000>; - }; - }; - - vcc3v3_pcie30: vcc3v3-pcie30-regulator { - compatible = "regulator-fixed"; - enable-active-high; - gpios = <&gpio2 RK_PB6 GPIO_ACTIVE_HIGH>; - regulator-name = "vcc3v3_pcie30"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - startup-delay-us = <5000>; - vin-supply = <&vcc5v0_sys>; - }; - - vcc3v3_pcie_eth: vcc3v3-pcie-eth-regulator { - compatible = "regulator-fixed"; - gpios = <&gpio3 RK_PB4 GPIO_ACTIVE_LOW>; - regulator-name = "vcc3v3_pcie_eth"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - startup-delay-us = <50000>; - vin-supply = <&vcc5v0_sys>; - }; - - vcc3v3_wf: vcc3v3-wf-regulator { - compatible = "regulator-fixed"; - enable-active-high; - gpios = <&gpio2 RK_PC5 GPIO_ACTIVE_HIGH>; - regulator-name = "vcc3v3_wf"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - startup-delay-us = <50000>; - vin-supply = <&vcc5v0_sys>; - }; - - vcc5v0_sys: vcc5v0-sys-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc5v0_sys"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - }; - - vcc5v0_usb20: vcc5v0-usb20-regulator { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&vcc5v0_usb20_en>; - regulator-name = "vcc5v0_usb20"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - vin-supply = <&vcc5v0_sys>; - }; -}; - -&combphy0_ps { - status = "okay"; -}; - -&combphy1_ps { - status = "okay"; -}; - -&combphy2_psu { - status = "okay"; -}; - -&cpu_b0 { - cpu-supply = <&vdd_cpu_big0_s0>; -}; - -&cpu_b1 { - cpu-supply = <&vdd_cpu_big0_s0>; -}; - -&cpu_b2 { - cpu-supply = <&vdd_cpu_big1_s0>; -}; - -&cpu_b3 { - cpu-supply = <&vdd_cpu_big1_s0>; -}; - -&cpu_l0 { - cpu-supply = <&vdd_cpu_lit_s0>; -}; - -&cpu_l1 { - cpu-supply = <&vdd_cpu_lit_s0>; -}; - -&cpu_l2 { - cpu-supply = <&vdd_cpu_lit_s0>; -}; - -&cpu_l3 { - cpu-supply = <&vdd_cpu_lit_s0>; -}; - -&i2c0 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c0m2_xfer>; - status = "okay"; - - vdd_cpu_big0_s0: regulator@42 { - compatible = "rockchip,rk8602"; - reg = <0x42>; - fcs,suspend-voltage-selector = <1>; - regulator-name = "vdd_cpu_big0_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <550000>; - regulator-max-microvolt = <1050000>; - regulator-ramp-delay = <2300>; - vin-supply = <&vcc5v0_sys>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_cpu_big1_s0: regulator@43 { - compatible = "rockchip,rk8603", "rockchip,rk8602"; - reg = <0x43>; - fcs,suspend-voltage-selector = <1>; - regulator-name = "vdd_cpu_big1_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <550000>; - regulator-max-microvolt = <1050000>; - regulator-ramp-delay = <2300>; - vin-supply = <&vcc5v0_sys>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; -}; - -&i2c6 { - clock-frequency = <400000>; - status = "okay"; - - hym8563: rtc@51 { - compatible = "haoyu,hym8563"; - reg = <0x51>; - interrupt-parent = <&gpio0>; - interrupts = ; - #clock-cells = <0>; - clock-output-names = "hym8563"; - pinctrl-names = "default"; - pinctrl-0 = <&hym8563_int>; - wakeup-source; - }; -}; - -&i2c7 { - status = "okay"; - - /* PLDO2 vcca 1.8V, BUCK8 gated by PLDO2 being enabled */ - es8388: audio-codec@11 { - compatible = "everest,es8388"; - reg = <0x11>; - clocks = <&cru I2S0_8CH_MCLKOUT>; - clock-names = "mclk"; - AVDD-supply = <&vcc_1v8_s0>; - DVDD-supply = <&vcc_1v8_s0>; - HPVDD-supply = <&vcc_3v3_s0>; - PVDD-supply = <&vcc_3v3_s0>; - assigned-clocks = <&cru I2S0_8CH_MCLKOUT>; - assigned-clock-rates = <12288000>; - #sound-dai-cells = <0>; - }; -}; - -&i2s0_8ch { - pinctrl-names = "default"; - pinctrl-0 = <&i2s0_lrck - &i2s0_mclk - &i2s0_sclk - &i2s0_sdi0 - &i2s0_sdo0>; - status = "okay"; -}; - -&i2s2_2ch { - pinctrl-names = "default"; - pinctrl-0 = <&i2s2m0_lrck - &i2s2m0_sclk - &i2s2m0_sdi - &i2s2m0_sdo>; - status = "okay"; -}; - -/* phy1 - M.KEY socket */ -&pcie2x1l0 { - reset-gpios = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>; - vpcie3v3-supply = <&vcc3v3_wf>; - status = "okay"; -}; - -/* phy2 - right ethernet port */ -&pcie2x1l1 { - reset-gpios = <&gpio3 RK_PB3 GPIO_ACTIVE_HIGH>; - vpcie3v3-supply = <&vcc3v3_pcie_eth>; - status = "okay"; -}; - -/* phy0 - left ethernet port */ -&pcie2x1l2 { - reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>; - vpcie3v3-supply = <&vcc3v3_pcie_eth>; - status = "okay"; -}; - -&pcie30phy { - status = "okay"; -}; - -&pcie3x4 { - reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>; - vpcie3v3-supply = <&vcc3v3_pcie30>; - status = "okay"; -}; - -&pinctrl { - hym8563 { - hym8563_int: hym8563-int { - rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - leds { - blue_led_pin: blue-led { - rockchip,pins = <3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - ir-receiver { - ir_receiver_pin: ir-receiver-pin { - rockchip,pins = <4 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - sound { - hp_detect: hp-detect { - rockchip,pins = <1 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - usb { - vcc5v0_usb20_en: vcc5v0-usb20-en { - rockchip,pins = <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; -}; - -&pwm2 { - pinctrl-0 = <&pwm2m1_pins>; - pinctrl-names = "default"; - status = "okay"; -}; - -&pwm3 { - pinctrl-0 = <&pwm3m1_pins>; - status = "okay"; -}; - -&saradc { - vref-supply = <&vcc_1v8_s0>; - status = "okay"; -}; - -&sdhci { - bus-width = <8>; - no-sdio; - no-sd; - non-removable; - max-frequency = <200000000>; - mmc-hs400-1_8v; - mmc-hs400-enhanced-strobe; - status = "okay"; -}; - -&sdmmc { - bus-width = <4>; - cap-sd-highspeed; - cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>; - disable-wp; - max-frequency = <150000000>; - no-sdio; - no-mmc; - sd-uhs-sdr104; - vmmc-supply = <&vcc_3v3_s3>; - vqmmc-supply = <&vccio_sd_s0>; - status = "okay"; -}; - -&sfc { - pinctrl-names = "default"; - pinctrl-0 = <&fspim1_pins>; - status = "okay"; - - spi_flash: flash@0 { - compatible = "jedec,spi-nor"; - reg = <0x0>; - spi-max-frequency = <100000000>; - spi-rx-bus-width = <4>; - spi-tx-bus-width = <1>; - }; -}; - -&spi2 { - assigned-clocks = <&cru CLK_SPI2>; - assigned-clock-rates = <200000000>; - num-cs = <1>; - pinctrl-names = "default"; - pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>; - status = "okay"; - - pmic@0 { - compatible = "rockchip,rk806"; - reg = <0x0>; - interrupt-parent = <&gpio0>; - interrupts = <7 IRQ_TYPE_LEVEL_LOW>; - pinctrl-names = "default"; - pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>, - <&rk806_dvs2_null>, <&rk806_dvs3_null>; - spi-max-frequency = <1000000>; - - vcc1-supply = <&vcc5v0_sys>; - vcc2-supply = <&vcc5v0_sys>; - vcc3-supply = <&vcc5v0_sys>; - vcc4-supply = <&vcc5v0_sys>; - vcc5-supply = <&vcc5v0_sys>; - vcc6-supply = <&vcc5v0_sys>; - vcc7-supply = <&vcc5v0_sys>; - vcc8-supply = <&vcc5v0_sys>; - vcc9-supply = <&vcc5v0_sys>; - vcc10-supply = <&vcc5v0_sys>; - vcc11-supply = <&vcc_2v0_pldo_s3>; - vcc12-supply = <&vcc5v0_sys>; - vcc13-supply = <&vdd2_ddr_s3>; - vcc14-supply = <&vdd2_ddr_s3>; - vcca-supply = <&vcc5v0_sys>; - - gpio-controller; - #gpio-cells = <2>; - - rk806_dvs1_null: dvs1-null-pins { - pins = "gpio_pwrctrl2"; - function = "pin_fun0"; - }; - - rk806_dvs2_null: dvs2-null-pins { - pins = "gpio_pwrctrl2"; - function = "pin_fun0"; - }; - - rk806_dvs3_null: dvs3-null-pins { - pins = "gpio_pwrctrl3"; - function = "pin_fun0"; - }; - - regulators { - vdd_gpu_s0: dcdc-reg1 { - regulator-name = "vdd_gpu_s0"; - regulator-boot-on; - regulator-enable-ramp-delay = <400>; - regulator-min-microvolt = <550000>; - regulator-max-microvolt = <950000>; - regulator-ramp-delay = <12500>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_cpu_lit_s0: dcdc-reg2 { - regulator-name = "vdd_cpu_lit_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <550000>; - regulator-max-microvolt = <950000>; - regulator-ramp-delay = <12500>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_log_s0: dcdc-reg3 { - regulator-name = "vdd_log_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <675000>; - regulator-max-microvolt = <825000>; - regulator-ramp-delay = <12500>; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <750000>; - }; - }; - - vdd_vdenc_s0: dcdc-reg4 { - regulator-name = "vdd_vdenc_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <550000>; - regulator-max-microvolt = <825000>; - regulator-ramp-delay = <12500>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_ddr_s0: dcdc-reg5 { - regulator-name = "vdd_ddr_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <675000>; - regulator-max-microvolt = <900000>; - regulator-ramp-delay = <12500>; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <850000>; - }; - }; - - vdd2_ddr_s3: dcdc-reg6 { - regulator-name = "vdd2_ddr_s3"; - regulator-always-on; - regulator-boot-on; - - regulator-state-mem { - regulator-on-in-suspend; - }; - }; - - vcc_2v0_pldo_s3: dcdc-reg7 { - regulator-name = "vdd_2v0_pldo_s3"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <2000000>; - regulator-max-microvolt = <2000000>; - regulator-ramp-delay = <12500>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <2000000>; - }; - }; - - vcc_3v3_s3: dcdc-reg8 { - regulator-name = "vcc_3v3_s3"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <3300000>; - }; - }; - - vddq_ddr_s0: dcdc-reg9 { - regulator-name = "vddq_ddr_s0"; - regulator-always-on; - regulator-boot-on; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_1v8_s3: dcdc-reg10 { - regulator-name = "vcc_1v8_s3"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - avcc_1v8_s0: pldo-reg1 { - regulator-name = "avcc_1v8_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - /* shorted to avcc_1v8_s0 on the board */ - vcc_1v8_s0: pldo-reg2 { - regulator-name = "vcc_1v8_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - avdd_1v2_s0: pldo-reg3 { - regulator-name = "avdd_1v2_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1200000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_3v3_s0: pldo-reg4 { - regulator-name = "vcc_3v3_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-ramp-delay = <12500>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vccio_sd_s0: pldo-reg5 { - regulator-name = "vccio_sd_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - regulator-ramp-delay = <12500>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - pldo6_s3: pldo-reg6 { - regulator-name = "pldo6_s3"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vdd_0v75_s3: nldo-reg1 { - regulator-name = "vdd_0v75_s3"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <750000>; - regulator-max-microvolt = <750000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <750000>; - }; - }; - - vdd_ddr_pll_s0: nldo-reg2 { - regulator-name = "vdd_ddr_pll_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <850000>; - regulator-max-microvolt = <850000>; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <850000>; - }; - }; - - avdd_0v75_s0: nldo-reg3 { - regulator-name = "avdd_0v75_s0"; - regulator-always-on; - regulator-boot-on; - /* - * The schematic mentions that actual setting - * should be 0.8375V. RK3588 datasheet specifies - * maximum as 0.825V. So we set datasheet max - * here. - */ - regulator-min-microvolt = <825000>; - regulator-max-microvolt = <825000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_0v85_s0: nldo-reg4 { - regulator-name = "vdd_0v85_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <850000>; - regulator-max-microvolt = <850000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_0v75_s0: nldo-reg5 { - regulator-name = "vdd_0v75_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <750000>; - regulator-max-microvolt = <750000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - }; - }; -}; - -&tsadc { - status = "okay"; -}; - -&u2phy2 { - status = "okay"; -}; - -&u2phy3 { - status = "okay"; -}; - -&u2phy2_host { - phy-supply = <&vcc5v0_usb20>; - status = "okay"; -}; - -&u2phy3_host { - phy-supply = <&vcc5v0_usb20>; - status = "okay"; -}; - -&uart2 { - pinctrl-0 = <&uart2m0_xfer>; - status = "okay"; -}; - -&uart9 { - pinctrl-0 = <&uart9m0_xfer>; - status = "okay"; -}; - -&usb_host0_ehci { - status = "okay"; -}; - -&usb_host0_ohci { - status = "okay"; -}; - -&usb_host1_ehci { - status = "okay"; -}; - -&usb_host1_ohci { - status = "okay"; -}; diff --git a/arch/arm/dts/rk3588-pinctrl.dtsi b/arch/arm/dts/rk3588-pinctrl.dtsi deleted file mode 100644 index 244c66faa16..00000000000 --- a/arch/arm/dts/rk3588-pinctrl.dtsi +++ /dev/null @@ -1,516 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (c) 2021 Rockchip Electronics Co., Ltd. - */ - -#include -#include "rockchip-pinconf.dtsi" - -/* - * This file is auto generated by pin2dts tool, please keep these code - * by adding changes at end of this file. - */ -&pinctrl { - clk32k { - /omit-if-no-ref/ - clk32k_out1: clk32k-out1 { - rockchip,pins = - /* clk32k_out1 */ - <2 RK_PC5 1 &pcfg_pull_none>; - }; - - }; - - eth0 { - /omit-if-no-ref/ - eth0_pins: eth0-pins { - rockchip,pins = - /* eth0_refclko_25m */ - <2 RK_PC3 1 &pcfg_pull_none>; - }; - - }; - - fspi { - /omit-if-no-ref/ - fspim1_pins: fspim1-pins { - rockchip,pins = - /* fspi_clk_m1 */ - <2 RK_PB3 3 &pcfg_pull_up_drv_level_2>, - /* fspi_cs0n_m1 */ - <2 RK_PB4 3 &pcfg_pull_up_drv_level_2>, - /* fspi_d0_m1 */ - <2 RK_PA6 3 &pcfg_pull_up_drv_level_2>, - /* fspi_d1_m1 */ - <2 RK_PA7 3 &pcfg_pull_up_drv_level_2>, - /* fspi_d2_m1 */ - <2 RK_PB0 3 &pcfg_pull_up_drv_level_2>, - /* fspi_d3_m1 */ - <2 RK_PB1 3 &pcfg_pull_up_drv_level_2>; - }; - - /omit-if-no-ref/ - fspim1_cs1: fspim1-cs1 { - rockchip,pins = - /* fspi_cs1n_m1 */ - <2 RK_PB5 3 &pcfg_pull_up_drv_level_2>; - }; - }; - - gmac0 { - /omit-if-no-ref/ - gmac0_miim: gmac0-miim { - rockchip,pins = - /* gmac0_mdc */ - <4 RK_PC4 1 &pcfg_pull_none>, - /* gmac0_mdio */ - <4 RK_PC5 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - gmac0_clkinout: gmac0-clkinout { - rockchip,pins = - /* gmac0_mclkinout */ - <4 RK_PC3 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - gmac0_rx_bus2: gmac0-rx-bus2 { - rockchip,pins = - /* gmac0_rxd0 */ - <2 RK_PC1 1 &pcfg_pull_none>, - /* gmac0_rxd1 */ - <2 RK_PC2 1 &pcfg_pull_none>, - /* gmac0_rxdv_crs */ - <4 RK_PC2 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - gmac0_tx_bus2: gmac0-tx-bus2 { - rockchip,pins = - /* gmac0_txd0 */ - <2 RK_PB6 1 &pcfg_pull_none>, - /* gmac0_txd1 */ - <2 RK_PB7 1 &pcfg_pull_none>, - /* gmac0_txen */ - <2 RK_PC0 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - gmac0_rgmii_clk: gmac0-rgmii-clk { - rockchip,pins = - /* gmac0_rxclk */ - <2 RK_PB0 1 &pcfg_pull_none>, - /* gmac0_txclk */ - <2 RK_PB3 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - gmac0_rgmii_bus: gmac0-rgmii-bus { - rockchip,pins = - /* gmac0_rxd2 */ - <2 RK_PA6 1 &pcfg_pull_none>, - /* gmac0_rxd3 */ - <2 RK_PA7 1 &pcfg_pull_none>, - /* gmac0_txd2 */ - <2 RK_PB1 1 &pcfg_pull_none>, - /* gmac0_txd3 */ - <2 RK_PB2 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - gmac0_ppsclk: gmac0-ppsclk { - rockchip,pins = - /* gmac0_ppsclk */ - <2 RK_PC4 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - gmac0_ppstring: gmac0-ppstring { - rockchip,pins = - /* gmac0_ppstring */ - <2 RK_PB5 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - gmac0_ptp_refclk: gmac0-ptp-refclk { - rockchip,pins = - /* gmac0_ptp_refclk */ - <2 RK_PB4 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - gmac0_txer: gmac0-txer { - rockchip,pins = - /* gmac0_txer */ - <4 RK_PC6 1 &pcfg_pull_none>; - }; - - }; - - hdmi { - /omit-if-no-ref/ - hdmim0_tx1_cec: hdmim0-tx1-cec { - rockchip,pins = - /* hdmim0_tx1_cec */ - <2 RK_PC4 4 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - hdmim0_tx1_scl: hdmim0-tx1-scl { - rockchip,pins = - /* hdmim0_tx1_scl */ - <2 RK_PB5 4 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - hdmim0_tx1_sda: hdmim0-tx1-sda { - rockchip,pins = - /* hdmim0_tx1_sda */ - <2 RK_PB4 4 &pcfg_pull_none>; - }; - }; - - i2c0 { - /omit-if-no-ref/ - i2c0m1_xfer: i2c0m1-xfer { - rockchip,pins = - /* i2c0_scl_m1 */ - <4 RK_PC5 9 &pcfg_pull_none_smt>, - /* i2c0_sda_m1 */ - <4 RK_PC6 9 &pcfg_pull_none_smt>; - }; - }; - - i2c2 { - /omit-if-no-ref/ - i2c2m1_xfer: i2c2m1-xfer { - rockchip,pins = - /* i2c2_scl_m1 */ - <2 RK_PC1 9 &pcfg_pull_none_smt>, - /* i2c2_sda_m1 */ - <2 RK_PC0 9 &pcfg_pull_none_smt>; - }; - }; - - i2c3 { - /omit-if-no-ref/ - i2c3m3_xfer: i2c3m3-xfer { - rockchip,pins = - /* i2c3_scl_m3 */ - <2 RK_PB2 9 &pcfg_pull_none_smt>, - /* i2c3_sda_m3 */ - <2 RK_PB3 9 &pcfg_pull_none_smt>; - }; - }; - - i2c4 { - /omit-if-no-ref/ - i2c4m1_xfer: i2c4m1-xfer { - rockchip,pins = - /* i2c4_scl_m1 */ - <2 RK_PB5 9 &pcfg_pull_none_smt>, - /* i2c4_sda_m1 */ - <2 RK_PB4 9 &pcfg_pull_none_smt>; - }; - }; - - i2c5 { - /omit-if-no-ref/ - i2c5m4_xfer: i2c5m4-xfer { - rockchip,pins = - /* i2c5_scl_m4 */ - <2 RK_PB6 9 &pcfg_pull_none_smt>, - /* i2c5_sda_m4 */ - <2 RK_PB7 9 &pcfg_pull_none_smt>; - }; - }; - - i2c6 { - /omit-if-no-ref/ - i2c6m2_xfer: i2c6m2-xfer { - rockchip,pins = - /* i2c6_scl_m2 */ - <2 RK_PC3 9 &pcfg_pull_none_smt>, - /* i2c6_sda_m2 */ - <2 RK_PC2 9 &pcfg_pull_none_smt>; - }; - }; - - i2c7 { - /omit-if-no-ref/ - i2c7m1_xfer: i2c7m1-xfer { - rockchip,pins = - /* i2c7_scl_m1 */ - <4 RK_PC3 9 &pcfg_pull_none_smt>, - /* i2c7_sda_m1 */ - <4 RK_PC4 9 &pcfg_pull_none_smt>; - }; - }; - - i2c8 { - /omit-if-no-ref/ - i2c8m1_xfer: i2c8m1-xfer { - rockchip,pins = - /* i2c8_scl_m1 */ - <2 RK_PB0 9 &pcfg_pull_none_smt>, - /* i2c8_sda_m1 */ - <2 RK_PB1 9 &pcfg_pull_none_smt>; - }; - }; - - i2s2 { - /omit-if-no-ref/ - i2s2m0_lrck: i2s2m0-lrck { - rockchip,pins = - /* i2s2m0_lrck */ - <2 RK_PC0 2 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s2m0_mclk: i2s2m0-mclk { - rockchip,pins = - /* i2s2m0_mclk */ - <2 RK_PB6 2 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s2m0_sclk: i2s2m0-sclk { - rockchip,pins = - /* i2s2m0_sclk */ - <2 RK_PB7 2 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s2m0_sdi: i2s2m0-sdi { - rockchip,pins = - /* i2s2m0_sdi */ - <2 RK_PC3 2 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s2m0_sdo: i2s2m0-sdo { - rockchip,pins = - /* i2s2m0_sdo */ - <4 RK_PC3 2 &pcfg_pull_none>; - }; - }; - - pwm2 { - /omit-if-no-ref/ - pwm2m2_pins: pwm2m2-pins { - rockchip,pins = - /* pwm2_m2 */ - <4 RK_PC2 11 &pcfg_pull_none>; - }; - }; - - pwm4 { - /omit-if-no-ref/ - pwm4m1_pins: pwm4m1-pins { - rockchip,pins = - /* pwm4_m1 */ - <4 RK_PC3 11 &pcfg_pull_none>; - }; - }; - - pwm5 { - /omit-if-no-ref/ - pwm5m2_pins: pwm5m2-pins { - rockchip,pins = - /* pwm5_m2 */ - <4 RK_PC4 11 &pcfg_pull_none>; - }; - }; - - pwm6 { - /omit-if-no-ref/ - pwm6m2_pins: pwm6m2-pins { - rockchip,pins = - /* pwm6_m2 */ - <4 RK_PC5 11 &pcfg_pull_none>; - }; - }; - - pwm7 { - /omit-if-no-ref/ - pwm7m3_pins: pwm7m3-pins { - rockchip,pins = - /* pwm7_ir_m3 */ - <4 RK_PC6 11 &pcfg_pull_none>; - }; - }; - - sdio { - /omit-if-no-ref/ - sdiom0_pins: sdiom0-pins { - rockchip,pins = - /* sdio_clk_m0 */ - <2 RK_PB3 2 &pcfg_pull_none>, - /* sdio_cmd_m0 */ - <2 RK_PB2 2 &pcfg_pull_none>, - /* sdio_d0_m0 */ - <2 RK_PA6 2 &pcfg_pull_none>, - /* sdio_d1_m0 */ - <2 RK_PA7 2 &pcfg_pull_none>, - /* sdio_d2_m0 */ - <2 RK_PB0 2 &pcfg_pull_none>, - /* sdio_d3_m0 */ - <2 RK_PB1 2 &pcfg_pull_none>; - }; - }; - - spi1 { - /omit-if-no-ref/ - spi1m0_pins: spi1m0-pins { - rockchip,pins = - /* spi1_clk_m0 */ - <2 RK_PC0 8 &pcfg_pull_up_drv_level_1>, - /* spi1_miso_m0 */ - <2 RK_PC1 8 &pcfg_pull_up_drv_level_1>, - /* spi1_mosi_m0 */ - <2 RK_PC2 8 &pcfg_pull_up_drv_level_1>; - }; - - /omit-if-no-ref/ - spi1m0_cs0: spi1m0-cs0 { - rockchip,pins = - /* spi1_cs0_m0 */ - <2 RK_PC3 8 &pcfg_pull_up_drv_level_1>; - }; - - /omit-if-no-ref/ - spi1m0_cs1: spi1m0-cs1 { - rockchip,pins = - /* spi1_cs1_m0 */ - <2 RK_PC4 8 &pcfg_pull_up_drv_level_1>; - }; - }; - - spi3 { - /omit-if-no-ref/ - spi3m0_pins: spi3m0-pins { - rockchip,pins = - /* spi3_clk_m0 */ - <4 RK_PC6 8 &pcfg_pull_up_drv_level_1>, - /* spi3_miso_m0 */ - <4 RK_PC4 8 &pcfg_pull_up_drv_level_1>, - /* spi3_mosi_m0 */ - <4 RK_PC5 8 &pcfg_pull_up_drv_level_1>; - }; - - /omit-if-no-ref/ - spi3m0_cs0: spi3m0-cs0 { - rockchip,pins = - /* spi3_cs0_m0 */ - <4 RK_PC2 8 &pcfg_pull_up_drv_level_1>; - }; - - /omit-if-no-ref/ - spi3m0_cs1: spi3m0-cs1 { - rockchip,pins = - /* spi3_cs1_m0 */ - <4 RK_PC3 8 &pcfg_pull_up_drv_level_1>; - }; - }; - - uart1 { - /omit-if-no-ref/ - uart1m0_xfer: uart1m0-xfer { - rockchip,pins = - /* uart1_rx_m0 */ - <2 RK_PB6 10 &pcfg_pull_up>, - /* uart1_tx_m0 */ - <2 RK_PB7 10 &pcfg_pull_up>; - }; - - /omit-if-no-ref/ - uart1m0_ctsn: uart1m0-ctsn { - rockchip,pins = - /* uart1m0_ctsn */ - <2 RK_PC1 10 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - uart1m0_rtsn: uart1m0-rtsn { - rockchip,pins = - /* uart1m0_rtsn */ - <2 RK_PC0 10 &pcfg_pull_none>; - }; - }; - - uart6 { - /omit-if-no-ref/ - uart6m0_xfer: uart6m0-xfer { - rockchip,pins = - /* uart6_rx_m0 */ - <2 RK_PA6 10 &pcfg_pull_up>, - /* uart6_tx_m0 */ - <2 RK_PA7 10 &pcfg_pull_up>; - }; - - /omit-if-no-ref/ - uart6m0_ctsn: uart6m0-ctsn { - rockchip,pins = - /* uart6m0_ctsn */ - <2 RK_PB1 10 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - uart6m0_rtsn: uart6m0-rtsn { - rockchip,pins = - /* uart6m0_rtsn */ - <2 RK_PB0 10 &pcfg_pull_none>; - }; - }; - - uart7 { - /omit-if-no-ref/ - uart7m0_xfer: uart7m0-xfer { - rockchip,pins = - /* uart7_rx_m0 */ - <2 RK_PB4 10 &pcfg_pull_up>, - /* uart7_tx_m0 */ - <2 RK_PB5 10 &pcfg_pull_up>; - }; - - /omit-if-no-ref/ - uart7m0_ctsn: uart7m0-ctsn { - rockchip,pins = - /* uart7m0_ctsn */ - <4 RK_PC6 10 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - uart7m0_rtsn: uart7m0-rtsn { - rockchip,pins = - /* uart7m0_rtsn */ - <4 RK_PC2 10 &pcfg_pull_none>; - }; - }; - - uart9 { - /omit-if-no-ref/ - uart9m0_xfer: uart9m0-xfer { - rockchip,pins = - /* uart9_rx_m0 */ - <2 RK_PC4 10 &pcfg_pull_up>, - /* uart9_tx_m0 */ - <2 RK_PC2 10 &pcfg_pull_up>; - }; - - /omit-if-no-ref/ - uart9m0_ctsn: uart9m0-ctsn { - rockchip,pins = - /* uart9m0_ctsn */ - <4 RK_PC5 10 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - uart9m0_rtsn: uart9m0-rtsn { - rockchip,pins = - /* uart9m0_rtsn */ - <4 RK_PC4 10 &pcfg_pull_none>; - }; - }; -}; diff --git a/arch/arm/dts/rk3588-quartzpro64.dts b/arch/arm/dts/rk3588-quartzpro64.dts deleted file mode 100644 index 87a0abf95f7..00000000000 --- a/arch/arm/dts/rk3588-quartzpro64.dts +++ /dev/null @@ -1,1137 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (c) 2023 Ondřej Jirman - */ - -/dts-v1/; - -#include -#include -#include -#include -#include -#include "rk3588.dtsi" - -/ { - model = "PINE64 QuartzPro64"; - compatible = "pine64,quartzpro64", "rockchip,rk3588"; - - aliases { - ethernet0 = &gmac0; - mmc0 = &sdhci; - mmc1 = &sdmmc; - }; - - chosen { - stdout-path = "serial2:1500000n8"; - }; - - adc-keys-0 { - compatible = "adc-keys"; - io-channels = <&saradc 0>; - io-channel-names = "buttons"; - keyup-threshold-microvolt = <1800000>; - poll-interval = <100>; - - button-maskrom { - label = "Mask Rom"; - linux,code = ; - press-threshold-microvolt = <393>; - }; - }; - - adc-keys-1 { - compatible = "adc-keys"; - io-channels = <&saradc 1>; - io-channel-names = "buttons"; - keyup-threshold-microvolt = <1800000>; - poll-interval = <100>; - - button-volume-up { - label = "V+/REC"; - linux,code = ; - press-threshold-microvolt = <17821>; - }; - - button-volume-down { - label = "V-"; - linux,code = ; - press-threshold-microvolt = <415384>; - }; - - button-menu { - label = "MENU"; - linux,code = ; - press-threshold-microvolt = <890909>; - }; - - button-esc { - label = "ESC"; - linux,code = ; - press-threshold-microvolt = <1233962>; - }; - }; - - headphone_amp: audio-amplifier-headphone { - compatible = "simple-audio-amplifier"; - enable-gpios = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>; - sound-name-prefix = "Headphones Amp"; - }; - - speaker_amp: audio-amplifier-speaker { - compatible = "simple-audio-amplifier"; - enable-gpios = <&gpio1 RK_PD3 GPIO_ACTIVE_HIGH>; - sound-name-prefix = "Speaker Amp"; - }; - - leds { - compatible = "gpio-leds"; - pinctrl-names = "default"; - pinctrl-0 = <&led_pins>; - - led-1 { - color = ; - function = LED_FUNCTION_INDICATOR; - gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_HIGH>; - }; - }; - - sound { - compatible = "simple-audio-card"; - pinctrl-names = "default"; - pinctrl-0 = <&hp_detect>; - simple-audio-card,name = "Analog"; - simple-audio-card,aux-devs = <&speaker_amp>, <&headphone_amp>; - simple-audio-card,format = "i2s"; - simple-audio-card,mclk-fs = <256>; - simple-audio-card,hp-det-gpio = <&gpio1 RK_PD5 GPIO_ACTIVE_LOW>; - simple-audio-card,bitclock-master = <&daicpu>; - simple-audio-card,frame-master = <&daicpu>; - /* SARADC_IN3 is used as MIC detection / key input */ - - simple-audio-card,widgets = - "Microphone", "Onboard Microphone", - "Microphone", "Microphone Jack", - "Speaker", "Speaker", - "Headphone", "Headphones"; - - simple-audio-card,routing = - "Headphones", "LOUT1", - "Headphones", "ROUT1", - "Speaker", "LOUT2", - "Speaker", "ROUT2", - - "Headphones", "Headphones Amp OUTL", - "Headphones", "Headphones Amp OUTR", - "Headphones Amp INL", "LOUT1", - "Headphones Amp INR", "ROUT1", - - "Speaker", "Speaker Amp OUTL", - "Speaker", "Speaker Amp OUTR", - "Speaker Amp INL", "LOUT2", - "Speaker Amp INR", "ROUT2", - - /* single ended signal to LINPUT1 */ - "LINPUT1", "Microphone Jack", - "RINPUT1", "Microphone Jack", - /* differential signal */ - "LINPUT2", "Onboard Microphone", - "RINPUT2", "Onboard Microphone"; - - daicpu: simple-audio-card,cpu { - sound-dai = <&i2s0_8ch>; - system-clock-frequency = <12288000>; - }; - - daicodec: simple-audio-card,codec { - sound-dai = <&es8388>; - system-clock-frequency = <12288000>; - }; - }; - - vcc12v_dcin: vcc12v-dcin-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc12v_dcin"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <12000000>; - regulator-max-microvolt = <12000000>; - }; - - vcc3v3_bt: vcc3v3-bt-regulator { - compatible = "regulator-fixed"; - enable-active-high; - gpios = <&gpio3 RK_PA6 GPIO_ACTIVE_HIGH>; - regulator-name = "vcc3v3_bt"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - startup-delay-us = <50000>; - vin-supply = <&vcc_3v3_s0>; - }; - - vcc3v3_pcie30: vcc3v3-pcie30-regulator { - compatible = "regulator-fixed"; - enable-active-high; - gpios = <&gpio3 RK_PC3 GPIO_ACTIVE_HIGH>; - regulator-name = "vcc3v3_pcie30"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - startup-delay-us = <5000>; - vin-supply = <&vcc12v_dcin>; - }; - - vcc3v3_wf: vcc3v3-wf-regulator { - compatible = "regulator-fixed"; - enable-active-high; - gpios = <&gpio3 RK_PB1 GPIO_ACTIVE_HIGH>; - regulator-name = "vcc3v3_wf"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - startup-delay-us = <50000>; - vin-supply = <&vcc_3v3_s0>; - }; - - vcc4v0_sys: vcc4v0-sys-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc4v0_sys"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <4000000>; - regulator-max-microvolt = <4000000>; - vin-supply = <&vcc12v_dcin>; - }; - - vcc5v0_host: vcc5v0-host-regulator { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&vcc5v0_host_en>; - regulator-name = "vcc5v0_host"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - vin-supply = <&vcc5v0_usb>; - }; - - vcc5v0_usb: vcc5v0-usb-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc5v0_usb"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - vin-supply = <&vcc12v_dcin>; - }; -}; - -&combphy0_ps { - status = "okay"; -}; - -&combphy1_ps { - status = "okay"; -}; - -&combphy2_psu { - status = "okay"; -}; - -&cpu_b0 { - cpu-supply = <&vdd_cpu_big0_s0>; -}; - -&cpu_b1 { - cpu-supply = <&vdd_cpu_big0_s0>; -}; - -&cpu_b2 { - cpu-supply = <&vdd_cpu_big1_s0>; -}; - -&cpu_b3 { - cpu-supply = <&vdd_cpu_big1_s0>; -}; - -&cpu_l0 { - cpu-supply = <&vdd_cpu_lit_s0>; -}; - -&cpu_l1 { - cpu-supply = <&vdd_cpu_lit_s0>; -}; - -&cpu_l2 { - cpu-supply = <&vdd_cpu_lit_s0>; -}; - -&cpu_l3 { - cpu-supply = <&vdd_cpu_lit_s0>; -}; - -&gmac0 { - clock_in_out = "output"; - phy-handle = <&rgmii_phy>; - phy-mode = "rgmii-rxid"; - pinctrl-names = "default"; - pinctrl-0 = <&gmac0_miim - &gmac0_tx_bus2 - &gmac0_rx_bus2 - &gmac0_rgmii_clk - &gmac0_rgmii_bus>; - rx_delay = <0x00>; - tx_delay = <0x43>; - status = "okay"; -}; - -&i2c2 { - status = "okay"; - - hym8563: rtc@51 { - compatible = "haoyu,hym8563"; - reg = <0x51>; - #clock-cells = <0>; - clock-output-names = "hym8563"; - interrupt-parent = <&gpio0>; - interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&hym8563_int>; - wakeup-source; - }; -}; - -&i2c7 { - status = "okay"; - - es8388: audio-codec@11 { - compatible = "everest,es8388"; - reg = <0x11>; - assigned-clocks = <&cru I2S0_8CH_MCLKOUT>; - assigned-clock-rates = <12288000>; - clocks = <&cru I2S0_8CH_MCLKOUT>; - clock-names = "mclk"; - AVDD-supply = <&avcc_1v8_codec_s0>; - DVDD-supply = <&avcc_1v8_codec_s0>; - HPVDD-supply = <&vcc_3v3_s0>; - PVDD-supply = <&vcc_3v3_s0>; - #sound-dai-cells = <0>; - }; -}; - -&i2s0_8ch { - pinctrl-names = "default"; - pinctrl-0 = <&i2s0_lrck - &i2s0_mclk - &i2s0_sclk - &i2s0_sdi0 - &i2s0_sdo0>; - status = "okay"; -}; - -&mdio0 { - rgmii_phy: ethernet-phy@1 { - /* RTL8211F */ - compatible = "ethernet-phy-id001c.c916"; - reg = <0x1>; - pinctrl-names = "default"; - pinctrl-0 = <&rtl8211f_rst>; - reset-assert-us = <20000>; - reset-deassert-us = <100000>; - reset-gpios = <&gpio4 RK_PB3 GPIO_ACTIVE_LOW>; - }; -}; - -&pinctrl { - hym8563 { - hym8563_int: hym8563-int { - rockchip,pins = <0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - leds { - led_pins: led-pins { - rockchip,pins = <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - rtl8111 { - rtl8111_isolate: rtl8111-isolate { - rockchip,pins = <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - rtl8211f { - rtl8211f_rst: rtl8211f-rst { - rockchip,pins = <4 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - }; - - sound { - hp_detect: hp-detect { - rockchip,pins = <1 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - usb { - vcc5v0_host_en: vcc5v0-host-en { - rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; -}; - -/* WIFI */ -&pcie2x1l0 { - reset-gpios = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>; - vpcie3v3-supply = <&vcc3v3_wf>; - status = "okay"; -}; - -/* GMAC1 */ -&pcie2x1l1 { - pinctrl-names = "default"; - pinctrl-0 = <&rtl8111_isolate>; - reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>; - status = "okay"; -}; - -&pcie30phy { - status = "okay"; -}; - -&pcie3x4 { - reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>; - vpcie3v3-supply = <&vcc3v3_pcie30>; - status = "okay"; -}; - -&saradc { - vref-supply = <&vcc_1v8_s0>; - status = "okay"; -}; - -&sata0 { - status = "okay"; -}; - -&sdhci { - bus-width = <8>; - no-sdio; - no-sd; - non-removable; - max-frequency = <150000000>; - mmc-hs400-1_8v; - mmc-hs400-enhanced-strobe; - status = "okay"; -}; - -&sdmmc { - bus-width = <4>; - cap-sd-highspeed; - cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>; - disable-wp; - max-frequency = <150000000>; - no-sdio; - no-mmc; - sd-uhs-sdr104; - vmmc-supply = <&vcc_3v3_s3>; - vqmmc-supply = <&vccio_sd_s0>; - status = "okay"; -}; - -&spi2 { - assigned-clocks = <&cru CLK_SPI2>; - assigned-clock-rates = <200000000>; - num-cs = <2>; - status = "okay"; - - pmic@0 { - compatible = "rockchip,rk806"; - reg = <0x0>; - #gpio-cells = <2>; - gpio-controller; - interrupt-parent = <&gpio0>; - interrupts = <7 IRQ_TYPE_LEVEL_LOW>; - pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>, - <&rk806_dvs2_null>, <&rk806_dvs3_null>; - pinctrl-names = "default"; - spi-max-frequency = <1000000>; - - vcc1-supply = <&vcc4v0_sys>; - vcc2-supply = <&vcc4v0_sys>; - vcc3-supply = <&vcc4v0_sys>; - vcc4-supply = <&vcc4v0_sys>; - vcc5-supply = <&vcc4v0_sys>; - vcc6-supply = <&vcc4v0_sys>; - vcc7-supply = <&vcc4v0_sys>; - vcc8-supply = <&vcc4v0_sys>; - vcc9-supply = <&vcc4v0_sys>; - vcc10-supply = <&vcc4v0_sys>; - vcc11-supply = <&vcc_2v0_pldo_s3>; - vcc12-supply = <&vcc4v0_sys>; - vcc13-supply = <&vcc_1v1_nldo_s3>; - vcc14-supply = <&vcc_1v1_nldo_s3>; - vcca-supply = <&vcc4v0_sys>; - - rk806_dvs1_null: dvs1-null-pins { - pins = "gpio_pwrctrl1"; - function = "pin_fun0"; - }; - - rk806_dvs2_null: dvs2-null-pins { - pins = "gpio_pwrctrl2"; - function = "pin_fun0"; - }; - - rk806_dvs3_null: dvs3-null-pins { - pins = "gpio_pwrctrl3"; - function = "pin_fun0"; - }; - - regulators { - vdd_gpu_s0: dcdc-reg1 { - regulator-name = "vdd_gpu_s0"; - regulator-boot-on; - regulator-enable-ramp-delay = <400>; - regulator-min-microvolt = <550000>; - regulator-max-microvolt = <950000>; - regulator-ramp-delay = <12500>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_npu_s0: dcdc-reg2 { - regulator-name = "vdd_npu_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <550000>; - regulator-max-microvolt = <950000>; - regulator-ramp-delay = <12500>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_log_s0: dcdc-reg3 { - regulator-name = "vdd_log_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <675000>; - regulator-max-microvolt = <750000>; - regulator-ramp-delay = <12500>; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <750000>; - }; - }; - - vdd_vdenc_s0: dcdc-reg4 { - regulator-name = "vdd_vdenc_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <550000>; - regulator-max-microvolt = <950000>; - regulator-ramp-delay = <12500>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - - }; - - vdd_gpu_mem_s0: dcdc-reg5 { - regulator-name = "vdd_gpu_mem_s0"; - regulator-boot-on; - regulator-enable-ramp-delay = <400>; - regulator-min-microvolt = <675000>; - regulator-max-microvolt = <950000>; - regulator-ramp-delay = <12500>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - - }; - - vdd_npu_mem_s0: dcdc-reg6 { - regulator-name = "vdd_npu_mem_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <675000>; - regulator-max-microvolt = <950000>; - regulator-ramp-delay = <12500>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - - }; - - vcc_2v0_pldo_s3: dcdc-reg7 { - regulator-name = "vdd_2v0_pldo_s3"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <2000000>; - regulator-max-microvolt = <2000000>; - regulator-ramp-delay = <12500>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <2000000>; - }; - }; - - vdd_vdenc_mem_s0: dcdc-reg8 { - regulator-name = "vdd_vdenc_mem_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <675000>; - regulator-max-microvolt = <950000>; - regulator-ramp-delay = <12500>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd2_ddr_s3: dcdc-reg9 { - regulator-name = "vdd2_ddr_s3"; - regulator-always-on; - regulator-boot-on; - - regulator-state-mem { - regulator-on-in-suspend; - }; - }; - - vcc_1v1_nldo_s3: dcdc-reg10 { - regulator-name = "vcc_1v1_nldo_s3"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1100000>; - regulator-max-microvolt = <1100000>; - regulator-ramp-delay = <12500>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1100000>; - }; - }; - - avcc_1v8_s0: pldo-reg1 { - regulator-name = "avcc_1v8_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-ramp-delay = <12500>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd1_1v8_ddr_s3: pldo-reg2 { - regulator-name = "vdd1_1v8_ddr_s3"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-ramp-delay = <12500>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - avcc_1v8_codec_s0: pldo-reg3 { - regulator-name = "avcc_1v8_codec_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-ramp-delay = <12500>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_3v3_s3: pldo-reg4 { - regulator-name = "vcc_3v3_s3"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-ramp-delay = <12500>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <3300000>; - }; - }; - - vccio_sd_s0: pldo-reg5 { - regulator-name = "vccio_sd_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - regulator-ramp-delay = <12500>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_1v8_s3: pldo-reg6 { - regulator-name = "vcc_1v8_s3"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-ramp-delay = <12500>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vdd_0v75_s3: nldo-reg1 { - regulator-name = "vdd_0v75_s3"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <750000>; - regulator-max-microvolt = <750000>; - regulator-ramp-delay = <12500>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <750000>; - }; - }; - - /* reserved for LPDDR5, unused? */ - vdd2l_0v9_ddr_s3: nldo-reg2 { - regulator-name = "vdd2l_0v9_ddr_s3"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <900000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <900000>; - }; - }; - - vdd_0v75_hdmi_edp_s0: nldo-reg3 { - regulator-name = "vdd_0v75_hdmi_edp_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <750000>; - regulator-max-microvolt = <750000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - avdd_0v75_s0: nldo-reg4 { - regulator-name = "avdd_0v75_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <750000>; - regulator-max-microvolt = <750000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_0v85_s0: nldo-reg5 { - regulator-name = "vdd_0v85_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <850000>; - regulator-max-microvolt = <850000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - }; - }; - - pmic@1 { - compatible = "rockchip,rk806"; - reg = <0x01>; - #gpio-cells = <2>; - gpio-controller; - interrupt-parent = <&gpio0>; - interrupts = <7 IRQ_TYPE_LEVEL_LOW>; - pinctrl-0 = <&rk806_slave_dvs1_null>, <&rk806_slave_dvs2_null>, - <&rk806_slave_dvs3_null>; - pinctrl-names = "default"; - spi-max-frequency = <1000000>; - - vcc1-supply = <&vcc4v0_sys>; - vcc2-supply = <&vcc4v0_sys>; - vcc3-supply = <&vcc4v0_sys>; - vcc4-supply = <&vcc4v0_sys>; - vcc5-supply = <&vcc4v0_sys>; - vcc6-supply = <&vcc4v0_sys>; - vcc7-supply = <&vcc4v0_sys>; - vcc8-supply = <&vcc4v0_sys>; - vcc9-supply = <&vcc4v0_sys>; - vcc10-supply = <&vcc4v0_sys>; - vcc11-supply = <&vcc_2v0_pldo_s3>; - vcc12-supply = <&vcc4v0_sys>; - vcc13-supply = <&vcc_1v1_nldo_s3>; - vcc14-supply = <&vcc_2v0_pldo_s3>; - vcca-supply = <&vcc4v0_sys>; - - rk806_slave_dvs1_null: dvs1-null-pins { - pins = "gpio_pwrctrl1"; - function = "pin_fun0"; - }; - - rk806_slave_dvs2_null: dvs2-null-pins { - pins = "gpio_pwrctrl2"; - function = "pin_fun0"; - }; - - rk806_slave_dvs3_null: dvs3-null-pins { - pins = "gpio_pwrctrl3"; - function = "pin_fun0"; - }; - - regulators { - vdd_cpu_big1_s0: dcdc-reg1 { - regulator-name = "vdd_cpu_big1_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <550000>; - regulator-max-microvolt = <1050000>; - regulator-ramp-delay = <12500>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_cpu_big0_s0: dcdc-reg2 { - regulator-name = "vdd_cpu_big0_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <550000>; - regulator-max-microvolt = <1050000>; - regulator-ramp-delay = <12500>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_cpu_lit_s0: dcdc-reg3 { - regulator-name = "vdd_cpu_lit_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <550000>; - regulator-max-microvolt = <950000>; - regulator-ramp-delay = <12500>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_3v3_s0: dcdc-reg4 { - regulator-name = "vcc_3v3_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-ramp-delay = <12500>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_cpu_big1_mem_s0: dcdc-reg5 { - regulator-name = "vdd_cpu_big1_mem_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <675000>; - regulator-max-microvolt = <1050000>; - regulator-ramp-delay = <12500>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - - vdd_cpu_big0_mem_s0: dcdc-reg6 { - regulator-name = "vdd_cpu_big0_mem_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <675000>; - regulator-max-microvolt = <1050000>; - regulator-ramp-delay = <12500>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_1v8_s0: dcdc-reg7 { - regulator-name = "vcc_1v8_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-ramp-delay = <12500>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_cpu_lit_mem_s0: dcdc-reg8 { - regulator-name = "vdd_cpu_lit_mem_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <675000>; - regulator-max-microvolt = <950000>; - regulator-ramp-delay = <12500>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vddq_ddr_s0: dcdc-reg9 { - regulator-name = "vddq_ddr_s0"; - regulator-always-on; - regulator-boot-on; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_ddr_s0: dcdc-reg10 { - regulator-name = "vdd_ddr_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <675000>; - regulator-max-microvolt = <900000>; - regulator-ramp-delay = <12500>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - /* reserved, unused? */ - vcc_1v8_cam_s0: pldo-reg1 { - regulator-name = "vcc_1v8_cam_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-ramp-delay = <12500>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - avdd1v8_ddr_pll_s0: pldo-reg2 { - regulator-name = "avdd1v8_ddr_pll_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-ramp-delay = <12500>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_1v8_pll_s0: pldo-reg3 { - regulator-name = "vdd_1v8_pll_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-ramp-delay = <12500>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - /* reserved, unused? */ - vcc_3v3_sd_s0: pldo-reg4 { - regulator-name = "vcc_3v3_sd_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-ramp-delay = <12500>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - /* reserved, unused? */ - vcc_2v8_cam_s0: pldo-reg5 { - regulator-name = "vcc_2v8_cam_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <2800000>; - regulator-max-microvolt = <2800000>; - regulator-ramp-delay = <12500>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - /* unused */ - pldo6_s3: pldo-reg6 { - regulator-name = "pldo6_s3"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vdd_0v75_pll_s0: nldo-reg1 { - regulator-name = "vdd_0v75_pll_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <750000>; - regulator-max-microvolt = <750000>; - regulator-ramp-delay = <12500>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_ddr_pll_s0: nldo-reg2 { - regulator-name = "vdd_ddr_pll_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <850000>; - regulator-max-microvolt = <850000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - avdd_0v85_s0: nldo-reg3 { - regulator-name = "avdd_0v85_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <850000>; - regulator-max-microvolt = <850000>; - regulator-ramp-delay = <12500>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - /* reserved, unused */ - avdd_1v2_cam_s0: nldo-reg4 { - regulator-name = "avdd_1v2_cam_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1200000>; - regulator-ramp-delay = <12500>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - avdd_1v2_s0: nldo-reg5 { - regulator-name = "avdd_1v2_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1200000>; - regulator-ramp-delay = <12500>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - }; - }; -}; - -&tsadc { - status = "okay"; -}; - -&u2phy2 { - status = "okay"; -}; - -&u2phy2_host { - phy-supply = <&vcc5v0_host>; - status = "okay"; -}; - -&u2phy3 { - status = "okay"; -}; - -&u2phy3_host { - phy-supply = <&vcc5v0_host>; - status = "okay"; -}; - -&uart2 { - pinctrl-names = "default"; - pinctrl-0 = <&uart2m0_xfer>; - status = "okay"; -}; - -&usb_host0_ehci { - status = "okay"; -}; - -&usb_host0_ohci { - status = "okay"; -}; - -&usb_host1_ehci { - status = "okay"; -}; - -&usb_host1_ohci { - status = "okay"; -}; diff --git a/arch/arm/dts/rk3588-rock-5b.dts b/arch/arm/dts/rk3588-rock-5b.dts deleted file mode 100644 index a0e303c3a1d..00000000000 --- a/arch/arm/dts/rk3588-rock-5b.dts +++ /dev/null @@ -1,776 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) - -/dts-v1/; - -#include -#include -#include "rk3588.dtsi" - -/ { - model = "Radxa ROCK 5 Model B"; - compatible = "radxa,rock-5b", "rockchip,rk3588"; - - aliases { - mmc0 = &sdhci; - mmc1 = &sdmmc; - mmc2 = &sdio; - }; - - chosen { - stdout-path = "serial2:1500000n8"; - }; - - analog-sound { - compatible = "audio-graph-card"; - label = "rk3588-es8316"; - - widgets = "Microphone", "Mic Jack", - "Headphone", "Headphones"; - - routing = "MIC2", "Mic Jack", - "Headphones", "HPOL", - "Headphones", "HPOR"; - - dais = <&i2s0_8ch_p0>; - hp-det-gpio = <&gpio1 RK_PD5 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&hp_detect>; - }; - - leds { - compatible = "gpio-leds"; - pinctrl-names = "default"; - pinctrl-0 = <&led_rgb_b>; - - led_rgb_b { - function = LED_FUNCTION_STATUS; - color = ; - gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>; - linux,default-trigger = "heartbeat"; - }; - }; - - fan: pwm-fan { - compatible = "pwm-fan"; - cooling-levels = <0 95 145 195 255>; - fan-supply = <&vcc5v0_sys>; - pwms = <&pwm1 0 50000 0>; - #cooling-cells = <2>; - }; - - vcc3v3_pcie2x1l0: vcc3v3-pcie2x1l0-regulator { - compatible = "regulator-fixed"; - enable-active-high; - gpios = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&pcie2_0_vcc3v3_en>; - regulator-name = "vcc3v3_pcie2x1l0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - startup-delay-us = <50000>; - vin-supply = <&vcc5v0_sys>; - }; - - vcc3v3_pcie2x1l2: vcc3v3-pcie2x1l2-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc3v3_pcie2x1l2"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - startup-delay-us = <5000>; - vin-supply = <&vcc_3v3_s3>; - }; - - vcc3v3_pcie30: vcc3v3-pcie30-regulator { - compatible = "regulator-fixed"; - enable-active-high; - gpios = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&pcie3_vcc3v3_en>; - regulator-name = "vcc3v3_pcie30"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - startup-delay-us = <5000>; - vin-supply = <&vcc5v0_sys>; - }; - - vcc5v0_host: vcc5v0-host-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc5v0_host"; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - enable-active-high; - gpio = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&vcc5v0_host_en>; - vin-supply = <&vcc5v0_sys>; - }; - - vcc5v0_sys: vcc5v0-sys-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc5v0_sys"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - }; - - vcc_1v1_nldo_s3: vcc-1v1-nldo-s3-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc_1v1_nldo_s3"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1100000>; - regulator-max-microvolt = <1100000>; - vin-supply = <&vcc5v0_sys>; - }; -}; - -&combphy0_ps { - status = "okay"; -}; - -&combphy1_ps { - status = "okay"; -}; - -&combphy2_psu { - status = "okay"; -}; - -&cpu_b0 { - cpu-supply = <&vdd_cpu_big0_s0>; -}; - -&cpu_b1 { - cpu-supply = <&vdd_cpu_big0_s0>; -}; - -&cpu_b2 { - cpu-supply = <&vdd_cpu_big1_s0>; -}; - -&cpu_b3 { - cpu-supply = <&vdd_cpu_big1_s0>; -}; - -&cpu_l0 { - cpu-supply = <&vdd_cpu_lit_s0>; -}; - -&cpu_l1 { - cpu-supply = <&vdd_cpu_lit_s0>; -}; - -&cpu_l2 { - cpu-supply = <&vdd_cpu_lit_s0>; -}; - -&cpu_l3 { - cpu-supply = <&vdd_cpu_lit_s0>; -}; - -&i2c0 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c0m2_xfer>; - status = "okay"; - - vdd_cpu_big0_s0: regulator@42 { - compatible = "rockchip,rk8602"; - reg = <0x42>; - fcs,suspend-voltage-selector = <1>; - regulator-name = "vdd_cpu_big0_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <550000>; - regulator-max-microvolt = <1050000>; - regulator-ramp-delay = <2300>; - vin-supply = <&vcc5v0_sys>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_cpu_big1_s0: regulator@43 { - compatible = "rockchip,rk8603", "rockchip,rk8602"; - reg = <0x43>; - fcs,suspend-voltage-selector = <1>; - regulator-name = "vdd_cpu_big1_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <550000>; - regulator-max-microvolt = <1050000>; - regulator-ramp-delay = <2300>; - vin-supply = <&vcc5v0_sys>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; -}; - -&i2c6 { - status = "okay"; - - hym8563: rtc@51 { - compatible = "haoyu,hym8563"; - reg = <0x51>; - #clock-cells = <0>; - clock-output-names = "hym8563"; - pinctrl-names = "default"; - pinctrl-0 = <&hym8563_int>; - interrupt-parent = <&gpio0>; - interrupts = ; - wakeup-source; - }; -}; - -&i2c7 { - status = "okay"; - - es8316: audio-codec@11 { - compatible = "everest,es8316"; - reg = <0x11>; - clocks = <&cru I2S0_8CH_MCLKOUT>; - clock-names = "mclk"; - assigned-clocks = <&cru I2S0_8CH_MCLKOUT>; - assigned-clock-rates = <12288000>; - #sound-dai-cells = <0>; - - port { - es8316_p0_0: endpoint { - remote-endpoint = <&i2s0_8ch_p0_0>; - }; - }; - }; -}; - -&i2s0_8ch { - pinctrl-names = "default"; - pinctrl-0 = <&i2s0_lrck - &i2s0_mclk - &i2s0_sclk - &i2s0_sdi0 - &i2s0_sdo0>; - status = "okay"; - - i2s0_8ch_p0: port { - i2s0_8ch_p0_0: endpoint { - dai-format = "i2s"; - mclk-fs = <256>; - remote-endpoint = <&es8316_p0_0>; - }; - }; -}; - -&pcie2x1l0 { - pinctrl-names = "default"; - pinctrl-0 = <&pcie2_0_rst>; - reset-gpios = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>; - vpcie3v3-supply = <&vcc3v3_pcie2x1l0>; - status = "okay"; -}; - -&pcie2x1l2 { - pinctrl-names = "default"; - pinctrl-0 = <&pcie2_2_rst>; - reset-gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_HIGH>; - vpcie3v3-supply = <&vcc3v3_pcie2x1l2>; - status = "okay"; -}; - -&pcie30phy { - status = "okay"; -}; - -&pcie3x4 { - pinctrl-names = "default"; - pinctrl-0 = <&pcie3_rst>; - reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>; - vpcie3v3-supply = <&vcc3v3_pcie30>; - status = "okay"; -}; - -&pinctrl { - hym8563 { - hym8563_int: hym8563-int { - rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - leds { - led_rgb_b: led-rgb-b { - rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - sound { - hp_detect: hp-detect { - rockchip,pins = <1 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - pcie2 { - pcie2_0_rst: pcie2-0-rst { - rockchip,pins = <4 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - pcie2_0_vcc3v3_en: pcie2-0-vcc-en { - rockchip,pins = <1 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - pcie2_2_rst: pcie2-2-rst { - rockchip,pins = <3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - pcie3 { - pcie3_rst: pcie3-rst { - rockchip,pins = <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - pcie3_vcc3v3_en: pcie3-vcc3v3-en { - rockchip,pins = <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - usb { - vcc5v0_host_en: vcc5v0-host-en { - rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; -}; - -&pwm1 { - status = "okay"; -}; - -&saradc { - vref-supply = <&avcc_1v8_s0>; - status = "okay"; -}; - -&sdhci { - bus-width = <8>; - no-sdio; - no-sd; - non-removable; - mmc-hs400-1_8v; - mmc-hs400-enhanced-strobe; - status = "okay"; -}; - -&sdmmc { - max-frequency = <200000000>; - no-sdio; - no-mmc; - bus-width = <4>; - cap-mmc-highspeed; - cap-sd-highspeed; - cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>; - disable-wp; - sd-uhs-sdr104; - vmmc-supply = <&vcc_3v3_s3>; - vqmmc-supply = <&vccio_sd_s0>; - status = "okay"; -}; - -&sdio { - max-frequency = <200000000>; - no-sd; - no-mmc; - non-removable; - bus-width = <4>; - cap-sdio-irq; - disable-wp; - keep-power-in-suspend; - wakeup-source; - sd-uhs-sdr12; - sd-uhs-sdr25; - sd-uhs-sdr50; - sd-uhs-sdr104; - vmmc-supply = <&vcc3v3_pcie2x1l0>; - vqmmc-supply = <&vcc_1v8_s3>; - pinctrl-names = "default"; - pinctrl-0 = <&sdiom0_pins>; - status = "okay"; -}; - -&uart6 { - pinctrl-names = "default"; - pinctrl-0 = <&uart6m1_xfer &uart6m1_ctsn &uart6m1_rtsn>; - status = "okay"; -}; - -&spi2 { - status = "okay"; - assigned-clocks = <&cru CLK_SPI2>; - assigned-clock-rates = <200000000>; - pinctrl-names = "default"; - pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>; - num-cs = <1>; - - pmic@0 { - compatible = "rockchip,rk806"; - spi-max-frequency = <1000000>; - reg = <0x0>; - - interrupt-parent = <&gpio0>; - interrupts = <7 IRQ_TYPE_LEVEL_LOW>; - - pinctrl-names = "default"; - pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>, - <&rk806_dvs2_null>, <&rk806_dvs3_null>; - - system-power-controller; - - vcc1-supply = <&vcc5v0_sys>; - vcc2-supply = <&vcc5v0_sys>; - vcc3-supply = <&vcc5v0_sys>; - vcc4-supply = <&vcc5v0_sys>; - vcc5-supply = <&vcc5v0_sys>; - vcc6-supply = <&vcc5v0_sys>; - vcc7-supply = <&vcc5v0_sys>; - vcc8-supply = <&vcc5v0_sys>; - vcc9-supply = <&vcc5v0_sys>; - vcc10-supply = <&vcc5v0_sys>; - vcc11-supply = <&vcc_2v0_pldo_s3>; - vcc12-supply = <&vcc5v0_sys>; - vcc13-supply = <&vcc_1v1_nldo_s3>; - vcc14-supply = <&vcc_1v1_nldo_s3>; - vcca-supply = <&vcc5v0_sys>; - - gpio-controller; - #gpio-cells = <2>; - - rk806_dvs1_null: dvs1-null-pins { - pins = "gpio_pwrctrl1"; - function = "pin_fun0"; - }; - - rk806_dvs2_null: dvs2-null-pins { - pins = "gpio_pwrctrl2"; - function = "pin_fun0"; - }; - - rk806_dvs3_null: dvs3-null-pins { - pins = "gpio_pwrctrl3"; - function = "pin_fun0"; - }; - - regulators { - vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 { - regulator-boot-on; - regulator-min-microvolt = <550000>; - regulator-max-microvolt = <950000>; - regulator-ramp-delay = <12500>; - regulator-name = "vdd_gpu_s0"; - regulator-enable-ramp-delay = <400>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <550000>; - regulator-max-microvolt = <950000>; - regulator-ramp-delay = <12500>; - regulator-name = "vdd_cpu_lit_s0"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_log_s0: dcdc-reg3 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <675000>; - regulator-max-microvolt = <750000>; - regulator-ramp-delay = <12500>; - regulator-name = "vdd_log_s0"; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <750000>; - }; - }; - - vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <550000>; - regulator-max-microvolt = <950000>; - regulator-ramp-delay = <12500>; - regulator-name = "vdd_vdenc_s0"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_ddr_s0: dcdc-reg5 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <675000>; - regulator-max-microvolt = <900000>; - regulator-ramp-delay = <12500>; - regulator-name = "vdd_ddr_s0"; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <850000>; - }; - }; - - vdd2_ddr_s3: dcdc-reg6 { - regulator-always-on; - regulator-boot-on; - regulator-name = "vdd2_ddr_s3"; - - regulator-state-mem { - regulator-on-in-suspend; - }; - }; - - vcc_2v0_pldo_s3: dcdc-reg7 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <2000000>; - regulator-max-microvolt = <2000000>; - regulator-ramp-delay = <12500>; - regulator-name = "vdd_2v0_pldo_s3"; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <2000000>; - }; - }; - - vcc_3v3_s3: dcdc-reg8 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-name = "vcc_3v3_s3"; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <3300000>; - }; - }; - - vddq_ddr_s0: dcdc-reg9 { - regulator-always-on; - regulator-boot-on; - regulator-name = "vddq_ddr_s0"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_1v8_s3: dcdc-reg10 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-name = "vcc_1v8_s3"; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - avcc_1v8_s0: pldo-reg1 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-name = "avcc_1v8_s0"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_1v8_s0: pldo-reg2 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-name = "vcc_1v8_s0"; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - avdd_1v2_s0: pldo-reg3 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1200000>; - regulator-name = "avdd_1v2_s0"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_3v3_s0: pldo-reg4 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-ramp-delay = <12500>; - regulator-name = "vcc_3v3_s0"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vccio_sd_s0: pldo-reg5 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - regulator-ramp-delay = <12500>; - regulator-name = "vccio_sd_s0"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - pldo6_s3: pldo-reg6 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-name = "pldo6_s3"; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vdd_0v75_s3: nldo-reg1 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <750000>; - regulator-max-microvolt = <750000>; - regulator-name = "vdd_0v75_s3"; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <750000>; - }; - }; - - vdd_ddr_pll_s0: nldo-reg2 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <850000>; - regulator-max-microvolt = <850000>; - regulator-name = "vdd_ddr_pll_s0"; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <850000>; - }; - }; - - avdd_0v75_s0: nldo-reg3 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <750000>; - regulator-max-microvolt = <750000>; - regulator-name = "avdd_0v75_s0"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_0v85_s0: nldo-reg4 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <850000>; - regulator-max-microvolt = <850000>; - regulator-name = "vdd_0v85_s0"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_0v75_s0: nldo-reg5 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <750000>; - regulator-max-microvolt = <750000>; - regulator-name = "vdd_0v75_s0"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - }; - }; -}; - -&uart2 { - pinctrl-0 = <&uart2m0_xfer>; - status = "okay"; -}; - -&u2phy2 { - status = "okay"; -}; - -&u2phy2_host { - /* connected to USB hub, which is powered by vcc5v0_sys */ - phy-supply = <&vcc5v0_sys>; - status = "okay"; -}; - -&u2phy3 { - status = "okay"; -}; - -&u2phy3_host { - phy-supply = <&vcc5v0_host>; - status = "okay"; -}; - -&usb_host0_ehci { - status = "okay"; -}; - -&usb_host0_ohci { - status = "okay"; -}; - -&usb_host1_ehci { - status = "okay"; -}; - -&usb_host1_ohci { - status = "okay"; -}; - -&usb_host2_xhci { - status = "okay"; -}; diff --git a/arch/arm/dts/rk3588-turing-rk1.dts b/arch/arm/dts/rk3588-turing-rk1.dts deleted file mode 100644 index 7bcad28d73b..00000000000 --- a/arch/arm/dts/rk3588-turing-rk1.dts +++ /dev/null @@ -1,21 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * This device tree covers the common case where the RK1 is used as a - * "compute node" system, where the carrier board is functioning more like a - * generic backplane (with no non-autoenumerable peripherals of its own) than - * like a device that the SoM is meant to enable. - * - * Copyright (c) 2023 Sam Edwards - */ - -/dts-v1/; -#include "rk3588-turing-rk1.dtsi" - -/ { - model = "Turing Machines RK1"; - compatible = "turing,rk1", "rockchip,rk3588"; - - chosen { - stdout-path = "serial9:115200n8"; - }; -}; diff --git a/arch/arm/dts/rk3588-turing-rk1.dtsi b/arch/arm/dts/rk3588-turing-rk1.dtsi deleted file mode 100644 index dc08da518a7..00000000000 --- a/arch/arm/dts/rk3588-turing-rk1.dtsi +++ /dev/null @@ -1,612 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Device tree definitions for the Turing RK1 SoM. - * - * Copyright (c) 2023 Sam Edwards - * - * Based on RK3588-EVB1 devicetree - * Copyright (c) 2021 Rockchip Electronics Co., Ltd. - */ - -/dts-v1/; -#include -#include -#include "rk3588.dtsi" - -/ { - compatible = "turing,rk1", "rockchip,rk3588"; - - aliases { - ethernet0 = &gmac1; - mmc0 = &sdhci; - }; - - fan: pwm-fan { - compatible = "pwm-fan"; - cooling-levels = <0 25 95 145 195 255>; - fan-supply = <&vcc5v0_sys>; - pinctrl-names = "default"; - pinctrl-0 = <&pwm0m2_pins &fan_int>; - interrupt-parent = <&gpio0>; - interrupts = ; - pwms = <&pwm0 0 50000 0>; - #cooling-cells = <2>; - }; - - vcc3v3_pcie30: vcc3v3-pcie30-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc3v3_pcie30"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - enable-active-high; - gpios = <&gpio2 RK_PC5 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&vcc3v3_pcie30_en>; - startup-delay-us = <5000>; - }; - - vcc5v0_sys: vcc5v0-sys-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc5v0_sys"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - }; - - vcc_1v1_nldo_s3: vcc-1v1-nldo-s3-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc_1v1_nldo_s3"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1100000>; - regulator-max-microvolt = <1100000>; - vin-supply = <&vcc5v0_sys>; - }; -}; - -&combphy2_psu { - status = "okay"; -}; - -&cpu_b0 { - cpu-supply = <&vdd_cpu_big0_s0>; -}; - -&cpu_b1 { - cpu-supply = <&vdd_cpu_big0_s0>; -}; - -&cpu_b2 { - cpu-supply = <&vdd_cpu_big1_s0>; -}; - -&cpu_b3 { - cpu-supply = <&vdd_cpu_big1_s0>; -}; - -&cpu_l0 { - cpu-supply = <&vdd_cpu_lit_s0>; -}; - -&cpu_l1 { - cpu-supply = <&vdd_cpu_lit_s0>; -}; - -&cpu_l2 { - cpu-supply = <&vdd_cpu_lit_s0>; -}; - -&cpu_l3 { - cpu-supply = <&vdd_cpu_lit_s0>; -}; - -&gmac1 { - clock_in_out = "output"; - phy-handle = <&rgmii_phy>; - phy-mode = "rgmii-rxid"; - pinctrl-0 = <&gmac1_miim - &gmac1_tx_bus2 - &gmac1_rx_bus2 - &gmac1_rgmii_clk - &gmac1_rgmii_bus>; - pinctrl-names = "default"; - rx_delay = <0x00>; - tx_delay = <0x43>; - status = "okay"; -}; - -&i2c0 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c0m2_xfer>; - status = "okay"; - - vdd_cpu_big0_s0: regulator@42 { - compatible = "rockchip,rk8602"; - reg = <0x42>; - fcs,suspend-voltage-selector = <1>; - regulator-name = "vdd_cpu_big0_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <550000>; - regulator-max-microvolt = <1050000>; - regulator-ramp-delay = <2300>; - vin-supply = <&vcc5v0_sys>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_cpu_big1_s0: regulator@43 { - compatible = "rockchip,rk8603", "rockchip,rk8602"; - reg = <0x43>; - fcs,suspend-voltage-selector = <1>; - regulator-name = "vdd_cpu_big1_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <550000>; - regulator-max-microvolt = <1050000>; - regulator-ramp-delay = <2300>; - vin-supply = <&vcc5v0_sys>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; -}; - -&i2c1 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c1m2_xfer>; - status = "okay"; - - vdd_npu_s0: regulator@42 { - compatible = "rockchip,rk8602"; - reg = <0x42>; - fcs,suspend-voltage-selector = <1>; - regulator-name = "vdd_npu_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <550000>; - regulator-max-microvolt = <950000>; - regulator-ramp-delay = <2300>; - vin-supply = <&vcc5v0_sys>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; -}; - -&i2c6 { - status = "okay"; - - hym8563: rtc@51 { - compatible = "haoyu,hym8563"; - reg = <0x51>; - #clock-cells = <0>; - clock-output-names = "hym8563"; - pinctrl-names = "default"; - pinctrl-0 = <&hym8563_int>; - interrupt-parent = <&gpio0>; - interrupts = ; - wakeup-source; - }; -}; - -&mdio1 { - rgmii_phy: ethernet-phy@1 { - /* RTL8211F */ - compatible = "ethernet-phy-id001c.c916", - "ethernet-phy-ieee802.3-c22"; - reg = <0x1>; - pinctrl-names = "default"; - pinctrl-0 = <&rtl8211f_rst>; - reset-assert-us = <15000>; - reset-deassert-us = <50000>; - reset-gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; - }; -}; - -&pcie2x1l1 { - linux,pci-domain = <1>; - pinctrl-names = "default"; - pinctrl-0 = <&pcie2_reset>; - reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>; - status = "okay"; -}; - -&pcie30phy { - status = "okay"; -}; - -&pcie3x4 { - linux,pci-domain = <0>; - pinctrl-names = "default"; - pinctrl-0 = <&pcie3_reset>; - reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>; - vpcie3v3-supply = <&vcc3v3_pcie30>; - status = "okay"; -}; - -&pinctrl { - fan { - fan_int: fan-int { - rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - hym8563 { - hym8563_int: hym8563-int { - rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - pcie2 { - pcie2_reset: pcie2-reset { - rockchip,pins = <4 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - pcie3 { - pcie3_reset: pcie3-reset { - rockchip,pins = <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - vcc3v3_pcie30_en: pcie3-reg { - rockchip,pins = <2 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - rtl8211f { - rtl8211f_rst: rtl8211f-rst { - rockchip,pins = <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; -}; - -&pwm0 { - status = "okay"; -}; - -&sdhci { - bus-width = <8>; - no-sdio; - no-sd; - non-removable; - mmc-hs400-1_8v; - mmc-hs400-enhanced-strobe; - status = "okay"; -}; - -&spi2 { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>; - num-cs = <1>; - - pmic@0 { - compatible = "rockchip,rk806"; - spi-max-frequency = <1000000>; - reg = <0x0>; - - interrupt-parent = <&gpio0>; - interrupts = <7 IRQ_TYPE_LEVEL_LOW>; - - pinctrl-names = "default"; - pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>, - <&rk806_dvs2_null>, <&rk806_dvs3_null>; - - vcc1-supply = <&vcc5v0_sys>; - vcc2-supply = <&vcc5v0_sys>; - vcc3-supply = <&vcc5v0_sys>; - vcc4-supply = <&vcc5v0_sys>; - vcc5-supply = <&vcc5v0_sys>; - vcc6-supply = <&vcc5v0_sys>; - vcc7-supply = <&vcc5v0_sys>; - vcc8-supply = <&vcc5v0_sys>; - vcc9-supply = <&vcc5v0_sys>; - vcc10-supply = <&vcc5v0_sys>; - vcc11-supply = <&vcc_2v0_pldo_s3>; - vcc12-supply = <&vcc5v0_sys>; - vcc13-supply = <&vcc_1v1_nldo_s3>; - vcc14-supply = <&vcc_1v1_nldo_s3>; - vcca-supply = <&vcc5v0_sys>; - - gpio-controller; - #gpio-cells = <2>; - - rk806_dvs1_null: dvs1-null-pins { - pins = "gpio_pwrctrl2"; - function = "pin_fun0"; - }; - - rk806_dvs2_null: dvs2-null-pins { - pins = "gpio_pwrctrl2"; - function = "pin_fun0"; - }; - - rk806_dvs3_null: dvs3-null-pins { - pins = "gpio_pwrctrl3"; - function = "pin_fun0"; - }; - - regulators { - vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 { - regulator-boot-on; - regulator-min-microvolt = <550000>; - regulator-max-microvolt = <950000>; - regulator-ramp-delay = <12500>; - regulator-name = "vdd_gpu_s0"; - regulator-enable-ramp-delay = <400>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <550000>; - regulator-max-microvolt = <950000>; - regulator-ramp-delay = <12500>; - regulator-name = "vdd_cpu_lit_s0"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_log_s0: dcdc-reg3 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <675000>; - regulator-max-microvolt = <750000>; - regulator-ramp-delay = <12500>; - regulator-name = "vdd_log_s0"; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <750000>; - }; - }; - - vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <550000>; - regulator-max-microvolt = <950000>; - regulator-ramp-delay = <12500>; - regulator-name = "vdd_vdenc_s0"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_ddr_s0: dcdc-reg5 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <675000>; - regulator-max-microvolt = <900000>; - regulator-ramp-delay = <12500>; - regulator-name = "vdd_ddr_s0"; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <850000>; - }; - }; - - vdd2_ddr_s3: dcdc-reg6 { - regulator-always-on; - regulator-boot-on; - regulator-name = "vdd2_ddr_s3"; - - regulator-state-mem { - regulator-on-in-suspend; - }; - }; - - vcc_2v0_pldo_s3: dcdc-reg7 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <2000000>; - regulator-max-microvolt = <2000000>; - regulator-ramp-delay = <12500>; - regulator-name = "vdd_2v0_pldo_s3"; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <2000000>; - }; - }; - - vcc_3v3_s3: dcdc-reg8 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-name = "vcc_3v3_s3"; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <3300000>; - }; - }; - - vddq_ddr_s0: dcdc-reg9 { - regulator-always-on; - regulator-boot-on; - regulator-name = "vddq_ddr_s0"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_1v8_s3: dcdc-reg10 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-name = "vcc_1v8_s3"; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - avcc_1v8_s0: pldo-reg1 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-name = "avcc_1v8_s0"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_1v8_s0: pldo-reg2 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-name = "vcc_1v8_s0"; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - avdd_1v2_s0: pldo-reg3 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1200000>; - regulator-name = "avdd_1v2_s0"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_3v3_s0: pldo-reg4 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-ramp-delay = <12500>; - regulator-name = "vcc_3v3_s0"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vccio_sd_s0: pldo-reg5 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - regulator-ramp-delay = <12500>; - regulator-name = "vccio_sd_s0"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - pldo6_s3: pldo-reg6 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-name = "pldo6_s3"; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vdd_0v75_s3: nldo-reg1 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <750000>; - regulator-max-microvolt = <750000>; - regulator-name = "vdd_0v75_s3"; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <750000>; - }; - }; - - vdd_ddr_pll_s0: nldo-reg2 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <850000>; - regulator-max-microvolt = <850000>; - regulator-name = "vdd_ddr_pll_s0"; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <850000>; - }; - }; - - avdd_0v75_s0: nldo-reg3 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <750000>; - regulator-max-microvolt = <750000>; - regulator-name = "avdd_0v75_s0"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_0v85_s0: nldo-reg4 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <850000>; - regulator-max-microvolt = <850000>; - regulator-name = "vdd_0v85_s0"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_0v75_s0: nldo-reg5 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <750000>; - regulator-max-microvolt = <750000>; - regulator-name = "vdd_0v75_s0"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - }; - }; -}; - -&uart2 { - pinctrl-0 = <&uart2m0_xfer>; - status = "okay"; -}; - -&uart9 { - pinctrl-0 = <&uart9m0_xfer>; - status = "okay"; -}; diff --git a/arch/arm/dts/rk3588.dtsi b/arch/arm/dts/rk3588.dtsi deleted file mode 100644 index 5519c1430cb..00000000000 --- a/arch/arm/dts/rk3588.dtsi +++ /dev/null @@ -1,341 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (c) 2021 Rockchip Electronics Co., Ltd. - */ - -#include "rk3588s.dtsi" -#include "rk3588-pinctrl.dtsi" - -/ { - pcie30_phy_grf: syscon@fd5b8000 { - compatible = "rockchip,rk3588-pcie3-phy-grf", "syscon"; - reg = <0x0 0xfd5b8000 0x0 0x10000>; - }; - - pipe_phy1_grf: syscon@fd5c0000 { - compatible = "rockchip,rk3588-pipe-phy-grf", "syscon"; - reg = <0x0 0xfd5c0000 0x0 0x100>; - }; - - i2s8_8ch: i2s@fddc8000 { - compatible = "rockchip,rk3588-i2s-tdm"; - reg = <0x0 0xfddc8000 0x0 0x1000>; - interrupts = ; - clocks = <&cru MCLK_I2S8_8CH_TX>, <&cru MCLK_I2S8_8CH_TX>, <&cru HCLK_I2S8_8CH>; - clock-names = "mclk_tx", "mclk_rx", "hclk"; - assigned-clocks = <&cru CLK_I2S8_8CH_TX_SRC>; - assigned-clock-parents = <&cru PLL_AUPLL>; - dmas = <&dmac2 22>; - dma-names = "tx"; - power-domains = <&power RK3588_PD_VO0>; - resets = <&cru SRST_M_I2S8_8CH_TX>; - reset-names = "tx-m"; - #sound-dai-cells = <0>; - status = "disabled"; - }; - - i2s6_8ch: i2s@fddf4000 { - compatible = "rockchip,rk3588-i2s-tdm"; - reg = <0x0 0xfddf4000 0x0 0x1000>; - interrupts = ; - clocks = <&cru MCLK_I2S6_8CH_TX>, <&cru MCLK_I2S6_8CH_TX>, <&cru HCLK_I2S6_8CH>; - clock-names = "mclk_tx", "mclk_rx", "hclk"; - assigned-clocks = <&cru CLK_I2S6_8CH_TX_SRC>; - assigned-clock-parents = <&cru PLL_AUPLL>; - dmas = <&dmac2 4>; - dma-names = "tx"; - power-domains = <&power RK3588_PD_VO1>; - resets = <&cru SRST_M_I2S6_8CH_TX>; - reset-names = "tx-m"; - #sound-dai-cells = <0>; - status = "disabled"; - }; - - i2s7_8ch: i2s@fddf8000 { - compatible = "rockchip,rk3588-i2s-tdm"; - reg = <0x0 0xfddf8000 0x0 0x1000>; - interrupts = ; - clocks = <&cru MCLK_I2S7_8CH_RX>, <&cru MCLK_I2S7_8CH_RX>, <&cru HCLK_I2S7_8CH>; - clock-names = "mclk_tx", "mclk_rx", "hclk"; - assigned-clocks = <&cru CLK_I2S7_8CH_RX_SRC>; - assigned-clock-parents = <&cru PLL_AUPLL>; - dmas = <&dmac2 21>; - dma-names = "rx"; - power-domains = <&power RK3588_PD_VO1>; - resets = <&cru SRST_M_I2S7_8CH_RX>; - reset-names = "rx-m"; - #sound-dai-cells = <0>; - status = "disabled"; - }; - - i2s10_8ch: i2s@fde00000 { - compatible = "rockchip,rk3588-i2s-tdm"; - reg = <0x0 0xfde00000 0x0 0x1000>; - interrupts = ; - clocks = <&cru MCLK_I2S10_8CH_RX>, <&cru MCLK_I2S10_8CH_RX>, <&cru HCLK_I2S10_8CH>; - clock-names = "mclk_tx", "mclk_rx", "hclk"; - assigned-clocks = <&cru CLK_I2S10_8CH_RX_SRC>; - assigned-clock-parents = <&cru PLL_AUPLL>; - dmas = <&dmac2 24>; - dma-names = "rx"; - power-domains = <&power RK3588_PD_VO1>; - resets = <&cru SRST_M_I2S10_8CH_RX>; - reset-names = "rx-m"; - #sound-dai-cells = <0>; - status = "disabled"; - }; - - pcie3x4: pcie@fe150000 { - compatible = "rockchip,rk3588-pcie", "rockchip,rk3568-pcie"; - #address-cells = <3>; - #size-cells = <2>; - bus-range = <0x00 0x0f>; - clocks = <&cru ACLK_PCIE_4L_MSTR>, <&cru ACLK_PCIE_4L_SLV>, - <&cru ACLK_PCIE_4L_DBI>, <&cru PCLK_PCIE_4L>, - <&cru CLK_PCIE_AUX0>, <&cru CLK_PCIE4L_PIPE>; - clock-names = "aclk_mst", "aclk_slv", - "aclk_dbi", "pclk", - "aux", "pipe"; - device_type = "pci"; - interrupts = , - , - , - , - ; - interrupt-names = "sys", "pmc", "msg", "legacy", "err"; - #interrupt-cells = <1>; - interrupt-map-mask = <0 0 0 7>; - interrupt-map = <0 0 0 1 &pcie3x4_intc 0>, - <0 0 0 2 &pcie3x4_intc 1>, - <0 0 0 3 &pcie3x4_intc 2>, - <0 0 0 4 &pcie3x4_intc 3>; - linux,pci-domain = <0>; - max-link-speed = <3>; - msi-map = <0x0000 &its1 0x0000 0x1000>; - num-lanes = <4>; - phys = <&pcie30phy>; - phy-names = "pcie-phy"; - power-domains = <&power RK3588_PD_PCIE>; - ranges = <0x01000000 0x0 0xf0100000 0x0 0xf0100000 0x0 0x00100000>, - <0x02000000 0x0 0xf0200000 0x0 0xf0200000 0x0 0x00e00000>, - <0x03000000 0x0 0x40000000 0x9 0x00000000 0x0 0x40000000>; - reg = <0xa 0x40000000 0x0 0x00400000>, - <0x0 0xfe150000 0x0 0x00010000>, - <0x0 0xf0000000 0x0 0x00100000>; - reg-names = "dbi", "apb", "config"; - resets = <&cru SRST_PCIE0_POWER_UP>, <&cru SRST_P_PCIE0>; - reset-names = "pwr", "pipe"; - status = "disabled"; - - pcie3x4_intc: legacy-interrupt-controller { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <1>; - interrupt-parent = <&gic>; - interrupts = ; - }; - }; - - pcie3x2: pcie@fe160000 { - compatible = "rockchip,rk3588-pcie", "rockchip,rk3568-pcie"; - #address-cells = <3>; - #size-cells = <2>; - bus-range = <0x10 0x1f>; - clocks = <&cru ACLK_PCIE_2L_MSTR>, <&cru ACLK_PCIE_2L_SLV>, - <&cru ACLK_PCIE_2L_DBI>, <&cru PCLK_PCIE_2L>, - <&cru CLK_PCIE_AUX1>, <&cru CLK_PCIE2L_PIPE>; - clock-names = "aclk_mst", "aclk_slv", - "aclk_dbi", "pclk", - "aux", "pipe"; - device_type = "pci"; - interrupts = , - , - , - , - ; - interrupt-names = "sys", "pmc", "msg", "legacy", "err"; - #interrupt-cells = <1>; - interrupt-map-mask = <0 0 0 7>; - interrupt-map = <0 0 0 1 &pcie3x2_intc 0>, - <0 0 0 2 &pcie3x2_intc 1>, - <0 0 0 3 &pcie3x2_intc 2>, - <0 0 0 4 &pcie3x2_intc 3>; - linux,pci-domain = <1>; - max-link-speed = <3>; - msi-map = <0x1000 &its1 0x1000 0x1000>; - num-lanes = <2>; - phys = <&pcie30phy>; - phy-names = "pcie-phy"; - power-domains = <&power RK3588_PD_PCIE>; - ranges = <0x01000000 0x0 0xf1100000 0x0 0xf1100000 0x0 0x00100000>, - <0x02000000 0x0 0xf1200000 0x0 0xf1200000 0x0 0x00e00000>, - <0x03000000 0x0 0x40000000 0x9 0x40000000 0x0 0x40000000>; - reg = <0xa 0x40400000 0x0 0x00400000>, - <0x0 0xfe160000 0x0 0x00010000>, - <0x0 0xf1000000 0x0 0x00100000>; - reg-names = "dbi", "apb", "config"; - resets = <&cru SRST_PCIE1_POWER_UP>, <&cru SRST_P_PCIE1>; - reset-names = "pwr", "pipe"; - status = "disabled"; - - pcie3x2_intc: legacy-interrupt-controller { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <1>; - interrupt-parent = <&gic>; - interrupts = ; - }; - }; - - pcie2x1l0: pcie@fe170000 { - compatible = "rockchip,rk3588-pcie", "rockchip,rk3568-pcie"; - bus-range = <0x20 0x2f>; - clocks = <&cru ACLK_PCIE_1L0_MSTR>, <&cru ACLK_PCIE_1L0_SLV>, - <&cru ACLK_PCIE_1L0_DBI>, <&cru PCLK_PCIE_1L0>, - <&cru CLK_PCIE_AUX2>, <&cru CLK_PCIE1L0_PIPE>; - clock-names = "aclk_mst", "aclk_slv", - "aclk_dbi", "pclk", - "aux", "pipe"; - device_type = "pci"; - interrupts = , - , - , - , - ; - interrupt-names = "sys", "pmc", "msg", "legacy", "err"; - #interrupt-cells = <1>; - interrupt-map-mask = <0 0 0 7>; - interrupt-map = <0 0 0 1 &pcie2x1l0_intc 0>, - <0 0 0 2 &pcie2x1l0_intc 1>, - <0 0 0 3 &pcie2x1l0_intc 2>, - <0 0 0 4 &pcie2x1l0_intc 3>; - linux,pci-domain = <2>; - max-link-speed = <2>; - msi-map = <0x2000 &its0 0x2000 0x1000>; - num-lanes = <1>; - phys = <&combphy1_ps PHY_TYPE_PCIE>; - phy-names = "pcie-phy"; - power-domains = <&power RK3588_PD_PCIE>; - ranges = <0x01000000 0x0 0xf2100000 0x0 0xf2100000 0x0 0x00100000>, - <0x02000000 0x0 0xf2200000 0x0 0xf2200000 0x0 0x00e00000>, - <0x03000000 0x0 0x40000000 0x9 0x80000000 0x0 0x40000000>; - reg = <0xa 0x40800000 0x0 0x00400000>, - <0x0 0xfe170000 0x0 0x00010000>, - <0x0 0xf2000000 0x0 0x00100000>; - reg-names = "dbi", "apb", "config"; - resets = <&cru SRST_PCIE2_POWER_UP>, <&cru SRST_P_PCIE2>; - reset-names = "pwr", "pipe"; - #address-cells = <3>; - #size-cells = <2>; - status = "disabled"; - - pcie2x1l0_intc: legacy-interrupt-controller { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <1>; - interrupt-parent = <&gic>; - interrupts = ; - }; - }; - - gmac0: ethernet@fe1b0000 { - compatible = "rockchip,rk3588-gmac", "snps,dwmac-4.20a"; - reg = <0x0 0xfe1b0000 0x0 0x10000>; - interrupts = , - ; - interrupt-names = "macirq", "eth_wake_irq"; - clocks = <&cru CLK_GMAC_125M>, <&cru CLK_GMAC_50M>, - <&cru PCLK_GMAC0>, <&cru ACLK_GMAC0>, - <&cru CLK_GMAC0_PTP_REF>; - clock-names = "stmmaceth", "clk_mac_ref", - "pclk_mac", "aclk_mac", - "ptp_ref"; - power-domains = <&power RK3588_PD_GMAC>; - resets = <&cru SRST_A_GMAC0>; - reset-names = "stmmaceth"; - rockchip,grf = <&sys_grf>; - rockchip,php-grf = <&php_grf>; - snps,axi-config = <&gmac0_stmmac_axi_setup>; - snps,mixed-burst; - snps,mtl-rx-config = <&gmac0_mtl_rx_setup>; - snps,mtl-tx-config = <&gmac0_mtl_tx_setup>; - snps,tso; - status = "disabled"; - - mdio0: mdio { - compatible = "snps,dwmac-mdio"; - #address-cells = <0x1>; - #size-cells = <0x0>; - }; - - gmac0_stmmac_axi_setup: stmmac-axi-config { - snps,blen = <0 0 0 0 16 8 4>; - snps,wr_osr_lmt = <4>; - snps,rd_osr_lmt = <8>; - }; - - gmac0_mtl_rx_setup: rx-queues-config { - snps,rx-queues-to-use = <2>; - queue0 {}; - queue1 {}; - }; - - gmac0_mtl_tx_setup: tx-queues-config { - snps,tx-queues-to-use = <2>; - queue0 {}; - queue1 {}; - }; - }; - - sata1: sata@fe220000 { - compatible = "rockchip,rk3588-dwc-ahci", "snps,dwc-ahci"; - reg = <0 0xfe220000 0 0x1000>; - interrupts = ; - clocks = <&cru ACLK_SATA1>, <&cru CLK_PMALIVE1>, - <&cru CLK_RXOOB1>, <&cru CLK_PIPEPHY1_REF>, - <&cru CLK_PIPEPHY1_PIPE_ASIC_G>; - clock-names = "sata", "pmalive", "rxoob", "ref", "asic"; - ports-implemented = <0x1>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - - sata-port@0 { - reg = <0>; - hba-port-cap = ; - phys = <&combphy1_ps PHY_TYPE_SATA>; - phy-names = "sata-phy"; - snps,rx-ts-max = <32>; - snps,tx-ts-max = <32>; - }; - }; - - combphy1_ps: phy@fee10000 { - compatible = "rockchip,rk3588-naneng-combphy"; - reg = <0x0 0xfee10000 0x0 0x100>; - clocks = <&cru CLK_REF_PIPE_PHY1>, <&cru PCLK_PCIE_COMBO_PIPE_PHY1>, - <&cru PCLK_PHP_ROOT>; - clock-names = "ref", "apb", "pipe"; - assigned-clocks = <&cru CLK_REF_PIPE_PHY1>; - assigned-clock-rates = <100000000>; - #phy-cells = <1>; - resets = <&cru SRST_REF_PIPE_PHY1>, <&cru SRST_P_PCIE2_PHY1>; - reset-names = "phy", "apb"; - rockchip,pipe-grf = <&php_grf>; - rockchip,pipe-phy-grf = <&pipe_phy1_grf>; - status = "disabled"; - }; - - pcie30phy: phy@fee80000 { - compatible = "rockchip,rk3588-pcie3-phy"; - reg = <0x0 0xfee80000 0x0 0x20000>; - #phy-cells = <0>; - clocks = <&cru PCLK_PCIE_COMBO_PIPE_PHY>; - clock-names = "pclk"; - resets = <&cru SRST_PCIE30_PHY>; - reset-names = "phy"; - rockchip,pipe-grf = <&php_grf>; - rockchip,phy-grf = <&pcie30_phy_grf>; - status = "disabled"; - }; -}; diff --git a/arch/arm/dts/rk3588j.dtsi b/arch/arm/dts/rk3588j.dtsi deleted file mode 100644 index 38b9dbf38a2..00000000000 --- a/arch/arm/dts/rk3588j.dtsi +++ /dev/null @@ -1,7 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (c) 2022 Rockchip Electronics Co., Ltd. - * - */ - -#include "rk3588.dtsi" diff --git a/arch/arm/dts/rk3588s-coolpi-4b.dts b/arch/arm/dts/rk3588s-coolpi-4b.dts deleted file mode 100644 index e037bf9db75..00000000000 --- a/arch/arm/dts/rk3588s-coolpi-4b.dts +++ /dev/null @@ -1,812 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (c) 2023 Rockchip Electronics Co., Ltd. - * - * https://cool-pi.com/topic/130/coolpi-4b-product-spec-introduction - * - */ - -/dts-v1/; - -#include -#include -#include -#include "rk3588s.dtsi" - -/ { - model = "RK3588S CoolPi 4 Model B"; - compatible = "coolpi,pi-4b", "rockchip,rk3588s"; - - aliases { - mmc0 = &sdhci; - mmc1 = &sdmmc; - mmc2 = &sdio; - }; - - analog-sound { - compatible = "audio-graph-card"; - dais = <&i2s0_8ch_p0>; - label = "rk3588-es8316"; - routing = "MIC2", "Mic Jack", - "Headphones", "HPOL", - "Headphones", "HPOR"; - widgets = "Microphone", "Mic Jack", - "Headphone", "Headphones"; - }; - - chosen { - stdout-path = "serial2:1500000n8"; - }; - - leds: leds { - compatible = "gpio-leds"; - pinctrl-names = "default"; - pinctrl-0 = <&gpio_leds>; - - led0: led-green { - color = ; - function = LED_FUNCTION_STATUS; - gpios = <&gpio0 RK_PD0 GPIO_ACTIVE_HIGH>; - linux,default-trigger = "heartbeat"; - }; - - led1: led-red { - color = ; - default-state = "off"; - function = LED_FUNCTION_WLAN; - gpios = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>; - linux,default-trigger = "phy0tx"; - }; - }; - - sdio_pwrseq: sdio-pwrseq { - compatible = "mmc-pwrseq-simple"; - clocks = <&hym8563>; - clock-names = "ext_clock"; - pinctrl-names = "default"; - pinctrl-0 = <&wifi_enable_h>; - /* - * On the module itself this is one of these (depending - * on the actual card populated): - * - SDIO_RESET_L_WL_REG_ON - * - PDN (power down when low) - */ - post-power-on-delay-ms = <200>; - reset-gpios = <&gpio0 RK_PC7 GPIO_ACTIVE_LOW>; - }; - - vcc12v_dcin: vcc12v-dcin-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc12v_dcin"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <12000000>; - regulator-max-microvolt = <12000000>; - }; - - vcc5v0_sys: vcc5v0-sys-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc5v0_sys"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - vin-supply = <&vcc12v_dcin>; - }; - - vcc5v0_usbdcin: vcc5v0-usbdcin-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc5v0_usbdcin"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - vin-supply = <&vcc12v_dcin>; - }; - - vcc5v0_usb: vcc5v0-usb-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc5v0_usb"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - vin-supply = <&vcc5v0_usbdcin>; - }; - - avdd0v85_pcie20: avdd0v85-pcie20-regulator { - compatible = "regulator-fixed"; - regulator-name = "avdd0v85_pcie20"; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <850000>; - regulator-max-microvolt = <850000>; - vin-supply = <&vdd_0v85_s0>; - }; - - avdd1v8_pcie20: avdd1v8-pcie20-regulator { - compatible = "regulator-fixed"; - regulator-name = "avdd1v8_pcie20"; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - vin-supply = <&avcc_1v8_s0>; - }; - - vcc3v3_mipi: vcc3v3-mipi-regulator { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <&gpio3 RK_PC2 GPIO_ACTIVE_HIGH>; - regulator-name = "vcc3v3_mipi"; - regulator-boot-on; - regulator-always-on; - vin-supply = <&vcc_3v3_s3>; - }; - - vcc5v0_host: vcc5v0-host-regulator { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <&gpio3 RK_PC0 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&vcc5v0_host_en>; - regulator-name = "vcc5v0_host"; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - vin-supply = <&vcc5v0_sys>; - }; - - vcc5v0_otg: vcc5v0-otg-regulator { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&vcc5v0_u3host_en>; - regulator-name = "vcc5v0_otg"; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - vin-supply = <&vcc5v0_sys>; - }; - - vcc_1v1_nldo_s3: vcc-1v1-nldo-s3-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc_1v1_nldo_s3"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1100000>; - regulator-max-microvolt = <1100000>; - vin-supply = <&vcc5v0_sys>; - }; -}; - -&combphy0_ps { - status = "okay"; -}; - -&combphy2_psu { - status = "okay"; -}; - -&cpu_l0 { - cpu-supply = <&vdd_cpu_lit_s0>; -}; - -&cpu_b0 { - cpu-supply = <&vdd_cpu_big0_s0>; -}; - -&cpu_b2 { - cpu-supply = <&vdd_cpu_big1_s0>; -}; - -&i2c0 { - pinctrl-0 = <&i2c0m2_xfer>; - status = "okay"; - - vdd_cpu_big0_s0: regulator@42 { - compatible = "rockchip,rk8602"; - reg = <0x42>; - fcs,suspend-voltage-selector = <1>; - regulator-name = "vdd_cpu_big0_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <550000>; - regulator-max-microvolt = <1050000>; - regulator-ramp-delay = <2300>; - vin-supply = <&vcc5v0_sys>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_cpu_big1_s0: regulator@43 { - compatible = "rockchip,rk8603", "rockchip,rk8602"; - reg = <0x43>; - fcs,suspend-voltage-selector = <1>; - regulator-name = "vdd_cpu_big1_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <550000>; - regulator-max-microvolt = <1050000>; - regulator-ramp-delay = <2300>; - vin-supply = <&vcc5v0_sys>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; -}; - -&i2c2 { - status = "okay"; - - vdd_npu_s0: regulator@42 { - compatible = "rockchip,rk8602"; - reg = <0x42>; - fcs,suspend-voltage-selector = <1>; - regulator-name = "vdd_npu_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <550000>; - regulator-max-microvolt = <950000>; - regulator-ramp-delay = <2300>; - vin-supply = <&vcc5v0_sys>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; -}; - -&i2c6 { - pinctrl-0 = <&i2c6m3_xfer>; - status = "okay"; - - hym8563: rtc@51 { - compatible = "haoyu,hym8563"; - reg = <0x51>; - interrupt-parent = <&gpio0>; - interrupts = ; - #clock-cells = <0>; - clock-output-names = "hym8563"; - pinctrl-names = "default"; - pinctrl-0 = <&hym8563_int>; - }; -}; - -&i2c7 { - pinctrl-0 = <&i2c7m0_xfer>; - status = "okay"; - - es8316: audio-codec@11 { - compatible = "everest,es8316"; - reg = <0x11>; - assigned-clocks = <&cru I2S0_8CH_MCLKOUT>; - assigned-clock-rates = <12288000>; - clocks = <&cru I2S0_8CH_MCLKOUT>; - clock-names = "mclk"; - #sound-dai-cells = <0>; - - port { - es8316_p0_0: endpoint { - remote-endpoint = <&i2s0_8ch_p0_0>; - }; - }; - }; -}; - -&i2s0_8ch { - pinctrl-0 = <&i2s0_lrck - &i2s0_mclk - &i2s0_sclk - &i2s0_sdi0 - &i2s0_sdo0>; - status = "okay"; - - i2s0_8ch_p0: port { - i2s0_8ch_p0_0: endpoint { - dai-format = "i2s"; - mclk-fs = <256>; - remote-endpoint = <&es8316_p0_0>; - }; - }; -}; - -&pcie2x1l2 { - pinctrl-names = "default"; - pinctrl-0 = <&rtl8111_isolate>; - reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_HIGH>; - status = "okay"; -}; - -&pinctrl { - hym8563 { - hym8563_int: hym8563-int { - rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - led { - gpio_leds: gpio-leds { - rockchip,pins = <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_down>, - <0 RK_PD0 RK_FUNC_GPIO &pcfg_pull_down>; - }; - }; - - rtl8111 { - rtl8111_isolate: rtl8111-isolate { - rockchip,pins = <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - sdio-pwrseq { - wifi_enable_h: wifi-enable-h { - rockchip,pins = <0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - usb { - vcc5v0_host_en: vcc5v0-host-en { - rockchip,pins = <3 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>, - <4 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>; - }; - - vcc5v0_u3host_en: vcc5v0-u3host-en { - rockchip,pins = <3 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - wireless-bluetooth { - bt_reset_gpio: bt-reset-pin { - rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - bt_wake_gpio: bt-wake-pin { - rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - bt_wake_host_irq: bt-wake-host-irq { - rockchip,pins = <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_down>; - }; - }; - - wireless-wlan { - wifi_host_wake_irq: wifi-host-wake-irq { - rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_down>; - }; - - wifi_poweren_pin: wifi-poweren-pin { - rockchip,pins = <1 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; -}; - -&pwm2 { - pinctrl-0 = <&pwm2m1_pins>; - status = "okay"; -}; - -&pwm13 { - pinctrl-names = "active"; - pinctrl-0 = <&pwm13m2_pins>; - status = "okay"; -}; - -&saradc { - vref-supply = <&vcc_1v8_s0>; - status = "okay"; -}; - -&sdhci { - bus-width = <8>; - max-frequency = <200000000>; - mmc-hs400-1_8v; - mmc-hs400-enhanced-strobe; - no-sdio; - no-sd; - non-removable; - status = "okay"; -}; - -&sdio { - bus-width = <4>; - cap-sd-highspeed; - cap-sdio-irq; - disable-wp; - keep-power-in-suspend; - max-frequency = <150000000>; - mmc-pwrseq = <&sdio_pwrseq>; - no-sd; - no-mmc; - non-removable; - pinctrl-names = "default"; - pinctrl-0 = <&sdiom1_pins>,<&wifi_poweren_pin>; - status = "okay"; -}; - -&sdmmc { - bus-width = <4>; - cap-mmc-highspeed; - cap-sd-highspeed; - disable-wp; - max-frequency = <150000000>; - no-sdio; - no-mmc; - sd-uhs-sdr104; - vmmc-supply = <&vcc_3v3_s3>; - vqmmc-supply = <&vccio_sd_s0>; - status = "okay"; -}; - -&spi2 { - assigned-clocks = <&cru CLK_SPI2>; - assigned-clock-rates = <200000000>; - num-cs = <1>; - pinctrl-names = "default"; - pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>; - status = "okay"; - - pmic@0 { - compatible = "rockchip,rk806"; - reg = <0x0>; - interrupt-parent = <&gpio0>; - interrupts = <7 IRQ_TYPE_LEVEL_LOW>; - gpio-controller; - #gpio-cells = <2>; - pinctrl-names = "default"; - pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>, - <&rk806_dvs2_null>, <&rk806_dvs3_null>; - spi-max-frequency = <1000000>; - vcc1-supply = <&vcc5v0_sys>; - vcc2-supply = <&vcc5v0_sys>; - vcc3-supply = <&vcc5v0_sys>; - vcc4-supply = <&vcc5v0_sys>; - vcc5-supply = <&vcc5v0_sys>; - vcc6-supply = <&vcc5v0_sys>; - vcc7-supply = <&vcc5v0_sys>; - vcc8-supply = <&vcc5v0_sys>; - vcc9-supply = <&vcc5v0_sys>; - vcc10-supply = <&vcc5v0_sys>; - vcc11-supply = <&vcc_2v0_pldo_s3>; - vcc12-supply = <&vcc5v0_sys>; - vcc13-supply = <&vcc_1v1_nldo_s3>; - vcc14-supply = <&vcc_1v1_nldo_s3>; - vcca-supply = <&vcc5v0_sys>; - - rk806_dvs1_null: dvs1-null-pins { - pins = "gpio_pwrctrl2"; - function = "pin_fun0"; - }; - - rk806_dvs2_null: dvs2-null-pins { - pins = "gpio_pwrctrl2"; - function = "pin_fun0"; - }; - - rk806_dvs3_null: dvs3-null-pins { - pins = "gpio_pwrctrl3"; - function = "pin_fun0"; - }; - - regulators { - vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 { - regulator-name = "vdd_gpu_s0"; - regulator-boot-on; - regulator-min-microvolt = <550000>; - regulator-max-microvolt = <950000>; - regulator-ramp-delay = <12500>; - regulator-enable-ramp-delay = <400>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 { - regulator-name = "vdd_cpu_lit_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <550000>; - regulator-max-microvolt = <950000>; - regulator-ramp-delay = <12500>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_log_s0: dcdc-reg3 { - regulator-name = "vdd_log_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <675000>; - regulator-max-microvolt = <750000>; - regulator-ramp-delay = <12500>; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <750000>; - }; - }; - - vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 { - regulator-name = "vdd_vdenc_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <550000>; - regulator-max-microvolt = <950000>; - regulator-ramp-delay = <12500>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_ddr_s0: dcdc-reg5 { - regulator-name = "vdd_ddr_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <675000>; - regulator-max-microvolt = <900000>; - regulator-ramp-delay = <12500>; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <850000>; - }; - }; - - vdd2_ddr_s3: dcdc-reg6 { - regulator-name = "vdd2_ddr_s3"; - regulator-always-on; - regulator-boot-on; - - regulator-state-mem { - regulator-on-in-suspend; - }; - }; - - vcc_2v0_pldo_s3: dcdc-reg7 { - regulator-name = "vdd_2v0_pldo_s3"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <2000000>; - regulator-max-microvolt = <2000000>; - regulator-ramp-delay = <12500>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <2000000>; - }; - }; - - vcc_3v3_s3: dcdc-reg8 { - regulator-name = "vcc_3v3_s3"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <3300000>; - }; - }; - - vddq_ddr_s0: dcdc-reg9 { - regulator-name = "vddq_ddr_s0"; - regulator-always-on; - regulator-boot-on; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_1v8_s3: dcdc-reg10 { - regulator-name = "vcc_1v8_s3"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - avcc_1v8_s0: pldo-reg1 { - regulator-name = "avcc_1v8_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_1v8_s0: pldo-reg2 { - regulator-name = "vcc_1v8_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - avdd_1v2_s0: pldo-reg3 { - regulator-name = "avdd_1v2_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1200000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_3v3_s0: pldo-reg4 { - regulator-name = "vcc_3v3_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-ramp-delay = <12500>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vccio_sd_s0: pldo-reg5 { - regulator-name = "vccio_sd_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - regulator-ramp-delay = <12500>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - pldo6_s3: pldo-reg6 { - regulator-name = "pldo6_s3"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vdd_0v75_s3: nldo-reg1 { - regulator-name = "vdd_0v75_s3"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <750000>; - regulator-max-microvolt = <750000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <750000>; - }; - }; - - vdd_ddr_pll_s0: nldo-reg2 { - regulator-name = "vdd_ddr_pll_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <850000>; - regulator-max-microvolt = <850000>; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <850000>; - }; - }; - - avdd_0v75_s0: nldo-reg3 { - regulator-name = "avdd_0v75_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <750000>; - regulator-max-microvolt = <750000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_0v85_s0: nldo-reg4 { - regulator-name = "vdd_0v85_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <850000>; - regulator-max-microvolt = <850000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_0v75_s0: nldo-reg5 { - regulator-name = "vdd_0v75_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <750000>; - regulator-max-microvolt = <750000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - }; - }; -}; - -&tsadc { - status = "okay"; -}; - -&u2phy2 { - status = "okay"; -}; - -&u2phy3 { - status = "okay"; -}; - -&u2phy2_host { - phy-supply = <&vcc5v0_host>; - status = "okay"; -}; - -&u2phy3_host { - status = "okay"; -}; - -&uart2 { - pinctrl-0 = <&uart2m0_xfer>; - status = "okay"; -}; - -/* bt */ -&uart9 { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&uart9m2_xfer &uart9m2_ctsn>; -}; - -&usb_host0_ehci { - status = "okay"; -}; - -&usb_host0_ohci { - status = "okay"; -}; - -&usb_host1_ehci { - status = "okay"; -}; - -&usb_host1_ohci { - status = "okay"; -}; diff --git a/arch/arm/dts/rk3588s-orangepi-5.dts b/arch/arm/dts/rk3588s-orangepi-5.dts deleted file mode 100644 index 25de4362af3..00000000000 --- a/arch/arm/dts/rk3588s-orangepi-5.dts +++ /dev/null @@ -1,667 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) - -/dts-v1/; - -#include -#include -#include -#include -#include "rk3588s.dtsi" - -/ { - model = "Xunlong Orange Pi 5"; - compatible = "xunlong,orangepi-5", "rockchip,rk3588s"; - - aliases { - ethernet0 = &gmac1; - mmc0 = &sdmmc; - }; - - chosen { - stdout-path = "serial2:1500000n8"; - }; - - adc-keys { - compatible = "adc-keys"; - io-channels = <&saradc 1>; - io-channel-names = "buttons"; - keyup-threshold-microvolt = <1800000>; - poll-interval = <100>; - - button-recovery { - label = "Recovery"; - linux,code = ; - press-threshold-microvolt = <1800>; - }; - }; - - leds { - compatible = "gpio-leds"; - pinctrl-names = "default"; - pinctrl-0 = <&leds_gpio>; - - led-1 { - gpios = <&gpio1 RK_PA2 GPIO_ACTIVE_HIGH>; - label = "status_led"; - linux,default-trigger = "heartbeat"; - }; - }; - - vbus_typec: vbus-typec-regulator { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <&gpio3 RK_PC0 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&typec5v_pwren>; - regulator-name = "vbus_typec"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - vin-supply = <&vcc5v0_sys>; - }; - - vcc5v0_sys: vcc5v0-sys-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc5v0_sys"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - }; - - vcc_3v3_sd_s0: vcc-3v3-sd-s0-regulator { - compatible = "regulator-fixed"; - enable-active-low; - gpios = <&gpio4 RK_PB5 GPIO_ACTIVE_LOW>; - regulator-name = "vcc_3v3_sd_s0"; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <&vcc_3v3_s3>; - }; - - vcc3v3_pcie20: vcc3v3-pcie20-regulator { - compatible = "regulator-fixed"; - enable-active-high; - gpios = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>; - regulator-name = "vcc3v3_pcie20"; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - startup-delay-us = <50000>; - vin-supply = <&vcc5v0_sys>; - }; -}; - -&combphy0_ps { - status = "okay"; -}; - -&combphy2_psu { - status = "okay"; -}; - -&cpu_b0 { - cpu-supply = <&vdd_cpu_big0_s0>; -}; - -&cpu_b1 { - cpu-supply = <&vdd_cpu_big0_s0>; -}; - -&cpu_b2 { - cpu-supply = <&vdd_cpu_big1_s0>; -}; - -&cpu_b3 { - cpu-supply = <&vdd_cpu_big1_s0>; -}; - -&cpu_l0 { - cpu-supply = <&vdd_cpu_lit_s0>; -}; - -&cpu_l1 { - cpu-supply = <&vdd_cpu_lit_s0>; -}; - -&cpu_l2 { - cpu-supply = <&vdd_cpu_lit_s0>; -}; - -&cpu_l3 { - cpu-supply = <&vdd_cpu_lit_s0>; -}; - -&gmac1 { - clock_in_out = "output"; - phy-handle = <&rgmii_phy1>; - phy-mode = "rgmii-rxid"; - pinctrl-0 = <&gmac1_miim - &gmac1_tx_bus2 - &gmac1_rx_bus2 - &gmac1_rgmii_clk - &gmac1_rgmii_bus>; - pinctrl-names = "default"; - tx_delay = <0x42>; - status = "okay"; -}; - -&i2c0 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c0m2_xfer>; - status = "okay"; - - vdd_cpu_big0_s0: regulator@42 { - compatible = "rockchip,rk8602"; - reg = <0x42>; - fcs,suspend-voltage-selector = <1>; - regulator-name = "vdd_cpu_big0_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <550000>; - regulator-max-microvolt = <1050000>; - regulator-ramp-delay = <2300>; - vin-supply = <&vcc5v0_sys>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_cpu_big1_s0: regulator@43 { - compatible = "rockchip,rk8603", "rockchip,rk8602"; - reg = <0x43>; - fcs,suspend-voltage-selector = <1>; - regulator-name = "vdd_cpu_big1_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <550000>; - regulator-max-microvolt = <1050000>; - regulator-ramp-delay = <2300>; - vin-supply = <&vcc5v0_sys>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; -}; - -&i2c2 { - status = "okay"; - - vdd_npu_s0: regulator@42 { - compatible = "rockchip,rk8602"; - reg = <0x42>; - fcs,suspend-voltage-selector = <1>; - regulator-name = "vdd_npu_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <550000>; - regulator-max-microvolt = <950000>; - regulator-ramp-delay = <2300>; - vin-supply = <&vcc5v0_sys>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; -}; - -&i2c6 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c6m3_xfer>; - status = "okay"; - - hym8563: rtc@51 { - compatible = "haoyu,hym8563"; - reg = <0x51>; - #clock-cells = <0>; - clock-output-names = "hym8563"; - pinctrl-names = "default"; - pinctrl-0 = <&hym8563_int>; - interrupt-parent = <&gpio0>; - interrupts = ; - wakeup-source; - }; -}; - -&mdio1 { - rgmii_phy1: ethernet-phy@1 { - compatible = "ethernet-phy-ieee802.3-c22"; - reg = <0x1>; - reset-assert-us = <20000>; - reset-deassert-us = <100000>; - reset-gpios = <&gpio3 RK_PB2 GPIO_ACTIVE_LOW>; - }; -}; - -&pcie2x1l2 { - reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_HIGH>; - vpcie3v3-supply = <&vcc3v3_pcie20>; - status = "okay"; -}; - -&pinctrl { - gpio-func { - leds_gpio: leds-gpio { - rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - hym8563 { - hym8563_int: hym8563-int { - rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - usb-typec { - usbc0_int: usbc0-int { - rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>; - }; - - typec5v_pwren: typec5v-pwren { - rockchip,pins = <3 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; -}; - -&saradc { - vref-supply = <&avcc_1v8_s0>; - status = "okay"; -}; - -&sdmmc { - bus-width = <4>; - cap-sd-highspeed; - disable-wp; - max-frequency = <150000000>; - no-mmc; - no-sdio; - sd-uhs-sdr104; - vmmc-supply = <&vcc_3v3_sd_s0>; - vqmmc-supply = <&vccio_sd_s0>; - status = "okay"; -}; - -&sfc { - pinctrl-names = "default"; - pinctrl-0 = <&fspim0_pins>; - status = "okay"; - - flash@0 { - compatible = "jedec,spi-nor"; - reg = <0x0>; - spi-max-frequency = <100000000>; - spi-rx-bus-width = <4>; - spi-tx-bus-width = <1>; - }; -}; - -&spi2 { - status = "okay"; - assigned-clocks = <&cru CLK_SPI2>; - assigned-clock-rates = <200000000>; - num-cs = <1>; - pinctrl-names = "default"; - pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>; - - pmic@0 { - compatible = "rockchip,rk806"; - reg = <0x0>; - interrupt-parent = <&gpio0>; - interrupts = <7 IRQ_TYPE_LEVEL_LOW>; - pinctrl-names = "default"; - pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>, - <&rk806_dvs2_null>, <&rk806_dvs3_null>; - spi-max-frequency = <1000000>; - system-power-controller; - - vcc1-supply = <&vcc5v0_sys>; - vcc2-supply = <&vcc5v0_sys>; - vcc3-supply = <&vcc5v0_sys>; - vcc4-supply = <&vcc5v0_sys>; - vcc5-supply = <&vcc5v0_sys>; - vcc6-supply = <&vcc5v0_sys>; - vcc7-supply = <&vcc5v0_sys>; - vcc8-supply = <&vcc5v0_sys>; - vcc9-supply = <&vcc5v0_sys>; - vcc10-supply = <&vcc5v0_sys>; - vcc11-supply = <&vcc_2v0_pldo_s3>; - vcc12-supply = <&vcc5v0_sys>; - vcc13-supply = <&vcc_1v1_nldo_s3>; - vcc14-supply = <&vcc_1v1_nldo_s3>; - vcca-supply = <&vcc5v0_sys>; - - gpio-controller; - #gpio-cells = <2>; - - rk806_dvs1_null: dvs1-null-pins { - pins = "gpio_pwrctrl2"; - function = "pin_fun0"; - }; - - rk806_dvs2_null: dvs2-null-pins { - pins = "gpio_pwrctrl2"; - function = "pin_fun0"; - }; - - rk806_dvs3_null: dvs3-null-pins { - pins = "gpio_pwrctrl3"; - function = "pin_fun0"; - }; - - regulators { - vdd_gpu_s0: dcdc-reg1 { - regulator-name = "vdd_gpu_s0"; - regulator-boot-on; - regulator-min-microvolt = <550000>; - regulator-max-microvolt = <950000>; - regulator-ramp-delay = <12500>; - regulator-enable-ramp-delay = <400>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_cpu_lit_s0: dcdc-reg2 { - regulator-name = "vdd_cpu_lit_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <550000>; - regulator-max-microvolt = <950000>; - regulator-ramp-delay = <12500>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_log_s0: dcdc-reg3 { - regulator-name = "vdd_log_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <675000>; - regulator-max-microvolt = <750000>; - regulator-ramp-delay = <12500>; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <750000>; - }; - }; - - vdd_vdenc_s0: dcdc-reg4 { - regulator-name = "vdd_vdenc_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <550000>; - regulator-max-microvolt = <950000>; - regulator-ramp-delay = <12500>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_ddr_s0: dcdc-reg5 { - regulator-name = "vdd_ddr_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <675000>; - regulator-max-microvolt = <900000>; - regulator-ramp-delay = <12500>; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <850000>; - }; - }; - - vcc_1v1_nldo_s3: vdd2_ddr_s3: dcdc-reg6 { - regulator-name = "vdd2_ddr_s3"; - regulator-always-on; - regulator-boot-on; - regulator-max-microvolt = <1100000>; - regulator-min-microvolt = <1100000>; - - regulator-state-mem { - regulator-on-in-suspend; - }; - }; - - vcc_2v0_pldo_s3: dcdc-reg7 { - regulator-name = "vdd_2v0_pldo_s3"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <2000000>; - regulator-max-microvolt = <2000000>; - regulator-ramp-delay = <12500>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <2000000>; - }; - }; - - vcc_3v3_s3: dcdc-reg8 { - regulator-name = "vcc_3v3_s3"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <3300000>; - }; - }; - - vddq_ddr_s0: dcdc-reg9 { - regulator-name = "vddq_ddr_s0"; - regulator-always-on; - regulator-boot-on; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_1v8_s3: dcdc-reg10 { - regulator-name = "vcc_1v8_s3"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - avcc_1v8_s0: pldo-reg1 { - regulator-name = "avcc_1v8_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_1v8_s0: pldo-reg2 { - regulator-name = "vcc_1v8_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - avdd_1v2_s0: pldo-reg3 { - regulator-name = "avdd_1v2_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1200000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_3v3_s0: pldo-reg4 { - regulator-name = "vcc_3v3_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-ramp-delay = <12500>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vccio_sd_s0: pldo-reg5 { - regulator-name = "vccio_sd_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - regulator-ramp-delay = <12500>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - pldo6_s3: pldo-reg6 { - regulator-name = "pldo6_s3"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vdd_0v75_s3: nldo-reg1 { - regulator-name = "vdd_0v75_s3"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <750000>; - regulator-max-microvolt = <750000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <750000>; - }; - }; - - vdd_ddr_pll_s0: nldo-reg2 { - regulator-name = "vdd_ddr_pll_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <850000>; - regulator-max-microvolt = <850000>; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <850000>; - }; - }; - - avdd_0v75_s0: nldo-reg3 { - regulator-name = "avdd_0v75_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <750000>; - regulator-max-microvolt = <750000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_0v85_s0: nldo-reg4 { - regulator-name = "vdd_0v85_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <850000>; - regulator-max-microvolt = <850000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_0v75_s0: nldo-reg5 { - regulator-name = "vdd_0v75_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <750000>; - regulator-max-microvolt = <750000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - }; - }; -}; - -&tsadc { - status = "okay"; -}; - -&u2phy2 { - status = "okay"; -}; - -&u2phy2_host { - status = "okay"; -}; - -&u2phy3 { - status = "okay"; -}; - -&u2phy3_host { - status = "okay"; -}; - -&uart2 { - pinctrl-0 = <&uart2m0_xfer>; - status = "okay"; -}; - -&usb_host0_ehci { - status = "okay"; -}; - -&usb_host0_ohci { - status = "okay"; -}; - -&usb_host1_ehci { - status = "okay"; -}; - -&usb_host1_ohci { - status = "okay"; -}; - -&usb_host2_xhci { - status = "okay"; -}; diff --git a/arch/arm/dts/rk3588s-pinctrl.dtsi b/arch/arm/dts/rk3588s-pinctrl.dtsi deleted file mode 100644 index 30db12c4fc8..00000000000 --- a/arch/arm/dts/rk3588s-pinctrl.dtsi +++ /dev/null @@ -1,3447 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (c) 2021 Rockchip Electronics Co., Ltd. - */ - -#include -#include "rockchip-pinconf.dtsi" - -/* - * This file is auto generated by pin2dts tool, please keep these code - * by adding changes at end of this file. - */ -&pinctrl { - auddsm { - /omit-if-no-ref/ - auddsm_pins: auddsm-pins { - rockchip,pins = - /* auddsm_ln */ - <3 RK_PA1 4 &pcfg_pull_none>, - /* auddsm_lp */ - <3 RK_PA2 4 &pcfg_pull_none>, - /* auddsm_rn */ - <3 RK_PA3 4 &pcfg_pull_none>, - /* auddsm_rp */ - <3 RK_PA4 4 &pcfg_pull_none>; - }; - }; - - bt1120 { - /omit-if-no-ref/ - bt1120_pins: bt1120-pins { - rockchip,pins = - /* bt1120_clkout */ - <4 RK_PB0 2 &pcfg_pull_none>, - /* bt1120_d0 */ - <4 RK_PA0 2 &pcfg_pull_none>, - /* bt1120_d1 */ - <4 RK_PA1 2 &pcfg_pull_none>, - /* bt1120_d2 */ - <4 RK_PA2 2 &pcfg_pull_none>, - /* bt1120_d3 */ - <4 RK_PA3 2 &pcfg_pull_none>, - /* bt1120_d4 */ - <4 RK_PA4 2 &pcfg_pull_none>, - /* bt1120_d5 */ - <4 RK_PA5 2 &pcfg_pull_none>, - /* bt1120_d6 */ - <4 RK_PA6 2 &pcfg_pull_none>, - /* bt1120_d7 */ - <4 RK_PA7 2 &pcfg_pull_none>, - /* bt1120_d8 */ - <4 RK_PB2 2 &pcfg_pull_none>, - /* bt1120_d9 */ - <4 RK_PB3 2 &pcfg_pull_none>, - /* bt1120_d10 */ - <4 RK_PB4 2 &pcfg_pull_none>, - /* bt1120_d11 */ - <4 RK_PB5 2 &pcfg_pull_none>, - /* bt1120_d12 */ - <4 RK_PB6 2 &pcfg_pull_none>, - /* bt1120_d13 */ - <4 RK_PB7 2 &pcfg_pull_none>, - /* bt1120_d14 */ - <4 RK_PC0 2 &pcfg_pull_none>, - /* bt1120_d15 */ - <4 RK_PC1 2 &pcfg_pull_none>; - }; - }; - - can0 { - /omit-if-no-ref/ - can0m0_pins: can0m0-pins { - rockchip,pins = - /* can0_rx_m0 */ - <0 RK_PC0 11 &pcfg_pull_none>, - /* can0_tx_m0 */ - <0 RK_PB7 11 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - can0m1_pins: can0m1-pins { - rockchip,pins = - /* can0_rx_m1 */ - <4 RK_PD5 9 &pcfg_pull_none>, - /* can0_tx_m1 */ - <4 RK_PD4 9 &pcfg_pull_none>; - }; - }; - - can1 { - /omit-if-no-ref/ - can1m0_pins: can1m0-pins { - rockchip,pins = - /* can1_rx_m0 */ - <3 RK_PB5 9 &pcfg_pull_none>, - /* can1_tx_m0 */ - <3 RK_PB6 9 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - can1m1_pins: can1m1-pins { - rockchip,pins = - /* can1_rx_m1 */ - <4 RK_PB2 12 &pcfg_pull_none>, - /* can1_tx_m1 */ - <4 RK_PB3 12 &pcfg_pull_none>; - }; - }; - - can2 { - /omit-if-no-ref/ - can2m0_pins: can2m0-pins { - rockchip,pins = - /* can2_rx_m0 */ - <3 RK_PC4 9 &pcfg_pull_none>, - /* can2_tx_m0 */ - <3 RK_PC5 9 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - can2m1_pins: can2m1-pins { - rockchip,pins = - /* can2_rx_m1 */ - <0 RK_PD4 10 &pcfg_pull_none>, - /* can2_tx_m1 */ - <0 RK_PD5 10 &pcfg_pull_none>; - }; - }; - - cif { - /omit-if-no-ref/ - cif_clk: cif-clk { - rockchip,pins = - /* cif_clkout */ - <4 RK_PB4 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - cif_dvp_clk: cif-dvp-clk { - rockchip,pins = - /* cif_clkin */ - <4 RK_PB0 1 &pcfg_pull_none>, - /* cif_href */ - <4 RK_PB2 1 &pcfg_pull_none>, - /* cif_vsync */ - <4 RK_PB3 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - cif_dvp_bus16: cif-dvp-bus16 { - rockchip,pins = - /* cif_d8 */ - <3 RK_PC4 1 &pcfg_pull_none>, - /* cif_d9 */ - <3 RK_PC5 1 &pcfg_pull_none>, - /* cif_d10 */ - <3 RK_PC6 1 &pcfg_pull_none>, - /* cif_d11 */ - <3 RK_PC7 1 &pcfg_pull_none>, - /* cif_d12 */ - <3 RK_PD0 1 &pcfg_pull_none>, - /* cif_d13 */ - <3 RK_PD1 1 &pcfg_pull_none>, - /* cif_d14 */ - <3 RK_PD2 1 &pcfg_pull_none>, - /* cif_d15 */ - <3 RK_PD3 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - cif_dvp_bus8: cif-dvp-bus8 { - rockchip,pins = - /* cif_d0 */ - <4 RK_PA0 1 &pcfg_pull_none>, - /* cif_d1 */ - <4 RK_PA1 1 &pcfg_pull_none>, - /* cif_d2 */ - <4 RK_PA2 1 &pcfg_pull_none>, - /* cif_d3 */ - <4 RK_PA3 1 &pcfg_pull_none>, - /* cif_d4 */ - <4 RK_PA4 1 &pcfg_pull_none>, - /* cif_d5 */ - <4 RK_PA5 1 &pcfg_pull_none>, - /* cif_d6 */ - <4 RK_PA6 1 &pcfg_pull_none>, - /* cif_d7 */ - <4 RK_PA7 1 &pcfg_pull_none>; - }; - }; - - clk32k { - /omit-if-no-ref/ - clk32k_in: clk32k-in { - rockchip,pins = - /* clk32k_in */ - <0 RK_PB2 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - clk32k_out0: clk32k-out0 { - rockchip,pins = - /* clk32k_out0 */ - <0 RK_PB2 2 &pcfg_pull_none>; - }; - }; - - cpu { - /omit-if-no-ref/ - cpu_pins: cpu-pins { - rockchip,pins = - /* cpu_big0_avs */ - <0 RK_PD1 2 &pcfg_pull_none>, - /* cpu_big1_avs */ - <0 RK_PD5 2 &pcfg_pull_none>; - }; - }; - - ddrphych0 { - /omit-if-no-ref/ - ddrphych0_pins: ddrphych0-pins { - rockchip,pins = - /* ddrphych0_dtb0 */ - <4 RK_PA0 7 &pcfg_pull_none>, - /* ddrphych0_dtb1 */ - <4 RK_PA1 7 &pcfg_pull_none>, - /* ddrphych0_dtb2 */ - <4 RK_PA2 7 &pcfg_pull_none>, - /* ddrphych0_dtb3 */ - <4 RK_PA3 7 &pcfg_pull_none>; - }; - }; - - ddrphych1 { - /omit-if-no-ref/ - ddrphych1_pins: ddrphych1-pins { - rockchip,pins = - /* ddrphych1_dtb0 */ - <4 RK_PA4 7 &pcfg_pull_none>, - /* ddrphych1_dtb1 */ - <4 RK_PA5 7 &pcfg_pull_none>, - /* ddrphych1_dtb2 */ - <4 RK_PA6 7 &pcfg_pull_none>, - /* ddrphych1_dtb3 */ - <4 RK_PA7 7 &pcfg_pull_none>; - }; - }; - - ddrphych2 { - /omit-if-no-ref/ - ddrphych2_pins: ddrphych2-pins { - rockchip,pins = - /* ddrphych2_dtb0 */ - <4 RK_PB0 7 &pcfg_pull_none>, - /* ddrphych2_dtb1 */ - <4 RK_PB1 7 &pcfg_pull_none>, - /* ddrphych2_dtb2 */ - <4 RK_PB2 7 &pcfg_pull_none>, - /* ddrphych2_dtb3 */ - <4 RK_PB3 7 &pcfg_pull_none>; - }; - }; - - ddrphych3 { - /omit-if-no-ref/ - ddrphych3_pins: ddrphych3-pins { - rockchip,pins = - /* ddrphych3_dtb0 */ - <4 RK_PB4 7 &pcfg_pull_none>, - /* ddrphych3_dtb1 */ - <4 RK_PB5 7 &pcfg_pull_none>, - /* ddrphych3_dtb2 */ - <4 RK_PB6 7 &pcfg_pull_none>, - /* ddrphych3_dtb3 */ - <4 RK_PB7 7 &pcfg_pull_none>; - }; - }; - - dp0 { - /omit-if-no-ref/ - dp0m0_pins: dp0m0-pins { - rockchip,pins = - /* dp0_hpdin_m0 */ - <4 RK_PB4 5 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - dp0m1_pins: dp0m1-pins { - rockchip,pins = - /* dp0_hpdin_m1 */ - <0 RK_PC4 10 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - dp0m2_pins: dp0m2-pins { - rockchip,pins = - /* dp0_hpdin_m2 */ - <1 RK_PA0 5 &pcfg_pull_none>; - }; - }; - - dp1 { - /omit-if-no-ref/ - dp1m0_pins: dp1m0-pins { - rockchip,pins = - /* dp1_hpdin_m0 */ - <3 RK_PD5 5 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - dp1m1_pins: dp1m1-pins { - rockchip,pins = - /* dp1_hpdin_m1 */ - <0 RK_PC5 10 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - dp1m2_pins: dp1m2-pins { - rockchip,pins = - /* dp1_hpdin_m2 */ - <1 RK_PA1 5 &pcfg_pull_none>; - }; - }; - - emmc { - /omit-if-no-ref/ - emmc_rstnout: emmc-rstnout { - rockchip,pins = - /* emmc_rstn */ - <2 RK_PA3 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - emmc_bus8: emmc-bus8 { - rockchip,pins = - /* emmc_d0 */ - <2 RK_PD0 1 &pcfg_pull_up_drv_level_2>, - /* emmc_d1 */ - <2 RK_PD1 1 &pcfg_pull_up_drv_level_2>, - /* emmc_d2 */ - <2 RK_PD2 1 &pcfg_pull_up_drv_level_2>, - /* emmc_d3 */ - <2 RK_PD3 1 &pcfg_pull_up_drv_level_2>, - /* emmc_d4 */ - <2 RK_PD4 1 &pcfg_pull_up_drv_level_2>, - /* emmc_d5 */ - <2 RK_PD5 1 &pcfg_pull_up_drv_level_2>, - /* emmc_d6 */ - <2 RK_PD6 1 &pcfg_pull_up_drv_level_2>, - /* emmc_d7 */ - <2 RK_PD7 1 &pcfg_pull_up_drv_level_2>; - }; - - /omit-if-no-ref/ - emmc_clk: emmc-clk { - rockchip,pins = - /* emmc_clkout */ - <2 RK_PA1 1 &pcfg_pull_up_drv_level_2>; - }; - - /omit-if-no-ref/ - emmc_cmd: emmc-cmd { - rockchip,pins = - /* emmc_cmd */ - <2 RK_PA0 1 &pcfg_pull_up_drv_level_2>; - }; - - /omit-if-no-ref/ - emmc_data_strobe: emmc-data-strobe { - rockchip,pins = - /* emmc_data_strobe */ - <2 RK_PA2 1 &pcfg_pull_down>; - }; - }; - - eth1 { - /omit-if-no-ref/ - eth1_pins: eth1-pins { - rockchip,pins = - /* eth1_refclko_25m */ - <3 RK_PA6 1 &pcfg_pull_none>; - }; - }; - - fspi { - /omit-if-no-ref/ - fspim0_pins: fspim0-pins { - rockchip,pins = - /* fspi_clk_m0 */ - <2 RK_PA0 2 &pcfg_pull_up_drv_level_2>, - /* fspi_cs0n_m0 */ - <2 RK_PD6 2 &pcfg_pull_up_drv_level_2>, - /* fspi_d0_m0 */ - <2 RK_PD0 2 &pcfg_pull_up_drv_level_2>, - /* fspi_d1_m0 */ - <2 RK_PD1 2 &pcfg_pull_up_drv_level_2>, - /* fspi_d2_m0 */ - <2 RK_PD2 2 &pcfg_pull_up_drv_level_2>, - /* fspi_d3_m0 */ - <2 RK_PD3 2 &pcfg_pull_up_drv_level_2>; - }; - - /omit-if-no-ref/ - fspim0_cs1: fspim0-cs1 { - rockchip,pins = - /* fspi_cs1n_m0 */ - <2 RK_PD7 2 &pcfg_pull_up_drv_level_2>; - }; - - /omit-if-no-ref/ - fspim2_pins: fspim2-pins { - rockchip,pins = - /* fspi_clk_m2 */ - <3 RK_PA5 5 &pcfg_pull_up_drv_level_2>, - /* fspi_cs0n_m2 */ - <3 RK_PC4 2 &pcfg_pull_up_drv_level_2>, - /* fspi_d0_m2 */ - <3 RK_PA0 5 &pcfg_pull_up_drv_level_2>, - /* fspi_d1_m2 */ - <3 RK_PA1 5 &pcfg_pull_up_drv_level_2>, - /* fspi_d2_m2 */ - <3 RK_PA2 5 &pcfg_pull_up_drv_level_2>, - /* fspi_d3_m2 */ - <3 RK_PA3 5 &pcfg_pull_up_drv_level_2>; - }; - - /omit-if-no-ref/ - fspim2_cs1: fspim2-cs1 { - rockchip,pins = - /* fspi_cs1n_m2 */ - <3 RK_PC5 2 &pcfg_pull_up_drv_level_2>; - }; - }; - - gmac1 { - /omit-if-no-ref/ - gmac1_miim: gmac1-miim { - rockchip,pins = - /* gmac1_mdc */ - <3 RK_PC2 1 &pcfg_pull_none>, - /* gmac1_mdio */ - <3 RK_PC3 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - gmac1_clkinout: gmac1-clkinout { - rockchip,pins = - /* gmac1_mclkinout */ - <3 RK_PB6 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - gmac1_rx_bus2: gmac1-rx-bus2 { - rockchip,pins = - /* gmac1_rxd0 */ - <3 RK_PA7 1 &pcfg_pull_none>, - /* gmac1_rxd1 */ - <3 RK_PB0 1 &pcfg_pull_none>, - /* gmac1_rxdv_crs */ - <3 RK_PB1 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - gmac1_tx_bus2: gmac1-tx-bus2 { - rockchip,pins = - /* gmac1_txd0 */ - <3 RK_PB3 1 &pcfg_pull_none>, - /* gmac1_txd1 */ - <3 RK_PB4 1 &pcfg_pull_none>, - /* gmac1_txen */ - <3 RK_PB5 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - gmac1_rgmii_clk: gmac1-rgmii-clk { - rockchip,pins = - /* gmac1_rxclk */ - <3 RK_PA5 1 &pcfg_pull_none>, - /* gmac1_txclk */ - <3 RK_PA4 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - gmac1_rgmii_bus: gmac1-rgmii-bus { - rockchip,pins = - /* gmac1_rxd2 */ - <3 RK_PA2 1 &pcfg_pull_none>, - /* gmac1_rxd3 */ - <3 RK_PA3 1 &pcfg_pull_none>, - /* gmac1_txd2 */ - <3 RK_PA0 1 &pcfg_pull_none>, - /* gmac1_txd3 */ - <3 RK_PA1 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - gmac1_ppsclk: gmac1-ppsclk { - rockchip,pins = - /* gmac1_ppsclk */ - <3 RK_PC1 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - gmac1_ppstrig: gmac1-ppstrig { - rockchip,pins = - /* gmac1_ppstrig */ - <3 RK_PC0 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - gmac1_ptp_ref_clk: gmac1-ptp-ref-clk { - rockchip,pins = - /* gmac1_ptp_ref_clk */ - <3 RK_PB7 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - gmac1_txer: gmac1-txer { - rockchip,pins = - /* gmac1_txer */ - <3 RK_PB2 1 &pcfg_pull_none>; - }; - }; - - gpu { - /omit-if-no-ref/ - gpu_pins: gpu-pins { - rockchip,pins = - /* gpu_avs */ - <0 RK_PC5 2 &pcfg_pull_none>; - }; - }; - - hdmi { - /omit-if-no-ref/ - hdmim0_rx_cec: hdmim0-rx-cec { - rockchip,pins = - /* hdmim0_rx_cec */ - <4 RK_PB5 5 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - hdmim0_rx_hpdin: hdmim0-rx-hpdin { - rockchip,pins = - /* hdmim0_rx_hpdin */ - <4 RK_PB6 5 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - hdmim0_rx_scl: hdmim0-rx-scl { - rockchip,pins = - /* hdmim0_rx_scl */ - <0 RK_PD2 11 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - hdmim0_rx_sda: hdmim0-rx-sda { - rockchip,pins = - /* hdmim0_rx_sda */ - <0 RK_PD1 11 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - hdmim0_tx0_cec: hdmim0-tx0-cec { - rockchip,pins = - /* hdmim0_tx0_cec */ - <4 RK_PC1 5 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - hdmim0_tx0_hpd: hdmim0-tx0-hpd { - rockchip,pins = - /* hdmim0_tx0_hpd */ - <1 RK_PA5 5 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - hdmim0_tx0_scl: hdmim0-tx0-scl { - rockchip,pins = - /* hdmim0_tx0_scl */ - <4 RK_PB7 5 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - hdmim0_tx0_sda: hdmim0-tx0-sda { - rockchip,pins = - /* hdmim0_tx0_sda */ - <4 RK_PC0 5 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - hdmim0_tx1_hpd: hdmim0-tx1-hpd { - rockchip,pins = - /* hdmim0_tx1_hpd */ - <1 RK_PA6 5 &pcfg_pull_none>; - }; - /omit-if-no-ref/ - hdmim1_rx_cec: hdmim1-rx-cec { - rockchip,pins = - /* hdmim1_rx_cec */ - <3 RK_PD1 5 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - hdmim1_rx_hpdin: hdmim1-rx-hpdin { - rockchip,pins = - /* hdmim1_rx_hpdin */ - <3 RK_PD4 5 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - hdmim1_rx_scl: hdmim1-rx-scl { - rockchip,pins = - /* hdmim1_rx_scl */ - <3 RK_PD2 5 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - hdmim1_rx_sda: hdmim1-rx-sda { - rockchip,pins = - /* hdmim1_rx_sda */ - <3 RK_PD3 5 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - hdmim1_tx0_cec: hdmim1-tx0-cec { - rockchip,pins = - /* hdmim1_tx0_cec */ - <0 RK_PD1 13 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - hdmim1_tx0_hpd: hdmim1-tx0-hpd { - rockchip,pins = - /* hdmim1_tx0_hpd */ - <3 RK_PD4 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - hdmim1_tx0_scl: hdmim1-tx0-scl { - rockchip,pins = - /* hdmim1_tx0_scl */ - <0 RK_PD5 11 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - hdmim1_tx0_sda: hdmim1-tx0-sda { - rockchip,pins = - /* hdmim1_tx0_sda */ - <0 RK_PD4 11 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - hdmim1_tx1_cec: hdmim1-tx1-cec { - rockchip,pins = - /* hdmim1_tx1_cec */ - <0 RK_PD2 13 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - hdmim1_tx1_hpd: hdmim1-tx1-hpd { - rockchip,pins = - /* hdmim1_tx1_hpd */ - <3 RK_PB7 5 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - hdmim1_tx1_scl: hdmim1-tx1-scl { - rockchip,pins = - /* hdmim1_tx1_scl */ - <3 RK_PC6 5 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - hdmim1_tx1_sda: hdmim1-tx1-sda { - rockchip,pins = - /* hdmim1_tx1_sda */ - <3 RK_PC5 5 &pcfg_pull_none>; - }; - /omit-if-no-ref/ - hdmim2_rx_cec: hdmim2-rx-cec { - rockchip,pins = - /* hdmim2_rx_cec */ - <1 RK_PB7 5 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - hdmim2_rx_hpdin: hdmim2-rx-hpdin { - rockchip,pins = - /* hdmim2_rx_hpdin */ - <1 RK_PB6 5 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - hdmim2_rx_scl: hdmim2-rx-scl { - rockchip,pins = - /* hdmim2_rx_scl */ - <1 RK_PD6 5 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - hdmim2_rx_sda: hdmim2-rx-sda { - rockchip,pins = - /* hdmim2_rx_sda */ - <1 RK_PD7 5 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - hdmim2_tx0_scl: hdmim2-tx0-scl { - rockchip,pins = - /* hdmim2_tx0_scl */ - <3 RK_PC7 5 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - hdmim2_tx0_sda: hdmim2-tx0-sda { - rockchip,pins = - /* hdmim2_tx0_sda */ - <3 RK_PD0 5 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - hdmim2_tx1_cec: hdmim2-tx1-cec { - rockchip,pins = - /* hdmim2_tx1_cec */ - <3 RK_PC4 5 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - hdmim2_tx1_scl: hdmim2-tx1-scl { - rockchip,pins = - /* hdmim2_tx1_scl */ - <1 RK_PA4 5 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - hdmim2_tx1_sda: hdmim2-tx1-sda { - rockchip,pins = - /* hdmim2_tx1_sda */ - <1 RK_PA3 5 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - hdmi_debug0: hdmi-debug0 { - rockchip,pins = - /* hdmi_debug0 */ - <1 RK_PA7 7 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - hdmi_debug1: hdmi-debug1 { - rockchip,pins = - /* hdmi_debug1 */ - <1 RK_PB0 7 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - hdmi_debug2: hdmi-debug2 { - rockchip,pins = - /* hdmi_debug2 */ - <1 RK_PB1 7 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - hdmi_debug3: hdmi-debug3 { - rockchip,pins = - /* hdmi_debug3 */ - <1 RK_PB2 7 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - hdmi_debug4: hdmi-debug4 { - rockchip,pins = - /* hdmi_debug4 */ - <1 RK_PB3 7 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - hdmi_debug5: hdmi-debug5 { - rockchip,pins = - /* hdmi_debug5 */ - <1 RK_PB4 7 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - hdmi_debug6: hdmi-debug6 { - rockchip,pins = - /* hdmi_debug6 */ - <1 RK_PA0 7 &pcfg_pull_none>; - }; - }; - - i2c0 { - /omit-if-no-ref/ - i2c0m0_xfer: i2c0m0-xfer { - rockchip,pins = - /* i2c0_scl_m0 */ - <0 RK_PB3 2 &pcfg_pull_none_smt>, - /* i2c0_sda_m0 */ - <0 RK_PA6 2 &pcfg_pull_none_smt>; - }; - - /omit-if-no-ref/ - i2c0m2_xfer: i2c0m2-xfer { - rockchip,pins = - /* i2c0_scl_m2 */ - <0 RK_PD1 3 &pcfg_pull_none_smt>, - /* i2c0_sda_m2 */ - <0 RK_PD2 3 &pcfg_pull_none_smt>; - }; - }; - - i2c1 { - /omit-if-no-ref/ - i2c1m0_xfer: i2c1m0-xfer { - rockchip,pins = - /* i2c1_scl_m0 */ - <0 RK_PB5 9 &pcfg_pull_none_smt>, - /* i2c1_sda_m0 */ - <0 RK_PB6 9 &pcfg_pull_none_smt>; - }; - - /omit-if-no-ref/ - i2c1m1_xfer: i2c1m1-xfer { - rockchip,pins = - /* i2c1_scl_m1 */ - <0 RK_PB0 2 &pcfg_pull_none_smt>, - /* i2c1_sda_m1 */ - <0 RK_PB1 2 &pcfg_pull_none_smt>; - }; - - /omit-if-no-ref/ - i2c1m2_xfer: i2c1m2-xfer { - rockchip,pins = - /* i2c1_scl_m2 */ - <0 RK_PD4 9 &pcfg_pull_none_smt>, - /* i2c1_sda_m2 */ - <0 RK_PD5 9 &pcfg_pull_none_smt>; - }; - - /omit-if-no-ref/ - i2c1m3_xfer: i2c1m3-xfer { - rockchip,pins = - /* i2c1_scl_m3 */ - <2 RK_PD4 9 &pcfg_pull_none_smt>, - /* i2c1_sda_m3 */ - <2 RK_PD5 9 &pcfg_pull_none_smt>; - }; - - /omit-if-no-ref/ - i2c1m4_xfer: i2c1m4-xfer { - rockchip,pins = - /* i2c1_scl_m4 */ - <1 RK_PD2 9 &pcfg_pull_none_smt>, - /* i2c1_sda_m4 */ - <1 RK_PD3 9 &pcfg_pull_none_smt>; - }; - }; - - i2c2 { - /omit-if-no-ref/ - i2c2m0_xfer: i2c2m0-xfer { - rockchip,pins = - /* i2c2_scl_m0 */ - <0 RK_PB7 9 &pcfg_pull_none_smt>, - /* i2c2_sda_m0 */ - <0 RK_PC0 9 &pcfg_pull_none_smt>; - }; - - /omit-if-no-ref/ - i2c2m2_xfer: i2c2m2-xfer { - rockchip,pins = - /* i2c2_scl_m2 */ - <2 RK_PA3 9 &pcfg_pull_none_smt>, - /* i2c2_sda_m2 */ - <2 RK_PA2 9 &pcfg_pull_none_smt>; - }; - - /omit-if-no-ref/ - i2c2m3_xfer: i2c2m3-xfer { - rockchip,pins = - /* i2c2_scl_m3 */ - <1 RK_PC5 9 &pcfg_pull_none_smt>, - /* i2c2_sda_m3 */ - <1 RK_PC4 9 &pcfg_pull_none_smt>; - }; - - /omit-if-no-ref/ - i2c2m4_xfer: i2c2m4-xfer { - rockchip,pins = - /* i2c2_scl_m4 */ - <1 RK_PA1 9 &pcfg_pull_none_smt>, - /* i2c2_sda_m4 */ - <1 RK_PA0 9 &pcfg_pull_none_smt>; - }; - }; - - i2c3 { - /omit-if-no-ref/ - i2c3m0_xfer: i2c3m0-xfer { - rockchip,pins = - /* i2c3_scl_m0 */ - <1 RK_PC1 9 &pcfg_pull_none_smt>, - /* i2c3_sda_m0 */ - <1 RK_PC0 9 &pcfg_pull_none_smt>; - }; - - /omit-if-no-ref/ - i2c3m1_xfer: i2c3m1-xfer { - rockchip,pins = - /* i2c3_scl_m1 */ - <3 RK_PB7 9 &pcfg_pull_none_smt>, - /* i2c3_sda_m1 */ - <3 RK_PC0 9 &pcfg_pull_none_smt>; - }; - - /omit-if-no-ref/ - i2c3m2_xfer: i2c3m2-xfer { - rockchip,pins = - /* i2c3_scl_m2 */ - <4 RK_PA4 9 &pcfg_pull_none_smt>, - /* i2c3_sda_m2 */ - <4 RK_PA5 9 &pcfg_pull_none_smt>; - }; - - /omit-if-no-ref/ - i2c3m4_xfer: i2c3m4-xfer { - rockchip,pins = - /* i2c3_scl_m4 */ - <4 RK_PD0 9 &pcfg_pull_none_smt>, - /* i2c3_sda_m4 */ - <4 RK_PD1 9 &pcfg_pull_none_smt>; - }; - }; - - i2c4 { - /omit-if-no-ref/ - i2c4m0_xfer: i2c4m0-xfer { - rockchip,pins = - /* i2c4_scl_m0 */ - <3 RK_PA6 9 &pcfg_pull_none_smt>, - /* i2c4_sda_m0 */ - <3 RK_PA5 9 &pcfg_pull_none_smt>; - }; - - /omit-if-no-ref/ - i2c4m2_xfer: i2c4m2-xfer { - rockchip,pins = - /* i2c4_scl_m2 */ - <0 RK_PC5 9 &pcfg_pull_none_smt>, - /* i2c4_sda_m2 */ - <0 RK_PC4 9 &pcfg_pull_none_smt>; - }; - - /omit-if-no-ref/ - i2c4m3_xfer: i2c4m3-xfer { - rockchip,pins = - /* i2c4_scl_m3 */ - <1 RK_PA3 9 &pcfg_pull_none_smt>, - /* i2c4_sda_m3 */ - <1 RK_PA2 9 &pcfg_pull_none_smt>; - }; - - /omit-if-no-ref/ - i2c4m4_xfer: i2c4m4-xfer { - rockchip,pins = - /* i2c4_scl_m4 */ - <1 RK_PC7 9 &pcfg_pull_none_smt>, - /* i2c4_sda_m4 */ - <1 RK_PC6 9 &pcfg_pull_none_smt>; - }; - }; - - i2c5 { - /omit-if-no-ref/ - i2c5m0_xfer: i2c5m0-xfer { - rockchip,pins = - /* i2c5_scl_m0 */ - <3 RK_PC7 9 &pcfg_pull_none_smt>, - /* i2c5_sda_m0 */ - <3 RK_PD0 9 &pcfg_pull_none_smt>; - }; - - /omit-if-no-ref/ - i2c5m1_xfer: i2c5m1-xfer { - rockchip,pins = - /* i2c5_scl_m1 */ - <4 RK_PB6 9 &pcfg_pull_none_smt>, - /* i2c5_sda_m1 */ - <4 RK_PB7 9 &pcfg_pull_none_smt>; - }; - - /omit-if-no-ref/ - i2c5m2_xfer: i2c5m2-xfer { - rockchip,pins = - /* i2c5_scl_m2 */ - <4 RK_PA6 9 &pcfg_pull_none_smt>, - /* i2c5_sda_m2 */ - <4 RK_PA7 9 &pcfg_pull_none_smt>; - }; - - /omit-if-no-ref/ - i2c5m3_xfer: i2c5m3-xfer { - rockchip,pins = - /* i2c5_scl_m3 */ - <1 RK_PB6 9 &pcfg_pull_none_smt>, - /* i2c5_sda_m3 */ - <1 RK_PB7 9 &pcfg_pull_none_smt>; - }; - }; - - i2c6 { - /omit-if-no-ref/ - i2c6m0_xfer: i2c6m0-xfer { - rockchip,pins = - /* i2c6_scl_m0 */ - <0 RK_PD0 9 &pcfg_pull_none_smt>, - /* i2c6_sda_m0 */ - <0 RK_PC7 9 &pcfg_pull_none_smt>; - }; - - /omit-if-no-ref/ - i2c6m1_xfer: i2c6m1-xfer { - rockchip,pins = - /* i2c6_scl_m1 */ - <1 RK_PC3 9 &pcfg_pull_none_smt>, - /* i2c6_sda_m1 */ - <1 RK_PC2 9 &pcfg_pull_none_smt>; - }; - - /omit-if-no-ref/ - i2c6m3_xfer: i2c6m3-xfer { - rockchip,pins = - /* i2c6_scl_m3 */ - <4 RK_PB1 9 &pcfg_pull_none_smt>, - /* i2c6_sda_m3 */ - <4 RK_PB0 9 &pcfg_pull_none_smt>; - }; - - /omit-if-no-ref/ - i2c6m4_xfer: i2c6m4-xfer { - rockchip,pins = - /* i2c6_scl_m4 */ - <3 RK_PA1 9 &pcfg_pull_none_smt>, - /* i2c6_sda_m4 */ - <3 RK_PA0 9 &pcfg_pull_none_smt>; - }; - }; - - i2c7 { - /omit-if-no-ref/ - i2c7m0_xfer: i2c7m0-xfer { - rockchip,pins = - /* i2c7_scl_m0 */ - <1 RK_PD0 9 &pcfg_pull_none_smt>, - /* i2c7_sda_m0 */ - <1 RK_PD1 9 &pcfg_pull_none_smt>; - }; - - /omit-if-no-ref/ - i2c7m2_xfer: i2c7m2-xfer { - rockchip,pins = - /* i2c7_scl_m2 */ - <3 RK_PD2 9 &pcfg_pull_none_smt>, - /* i2c7_sda_m2 */ - <3 RK_PD3 9 &pcfg_pull_none_smt>; - }; - - /omit-if-no-ref/ - i2c7m3_xfer: i2c7m3-xfer { - rockchip,pins = - /* i2c7_scl_m3 */ - <4 RK_PB2 9 &pcfg_pull_none_smt>, - /* i2c7_sda_m3 */ - <4 RK_PB3 9 &pcfg_pull_none_smt>; - }; - }; - - i2c8 { - /omit-if-no-ref/ - i2c8m0_xfer: i2c8m0-xfer { - rockchip,pins = - /* i2c8_scl_m0 */ - <4 RK_PD2 9 &pcfg_pull_none_smt>, - /* i2c8_sda_m0 */ - <4 RK_PD3 9 &pcfg_pull_none_smt>; - }; - - /omit-if-no-ref/ - i2c8m2_xfer: i2c8m2-xfer { - rockchip,pins = - /* i2c8_scl_m2 */ - <1 RK_PD6 9 &pcfg_pull_none_smt>, - /* i2c8_sda_m2 */ - <1 RK_PD7 9 &pcfg_pull_none_smt>; - }; - - /omit-if-no-ref/ - i2c8m3_xfer: i2c8m3-xfer { - rockchip,pins = - /* i2c8_scl_m3 */ - <4 RK_PC0 9 &pcfg_pull_none_smt>, - /* i2c8_sda_m3 */ - <4 RK_PC1 9 &pcfg_pull_none_smt>; - }; - - /omit-if-no-ref/ - i2c8m4_xfer: i2c8m4-xfer { - rockchip,pins = - /* i2c8_scl_m4 */ - <3 RK_PC2 9 &pcfg_pull_none_smt>, - /* i2c8_sda_m4 */ - <3 RK_PC3 9 &pcfg_pull_none_smt>; - }; - }; - - i2s0 { - /omit-if-no-ref/ - i2s0_lrck: i2s0-lrck { - rockchip,pins = - /* i2s0_lrck */ - <1 RK_PC5 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s0_mclk: i2s0-mclk { - rockchip,pins = - /* i2s0_mclk */ - <1 RK_PC2 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s0_sclk: i2s0-sclk { - rockchip,pins = - /* i2s0_sclk */ - <1 RK_PC3 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s0_sdi0: i2s0-sdi0 { - rockchip,pins = - /* i2s0_sdi0 */ - <1 RK_PD4 2 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s0_sdi1: i2s0-sdi1 { - rockchip,pins = - /* i2s0_sdi1 */ - <1 RK_PD3 2 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s0_sdi2: i2s0-sdi2 { - rockchip,pins = - /* i2s0_sdi2 */ - <1 RK_PD2 2 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s0_sdi3: i2s0-sdi3 { - rockchip,pins = - /* i2s0_sdi3 */ - <1 RK_PD1 2 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s0_sdo0: i2s0-sdo0 { - rockchip,pins = - /* i2s0_sdo0 */ - <1 RK_PC7 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s0_sdo1: i2s0-sdo1 { - rockchip,pins = - /* i2s0_sdo1 */ - <1 RK_PD0 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s0_sdo2: i2s0-sdo2 { - rockchip,pins = - /* i2s0_sdo2 */ - <1 RK_PD1 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s0_sdo3: i2s0-sdo3 { - rockchip,pins = - /* i2s0_sdo3 */ - <1 RK_PD2 1 &pcfg_pull_none>; - }; - }; - - i2s1 { - /omit-if-no-ref/ - i2s1m0_lrck: i2s1m0-lrck { - rockchip,pins = - /* i2s1m0_lrck */ - <4 RK_PA2 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s1m0_mclk: i2s1m0-mclk { - rockchip,pins = - /* i2s1m0_mclk */ - <4 RK_PA0 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s1m0_sclk: i2s1m0-sclk { - rockchip,pins = - /* i2s1m0_sclk */ - <4 RK_PA1 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s1m0_sdi0: i2s1m0-sdi0 { - rockchip,pins = - /* i2s1m0_sdi0 */ - <4 RK_PA5 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s1m0_sdi1: i2s1m0-sdi1 { - rockchip,pins = - /* i2s1m0_sdi1 */ - <4 RK_PA6 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s1m0_sdi2: i2s1m0-sdi2 { - rockchip,pins = - /* i2s1m0_sdi2 */ - <4 RK_PA7 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s1m0_sdi3: i2s1m0-sdi3 { - rockchip,pins = - /* i2s1m0_sdi3 */ - <4 RK_PB0 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s1m0_sdo0: i2s1m0-sdo0 { - rockchip,pins = - /* i2s1m0_sdo0 */ - <4 RK_PB1 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s1m0_sdo1: i2s1m0-sdo1 { - rockchip,pins = - /* i2s1m0_sdo1 */ - <4 RK_PB2 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s1m0_sdo2: i2s1m0-sdo2 { - rockchip,pins = - /* i2s1m0_sdo2 */ - <4 RK_PB3 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s1m0_sdo3: i2s1m0-sdo3 { - rockchip,pins = - /* i2s1m0_sdo3 */ - <4 RK_PB4 3 &pcfg_pull_none>; - }; - /omit-if-no-ref/ - i2s1m1_lrck: i2s1m1-lrck { - rockchip,pins = - /* i2s1m1_lrck */ - <0 RK_PB7 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s1m1_mclk: i2s1m1-mclk { - rockchip,pins = - /* i2s1m1_mclk */ - <0 RK_PB5 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s1m1_sclk: i2s1m1-sclk { - rockchip,pins = - /* i2s1m1_sclk */ - <0 RK_PB6 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s1m1_sdi0: i2s1m1-sdi0 { - rockchip,pins = - /* i2s1m1_sdi0 */ - <0 RK_PC5 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s1m1_sdi1: i2s1m1-sdi1 { - rockchip,pins = - /* i2s1m1_sdi1 */ - <0 RK_PC6 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s1m1_sdi2: i2s1m1-sdi2 { - rockchip,pins = - /* i2s1m1_sdi2 */ - <0 RK_PC7 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s1m1_sdi3: i2s1m1-sdi3 { - rockchip,pins = - /* i2s1m1_sdi3 */ - <0 RK_PD0 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s1m1_sdo0: i2s1m1-sdo0 { - rockchip,pins = - /* i2s1m1_sdo0 */ - <0 RK_PD1 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s1m1_sdo1: i2s1m1-sdo1 { - rockchip,pins = - /* i2s1m1_sdo1 */ - <0 RK_PD2 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s1m1_sdo2: i2s1m1-sdo2 { - rockchip,pins = - /* i2s1m1_sdo2 */ - <0 RK_PD4 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s1m1_sdo3: i2s1m1-sdo3 { - rockchip,pins = - /* i2s1m1_sdo3 */ - <0 RK_PD5 1 &pcfg_pull_none>; - }; - }; - - i2s2 { - /omit-if-no-ref/ - i2s2m0_lrck: i2s2m0-lrck { - rockchip,pins = - /* i2s2m0_lrck */ - <2 RK_PC0 2 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s2m0_mclk: i2s2m0-mclk { - rockchip,pins = - /* i2s2m0_mclk */ - <2 RK_PB6 2 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s2m0_sclk: i2s2m0-sclk { - rockchip,pins = - /* i2s2m0_sclk */ - <2 RK_PB7 2 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s2m0_sdi: i2s2m0-sdi { - rockchip,pins = - /* i2s2m0_sdi */ - <2 RK_PC3 2 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s2m0_sdo: i2s2m0-sdo { - rockchip,pins = - /* i2s2m0_sdo */ - <4 RK_PC3 2 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s2m1_lrck: i2s2m1-lrck { - rockchip,pins = - /* i2s2m1_lrck */ - <3 RK_PB6 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s2m1_mclk: i2s2m1-mclk { - rockchip,pins = - /* i2s2m1_mclk */ - <3 RK_PB4 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s2m1_sclk: i2s2m1-sclk { - rockchip,pins = - /* i2s2m1_sclk */ - <3 RK_PB5 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s2m1_sdi: i2s2m1-sdi { - rockchip,pins = - /* i2s2m1_sdi */ - <3 RK_PB2 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s2m1_sdo: i2s2m1-sdo { - rockchip,pins = - /* i2s2m1_sdo */ - <3 RK_PB3 3 &pcfg_pull_none>; - }; - }; - - i2s3 { - /omit-if-no-ref/ - i2s3_lrck: i2s3-lrck { - rockchip,pins = - /* i2s3_lrck */ - <3 RK_PA2 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s3_mclk: i2s3-mclk { - rockchip,pins = - /* i2s3_mclk */ - <3 RK_PA0 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s3_sclk: i2s3-sclk { - rockchip,pins = - /* i2s3_sclk */ - <3 RK_PA1 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s3_sdi: i2s3-sdi { - rockchip,pins = - /* i2s3_sdi */ - <3 RK_PA4 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s3_sdo: i2s3-sdo { - rockchip,pins = - /* i2s3_sdo */ - <3 RK_PA3 3 &pcfg_pull_none>; - }; - }; - - jtag { - /omit-if-no-ref/ - jtagm0_pins: jtagm0-pins { - rockchip,pins = - /* jtag_tck_m0 */ - <4 RK_PD2 5 &pcfg_pull_none>, - /* jtag_tms_m0 */ - <4 RK_PD3 5 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - jtagm1_pins: jtagm1-pins { - rockchip,pins = - /* jtag_tck_m1 */ - <4 RK_PD0 5 &pcfg_pull_none>, - /* jtag_tms_m1 */ - <4 RK_PD1 5 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - jtagm2_pins: jtagm2-pins { - rockchip,pins = - /* jtag_tck_m2 */ - <0 RK_PB5 2 &pcfg_pull_none>, - /* jtag_tms_m2 */ - <0 RK_PB6 2 &pcfg_pull_none>; - }; - }; - - litcpu { - /omit-if-no-ref/ - litcpu_pins: litcpu-pins { - rockchip,pins = - /* litcpu_avs */ - <0 RK_PD3 1 &pcfg_pull_none>; - }; - }; - - mcu { - /omit-if-no-ref/ - mcum0_pins: mcum0-pins { - rockchip,pins = - /* mcu_jtag_tck_m0 */ - <4 RK_PD4 5 &pcfg_pull_none>, - /* mcu_jtag_tms_m0 */ - <4 RK_PD5 5 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - mcum1_pins: mcum1-pins { - rockchip,pins = - /* mcu_jtag_tck_m1 */ - <3 RK_PD4 6 &pcfg_pull_none>, - /* mcu_jtag_tms_m1 */ - <3 RK_PD5 6 &pcfg_pull_none>; - }; - }; - - mipi { - /omit-if-no-ref/ - mipim0_camera0_clk: mipim0-camera0-clk { - rockchip,pins = - /* mipim0_camera0_clk */ - <4 RK_PB1 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - mipim0_camera1_clk: mipim0-camera1-clk { - rockchip,pins = - /* mipim0_camera1_clk */ - <1 RK_PB6 2 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - mipim0_camera2_clk: mipim0-camera2-clk { - rockchip,pins = - /* mipim0_camera2_clk */ - <1 RK_PB7 2 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - mipim0_camera3_clk: mipim0-camera3-clk { - rockchip,pins = - /* mipim0_camera3_clk */ - <1 RK_PD6 2 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - mipim0_camera4_clk: mipim0-camera4-clk { - rockchip,pins = - /* mipim0_camera4_clk */ - <1 RK_PD7 2 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - mipim1_camera0_clk: mipim1-camera0-clk { - rockchip,pins = - /* mipim1_camera0_clk */ - <3 RK_PA5 4 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - mipim1_camera1_clk: mipim1-camera1-clk { - rockchip,pins = - /* mipim1_camera1_clk */ - <3 RK_PA6 4 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - mipim1_camera2_clk: mipim1-camera2-clk { - rockchip,pins = - /* mipim1_camera2_clk */ - <3 RK_PA7 4 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - mipim1_camera3_clk: mipim1-camera3-clk { - rockchip,pins = - /* mipim1_camera3_clk */ - <3 RK_PB0 4 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - mipim1_camera4_clk: mipim1-camera4-clk { - rockchip,pins = - /* mipim1_camera4_clk */ - <3 RK_PB1 4 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - mipi_te0: mipi-te0 { - rockchip,pins = - /* mipi_te0 */ - <3 RK_PC2 2 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - mipi_te1: mipi-te1 { - rockchip,pins = - /* mipi_te1 */ - <3 RK_PC3 2 &pcfg_pull_none>; - }; - }; - - npu { - /omit-if-no-ref/ - npu_pins: npu-pins { - rockchip,pins = - /* npu_avs */ - <0 RK_PC6 2 &pcfg_pull_none>; - }; - }; - - pcie20x1 { - /omit-if-no-ref/ - pcie20x1m0_pins: pcie20x1m0-pins { - rockchip,pins = - /* pcie20x1_2_clkreqn_m0 */ - <3 RK_PC7 4 &pcfg_pull_none>, - /* pcie20x1_2_perstn_m0 */ - <3 RK_PD1 4 &pcfg_pull_none>, - /* pcie20x1_2_waken_m0 */ - <3 RK_PD0 4 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pcie20x1m1_pins: pcie20x1m1-pins { - rockchip,pins = - /* pcie20x1_2_clkreqn_m1 */ - <4 RK_PB7 4 &pcfg_pull_none>, - /* pcie20x1_2_perstn_m1 */ - <4 RK_PC1 4 &pcfg_pull_none>, - /* pcie20x1_2_waken_m1 */ - <4 RK_PC0 4 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pcie20x1_2_button_rstn: pcie20x1-2-button-rstn { - rockchip,pins = - /* pcie20x1_2_button_rstn */ - <4 RK_PB3 4 &pcfg_pull_none>; - }; - }; - - pcie30phy { - /omit-if-no-ref/ - pcie30phy_pins: pcie30phy-pins { - rockchip,pins = - /* pcie30phy_dtb0 */ - <1 RK_PC4 4 &pcfg_pull_none>, - /* pcie30phy_dtb1 */ - <1 RK_PD1 4 &pcfg_pull_none>; - }; - }; - - pcie30x1 { - /omit-if-no-ref/ - pcie30x1m0_pins: pcie30x1m0-pins { - rockchip,pins = - /* pcie30x1_0_clkreqn_m0 */ - <0 RK_PC0 12 &pcfg_pull_none>, - /* pcie30x1_0_perstn_m0 */ - <0 RK_PC5 12 &pcfg_pull_none>, - /* pcie30x1_0_waken_m0 */ - <0 RK_PC4 12 &pcfg_pull_none>, - /* pcie30x1_1_clkreqn_m0 */ - <0 RK_PB5 12 &pcfg_pull_none>, - /* pcie30x1_1_perstn_m0 */ - <0 RK_PB7 12 &pcfg_pull_none>, - /* pcie30x1_1_waken_m0 */ - <0 RK_PB6 12 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pcie30x1m1_pins: pcie30x1m1-pins { - rockchip,pins = - /* pcie30x1_0_clkreqn_m1 */ - <4 RK_PA3 4 &pcfg_pull_none>, - /* pcie30x1_0_perstn_m1 */ - <4 RK_PA5 4 &pcfg_pull_none>, - /* pcie30x1_0_waken_m1 */ - <4 RK_PA4 4 &pcfg_pull_none>, - /* pcie30x1_1_clkreqn_m1 */ - <4 RK_PA0 4 &pcfg_pull_none>, - /* pcie30x1_1_perstn_m1 */ - <4 RK_PA2 4 &pcfg_pull_none>, - /* pcie30x1_1_waken_m1 */ - <4 RK_PA1 4 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pcie30x1m2_pins: pcie30x1m2-pins { - rockchip,pins = - /* pcie30x1_0_clkreqn_m2 */ - <1 RK_PB5 4 &pcfg_pull_none>, - /* pcie30x1_0_perstn_m2 */ - <1 RK_PB4 4 &pcfg_pull_none>, - /* pcie30x1_0_waken_m2 */ - <1 RK_PB3 4 &pcfg_pull_none>, - /* pcie30x1_1_clkreqn_m2 */ - <1 RK_PA0 4 &pcfg_pull_none>, - /* pcie30x1_1_perstn_m2 */ - <1 RK_PA7 4 &pcfg_pull_none>, - /* pcie30x1_1_waken_m2 */ - <1 RK_PA1 4 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pcie30x1_0_button_rstn: pcie30x1-0-button-rstn { - rockchip,pins = - /* pcie30x1_0_button_rstn */ - <4 RK_PB1 4 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pcie30x1_1_button_rstn: pcie30x1-1-button-rstn { - rockchip,pins = - /* pcie30x1_1_button_rstn */ - <4 RK_PB2 4 &pcfg_pull_none>; - }; - }; - - pcie30x2 { - /omit-if-no-ref/ - pcie30x2m0_pins: pcie30x2m0-pins { - rockchip,pins = - /* pcie30x2_clkreqn_m0 */ - <0 RK_PD1 12 &pcfg_pull_none>, - /* pcie30x2_perstn_m0 */ - <0 RK_PD4 12 &pcfg_pull_none>, - /* pcie30x2_waken_m0 */ - <0 RK_PD2 12 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pcie30x2m1_pins: pcie30x2m1-pins { - rockchip,pins = - /* pcie30x2_clkreqn_m1 */ - <4 RK_PA6 4 &pcfg_pull_none>, - /* pcie30x2_perstn_m1 */ - <4 RK_PB0 4 &pcfg_pull_none>, - /* pcie30x2_waken_m1 */ - <4 RK_PA7 4 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pcie30x2m2_pins: pcie30x2m2-pins { - rockchip,pins = - /* pcie30x2_clkreqn_m2 */ - <3 RK_PD2 4 &pcfg_pull_none>, - /* pcie30x2_perstn_m2 */ - <3 RK_PD4 4 &pcfg_pull_none>, - /* pcie30x2_waken_m2 */ - <3 RK_PD3 4 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pcie30x2m3_pins: pcie30x2m3-pins { - rockchip,pins = - /* pcie30x2_clkreqn_m3 */ - <1 RK_PD7 4 &pcfg_pull_none>, - /* pcie30x2_perstn_m3 */ - <1 RK_PB7 4 &pcfg_pull_none>, - /* pcie30x2_waken_m3 */ - <1 RK_PB6 4 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pcie30x2_button_rstn: pcie30x2-button-rstn { - rockchip,pins = - /* pcie30x2_button_rstn */ - <3 RK_PC1 4 &pcfg_pull_none>; - }; - }; - - pcie30x4 { - /omit-if-no-ref/ - pcie30x4m0_pins: pcie30x4m0-pins { - rockchip,pins = - /* pcie30x4_clkreqn_m0 */ - <0 RK_PC6 12 &pcfg_pull_none>, - /* pcie30x4_perstn_m0 */ - <0 RK_PD0 12 &pcfg_pull_none>, - /* pcie30x4_waken_m0 */ - <0 RK_PC7 12 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pcie30x4m1_pins: pcie30x4m1-pins { - rockchip,pins = - /* pcie30x4_clkreqn_m1 */ - <4 RK_PB4 4 &pcfg_pull_none>, - /* pcie30x4_perstn_m1 */ - <4 RK_PB6 4 &pcfg_pull_none>, - /* pcie30x4_waken_m1 */ - <4 RK_PB5 4 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pcie30x4m2_pins: pcie30x4m2-pins { - rockchip,pins = - /* pcie30x4_clkreqn_m2 */ - <3 RK_PC4 4 &pcfg_pull_none>, - /* pcie30x4_perstn_m2 */ - <3 RK_PC6 4 &pcfg_pull_none>, - /* pcie30x4_waken_m2 */ - <3 RK_PC5 4 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pcie30x4m3_pins: pcie30x4m3-pins { - rockchip,pins = - /* pcie30x4_clkreqn_m3 */ - <1 RK_PB0 4 &pcfg_pull_none>, - /* pcie30x4_perstn_m3 */ - <1 RK_PB2 4 &pcfg_pull_none>, - /* pcie30x4_waken_m3 */ - <1 RK_PB1 4 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pcie30x4_button_rstn: pcie30x4-button-rstn { - rockchip,pins = - /* pcie30x4_button_rstn */ - <3 RK_PD5 4 &pcfg_pull_none>; - }; - }; - - pdm0 { - /omit-if-no-ref/ - pdm0m0_clk: pdm0m0-clk { - rockchip,pins = - /* pdm0_clk0_m0 */ - <1 RK_PC6 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pdm0m0_clk1: pdm0m0-clk1 { - rockchip,pins = - /* pdm0m0_clk1 */ - <1 RK_PC4 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pdm0m0_sdi0: pdm0m0-sdi0 { - rockchip,pins = - /* pdm0m0_sdi0 */ - <1 RK_PD5 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pdm0m0_sdi1: pdm0m0-sdi1 { - rockchip,pins = - /* pdm0m0_sdi1 */ - <1 RK_PD1 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pdm0m0_sdi2: pdm0m0-sdi2 { - rockchip,pins = - /* pdm0m0_sdi2 */ - <1 RK_PD2 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pdm0m0_sdi3: pdm0m0-sdi3 { - rockchip,pins = - /* pdm0m0_sdi3 */ - <1 RK_PD3 3 &pcfg_pull_none>; - }; - /omit-if-no-ref/ - pdm0m1_clk: pdm0m1-clk { - rockchip,pins = - /* pdm0_clk0_m1 */ - <0 RK_PC0 2 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pdm0m1_clk1: pdm0m1-clk1 { - rockchip,pins = - /* pdm0m1_clk1 */ - <0 RK_PC4 2 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pdm0m1_sdi0: pdm0m1-sdi0 { - rockchip,pins = - /* pdm0m1_sdi0 */ - <0 RK_PC7 2 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pdm0m1_sdi1: pdm0m1-sdi1 { - rockchip,pins = - /* pdm0m1_sdi1 */ - <0 RK_PD0 2 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pdm0m1_sdi2: pdm0m1-sdi2 { - rockchip,pins = - /* pdm0m1_sdi2 */ - <0 RK_PD4 2 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pdm0m1_sdi3: pdm0m1-sdi3 { - rockchip,pins = - /* pdm0m1_sdi3 */ - <0 RK_PD6 2 &pcfg_pull_none>; - }; - }; - - pdm1 { - /omit-if-no-ref/ - pdm1m0_clk: pdm1m0-clk { - rockchip,pins = - /* pdm1_clk0_m0 */ - <4 RK_PD5 2 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pdm1m0_clk1: pdm1m0-clk1 { - rockchip,pins = - /* pdm1m0_clk1 */ - <4 RK_PD4 2 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pdm1m0_sdi0: pdm1m0-sdi0 { - rockchip,pins = - /* pdm1m0_sdi0 */ - <4 RK_PD3 2 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pdm1m0_sdi1: pdm1m0-sdi1 { - rockchip,pins = - /* pdm1m0_sdi1 */ - <4 RK_PD2 2 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pdm1m0_sdi2: pdm1m0-sdi2 { - rockchip,pins = - /* pdm1m0_sdi2 */ - <4 RK_PD1 2 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pdm1m0_sdi3: pdm1m0-sdi3 { - rockchip,pins = - /* pdm1m0_sdi3 */ - <4 RK_PD0 2 &pcfg_pull_none>; - }; - /omit-if-no-ref/ - pdm1m1_clk: pdm1m1-clk { - rockchip,pins = - /* pdm1_clk0_m1 */ - <1 RK_PB4 2 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pdm1m1_clk1: pdm1m1-clk1 { - rockchip,pins = - /* pdm1m1_clk1 */ - <1 RK_PB3 2 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pdm1m1_sdi0: pdm1m1-sdi0 { - rockchip,pins = - /* pdm1m1_sdi0 */ - <1 RK_PA7 2 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pdm1m1_sdi1: pdm1m1-sdi1 { - rockchip,pins = - /* pdm1m1_sdi1 */ - <1 RK_PB0 2 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pdm1m1_sdi2: pdm1m1-sdi2 { - rockchip,pins = - /* pdm1m1_sdi2 */ - <1 RK_PB1 2 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pdm1m1_sdi3: pdm1m1-sdi3 { - rockchip,pins = - /* pdm1m1_sdi3 */ - <1 RK_PB2 2 &pcfg_pull_none>; - }; - }; - - pmic { - /omit-if-no-ref/ - pmic_pins: pmic-pins { - rockchip,pins = - /* pmic_int_l */ - <0 RK_PA7 0 &pcfg_pull_up>, - /* pmic_sleep1 */ - <0 RK_PA2 1 &pcfg_pull_none>, - /* pmic_sleep2 */ - <0 RK_PA3 1 &pcfg_pull_none>, - /* pmic_sleep3 */ - <0 RK_PC1 1 &pcfg_pull_none>, - /* pmic_sleep4 */ - <0 RK_PC2 1 &pcfg_pull_none>, - /* pmic_sleep5 */ - <0 RK_PC3 1 &pcfg_pull_none>, - /* pmic_sleep6 */ - <0 RK_PD6 1 &pcfg_pull_none>; - }; - }; - - pmu { - /omit-if-no-ref/ - pmu_pins: pmu-pins { - rockchip,pins = - /* pmu_debug */ - <0 RK_PA5 3 &pcfg_pull_none>; - }; - }; - - pwm0 { - /omit-if-no-ref/ - pwm0m0_pins: pwm0m0-pins { - rockchip,pins = - /* pwm0_m0 */ - <0 RK_PB7 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pwm0m1_pins: pwm0m1-pins { - rockchip,pins = - /* pwm0_m1 */ - <1 RK_PD2 11 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pwm0m2_pins: pwm0m2-pins { - rockchip,pins = - /* pwm0_m2 */ - <1 RK_PA2 11 &pcfg_pull_none>; - }; - }; - - pwm1 { - /omit-if-no-ref/ - pwm1m0_pins: pwm1m0-pins { - rockchip,pins = - /* pwm1_m0 */ - <0 RK_PC0 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pwm1m1_pins: pwm1m1-pins { - rockchip,pins = - /* pwm1_m1 */ - <1 RK_PD3 11 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pwm1m2_pins: pwm1m2-pins { - rockchip,pins = - /* pwm1_m2 */ - <1 RK_PA3 11 &pcfg_pull_none>; - }; - }; - - pwm2 { - /omit-if-no-ref/ - pwm2m0_pins: pwm2m0-pins { - rockchip,pins = - /* pwm2_m0 */ - <0 RK_PC4 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pwm2m1_pins: pwm2m1-pins { - rockchip,pins = - /* pwm2_m1 */ - <3 RK_PB1 11 &pcfg_pull_none>; - }; - }; - - pwm3 { - /omit-if-no-ref/ - pwm3m0_pins: pwm3m0-pins { - rockchip,pins = - /* pwm3_ir_m0 */ - <0 RK_PD4 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pwm3m1_pins: pwm3m1-pins { - rockchip,pins = - /* pwm3_ir_m1 */ - <3 RK_PB2 11 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pwm3m2_pins: pwm3m2-pins { - rockchip,pins = - /* pwm3_ir_m2 */ - <1 RK_PC2 11 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pwm3m3_pins: pwm3m3-pins { - rockchip,pins = - /* pwm3_ir_m3 */ - <1 RK_PA7 11 &pcfg_pull_none>; - }; - }; - - pwm4 { - /omit-if-no-ref/ - pwm4m0_pins: pwm4m0-pins { - rockchip,pins = - /* pwm4_m0 */ - <0 RK_PC5 11 &pcfg_pull_none>; - }; - }; - - pwm5 { - /omit-if-no-ref/ - pwm5m0_pins: pwm5m0-pins { - rockchip,pins = - /* pwm5_m0 */ - <0 RK_PB1 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pwm5m1_pins: pwm5m1-pins { - rockchip,pins = - /* pwm5_m1 */ - <0 RK_PC6 11 &pcfg_pull_none>; - }; - }; - - pwm6 { - /omit-if-no-ref/ - pwm6m0_pins: pwm6m0-pins { - rockchip,pins = - /* pwm6_m0 */ - <0 RK_PC7 11 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pwm6m1_pins: pwm6m1-pins { - rockchip,pins = - /* pwm6_m1 */ - <4 RK_PC1 11 &pcfg_pull_none>; - }; - }; - - pwm7 { - /omit-if-no-ref/ - pwm7m0_pins: pwm7m0-pins { - rockchip,pins = - /* pwm7_ir_m0 */ - <0 RK_PD0 11 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pwm7m1_pins: pwm7m1-pins { - rockchip,pins = - /* pwm7_ir_m1 */ - <4 RK_PD4 11 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pwm7m2_pins: pwm7m2-pins { - rockchip,pins = - /* pwm7_ir_m2 */ - <1 RK_PC3 11 &pcfg_pull_none>; - }; - }; - - pwm8 { - /omit-if-no-ref/ - pwm8m0_pins: pwm8m0-pins { - rockchip,pins = - /* pwm8_m0 */ - <3 RK_PA7 11 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pwm8m1_pins: pwm8m1-pins { - rockchip,pins = - /* pwm8_m1 */ - <4 RK_PD0 11 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pwm8m2_pins: pwm8m2-pins { - rockchip,pins = - /* pwm8_m2 */ - <3 RK_PD0 11 &pcfg_pull_none>; - }; - }; - - pwm9 { - /omit-if-no-ref/ - pwm9m0_pins: pwm9m0-pins { - rockchip,pins = - /* pwm9_m0 */ - <3 RK_PB0 11 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pwm9m1_pins: pwm9m1-pins { - rockchip,pins = - /* pwm9_m1 */ - <4 RK_PD1 11 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pwm9m2_pins: pwm9m2-pins { - rockchip,pins = - /* pwm9_m2 */ - <3 RK_PD1 11 &pcfg_pull_none>; - }; - }; - - pwm10 { - /omit-if-no-ref/ - pwm10m0_pins: pwm10m0-pins { - rockchip,pins = - /* pwm10_m0 */ - <3 RK_PA0 11 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pwm10m1_pins: pwm10m1-pins { - rockchip,pins = - /* pwm10_m1 */ - <4 RK_PD3 11 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pwm10m2_pins: pwm10m2-pins { - rockchip,pins = - /* pwm10_m2 */ - <3 RK_PD3 11 &pcfg_pull_none>; - }; - }; - - pwm11 { - /omit-if-no-ref/ - pwm11m0_pins: pwm11m0-pins { - rockchip,pins = - /* pwm11_ir_m0 */ - <3 RK_PA1 11 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pwm11m1_pins: pwm11m1-pins { - rockchip,pins = - /* pwm11_ir_m1 */ - <4 RK_PB4 11 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pwm11m2_pins: pwm11m2-pins { - rockchip,pins = - /* pwm11_ir_m2 */ - <1 RK_PC4 11 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pwm11m3_pins: pwm11m3-pins { - rockchip,pins = - /* pwm11_ir_m3 */ - <3 RK_PD5 11 &pcfg_pull_none>; - }; - }; - - pwm12 { - /omit-if-no-ref/ - pwm12m0_pins: pwm12m0-pins { - rockchip,pins = - /* pwm12_m0 */ - <3 RK_PB5 11 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pwm12m1_pins: pwm12m1-pins { - rockchip,pins = - /* pwm12_m1 */ - <4 RK_PB5 11 &pcfg_pull_none>; - }; - }; - - pwm13 { - /omit-if-no-ref/ - pwm13m0_pins: pwm13m0-pins { - rockchip,pins = - /* pwm13_m0 */ - <3 RK_PB6 11 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pwm13m1_pins: pwm13m1-pins { - rockchip,pins = - /* pwm13_m1 */ - <4 RK_PB6 11 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pwm13m2_pins: pwm13m2-pins { - rockchip,pins = - /* pwm13_m2 */ - <1 RK_PB7 11 &pcfg_pull_none>; - }; - }; - - pwm14 { - /omit-if-no-ref/ - pwm14m0_pins: pwm14m0-pins { - rockchip,pins = - /* pwm14_m0 */ - <3 RK_PC2 11 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pwm14m1_pins: pwm14m1-pins { - rockchip,pins = - /* pwm14_m1 */ - <4 RK_PB2 11 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pwm14m2_pins: pwm14m2-pins { - rockchip,pins = - /* pwm14_m2 */ - <1 RK_PD6 11 &pcfg_pull_none>; - }; - }; - - pwm15 { - /omit-if-no-ref/ - pwm15m0_pins: pwm15m0-pins { - rockchip,pins = - /* pwm15_ir_m0 */ - <3 RK_PC3 11 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pwm15m1_pins: pwm15m1-pins { - rockchip,pins = - /* pwm15_ir_m1 */ - <4 RK_PB3 11 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pwm15m2_pins: pwm15m2-pins { - rockchip,pins = - /* pwm15_ir_m2 */ - <1 RK_PC6 11 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pwm15m3_pins: pwm15m3-pins { - rockchip,pins = - /* pwm15_ir_m3 */ - <1 RK_PD7 11 &pcfg_pull_none>; - }; - }; - - refclk { - /omit-if-no-ref/ - refclk_pins: refclk-pins { - rockchip,pins = - /* refclk_out */ - <0 RK_PA0 1 &pcfg_pull_none>; - }; - }; - - sata { - /omit-if-no-ref/ - sata_pins: sata-pins { - rockchip,pins = - /* sata_cp_pod */ - <0 RK_PC6 13 &pcfg_pull_none>, - /* sata_cpdet */ - <0 RK_PD4 13 &pcfg_pull_none>, - /* sata_mp_switch */ - <0 RK_PD5 13 &pcfg_pull_none>; - }; - }; - - sata0 { - /omit-if-no-ref/ - sata0m0_pins: sata0m0-pins { - rockchip,pins = - /* sata0_act_led_m0 */ - <4 RK_PB6 6 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - sata0m1_pins: sata0m1-pins { - rockchip,pins = - /* sata0_act_led_m1 */ - <1 RK_PB3 6 &pcfg_pull_none>; - }; - }; - - sata1 { - /omit-if-no-ref/ - sata1m0_pins: sata1m0-pins { - rockchip,pins = - /* sata1_act_led_m0 */ - <4 RK_PB5 6 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - sata1m1_pins: sata1m1-pins { - rockchip,pins = - /* sata1_act_led_m1 */ - <1 RK_PA1 6 &pcfg_pull_none>; - }; - }; - - sata2 { - /omit-if-no-ref/ - sata2m0_pins: sata2m0-pins { - rockchip,pins = - /* sata2_act_led_m0 */ - <4 RK_PB1 6 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - sata2m1_pins: sata2m1-pins { - rockchip,pins = - /* sata2_act_led_m1 */ - <1 RK_PB7 6 &pcfg_pull_none>; - }; - }; - - sdio { - /omit-if-no-ref/ - sdiom1_pins: sdiom1-pins { - rockchip,pins = - /* sdio_clk_m1 */ - <3 RK_PA5 2 &pcfg_pull_none>, - /* sdio_cmd_m1 */ - <3 RK_PA4 2 &pcfg_pull_none>, - /* sdio_d0_m1 */ - <3 RK_PA0 2 &pcfg_pull_none>, - /* sdio_d1_m1 */ - <3 RK_PA1 2 &pcfg_pull_none>, - /* sdio_d2_m1 */ - <3 RK_PA2 2 &pcfg_pull_none>, - /* sdio_d3_m1 */ - <3 RK_PA3 2 &pcfg_pull_none>; - }; - }; - - sdmmc { - /omit-if-no-ref/ - sdmmc_bus4: sdmmc-bus4 { - rockchip,pins = - /* sdmmc_d0 */ - <4 RK_PD0 1 &pcfg_pull_up_drv_level_2>, - /* sdmmc_d1 */ - <4 RK_PD1 1 &pcfg_pull_up_drv_level_2>, - /* sdmmc_d2 */ - <4 RK_PD2 1 &pcfg_pull_up_drv_level_2>, - /* sdmmc_d3 */ - <4 RK_PD3 1 &pcfg_pull_up_drv_level_2>; - }; - - /omit-if-no-ref/ - sdmmc_clk: sdmmc-clk { - rockchip,pins = - /* sdmmc_clk */ - <4 RK_PD5 1 &pcfg_pull_up_drv_level_2>; - }; - - /omit-if-no-ref/ - sdmmc_cmd: sdmmc-cmd { - rockchip,pins = - /* sdmmc_cmd */ - <4 RK_PD4 1 &pcfg_pull_up_drv_level_2>; - }; - - /omit-if-no-ref/ - sdmmc_det: sdmmc-det { - rockchip,pins = - /* sdmmc_det */ - <0 RK_PA4 1 &pcfg_pull_up>; - }; - - /omit-if-no-ref/ - sdmmc_pwren: sdmmc-pwren { - rockchip,pins = - /* sdmmc_pwren */ - <0 RK_PA5 2 &pcfg_pull_none>; - }; - }; - - spdif0 { - /omit-if-no-ref/ - spdif0m0_tx: spdif0m0-tx { - rockchip,pins = - /* spdif0m0_tx */ - <1 RK_PB6 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - spdif0m1_tx: spdif0m1-tx { - rockchip,pins = - /* spdif0m1_tx */ - <4 RK_PB4 6 &pcfg_pull_none>; - }; - }; - - spdif1 { - /omit-if-no-ref/ - spdif1m0_tx: spdif1m0-tx { - rockchip,pins = - /* spdif1m0_tx */ - <1 RK_PB7 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - spdif1m1_tx: spdif1m1-tx { - rockchip,pins = - /* spdif1m1_tx */ - <4 RK_PB1 2 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - spdif1m2_tx: spdif1m2-tx { - rockchip,pins = - /* spdif1m2_tx */ - <4 RK_PC1 3 &pcfg_pull_none>; - }; - }; - - spi0 { - /omit-if-no-ref/ - spi0m0_pins: spi0m0-pins { - rockchip,pins = - /* spi0_clk_m0 */ - <0 RK_PC6 8 &pcfg_pull_up_drv_level_1>, - /* spi0_miso_m0 */ - <0 RK_PC7 8 &pcfg_pull_up_drv_level_1>, - /* spi0_mosi_m0 */ - <0 RK_PC0 8 &pcfg_pull_up_drv_level_1>; - }; - - /omit-if-no-ref/ - spi0m0_cs0: spi0m0-cs0 { - rockchip,pins = - /* spi0_cs0_m0 */ - <0 RK_PD1 8 &pcfg_pull_up_drv_level_1>; - }; - - /omit-if-no-ref/ - spi0m0_cs1: spi0m0-cs1 { - rockchip,pins = - /* spi0_cs1_m0 */ - <0 RK_PB7 8 &pcfg_pull_up_drv_level_1>; - }; - /omit-if-no-ref/ - spi0m1_pins: spi0m1-pins { - rockchip,pins = - /* spi0_clk_m1 */ - <4 RK_PA2 8 &pcfg_pull_up_drv_level_1>, - /* spi0_miso_m1 */ - <4 RK_PA0 8 &pcfg_pull_up_drv_level_1>, - /* spi0_mosi_m1 */ - <4 RK_PA1 8 &pcfg_pull_up_drv_level_1>; - }; - - /omit-if-no-ref/ - spi0m1_cs0: spi0m1-cs0 { - rockchip,pins = - /* spi0_cs0_m1 */ - <4 RK_PB2 8 &pcfg_pull_up_drv_level_1>; - }; - - /omit-if-no-ref/ - spi0m1_cs1: spi0m1-cs1 { - rockchip,pins = - /* spi0_cs1_m1 */ - <4 RK_PB1 8 &pcfg_pull_up_drv_level_1>; - }; - /omit-if-no-ref/ - spi0m2_pins: spi0m2-pins { - rockchip,pins = - /* spi0_clk_m2 */ - <1 RK_PB3 8 &pcfg_pull_up_drv_level_1>, - /* spi0_miso_m2 */ - <1 RK_PB1 8 &pcfg_pull_up_drv_level_1>, - /* spi0_mosi_m2 */ - <1 RK_PB2 8 &pcfg_pull_up_drv_level_1>; - }; - - /omit-if-no-ref/ - spi0m2_cs0: spi0m2-cs0 { - rockchip,pins = - /* spi0_cs0_m2 */ - <1 RK_PB4 8 &pcfg_pull_up_drv_level_1>; - }; - - /omit-if-no-ref/ - spi0m2_cs1: spi0m2-cs1 { - rockchip,pins = - /* spi0_cs1_m2 */ - <1 RK_PB5 8 &pcfg_pull_up_drv_level_1>; - }; - /omit-if-no-ref/ - spi0m3_pins: spi0m3-pins { - rockchip,pins = - /* spi0_clk_m3 */ - <3 RK_PD3 8 &pcfg_pull_up_drv_level_1>, - /* spi0_miso_m3 */ - <3 RK_PD1 8 &pcfg_pull_up_drv_level_1>, - /* spi0_mosi_m3 */ - <3 RK_PD2 8 &pcfg_pull_up_drv_level_1>; - }; - - /omit-if-no-ref/ - spi0m3_cs0: spi0m3-cs0 { - rockchip,pins = - /* spi0_cs0_m3 */ - <3 RK_PD4 8 &pcfg_pull_up_drv_level_1>; - }; - - /omit-if-no-ref/ - spi0m3_cs1: spi0m3-cs1 { - rockchip,pins = - /* spi0_cs1_m3 */ - <3 RK_PD5 8 &pcfg_pull_up_drv_level_1>; - }; - }; - - spi1 { - /omit-if-no-ref/ - spi1m1_pins: spi1m1-pins { - rockchip,pins = - /* spi1_clk_m1 */ - <3 RK_PC1 8 &pcfg_pull_up_drv_level_1>, - /* spi1_miso_m1 */ - <3 RK_PC0 8 &pcfg_pull_up_drv_level_1>, - /* spi1_mosi_m1 */ - <3 RK_PB7 8 &pcfg_pull_up_drv_level_1>; - }; - - /omit-if-no-ref/ - spi1m1_cs0: spi1m1-cs0 { - rockchip,pins = - /* spi1_cs0_m1 */ - <3 RK_PC2 8 &pcfg_pull_up_drv_level_1>; - }; - - /omit-if-no-ref/ - spi1m1_cs1: spi1m1-cs1 { - rockchip,pins = - /* spi1_cs1_m1 */ - <3 RK_PC3 8 &pcfg_pull_up_drv_level_1>; - }; - - /omit-if-no-ref/ - spi1m2_pins: spi1m2-pins { - rockchip,pins = - /* spi1_clk_m2 */ - <1 RK_PD2 8 &pcfg_pull_up_drv_level_1>, - /* spi1_miso_m2 */ - <1 RK_PD0 8 &pcfg_pull_up_drv_level_1>, - /* spi1_mosi_m2 */ - <1 RK_PD1 8 &pcfg_pull_up_drv_level_1>; - }; - - /omit-if-no-ref/ - spi1m2_cs0: spi1m2-cs0 { - rockchip,pins = - /* spi1_cs0_m2 */ - <1 RK_PD3 8 &pcfg_pull_up_drv_level_1>; - }; - - /omit-if-no-ref/ - spi1m2_cs1: spi1m2-cs1 { - rockchip,pins = - /* spi1_cs1_m2 */ - <1 RK_PD5 8 &pcfg_pull_up_drv_level_1>; - }; - }; - - spi2 { - /omit-if-no-ref/ - spi2m0_pins: spi2m0-pins { - rockchip,pins = - /* spi2_clk_m0 */ - <1 RK_PA6 8 &pcfg_pull_up_drv_level_1>, - /* spi2_miso_m0 */ - <1 RK_PA4 8 &pcfg_pull_up_drv_level_1>, - /* spi2_mosi_m0 */ - <1 RK_PA5 8 &pcfg_pull_up_drv_level_1>; - }; - - /omit-if-no-ref/ - spi2m0_cs0: spi2m0-cs0 { - rockchip,pins = - /* spi2_cs0_m0 */ - <1 RK_PA7 8 &pcfg_pull_up_drv_level_1>; - }; - - /omit-if-no-ref/ - spi2m0_cs1: spi2m0-cs1 { - rockchip,pins = - /* spi2_cs1_m0 */ - <1 RK_PB0 8 &pcfg_pull_up_drv_level_1>; - }; - - /omit-if-no-ref/ - spi2m1_pins: spi2m1-pins { - rockchip,pins = - /* spi2_clk_m1 */ - <4 RK_PA6 8 &pcfg_pull_up_drv_level_1>, - /* spi2_miso_m1 */ - <4 RK_PA4 8 &pcfg_pull_up_drv_level_1>, - /* spi2_mosi_m1 */ - <4 RK_PA5 8 &pcfg_pull_up_drv_level_1>; - }; - - /omit-if-no-ref/ - spi2m1_cs0: spi2m1-cs0 { - rockchip,pins = - /* spi2_cs0_m1 */ - <4 RK_PA7 8 &pcfg_pull_up_drv_level_1>; - }; - - /omit-if-no-ref/ - spi2m1_cs1: spi2m1-cs1 { - rockchip,pins = - /* spi2_cs1_m1 */ - <4 RK_PB0 8 &pcfg_pull_up_drv_level_1>; - }; - - /omit-if-no-ref/ - spi2m2_pins: spi2m2-pins { - rockchip,pins = - /* spi2_clk_m2 */ - <0 RK_PA5 1 &pcfg_pull_up_drv_level_1>, - /* spi2_miso_m2 */ - <0 RK_PB3 1 &pcfg_pull_up_drv_level_1>, - /* spi2_mosi_m2 */ - <0 RK_PA6 1 &pcfg_pull_up_drv_level_1>; - }; - - /omit-if-no-ref/ - spi2m2_cs0: spi2m2-cs0 { - rockchip,pins = - /* spi2_cs0_m2 */ - <0 RK_PB1 1 &pcfg_pull_up_drv_level_1>; - }; - - /omit-if-no-ref/ - spi2m2_cs1: spi2m2-cs1 { - rockchip,pins = - /* spi2_cs1_m2 */ - <0 RK_PB0 1 &pcfg_pull_up_drv_level_1>; - }; - }; - - spi3 { - /omit-if-no-ref/ - spi3m1_pins: spi3m1-pins { - rockchip,pins = - /* spi3_clk_m1 */ - <4 RK_PB7 8 &pcfg_pull_up_drv_level_1>, - /* spi3_miso_m1 */ - <4 RK_PB5 8 &pcfg_pull_up_drv_level_1>, - /* spi3_mosi_m1 */ - <4 RK_PB6 8 &pcfg_pull_up_drv_level_1>; - }; - - /omit-if-no-ref/ - spi3m1_cs0: spi3m1-cs0 { - rockchip,pins = - /* spi3_cs0_m1 */ - <4 RK_PC0 8 &pcfg_pull_up_drv_level_1>; - }; - - /omit-if-no-ref/ - spi3m1_cs1: spi3m1-cs1 { - rockchip,pins = - /* spi3_cs1_m1 */ - <4 RK_PC1 8 &pcfg_pull_up_drv_level_1>; - }; - - /omit-if-no-ref/ - spi3m2_pins: spi3m2-pins { - rockchip,pins = - /* spi3_clk_m2 */ - <0 RK_PD3 8 &pcfg_pull_up_drv_level_1>, - /* spi3_miso_m2 */ - <0 RK_PD0 8 &pcfg_pull_up_drv_level_1>, - /* spi3_mosi_m2 */ - <0 RK_PD2 8 &pcfg_pull_up_drv_level_1>; - }; - - /omit-if-no-ref/ - spi3m2_cs0: spi3m2-cs0 { - rockchip,pins = - /* spi3_cs0_m2 */ - <0 RK_PD4 8 &pcfg_pull_up_drv_level_1>; - }; - - /omit-if-no-ref/ - spi3m2_cs1: spi3m2-cs1 { - rockchip,pins = - /* spi3_cs1_m2 */ - <0 RK_PD5 8 &pcfg_pull_up_drv_level_1>; - }; - - /omit-if-no-ref/ - spi3m3_pins: spi3m3-pins { - rockchip,pins = - /* spi3_clk_m3 */ - <3 RK_PD0 8 &pcfg_pull_up_drv_level_1>, - /* spi3_miso_m3 */ - <3 RK_PC6 8 &pcfg_pull_up_drv_level_1>, - /* spi3_mosi_m3 */ - <3 RK_PC7 8 &pcfg_pull_up_drv_level_1>; - }; - - /omit-if-no-ref/ - spi3m3_cs0: spi3m3-cs0 { - rockchip,pins = - /* spi3_cs0_m3 */ - <3 RK_PC4 8 &pcfg_pull_up_drv_level_1>; - }; - - /omit-if-no-ref/ - spi3m3_cs1: spi3m3-cs1 { - rockchip,pins = - /* spi3_cs1_m3 */ - <3 RK_PC5 8 &pcfg_pull_up_drv_level_1>; - }; - }; - - spi4 { - /omit-if-no-ref/ - spi4m0_pins: spi4m0-pins { - rockchip,pins = - /* spi4_clk_m0 */ - <1 RK_PC2 8 &pcfg_pull_up_drv_level_1>, - /* spi4_miso_m0 */ - <1 RK_PC0 8 &pcfg_pull_up_drv_level_1>, - /* spi4_mosi_m0 */ - <1 RK_PC1 8 &pcfg_pull_up_drv_level_1>; - }; - - /omit-if-no-ref/ - spi4m0_cs0: spi4m0-cs0 { - rockchip,pins = - /* spi4_cs0_m0 */ - <1 RK_PC3 8 &pcfg_pull_up_drv_level_1>; - }; - - /omit-if-no-ref/ - spi4m0_cs1: spi4m0-cs1 { - rockchip,pins = - /* spi4_cs1_m0 */ - <1 RK_PC4 8 &pcfg_pull_up_drv_level_1>; - }; - - /omit-if-no-ref/ - spi4m1_pins: spi4m1-pins { - rockchip,pins = - /* spi4_clk_m1 */ - <3 RK_PA2 8 &pcfg_pull_up_drv_level_1>, - /* spi4_miso_m1 */ - <3 RK_PA0 8 &pcfg_pull_up_drv_level_1>, - /* spi4_mosi_m1 */ - <3 RK_PA1 8 &pcfg_pull_up_drv_level_1>; - }; - - /omit-if-no-ref/ - spi4m1_cs0: spi4m1-cs0 { - rockchip,pins = - /* spi4_cs0_m1 */ - <3 RK_PA3 8 &pcfg_pull_up_drv_level_1>; - }; - - /omit-if-no-ref/ - spi4m1_cs1: spi4m1-cs1 { - rockchip,pins = - /* spi4_cs1_m1 */ - <3 RK_PA4 8 &pcfg_pull_up_drv_level_1>; - }; - - /omit-if-no-ref/ - spi4m2_pins: spi4m2-pins { - rockchip,pins = - /* spi4_clk_m2 */ - <1 RK_PA2 8 &pcfg_pull_up_drv_level_1>, - /* spi4_miso_m2 */ - <1 RK_PA0 8 &pcfg_pull_up_drv_level_1>, - /* spi4_mosi_m2 */ - <1 RK_PA1 8 &pcfg_pull_up_drv_level_1>; - }; - - /omit-if-no-ref/ - spi4m2_cs0: spi4m2-cs0 { - rockchip,pins = - /* spi4_cs0_m2 */ - <1 RK_PA3 8 &pcfg_pull_up_drv_level_1>; - }; - }; - - tsadc { - /omit-if-no-ref/ - tsadcm1_shut: tsadcm1-shut { - rockchip,pins = - /* tsadcm1_shut */ - <0 RK_PA2 2 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - tsadc_shut: tsadc-shut { - rockchip,pins = - /* tsadc_shut */ - <0 RK_PA1 2 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - tsadc_shut_org: tsadc-shut-org { - rockchip,pins = - /* tsadc_shut_org */ - <0 RK_PA1 1 &pcfg_pull_none>; - }; - }; - - uart0 { - /omit-if-no-ref/ - uart0m0_xfer: uart0m0-xfer { - rockchip,pins = - /* uart0_rx_m0 */ - <0 RK_PC4 4 &pcfg_pull_up>, - /* uart0_tx_m0 */ - <0 RK_PC5 4 &pcfg_pull_up>; - }; - - /omit-if-no-ref/ - uart0m1_xfer: uart0m1-xfer { - rockchip,pins = - /* uart0_rx_m1 */ - <0 RK_PB0 4 &pcfg_pull_up>, - /* uart0_tx_m1 */ - <0 RK_PB1 4 &pcfg_pull_up>; - }; - - /omit-if-no-ref/ - uart0m2_xfer: uart0m2-xfer { - rockchip,pins = - /* uart0_rx_m2 */ - <4 RK_PA4 10 &pcfg_pull_up>, - /* uart0_tx_m2 */ - <4 RK_PA3 10 &pcfg_pull_up>; - }; - - /omit-if-no-ref/ - uart0_ctsn: uart0-ctsn { - rockchip,pins = - /* uart0_ctsn */ - <0 RK_PD1 4 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - uart0_rtsn: uart0-rtsn { - rockchip,pins = - /* uart0_rtsn */ - <0 RK_PC6 4 &pcfg_pull_none>; - }; - }; - - uart1 { - /omit-if-no-ref/ - uart1m1_xfer: uart1m1-xfer { - rockchip,pins = - /* uart1_rx_m1 */ - <1 RK_PB7 10 &pcfg_pull_up>, - /* uart1_tx_m1 */ - <1 RK_PB6 10 &pcfg_pull_up>; - }; - - /omit-if-no-ref/ - uart1m1_ctsn: uart1m1-ctsn { - rockchip,pins = - /* uart1m1_ctsn */ - <1 RK_PD7 10 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - uart1m1_rtsn: uart1m1-rtsn { - rockchip,pins = - /* uart1m1_rtsn */ - <1 RK_PD6 10 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - uart1m2_xfer: uart1m2-xfer { - rockchip,pins = - /* uart1_rx_m2 */ - <0 RK_PD2 10 &pcfg_pull_up>, - /* uart1_tx_m2 */ - <0 RK_PD1 10 &pcfg_pull_up>; - }; - - /omit-if-no-ref/ - uart1m2_ctsn: uart1m2-ctsn { - rockchip,pins = - /* uart1m2_ctsn */ - <0 RK_PD0 10 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - uart1m2_rtsn: uart1m2-rtsn { - rockchip,pins = - /* uart1m2_rtsn */ - <0 RK_PC7 10 &pcfg_pull_none>; - }; - }; - - uart2 { - /omit-if-no-ref/ - uart2m0_xfer: uart2m0-xfer { - rockchip,pins = - /* uart2_rx_m0 */ - <0 RK_PB6 10 &pcfg_pull_up>, - /* uart2_tx_m0 */ - <0 RK_PB5 10 &pcfg_pull_up>; - }; - - /omit-if-no-ref/ - uart2m1_xfer: uart2m1-xfer { - rockchip,pins = - /* uart2_rx_m1 */ - <4 RK_PD1 10 &pcfg_pull_up>, - /* uart2_tx_m1 */ - <4 RK_PD0 10 &pcfg_pull_up>; - }; - - /omit-if-no-ref/ - uart2m2_xfer: uart2m2-xfer { - rockchip,pins = - /* uart2_rx_m2 */ - <3 RK_PB2 10 &pcfg_pull_up>, - /* uart2_tx_m2 */ - <3 RK_PB1 10 &pcfg_pull_up>; - }; - - /omit-if-no-ref/ - uart2_ctsn: uart2-ctsn { - rockchip,pins = - /* uart2_ctsn */ - <3 RK_PB4 10 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - uart2_rtsn: uart2-rtsn { - rockchip,pins = - /* uart2_rtsn */ - <3 RK_PB3 10 &pcfg_pull_none>; - }; - }; - - uart3 { - /omit-if-no-ref/ - uart3m0_xfer: uart3m0-xfer { - rockchip,pins = - /* uart3_rx_m0 */ - <1 RK_PC0 10 &pcfg_pull_up>, - /* uart3_tx_m0 */ - <1 RK_PC1 10 &pcfg_pull_up>; - }; - - /omit-if-no-ref/ - uart3m1_xfer: uart3m1-xfer { - rockchip,pins = - /* uart3_rx_m1 */ - <3 RK_PB6 10 &pcfg_pull_up>, - /* uart3_tx_m1 */ - <3 RK_PB5 10 &pcfg_pull_up>; - }; - - /omit-if-no-ref/ - uart3m2_xfer: uart3m2-xfer { - rockchip,pins = - /* uart3_rx_m2 */ - <4 RK_PA6 10 &pcfg_pull_up>, - /* uart3_tx_m2 */ - <4 RK_PA5 10 &pcfg_pull_up>; - }; - - /omit-if-no-ref/ - uart3_ctsn: uart3-ctsn { - rockchip,pins = - /* uart3_ctsn */ - <1 RK_PC3 10 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - uart3_rtsn: uart3-rtsn { - rockchip,pins = - /* uart3_rtsn */ - <1 RK_PC2 10 &pcfg_pull_none>; - }; - }; - - uart4 { - /omit-if-no-ref/ - uart4m0_xfer: uart4m0-xfer { - rockchip,pins = - /* uart4_rx_m0 */ - <1 RK_PD3 10 &pcfg_pull_up>, - /* uart4_tx_m0 */ - <1 RK_PD2 10 &pcfg_pull_up>; - }; - - /omit-if-no-ref/ - uart4m1_xfer: uart4m1-xfer { - rockchip,pins = - /* uart4_rx_m1 */ - <3 RK_PD0 10 &pcfg_pull_up>, - /* uart4_tx_m1 */ - <3 RK_PD1 10 &pcfg_pull_up>; - }; - - /omit-if-no-ref/ - uart4m2_xfer: uart4m2-xfer { - rockchip,pins = - /* uart4_rx_m2 */ - <1 RK_PB2 10 &pcfg_pull_up>, - /* uart4_tx_m2 */ - <1 RK_PB3 10 &pcfg_pull_up>; - }; - - /omit-if-no-ref/ - uart4_ctsn: uart4-ctsn { - rockchip,pins = - /* uart4_ctsn */ - <1 RK_PC7 10 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - uart4_rtsn: uart4-rtsn { - rockchip,pins = - /* uart4_rtsn */ - <1 RK_PC5 10 &pcfg_pull_none>; - }; - }; - - uart5 { - /omit-if-no-ref/ - uart5m0_xfer: uart5m0-xfer { - rockchip,pins = - /* uart5_rx_m0 */ - <4 RK_PD4 10 &pcfg_pull_up>, - /* uart5_tx_m0 */ - <4 RK_PD5 10 &pcfg_pull_up>; - }; - - /omit-if-no-ref/ - uart5m0_ctsn: uart5m0-ctsn { - rockchip,pins = - /* uart5m0_ctsn */ - <4 RK_PD2 10 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - uart5m0_rtsn: uart5m0-rtsn { - rockchip,pins = - /* uart5m0_rtsn */ - <4 RK_PD3 10 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - uart5m1_xfer: uart5m1-xfer { - rockchip,pins = - /* uart5_rx_m1 */ - <3 RK_PC5 10 &pcfg_pull_up>, - /* uart5_tx_m1 */ - <3 RK_PC4 10 &pcfg_pull_up>; - }; - - /omit-if-no-ref/ - uart5m1_ctsn: uart5m1-ctsn { - rockchip,pins = - /* uart5m1_ctsn */ - <2 RK_PA2 10 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - uart5m1_rtsn: uart5m1-rtsn { - rockchip,pins = - /* uart5m1_rtsn */ - <2 RK_PA3 10 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - uart5m2_xfer: uart5m2-xfer { - rockchip,pins = - /* uart5_rx_m2 */ - <2 RK_PD4 10 &pcfg_pull_up>, - /* uart5_tx_m2 */ - <2 RK_PD5 10 &pcfg_pull_up>; - }; - }; - - uart6 { - /omit-if-no-ref/ - uart6m1_xfer: uart6m1-xfer { - rockchip,pins = - /* uart6_rx_m1 */ - <1 RK_PA0 10 &pcfg_pull_up>, - /* uart6_tx_m1 */ - <1 RK_PA1 10 &pcfg_pull_up>; - }; - - /omit-if-no-ref/ - uart6m1_ctsn: uart6m1-ctsn { - rockchip,pins = - /* uart6m1_ctsn */ - <1 RK_PA3 10 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - uart6m1_rtsn: uart6m1-rtsn { - rockchip,pins = - /* uart6m1_rtsn */ - <1 RK_PA2 10 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - uart6m2_xfer: uart6m2-xfer { - rockchip,pins = - /* uart6_rx_m2 */ - <1 RK_PD1 10 &pcfg_pull_up>, - /* uart6_tx_m2 */ - <1 RK_PD0 10 &pcfg_pull_up>; - }; - }; - - uart7 { - /omit-if-no-ref/ - uart7m1_xfer: uart7m1-xfer { - rockchip,pins = - /* uart7_rx_m1 */ - <3 RK_PC1 10 &pcfg_pull_up>, - /* uart7_tx_m1 */ - <3 RK_PC0 10 &pcfg_pull_up>; - }; - - /omit-if-no-ref/ - uart7m1_ctsn: uart7m1-ctsn { - rockchip,pins = - /* uart7m1_ctsn */ - <3 RK_PC3 10 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - uart7m1_rtsn: uart7m1-rtsn { - rockchip,pins = - /* uart7m1_rtsn */ - <3 RK_PC2 10 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - uart7m2_xfer: uart7m2-xfer { - rockchip,pins = - /* uart7_rx_m2 */ - <1 RK_PB4 10 &pcfg_pull_up>, - /* uart7_tx_m2 */ - <1 RK_PB5 10 &pcfg_pull_up>; - }; - }; - - uart8 { - /omit-if-no-ref/ - uart8m0_xfer: uart8m0-xfer { - rockchip,pins = - /* uart8_rx_m0 */ - <4 RK_PB1 10 &pcfg_pull_up>, - /* uart8_tx_m0 */ - <4 RK_PB0 10 &pcfg_pull_up>; - }; - - /omit-if-no-ref/ - uart8m0_ctsn: uart8m0-ctsn { - rockchip,pins = - /* uart8m0_ctsn */ - <4 RK_PB3 10 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - uart8m0_rtsn: uart8m0-rtsn { - rockchip,pins = - /* uart8m0_rtsn */ - <4 RK_PB2 10 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - uart8m1_xfer: uart8m1-xfer { - rockchip,pins = - /* uart8_rx_m1 */ - <3 RK_PA3 10 &pcfg_pull_up>, - /* uart8_tx_m1 */ - <3 RK_PA2 10 &pcfg_pull_up>; - }; - - /omit-if-no-ref/ - uart8m1_ctsn: uart8m1-ctsn { - rockchip,pins = - /* uart8m1_ctsn */ - <3 RK_PA5 10 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - uart8m1_rtsn: uart8m1-rtsn { - rockchip,pins = - /* uart8m1_rtsn */ - <3 RK_PA4 10 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - uart8_xfer: uart8-xfer { - rockchip,pins = - /* uart8_rx_ */ - <4 RK_PB1 10 &pcfg_pull_up>; - }; - }; - - uart9 { - /omit-if-no-ref/ - uart9m0_xfer: uart9m0-xfer { - rockchip,pins = - /* uart9_rx_m0 */ - <2 RK_PC4 10 &pcfg_pull_up>, - /* uart9_tx_m0 */ - <2 RK_PC2 10 &pcfg_pull_up>; - }; - - /omit-if-no-ref/ - uart9m1_xfer: uart9m1-xfer { - rockchip,pins = - /* uart9_rx_m1 */ - <4 RK_PB5 10 &pcfg_pull_up>, - /* uart9_tx_m1 */ - <4 RK_PB4 10 &pcfg_pull_up>; - }; - - /omit-if-no-ref/ - uart9m1_ctsn: uart9m1-ctsn { - rockchip,pins = - /* uart9m1_ctsn */ - <4 RK_PA1 10 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - uart9m1_rtsn: uart9m1-rtsn { - rockchip,pins = - /* uart9m1_rtsn */ - <4 RK_PA0 10 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - uart9m2_xfer: uart9m2-xfer { - rockchip,pins = - /* uart9_rx_m2 */ - <3 RK_PD4 10 &pcfg_pull_up>, - /* uart9_tx_m2 */ - <3 RK_PD5 10 &pcfg_pull_up>; - }; - - /omit-if-no-ref/ - uart9m2_ctsn: uart9m2-ctsn { - rockchip,pins = - /* uart9m2_ctsn */ - <3 RK_PD3 10 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - uart9m2_rtsn: uart9m2-rtsn { - rockchip,pins = - /* uart9m2_rtsn */ - <3 RK_PD2 10 &pcfg_pull_none>; - }; - }; - - vop { - /omit-if-no-ref/ - vop_pins: vop-pins { - rockchip,pins = - /* vop_post_empty */ - <1 RK_PA2 1 &pcfg_pull_none>; - }; - }; -}; - -/* - * This part is edited handly. - */ -&pinctrl { - bt656 { - /omit-if-no-ref/ - bt656_pins: bt656-pins { - rockchip,pins = - /* bt1120_clkout */ - <4 RK_PB0 2 &pcfg_pull_none_drv_level_2>, - /* bt1120_d0 */ - <4 RK_PA0 2 &pcfg_pull_none_drv_level_2>, - /* bt1120_d1 */ - <4 RK_PA1 2 &pcfg_pull_none_drv_level_2>, - /* bt1120_d2 */ - <4 RK_PA2 2 &pcfg_pull_none_drv_level_2>, - /* bt1120_d3 */ - <4 RK_PA3 2 &pcfg_pull_none_drv_level_2>, - /* bt1120_d4 */ - <4 RK_PA4 2 &pcfg_pull_none_drv_level_2>, - /* bt1120_d5 */ - <4 RK_PA5 2 &pcfg_pull_none_drv_level_2>, - /* bt1120_d6 */ - <4 RK_PA6 2 &pcfg_pull_none_drv_level_2>, - /* bt1120_d7 */ - <4 RK_PA7 2 &pcfg_pull_none_drv_level_2>; - }; - }; - - gpio-func { - /omit-if-no-ref/ - tsadc_gpio_func: tsadc-gpio-func { - rockchip,pins = - <0 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; -}; diff --git a/arch/arm/dts/rk3588s-rock-5a.dts b/arch/arm/dts/rk3588s-rock-5a.dts deleted file mode 100644 index 2002fd0221f..00000000000 --- a/arch/arm/dts/rk3588s-rock-5a.dts +++ /dev/null @@ -1,744 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) - -/dts-v1/; - -#include -#include -#include -#include "rk3588s.dtsi" - -/ { - model = "Radxa ROCK 5 Model A"; - compatible = "radxa,rock-5a", "rockchip,rk3588s"; - - aliases { - ethernet0 = &gmac1; - mmc0 = &sdhci; - mmc1 = &sdmmc; - }; - - analog-sound { - compatible = "audio-graph-card"; - label = "rk3588-es8316"; - - widgets = "Microphone", "Mic Jack", - "Headphone", "Headphones"; - - routing = "MIC2", "Mic Jack", - "Headphones", "HPOL", - "Headphones", "HPOR"; - - dais = <&i2s0_8ch_p0>; - }; - - chosen { - stdout-path = "serial2:1500000n8"; - }; - - leds { - compatible = "gpio-leds"; - pinctrl-names = "default"; - pinctrl-0 = <&io_led>; - - io-led { - color = ; - function = LED_FUNCTION_STATUS; - gpios = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>; - linux,default-trigger = "heartbeat"; - }; - }; - - fan: pwm-fan { - compatible = "pwm-fan"; - cooling-levels = <0 95 145 195 255>; - fan-supply = <&vcc_5v0>; - pwms = <&pwm3 0 50000 0>; - #cooling-cells = <2>; - }; - - vcc12v_dcin: vcc12v-dcin-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc12v_dcin"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <12000000>; - regulator-max-microvolt = <12000000>; - }; - - vcc5v0_host: vcc5v0-host-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc5v0_host"; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - enable-active-high; - gpio = <&gpio4 RK_PB5 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&vcc5v0_host_en>; - vin-supply = <&vcc5v0_sys>; - }; - - vcc5v0_sys: vcc5v0-sys-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc5v0_sys"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - vin-supply = <&vcc12v_dcin>; - }; - - vcc_5v0: vcc-5v0-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc_5v0"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - regulator-boot-on; - regulator-always-on; - enable-active-high; - gpio = <&gpio4 RK_PA3 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&vcc_5v0_en>; - vin-supply = <&vcc5v0_sys>; - }; - - vcc_1v1_nldo_s3: vcc-1v1-nldo-s3-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc_1v1_nldo_s3"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1100000>; - regulator-max-microvolt = <1100000>; - vin-supply = <&vcc5v0_sys>; - }; -}; - -&combphy2_psu { - status = "okay"; -}; - -&cpu_b0 { - cpu-supply = <&vdd_cpu_big0_s0>; -}; - -&cpu_b1 { - cpu-supply = <&vdd_cpu_big0_s0>; -}; - -&cpu_b2 { - cpu-supply = <&vdd_cpu_big1_s0>; -}; - -&cpu_b3 { - cpu-supply = <&vdd_cpu_big1_s0>; -}; - -&cpu_l0 { - cpu-supply = <&vdd_cpu_lit_s0>; -}; - -&cpu_l1 { - cpu-supply = <&vdd_cpu_lit_s0>; -}; - -&cpu_l2 { - cpu-supply = <&vdd_cpu_lit_s0>; -}; - -&cpu_l3 { - cpu-supply = <&vdd_cpu_lit_s0>; -}; - -&i2c0 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c0m2_xfer>; - status = "okay"; - - vdd_cpu_big0_s0: regulator@42 { - compatible = "rockchip,rk8602"; - reg = <0x42>; - fcs,suspend-voltage-selector = <1>; - regulator-name = "vdd_cpu_big0_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <550000>; - regulator-max-microvolt = <1050000>; - regulator-ramp-delay = <2300>; - vin-supply = <&vcc5v0_sys>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_cpu_big1_s0: regulator@43 { - compatible = "rockchip,rk8603", "rockchip,rk8602"; - reg = <0x43>; - fcs,suspend-voltage-selector = <1>; - regulator-name = "vdd_cpu_big1_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <550000>; - regulator-max-microvolt = <1050000>; - regulator-ramp-delay = <2300>; - vin-supply = <&vcc5v0_sys>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; -}; - -&i2c2 { - status = "okay"; - - vdd_npu_s0: regulator@42 { - compatible = "rockchip,rk8602"; - reg = <0x42>; - fcs,suspend-voltage-selector = <1>; - regulator-name = "vdd_npu_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <550000>; - regulator-max-microvolt = <950000>; - regulator-ramp-delay = <2300>; - vin-supply = <&vcc5v0_sys>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - eeprom: eeprom@50 { - compatible = "belling,bl24c16a", "atmel,24c16"; - reg = <0x50>; - pagesize = <16>; - }; -}; - -&i2c3 { - status = "okay"; -}; - -&i2c5 { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&i2c5m2_xfer>; -}; - -&i2c7 { - status = "okay"; - - es8316: audio-codec@11 { - compatible = "everest,es8316"; - reg = <0x11>; - clocks = <&cru I2S0_8CH_MCLKOUT>; - clock-names = "mclk"; - assigned-clocks = <&cru I2S0_8CH_MCLKOUT>; - assigned-clock-rates = <12288000>; - #sound-dai-cells = <0>; - - port { - es8316_p0_0: endpoint { - remote-endpoint = <&i2s0_8ch_p0_0>; - }; - }; - }; -}; - -&i2s0_8ch { - pinctrl-names = "default"; - pinctrl-0 = <&i2s0_lrck - &i2s0_mclk - &i2s0_sclk - &i2s0_sdi0 - &i2s0_sdo0>; - status = "okay"; - - i2s0_8ch_p0: port { - i2s0_8ch_p0_0: endpoint { - dai-format = "i2s"; - mclk-fs = <256>; - remote-endpoint = <&es8316_p0_0>; - }; - }; -}; - -&gmac1 { - clock_in_out = "output"; - phy-handle = <&rgmii_phy1>; - phy-mode = "rgmii"; - pinctrl-0 = <&gmac1_miim - &gmac1_tx_bus2 - &gmac1_rx_bus2 - &gmac1_rgmii_clk - &gmac1_rgmii_bus>; - pinctrl-names = "default"; - tx_delay = <0x3a>; - rx_delay = <0x3e>; - status = "okay"; -}; - -&mdio1 { - rgmii_phy1: ethernet-phy@1 { - /* RTL8211F */ - compatible = "ethernet-phy-id001c.c916"; - reg = <0x1>; - pinctrl-names = "default"; - pinctrl-0 = <&rtl8211f_rst>; - reset-assert-us = <20000>; - reset-deassert-us = <100000>; - reset-gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; - }; -}; - -&pinctrl { - leds { - io_led: io-led { - rockchip,pins = <3 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - power { - vcc_5v0_en: vcc-5v0-en { - rockchip,pins = <4 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - rtl8211f { - rtl8211f_rst: rtl8211f-rst { - rockchip,pins = <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - usb { - vcc5v0_host_en: vcc5v0-host-en { - rockchip,pins = <4 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - wifibt { - wl_reset: wl-reset { - rockchip,pins = <0 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up>; - }; - - wl_dis: wl-dis { - rockchip,pins = <0 RK_PD5 RK_FUNC_GPIO &pcfg_output_high>; - }; - - wl_wake_host: wl-wake-host { - rockchip,pins = <0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_up>; - }; - - bt_dis: bt-dis { - rockchip,pins = <0 RK_PD4 RK_FUNC_GPIO &pcfg_output_high>; - }; - - bt_wake_host: bt-wake-host { - rockchip,pins = <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; -}; - -&pwm3 { - pinctrl-names = "default"; - pinctrl-0 = <&pwm3m1_pins>; - status = "okay"; -}; - -&saradc { - vref-supply = <&avcc_1v8_s0>; - status = "okay"; -}; - -&sdhci { - bus-width = <8>; - no-sdio; - no-sd; - non-removable; - mmc-hs400-1_8v; - mmc-hs400-enhanced-strobe; - status = "okay"; -}; - -&sdmmc { - bus-width = <4>; - cap-mmc-highspeed; - cap-sd-highspeed; - cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>; - disable-wp; - max-frequency = <150000000>; - no-sdio; - no-mmc; - sd-uhs-sdr104; - vmmc-supply = <&vcc_3v3_s0>; - vqmmc-supply = <&vccio_sd_s0>; - status = "okay"; -}; - -&spi2 { - status = "okay"; - assigned-clocks = <&cru CLK_SPI2>; - assigned-clock-rates = <200000000>; - num-cs = <1>; - pinctrl-names = "default"; - pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>; - - pmic@0 { - compatible = "rockchip,rk806"; - reg = <0x0>; - interrupt-parent = <&gpio0>; - interrupts = <7 IRQ_TYPE_LEVEL_LOW>; - pinctrl-names = "default"; - pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>, - <&rk806_dvs2_null>, <&rk806_dvs3_null>; - spi-max-frequency = <1000000>; - - vcc1-supply = <&vcc5v0_sys>; - vcc2-supply = <&vcc5v0_sys>; - vcc3-supply = <&vcc5v0_sys>; - vcc4-supply = <&vcc5v0_sys>; - vcc5-supply = <&vcc5v0_sys>; - vcc6-supply = <&vcc5v0_sys>; - vcc7-supply = <&vcc5v0_sys>; - vcc8-supply = <&vcc5v0_sys>; - vcc9-supply = <&vcc5v0_sys>; - vcc10-supply = <&vcc5v0_sys>; - vcc11-supply = <&vcc_2v0_pldo_s3>; - vcc12-supply = <&vcc5v0_sys>; - vcc13-supply = <&vcc_1v1_nldo_s3>; - vcc14-supply = <&vcc_1v1_nldo_s3>; - vcca-supply = <&vcc5v0_sys>; - - gpio-controller; - #gpio-cells = <2>; - - rk806_dvs1_null: dvs1-null-pins { - pins = "gpio_pwrctrl2"; - function = "pin_fun0"; - }; - - rk806_dvs2_null: dvs2-null-pins { - pins = "gpio_pwrctrl2"; - function = "pin_fun0"; - }; - - rk806_dvs3_null: dvs3-null-pins { - pins = "gpio_pwrctrl3"; - function = "pin_fun0"; - }; - - regulators { - vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 { - regulator-name = "vdd_gpu_s0"; - regulator-boot-on; - regulator-min-microvolt = <550000>; - regulator-max-microvolt = <950000>; - regulator-ramp-delay = <12500>; - regulator-enable-ramp-delay = <400>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 { - regulator-name = "vdd_cpu_lit_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <550000>; - regulator-max-microvolt = <950000>; - regulator-ramp-delay = <12500>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_log_s0: dcdc-reg3 { - regulator-name = "vdd_log_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <675000>; - regulator-max-microvolt = <750000>; - regulator-ramp-delay = <12500>; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <750000>; - }; - }; - - vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 { - regulator-name = "vdd_vdenc_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <550000>; - regulator-max-microvolt = <950000>; - regulator-ramp-delay = <12500>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_ddr_s0: dcdc-reg5 { - regulator-name = "vdd_ddr_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <675000>; - regulator-max-microvolt = <900000>; - regulator-ramp-delay = <12500>; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <850000>; - }; - }; - - vdd2_ddr_s3: dcdc-reg6 { - regulator-name = "vdd2_ddr_s3"; - regulator-always-on; - regulator-boot-on; - - regulator-state-mem { - regulator-on-in-suspend; - }; - }; - - vcc_2v0_pldo_s3: dcdc-reg7 { - regulator-name = "vdd_2v0_pldo_s3"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <2000000>; - regulator-max-microvolt = <2000000>; - regulator-ramp-delay = <12500>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <2000000>; - }; - }; - - vcc_3v3_s3: dcdc-reg8 { - regulator-name = "vcc_3v3_s3"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <3300000>; - }; - }; - - vddq_ddr_s0: dcdc-reg9 { - regulator-name = "vddq_ddr_s0"; - regulator-always-on; - regulator-boot-on; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_1v8_s3: dcdc-reg10 { - regulator-name = "vcc_1v8_s3"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - avcc_1v8_s0: pldo-reg1 { - regulator-name = "avcc_1v8_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_1v8_s0: pldo-reg2 { - regulator-name = "vcc_1v8_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - avdd_1v2_s0: pldo-reg3 { - regulator-name = "avdd_1v2_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1200000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_3v3_s0: pldo-reg4 { - regulator-name = "vcc_3v3_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-ramp-delay = <12500>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vccio_sd_s0: pldo-reg5 { - regulator-name = "vccio_sd_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - regulator-ramp-delay = <12500>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - pldo6_s3: pldo-reg6 { - regulator-name = "pldo6_s3"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vdd_0v75_s3: nldo-reg1 { - regulator-name = "vdd_0v75_s3"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <750000>; - regulator-max-microvolt = <750000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <750000>; - }; - }; - - vdd_ddr_pll_s0: nldo-reg2 { - regulator-name = "vdd_ddr_pll_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <850000>; - regulator-max-microvolt = <850000>; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <850000>; - }; - }; - - avdd_0v75_s0: nldo-reg3 { - regulator-name = "avdd_0v75_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <750000>; - regulator-max-microvolt = <750000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_0v85_s0: nldo-reg4 { - regulator-name = "vdd_0v85_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <850000>; - regulator-max-microvolt = <850000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_0v75_s0: nldo-reg5 { - regulator-name = "vdd_0v75_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <750000>; - regulator-max-microvolt = <750000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - }; - }; -}; - -&u2phy2 { - status = "okay"; -}; - -&u2phy2_host { - status = "okay"; - phy-supply = <&vcc5v0_host>; -}; - -&u2phy3 { - status = "okay"; -}; - -&u2phy3_host { - phy-supply = <&vcc5v0_host>; - status = "okay"; -}; - -&uart2 { - pinctrl-0 = <&uart2m0_xfer>; - status = "okay"; -}; - -&usb_host0_ehci { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&wl_reset &wl_dis &wl_wake_host &bt_dis &bt_wake_host>; -}; - -&usb_host0_ohci { - status = "okay"; -}; - -&usb_host1_ehci { - status = "okay"; -}; - -&usb_host1_ohci { - status = "okay"; -}; - -&usb_host2_xhci { - status = "okay"; -}; diff --git a/arch/arm/dts/rk3588s.dtsi b/arch/arm/dts/rk3588s.dtsi deleted file mode 100644 index 36b1b7acfe6..00000000000 --- a/arch/arm/dts/rk3588s.dtsi +++ /dev/null @@ -1,2485 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (c) 2021 Rockchip Electronics Co., Ltd. - */ - -#include -#include -#include -#include -#include -#include -#include - -/ { - compatible = "rockchip,rk3588"; - - interrupt-parent = <&gic>; - #address-cells = <2>; - #size-cells = <2>; - - aliases { - gpio0 = &gpio0; - gpio1 = &gpio1; - gpio2 = &gpio2; - gpio3 = &gpio3; - gpio4 = &gpio4; - i2c0 = &i2c0; - i2c1 = &i2c1; - i2c2 = &i2c2; - i2c3 = &i2c3; - i2c4 = &i2c4; - i2c5 = &i2c5; - i2c6 = &i2c6; - i2c7 = &i2c7; - i2c8 = &i2c8; - serial0 = &uart0; - serial1 = &uart1; - serial2 = &uart2; - serial3 = &uart3; - serial4 = &uart4; - serial5 = &uart5; - serial6 = &uart6; - serial7 = &uart7; - serial8 = &uart8; - serial9 = &uart9; - spi0 = &spi0; - spi1 = &spi1; - spi2 = &spi2; - spi3 = &spi3; - spi4 = &spi4; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu-map { - cluster0 { - core0 { - cpu = <&cpu_l0>; - }; - core1 { - cpu = <&cpu_l1>; - }; - core2 { - cpu = <&cpu_l2>; - }; - core3 { - cpu = <&cpu_l3>; - }; - }; - cluster1 { - core0 { - cpu = <&cpu_b0>; - }; - core1 { - cpu = <&cpu_b1>; - }; - }; - cluster2 { - core0 { - cpu = <&cpu_b2>; - }; - core1 { - cpu = <&cpu_b3>; - }; - }; - }; - - cpu_l0: cpu@0 { - device_type = "cpu"; - compatible = "arm,cortex-a55"; - reg = <0x0>; - enable-method = "psci"; - capacity-dmips-mhz = <530>; - clocks = <&scmi_clk SCMI_CLK_CPUL>; - assigned-clocks = <&scmi_clk SCMI_CLK_CPUL>; - assigned-clock-rates = <816000000>; - cpu-idle-states = <&CPU_SLEEP>; - i-cache-size = <32768>; - i-cache-line-size = <64>; - i-cache-sets = <128>; - d-cache-size = <32768>; - d-cache-line-size = <64>; - d-cache-sets = <128>; - next-level-cache = <&l2_cache_l0>; - dynamic-power-coefficient = <228>; - #cooling-cells = <2>; - }; - - cpu_l1: cpu@100 { - device_type = "cpu"; - compatible = "arm,cortex-a55"; - reg = <0x100>; - enable-method = "psci"; - capacity-dmips-mhz = <530>; - clocks = <&scmi_clk SCMI_CLK_CPUL>; - cpu-idle-states = <&CPU_SLEEP>; - i-cache-size = <32768>; - i-cache-line-size = <64>; - i-cache-sets = <128>; - d-cache-size = <32768>; - d-cache-line-size = <64>; - d-cache-sets = <128>; - next-level-cache = <&l2_cache_l1>; - dynamic-power-coefficient = <228>; - #cooling-cells = <2>; - }; - - cpu_l2: cpu@200 { - device_type = "cpu"; - compatible = "arm,cortex-a55"; - reg = <0x200>; - enable-method = "psci"; - capacity-dmips-mhz = <530>; - clocks = <&scmi_clk SCMI_CLK_CPUL>; - cpu-idle-states = <&CPU_SLEEP>; - i-cache-size = <32768>; - i-cache-line-size = <64>; - i-cache-sets = <128>; - d-cache-size = <32768>; - d-cache-line-size = <64>; - d-cache-sets = <128>; - next-level-cache = <&l2_cache_l2>; - dynamic-power-coefficient = <228>; - #cooling-cells = <2>; - }; - - cpu_l3: cpu@300 { - device_type = "cpu"; - compatible = "arm,cortex-a55"; - reg = <0x300>; - enable-method = "psci"; - capacity-dmips-mhz = <530>; - clocks = <&scmi_clk SCMI_CLK_CPUL>; - cpu-idle-states = <&CPU_SLEEP>; - i-cache-size = <32768>; - i-cache-line-size = <64>; - i-cache-sets = <128>; - d-cache-size = <32768>; - d-cache-line-size = <64>; - d-cache-sets = <128>; - next-level-cache = <&l2_cache_l3>; - dynamic-power-coefficient = <228>; - #cooling-cells = <2>; - }; - - cpu_b0: cpu@400 { - device_type = "cpu"; - compatible = "arm,cortex-a76"; - reg = <0x400>; - enable-method = "psci"; - capacity-dmips-mhz = <1024>; - clocks = <&scmi_clk SCMI_CLK_CPUB01>; - assigned-clocks = <&scmi_clk SCMI_CLK_CPUB01>; - assigned-clock-rates = <816000000>; - cpu-idle-states = <&CPU_SLEEP>; - i-cache-size = <65536>; - i-cache-line-size = <64>; - i-cache-sets = <256>; - d-cache-size = <65536>; - d-cache-line-size = <64>; - d-cache-sets = <256>; - next-level-cache = <&l2_cache_b0>; - dynamic-power-coefficient = <416>; - #cooling-cells = <2>; - }; - - cpu_b1: cpu@500 { - device_type = "cpu"; - compatible = "arm,cortex-a76"; - reg = <0x500>; - enable-method = "psci"; - capacity-dmips-mhz = <1024>; - clocks = <&scmi_clk SCMI_CLK_CPUB01>; - cpu-idle-states = <&CPU_SLEEP>; - i-cache-size = <65536>; - i-cache-line-size = <64>; - i-cache-sets = <256>; - d-cache-size = <65536>; - d-cache-line-size = <64>; - d-cache-sets = <256>; - next-level-cache = <&l2_cache_b1>; - dynamic-power-coefficient = <416>; - #cooling-cells = <2>; - }; - - cpu_b2: cpu@600 { - device_type = "cpu"; - compatible = "arm,cortex-a76"; - reg = <0x600>; - enable-method = "psci"; - capacity-dmips-mhz = <1024>; - clocks = <&scmi_clk SCMI_CLK_CPUB23>; - assigned-clocks = <&scmi_clk SCMI_CLK_CPUB23>; - assigned-clock-rates = <816000000>; - cpu-idle-states = <&CPU_SLEEP>; - i-cache-size = <65536>; - i-cache-line-size = <64>; - i-cache-sets = <256>; - d-cache-size = <65536>; - d-cache-line-size = <64>; - d-cache-sets = <256>; - next-level-cache = <&l2_cache_b2>; - dynamic-power-coefficient = <416>; - #cooling-cells = <2>; - }; - - cpu_b3: cpu@700 { - device_type = "cpu"; - compatible = "arm,cortex-a76"; - reg = <0x700>; - enable-method = "psci"; - capacity-dmips-mhz = <1024>; - clocks = <&scmi_clk SCMI_CLK_CPUB23>; - cpu-idle-states = <&CPU_SLEEP>; - i-cache-size = <65536>; - i-cache-line-size = <64>; - i-cache-sets = <256>; - d-cache-size = <65536>; - d-cache-line-size = <64>; - d-cache-sets = <256>; - next-level-cache = <&l2_cache_b3>; - dynamic-power-coefficient = <416>; - #cooling-cells = <2>; - }; - - idle-states { - entry-method = "psci"; - CPU_SLEEP: cpu-sleep { - compatible = "arm,idle-state"; - local-timer-stop; - arm,psci-suspend-param = <0x0010000>; - entry-latency-us = <100>; - exit-latency-us = <120>; - min-residency-us = <1000>; - }; - }; - - l2_cache_l0: l2-cache-l0 { - compatible = "cache"; - cache-size = <131072>; - cache-line-size = <64>; - cache-sets = <512>; - cache-level = <2>; - cache-unified; - next-level-cache = <&l3_cache>; - }; - - l2_cache_l1: l2-cache-l1 { - compatible = "cache"; - cache-size = <131072>; - cache-line-size = <64>; - cache-sets = <512>; - cache-level = <2>; - cache-unified; - next-level-cache = <&l3_cache>; - }; - - l2_cache_l2: l2-cache-l2 { - compatible = "cache"; - cache-size = <131072>; - cache-line-size = <64>; - cache-sets = <512>; - cache-level = <2>; - cache-unified; - next-level-cache = <&l3_cache>; - }; - - l2_cache_l3: l2-cache-l3 { - compatible = "cache"; - cache-size = <131072>; - cache-line-size = <64>; - cache-sets = <512>; - cache-level = <2>; - cache-unified; - next-level-cache = <&l3_cache>; - }; - - l2_cache_b0: l2-cache-b0 { - compatible = "cache"; - cache-size = <524288>; - cache-line-size = <64>; - cache-sets = <1024>; - cache-level = <2>; - cache-unified; - next-level-cache = <&l3_cache>; - }; - - l2_cache_b1: l2-cache-b1 { - compatible = "cache"; - cache-size = <524288>; - cache-line-size = <64>; - cache-sets = <1024>; - cache-level = <2>; - cache-unified; - next-level-cache = <&l3_cache>; - }; - - l2_cache_b2: l2-cache-b2 { - compatible = "cache"; - cache-size = <524288>; - cache-line-size = <64>; - cache-sets = <1024>; - cache-level = <2>; - cache-unified; - next-level-cache = <&l3_cache>; - }; - - l2_cache_b3: l2-cache-b3 { - compatible = "cache"; - cache-size = <524288>; - cache-line-size = <64>; - cache-sets = <1024>; - cache-level = <2>; - cache-unified; - next-level-cache = <&l3_cache>; - }; - - l3_cache: l3-cache { - compatible = "cache"; - cache-size = <3145728>; - cache-line-size = <64>; - cache-sets = <4096>; - cache-level = <3>; - cache-unified; - }; - }; - - firmware { - optee: optee { - compatible = "linaro,optee-tz"; - method = "smc"; - }; - - scmi: scmi { - compatible = "arm,scmi-smc"; - arm,smc-id = <0x82000010>; - shmem = <&scmi_shmem>; - #address-cells = <1>; - #size-cells = <0>; - - scmi_clk: protocol@14 { - reg = <0x14>; - #clock-cells = <1>; - }; - - scmi_reset: protocol@16 { - reg = <0x16>; - #reset-cells = <1>; - }; - }; - }; - - pmu-a55 { - compatible = "arm,cortex-a55-pmu"; - interrupts = ; - }; - - pmu-a76 { - compatible = "arm,cortex-a76-pmu"; - interrupts = ; - }; - - psci { - compatible = "arm,psci-1.0"; - method = "smc"; - }; - - spll: clock-0 { - compatible = "fixed-clock"; - clock-frequency = <702000000>; - clock-output-names = "spll"; - #clock-cells = <0>; - }; - - display_subsystem: display-subsystem { - compatible = "rockchip,display-subsystem"; - ports = <&vop_out>; - }; - - timer { - compatible = "arm,armv8-timer"; - interrupts = , - , - , - , - ; - interrupt-names = "sec-phys", "phys", "virt", "hyp-phys", "hyp-virt"; - }; - - xin24m: clock-1 { - compatible = "fixed-clock"; - clock-frequency = <24000000>; - clock-output-names = "xin24m"; - #clock-cells = <0>; - }; - - xin32k: clock-2 { - compatible = "fixed-clock"; - clock-frequency = <32768>; - clock-output-names = "xin32k"; - #clock-cells = <0>; - }; - - pmu_sram: sram@10f000 { - compatible = "mmio-sram"; - reg = <0x0 0x0010f000 0x0 0x100>; - ranges = <0 0x0 0x0010f000 0x100>; - #address-cells = <1>; - #size-cells = <1>; - - scmi_shmem: sram@0 { - compatible = "arm,scmi-shmem"; - reg = <0x0 0x100>; - }; - }; - - usb_host0_ehci: usb@fc800000 { - compatible = "rockchip,rk3588-ehci", "generic-ehci"; - reg = <0x0 0xfc800000 0x0 0x40000>; - interrupts = ; - clocks = <&cru HCLK_HOST0>, <&cru HCLK_HOST_ARB0>, <&cru ACLK_USB>, <&u2phy2>; - phys = <&u2phy2_host>; - phy-names = "usb"; - power-domains = <&power RK3588_PD_USB>; - status = "disabled"; - }; - - usb_host0_ohci: usb@fc840000 { - compatible = "rockchip,rk3588-ohci", "generic-ohci"; - reg = <0x0 0xfc840000 0x0 0x40000>; - interrupts = ; - clocks = <&cru HCLK_HOST0>, <&cru HCLK_HOST_ARB0>, <&cru ACLK_USB>, <&u2phy2>; - phys = <&u2phy2_host>; - phy-names = "usb"; - power-domains = <&power RK3588_PD_USB>; - status = "disabled"; - }; - - usb_host1_ehci: usb@fc880000 { - compatible = "rockchip,rk3588-ehci", "generic-ehci"; - reg = <0x0 0xfc880000 0x0 0x40000>; - interrupts = ; - clocks = <&cru HCLK_HOST1>, <&cru HCLK_HOST_ARB1>, <&cru ACLK_USB>, <&u2phy3>; - phys = <&u2phy3_host>; - phy-names = "usb"; - power-domains = <&power RK3588_PD_USB>; - status = "disabled"; - }; - - usb_host1_ohci: usb@fc8c0000 { - compatible = "rockchip,rk3588-ohci", "generic-ohci"; - reg = <0x0 0xfc8c0000 0x0 0x40000>; - interrupts = ; - clocks = <&cru HCLK_HOST1>, <&cru HCLK_HOST_ARB1>, <&cru ACLK_USB>, <&u2phy3>; - phys = <&u2phy3_host>; - phy-names = "usb"; - power-domains = <&power RK3588_PD_USB>; - status = "disabled"; - }; - - usb_host2_xhci: usb@fcd00000 { - compatible = "rockchip,rk3588-dwc3", "snps,dwc3"; - reg = <0x0 0xfcd00000 0x0 0x400000>; - interrupts = ; - clocks = <&cru REF_CLK_USB3OTG2>, <&cru SUSPEND_CLK_USB3OTG2>, - <&cru ACLK_USB3OTG2>, <&cru CLK_UTMI_OTG2>, - <&cru CLK_PIPEPHY2_PIPE_U3_G>; - clock-names = "ref_clk", "suspend_clk", "bus_clk", "utmi", "pipe"; - dr_mode = "host"; - phys = <&combphy2_psu PHY_TYPE_USB3>; - phy-names = "usb3-phy"; - phy_type = "utmi_wide"; - resets = <&cru SRST_A_USB3OTG2>; - snps,dis_enblslpm_quirk; - snps,dis-u2-freeclk-exists-quirk; - snps,dis-del-phy-power-chg-quirk; - snps,dis-tx-ipgap-linecheck-quirk; - snps,dis_rxdet_inp3_quirk; - status = "disabled"; - }; - - pmu1grf: syscon@fd58a000 { - compatible = "rockchip,rk3588-pmugrf", "syscon", "simple-mfd"; - reg = <0x0 0xfd58a000 0x0 0x10000>; - }; - - sys_grf: syscon@fd58c000 { - compatible = "rockchip,rk3588-sys-grf", "syscon"; - reg = <0x0 0xfd58c000 0x0 0x1000>; - }; - - vop_grf: syscon@fd5a4000 { - compatible = "rockchip,rk3588-vop-grf", "syscon"; - reg = <0x0 0xfd5a4000 0x0 0x2000>; - }; - - vo1_grf: syscon@fd5a8000 { - compatible = "rockchip,rk3588-vo-grf", "syscon"; - reg = <0x0 0xfd5a8000 0x0 0x100>; - }; - - php_grf: syscon@fd5b0000 { - compatible = "rockchip,rk3588-php-grf", "syscon"; - reg = <0x0 0xfd5b0000 0x0 0x1000>; - }; - - pipe_phy0_grf: syscon@fd5bc000 { - compatible = "rockchip,rk3588-pipe-phy-grf", "syscon"; - reg = <0x0 0xfd5bc000 0x0 0x100>; - }; - - pipe_phy2_grf: syscon@fd5c4000 { - compatible = "rockchip,rk3588-pipe-phy-grf", "syscon"; - reg = <0x0 0xfd5c4000 0x0 0x100>; - }; - - usb2phy2_grf: syscon@fd5d8000 { - compatible = "rockchip,rk3588-usb2phy-grf", "syscon", "simple-mfd"; - reg = <0x0 0xfd5d8000 0x0 0x4000>; - #address-cells = <1>; - #size-cells = <1>; - - u2phy2: usb2-phy@8000 { - compatible = "rockchip,rk3588-usb2phy"; - reg = <0x8000 0x10>; - interrupts = ; - resets = <&cru SRST_OTGPHY_U2_0>, <&cru SRST_P_USB2PHY_U2_0_GRF0>; - reset-names = "phy", "apb"; - clocks = <&cru CLK_USB2PHY_HDPTXRXPHY_REF>; - clock-names = "phyclk"; - clock-output-names = "usb480m_phy2"; - #clock-cells = <0>; - status = "disabled"; - - u2phy2_host: host-port { - #phy-cells = <0>; - status = "disabled"; - }; - }; - }; - - usb2phy3_grf: syscon@fd5dc000 { - compatible = "rockchip,rk3588-usb2phy-grf", "syscon", "simple-mfd"; - reg = <0x0 0xfd5dc000 0x0 0x4000>; - #address-cells = <1>; - #size-cells = <1>; - - u2phy3: usb2-phy@c000 { - compatible = "rockchip,rk3588-usb2phy"; - reg = <0xc000 0x10>; - interrupts = ; - resets = <&cru SRST_OTGPHY_U2_1>, <&cru SRST_P_USB2PHY_U2_1_GRF0>; - reset-names = "phy", "apb"; - clocks = <&cru CLK_USB2PHY_HDPTXRXPHY_REF>; - clock-names = "phyclk"; - clock-output-names = "usb480m_phy3"; - #clock-cells = <0>; - status = "disabled"; - - u2phy3_host: host-port { - #phy-cells = <0>; - status = "disabled"; - }; - }; - }; - - ioc: syscon@fd5f0000 { - compatible = "rockchip,rk3588-ioc", "syscon"; - reg = <0x0 0xfd5f0000 0x0 0x10000>; - }; - - system_sram1: sram@fd600000 { - compatible = "mmio-sram"; - reg = <0x0 0xfd600000 0x0 0x100000>; - ranges = <0x0 0x0 0xfd600000 0x100000>; - #address-cells = <1>; - #size-cells = <1>; - }; - - cru: clock-controller@fd7c0000 { - compatible = "rockchip,rk3588-cru"; - reg = <0x0 0xfd7c0000 0x0 0x5c000>; - assigned-clocks = - <&cru PLL_PPLL>, <&cru PLL_AUPLL>, - <&cru PLL_NPLL>, <&cru PLL_GPLL>, - <&cru ACLK_CENTER_ROOT>, - <&cru HCLK_CENTER_ROOT>, <&cru ACLK_CENTER_LOW_ROOT>, - <&cru ACLK_TOP_ROOT>, <&cru PCLK_TOP_ROOT>, - <&cru ACLK_LOW_TOP_ROOT>, <&cru PCLK_PMU0_ROOT>, - <&cru HCLK_PMU_CM0_ROOT>, <&cru ACLK_VOP>, - <&cru ACLK_BUS_ROOT>, <&cru CLK_150M_SRC>, - <&cru CLK_GPU>; - assigned-clock-rates = - <1100000000>, <786432000>, - <850000000>, <1188000000>, - <702000000>, - <400000000>, <500000000>, - <800000000>, <100000000>, - <400000000>, <100000000>, - <200000000>, <500000000>, - <375000000>, <150000000>, - <200000000>; - rockchip,grf = <&php_grf>; - #clock-cells = <1>; - #reset-cells = <1>; - }; - - i2c0: i2c@fd880000 { - compatible = "rockchip,rk3588-i2c", "rockchip,rk3399-i2c"; - reg = <0x0 0xfd880000 0x0 0x1000>; - interrupts = ; - clocks = <&cru CLK_I2C0>, <&cru PCLK_I2C0>; - clock-names = "i2c", "pclk"; - pinctrl-0 = <&i2c0m0_xfer>; - pinctrl-names = "default"; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - vop: vop@fdd90000 { - compatible = "rockchip,rk3588-vop"; - reg = <0x0 0xfdd90000 0x0 0x4200>, <0x0 0xfdd95000 0x0 0x1000>; - reg-names = "vop", "gamma-lut"; - interrupts = ; - clocks = <&cru ACLK_VOP>, - <&cru HCLK_VOP>, - <&cru DCLK_VOP0>, - <&cru DCLK_VOP1>, - <&cru DCLK_VOP2>, - <&cru DCLK_VOP3>, - <&cru PCLK_VOP_ROOT>; - clock-names = "aclk", - "hclk", - "dclk_vp0", - "dclk_vp1", - "dclk_vp2", - "dclk_vp3", - "pclk_vop"; - iommus = <&vop_mmu>; - power-domains = <&power RK3588_PD_VOP>; - rockchip,grf = <&sys_grf>; - rockchip,vop-grf = <&vop_grf>; - rockchip,vo1-grf = <&vo1_grf>; - rockchip,pmu = <&pmu>; - status = "disabled"; - - vop_out: ports { - #address-cells = <1>; - #size-cells = <0>; - - vp0: port@0 { - #address-cells = <1>; - #size-cells = <0>; - reg = <0>; - }; - - vp1: port@1 { - #address-cells = <1>; - #size-cells = <0>; - reg = <1>; - }; - - vp2: port@2 { - #address-cells = <1>; - #size-cells = <0>; - reg = <2>; - }; - - vp3: port@3 { - #address-cells = <1>; - #size-cells = <0>; - reg = <3>; - }; - }; - }; - - vop_mmu: iommu@fdd97e00 { - compatible = "rockchip,rk3588-iommu", "rockchip,rk3568-iommu"; - reg = <0x0 0xfdd97e00 0x0 0x100>, <0x0 0xfdd97f00 0x0 0x100>; - interrupts = ; - clocks = <&cru ACLK_VOP>, <&cru HCLK_VOP>; - clock-names = "aclk", "iface"; - #iommu-cells = <0>; - power-domains = <&power RK3588_PD_VOP>; - status = "disabled"; - }; - - uart0: serial@fd890000 { - compatible = "rockchip,rk3588-uart", "snps,dw-apb-uart"; - reg = <0x0 0xfd890000 0x0 0x100>; - interrupts = ; - clocks = <&cru SCLK_UART0>, <&cru PCLK_UART0>; - clock-names = "baudclk", "apb_pclk"; - dmas = <&dmac0 6>, <&dmac0 7>; - dma-names = "tx", "rx"; - pinctrl-0 = <&uart0m1_xfer>; - pinctrl-names = "default"; - reg-shift = <2>; - reg-io-width = <4>; - status = "disabled"; - }; - - pwm0: pwm@fd8b0000 { - compatible = "rockchip,rk3588-pwm", "rockchip,rk3328-pwm"; - reg = <0x0 0xfd8b0000 0x0 0x10>; - clocks = <&cru CLK_PMU1PWM>, <&cru PCLK_PMU1PWM>; - clock-names = "pwm", "pclk"; - pinctrl-0 = <&pwm0m0_pins>; - pinctrl-names = "default"; - #pwm-cells = <3>; - status = "disabled"; - }; - - pwm1: pwm@fd8b0010 { - compatible = "rockchip,rk3588-pwm", "rockchip,rk3328-pwm"; - reg = <0x0 0xfd8b0010 0x0 0x10>; - clocks = <&cru CLK_PMU1PWM>, <&cru PCLK_PMU1PWM>; - clock-names = "pwm", "pclk"; - pinctrl-0 = <&pwm1m0_pins>; - pinctrl-names = "default"; - #pwm-cells = <3>; - status = "disabled"; - }; - - pwm2: pwm@fd8b0020 { - compatible = "rockchip,rk3588-pwm", "rockchip,rk3328-pwm"; - reg = <0x0 0xfd8b0020 0x0 0x10>; - clocks = <&cru CLK_PMU1PWM>, <&cru PCLK_PMU1PWM>; - clock-names = "pwm", "pclk"; - pinctrl-0 = <&pwm2m0_pins>; - pinctrl-names = "default"; - #pwm-cells = <3>; - status = "disabled"; - }; - - pwm3: pwm@fd8b0030 { - compatible = "rockchip,rk3588-pwm", "rockchip,rk3328-pwm"; - reg = <0x0 0xfd8b0030 0x0 0x10>; - clocks = <&cru CLK_PMU1PWM>, <&cru PCLK_PMU1PWM>; - clock-names = "pwm", "pclk"; - pinctrl-0 = <&pwm3m0_pins>; - pinctrl-names = "default"; - #pwm-cells = <3>; - status = "disabled"; - }; - - pmu: power-management@fd8d8000 { - compatible = "rockchip,rk3588-pmu", "syscon", "simple-mfd"; - reg = <0x0 0xfd8d8000 0x0 0x400>; - - power: power-controller { - compatible = "rockchip,rk3588-power-controller"; - #address-cells = <1>; - #power-domain-cells = <1>; - #size-cells = <0>; - status = "okay"; - - /* These power domains are grouped by VD_NPU */ - power-domain@RK3588_PD_NPU { - reg = ; - #power-domain-cells = <0>; - #address-cells = <1>; - #size-cells = <0>; - - power-domain@RK3588_PD_NPUTOP { - reg = ; - clocks = <&cru HCLK_NPU_ROOT>, - <&cru PCLK_NPU_ROOT>, - <&cru CLK_NPU_DSU0>, - <&cru HCLK_NPU_CM0_ROOT>; - pm_qos = <&qos_npu0_mwr>, - <&qos_npu0_mro>, - <&qos_mcu_npu>; - #power-domain-cells = <0>; - #address-cells = <1>; - #size-cells = <0>; - - power-domain@RK3588_PD_NPU1 { - reg = ; - clocks = <&cru HCLK_NPU_ROOT>, - <&cru PCLK_NPU_ROOT>, - <&cru CLK_NPU_DSU0>; - pm_qos = <&qos_npu1>; - #power-domain-cells = <0>; - }; - power-domain@RK3588_PD_NPU2 { - reg = ; - clocks = <&cru HCLK_NPU_ROOT>, - <&cru PCLK_NPU_ROOT>, - <&cru CLK_NPU_DSU0>; - pm_qos = <&qos_npu2>; - #power-domain-cells = <0>; - }; - }; - }; - /* These power domains are grouped by VD_GPU */ - power-domain@RK3588_PD_GPU { - reg = ; - clocks = <&cru CLK_GPU>, - <&cru CLK_GPU_COREGROUP>, - <&cru CLK_GPU_STACKS>; - pm_qos = <&qos_gpu_m0>, - <&qos_gpu_m1>, - <&qos_gpu_m2>, - <&qos_gpu_m3>; - #power-domain-cells = <0>; - }; - /* These power domains are grouped by VD_VCODEC */ - power-domain@RK3588_PD_VCODEC { - reg = ; - #address-cells = <1>; - #size-cells = <0>; - #power-domain-cells = <0>; - - power-domain@RK3588_PD_RKVDEC0 { - reg = ; - clocks = <&cru HCLK_RKVDEC0>, - <&cru HCLK_VDPU_ROOT>, - <&cru ACLK_VDPU_ROOT>, - <&cru ACLK_RKVDEC0>, - <&cru ACLK_RKVDEC_CCU>; - pm_qos = <&qos_rkvdec0>; - #power-domain-cells = <0>; - }; - power-domain@RK3588_PD_RKVDEC1 { - reg = ; - clocks = <&cru HCLK_RKVDEC1>, - <&cru HCLK_VDPU_ROOT>, - <&cru ACLK_VDPU_ROOT>, - <&cru ACLK_RKVDEC1>; - pm_qos = <&qos_rkvdec1>; - #power-domain-cells = <0>; - }; - power-domain@RK3588_PD_VENC0 { - reg = ; - clocks = <&cru HCLK_RKVENC0>, - <&cru ACLK_RKVENC0>; - pm_qos = <&qos_rkvenc0_m0ro>, - <&qos_rkvenc0_m1ro>, - <&qos_rkvenc0_m2wo>; - #address-cells = <1>; - #size-cells = <0>; - #power-domain-cells = <0>; - - power-domain@RK3588_PD_VENC1 { - reg = ; - clocks = <&cru HCLK_RKVENC1>, - <&cru HCLK_RKVENC0>, - <&cru ACLK_RKVENC0>, - <&cru ACLK_RKVENC1>; - pm_qos = <&qos_rkvenc1_m0ro>, - <&qos_rkvenc1_m1ro>, - <&qos_rkvenc1_m2wo>; - #power-domain-cells = <0>; - }; - }; - }; - /* These power domains are grouped by VD_LOGIC */ - power-domain@RK3588_PD_VDPU { - reg = ; - clocks = <&cru HCLK_VDPU_ROOT>, - <&cru ACLK_VDPU_LOW_ROOT>, - <&cru ACLK_VDPU_ROOT>, - <&cru ACLK_JPEG_DECODER_ROOT>, - <&cru ACLK_IEP2P0>, - <&cru HCLK_IEP2P0>, - <&cru ACLK_JPEG_ENCODER0>, - <&cru HCLK_JPEG_ENCODER0>, - <&cru ACLK_JPEG_ENCODER1>, - <&cru HCLK_JPEG_ENCODER1>, - <&cru ACLK_JPEG_ENCODER2>, - <&cru HCLK_JPEG_ENCODER2>, - <&cru ACLK_JPEG_ENCODER3>, - <&cru HCLK_JPEG_ENCODER3>, - <&cru ACLK_JPEG_DECODER>, - <&cru HCLK_JPEG_DECODER>, - <&cru ACLK_RGA2>, - <&cru HCLK_RGA2>; - pm_qos = <&qos_iep>, - <&qos_jpeg_dec>, - <&qos_jpeg_enc0>, - <&qos_jpeg_enc1>, - <&qos_jpeg_enc2>, - <&qos_jpeg_enc3>, - <&qos_rga2_mro>, - <&qos_rga2_mwo>; - #address-cells = <1>; - #size-cells = <0>; - #power-domain-cells = <0>; - - - power-domain@RK3588_PD_AV1 { - reg = ; - clocks = <&cru PCLK_AV1>, - <&cru ACLK_AV1>, - <&cru HCLK_VDPU_ROOT>; - pm_qos = <&qos_av1>; - #power-domain-cells = <0>; - }; - power-domain@RK3588_PD_RKVDEC0 { - reg = ; - clocks = <&cru HCLK_RKVDEC0>, - <&cru HCLK_VDPU_ROOT>, - <&cru ACLK_VDPU_ROOT>, - <&cru ACLK_RKVDEC0>; - pm_qos = <&qos_rkvdec0>; - #power-domain-cells = <0>; - }; - power-domain@RK3588_PD_RKVDEC1 { - reg = ; - clocks = <&cru HCLK_RKVDEC1>, - <&cru HCLK_VDPU_ROOT>, - <&cru ACLK_VDPU_ROOT>; - pm_qos = <&qos_rkvdec1>; - #power-domain-cells = <0>; - }; - power-domain@RK3588_PD_RGA30 { - reg = ; - clocks = <&cru ACLK_RGA3_0>, - <&cru HCLK_RGA3_0>; - pm_qos = <&qos_rga3_0>; - #power-domain-cells = <0>; - }; - }; - power-domain@RK3588_PD_VOP { - reg = ; - clocks = <&cru PCLK_VOP_ROOT>, - <&cru HCLK_VOP_ROOT>, - <&cru ACLK_VOP>; - pm_qos = <&qos_vop_m0>, - <&qos_vop_m1>; - #address-cells = <1>; - #size-cells = <0>; - #power-domain-cells = <0>; - - power-domain@RK3588_PD_VO0 { - reg = ; - clocks = <&cru PCLK_VO0_ROOT>, - <&cru PCLK_VO0_S_ROOT>, - <&cru HCLK_VO0_S_ROOT>, - <&cru ACLK_VO0_ROOT>, - <&cru HCLK_HDCP0>, - <&cru ACLK_HDCP0>, - <&cru HCLK_VOP_ROOT>; - pm_qos = <&qos_hdcp0>; - #power-domain-cells = <0>; - }; - }; - power-domain@RK3588_PD_VO1 { - reg = ; - clocks = <&cru PCLK_VO1_ROOT>, - <&cru PCLK_VO1_S_ROOT>, - <&cru HCLK_VO1_S_ROOT>, - <&cru HCLK_HDCP1>, - <&cru ACLK_HDCP1>, - <&cru ACLK_HDMIRX_ROOT>, - <&cru HCLK_VO1USB_TOP_ROOT>; - pm_qos = <&qos_hdcp1>, - <&qos_hdmirx>; - #power-domain-cells = <0>; - }; - power-domain@RK3588_PD_VI { - reg = ; - clocks = <&cru HCLK_VI_ROOT>, - <&cru PCLK_VI_ROOT>, - <&cru HCLK_ISP0>, - <&cru ACLK_ISP0>, - <&cru HCLK_VICAP>, - <&cru ACLK_VICAP>; - pm_qos = <&qos_isp0_mro>, - <&qos_isp0_mwo>, - <&qos_vicap_m0>, - <&qos_vicap_m1>; - #address-cells = <1>; - #size-cells = <0>; - #power-domain-cells = <0>; - - power-domain@RK3588_PD_ISP1 { - reg = ; - clocks = <&cru HCLK_ISP1>, - <&cru ACLK_ISP1>, - <&cru HCLK_VI_ROOT>, - <&cru PCLK_VI_ROOT>; - pm_qos = <&qos_isp1_mwo>, - <&qos_isp1_mro>; - #power-domain-cells = <0>; - }; - power-domain@RK3588_PD_FEC { - reg = ; - clocks = <&cru HCLK_FISHEYE0>, - <&cru ACLK_FISHEYE0>, - <&cru HCLK_FISHEYE1>, - <&cru ACLK_FISHEYE1>, - <&cru PCLK_VI_ROOT>; - pm_qos = <&qos_fisheye0>, - <&qos_fisheye1>; - #power-domain-cells = <0>; - }; - }; - power-domain@RK3588_PD_RGA31 { - reg = ; - clocks = <&cru HCLK_RGA3_1>, - <&cru ACLK_RGA3_1>; - pm_qos = <&qos_rga3_1>; - #power-domain-cells = <0>; - }; - power-domain@RK3588_PD_USB { - reg = ; - clocks = <&cru PCLK_PHP_ROOT>, - <&cru ACLK_USB_ROOT>, - <&cru ACLK_USB>, - <&cru HCLK_USB_ROOT>, - <&cru HCLK_HOST0>, - <&cru HCLK_HOST_ARB0>, - <&cru HCLK_HOST1>, - <&cru HCLK_HOST_ARB1>; - pm_qos = <&qos_usb3_0>, - <&qos_usb3_1>, - <&qos_usb2host_0>, - <&qos_usb2host_1>; - #power-domain-cells = <0>; - }; - power-domain@RK3588_PD_GMAC { - reg = ; - clocks = <&cru PCLK_PHP_ROOT>, - <&cru ACLK_PCIE_ROOT>, - <&cru ACLK_PHP_ROOT>; - #power-domain-cells = <0>; - }; - power-domain@RK3588_PD_PCIE { - reg = ; - clocks = <&cru PCLK_PHP_ROOT>, - <&cru ACLK_PCIE_ROOT>, - <&cru ACLK_PHP_ROOT>; - #power-domain-cells = <0>; - }; - power-domain@RK3588_PD_SDIO { - reg = ; - clocks = <&cru HCLK_SDIO>, - <&cru HCLK_NVM_ROOT>; - pm_qos = <&qos_sdio>; - #power-domain-cells = <0>; - }; - power-domain@RK3588_PD_AUDIO { - reg = ; - clocks = <&cru HCLK_AUDIO_ROOT>, - <&cru PCLK_AUDIO_ROOT>; - #power-domain-cells = <0>; - }; - power-domain@RK3588_PD_SDMMC { - reg = ; - pm_qos = <&qos_sdmmc>; - #power-domain-cells = <0>; - }; - }; - }; - - i2s4_8ch: i2s@fddc0000 { - compatible = "rockchip,rk3588-i2s-tdm"; - reg = <0x0 0xfddc0000 0x0 0x1000>; - interrupts = ; - clocks = <&cru MCLK_I2S4_8CH_TX>, <&cru MCLK_I2S4_8CH_TX>, <&cru HCLK_I2S4_8CH>; - clock-names = "mclk_tx", "mclk_rx", "hclk"; - assigned-clocks = <&cru CLK_I2S4_8CH_TX_SRC>; - assigned-clock-parents = <&cru PLL_AUPLL>; - dmas = <&dmac2 0>; - dma-names = "tx"; - power-domains = <&power RK3588_PD_VO0>; - resets = <&cru SRST_M_I2S4_8CH_TX>; - reset-names = "tx-m"; - #sound-dai-cells = <0>; - status = "disabled"; - }; - - i2s5_8ch: i2s@fddf0000 { - compatible = "rockchip,rk3588-i2s-tdm"; - reg = <0x0 0xfddf0000 0x0 0x1000>; - interrupts = ; - clocks = <&cru MCLK_I2S5_8CH_TX>, <&cru MCLK_I2S5_8CH_TX>, <&cru HCLK_I2S5_8CH>; - clock-names = "mclk_tx", "mclk_rx", "hclk"; - assigned-clocks = <&cru CLK_I2S5_8CH_TX_SRC>; - assigned-clock-parents = <&cru PLL_AUPLL>; - dmas = <&dmac2 2>; - dma-names = "tx"; - power-domains = <&power RK3588_PD_VO1>; - resets = <&cru SRST_M_I2S5_8CH_TX>; - reset-names = "tx-m"; - #sound-dai-cells = <0>; - status = "disabled"; - }; - - i2s9_8ch: i2s@fddfc000 { - compatible = "rockchip,rk3588-i2s-tdm"; - reg = <0x0 0xfddfc000 0x0 0x1000>; - interrupts = ; - clocks = <&cru MCLK_I2S9_8CH_RX>, <&cru MCLK_I2S9_8CH_RX>, <&cru HCLK_I2S9_8CH>; - clock-names = "mclk_tx", "mclk_rx", "hclk"; - assigned-clocks = <&cru CLK_I2S9_8CH_RX_SRC>; - assigned-clock-parents = <&cru PLL_AUPLL>; - dmas = <&dmac2 23>; - dma-names = "rx"; - power-domains = <&power RK3588_PD_VO1>; - resets = <&cru SRST_M_I2S9_8CH_RX>; - reset-names = "rx-m"; - #sound-dai-cells = <0>; - status = "disabled"; - }; - - qos_gpu_m0: qos@fdf35000 { - compatible = "rockchip,rk3588-qos", "syscon"; - reg = <0x0 0xfdf35000 0x0 0x20>; - }; - - qos_gpu_m1: qos@fdf35200 { - compatible = "rockchip,rk3588-qos", "syscon"; - reg = <0x0 0xfdf35200 0x0 0x20>; - }; - - qos_gpu_m2: qos@fdf35400 { - compatible = "rockchip,rk3588-qos", "syscon"; - reg = <0x0 0xfdf35400 0x0 0x20>; - }; - - qos_gpu_m3: qos@fdf35600 { - compatible = "rockchip,rk3588-qos", "syscon"; - reg = <0x0 0xfdf35600 0x0 0x20>; - }; - - qos_rga3_1: qos@fdf36000 { - compatible = "rockchip,rk3588-qos", "syscon"; - reg = <0x0 0xfdf36000 0x0 0x20>; - }; - - qos_sdio: qos@fdf39000 { - compatible = "rockchip,rk3588-qos", "syscon"; - reg = <0x0 0xfdf39000 0x0 0x20>; - }; - - qos_sdmmc: qos@fdf3d800 { - compatible = "rockchip,rk3588-qos", "syscon"; - reg = <0x0 0xfdf3d800 0x0 0x20>; - }; - - qos_usb3_1: qos@fdf3e000 { - compatible = "rockchip,rk3588-qos", "syscon"; - reg = <0x0 0xfdf3e000 0x0 0x20>; - }; - - qos_usb3_0: qos@fdf3e200 { - compatible = "rockchip,rk3588-qos", "syscon"; - reg = <0x0 0xfdf3e200 0x0 0x20>; - }; - - qos_usb2host_0: qos@fdf3e400 { - compatible = "rockchip,rk3588-qos", "syscon"; - reg = <0x0 0xfdf3e400 0x0 0x20>; - }; - - qos_usb2host_1: qos@fdf3e600 { - compatible = "rockchip,rk3588-qos", "syscon"; - reg = <0x0 0xfdf3e600 0x0 0x20>; - }; - - qos_fisheye0: qos@fdf40000 { - compatible = "rockchip,rk3588-qos", "syscon"; - reg = <0x0 0xfdf40000 0x0 0x20>; - }; - - qos_fisheye1: qos@fdf40200 { - compatible = "rockchip,rk3588-qos", "syscon"; - reg = <0x0 0xfdf40200 0x0 0x20>; - }; - - qos_isp0_mro: qos@fdf40400 { - compatible = "rockchip,rk3588-qos", "syscon"; - reg = <0x0 0xfdf40400 0x0 0x20>; - }; - - qos_isp0_mwo: qos@fdf40500 { - compatible = "rockchip,rk3588-qos", "syscon"; - reg = <0x0 0xfdf40500 0x0 0x20>; - }; - - qos_vicap_m0: qos@fdf40600 { - compatible = "rockchip,rk3588-qos", "syscon"; - reg = <0x0 0xfdf40600 0x0 0x20>; - }; - - qos_vicap_m1: qos@fdf40800 { - compatible = "rockchip,rk3588-qos", "syscon"; - reg = <0x0 0xfdf40800 0x0 0x20>; - }; - - qos_isp1_mwo: qos@fdf41000 { - compatible = "rockchip,rk3588-qos", "syscon"; - reg = <0x0 0xfdf41000 0x0 0x20>; - }; - - qos_isp1_mro: qos@fdf41100 { - compatible = "rockchip,rk3588-qos", "syscon"; - reg = <0x0 0xfdf41100 0x0 0x20>; - }; - - qos_rkvenc0_m0ro: qos@fdf60000 { - compatible = "rockchip,rk3588-qos", "syscon"; - reg = <0x0 0xfdf60000 0x0 0x20>; - }; - - qos_rkvenc0_m1ro: qos@fdf60200 { - compatible = "rockchip,rk3588-qos", "syscon"; - reg = <0x0 0xfdf60200 0x0 0x20>; - }; - - qos_rkvenc0_m2wo: qos@fdf60400 { - compatible = "rockchip,rk3588-qos", "syscon"; - reg = <0x0 0xfdf60400 0x0 0x20>; - }; - - qos_rkvenc1_m0ro: qos@fdf61000 { - compatible = "rockchip,rk3588-qos", "syscon"; - reg = <0x0 0xfdf61000 0x0 0x20>; - }; - - qos_rkvenc1_m1ro: qos@fdf61200 { - compatible = "rockchip,rk3588-qos", "syscon"; - reg = <0x0 0xfdf61200 0x0 0x20>; - }; - - qos_rkvenc1_m2wo: qos@fdf61400 { - compatible = "rockchip,rk3588-qos", "syscon"; - reg = <0x0 0xfdf61400 0x0 0x20>; - }; - - qos_rkvdec0: qos@fdf62000 { - compatible = "rockchip,rk3588-qos", "syscon"; - reg = <0x0 0xfdf62000 0x0 0x20>; - }; - - qos_rkvdec1: qos@fdf63000 { - compatible = "rockchip,rk3588-qos", "syscon"; - reg = <0x0 0xfdf63000 0x0 0x20>; - }; - - qos_av1: qos@fdf64000 { - compatible = "rockchip,rk3588-qos", "syscon"; - reg = <0x0 0xfdf64000 0x0 0x20>; - }; - - qos_iep: qos@fdf66000 { - compatible = "rockchip,rk3588-qos", "syscon"; - reg = <0x0 0xfdf66000 0x0 0x20>; - }; - - qos_jpeg_dec: qos@fdf66200 { - compatible = "rockchip,rk3588-qos", "syscon"; - reg = <0x0 0xfdf66200 0x0 0x20>; - }; - - qos_jpeg_enc0: qos@fdf66400 { - compatible = "rockchip,rk3588-qos", "syscon"; - reg = <0x0 0xfdf66400 0x0 0x20>; - }; - - qos_jpeg_enc1: qos@fdf66600 { - compatible = "rockchip,rk3588-qos", "syscon"; - reg = <0x0 0xfdf66600 0x0 0x20>; - }; - - qos_jpeg_enc2: qos@fdf66800 { - compatible = "rockchip,rk3588-qos", "syscon"; - reg = <0x0 0xfdf66800 0x0 0x20>; - }; - - qos_jpeg_enc3: qos@fdf66a00 { - compatible = "rockchip,rk3588-qos", "syscon"; - reg = <0x0 0xfdf66a00 0x0 0x20>; - }; - - qos_rga2_mro: qos@fdf66c00 { - compatible = "rockchip,rk3588-qos", "syscon"; - reg = <0x0 0xfdf66c00 0x0 0x20>; - }; - - qos_rga2_mwo: qos@fdf66e00 { - compatible = "rockchip,rk3588-qos", "syscon"; - reg = <0x0 0xfdf66e00 0x0 0x20>; - }; - - qos_rga3_0: qos@fdf67000 { - compatible = "rockchip,rk3588-qos", "syscon"; - reg = <0x0 0xfdf67000 0x0 0x20>; - }; - - qos_vdpu: qos@fdf67200 { - compatible = "rockchip,rk3588-qos", "syscon"; - reg = <0x0 0xfdf67200 0x0 0x20>; - }; - - qos_npu1: qos@fdf70000 { - compatible = "rockchip,rk3588-qos", "syscon"; - reg = <0x0 0xfdf70000 0x0 0x20>; - }; - - qos_npu2: qos@fdf71000 { - compatible = "rockchip,rk3588-qos", "syscon"; - reg = <0x0 0xfdf71000 0x0 0x20>; - }; - - qos_npu0_mwr: qos@fdf72000 { - compatible = "rockchip,rk3588-qos", "syscon"; - reg = <0x0 0xfdf72000 0x0 0x20>; - }; - - qos_npu0_mro: qos@fdf72200 { - compatible = "rockchip,rk3588-qos", "syscon"; - reg = <0x0 0xfdf72200 0x0 0x20>; - }; - - qos_mcu_npu: qos@fdf72400 { - compatible = "rockchip,rk3588-qos", "syscon"; - reg = <0x0 0xfdf72400 0x0 0x20>; - }; - - qos_hdcp0: qos@fdf80000 { - compatible = "rockchip,rk3588-qos", "syscon"; - reg = <0x0 0xfdf80000 0x0 0x20>; - }; - - qos_hdcp1: qos@fdf81000 { - compatible = "rockchip,rk3588-qos", "syscon"; - reg = <0x0 0xfdf81000 0x0 0x20>; - }; - - qos_hdmirx: qos@fdf81200 { - compatible = "rockchip,rk3588-qos", "syscon"; - reg = <0x0 0xfdf81200 0x0 0x20>; - }; - - qos_vop_m0: qos@fdf82000 { - compatible = "rockchip,rk3588-qos", "syscon"; - reg = <0x0 0xfdf82000 0x0 0x20>; - }; - - qos_vop_m1: qos@fdf82200 { - compatible = "rockchip,rk3588-qos", "syscon"; - reg = <0x0 0xfdf82200 0x0 0x20>; - }; - - pcie2x1l1: pcie@fe180000 { - compatible = "rockchip,rk3588-pcie", "rockchip,rk3568-pcie"; - bus-range = <0x30 0x3f>; - clocks = <&cru ACLK_PCIE_1L1_MSTR>, <&cru ACLK_PCIE_1L1_SLV>, - <&cru ACLK_PCIE_1L1_DBI>, <&cru PCLK_PCIE_1L1>, - <&cru CLK_PCIE_AUX3>, <&cru CLK_PCIE1L1_PIPE>; - clock-names = "aclk_mst", "aclk_slv", - "aclk_dbi", "pclk", - "aux", "pipe"; - device_type = "pci"; - interrupts = , - , - , - , - ; - interrupt-names = "sys", "pmc", "msg", "legacy", "err"; - #interrupt-cells = <1>; - interrupt-map-mask = <0 0 0 7>; - interrupt-map = <0 0 0 1 &pcie2x1l1_intc 0>, - <0 0 0 2 &pcie2x1l1_intc 1>, - <0 0 0 3 &pcie2x1l1_intc 2>, - <0 0 0 4 &pcie2x1l1_intc 3>; - linux,pci-domain = <3>; - max-link-speed = <2>; - msi-map = <0x3000 &its0 0x3000 0x1000>; - num-lanes = <1>; - phys = <&combphy2_psu PHY_TYPE_PCIE>; - phy-names = "pcie-phy"; - power-domains = <&power RK3588_PD_PCIE>; - ranges = <0x01000000 0x0 0xf3100000 0x0 0xf3100000 0x0 0x00100000>, - <0x02000000 0x0 0xf3200000 0x0 0xf3200000 0x0 0x00e00000>, - <0x03000000 0x0 0x40000000 0x9 0xc0000000 0x0 0x40000000>; - reg = <0xa 0x40c00000 0x0 0x00400000>, - <0x0 0xfe180000 0x0 0x00010000>, - <0x0 0xf3000000 0x0 0x00100000>; - reg-names = "dbi", "apb", "config"; - resets = <&cru SRST_PCIE3_POWER_UP>, <&cru SRST_P_PCIE3>; - reset-names = "pwr", "pipe"; - #address-cells = <3>; - #size-cells = <2>; - status = "disabled"; - - pcie2x1l1_intc: legacy-interrupt-controller { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <1>; - interrupt-parent = <&gic>; - interrupts = ; - }; - }; - - pcie2x1l2: pcie@fe190000 { - compatible = "rockchip,rk3588-pcie", "rockchip,rk3568-pcie"; - bus-range = <0x40 0x4f>; - clocks = <&cru ACLK_PCIE_1L2_MSTR>, <&cru ACLK_PCIE_1L2_SLV>, - <&cru ACLK_PCIE_1L2_DBI>, <&cru PCLK_PCIE_1L2>, - <&cru CLK_PCIE_AUX4>, <&cru CLK_PCIE1L2_PIPE>; - clock-names = "aclk_mst", "aclk_slv", - "aclk_dbi", "pclk", - "aux", "pipe"; - device_type = "pci"; - interrupts = , - , - , - , - ; - interrupt-names = "sys", "pmc", "msg", "legacy", "err"; - #interrupt-cells = <1>; - interrupt-map-mask = <0 0 0 7>; - interrupt-map = <0 0 0 1 &pcie2x1l2_intc 0>, - <0 0 0 2 &pcie2x1l2_intc 1>, - <0 0 0 3 &pcie2x1l2_intc 2>, - <0 0 0 4 &pcie2x1l2_intc 3>; - linux,pci-domain = <4>; - max-link-speed = <2>; - msi-map = <0x4000 &its0 0x4000 0x1000>; - num-lanes = <1>; - phys = <&combphy0_ps PHY_TYPE_PCIE>; - phy-names = "pcie-phy"; - power-domains = <&power RK3588_PD_PCIE>; - ranges = <0x01000000 0x0 0xf4100000 0x0 0xf4100000 0x0 0x00100000>, - <0x02000000 0x0 0xf4200000 0x0 0xf4200000 0x0 0x00e00000>, - <0x03000000 0x0 0x40000000 0xa 0x00000000 0x0 0x40000000>; - reg = <0xa 0x41000000 0x0 0x00400000>, - <0x0 0xfe190000 0x0 0x00010000>, - <0x0 0xf4000000 0x0 0x00100000>; - reg-names = "dbi", "apb", "config"; - resets = <&cru SRST_PCIE4_POWER_UP>, <&cru SRST_P_PCIE4>; - reset-names = "pwr", "pipe"; - #address-cells = <3>; - #size-cells = <2>; - status = "disabled"; - - pcie2x1l2_intc: legacy-interrupt-controller { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <1>; - interrupt-parent = <&gic>; - interrupts = ; - }; - }; - - dfi: dfi@fe060000 { - reg = <0x00 0xfe060000 0x00 0x10000>; - compatible = "rockchip,rk3588-dfi"; - interrupts = , - , - , - ; - rockchip,pmu = <&pmu1grf>; - }; - - gmac1: ethernet@fe1c0000 { - compatible = "rockchip,rk3588-gmac", "snps,dwmac-4.20a"; - reg = <0x0 0xfe1c0000 0x0 0x10000>; - interrupts = , - ; - interrupt-names = "macirq", "eth_wake_irq"; - clocks = <&cru CLK_GMAC_125M>, <&cru CLK_GMAC_50M>, - <&cru PCLK_GMAC1>, <&cru ACLK_GMAC1>, - <&cru CLK_GMAC1_PTP_REF>; - clock-names = "stmmaceth", "clk_mac_ref", - "pclk_mac", "aclk_mac", - "ptp_ref"; - power-domains = <&power RK3588_PD_GMAC>; - resets = <&cru SRST_A_GMAC1>; - reset-names = "stmmaceth"; - rockchip,grf = <&sys_grf>; - rockchip,php-grf = <&php_grf>; - snps,axi-config = <&gmac1_stmmac_axi_setup>; - snps,mixed-burst; - snps,mtl-rx-config = <&gmac1_mtl_rx_setup>; - snps,mtl-tx-config = <&gmac1_mtl_tx_setup>; - snps,tso; - status = "disabled"; - - mdio1: mdio { - compatible = "snps,dwmac-mdio"; - #address-cells = <0x1>; - #size-cells = <0x0>; - }; - - gmac1_stmmac_axi_setup: stmmac-axi-config { - snps,blen = <0 0 0 0 16 8 4>; - snps,wr_osr_lmt = <4>; - snps,rd_osr_lmt = <8>; - }; - - gmac1_mtl_rx_setup: rx-queues-config { - snps,rx-queues-to-use = <2>; - queue0 {}; - queue1 {}; - }; - - gmac1_mtl_tx_setup: tx-queues-config { - snps,tx-queues-to-use = <2>; - queue0 {}; - queue1 {}; - }; - }; - - sata0: sata@fe210000 { - compatible = "rockchip,rk3588-dwc-ahci", "snps,dwc-ahci"; - reg = <0 0xfe210000 0 0x1000>; - interrupts = ; - clocks = <&cru ACLK_SATA0>, <&cru CLK_PMALIVE0>, - <&cru CLK_RXOOB0>, <&cru CLK_PIPEPHY0_REF>, - <&cru CLK_PIPEPHY0_PIPE_ASIC_G>; - clock-names = "sata", "pmalive", "rxoob", "ref", "asic"; - ports-implemented = <0x1>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - - sata-port@0 { - reg = <0>; - hba-port-cap = ; - phys = <&combphy0_ps PHY_TYPE_SATA>; - phy-names = "sata-phy"; - snps,rx-ts-max = <32>; - snps,tx-ts-max = <32>; - }; - }; - - sata2: sata@fe230000 { - compatible = "rockchip,rk3588-dwc-ahci", "snps,dwc-ahci"; - reg = <0 0xfe230000 0 0x1000>; - interrupts = ; - clocks = <&cru ACLK_SATA2>, <&cru CLK_PMALIVE2>, - <&cru CLK_RXOOB2>, <&cru CLK_PIPEPHY2_REF>, - <&cru CLK_PIPEPHY2_PIPE_ASIC_G>; - clock-names = "sata", "pmalive", "rxoob", "ref", "asic"; - ports-implemented = <0x1>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - - sata-port@0 { - reg = <0>; - hba-port-cap = ; - phys = <&combphy2_psu PHY_TYPE_SATA>; - phy-names = "sata-phy"; - snps,rx-ts-max = <32>; - snps,tx-ts-max = <32>; - }; - }; - - sfc: spi@fe2b0000 { - compatible = "rockchip,sfc"; - reg = <0x0 0xfe2b0000 0x0 0x4000>; - interrupts = ; - clocks = <&cru SCLK_SFC>, <&cru HCLK_SFC>; - clock-names = "clk_sfc", "hclk_sfc"; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - sdmmc: mmc@fe2c0000 { - compatible = "rockchip,rk3588-dw-mshc", "rockchip,rk3288-dw-mshc"; - reg = <0x0 0xfe2c0000 0x0 0x4000>; - interrupts = ; - clocks = <&scmi_clk SCMI_HCLK_SD>, <&scmi_clk SCMI_CCLK_SD>, - <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>; - clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; - fifo-depth = <0x100>; - max-frequency = <200000000>; - pinctrl-names = "default"; - pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_det &sdmmc_bus4>; - power-domains = <&power RK3588_PD_SDMMC>; - status = "disabled"; - }; - - sdio: mmc@fe2d0000 { - compatible = "rockchip,rk3588-dw-mshc", "rockchip,rk3288-dw-mshc"; - reg = <0x00 0xfe2d0000 0x00 0x4000>; - interrupts = ; - clocks = <&cru HCLK_SDIO>, <&cru CCLK_SRC_SDIO>, - <&cru SCLK_SDIO_DRV>, <&cru SCLK_SDIO_SAMPLE>; - clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; - fifo-depth = <0x100>; - max-frequency = <200000000>; - pinctrl-names = "default"; - pinctrl-0 = <&sdiom1_pins>; - power-domains = <&power RK3588_PD_SDIO>; - status = "disabled"; - }; - - sdhci: mmc@fe2e0000 { - compatible = "rockchip,rk3588-dwcmshc"; - reg = <0x0 0xfe2e0000 0x0 0x10000>; - interrupts = ; - assigned-clocks = <&cru BCLK_EMMC>, <&cru TMCLK_EMMC>, <&cru CCLK_EMMC>; - assigned-clock-rates = <200000000>, <24000000>, <200000000>; - clocks = <&cru CCLK_EMMC>, <&cru HCLK_EMMC>, - <&cru ACLK_EMMC>, <&cru BCLK_EMMC>, - <&cru TMCLK_EMMC>; - clock-names = "core", "bus", "axi", "block", "timer"; - max-frequency = <200000000>; - pinctrl-0 = <&emmc_rstnout>, <&emmc_bus8>, <&emmc_clk>, - <&emmc_cmd>, <&emmc_data_strobe>; - pinctrl-names = "default"; - resets = <&cru SRST_C_EMMC>, <&cru SRST_H_EMMC>, - <&cru SRST_A_EMMC>, <&cru SRST_B_EMMC>, - <&cru SRST_T_EMMC>; - reset-names = "core", "bus", "axi", "block", "timer"; - status = "disabled"; - }; - - i2s0_8ch: i2s@fe470000 { - compatible = "rockchip,rk3588-i2s-tdm"; - reg = <0x0 0xfe470000 0x0 0x1000>; - interrupts = ; - clocks = <&cru MCLK_I2S0_8CH_TX>, <&cru MCLK_I2S0_8CH_RX>, <&cru HCLK_I2S0_8CH>; - clock-names = "mclk_tx", "mclk_rx", "hclk"; - assigned-clocks = <&cru CLK_I2S0_8CH_TX_SRC>, <&cru CLK_I2S0_8CH_RX_SRC>; - assigned-clock-parents = <&cru PLL_AUPLL>, <&cru PLL_AUPLL>; - dmas = <&dmac0 0>, <&dmac0 1>; - dma-names = "tx", "rx"; - power-domains = <&power RK3588_PD_AUDIO>; - resets = <&cru SRST_M_I2S0_8CH_TX>, <&cru SRST_M_I2S0_8CH_RX>; - reset-names = "tx-m", "rx-m"; - rockchip,trcm-sync-tx-only; - pinctrl-names = "default"; - pinctrl-0 = <&i2s0_lrck - &i2s0_sclk - &i2s0_sdi0 - &i2s0_sdi1 - &i2s0_sdi2 - &i2s0_sdi3 - &i2s0_sdo0 - &i2s0_sdo1 - &i2s0_sdo2 - &i2s0_sdo3>; - #sound-dai-cells = <0>; - status = "disabled"; - }; - - i2s1_8ch: i2s@fe480000 { - compatible = "rockchip,rk3588-i2s-tdm"; - reg = <0x0 0xfe480000 0x0 0x1000>; - interrupts = ; - clocks = <&cru MCLK_I2S1_8CH_TX>, <&cru MCLK_I2S1_8CH_RX>, <&cru HCLK_I2S1_8CH>; - clock-names = "mclk_tx", "mclk_rx", "hclk"; - dmas = <&dmac0 2>, <&dmac0 3>; - dma-names = "tx", "rx"; - resets = <&cru SRST_M_I2S1_8CH_TX>, <&cru SRST_M_I2S1_8CH_RX>; - reset-names = "tx-m", "rx-m"; - rockchip,trcm-sync-tx-only; - pinctrl-names = "default"; - pinctrl-0 = <&i2s1m0_lrck - &i2s1m0_sclk - &i2s1m0_sdi0 - &i2s1m0_sdi1 - &i2s1m0_sdi2 - &i2s1m0_sdi3 - &i2s1m0_sdo0 - &i2s1m0_sdo1 - &i2s1m0_sdo2 - &i2s1m0_sdo3>; - #sound-dai-cells = <0>; - status = "disabled"; - }; - - i2s2_2ch: i2s@fe490000 { - compatible = "rockchip,rk3588-i2s", "rockchip,rk3066-i2s"; - reg = <0x0 0xfe490000 0x0 0x1000>; - interrupts = ; - clocks = <&cru MCLK_I2S2_2CH>, <&cru HCLK_I2S2_2CH>; - clock-names = "i2s_clk", "i2s_hclk"; - assigned-clocks = <&cru CLK_I2S2_2CH_SRC>; - assigned-clock-parents = <&cru PLL_AUPLL>; - dmas = <&dmac1 0>, <&dmac1 1>; - dma-names = "tx", "rx"; - power-domains = <&power RK3588_PD_AUDIO>; - rockchip,trcm-sync-tx-only; - pinctrl-names = "default"; - pinctrl-0 = <&i2s2m1_lrck - &i2s2m1_sclk - &i2s2m1_sdi - &i2s2m1_sdo>; - #sound-dai-cells = <0>; - status = "disabled"; - }; - - i2s3_2ch: i2s@fe4a0000 { - compatible = "rockchip,rk3588-i2s", "rockchip,rk3066-i2s"; - reg = <0x0 0xfe4a0000 0x0 0x1000>; - interrupts = ; - clocks = <&cru MCLK_I2S3_2CH>, <&cru HCLK_I2S3_2CH>; - clock-names = "i2s_clk", "i2s_hclk"; - assigned-clocks = <&cru CLK_I2S3_2CH_SRC>; - assigned-clock-parents = <&cru PLL_AUPLL>; - dmas = <&dmac1 2>, <&dmac1 3>; - dma-names = "tx", "rx"; - power-domains = <&power RK3588_PD_AUDIO>; - rockchip,trcm-sync-tx-only; - pinctrl-names = "default"; - pinctrl-0 = <&i2s3_lrck - &i2s3_sclk - &i2s3_sdi - &i2s3_sdo>; - #sound-dai-cells = <0>; - status = "disabled"; - }; - - gic: interrupt-controller@fe600000 { - compatible = "arm,gic-v3"; - reg = <0x0 0xfe600000 0 0x10000>, /* GICD */ - <0x0 0xfe680000 0 0x100000>; /* GICR */ - interrupts = ; - interrupt-controller; - mbi-alias = <0x0 0xfe610000>; - mbi-ranges = <424 56>; - msi-controller; - ranges; - #address-cells = <2>; - #interrupt-cells = <4>; - #size-cells = <2>; - - its0: msi-controller@fe640000 { - compatible = "arm,gic-v3-its"; - reg = <0x0 0xfe640000 0x0 0x20000>; - msi-controller; - #msi-cells = <1>; - }; - - its1: msi-controller@fe660000 { - compatible = "arm,gic-v3-its"; - reg = <0x0 0xfe660000 0x0 0x20000>; - msi-controller; - #msi-cells = <1>; - }; - - ppi-partitions { - ppi_partition0: interrupt-partition-0 { - affinity = <&cpu_l0 &cpu_l1 &cpu_l2 &cpu_l3>; - }; - - ppi_partition1: interrupt-partition-1 { - affinity = <&cpu_b0 &cpu_b1 &cpu_b2 &cpu_b3>; - }; - }; - }; - - dmac0: dma-controller@fea10000 { - compatible = "arm,pl330", "arm,primecell"; - reg = <0x0 0xfea10000 0x0 0x4000>; - interrupts = , - ; - arm,pl330-periph-burst; - clocks = <&cru ACLK_DMAC0>; - clock-names = "apb_pclk"; - #dma-cells = <1>; - }; - - dmac1: dma-controller@fea30000 { - compatible = "arm,pl330", "arm,primecell"; - reg = <0x0 0xfea30000 0x0 0x4000>; - interrupts = , - ; - arm,pl330-periph-burst; - clocks = <&cru ACLK_DMAC1>; - clock-names = "apb_pclk"; - #dma-cells = <1>; - }; - - i2c1: i2c@fea90000 { - compatible = "rockchip,rk3588-i2c", "rockchip,rk3399-i2c"; - reg = <0x0 0xfea90000 0x0 0x1000>; - clocks = <&cru CLK_I2C1>, <&cru PCLK_I2C1>; - clock-names = "i2c", "pclk"; - interrupts = ; - pinctrl-0 = <&i2c1m0_xfer>; - pinctrl-names = "default"; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - i2c2: i2c@feaa0000 { - compatible = "rockchip,rk3588-i2c", "rockchip,rk3399-i2c"; - reg = <0x0 0xfeaa0000 0x0 0x1000>; - clocks = <&cru CLK_I2C2>, <&cru PCLK_I2C2>; - clock-names = "i2c", "pclk"; - interrupts = ; - pinctrl-0 = <&i2c2m0_xfer>; - pinctrl-names = "default"; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - i2c3: i2c@feab0000 { - compatible = "rockchip,rk3588-i2c", "rockchip,rk3399-i2c"; - reg = <0x0 0xfeab0000 0x0 0x1000>; - clocks = <&cru CLK_I2C3>, <&cru PCLK_I2C3>; - clock-names = "i2c", "pclk"; - interrupts = ; - pinctrl-0 = <&i2c3m0_xfer>; - pinctrl-names = "default"; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - i2c4: i2c@feac0000 { - compatible = "rockchip,rk3588-i2c", "rockchip,rk3399-i2c"; - reg = <0x0 0xfeac0000 0x0 0x1000>; - clocks = <&cru CLK_I2C4>, <&cru PCLK_I2C4>; - clock-names = "i2c", "pclk"; - interrupts = ; - pinctrl-0 = <&i2c4m0_xfer>; - pinctrl-names = "default"; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - i2c5: i2c@fead0000 { - compatible = "rockchip,rk3588-i2c", "rockchip,rk3399-i2c"; - reg = <0x0 0xfead0000 0x0 0x1000>; - clocks = <&cru CLK_I2C5>, <&cru PCLK_I2C5>; - clock-names = "i2c", "pclk"; - interrupts = ; - pinctrl-0 = <&i2c5m0_xfer>; - pinctrl-names = "default"; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - timer0: timer@feae0000 { - compatible = "rockchip,rk3588-timer", "rockchip,rk3288-timer"; - reg = <0x0 0xfeae0000 0x0 0x20>; - interrupts = ; - clocks = <&cru PCLK_BUSTIMER0>, <&cru CLK_BUSTIMER0>; - clock-names = "pclk", "timer"; - }; - - wdt: watchdog@feaf0000 { - compatible = "rockchip,rk3588-wdt", "snps,dw-wdt"; - reg = <0x0 0xfeaf0000 0x0 0x100>; - clocks = <&cru TCLK_WDT0>, <&cru PCLK_WDT0>; - clock-names = "tclk", "pclk"; - interrupts = ; - }; - - spi0: spi@feb00000 { - compatible = "rockchip,rk3588-spi", "rockchip,rk3066-spi"; - reg = <0x0 0xfeb00000 0x0 0x1000>; - interrupts = ; - clocks = <&cru CLK_SPI0>, <&cru PCLK_SPI0>; - clock-names = "spiclk", "apb_pclk"; - dmas = <&dmac0 14>, <&dmac0 15>; - dma-names = "tx", "rx"; - num-cs = <2>; - pinctrl-0 = <&spi0m0_cs0 &spi0m0_cs1 &spi0m0_pins>; - pinctrl-names = "default"; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - spi1: spi@feb10000 { - compatible = "rockchip,rk3588-spi", "rockchip,rk3066-spi"; - reg = <0x0 0xfeb10000 0x0 0x1000>; - interrupts = ; - clocks = <&cru CLK_SPI1>, <&cru PCLK_SPI1>; - clock-names = "spiclk", "apb_pclk"; - dmas = <&dmac0 16>, <&dmac0 17>; - dma-names = "tx", "rx"; - num-cs = <2>; - pinctrl-0 = <&spi1m1_cs0 &spi1m1_cs1 &spi1m1_pins>; - pinctrl-names = "default"; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - spi2: spi@feb20000 { - compatible = "rockchip,rk3588-spi", "rockchip,rk3066-spi"; - reg = <0x0 0xfeb20000 0x0 0x1000>; - interrupts = ; - clocks = <&cru CLK_SPI2>, <&cru PCLK_SPI2>; - clock-names = "spiclk", "apb_pclk"; - dmas = <&dmac1 15>, <&dmac1 16>; - dma-names = "tx", "rx"; - num-cs = <2>; - pinctrl-0 = <&spi2m2_cs0 &spi2m2_cs1 &spi2m2_pins>; - pinctrl-names = "default"; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - spi3: spi@feb30000 { - compatible = "rockchip,rk3588-spi", "rockchip,rk3066-spi"; - reg = <0x0 0xfeb30000 0x0 0x1000>; - interrupts = ; - clocks = <&cru CLK_SPI3>, <&cru PCLK_SPI3>; - clock-names = "spiclk", "apb_pclk"; - dmas = <&dmac1 17>, <&dmac1 18>; - dma-names = "tx", "rx"; - num-cs = <2>; - pinctrl-0 = <&spi3m1_cs0 &spi3m1_cs1 &spi3m1_pins>; - pinctrl-names = "default"; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - uart1: serial@feb40000 { - compatible = "rockchip,rk3588-uart", "snps,dw-apb-uart"; - reg = <0x0 0xfeb40000 0x0 0x100>; - interrupts = ; - clocks = <&cru SCLK_UART1>, <&cru PCLK_UART1>; - clock-names = "baudclk", "apb_pclk"; - dmas = <&dmac0 8>, <&dmac0 9>; - dma-names = "tx", "rx"; - pinctrl-0 = <&uart1m1_xfer>; - pinctrl-names = "default"; - reg-io-width = <4>; - reg-shift = <2>; - status = "disabled"; - }; - - uart2: serial@feb50000 { - compatible = "rockchip,rk3588-uart", "snps,dw-apb-uart"; - reg = <0x0 0xfeb50000 0x0 0x100>; - interrupts = ; - clocks = <&cru SCLK_UART2>, <&cru PCLK_UART2>; - clock-names = "baudclk", "apb_pclk"; - dmas = <&dmac0 10>, <&dmac0 11>; - dma-names = "tx", "rx"; - pinctrl-0 = <&uart2m1_xfer>; - pinctrl-names = "default"; - reg-io-width = <4>; - reg-shift = <2>; - status = "disabled"; - }; - - uart3: serial@feb60000 { - compatible = "rockchip,rk3588-uart", "snps,dw-apb-uart"; - reg = <0x0 0xfeb60000 0x0 0x100>; - interrupts = ; - clocks = <&cru SCLK_UART3>, <&cru PCLK_UART3>; - clock-names = "baudclk", "apb_pclk"; - dmas = <&dmac0 12>, <&dmac0 13>; - dma-names = "tx", "rx"; - pinctrl-0 = <&uart3m1_xfer>; - pinctrl-names = "default"; - reg-io-width = <4>; - reg-shift = <2>; - status = "disabled"; - }; - - uart4: serial@feb70000 { - compatible = "rockchip,rk3588-uart", "snps,dw-apb-uart"; - reg = <0x0 0xfeb70000 0x0 0x100>; - interrupts = ; - clocks = <&cru SCLK_UART4>, <&cru PCLK_UART4>; - clock-names = "baudclk", "apb_pclk"; - dmas = <&dmac1 9>, <&dmac1 10>; - dma-names = "tx", "rx"; - pinctrl-0 = <&uart4m1_xfer>; - pinctrl-names = "default"; - reg-io-width = <4>; - reg-shift = <2>; - status = "disabled"; - }; - - uart5: serial@feb80000 { - compatible = "rockchip,rk3588-uart", "snps,dw-apb-uart"; - reg = <0x0 0xfeb80000 0x0 0x100>; - interrupts = ; - clocks = <&cru SCLK_UART5>, <&cru PCLK_UART5>; - clock-names = "baudclk", "apb_pclk"; - dmas = <&dmac1 11>, <&dmac1 12>; - dma-names = "tx", "rx"; - pinctrl-0 = <&uart5m1_xfer>; - pinctrl-names = "default"; - reg-io-width = <4>; - reg-shift = <2>; - status = "disabled"; - }; - - uart6: serial@feb90000 { - compatible = "rockchip,rk3588-uart", "snps,dw-apb-uart"; - reg = <0x0 0xfeb90000 0x0 0x100>; - interrupts = ; - clocks = <&cru SCLK_UART6>, <&cru PCLK_UART6>; - clock-names = "baudclk", "apb_pclk"; - dmas = <&dmac1 13>, <&dmac1 14>; - dma-names = "tx", "rx"; - pinctrl-0 = <&uart6m1_xfer>; - pinctrl-names = "default"; - reg-io-width = <4>; - reg-shift = <2>; - status = "disabled"; - }; - - uart7: serial@feba0000 { - compatible = "rockchip,rk3588-uart", "snps,dw-apb-uart"; - reg = <0x0 0xfeba0000 0x0 0x100>; - interrupts = ; - clocks = <&cru SCLK_UART7>, <&cru PCLK_UART7>; - clock-names = "baudclk", "apb_pclk"; - dmas = <&dmac2 7>, <&dmac2 8>; - dma-names = "tx", "rx"; - pinctrl-0 = <&uart7m1_xfer>; - pinctrl-names = "default"; - reg-io-width = <4>; - reg-shift = <2>; - status = "disabled"; - }; - - uart8: serial@febb0000 { - compatible = "rockchip,rk3588-uart", "snps,dw-apb-uart"; - reg = <0x0 0xfebb0000 0x0 0x100>; - interrupts = ; - clocks = <&cru SCLK_UART8>, <&cru PCLK_UART8>; - clock-names = "baudclk", "apb_pclk"; - dmas = <&dmac2 9>, <&dmac2 10>; - dma-names = "tx", "rx"; - pinctrl-0 = <&uart8m1_xfer>; - pinctrl-names = "default"; - reg-io-width = <4>; - reg-shift = <2>; - status = "disabled"; - }; - - uart9: serial@febc0000 { - compatible = "rockchip,rk3588-uart", "snps,dw-apb-uart"; - reg = <0x0 0xfebc0000 0x0 0x100>; - interrupts = ; - clocks = <&cru SCLK_UART9>, <&cru PCLK_UART9>; - clock-names = "baudclk", "apb_pclk"; - dmas = <&dmac2 11>, <&dmac2 12>; - dma-names = "tx", "rx"; - pinctrl-0 = <&uart9m1_xfer>; - pinctrl-names = "default"; - reg-io-width = <4>; - reg-shift = <2>; - status = "disabled"; - }; - - pwm4: pwm@febd0000 { - compatible = "rockchip,rk3588-pwm", "rockchip,rk3328-pwm"; - reg = <0x0 0xfebd0000 0x0 0x10>; - clocks = <&cru CLK_PWM1>, <&cru PCLK_PWM1>; - clock-names = "pwm", "pclk"; - pinctrl-0 = <&pwm4m0_pins>; - pinctrl-names = "default"; - #pwm-cells = <3>; - status = "disabled"; - }; - - pwm5: pwm@febd0010 { - compatible = "rockchip,rk3588-pwm", "rockchip,rk3328-pwm"; - reg = <0x0 0xfebd0010 0x0 0x10>; - clocks = <&cru CLK_PWM1>, <&cru PCLK_PWM1>; - clock-names = "pwm", "pclk"; - pinctrl-0 = <&pwm5m0_pins>; - pinctrl-names = "default"; - #pwm-cells = <3>; - status = "disabled"; - }; - - pwm6: pwm@febd0020 { - compatible = "rockchip,rk3588-pwm", "rockchip,rk3328-pwm"; - reg = <0x0 0xfebd0020 0x0 0x10>; - clocks = <&cru CLK_PWM1>, <&cru PCLK_PWM1>; - clock-names = "pwm", "pclk"; - pinctrl-0 = <&pwm6m0_pins>; - pinctrl-names = "default"; - #pwm-cells = <3>; - status = "disabled"; - }; - - pwm7: pwm@febd0030 { - compatible = "rockchip,rk3588-pwm", "rockchip,rk3328-pwm"; - reg = <0x0 0xfebd0030 0x0 0x10>; - clocks = <&cru CLK_PWM1>, <&cru PCLK_PWM1>; - clock-names = "pwm", "pclk"; - pinctrl-0 = <&pwm7m0_pins>; - pinctrl-names = "default"; - #pwm-cells = <3>; - status = "disabled"; - }; - - pwm8: pwm@febe0000 { - compatible = "rockchip,rk3588-pwm", "rockchip,rk3328-pwm"; - reg = <0x0 0xfebe0000 0x0 0x10>; - clocks = <&cru CLK_PWM2>, <&cru PCLK_PWM2>; - clock-names = "pwm", "pclk"; - pinctrl-0 = <&pwm8m0_pins>; - pinctrl-names = "default"; - #pwm-cells = <3>; - status = "disabled"; - }; - - pwm9: pwm@febe0010 { - compatible = "rockchip,rk3588-pwm", "rockchip,rk3328-pwm"; - reg = <0x0 0xfebe0010 0x0 0x10>; - clocks = <&cru CLK_PWM2>, <&cru PCLK_PWM2>; - clock-names = "pwm", "pclk"; - pinctrl-0 = <&pwm9m0_pins>; - pinctrl-names = "default"; - #pwm-cells = <3>; - status = "disabled"; - }; - - pwm10: pwm@febe0020 { - compatible = "rockchip,rk3588-pwm", "rockchip,rk3328-pwm"; - reg = <0x0 0xfebe0020 0x0 0x10>; - clocks = <&cru CLK_PWM2>, <&cru PCLK_PWM2>; - clock-names = "pwm", "pclk"; - pinctrl-0 = <&pwm10m0_pins>; - pinctrl-names = "default"; - #pwm-cells = <3>; - status = "disabled"; - }; - - pwm11: pwm@febe0030 { - compatible = "rockchip,rk3588-pwm", "rockchip,rk3328-pwm"; - reg = <0x0 0xfebe0030 0x0 0x10>; - clocks = <&cru CLK_PWM2>, <&cru PCLK_PWM2>; - clock-names = "pwm", "pclk"; - pinctrl-0 = <&pwm11m0_pins>; - pinctrl-names = "default"; - #pwm-cells = <3>; - status = "disabled"; - }; - - pwm12: pwm@febf0000 { - compatible = "rockchip,rk3588-pwm", "rockchip,rk3328-pwm"; - reg = <0x0 0xfebf0000 0x0 0x10>; - clocks = <&cru CLK_PWM3>, <&cru PCLK_PWM3>; - clock-names = "pwm", "pclk"; - pinctrl-0 = <&pwm12m0_pins>; - pinctrl-names = "default"; - #pwm-cells = <3>; - status = "disabled"; - }; - - pwm13: pwm@febf0010 { - compatible = "rockchip,rk3588-pwm", "rockchip,rk3328-pwm"; - reg = <0x0 0xfebf0010 0x0 0x10>; - clocks = <&cru CLK_PWM3>, <&cru PCLK_PWM3>; - clock-names = "pwm", "pclk"; - pinctrl-0 = <&pwm13m0_pins>; - pinctrl-names = "default"; - #pwm-cells = <3>; - status = "disabled"; - }; - - pwm14: pwm@febf0020 { - compatible = "rockchip,rk3588-pwm", "rockchip,rk3328-pwm"; - reg = <0x0 0xfebf0020 0x0 0x10>; - clocks = <&cru CLK_PWM3>, <&cru PCLK_PWM3>; - clock-names = "pwm", "pclk"; - pinctrl-0 = <&pwm14m0_pins>; - pinctrl-names = "default"; - #pwm-cells = <3>; - status = "disabled"; - }; - - pwm15: pwm@febf0030 { - compatible = "rockchip,rk3588-pwm", "rockchip,rk3328-pwm"; - reg = <0x0 0xfebf0030 0x0 0x10>; - clocks = <&cru CLK_PWM3>, <&cru PCLK_PWM3>; - clock-names = "pwm", "pclk"; - pinctrl-0 = <&pwm15m0_pins>; - pinctrl-names = "default"; - #pwm-cells = <3>; - status = "disabled"; - }; - - tsadc: tsadc@fec00000 { - compatible = "rockchip,rk3588-tsadc"; - reg = <0x0 0xfec00000 0x0 0x400>; - interrupts = ; - clocks = <&cru CLK_TSADC>, <&cru PCLK_TSADC>; - clock-names = "tsadc", "apb_pclk"; - assigned-clocks = <&cru CLK_TSADC>; - assigned-clock-rates = <2000000>; - resets = <&cru SRST_P_TSADC>, <&cru SRST_TSADC>; - reset-names = "tsadc-apb", "tsadc"; - rockchip,hw-tshut-temp = <120000>; - rockchip,hw-tshut-mode = <0>; /* tshut mode 0:CRU 1:GPIO */ - rockchip,hw-tshut-polarity = <0>; /* tshut polarity 0:LOW 1:HIGH */ - pinctrl-0 = <&tsadc_gpio_func>; - pinctrl-1 = <&tsadc_shut>; - pinctrl-names = "gpio", "otpout"; - #thermal-sensor-cells = <1>; - status = "disabled"; - }; - - saradc: adc@fec10000 { - compatible = "rockchip,rk3588-saradc"; - reg = <0x0 0xfec10000 0x0 0x10000>; - interrupts = ; - #io-channel-cells = <1>; - clocks = <&cru CLK_SARADC>, <&cru PCLK_SARADC>; - clock-names = "saradc", "apb_pclk"; - resets = <&cru SRST_P_SARADC>; - reset-names = "saradc-apb"; - status = "disabled"; - }; - - i2c6: i2c@fec80000 { - compatible = "rockchip,rk3588-i2c", "rockchip,rk3399-i2c"; - reg = <0x0 0xfec80000 0x0 0x1000>; - clocks = <&cru CLK_I2C6>, <&cru PCLK_I2C6>; - clock-names = "i2c", "pclk"; - interrupts = ; - pinctrl-0 = <&i2c6m0_xfer>; - pinctrl-names = "default"; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - i2c7: i2c@fec90000 { - compatible = "rockchip,rk3588-i2c", "rockchip,rk3399-i2c"; - reg = <0x0 0xfec90000 0x0 0x1000>; - clocks = <&cru CLK_I2C7>, <&cru PCLK_I2C7>; - clock-names = "i2c", "pclk"; - interrupts = ; - pinctrl-0 = <&i2c7m0_xfer>; - pinctrl-names = "default"; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - i2c8: i2c@feca0000 { - compatible = "rockchip,rk3588-i2c", "rockchip,rk3399-i2c"; - reg = <0x0 0xfeca0000 0x0 0x1000>; - clocks = <&cru CLK_I2C8>, <&cru PCLK_I2C8>; - clock-names = "i2c", "pclk"; - interrupts = ; - pinctrl-0 = <&i2c8m0_xfer>; - pinctrl-names = "default"; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - spi4: spi@fecb0000 { - compatible = "rockchip,rk3588-spi", "rockchip,rk3066-spi"; - reg = <0x0 0xfecb0000 0x0 0x1000>; - interrupts = ; - clocks = <&cru CLK_SPI4>, <&cru PCLK_SPI4>; - clock-names = "spiclk", "apb_pclk"; - dmas = <&dmac2 13>, <&dmac2 14>; - dma-names = "tx", "rx"; - num-cs = <2>; - pinctrl-0 = <&spi4m0_cs0 &spi4m0_cs1 &spi4m0_pins>; - pinctrl-names = "default"; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - otp: efuse@fecc0000 { - compatible = "rockchip,rk3588-otp"; - reg = <0x0 0xfecc0000 0x0 0x400>; - clocks = <&cru CLK_OTPC_NS>, <&cru PCLK_OTPC_NS>, - <&cru CLK_OTP_PHY_G>, <&cru CLK_OTPC_ARB>; - clock-names = "otp", "apb_pclk", "phy", "arb"; - resets = <&cru SRST_OTPC_NS>, <&cru SRST_P_OTPC_NS>, - <&cru SRST_OTPC_ARB>; - reset-names = "otp", "apb", "arb"; - #address-cells = <1>; - #size-cells = <1>; - - cpu_code: cpu-code@2 { - reg = <0x02 0x2>; - }; - - otp_id: id@7 { - reg = <0x07 0x10>; - }; - - cpub0_leakage: cpu-leakage@17 { - reg = <0x17 0x1>; - }; - - cpub1_leakage: cpu-leakage@18 { - reg = <0x18 0x1>; - }; - - cpul_leakage: cpu-leakage@19 { - reg = <0x19 0x1>; - }; - - log_leakage: log-leakage@1a { - reg = <0x1a 0x1>; - }; - - gpu_leakage: gpu-leakage@1b { - reg = <0x1b 0x1>; - }; - - otp_cpu_version: cpu-version@1c { - reg = <0x1c 0x1>; - bits = <3 3>; - }; - - npu_leakage: npu-leakage@28 { - reg = <0x28 0x1>; - }; - - codec_leakage: codec-leakage@29 { - reg = <0x29 0x1>; - }; - }; - - dmac2: dma-controller@fed10000 { - compatible = "arm,pl330", "arm,primecell"; - reg = <0x0 0xfed10000 0x0 0x4000>; - interrupts = , - ; - arm,pl330-periph-burst; - clocks = <&cru ACLK_DMAC2>; - clock-names = "apb_pclk"; - #dma-cells = <1>; - }; - - combphy0_ps: phy@fee00000 { - compatible = "rockchip,rk3588-naneng-combphy"; - reg = <0x0 0xfee00000 0x0 0x100>; - clocks = <&cru CLK_REF_PIPE_PHY0>, <&cru PCLK_PCIE_COMBO_PIPE_PHY0>, - <&cru PCLK_PHP_ROOT>; - clock-names = "ref", "apb", "pipe"; - assigned-clocks = <&cru CLK_REF_PIPE_PHY0>; - assigned-clock-rates = <100000000>; - #phy-cells = <1>; - resets = <&cru SRST_REF_PIPE_PHY0>, <&cru SRST_P_PCIE2_PHY0>; - reset-names = "phy", "apb"; - rockchip,pipe-grf = <&php_grf>; - rockchip,pipe-phy-grf = <&pipe_phy0_grf>; - status = "disabled"; - }; - - combphy2_psu: phy@fee20000 { - compatible = "rockchip,rk3588-naneng-combphy"; - reg = <0x0 0xfee20000 0x0 0x100>; - clocks = <&cru CLK_REF_PIPE_PHY2>, <&cru PCLK_PCIE_COMBO_PIPE_PHY2>, - <&cru PCLK_PHP_ROOT>; - clock-names = "ref", "apb", "pipe"; - assigned-clocks = <&cru CLK_REF_PIPE_PHY2>; - assigned-clock-rates = <100000000>; - #phy-cells = <1>; - resets = <&cru SRST_REF_PIPE_PHY2>, <&cru SRST_P_PCIE2_PHY2>; - reset-names = "phy", "apb"; - rockchip,pipe-grf = <&php_grf>; - rockchip,pipe-phy-grf = <&pipe_phy2_grf>; - status = "disabled"; - }; - - system_sram2: sram@ff001000 { - compatible = "mmio-sram"; - reg = <0x0 0xff001000 0x0 0xef000>; - ranges = <0x0 0x0 0xff001000 0xef000>; - #address-cells = <1>; - #size-cells = <1>; - }; - - pinctrl: pinctrl { - compatible = "rockchip,rk3588-pinctrl"; - ranges; - rockchip,grf = <&ioc>; - #address-cells = <2>; - #size-cells = <2>; - - gpio0: gpio@fd8a0000 { - compatible = "rockchip,gpio-bank"; - reg = <0x0 0xfd8a0000 0x0 0x100>; - interrupts = ; - clocks = <&cru PCLK_GPIO0>, <&cru DBCLK_GPIO0>; - gpio-controller; - gpio-ranges = <&pinctrl 0 0 32>; - interrupt-controller; - #gpio-cells = <2>; - #interrupt-cells = <2>; - }; - - gpio1: gpio@fec20000 { - compatible = "rockchip,gpio-bank"; - reg = <0x0 0xfec20000 0x0 0x100>; - interrupts = ; - clocks = <&cru PCLK_GPIO1>, <&cru DBCLK_GPIO1>; - gpio-controller; - gpio-ranges = <&pinctrl 0 32 32>; - interrupt-controller; - #gpio-cells = <2>; - #interrupt-cells = <2>; - }; - - gpio2: gpio@fec30000 { - compatible = "rockchip,gpio-bank"; - reg = <0x0 0xfec30000 0x0 0x100>; - interrupts = ; - clocks = <&cru PCLK_GPIO2>, <&cru DBCLK_GPIO2>; - gpio-controller; - gpio-ranges = <&pinctrl 0 64 32>; - interrupt-controller; - #gpio-cells = <2>; - #interrupt-cells = <2>; - }; - - gpio3: gpio@fec40000 { - compatible = "rockchip,gpio-bank"; - reg = <0x0 0xfec40000 0x0 0x100>; - interrupts = ; - clocks = <&cru PCLK_GPIO3>, <&cru DBCLK_GPIO3>; - gpio-controller; - gpio-ranges = <&pinctrl 0 96 32>; - interrupt-controller; - #gpio-cells = <2>; - #interrupt-cells = <2>; - }; - - gpio4: gpio@fec50000 { - compatible = "rockchip,gpio-bank"; - reg = <0x0 0xfec50000 0x0 0x100>; - interrupts = ; - clocks = <&cru PCLK_GPIO4>, <&cru DBCLK_GPIO4>; - gpio-controller; - gpio-ranges = <&pinctrl 0 128 32>; - interrupt-controller; - #gpio-cells = <2>; - #interrupt-cells = <2>; - }; - }; - - av1d: video-codec@fdc70000 { - compatible = "rockchip,rk3588-av1-vpu"; - reg = <0x0 0xfdc70000 0x0 0x800>; - interrupts = ; - interrupt-names = "vdpu"; - assigned-clocks = <&cru ACLK_AV1>, <&cru PCLK_AV1>; - assigned-clock-rates = <400000000>, <400000000>; - clocks = <&cru ACLK_AV1>, <&cru PCLK_AV1>; - clock-names = "aclk", "hclk"; - power-domains = <&power RK3588_PD_AV1>; - resets = <&cru SRST_A_AV1>, <&cru SRST_P_AV1>, <&cru SRST_A_AV1_BIU>, <&cru SRST_P_AV1_BIU>; - }; -}; - -#include "rk3588s-pinctrl.dtsi" diff --git a/include/dt-bindings/clock/rockchip,rk3588-cru.h b/include/dt-bindings/clock/rockchip,rk3588-cru.h deleted file mode 100644 index b5616bca7b4..00000000000 --- a/include/dt-bindings/clock/rockchip,rk3588-cru.h +++ /dev/null @@ -1,766 +0,0 @@ -/* SPDX-License-Identifier: (GPL-2.0 or MIT) */ -/* - * Copyright (c) 2021 Rockchip Electronics Co. Ltd. - * Copyright (c) 2022 Collabora Ltd. - * - * Author: Elaine Zhang - * Author: Sebastian Reichel - */ - -#ifndef _DT_BINDINGS_CLK_ROCKCHIP_RK3588_H -#define _DT_BINDINGS_CLK_ROCKCHIP_RK3588_H - -/* cru-clocks indices */ - -#define PLL_B0PLL 0 -#define PLL_B1PLL 1 -#define PLL_LPLL 2 -#define PLL_V0PLL 3 -#define PLL_AUPLL 4 -#define PLL_CPLL 5 -#define PLL_GPLL 6 -#define PLL_NPLL 7 -#define PLL_PPLL 8 -#define ARMCLK_L 9 -#define ARMCLK_B01 10 -#define ARMCLK_B23 11 -#define PCLK_BIGCORE0_ROOT 12 -#define PCLK_BIGCORE0_PVTM 13 -#define PCLK_BIGCORE1_ROOT 14 -#define PCLK_BIGCORE1_PVTM 15 -#define PCLK_DSU_S_ROOT 16 -#define PCLK_DSU_ROOT 17 -#define PCLK_DSU_NS_ROOT 18 -#define PCLK_LITCORE_PVTM 19 -#define PCLK_DBG 20 -#define PCLK_DSU 21 -#define PCLK_S_DAPLITE 22 -#define PCLK_M_DAPLITE 23 -#define MBIST_MCLK_PDM1 24 -#define MBIST_CLK_ACDCDIG 25 -#define HCLK_I2S2_2CH 26 -#define HCLK_I2S3_2CH 27 -#define CLK_I2S2_2CH_SRC 28 -#define CLK_I2S2_2CH_FRAC 29 -#define CLK_I2S2_2CH 30 -#define MCLK_I2S2_2CH 31 -#define I2S2_2CH_MCLKOUT 32 -#define CLK_DAC_ACDCDIG 33 -#define CLK_I2S3_2CH_SRC 34 -#define CLK_I2S3_2CH_FRAC 35 -#define CLK_I2S3_2CH 36 -#define MCLK_I2S3_2CH 37 -#define I2S3_2CH_MCLKOUT 38 -#define PCLK_ACDCDIG 39 -#define HCLK_I2S0_8CH 40 -#define CLK_I2S0_8CH_TX_SRC 41 -#define CLK_I2S0_8CH_TX_FRAC 42 -#define MCLK_I2S0_8CH_TX 43 -#define CLK_I2S0_8CH_TX 44 -#define CLK_I2S0_8CH_RX_SRC 45 -#define CLK_I2S0_8CH_RX_FRAC 46 -#define MCLK_I2S0_8CH_RX 47 -#define CLK_I2S0_8CH_RX 48 -#define I2S0_8CH_MCLKOUT 49 -#define HCLK_PDM1 50 -#define MCLK_PDM1 51 -#define HCLK_AUDIO_ROOT 52 -#define PCLK_AUDIO_ROOT 53 -#define HCLK_SPDIF0 54 -#define CLK_SPDIF0_SRC 55 -#define CLK_SPDIF0_FRAC 56 -#define MCLK_SPDIF0 57 -#define CLK_SPDIF0 58 -#define CLK_SPDIF1 59 -#define HCLK_SPDIF1 60 -#define CLK_SPDIF1_SRC 61 -#define CLK_SPDIF1_FRAC 62 -#define MCLK_SPDIF1 63 -#define ACLK_AV1_ROOT 64 -#define ACLK_AV1 65 -#define PCLK_AV1_ROOT 66 -#define PCLK_AV1 67 -#define PCLK_MAILBOX0 68 -#define PCLK_MAILBOX1 69 -#define PCLK_MAILBOX2 70 -#define PCLK_PMU2 71 -#define PCLK_PMUCM0_INTMUX 72 -#define PCLK_DDRCM0_INTMUX 73 -#define PCLK_TOP 74 -#define PCLK_PWM1 75 -#define CLK_PWM1 76 -#define CLK_PWM1_CAPTURE 77 -#define PCLK_PWM2 78 -#define CLK_PWM2 79 -#define CLK_PWM2_CAPTURE 80 -#define PCLK_PWM3 81 -#define CLK_PWM3 82 -#define CLK_PWM3_CAPTURE 83 -#define PCLK_BUSTIMER0 84 -#define PCLK_BUSTIMER1 85 -#define CLK_BUS_TIMER_ROOT 86 -#define CLK_BUSTIMER0 87 -#define CLK_BUSTIMER1 88 -#define CLK_BUSTIMER2 89 -#define CLK_BUSTIMER3 90 -#define CLK_BUSTIMER4 91 -#define CLK_BUSTIMER5 92 -#define CLK_BUSTIMER6 93 -#define CLK_BUSTIMER7 94 -#define CLK_BUSTIMER8 95 -#define CLK_BUSTIMER9 96 -#define CLK_BUSTIMER10 97 -#define CLK_BUSTIMER11 98 -#define PCLK_WDT0 99 -#define TCLK_WDT0 100 -#define PCLK_CAN0 101 -#define CLK_CAN0 102 -#define PCLK_CAN1 103 -#define CLK_CAN1 104 -#define PCLK_CAN2 105 -#define CLK_CAN2 106 -#define ACLK_DECOM 107 -#define PCLK_DECOM 108 -#define DCLK_DECOM 109 -#define ACLK_DMAC0 110 -#define ACLK_DMAC1 111 -#define ACLK_DMAC2 112 -#define ACLK_BUS_ROOT 113 -#define ACLK_GIC 114 -#define PCLK_GPIO1 115 -#define DBCLK_GPIO1 116 -#define PCLK_GPIO2 117 -#define DBCLK_GPIO2 118 -#define PCLK_GPIO3 119 -#define DBCLK_GPIO3 120 -#define PCLK_GPIO4 121 -#define DBCLK_GPIO4 122 -#define PCLK_I2C1 123 -#define PCLK_I2C2 124 -#define PCLK_I2C3 125 -#define PCLK_I2C4 126 -#define PCLK_I2C5 127 -#define PCLK_I2C6 128 -#define PCLK_I2C7 129 -#define PCLK_I2C8 130 -#define CLK_I2C1 131 -#define CLK_I2C2 132 -#define CLK_I2C3 133 -#define CLK_I2C4 134 -#define CLK_I2C5 135 -#define CLK_I2C6 136 -#define CLK_I2C7 137 -#define CLK_I2C8 138 -#define PCLK_OTPC_NS 139 -#define CLK_OTPC_NS 140 -#define CLK_OTPC_ARB 141 -#define CLK_OTPC_AUTO_RD_G 142 -#define CLK_OTP_PHY_G 143 -#define PCLK_SARADC 144 -#define CLK_SARADC 145 -#define PCLK_SPI0 146 -#define PCLK_SPI1 147 -#define PCLK_SPI2 148 -#define PCLK_SPI3 149 -#define PCLK_SPI4 150 -#define CLK_SPI0 151 -#define CLK_SPI1 152 -#define CLK_SPI2 153 -#define CLK_SPI3 154 -#define CLK_SPI4 155 -#define ACLK_SPINLOCK 156 -#define PCLK_TSADC 157 -#define CLK_TSADC 158 -#define PCLK_UART1 159 -#define PCLK_UART2 160 -#define PCLK_UART3 161 -#define PCLK_UART4 162 -#define PCLK_UART5 163 -#define PCLK_UART6 164 -#define PCLK_UART7 165 -#define PCLK_UART8 166 -#define PCLK_UART9 167 -#define CLK_UART1_SRC 168 -#define CLK_UART1_FRAC 169 -#define CLK_UART1 170 -#define SCLK_UART1 171 -#define CLK_UART2_SRC 172 -#define CLK_UART2_FRAC 173 -#define CLK_UART2 174 -#define SCLK_UART2 175 -#define CLK_UART3_SRC 176 -#define CLK_UART3_FRAC 177 -#define CLK_UART3 178 -#define SCLK_UART3 179 -#define CLK_UART4_SRC 180 -#define CLK_UART4_FRAC 181 -#define CLK_UART4 182 -#define SCLK_UART4 183 -#define CLK_UART5_SRC 184 -#define CLK_UART5_FRAC 185 -#define CLK_UART5 186 -#define SCLK_UART5 187 -#define CLK_UART6_SRC 188 -#define CLK_UART6_FRAC 189 -#define CLK_UART6 190 -#define SCLK_UART6 191 -#define CLK_UART7_SRC 192 -#define CLK_UART7_FRAC 193 -#define CLK_UART7 194 -#define SCLK_UART7 195 -#define CLK_UART8_SRC 196 -#define CLK_UART8_FRAC 197 -#define CLK_UART8 198 -#define SCLK_UART8 199 -#define CLK_UART9_SRC 200 -#define CLK_UART9_FRAC 201 -#define CLK_UART9 202 -#define SCLK_UART9 203 -#define ACLK_CENTER_ROOT 204 -#define ACLK_CENTER_LOW_ROOT 205 -#define HCLK_CENTER_ROOT 206 -#define PCLK_CENTER_ROOT 207 -#define ACLK_DMA2DDR 208 -#define ACLK_DDR_SHAREMEM 209 -#define ACLK_CENTER_S200_ROOT 210 -#define ACLK_CENTER_S400_ROOT 211 -#define FCLK_DDR_CM0_CORE 212 -#define CLK_DDR_TIMER_ROOT 213 -#define CLK_DDR_TIMER0 214 -#define CLK_DDR_TIMER1 215 -#define TCLK_WDT_DDR 216 -#define CLK_DDR_CM0_RTC 217 -#define PCLK_WDT 218 -#define PCLK_TIMER 219 -#define PCLK_DMA2DDR 220 -#define PCLK_SHAREMEM 221 -#define CLK_50M_SRC 222 -#define CLK_100M_SRC 223 -#define CLK_150M_SRC 224 -#define CLK_200M_SRC 225 -#define CLK_250M_SRC 226 -#define CLK_300M_SRC 227 -#define CLK_350M_SRC 228 -#define CLK_400M_SRC 229 -#define CLK_450M_SRC 230 -#define CLK_500M_SRC 231 -#define CLK_600M_SRC 232 -#define CLK_650M_SRC 233 -#define CLK_700M_SRC 234 -#define CLK_800M_SRC 235 -#define CLK_1000M_SRC 236 -#define CLK_1200M_SRC 237 -#define ACLK_TOP_M300_ROOT 238 -#define ACLK_TOP_M500_ROOT 239 -#define ACLK_TOP_M400_ROOT 240 -#define ACLK_TOP_S200_ROOT 241 -#define ACLK_TOP_S400_ROOT 242 -#define CLK_MIPI_CAMARAOUT_M0 243 -#define CLK_MIPI_CAMARAOUT_M1 244 -#define CLK_MIPI_CAMARAOUT_M2 245 -#define CLK_MIPI_CAMARAOUT_M3 246 -#define CLK_MIPI_CAMARAOUT_M4 247 -#define MCLK_GMAC0_OUT 248 -#define REFCLKO25M_ETH0_OUT 249 -#define REFCLKO25M_ETH1_OUT 250 -#define CLK_CIFOUT_OUT 251 -#define PCLK_MIPI_DCPHY0 252 -#define PCLK_MIPI_DCPHY1 253 -#define PCLK_CSIPHY0 254 -#define PCLK_CSIPHY1 255 -#define ACLK_TOP_ROOT 256 -#define PCLK_TOP_ROOT 257 -#define ACLK_LOW_TOP_ROOT 258 -#define PCLK_CRU 259 -#define PCLK_GPU_ROOT 260 -#define CLK_GPU_SRC 261 -#define CLK_GPU 262 -#define CLK_GPU_COREGROUP 263 -#define CLK_GPU_STACKS 264 -#define PCLK_GPU_PVTM 265 -#define CLK_GPU_PVTM 266 -#define CLK_CORE_GPU_PVTM 267 -#define PCLK_GPU_GRF 268 -#define ACLK_ISP1_ROOT 269 -#define HCLK_ISP1_ROOT 270 -#define CLK_ISP1_CORE 271 -#define CLK_ISP1_CORE_MARVIN 272 -#define CLK_ISP1_CORE_VICAP 273 -#define ACLK_ISP1 274 -#define HCLK_ISP1 275 -#define ACLK_NPU1 276 -#define HCLK_NPU1 277 -#define ACLK_NPU2 278 -#define HCLK_NPU2 279 -#define HCLK_NPU_CM0_ROOT 280 -#define FCLK_NPU_CM0_CORE 281 -#define CLK_NPU_CM0_RTC 282 -#define PCLK_NPU_PVTM 283 -#define PCLK_NPU_GRF 284 -#define CLK_NPU_PVTM 285 -#define CLK_CORE_NPU_PVTM 286 -#define ACLK_NPU0 287 -#define HCLK_NPU0 288 -#define HCLK_NPU_ROOT 289 -#define CLK_NPU_DSU0 290 -#define PCLK_NPU_ROOT 291 -#define PCLK_NPU_TIMER 292 -#define CLK_NPUTIMER_ROOT 293 -#define CLK_NPUTIMER0 294 -#define CLK_NPUTIMER1 295 -#define PCLK_NPU_WDT 296 -#define TCLK_NPU_WDT 297 -#define HCLK_EMMC 298 -#define ACLK_EMMC 299 -#define CCLK_EMMC 300 -#define BCLK_EMMC 301 -#define TMCLK_EMMC 302 -#define SCLK_SFC 303 -#define HCLK_SFC 304 -#define HCLK_SFC_XIP 305 -#define HCLK_NVM_ROOT 306 -#define ACLK_NVM_ROOT 307 -#define CLK_GMAC0_PTP_REF 308 -#define CLK_GMAC1_PTP_REF 309 -#define CLK_GMAC_125M 310 -#define CLK_GMAC_50M 311 -#define ACLK_PHP_GIC_ITS 312 -#define ACLK_MMU_PCIE 313 -#define ACLK_MMU_PHP 314 -#define ACLK_PCIE_4L_DBI 315 -#define ACLK_PCIE_2L_DBI 316 -#define ACLK_PCIE_1L0_DBI 317 -#define ACLK_PCIE_1L1_DBI 318 -#define ACLK_PCIE_1L2_DBI 319 -#define ACLK_PCIE_4L_MSTR 320 -#define ACLK_PCIE_2L_MSTR 321 -#define ACLK_PCIE_1L0_MSTR 322 -#define ACLK_PCIE_1L1_MSTR 323 -#define ACLK_PCIE_1L2_MSTR 324 -#define ACLK_PCIE_4L_SLV 325 -#define ACLK_PCIE_2L_SLV 326 -#define ACLK_PCIE_1L0_SLV 327 -#define ACLK_PCIE_1L1_SLV 328 -#define ACLK_PCIE_1L2_SLV 329 -#define PCLK_PCIE_4L 330 -#define PCLK_PCIE_2L 331 -#define PCLK_PCIE_1L0 332 -#define PCLK_PCIE_1L1 333 -#define PCLK_PCIE_1L2 334 -#define CLK_PCIE_AUX0 335 -#define CLK_PCIE_AUX1 336 -#define CLK_PCIE_AUX2 337 -#define CLK_PCIE_AUX3 338 -#define CLK_PCIE_AUX4 339 -#define CLK_PIPEPHY0_REF 340 -#define CLK_PIPEPHY1_REF 341 -#define CLK_PIPEPHY2_REF 342 -#define PCLK_PHP_ROOT 343 -#define PCLK_GMAC0 344 -#define PCLK_GMAC1 345 -#define ACLK_PCIE_ROOT 346 -#define ACLK_PHP_ROOT 347 -#define ACLK_PCIE_BRIDGE 348 -#define ACLK_GMAC0 349 -#define ACLK_GMAC1 350 -#define CLK_PMALIVE0 351 -#define CLK_PMALIVE1 352 -#define CLK_PMALIVE2 353 -#define ACLK_SATA0 354 -#define ACLK_SATA1 355 -#define ACLK_SATA2 356 -#define CLK_RXOOB0 357 -#define CLK_RXOOB1 358 -#define CLK_RXOOB2 359 -#define ACLK_USB3OTG2 360 -#define SUSPEND_CLK_USB3OTG2 361 -#define REF_CLK_USB3OTG2 362 -#define CLK_UTMI_OTG2 363 -#define CLK_PIPEPHY0_PIPE_G 364 -#define CLK_PIPEPHY1_PIPE_G 365 -#define CLK_PIPEPHY2_PIPE_G 366 -#define CLK_PIPEPHY0_PIPE_ASIC_G 367 -#define CLK_PIPEPHY1_PIPE_ASIC_G 368 -#define CLK_PIPEPHY2_PIPE_ASIC_G 369 -#define CLK_PIPEPHY2_PIPE_U3_G 370 -#define CLK_PCIE1L2_PIPE 371 -#define CLK_PCIE4L_PIPE 372 -#define CLK_PCIE2L_PIPE 373 -#define PCLK_PCIE_COMBO_PIPE_PHY0 374 -#define PCLK_PCIE_COMBO_PIPE_PHY1 375 -#define PCLK_PCIE_COMBO_PIPE_PHY2 376 -#define PCLK_PCIE_COMBO_PIPE_PHY 377 -#define HCLK_RGA3_1 378 -#define ACLK_RGA3_1 379 -#define CLK_RGA3_1_CORE 380 -#define ACLK_RGA3_ROOT 381 -#define HCLK_RGA3_ROOT 382 -#define ACLK_RKVDEC_CCU 383 -#define HCLK_RKVDEC0 384 -#define ACLK_RKVDEC0 385 -#define CLK_RKVDEC0_CA 386 -#define CLK_RKVDEC0_HEVC_CA 387 -#define CLK_RKVDEC0_CORE 388 -#define HCLK_RKVDEC1 389 -#define ACLK_RKVDEC1 390 -#define CLK_RKVDEC1_CA 391 -#define CLK_RKVDEC1_HEVC_CA 392 -#define CLK_RKVDEC1_CORE 393 -#define HCLK_SDIO 394 -#define CCLK_SRC_SDIO 395 -#define ACLK_USB_ROOT 396 -#define HCLK_USB_ROOT 397 -#define HCLK_HOST0 398 -#define HCLK_HOST_ARB0 399 -#define HCLK_HOST1 400 -#define HCLK_HOST_ARB1 401 -#define ACLK_USB3OTG0 402 -#define SUSPEND_CLK_USB3OTG0 403 -#define REF_CLK_USB3OTG0 404 -#define ACLK_USB3OTG1 405 -#define SUSPEND_CLK_USB3OTG1 406 -#define REF_CLK_USB3OTG1 407 -#define UTMI_OHCI_CLK48_HOST0 408 -#define UTMI_OHCI_CLK48_HOST1 409 -#define HCLK_IEP2P0 410 -#define ACLK_IEP2P0 411 -#define CLK_IEP2P0_CORE 412 -#define ACLK_JPEG_ENCODER0 413 -#define HCLK_JPEG_ENCODER0 414 -#define ACLK_JPEG_ENCODER1 415 -#define HCLK_JPEG_ENCODER1 416 -#define ACLK_JPEG_ENCODER2 417 -#define HCLK_JPEG_ENCODER2 418 -#define ACLK_JPEG_ENCODER3 419 -#define HCLK_JPEG_ENCODER3 420 -#define ACLK_JPEG_DECODER 421 -#define HCLK_JPEG_DECODER 422 -#define HCLK_RGA2 423 -#define ACLK_RGA2 424 -#define CLK_RGA2_CORE 425 -#define HCLK_RGA3_0 426 -#define ACLK_RGA3_0 427 -#define CLK_RGA3_0_CORE 428 -#define ACLK_VDPU_ROOT 429 -#define ACLK_VDPU_LOW_ROOT 430 -#define HCLK_VDPU_ROOT 431 -#define ACLK_JPEG_DECODER_ROOT 432 -#define ACLK_VPU 433 -#define HCLK_VPU 434 -#define HCLK_RKVENC0_ROOT 435 -#define ACLK_RKVENC0_ROOT 436 -#define HCLK_RKVENC0 437 -#define ACLK_RKVENC0 438 -#define CLK_RKVENC0_CORE 439 -#define HCLK_RKVENC1_ROOT 440 -#define ACLK_RKVENC1_ROOT 441 -#define HCLK_RKVENC1 442 -#define ACLK_RKVENC1 443 -#define CLK_RKVENC1_CORE 444 -#define ICLK_CSIHOST01 445 -#define ICLK_CSIHOST0 446 -#define ICLK_CSIHOST1 447 -#define PCLK_CSI_HOST_0 448 -#define PCLK_CSI_HOST_1 449 -#define PCLK_CSI_HOST_2 450 -#define PCLK_CSI_HOST_3 451 -#define PCLK_CSI_HOST_4 452 -#define PCLK_CSI_HOST_5 453 -#define ACLK_FISHEYE0 454 -#define HCLK_FISHEYE0 455 -#define CLK_FISHEYE0_CORE 456 -#define ACLK_FISHEYE1 457 -#define HCLK_FISHEYE1 458 -#define CLK_FISHEYE1_CORE 459 -#define CLK_ISP0_CORE 460 -#define CLK_ISP0_CORE_MARVIN 461 -#define CLK_ISP0_CORE_VICAP 462 -#define ACLK_ISP0 463 -#define HCLK_ISP0 464 -#define ACLK_VI_ROOT 465 -#define HCLK_VI_ROOT 466 -#define PCLK_VI_ROOT 467 -#define DCLK_VICAP 468 -#define ACLK_VICAP 469 -#define HCLK_VICAP 470 -#define PCLK_DP0 471 -#define PCLK_DP1 472 -#define PCLK_S_DP0 473 -#define PCLK_S_DP1 474 -#define CLK_DP0 475 -#define CLK_DP1 476 -#define HCLK_HDCP_KEY0 477 -#define ACLK_HDCP0 478 -#define HCLK_HDCP0 479 -#define PCLK_HDCP0 480 -#define HCLK_I2S4_8CH 481 -#define ACLK_TRNG0 482 -#define PCLK_TRNG0 483 -#define ACLK_VO0_ROOT 484 -#define HCLK_VO0_ROOT 485 -#define HCLK_VO0_S_ROOT 486 -#define PCLK_VO0_ROOT 487 -#define PCLK_VO0_S_ROOT 488 -#define PCLK_VO0GRF 489 -#define CLK_I2S4_8CH_TX_SRC 490 -#define CLK_I2S4_8CH_TX_FRAC 491 -#define MCLK_I2S4_8CH_TX 492 -#define CLK_I2S4_8CH_TX 493 -#define HCLK_I2S8_8CH 494 -#define CLK_I2S8_8CH_TX_SRC 495 -#define CLK_I2S8_8CH_TX_FRAC 496 -#define MCLK_I2S8_8CH_TX 497 -#define CLK_I2S8_8CH_TX 498 -#define HCLK_SPDIF2_DP0 499 -#define CLK_SPDIF2_DP0_SRC 500 -#define CLK_SPDIF2_DP0_FRAC 501 -#define MCLK_SPDIF2_DP0 502 -#define CLK_SPDIF2_DP0 503 -#define MCLK_SPDIF2 504 -#define HCLK_SPDIF5_DP1 505 -#define CLK_SPDIF5_DP1_SRC 506 -#define CLK_SPDIF5_DP1_FRAC 507 -#define MCLK_SPDIF5_DP1 508 -#define CLK_SPDIF5_DP1 509 -#define MCLK_SPDIF5 510 -#define PCLK_EDP0 511 -#define CLK_EDP0_24M 512 -#define CLK_EDP0_200M 513 -#define PCLK_EDP1 514 -#define CLK_EDP1_24M 515 -#define CLK_EDP1_200M 516 -#define HCLK_HDCP_KEY1 517 -#define ACLK_HDCP1 518 -#define HCLK_HDCP1 519 -#define PCLK_HDCP1 520 -#define ACLK_HDMIRX 521 -#define PCLK_HDMIRX 522 -#define CLK_HDMIRX_REF 523 -#define CLK_HDMIRX_AUD_SRC 524 -#define CLK_HDMIRX_AUD_FRAC 525 -#define CLK_HDMIRX_AUD 526 -#define CLK_HDMIRX_AUD_P_MUX 527 -#define PCLK_HDMITX0 528 -#define CLK_HDMITX0_EARC 529 -#define CLK_HDMITX0_REF 530 -#define PCLK_HDMITX1 531 -#define CLK_HDMITX1_EARC 532 -#define CLK_HDMITX1_REF 533 -#define CLK_HDMITRX_REFSRC 534 -#define ACLK_TRNG1 535 -#define PCLK_TRNG1 536 -#define ACLK_HDCP1_ROOT 537 -#define ACLK_HDMIRX_ROOT 538 -#define HCLK_VO1_ROOT 539 -#define HCLK_VO1_S_ROOT 540 -#define PCLK_VO1_ROOT 541 -#define PCLK_VO1_S_ROOT 542 -#define PCLK_S_EDP0 543 -#define PCLK_S_EDP1 544 -#define PCLK_S_HDMIRX 545 -#define HCLK_I2S10_8CH 546 -#define CLK_I2S10_8CH_RX_SRC 547 -#define CLK_I2S10_8CH_RX_FRAC 548 -#define CLK_I2S10_8CH_RX 549 -#define MCLK_I2S10_8CH_RX 550 -#define HCLK_I2S7_8CH 551 -#define CLK_I2S7_8CH_RX_SRC 552 -#define CLK_I2S7_8CH_RX_FRAC 553 -#define CLK_I2S7_8CH_RX 554 -#define MCLK_I2S7_8CH_RX 555 -#define HCLK_I2S9_8CH 556 -#define CLK_I2S9_8CH_RX_SRC 557 -#define CLK_I2S9_8CH_RX_FRAC 558 -#define CLK_I2S9_8CH_RX 559 -#define MCLK_I2S9_8CH_RX 560 -#define CLK_I2S5_8CH_TX_SRC 561 -#define CLK_I2S5_8CH_TX_FRAC 562 -#define CLK_I2S5_8CH_TX 563 -#define MCLK_I2S5_8CH_TX 564 -#define HCLK_I2S5_8CH 565 -#define CLK_I2S6_8CH_TX_SRC 566 -#define CLK_I2S6_8CH_TX_FRAC 567 -#define CLK_I2S6_8CH_TX 568 -#define MCLK_I2S6_8CH_TX 569 -#define CLK_I2S6_8CH_RX_SRC 570 -#define CLK_I2S6_8CH_RX_FRAC 571 -#define CLK_I2S6_8CH_RX 572 -#define MCLK_I2S6_8CH_RX 573 -#define I2S6_8CH_MCLKOUT 574 -#define HCLK_I2S6_8CH 575 -#define HCLK_SPDIF3 576 -#define CLK_SPDIF3_SRC 577 -#define CLK_SPDIF3_FRAC 578 -#define CLK_SPDIF3 579 -#define MCLK_SPDIF3 580 -#define HCLK_SPDIF4 581 -#define CLK_SPDIF4_SRC 582 -#define CLK_SPDIF4_FRAC 583 -#define CLK_SPDIF4 584 -#define MCLK_SPDIF4 585 -#define HCLK_SPDIFRX0 586 -#define MCLK_SPDIFRX0 587 -#define HCLK_SPDIFRX1 588 -#define MCLK_SPDIFRX1 589 -#define HCLK_SPDIFRX2 590 -#define MCLK_SPDIFRX2 591 -#define ACLK_VO1USB_TOP_ROOT 592 -#define HCLK_VO1USB_TOP_ROOT 593 -#define CLK_HDMIHDP0 594 -#define CLK_HDMIHDP1 595 -#define PCLK_HDPTX0 596 -#define PCLK_HDPTX1 597 -#define PCLK_USBDPPHY0 598 -#define PCLK_USBDPPHY1 599 -#define ACLK_VOP_ROOT 600 -#define ACLK_VOP_LOW_ROOT 601 -#define HCLK_VOP_ROOT 602 -#define PCLK_VOP_ROOT 603 -#define HCLK_VOP 604 -#define ACLK_VOP 605 -#define DCLK_VOP0_SRC 606 -#define DCLK_VOP1_SRC 607 -#define DCLK_VOP2_SRC 608 -#define DCLK_VOP0 609 -#define DCLK_VOP1 610 -#define DCLK_VOP2 611 -#define DCLK_VOP3 612 -#define PCLK_DSIHOST0 613 -#define PCLK_DSIHOST1 614 -#define CLK_DSIHOST0 615 -#define CLK_DSIHOST1 616 -#define CLK_VOP_PMU 617 -#define ACLK_VOP_DOBY 618 -#define ACLK_VOP_SUB_SRC 619 -#define CLK_USBDP_PHY0_IMMORTAL 620 -#define CLK_USBDP_PHY1_IMMORTAL 621 -#define CLK_PMU0 622 -#define PCLK_PMU0 623 -#define PCLK_PMU0IOC 624 -#define PCLK_GPIO0 625 -#define DBCLK_GPIO0 626 -#define PCLK_I2C0 627 -#define CLK_I2C0 628 -#define HCLK_I2S1_8CH 629 -#define CLK_I2S1_8CH_TX_SRC 630 -#define CLK_I2S1_8CH_TX_FRAC 631 -#define CLK_I2S1_8CH_TX 632 -#define MCLK_I2S1_8CH_TX 633 -#define CLK_I2S1_8CH_RX_SRC 634 -#define CLK_I2S1_8CH_RX_FRAC 635 -#define CLK_I2S1_8CH_RX 636 -#define MCLK_I2S1_8CH_RX 637 -#define I2S1_8CH_MCLKOUT 638 -#define CLK_PMU1_50M_SRC 639 -#define CLK_PMU1_100M_SRC 640 -#define CLK_PMU1_200M_SRC 641 -#define CLK_PMU1_300M_SRC 642 -#define CLK_PMU1_400M_SRC 643 -#define HCLK_PMU1_ROOT 644 -#define PCLK_PMU1_ROOT 645 -#define PCLK_PMU0_ROOT 646 -#define HCLK_PMU_CM0_ROOT 647 -#define PCLK_PMU1 648 -#define CLK_DDR_FAIL_SAFE 649 -#define CLK_PMU1 650 -#define HCLK_PDM0 651 -#define MCLK_PDM0 652 -#define HCLK_VAD 653 -#define FCLK_PMU_CM0_CORE 654 -#define CLK_PMU_CM0_RTC 655 -#define PCLK_PMU1_IOC 656 -#define PCLK_PMU1PWM 657 -#define CLK_PMU1PWM 658 -#define CLK_PMU1PWM_CAPTURE 659 -#define PCLK_PMU1TIMER 660 -#define CLK_PMU1TIMER_ROOT 661 -#define CLK_PMU1TIMER0 662 -#define CLK_PMU1TIMER1 663 -#define CLK_UART0_SRC 664 -#define CLK_UART0_FRAC 665 -#define CLK_UART0 666 -#define SCLK_UART0 667 -#define PCLK_UART0 668 -#define PCLK_PMU1WDT 669 -#define TCLK_PMU1WDT 670 -#define CLK_CR_PARA 671 -#define CLK_USB2PHY_HDPTXRXPHY_REF 672 -#define CLK_USBDPPHY_MIPIDCPPHY_REF 673 -#define CLK_REF_PIPE_PHY0_OSC_SRC 674 -#define CLK_REF_PIPE_PHY1_OSC_SRC 675 -#define CLK_REF_PIPE_PHY2_OSC_SRC 676 -#define CLK_REF_PIPE_PHY0_PLL_SRC 677 -#define CLK_REF_PIPE_PHY1_PLL_SRC 678 -#define CLK_REF_PIPE_PHY2_PLL_SRC 679 -#define CLK_REF_PIPE_PHY0 680 -#define CLK_REF_PIPE_PHY1 681 -#define CLK_REF_PIPE_PHY2 682 -#define SCLK_SDIO_DRV 683 -#define SCLK_SDIO_SAMPLE 684 -#define SCLK_SDMMC_DRV 685 -#define SCLK_SDMMC_SAMPLE 686 -#define CLK_PCIE1L0_PIPE 687 -#define CLK_PCIE1L1_PIPE 688 -#define CLK_BIGCORE0_PVTM 689 -#define CLK_CORE_BIGCORE0_PVTM 690 -#define CLK_BIGCORE1_PVTM 691 -#define CLK_CORE_BIGCORE1_PVTM 692 -#define CLK_LITCORE_PVTM 693 -#define CLK_CORE_LITCORE_PVTM 694 -#define CLK_AUX16M_0 695 -#define CLK_AUX16M_1 696 -#define CLK_PHY0_REF_ALT_P 697 -#define CLK_PHY0_REF_ALT_M 698 -#define CLK_PHY1_REF_ALT_P 699 -#define CLK_PHY1_REF_ALT_M 700 -#define ACLK_ISP1_PRE 701 -#define HCLK_ISP1_PRE 702 -#define HCLK_NVM 703 -#define ACLK_USB 704 -#define HCLK_USB 705 -#define ACLK_JPEG_DECODER_PRE 706 -#define ACLK_VDPU_LOW_PRE 707 -#define ACLK_RKVENC1_PRE 708 -#define HCLK_RKVENC1_PRE 709 -#define HCLK_RKVDEC0_PRE 710 -#define ACLK_RKVDEC0_PRE 711 -#define HCLK_RKVDEC1_PRE 712 -#define ACLK_RKVDEC1_PRE 713 -#define ACLK_HDCP0_PRE 714 -#define HCLK_VO0 715 -#define ACLK_HDCP1_PRE 716 -#define HCLK_VO1 717 -#define ACLK_AV1_PRE 718 -#define PCLK_AV1_PRE 719 -#define HCLK_SDIO_PRE 720 - -#define CLK_NR_CLKS (HCLK_SDIO_PRE + 1) - -/* scmi-clocks indices */ - -#define SCMI_CLK_CPUL 0 -#define SCMI_CLK_DSU 1 -#define SCMI_CLK_CPUB01 2 -#define SCMI_CLK_CPUB23 3 -#define SCMI_CLK_DDR 4 -#define SCMI_CLK_GPU 5 -#define SCMI_CLK_NPU 6 -#define SCMI_CLK_SBUS 7 -#define SCMI_PCLK_SBUS 8 -#define SCMI_CCLK_SD 9 -#define SCMI_DCLK_SD 10 -#define SCMI_ACLK_SECURE_NS 11 -#define SCMI_HCLK_SECURE_NS 12 -#define SCMI_TCLK_WDT 13 -#define SCMI_KEYLADDER_CORE 14 -#define SCMI_KEYLADDER_RNG 15 -#define SCMI_ACLK_SECURE_S 16 -#define SCMI_HCLK_SECURE_S 17 -#define SCMI_PCLK_SECURE_S 18 -#define SCMI_CRYPTO_RNG 19 -#define SCMI_CRYPTO_CORE 20 -#define SCMI_CRYPTO_PKA 21 -#define SCMI_SPLL 22 -#define SCMI_HCLK_SD 23 - -#endif diff --git a/include/dt-bindings/power/rk3588-power.h b/include/dt-bindings/power/rk3588-power.h deleted file mode 100644 index 1b92fec013c..00000000000 --- a/include/dt-bindings/power/rk3588-power.h +++ /dev/null @@ -1,69 +0,0 @@ -/* SPDX-License-Identifier: (GPL-2.0 or MIT) */ -#ifndef __DT_BINDINGS_POWER_RK3588_POWER_H__ -#define __DT_BINDINGS_POWER_RK3588_POWER_H__ - -/* VD_LITDSU */ -#define RK3588_PD_CPU_0 0 -#define RK3588_PD_CPU_1 1 -#define RK3588_PD_CPU_2 2 -#define RK3588_PD_CPU_3 3 - -/* VD_BIGCORE0 */ -#define RK3588_PD_CPU_4 4 -#define RK3588_PD_CPU_5 5 - -/* VD_BIGCORE1 */ -#define RK3588_PD_CPU_6 6 -#define RK3588_PD_CPU_7 7 - -/* VD_NPU */ -#define RK3588_PD_NPU 8 -#define RK3588_PD_NPUTOP 9 -#define RK3588_PD_NPU1 10 -#define RK3588_PD_NPU2 11 - -/* VD_GPU */ -#define RK3588_PD_GPU 12 - -/* VD_VCODEC */ -#define RK3588_PD_VCODEC 13 -#define RK3588_PD_RKVDEC0 14 -#define RK3588_PD_RKVDEC1 15 -#define RK3588_PD_VENC0 16 -#define RK3588_PD_VENC1 17 - -/* VD_DD01 */ -#define RK3588_PD_DDR01 18 - -/* VD_DD23 */ -#define RK3588_PD_DDR23 19 - -/* VD_LOGIC */ -#define RK3588_PD_CENTER 20 -#define RK3588_PD_VDPU 21 -#define RK3588_PD_RGA30 22 -#define RK3588_PD_AV1 23 -#define RK3588_PD_VOP 24 -#define RK3588_PD_VO0 25 -#define RK3588_PD_VO1 26 -#define RK3588_PD_VI 27 -#define RK3588_PD_ISP1 28 -#define RK3588_PD_FEC 29 -#define RK3588_PD_RGA31 30 -#define RK3588_PD_USB 31 -#define RK3588_PD_PHP 32 -#define RK3588_PD_GMAC 33 -#define RK3588_PD_PCIE 34 -#define RK3588_PD_NVM 35 -#define RK3588_PD_NVM0 36 -#define RK3588_PD_SDIO 37 -#define RK3588_PD_AUDIO 38 -#define RK3588_PD_SECURE 39 -#define RK3588_PD_SDMMC 40 -#define RK3588_PD_CRYPTO 41 -#define RK3588_PD_BUS 42 - -/* VD_PMU */ -#define RK3588_PD_PMU1 43 - -#endif diff --git a/include/dt-bindings/reset/rockchip,rk3588-cru.h b/include/dt-bindings/reset/rockchip,rk3588-cru.h deleted file mode 100644 index 738e56aead9..00000000000 --- a/include/dt-bindings/reset/rockchip,rk3588-cru.h +++ /dev/null @@ -1,754 +0,0 @@ -/* SPDX-License-Identifier: (GPL-2.0 or MIT) */ -/* - * Copyright (c) 2021 Rockchip Electronics Co. Ltd. - * Copyright (c) 2022 Collabora Ltd. - * - * Author: Elaine Zhang - * Author: Sebastian Reichel - */ - -#ifndef _DT_BINDINGS_RESET_ROCKCHIP_RK3588_H -#define _DT_BINDINGS_RESET_ROCKCHIP_RK3588_H - -#define SRST_A_TOP_BIU 0 -#define SRST_P_TOP_BIU 1 -#define SRST_P_CSIPHY0 2 -#define SRST_CSIPHY0 3 -#define SRST_P_CSIPHY1 4 -#define SRST_CSIPHY1 5 -#define SRST_A_TOP_M500_BIU 6 - -#define SRST_A_TOP_M400_BIU 7 -#define SRST_A_TOP_S200_BIU 8 -#define SRST_A_TOP_S400_BIU 9 -#define SRST_A_TOP_M300_BIU 10 -#define SRST_USBDP_COMBO_PHY0_INIT 11 -#define SRST_USBDP_COMBO_PHY0_CMN 12 -#define SRST_USBDP_COMBO_PHY0_LANE 13 -#define SRST_USBDP_COMBO_PHY0_PCS 14 -#define SRST_USBDP_COMBO_PHY1_INIT 15 - -#define SRST_USBDP_COMBO_PHY1_CMN 16 -#define SRST_USBDP_COMBO_PHY1_LANE 17 -#define SRST_USBDP_COMBO_PHY1_PCS 18 -#define SRST_DCPHY0 19 -#define SRST_P_MIPI_DCPHY0 20 -#define SRST_P_MIPI_DCPHY0_GRF 21 - -#define SRST_DCPHY1 22 -#define SRST_P_MIPI_DCPHY1 23 -#define SRST_P_MIPI_DCPHY1_GRF 24 -#define SRST_P_APB2ASB_SLV_CDPHY 25 -#define SRST_P_APB2ASB_SLV_CSIPHY 26 -#define SRST_P_APB2ASB_SLV_VCCIO3_5 27 -#define SRST_P_APB2ASB_SLV_VCCIO6 28 -#define SRST_P_APB2ASB_SLV_EMMCIO 29 -#define SRST_P_APB2ASB_SLV_IOC_TOP 30 -#define SRST_P_APB2ASB_SLV_IOC_RIGHT 31 - -#define SRST_P_CRU 32 -#define SRST_A_CHANNEL_SECURE2VO1USB 33 -#define SRST_A_CHANNEL_SECURE2CENTER 34 -#define SRST_H_CHANNEL_SECURE2VO1USB 35 -#define SRST_H_CHANNEL_SECURE2CENTER 36 - -#define SRST_P_CHANNEL_SECURE2VO1USB 37 -#define SRST_P_CHANNEL_SECURE2CENTER 38 - -#define SRST_H_AUDIO_BIU 39 -#define SRST_P_AUDIO_BIU 40 -#define SRST_H_I2S0_8CH 41 -#define SRST_M_I2S0_8CH_TX 42 -#define SRST_M_I2S0_8CH_RX 43 -#define SRST_P_ACDCDIG 44 -#define SRST_H_I2S2_2CH 45 -#define SRST_H_I2S3_2CH 46 - -#define SRST_M_I2S2_2CH 47 -#define SRST_M_I2S3_2CH 48 -#define SRST_DAC_ACDCDIG 49 -#define SRST_H_SPDIF0 50 - -#define SRST_M_SPDIF0 51 -#define SRST_H_SPDIF1 52 -#define SRST_M_SPDIF1 53 -#define SRST_H_PDM1 54 -#define SRST_PDM1 55 - -#define SRST_A_BUS_BIU 56 -#define SRST_P_BUS_BIU 57 -#define SRST_A_GIC 58 -#define SRST_A_GIC_DBG 59 -#define SRST_A_DMAC0 60 -#define SRST_A_DMAC1 61 -#define SRST_A_DMAC2 62 -#define SRST_P_I2C1 63 -#define SRST_P_I2C2 64 -#define SRST_P_I2C3 65 -#define SRST_P_I2C4 66 -#define SRST_P_I2C5 67 -#define SRST_P_I2C6 68 -#define SRST_P_I2C7 69 -#define SRST_P_I2C8 70 - -#define SRST_I2C1 71 -#define SRST_I2C2 72 -#define SRST_I2C3 73 -#define SRST_I2C4 74 -#define SRST_I2C5 75 -#define SRST_I2C6 76 -#define SRST_I2C7 77 -#define SRST_I2C8 78 -#define SRST_P_CAN0 79 -#define SRST_CAN0 80 -#define SRST_P_CAN1 81 -#define SRST_CAN1 82 -#define SRST_P_CAN2 83 -#define SRST_CAN2 84 -#define SRST_P_SARADC 85 - -#define SRST_P_TSADC 86 -#define SRST_TSADC 87 -#define SRST_P_UART1 88 -#define SRST_P_UART2 89 -#define SRST_P_UART3 90 -#define SRST_P_UART4 91 -#define SRST_P_UART5 92 -#define SRST_P_UART6 93 -#define SRST_P_UART7 94 -#define SRST_P_UART8 95 -#define SRST_P_UART9 96 -#define SRST_S_UART1 97 - -#define SRST_S_UART2 98 -#define SRST_S_UART3 99 -#define SRST_S_UART4 100 -#define SRST_S_UART5 101 -#define SRST_S_UART6 102 -#define SRST_S_UART7 103 - -#define SRST_S_UART8 104 -#define SRST_S_UART9 105 -#define SRST_P_SPI0 106 -#define SRST_P_SPI1 107 -#define SRST_P_SPI2 108 -#define SRST_P_SPI3 109 -#define SRST_P_SPI4 110 -#define SRST_SPI0 111 -#define SRST_SPI1 112 -#define SRST_SPI2 113 -#define SRST_SPI3 114 -#define SRST_SPI4 115 - -#define SRST_P_WDT0 116 -#define SRST_T_WDT0 117 -#define SRST_P_SYS_GRF 118 -#define SRST_P_PWM1 119 -#define SRST_PWM1 120 -#define SRST_P_PWM2 121 -#define SRST_PWM2 122 -#define SRST_P_PWM3 123 -#define SRST_PWM3 124 -#define SRST_P_BUSTIMER0 125 -#define SRST_P_BUSTIMER1 126 -#define SRST_BUSTIMER0 127 - -#define SRST_BUSTIMER1 128 -#define SRST_BUSTIMER2 129 -#define SRST_BUSTIMER3 130 -#define SRST_BUSTIMER4 131 -#define SRST_BUSTIMER5 132 -#define SRST_BUSTIMER6 133 -#define SRST_BUSTIMER7 134 -#define SRST_BUSTIMER8 135 -#define SRST_BUSTIMER9 136 -#define SRST_BUSTIMER10 137 -#define SRST_BUSTIMER11 138 -#define SRST_P_MAILBOX0 139 -#define SRST_P_MAILBOX1 140 -#define SRST_P_MAILBOX2 141 -#define SRST_P_GPIO1 142 -#define SRST_GPIO1 143 - -#define SRST_P_GPIO2 144 -#define SRST_GPIO2 145 -#define SRST_P_GPIO3 146 -#define SRST_GPIO3 147 -#define SRST_P_GPIO4 148 -#define SRST_GPIO4 149 -#define SRST_A_DECOM 150 -#define SRST_P_DECOM 151 -#define SRST_D_DECOM 152 -#define SRST_P_TOP 153 -#define SRST_A_GICADB_GIC2CORE_BUS 154 -#define SRST_P_DFT2APB 155 -#define SRST_P_APB2ASB_MST_TOP 156 -#define SRST_P_APB2ASB_MST_CDPHY 157 -#define SRST_P_APB2ASB_MST_BOT_RIGHT 158 - -#define SRST_P_APB2ASB_MST_IOC_TOP 159 -#define SRST_P_APB2ASB_MST_IOC_RIGHT 160 -#define SRST_P_APB2ASB_MST_CSIPHY 161 -#define SRST_P_APB2ASB_MST_VCCIO3_5 162 -#define SRST_P_APB2ASB_MST_VCCIO6 163 -#define SRST_P_APB2ASB_MST_EMMCIO 164 -#define SRST_A_SPINLOCK 165 -#define SRST_P_OTPC_NS 166 -#define SRST_OTPC_NS 167 -#define SRST_OTPC_ARB 168 - -#define SRST_P_BUSIOC 169 -#define SRST_P_PMUCM0_INTMUX 170 -#define SRST_P_DDRCM0_INTMUX 171 - -#define SRST_P_DDR_DFICTL_CH0 172 -#define SRST_P_DDR_MON_CH0 173 -#define SRST_P_DDR_STANDBY_CH0 174 -#define SRST_P_DDR_UPCTL_CH0 175 -#define SRST_TM_DDR_MON_CH0 176 -#define SRST_P_DDR_GRF_CH01 177 -#define SRST_DFI_CH0 178 -#define SRST_SBR_CH0 179 -#define SRST_DDR_UPCTL_CH0 180 -#define SRST_DDR_DFICTL_CH0 181 -#define SRST_DDR_MON_CH0 182 -#define SRST_DDR_STANDBY_CH0 183 -#define SRST_A_DDR_UPCTL_CH0 184 -#define SRST_P_DDR_DFICTL_CH1 185 -#define SRST_P_DDR_MON_CH1 186 -#define SRST_P_DDR_STANDBY_CH1 187 - -#define SRST_P_DDR_UPCTL_CH1 188 -#define SRST_TM_DDR_MON_CH1 189 -#define SRST_DFI_CH1 190 -#define SRST_SBR_CH1 191 -#define SRST_DDR_UPCTL_CH1 192 -#define SRST_DDR_DFICTL_CH1 193 -#define SRST_DDR_MON_CH1 194 -#define SRST_DDR_STANDBY_CH1 195 -#define SRST_A_DDR_UPCTL_CH1 196 -#define SRST_A_DDR01_MSCH0 197 -#define SRST_A_DDR01_RS_MSCH0 198 -#define SRST_A_DDR01_FRS_MSCH0 199 - -#define SRST_A_DDR01_SCRAMBLE0 200 -#define SRST_A_DDR01_FRS_SCRAMBLE0 201 -#define SRST_A_DDR01_MSCH1 202 -#define SRST_A_DDR01_RS_MSCH1 203 -#define SRST_A_DDR01_FRS_MSCH1 204 -#define SRST_A_DDR01_SCRAMBLE1 205 -#define SRST_A_DDR01_FRS_SCRAMBLE1 206 -#define SRST_P_DDR01_MSCH0 207 -#define SRST_P_DDR01_MSCH1 208 - -#define SRST_P_DDR_DFICTL_CH2 209 -#define SRST_P_DDR_MON_CH2 210 -#define SRST_P_DDR_STANDBY_CH2 211 -#define SRST_P_DDR_UPCTL_CH2 212 -#define SRST_TM_DDR_MON_CH2 213 -#define SRST_P_DDR_GRF_CH23 214 -#define SRST_DFI_CH2 215 -#define SRST_SBR_CH2 216 -#define SRST_DDR_UPCTL_CH2 217 -#define SRST_DDR_DFICTL_CH2 218 -#define SRST_DDR_MON_CH2 219 -#define SRST_DDR_STANDBY_CH2 220 -#define SRST_A_DDR_UPCTL_CH2 221 -#define SRST_P_DDR_DFICTL_CH3 222 -#define SRST_P_DDR_MON_CH3 223 -#define SRST_P_DDR_STANDBY_CH3 224 - -#define SRST_P_DDR_UPCTL_CH3 225 -#define SRST_TM_DDR_MON_CH3 226 -#define SRST_DFI_CH3 227 -#define SRST_SBR_CH3 228 -#define SRST_DDR_UPCTL_CH3 229 -#define SRST_DDR_DFICTL_CH3 230 -#define SRST_DDR_MON_CH3 231 -#define SRST_DDR_STANDBY_CH3 232 -#define SRST_A_DDR_UPCTL_CH3 233 -#define SRST_A_DDR23_MSCH2 234 -#define SRST_A_DDR23_RS_MSCH2 235 -#define SRST_A_DDR23_FRS_MSCH2 236 - -#define SRST_A_DDR23_SCRAMBLE2 237 -#define SRST_A_DDR23_FRS_SCRAMBLE2 238 -#define SRST_A_DDR23_MSCH3 239 -#define SRST_A_DDR23_RS_MSCH3 240 -#define SRST_A_DDR23_FRS_MSCH3 241 -#define SRST_A_DDR23_SCRAMBLE3 242 -#define SRST_A_DDR23_FRS_SCRAMBLE3 243 -#define SRST_P_DDR23_MSCH2 244 -#define SRST_P_DDR23_MSCH3 245 - -#define SRST_ISP1 246 -#define SRST_ISP1_VICAP 247 -#define SRST_A_ISP1_BIU 248 -#define SRST_H_ISP1_BIU 249 - -#define SRST_A_RKNN1 250 -#define SRST_A_RKNN1_BIU 251 -#define SRST_H_RKNN1 252 -#define SRST_H_RKNN1_BIU 253 - -#define SRST_A_RKNN2 254 -#define SRST_A_RKNN2_BIU 255 -#define SRST_H_RKNN2 256 -#define SRST_H_RKNN2_BIU 257 - -#define SRST_A_RKNN_DSU0 258 -#define SRST_P_NPUTOP_BIU 259 -#define SRST_P_NPU_TIMER 260 -#define SRST_NPUTIMER0 261 -#define SRST_NPUTIMER1 262 -#define SRST_P_NPU_WDT 263 -#define SRST_T_NPU_WDT 264 -#define SRST_P_NPU_PVTM 265 -#define SRST_P_NPU_GRF 266 -#define SRST_NPU_PVTM 267 - -#define SRST_NPU_PVTPLL 268 -#define SRST_H_NPU_CM0_BIU 269 -#define SRST_F_NPU_CM0_CORE 270 -#define SRST_T_NPU_CM0_JTAG 271 -#define SRST_A_RKNN0 272 -#define SRST_A_RKNN0_BIU 273 -#define SRST_H_RKNN0 274 -#define SRST_H_RKNN0_BIU 275 - -#define SRST_H_NVM_BIU 276 -#define SRST_A_NVM_BIU 277 -#define SRST_H_EMMC 278 -#define SRST_A_EMMC 279 -#define SRST_C_EMMC 280 -#define SRST_B_EMMC 281 -#define SRST_T_EMMC 282 -#define SRST_S_SFC 283 -#define SRST_H_SFC 284 -#define SRST_H_SFC_XIP 285 - -#define SRST_P_GRF 286 -#define SRST_P_DEC_BIU 287 -#define SRST_P_PHP_BIU 288 -#define SRST_A_PCIE_GRIDGE 289 -#define SRST_A_PHP_BIU 290 -#define SRST_A_GMAC0 291 -#define SRST_A_GMAC1 292 -#define SRST_A_PCIE_BIU 293 -#define SRST_PCIE0_POWER_UP 294 -#define SRST_PCIE1_POWER_UP 295 -#define SRST_PCIE2_POWER_UP 296 - -#define SRST_PCIE3_POWER_UP 297 -#define SRST_PCIE4_POWER_UP 298 -#define SRST_P_PCIE0 299 -#define SRST_P_PCIE1 300 -#define SRST_P_PCIE2 301 -#define SRST_P_PCIE3 302 - -#define SRST_P_PCIE4 303 -#define SRST_A_PHP_GIC_ITS 304 -#define SRST_A_MMU_PCIE 305 -#define SRST_A_MMU_PHP 306 -#define SRST_A_MMU_BIU 307 - -#define SRST_A_USB3OTG2 308 - -#define SRST_PMALIVE0 309 -#define SRST_PMALIVE1 310 -#define SRST_PMALIVE2 311 -#define SRST_A_SATA0 312 -#define SRST_A_SATA1 313 -#define SRST_A_SATA2 314 -#define SRST_RXOOB0 315 -#define SRST_RXOOB1 316 -#define SRST_RXOOB2 317 -#define SRST_ASIC0 318 -#define SRST_ASIC1 319 -#define SRST_ASIC2 320 - -#define SRST_A_RKVDEC_CCU 321 -#define SRST_H_RKVDEC0 322 -#define SRST_A_RKVDEC0 323 -#define SRST_H_RKVDEC0_BIU 324 -#define SRST_A_RKVDEC0_BIU 325 -#define SRST_RKVDEC0_CA 326 -#define SRST_RKVDEC0_HEVC_CA 327 -#define SRST_RKVDEC0_CORE 328 - -#define SRST_H_RKVDEC1 329 -#define SRST_A_RKVDEC1 330 -#define SRST_H_RKVDEC1_BIU 331 -#define SRST_A_RKVDEC1_BIU 332 -#define SRST_RKVDEC1_CA 333 -#define SRST_RKVDEC1_HEVC_CA 334 -#define SRST_RKVDEC1_CORE 335 - -#define SRST_A_USB_BIU 336 -#define SRST_H_USB_BIU 337 -#define SRST_A_USB3OTG0 338 -#define SRST_A_USB3OTG1 339 -#define SRST_H_HOST0 340 -#define SRST_H_HOST_ARB0 341 -#define SRST_H_HOST1 342 -#define SRST_H_HOST_ARB1 343 -#define SRST_A_USB_GRF 344 -#define SRST_C_USB2P0_HOST0 345 - -#define SRST_C_USB2P0_HOST1 346 -#define SRST_HOST_UTMI0 347 -#define SRST_HOST_UTMI1 348 - -#define SRST_A_VDPU_BIU 349 -#define SRST_A_VDPU_LOW_BIU 350 -#define SRST_H_VDPU_BIU 351 -#define SRST_A_JPEG_DECODER_BIU 352 -#define SRST_A_VPU 353 -#define SRST_H_VPU 354 -#define SRST_A_JPEG_ENCODER0 355 -#define SRST_H_JPEG_ENCODER0 356 -#define SRST_A_JPEG_ENCODER1 357 -#define SRST_H_JPEG_ENCODER1 358 -#define SRST_A_JPEG_ENCODER2 359 -#define SRST_H_JPEG_ENCODER2 360 - -#define SRST_A_JPEG_ENCODER3 361 -#define SRST_H_JPEG_ENCODER3 362 -#define SRST_A_JPEG_DECODER 363 -#define SRST_H_JPEG_DECODER 364 -#define SRST_H_IEP2P0 365 -#define SRST_A_IEP2P0 366 -#define SRST_IEP2P0_CORE 367 -#define SRST_H_RGA2 368 -#define SRST_A_RGA2 369 -#define SRST_RGA2_CORE 370 -#define SRST_H_RGA3_0 371 -#define SRST_A_RGA3_0 372 -#define SRST_RGA3_0_CORE 373 - -#define SRST_H_RKVENC0_BIU 374 -#define SRST_A_RKVENC0_BIU 375 -#define SRST_H_RKVENC0 376 -#define SRST_A_RKVENC0 377 -#define SRST_RKVENC0_CORE 378 - -#define SRST_H_RKVENC1_BIU 379 -#define SRST_A_RKVENC1_BIU 380 -#define SRST_H_RKVENC1 381 -#define SRST_A_RKVENC1 382 -#define SRST_RKVENC1_CORE 383 - -#define SRST_A_VI_BIU 384 -#define SRST_H_VI_BIU 385 -#define SRST_P_VI_BIU 386 -#define SRST_D_VICAP 387 -#define SRST_A_VICAP 388 -#define SRST_H_VICAP 389 -#define SRST_ISP0 390 -#define SRST_ISP0_VICAP 391 - -#define SRST_FISHEYE0 392 -#define SRST_FISHEYE1 393 -#define SRST_P_CSI_HOST_0 394 -#define SRST_P_CSI_HOST_1 395 -#define SRST_P_CSI_HOST_2 396 -#define SRST_P_CSI_HOST_3 397 -#define SRST_P_CSI_HOST_4 398 -#define SRST_P_CSI_HOST_5 399 - -#define SRST_CSIHOST0_VICAP 400 -#define SRST_CSIHOST1_VICAP 401 -#define SRST_CSIHOST2_VICAP 402 -#define SRST_CSIHOST3_VICAP 403 -#define SRST_CSIHOST4_VICAP 404 -#define SRST_CSIHOST5_VICAP 405 -#define SRST_CIFIN 406 - -#define SRST_A_VOP_BIU 407 -#define SRST_A_VOP_LOW_BIU 408 -#define SRST_H_VOP_BIU 409 -#define SRST_P_VOP_BIU 410 -#define SRST_H_VOP 411 -#define SRST_A_VOP 412 -#define SRST_D_VOP0 413 -#define SRST_D_VOP2HDMI_BRIDGE0 414 -#define SRST_D_VOP2HDMI_BRIDGE1 415 - -#define SRST_D_VOP1 416 -#define SRST_D_VOP2 417 -#define SRST_D_VOP3 418 -#define SRST_P_VOPGRF 419 -#define SRST_P_DSIHOST0 420 -#define SRST_P_DSIHOST1 421 -#define SRST_DSIHOST0 422 -#define SRST_DSIHOST1 423 -#define SRST_VOP_PMU 424 -#define SRST_P_VOP_CHANNEL_BIU 425 - -#define SRST_H_VO0_BIU 426 -#define SRST_H_VO0_S_BIU 427 -#define SRST_P_VO0_BIU 428 -#define SRST_P_VO0_S_BIU 429 -#define SRST_A_HDCP0_BIU 430 -#define SRST_P_VO0GRF 431 -#define SRST_H_HDCP_KEY0 432 -#define SRST_A_HDCP0 433 -#define SRST_H_HDCP0 434 -#define SRST_HDCP0 435 - -#define SRST_P_TRNG0 436 -#define SRST_DP0 437 -#define SRST_DP1 438 -#define SRST_H_I2S4_8CH 439 -#define SRST_M_I2S4_8CH_TX 440 -#define SRST_H_I2S8_8CH 441 - -#define SRST_M_I2S8_8CH_TX 442 -#define SRST_H_SPDIF2_DP0 443 -#define SRST_M_SPDIF2_DP0 444 -#define SRST_H_SPDIF5_DP1 445 -#define SRST_M_SPDIF5_DP1 446 - -#define SRST_A_HDCP1_BIU 447 -#define SRST_A_VO1_BIU 448 -#define SRST_H_VOP1_BIU 449 -#define SRST_H_VOP1_S_BIU 450 -#define SRST_P_VOP1_BIU 451 -#define SRST_P_VO1GRF 452 -#define SRST_P_VO1_S_BIU 453 - -#define SRST_H_I2S7_8CH 454 -#define SRST_M_I2S7_8CH_RX 455 -#define SRST_H_HDCP_KEY1 456 -#define SRST_A_HDCP1 457 -#define SRST_H_HDCP1 458 -#define SRST_HDCP1 459 -#define SRST_P_TRNG1 460 -#define SRST_P_HDMITX0 461 - -#define SRST_HDMITX0_REF 462 -#define SRST_P_HDMITX1 463 -#define SRST_HDMITX1_REF 464 -#define SRST_A_HDMIRX 465 -#define SRST_P_HDMIRX 466 -#define SRST_HDMIRX_REF 467 - -#define SRST_P_EDP0 468 -#define SRST_EDP0_24M 469 -#define SRST_P_EDP1 470 -#define SRST_EDP1_24M 471 -#define SRST_M_I2S5_8CH_TX 472 -#define SRST_H_I2S5_8CH 473 -#define SRST_M_I2S6_8CH_TX 474 - -#define SRST_M_I2S6_8CH_RX 475 -#define SRST_H_I2S6_8CH 476 -#define SRST_H_SPDIF3 477 -#define SRST_M_SPDIF3 478 -#define SRST_H_SPDIF4 479 -#define SRST_M_SPDIF4 480 -#define SRST_H_SPDIFRX0 481 -#define SRST_M_SPDIFRX0 482 -#define SRST_H_SPDIFRX1 483 -#define SRST_M_SPDIFRX1 484 - -#define SRST_H_SPDIFRX2 485 -#define SRST_M_SPDIFRX2 486 -#define SRST_LINKSYM_HDMITXPHY0 487 -#define SRST_LINKSYM_HDMITXPHY1 488 -#define SRST_VO1_BRIDGE0 489 -#define SRST_VO1_BRIDGE1 490 - -#define SRST_H_I2S9_8CH 491 -#define SRST_M_I2S9_8CH_RX 492 -#define SRST_H_I2S10_8CH 493 -#define SRST_M_I2S10_8CH_RX 494 -#define SRST_P_S_HDMIRX 495 - -#define SRST_GPU 496 -#define SRST_SYS_GPU 497 -#define SRST_A_S_GPU_BIU 498 -#define SRST_A_M0_GPU_BIU 499 -#define SRST_A_M1_GPU_BIU 500 -#define SRST_A_M2_GPU_BIU 501 -#define SRST_A_M3_GPU_BIU 502 -#define SRST_P_GPU_BIU 503 -#define SRST_P_GPU_PVTM 504 - -#define SRST_GPU_PVTM 505 -#define SRST_P_GPU_GRF 506 -#define SRST_GPU_PVTPLL 507 -#define SRST_GPU_JTAG 508 - -#define SRST_A_AV1_BIU 509 -#define SRST_A_AV1 510 -#define SRST_P_AV1_BIU 511 -#define SRST_P_AV1 512 - -#define SRST_A_DDR_BIU 513 -#define SRST_A_DMA2DDR 514 -#define SRST_A_DDR_SHAREMEM 515 -#define SRST_A_DDR_SHAREMEM_BIU 516 -#define SRST_A_CENTER_S200_BIU 517 -#define SRST_A_CENTER_S400_BIU 518 -#define SRST_H_AHB2APB 519 -#define SRST_H_CENTER_BIU 520 -#define SRST_F_DDR_CM0_CORE 521 - -#define SRST_DDR_TIMER0 522 -#define SRST_DDR_TIMER1 523 -#define SRST_T_WDT_DDR 524 -#define SRST_T_DDR_CM0_JTAG 525 -#define SRST_P_CENTER_GRF 526 -#define SRST_P_AHB2APB 527 -#define SRST_P_WDT 528 -#define SRST_P_TIMER 529 -#define SRST_P_DMA2DDR 530 -#define SRST_P_SHAREMEM 531 -#define SRST_P_CENTER_BIU 532 -#define SRST_P_CENTER_CHANNEL_BIU 533 - -#define SRST_P_USBDPGRF0 534 -#define SRST_P_USBDPPHY0 535 -#define SRST_P_USBDPGRF1 536 -#define SRST_P_USBDPPHY1 537 -#define SRST_P_HDPTX0 538 -#define SRST_P_HDPTX1 539 -#define SRST_P_APB2ASB_SLV_BOT_RIGHT 540 -#define SRST_P_USB2PHY_U3_0_GRF0 541 -#define SRST_P_USB2PHY_U3_1_GRF0 542 -#define SRST_P_USB2PHY_U2_0_GRF0 543 -#define SRST_P_USB2PHY_U2_1_GRF0 544 -#define SRST_HDPTX0_ROPLL 545 -#define SRST_HDPTX0_LCPLL 546 -#define SRST_HDPTX0 547 -#define SRST_HDPTX1_ROPLL 548 - -#define SRST_HDPTX1_LCPLL 549 -#define SRST_HDPTX1 550 -#define SRST_HDPTX0_HDMIRXPHY_SET 551 -#define SRST_USBDP_COMBO_PHY0 552 -#define SRST_USBDP_COMBO_PHY0_LCPLL 553 -#define SRST_USBDP_COMBO_PHY0_ROPLL 554 -#define SRST_USBDP_COMBO_PHY0_PCS_HS 555 -#define SRST_USBDP_COMBO_PHY1 556 -#define SRST_USBDP_COMBO_PHY1_LCPLL 557 -#define SRST_USBDP_COMBO_PHY1_ROPLL 558 -#define SRST_USBDP_COMBO_PHY1_PCS_HS 559 -#define SRST_HDMIHDP0 560 -#define SRST_HDMIHDP1 561 - -#define SRST_A_VO1USB_TOP_BIU 562 -#define SRST_H_VO1USB_TOP_BIU 563 - -#define SRST_H_SDIO_BIU 564 -#define SRST_H_SDIO 565 -#define SRST_SDIO 566 - -#define SRST_H_RGA3_BIU 567 -#define SRST_A_RGA3_BIU 568 -#define SRST_H_RGA3_1 569 -#define SRST_A_RGA3_1 570 -#define SRST_RGA3_1_CORE 571 - -#define SRST_REF_PIPE_PHY0 572 -#define SRST_REF_PIPE_PHY1 573 -#define SRST_REF_PIPE_PHY2 574 - -#define SRST_P_PHPTOP_CRU 575 -#define SRST_P_PCIE2_GRF0 576 -#define SRST_P_PCIE2_GRF1 577 -#define SRST_P_PCIE2_GRF2 578 -#define SRST_P_PCIE2_PHY0 579 -#define SRST_P_PCIE2_PHY1 580 -#define SRST_P_PCIE2_PHY2 581 -#define SRST_P_PCIE3_PHY 582 -#define SRST_P_APB2ASB_SLV_CHIP_TOP 583 -#define SRST_PCIE30_PHY 584 - -#define SRST_H_PMU1_BIU 585 -#define SRST_P_PMU1_BIU 586 -#define SRST_H_PMU_CM0_BIU 587 -#define SRST_F_PMU_CM0_CORE 588 -#define SRST_T_PMU1_CM0_JTAG 589 - -#define SRST_DDR_FAIL_SAFE 590 -#define SRST_P_CRU_PMU1 591 -#define SRST_P_PMU1_GRF 592 -#define SRST_P_PMU1_IOC 593 -#define SRST_P_PMU1WDT 594 -#define SRST_T_PMU1WDT 595 -#define SRST_P_PMU1TIMER 596 -#define SRST_PMU1TIMER0 597 -#define SRST_PMU1TIMER1 598 -#define SRST_P_PMU1PWM 599 -#define SRST_PMU1PWM 600 - -#define SRST_P_I2C0 601 -#define SRST_I2C0 602 -#define SRST_S_UART0 603 -#define SRST_P_UART0 604 -#define SRST_H_I2S1_8CH 605 -#define SRST_M_I2S1_8CH_TX 606 -#define SRST_M_I2S1_8CH_RX 607 -#define SRST_H_PDM0 608 -#define SRST_PDM0 609 - -#define SRST_H_VAD 610 -#define SRST_HDPTX0_INIT 611 -#define SRST_HDPTX0_CMN 612 -#define SRST_HDPTX0_LANE 613 -#define SRST_HDPTX1_INIT 614 - -#define SRST_HDPTX1_CMN 615 -#define SRST_HDPTX1_LANE 616 -#define SRST_M_MIPI_DCPHY0 617 -#define SRST_S_MIPI_DCPHY0 618 -#define SRST_M_MIPI_DCPHY1 619 -#define SRST_S_MIPI_DCPHY1 620 -#define SRST_OTGPHY_U3_0 621 -#define SRST_OTGPHY_U3_1 622 -#define SRST_OTGPHY_U2_0 623 -#define SRST_OTGPHY_U2_1 624 - -#define SRST_P_PMU0GRF 625 -#define SRST_P_PMU0IOC 626 -#define SRST_P_GPIO0 627 -#define SRST_GPIO0 628 - -#define SRST_A_SECURE_NS_BIU 629 -#define SRST_H_SECURE_NS_BIU 630 -#define SRST_A_SECURE_S_BIU 631 -#define SRST_H_SECURE_S_BIU 632 -#define SRST_P_SECURE_S_BIU 633 -#define SRST_CRYPTO_CORE 634 - -#define SRST_CRYPTO_PKA 635 -#define SRST_CRYPTO_RNG 636 -#define SRST_A_CRYPTO 637 -#define SRST_H_CRYPTO 638 -#define SRST_KEYLADDER_CORE 639 -#define SRST_KEYLADDER_RNG 640 -#define SRST_A_KEYLADDER 641 -#define SRST_H_KEYLADDER 642 -#define SRST_P_OTPC_S 643 -#define SRST_OTPC_S 644 -#define SRST_WDT_S 645 - -#define SRST_T_WDT_S 646 -#define SRST_H_BOOTROM 647 -#define SRST_A_DCF 648 -#define SRST_P_DCF 649 -#define SRST_H_BOOTROM_NS 650 -#define SRST_P_KEYLADDER 651 -#define SRST_H_TRNG_S 652 - -#define SRST_H_TRNG_NS 653 -#define SRST_D_SDMMC_BUFFER 654 -#define SRST_H_SDMMC 655 -#define SRST_H_SDMMC_BUFFER 656 -#define SRST_SDMMC 657 -#define SRST_P_TRNG_CHK 658 -#define SRST_TRNG_S 659 - -#endif -- cgit v1.2.3 From 3be9f399e911cfc437a37ac826441f1d96da1c9b Mon Sep 17 00:00:00 2001 From: Fiona Klute Date: Wed, 1 May 2024 10:54:09 +0200 Subject: Init virtio before loading ENV from EXT4 or FAT Specifying a file in an EXT4 or FAT partition on a virtio device as environment location failed because virtio hadn't been initialized by the time the environment was loaded. This patch mirrors commit 54ee5ae84191 ("Add SCSI scan for ENV in EXT4 or FAT") in issue and fix, just for a different kind of block device. The additional include in include/virtio.h is needed so all functions called there are defined, the alternative would have been to include dm/device.h separately in the env/ sources. Checkpatch suggests using "if (IS_ENABLED(CONFIG...))" instead of "#if defined(CONFIG_...)", I'm sticking to the style of the existing code here. Signed-off-by: Fiona Klute CC: Joe Hershberger CC: Bin Meng CC: Rogier Stam --- env/ext4.c | 5 +++++ env/fat.c | 5 +++++ include/virtio.h | 1 + 3 files changed, 11 insertions(+) (limited to 'include') diff --git a/env/ext4.c b/env/ext4.c index eb16568bd46..d92c844ea6c 100644 --- a/env/ext4.c +++ b/env/ext4.c @@ -31,6 +31,7 @@ #include #include #include +#include #include DECLARE_GLOBAL_DATA_PTR; @@ -150,6 +151,10 @@ static int env_ext4_load(void) if (!strcmp(ifname, "scsi")) scsi_scan(true); #endif +#if defined(CONFIG_VIRTIO) + if (!strcmp(ifname, "virtio")) + virtio_init(); +#endif part = blk_get_device_part_str(ifname, dev_and_part, &dev_desc, &info, 1); diff --git a/env/fat.c b/env/fat.c index 2a40f123936..f3f8b7301ee 100644 --- a/env/fat.c +++ b/env/fat.c @@ -17,6 +17,7 @@ #include #include #include +#include #include #include #include @@ -133,6 +134,10 @@ static int env_fat_load(void) if (!strcmp(CONFIG_ENV_FAT_INTERFACE, "scsi")) scsi_scan(true); #endif +#if defined(CONFIG_VIRTIO) + if (!strcmp(ifname, "virtio")) + virtio_init(); +#endif #endif part = blk_get_device_part_str(ifname, dev_and_part, &dev_desc, &info, 1); diff --git a/include/virtio.h b/include/virtio.h index 1ab0ec5f39f..17f894a79e3 100644 --- a/include/virtio.h +++ b/include/virtio.h @@ -21,6 +21,7 @@ #define __VIRTIO_H__ #include +#include #include #include #include -- cgit v1.2.3 From d678a59d2d719da9e807495b4b021501f2836ca5 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sat, 18 May 2024 20:20:43 -0600 Subject: Revert "Merge patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"" When bringing in the series 'arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"' I failed to notice that b4 noticed it was based on next and so took that as the base commit and merged that part of next to master. This reverts commit c8ffd1356d42223cbb8c86280a083cc3c93e6426, reversing changes made to 2ee6f3a5f7550de3599faef9704e166e5dcace35. Reported-by: Jonas Karlman Signed-off-by: Tom Rini --- MAINTAINERS | 16 - api/api.c | 4 +- api/api_display.c | 2 +- api/api_net.c | 1 + api/api_platform-arm.c | 1 + api/api_platform-mips.c | 1 + api/api_platform-powerpc.c | 1 + api/api_storage.c | 2 +- arch/arc/include/asm/global_data.h | 2 - arch/arm/Kconfig | 5 - arch/arm/Makefile | 1 - arch/arm/cpu/arm11/cpu.c | 1 + arch/arm/cpu/arm1136/mx31/devices.c | 1 + arch/arm/cpu/arm1136/mx31/generic.c | 1 + arch/arm/cpu/arm1136/mx31/timer.c | 1 + arch/arm/cpu/arm720t/interrupts.c | 2 +- arch/arm/cpu/arm920t/cpu.c | 1 + arch/arm/cpu/arm920t/start.S | 1 + arch/arm/cpu/arm926ejs/cache.c | 1 + arch/arm/cpu/arm926ejs/cpu.c | 1 + arch/arm/cpu/arm926ejs/mxs/clock.c | 1 + arch/arm/cpu/arm926ejs/mxs/iomux.c | 1 + arch/arm/cpu/arm926ejs/mxs/mxs.c | 1 + arch/arm/cpu/arm926ejs/mxs/spl_boot.c | 1 + arch/arm/cpu/arm926ejs/mxs/spl_lradc_init.c | 1 + arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c | 1 + arch/arm/cpu/arm926ejs/mxs/spl_power_init.c | 1 + arch/arm/cpu/arm926ejs/mxs/start.S | 1 + arch/arm/cpu/arm926ejs/mxs/timer.c | 1 + arch/arm/cpu/arm926ejs/start.S | 1 + arch/arm/cpu/arm946es/cpu.c | 1 + arch/arm/cpu/armv7/arch_timer.c | 2 +- arch/arm/cpu/armv7/bcm235xx/clk-bcm235xx.c | 1 + arch/arm/cpu/armv7/bcm235xx/clk-bsc.c | 1 + arch/arm/cpu/armv7/bcm235xx/clk-core.c | 1 + arch/arm/cpu/armv7/bcm235xx/clk-eth.c | 1 + arch/arm/cpu/armv7/bcm235xx/clk-sdio.c | 1 + arch/arm/cpu/armv7/bcm235xx/clk-usb-otg.c | 1 + arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c | 1 + arch/arm/cpu/armv7/bcm281xx/clk-bsc.c | 1 + arch/arm/cpu/armv7/bcm281xx/clk-core.c | 1 + arch/arm/cpu/armv7/bcm281xx/clk-eth.c | 1 + arch/arm/cpu/armv7/bcm281xx/clk-sdio.c | 1 + arch/arm/cpu/armv7/bcm281xx/clk-usb-otg.c | 1 + arch/arm/cpu/armv7/bcm281xx/reset.c | 1 + arch/arm/cpu/armv7/bcmcygnus/reset.c | 1 + arch/arm/cpu/armv7/bcmnsp/reset.c | 1 + arch/arm/cpu/armv7/cache_v7.c | 1 + arch/arm/cpu/armv7/cp15.c | 1 + arch/arm/cpu/armv7/cpu.c | 1 + arch/arm/cpu/armv7/exception_level.c | 1 + arch/arm/cpu/armv7/iproc-common/armpll.c | 1 + arch/arm/cpu/armv7/iproc-common/hwinit-common.c | 1 + arch/arm/cpu/armv7/iproc-common/timer.c | 1 + arch/arm/cpu/armv7/ls102xa/clock.c | 2 +- arch/arm/cpu/armv7/ls102xa/cpu.c | 1 + arch/arm/cpu/armv7/ls102xa/fdt.c | 2 +- arch/arm/cpu/armv7/ls102xa/fsl_epu.c | 1 + arch/arm/cpu/armv7/ls102xa/fsl_ls1_serdes.c | 2 +- arch/arm/cpu/armv7/ls102xa/ls102xa_serdes.c | 2 +- arch/arm/cpu/armv7/ls102xa/soc.c | 2 +- arch/arm/cpu/armv7/ls102xa/spl.c | 1 + arch/arm/cpu/armv7/ls102xa/timer.c | 1 + arch/arm/cpu/armv7/mpu_v7r.c | 1 + arch/arm/cpu/armv7/s5p-common/cpu_info.c | 1 + arch/arm/cpu/armv7/s5p-common/pwm.c | 2 +- arch/arm/cpu/armv7/s5p-common/sromc.c | 2 +- arch/arm/cpu/armv7/s5p-common/timer.c | 1 + arch/arm/cpu/armv7/s5p4418/cpu.c | 1 + arch/arm/cpu/armv7/sunxi/psci.c | 1 + arch/arm/cpu/armv7/sunxi/sram.c | 1 + arch/arm/cpu/armv7/syslib.c | 1 + arch/arm/cpu/armv7/vf610/generic.c | 1 + arch/arm/cpu/armv7/vf610/timer.c | 1 + arch/arm/cpu/armv7/virt-dt.c | 1 + arch/arm/cpu/armv7/virt-v7.c | 1 + arch/arm/cpu/armv7m/cache.c | 1 + arch/arm/cpu/armv7m/cpu.c | 1 + arch/arm/cpu/armv7m/systick-timer.c | 2 +- arch/arm/cpu/armv8/cache_v8.c | 1 + arch/arm/cpu/armv8/cpu-dt.c | 1 + arch/arm/cpu/armv8/cpu.c | 1 + arch/arm/cpu/armv8/exception_level.c | 1 + arch/arm/cpu/armv8/fsl-layerscape/cpu.c | 2 +- arch/arm/cpu/armv8/fsl-layerscape/fdt.c | 2 +- .../cpu/armv8/fsl-layerscape/fsl_lsch2_serdes.c | 3 +- .../arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c | 2 +- .../cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c | 2 +- .../arm/cpu/armv8/fsl-layerscape/fsl_lsch3_speed.c | 2 +- arch/arm/cpu/armv8/fsl-layerscape/icid.c | 2 +- arch/arm/cpu/armv8/fsl-layerscape/ls1012a_serdes.c | 2 +- arch/arm/cpu/armv8/fsl-layerscape/ls1028_ids.c | 2 +- arch/arm/cpu/armv8/fsl-layerscape/ls1028a_serdes.c | 3 +- arch/arm/cpu/armv8/fsl-layerscape/ls1043_ids.c | 3 +- arch/arm/cpu/armv8/fsl-layerscape/ls1043a_serdes.c | 2 +- arch/arm/cpu/armv8/fsl-layerscape/ls1046_ids.c | 3 +- arch/arm/cpu/armv8/fsl-layerscape/ls1046a_serdes.c | 2 +- arch/arm/cpu/armv8/fsl-layerscape/ls1088_ids.c | 3 +- arch/arm/cpu/armv8/fsl-layerscape/ls1088a_serdes.c | 2 +- arch/arm/cpu/armv8/fsl-layerscape/ls2080a_serdes.c | 2 +- arch/arm/cpu/armv8/fsl-layerscape/ls2088_ids.c | 3 +- arch/arm/cpu/armv8/fsl-layerscape/lx2160_ids.c | 3 +- arch/arm/cpu/armv8/fsl-layerscape/lx2160a_serdes.c | 2 +- arch/arm/cpu/armv8/fsl-layerscape/mp.c | 2 +- arch/arm/cpu/armv8/fsl-layerscape/soc.c | 2 +- arch/arm/cpu/armv8/fsl-layerscape/spl.c | 2 +- arch/arm/cpu/armv8/generic_timer.c | 1 + arch/arm/cpu/armv8/hisilicon/pinmux.c | 1 + arch/arm/cpu/armv8/sec_firmware.c | 2 +- arch/arm/cpu/armv8/sha1_ce_glue.c | 1 + arch/arm/cpu/armv8/sha256_ce_glue.c | 1 + arch/arm/cpu/armv8/spin_table.c | 1 + arch/arm/cpu/armv8/spl_data.c | 1 + arch/arm/dts/k3-am62-main.dtsi | 126 +-- arch/arm/dts/k3-am62-mcu.dtsi | 4 +- arch/arm/dts/k3-am62-thermal.dtsi | 5 +- arch/arm/dts/k3-am62-wakeup.dtsi | 38 +- arch/arm/dts/k3-am62.dtsi | 4 +- arch/arm/dts/k3-am625-beagleplay-u-boot.dtsi | 63 -- arch/arm/dts/k3-am625-beagleplay.dts | 66 +- arch/arm/dts/k3-am625-sk.dts | 4 +- arch/arm/dts/k3-am625.dtsi | 4 +- arch/arm/dts/k3-am62a-main.dtsi | 201 +--- arch/arm/dts/k3-am62a-mcu.dtsi | 4 +- arch/arm/dts/k3-am62a-thermal.dtsi | 5 +- arch/arm/dts/k3-am62a-wakeup.dtsi | 4 +- arch/arm/dts/k3-am62a.dtsi | 4 +- arch/arm/dts/k3-am62a7-sk.dts | 162 +-- arch/arm/dts/k3-am62a7.dtsi | 4 +- arch/arm/dts/k3-am62x-sk-common.dtsi | 24 +- arch/arm/dts/k3-j7200-binman.dtsi | 95 +- arch/arm/dts/k3-j721e-binman.dtsi | 90 +- arch/arm/include/asm/arch-adi/sc5xx/sc5xx.h | 39 - arch/arm/include/asm/arch-adi/sc5xx/soc.h | 18 - arch/arm/include/asm/arch-adi/sc5xx/spl.h | 43 - arch/arm/include/asm/arch-am33xx/clk_synthesizer.h | 2 - arch/arm/include/asm/arch-aspeed/scu_ast2500.h | 1 - arch/arm/include/asm/arch-aspeed/scu_ast2600.h | 2 - .../include/asm/arch-fsl-layerscape/fsl_serdes.h | 2 - .../include/asm/arch-fsl-layerscape/immap_lsch2.h | 1 - arch/arm/include/asm/arch-imx8m/ddr.h | 2 +- arch/arm/include/asm/arch-ls102xa/fsl_serdes.h | 2 - arch/arm/include/asm/arch-mx5/clock.h | 2 - arch/arm/include/asm/arch-mx7/sys_proto.h | 2 - arch/arm/include/asm/arch-rockchip/bootrom.h | 2 - arch/arm/include/asm/arch-rockchip/clock.h | 2 - arch/arm/include/asm/arch-rockchip/grf_rk3308.h | 2 - arch/arm/include/asm/arch-sunxi/pmic_bus.h | 2 - arch/arm/include/asm/arch-sunxi/tve.h | 2 - arch/arm/include/asm/arch-tegra/ap.h | 1 - arch/arm/include/asm/arch-tegra/cboot.h | 2 - arch/arm/include/asm/arch-tegra/gpio.h | 1 - arch/arm/include/asm/arch-tegra/tegra_i2c.h | 1 - arch/arm/include/asm/esr.h | 1 - arch/arm/include/asm/global_data.h | 1 - arch/arm/include/asm/mach-imx/gpio.h | 2 - arch/arm/include/asm/ti-common/davinci_nand.h | 1 - arch/arm/lib/asm-offsets.c | 1 + arch/arm/lib/bdinfo.c | 2 +- arch/arm/lib/bootm-fdt.c | 1 + arch/arm/lib/bootm.c | 1 + arch/arm/lib/cache-cp15.c | 1 + arch/arm/lib/cache-pl310.c | 1 + arch/arm/lib/cache.c | 2 +- arch/arm/lib/cmd_boot.c | 1 + arch/arm/lib/eabi_compat.c | 4 +- arch/arm/lib/gic-v3-its.c | 1 + arch/arm/lib/image.c | 1 + arch/arm/lib/interrupts.c | 1 + arch/arm/lib/interrupts_64.c | 1 + arch/arm/lib/interrupts_m.c | 3 +- arch/arm/lib/psci-dt.c | 1 + arch/arm/lib/reset.c | 1 + arch/arm/lib/save_prev_bl_data.c | 1 + arch/arm/lib/spl.c | 1 + arch/arm/lib/stack.c | 1 + arch/arm/lib/zimage.c | 1 + arch/arm/mach-apple/board.c | 1 + arch/arm/mach-apple/rtkit.c | 3 +- arch/arm/mach-aspeed/ast2500/board_common.c | 2 +- arch/arm/mach-aspeed/ast2500/clk_ast2500.c | 1 + arch/arm/mach-aspeed/ast2600/board_common.c | 2 +- arch/arm/mach-aspeed/ast2600/spl.c | 1 + arch/arm/mach-aspeed/ast_wdt.c | 1 + arch/arm/mach-at91/arm920t/at91rm9200_devices.c | 1 + arch/arm/mach-at91/arm920t/clock.c | 2 +- arch/arm/mach-at91/arm920t/cpu.c | 2 +- arch/arm/mach-at91/arm920t/reset.c | 1 + arch/arm/mach-at91/arm920t/timer.c | 2 +- arch/arm/mach-at91/arm926ejs/at91sam9260_devices.c | 1 + arch/arm/mach-at91/arm926ejs/at91sam9261_devices.c | 1 + arch/arm/mach-at91/arm926ejs/at91sam9263_devices.c | 1 + .../mach-at91/arm926ejs/at91sam9m10g45_devices.c | 1 + arch/arm/mach-at91/arm926ejs/at91sam9n12_devices.c | 1 + arch/arm/mach-at91/arm926ejs/at91sam9rl_devices.c | 1 + arch/arm/mach-at91/arm926ejs/at91sam9x5_devices.c | 1 + arch/arm/mach-at91/arm926ejs/clock.c | 3 +- arch/arm/mach-at91/arm926ejs/cpu.c | 2 +- arch/arm/mach-at91/arm926ejs/eflash.c | 1 + arch/arm/mach-at91/arm926ejs/reset.c | 1 + arch/arm/mach-at91/arm926ejs/sam9x60_devices.c | 1 + arch/arm/mach-at91/arm926ejs/timer.c | 1 + arch/arm/mach-at91/armv7/clock.c | 2 +- arch/arm/mach-at91/armv7/cpu.c | 2 +- arch/arm/mach-at91/armv7/sama5d2_devices.c | 1 + arch/arm/mach-at91/armv7/sama5d3_devices.c | 1 + arch/arm/mach-at91/armv7/sama5d4_devices.c | 1 + arch/arm/mach-at91/armv7/timer.c | 1 + arch/arm/mach-at91/atmel_sfr.c | 2 +- arch/arm/mach-at91/clock.c | 2 +- arch/arm/mach-at91/include/mach/at91_common.h | 2 - arch/arm/mach-at91/matrix.c | 1 + arch/arm/mach-at91/mpddrc.c | 1 + arch/arm/mach-at91/phy.c | 2 +- arch/arm/mach-at91/sdram.c | 1 + arch/arm/mach-at91/spl.c | 1 + arch/arm/mach-at91/spl_at91.c | 2 +- arch/arm/mach-at91/spl_atmel.c | 2 +- arch/arm/mach-bcm283x/init.c | 1 + arch/arm/mach-bcm283x/mbox.c | 2 +- arch/arm/mach-bcm283x/msg.c | 1 + arch/arm/mach-bcm283x/reset.c | 2 +- arch/arm/mach-bcmbca/bcm4908/mmu_table.c | 1 + arch/arm/mach-bcmbca/bcm4912/mmu_table.c | 1 + arch/arm/mach-bcmbca/bcm63146/mmu_table.c | 1 + arch/arm/mach-bcmbca/bcm63158/mmu_table.c | 1 + arch/arm/mach-bcmbca/bcm6813/mmu_table.c | 1 + arch/arm/mach-bcmbca/bcm6856/mmu_table.c | 1 + arch/arm/mach-bcmbca/bcm6858/mmu_table.c | 1 + arch/arm/mach-davinci/cpu.c | 2 +- arch/arm/mach-davinci/da850_lowlevel.c | 2 +- arch/arm/mach-davinci/da850_pinmux.c | 1 + arch/arm/mach-davinci/include/mach/davinci_misc.h | 1 - arch/arm/mach-davinci/misc.c | 2 +- arch/arm/mach-davinci/pinmux.c | 1 + arch/arm/mach-davinci/psc.c | 1 + arch/arm/mach-davinci/reset.c | 1 + arch/arm/mach-davinci/spl.c | 2 + arch/arm/mach-davinci/timer.c | 2 +- arch/arm/mach-exynos/clock.c | 3 +- arch/arm/mach-exynos/clock_init_exynos4.c | 1 + arch/arm/mach-exynos/clock_init_exynos5.c | 1 + arch/arm/mach-exynos/common_setup.h | 2 - arch/arm/mach-exynos/dmc_common.c | 2 +- arch/arm/mach-exynos/dmc_init_ddr3.c | 1 + arch/arm/mach-exynos/exynos5_setup.h | 1 - arch/arm/mach-exynos/include/mach/power.h | 2 - arch/arm/mach-exynos/lowlevel_init.c | 1 + arch/arm/mach-exynos/mmu-arm64.c | 1 + arch/arm/mach-exynos/pinmux.c | 1 + arch/arm/mach-exynos/power.c | 2 +- arch/arm/mach-exynos/soc.c | 1 + arch/arm/mach-exynos/spl_boot.c | 1 + arch/arm/mach-exynos/system.c | 2 +- arch/arm/mach-exynos/tzpc.c | 2 +- arch/arm/mach-highbank/timer.c | 1 + arch/arm/mach-histb/board_common.c | 1 + arch/arm/mach-histb/sysmap-histb.c | 1 + arch/arm/mach-imx/cache.c | 2 +- arch/arm/mach-imx/cmd_bmode.c | 1 + arch/arm/mach-imx/cmd_dek.c | 3 +- arch/arm/mach-imx/cmd_hdmidet.c | 1 + arch/arm/mach-imx/cmd_mfgprot.c | 2 +- arch/arm/mach-imx/cmd_nandbcb.c | 1 + arch/arm/mach-imx/cpu.c | 1 + arch/arm/mach-imx/ddrmc-vf610-calibration.c | 1 + arch/arm/mach-imx/ddrmc-vf610.c | 1 + arch/arm/mach-imx/ele_ahab.c | 1 + arch/arm/mach-imx/hab.c | 1 + arch/arm/mach-imx/i2c-mxv7.c | 2 +- arch/arm/mach-imx/image-container.c | 2 +- arch/arm/mach-imx/imx8/ahab.c | 1 + arch/arm/mach-imx/imx8/clock.c | 1 + arch/arm/mach-imx/imx8/cpu.c | 1 + arch/arm/mach-imx/imx8/fdt.c | 1 + arch/arm/mach-imx/imx8/iomux.c | 1 + arch/arm/mach-imx/imx8/misc.c | 1 + arch/arm/mach-imx/imx8/snvs_security_sc.c | 1 + arch/arm/mach-imx/imx8m/clock_imx8mm.c | 1 + arch/arm/mach-imx/imx8m/clock_imx8mq.c | 1 + arch/arm/mach-imx/imx8m/clock_slice.c | 1 + arch/arm/mach-imx/imx8m/psci.c | 1 + arch/arm/mach-imx/imx8m/soc.c | 2 +- arch/arm/mach-imx/imx8ulp/cgc.c | 1 + arch/arm/mach-imx/imx8ulp/clock.c | 1 + arch/arm/mach-imx/imx8ulp/iomux.c | 1 + arch/arm/mach-imx/imx8ulp/pcc.c | 1 + arch/arm/mach-imx/imx8ulp/rdc.c | 3 +- arch/arm/mach-imx/imx9/clock.c | 1 + arch/arm/mach-imx/imx9/clock_root.c | 2 +- arch/arm/mach-imx/imx9/imx_bootaux.c | 3 +- arch/arm/mach-imx/imx9/soc.c | 2 +- arch/arm/mach-imx/imx9/trdc.c | 2 +- arch/arm/mach-imx/imx_bootaux.c | 5 +- arch/arm/mach-imx/imxrt/soc.c | 1 + arch/arm/mach-imx/iomux-v3.c | 1 + arch/arm/mach-imx/mac.c | 1 + arch/arm/mach-imx/misc.c | 1 + arch/arm/mach-imx/mmc_env.c | 1 + arch/arm/mach-imx/mmdc_size.c | 2 +- arch/arm/mach-imx/mx5/clock.c | 1 + arch/arm/mach-imx/mx5/mx53_dram.c | 1 + arch/arm/mach-imx/mx5/soc.c | 1 + arch/arm/mach-imx/mx6/clock.c | 2 +- arch/arm/mach-imx/mx6/ddr.c | 1 + arch/arm/mach-imx/mx6/litesom.c | 2 +- arch/arm/mach-imx/mx6/module_fuse.c | 1 + arch/arm/mach-imx/mx6/mp.c | 1 + arch/arm/mach-imx/mx6/opos6ul.c | 2 +- arch/arm/mach-imx/mx6/soc.c | 1 + arch/arm/mach-imx/mx7/clock.c | 3 +- arch/arm/mach-imx/mx7/clock_slice.c | 1 + arch/arm/mach-imx/mx7/ddr.c | 1 + arch/arm/mach-imx/mx7/psci-mx7.c | 1 + arch/arm/mach-imx/mx7/soc.c | 1 + arch/arm/mach-imx/mx7ulp/clock.c | 2 +- arch/arm/mach-imx/mx7ulp/iomux.c | 1 + arch/arm/mach-imx/mx7ulp/pcc.c | 1 + arch/arm/mach-imx/mx7ulp/scg.c | 2 +- arch/arm/mach-imx/mx7ulp/soc.c | 2 +- arch/arm/mach-imx/priblob.c | 1 + arch/arm/mach-imx/rdc-sema.c | 1 + arch/arm/mach-imx/speed.c | 2 +- arch/arm/mach-imx/spl.c | 2 +- arch/arm/mach-imx/spl_imx_romapi.c | 1 + arch/arm/mach-imx/syscounter.c | 2 +- arch/arm/mach-imx/timer.c | 1 + arch/arm/mach-imx/video.c | 3 +- arch/arm/mach-k3/Makefile | 1 - arch/arm/mach-k3/am642_init.c | 92 +- arch/arm/mach-k3/am64x/Makefile | 2 - arch/arm/mach-k3/am64x/boot.c | 105 -- arch/arm/mach-kirkwood/cache.c | 1 + arch/arm/mach-kirkwood/cpu.c | 1 + arch/arm/mach-kirkwood/include/mach/mpp.h | 2 - arch/arm/mach-kirkwood/mpp.c | 1 + arch/arm/mach-lpc32xx/clk.c | 1 + arch/arm/mach-lpc32xx/cpu.c | 1 + arch/arm/mach-lpc32xx/devices.c | 2 +- arch/arm/mach-lpc32xx/dram.c | 1 + arch/arm/mach-lpc32xx/timer.c | 1 + arch/arm/mach-mediatek/Kconfig | 1 - arch/arm/mach-mediatek/cpu.c | 1 + arch/arm/mach-mediatek/mt7622/init.c | 1 + arch/arm/mach-mediatek/mt7623/init.c | 2 +- arch/arm/mach-mediatek/mt7629/init.c | 2 +- arch/arm/mach-mediatek/mt7981/init.c | 1 + arch/arm/mach-mediatek/mt7986/init.c | 1 + arch/arm/mach-mediatek/mt7988/init.c | 1 + arch/arm/mach-mediatek/mt8183/init.c | 1 + arch/arm/mach-mediatek/mt8512/init.c | 1 + arch/arm/mach-mediatek/mt8516/init.c | 1 + arch/arm/mach-mediatek/mt8518/init.c | 1 + arch/arm/mach-mediatek/spl.c | 1 + arch/arm/mach-meson/board-a1.c | 2 +- arch/arm/mach-meson/board-axg.c | 1 + arch/arm/mach-meson/board-common.c | 1 + arch/arm/mach-meson/board-g12a.c | 1 + arch/arm/mach-meson/board-gx.c | 1 + arch/arm/mach-meson/board-info.c | 1 + arch/arm/mach-meson/sm.c | 1 + arch/arm/mach-mvebu/alleycat5/cpu.c | 2 +- arch/arm/mach-mvebu/alleycat5/soc.c | 1 + arch/arm/mach-mvebu/arm64-common.c | 2 +- arch/arm/mach-mvebu/armada3700/cpu.c | 1 + arch/arm/mach-mvebu/armada3700/efuse.c | 3 +- arch/arm/mach-mvebu/armada3700/mbox.c | 2 +- arch/arm/mach-mvebu/armada8k/cpu.c | 1 + arch/arm/mach-mvebu/armada8k/dram.c | 2 +- arch/arm/mach-mvebu/cpu.c | 2 +- arch/arm/mach-mvebu/dram.c | 1 + arch/arm/mach-mvebu/efuse.c | 1 + arch/arm/mach-mvebu/gpio.c | 1 + arch/arm/mach-mvebu/mbus.c | 2 +- .../serdes/a38x/high_speed_env_spec-38x.c | 1 + .../mach-mvebu/serdes/a38x/high_speed_env_spec.c | 2 +- arch/arm/mach-mvebu/serdes/a38x/seq_exec.c | 1 + arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.c | 1 + .../arm/mach-mvebu/serdes/axp/high_speed_env_lib.c | 2 +- .../mach-mvebu/serdes/axp/high_speed_env_spec.c | 1 + arch/arm/mach-mvebu/spl.c | 1 + arch/arm/mach-mvebu/system-controller.c | 1 + arch/arm/mach-nexell/clock.c | 2 +- arch/arm/mach-nexell/include/mach/mipi_display.h | 2 - arch/arm/mach-nexell/include/mach/reset.h | 2 - arch/arm/mach-nexell/reset.c | 1 + arch/arm/mach-nexell/tieoff.c | 1 + arch/arm/mach-nexell/timer.c | 1 + arch/arm/mach-npcm/npcm7xx/cpu.c | 1 + arch/arm/mach-npcm/npcm7xx/l2_cache_pl310.c | 2 +- arch/arm/mach-npcm/npcm8xx/cpu.c | 1 + arch/arm/mach-npcm/npcm8xx/reset.c | 1 + arch/arm/mach-octeontx/clock.c | 1 + arch/arm/mach-octeontx/cpu.c | 1 + arch/arm/mach-octeontx2/clock.c | 1 + arch/arm/mach-octeontx2/cpu.c | 1 + arch/arm/mach-omap2/abb.c | 1 + arch/arm/mach-omap2/am33xx/board.c | 2 +- arch/arm/mach-omap2/am33xx/chilisom.c | 1 + arch/arm/mach-omap2/am33xx/clk_synthesizer.c | 3 +- arch/arm/mach-omap2/am33xx/clock.c | 1 + arch/arm/mach-omap2/am33xx/clock_am33xx.c | 1 + arch/arm/mach-omap2/am33xx/clock_am43xx.c | 1 + arch/arm/mach-omap2/am33xx/ddr.c | 2 +- arch/arm/mach-omap2/am33xx/emif4.c | 1 + arch/arm/mach-omap2/am33xx/fdt.c | 1 + arch/arm/mach-omap2/am33xx/mux.c | 1 + arch/arm/mach-omap2/am33xx/sys_info.c | 1 + arch/arm/mach-omap2/boot-common.c | 1 + arch/arm/mach-omap2/clocks-common.c | 1 + arch/arm/mach-omap2/emif-common.c | 2 +- arch/arm/mach-omap2/fdt-common.c | 2 +- arch/arm/mach-omap2/hwinit-common.c | 1 + arch/arm/mach-omap2/mem-common.c | 2 +- arch/arm/mach-omap2/omap-cache.c | 2 +- arch/arm/mach-omap2/omap3/am35x_musb.c | 2 +- arch/arm/mach-omap2/omap3/board.c | 1 + arch/arm/mach-omap2/omap3/boot.c | 1 + arch/arm/mach-omap2/omap3/clock.c | 3 +- arch/arm/mach-omap2/omap3/emac.c | 1 + arch/arm/mach-omap2/omap3/emif4.c | 2 +- arch/arm/mach-omap2/omap3/sdrc.c | 1 + arch/arm/mach-omap2/omap3/spl_id_nand.c | 1 + arch/arm/mach-omap2/omap3/sys_info.c | 3 +- arch/arm/mach-omap2/omap4/boot.c | 1 + arch/arm/mach-omap2/omap4/emif.c | 1 + arch/arm/mach-omap2/omap4/hw_data.c | 1 + arch/arm/mach-omap2/omap4/hwinit.c | 1 + arch/arm/mach-omap2/omap4/sdram_elpida.c | 1 + arch/arm/mach-omap2/omap5/abb.c | 2 +- arch/arm/mach-omap2/omap5/boot.c | 1 + arch/arm/mach-omap2/omap5/dra7xx_iodelay.c | 2 +- arch/arm/mach-omap2/omap5/emif.c | 1 + arch/arm/mach-omap2/omap5/fdt.c | 2 +- arch/arm/mach-omap2/omap5/hw_data.c | 1 + arch/arm/mach-omap2/omap5/hwinit.c | 1 + arch/arm/mach-omap2/omap5/sdram.c | 1 + arch/arm/mach-omap2/sec-common.c | 2 +- arch/arm/mach-omap2/timer.c | 2 +- arch/arm/mach-omap2/utils.c | 2 +- arch/arm/mach-omap2/vc.c | 2 +- arch/arm/mach-orion5x/cpu.c | 1 + arch/arm/mach-orion5x/dram.c | 1 + arch/arm/mach-orion5x/timer.c | 2 +- arch/arm/mach-owl/soc.c | 2 +- arch/arm/mach-owl/sysmap-owl.c | 1 + arch/arm/mach-renesas/memmap-gen3.c | 1 + arch/arm/mach-renesas/memmap-rzg2l.c | 1 + arch/arm/mach-rockchip/board.c | 2 +- arch/arm/mach-rockchip/boot_mode.c | 1 + arch/arm/mach-rockchip/bootrom.c | 1 + arch/arm/mach-rockchip/cpu-info.c | 1 + arch/arm/mach-rockchip/px30-board-tpl.c | 1 + arch/arm/mach-rockchip/px30/clk_px30.c | 1 + arch/arm/mach-rockchip/px30/px30.c | 1 + arch/arm/mach-rockchip/px30/syscon_px30.c | 1 + arch/arm/mach-rockchip/rk3036-board-spl.c | 1 + arch/arm/mach-rockchip/rk3036/clk_rk3036.c | 1 + arch/arm/mach-rockchip/rk3036/rk3036.c | 1 + arch/arm/mach-rockchip/rk3036/sdram_rk3036.c | 2 +- arch/arm/mach-rockchip/rk3036/syscon_rk3036.c | 1 + arch/arm/mach-rockchip/rk3066/clk_rk3066.c | 1 + arch/arm/mach-rockchip/rk3066/rk3066.c | 1 + arch/arm/mach-rockchip/rk3066/syscon_rk3066.c | 1 + arch/arm/mach-rockchip/rk3128/clk_rk3128.c | 1 + arch/arm/mach-rockchip/rk3128/syscon_rk3128.c | 1 + arch/arm/mach-rockchip/rk3188/clk_rk3188.c | 1 + arch/arm/mach-rockchip/rk3188/rk3188.c | 1 + arch/arm/mach-rockchip/rk3188/syscon_rk3188.c | 1 + arch/arm/mach-rockchip/rk322x/clk_rk322x.c | 1 + arch/arm/mach-rockchip/rk322x/syscon_rk322x.c | 1 + arch/arm/mach-rockchip/rk3288/clk_rk3288.c | 1 + arch/arm/mach-rockchip/rk3288/rk3288.c | 1 + arch/arm/mach-rockchip/rk3288/syscon_rk3288.c | 1 + arch/arm/mach-rockchip/rk3308/clk_rk3308.c | 1 + arch/arm/mach-rockchip/rk3308/rk3308.c | 1 + arch/arm/mach-rockchip/rk3308/syscon_rk3308.c | 1 + arch/arm/mach-rockchip/rk3328/clk_rk3328.c | 1 + arch/arm/mach-rockchip/rk3328/rk3328.c | 1 + arch/arm/mach-rockchip/rk3328/syscon_rk3328.c | 1 + arch/arm/mach-rockchip/rk3368/clk_rk3368.c | 1 + arch/arm/mach-rockchip/rk3368/rk3368.c | 1 + arch/arm/mach-rockchip/rk3368/syscon_rk3368.c | 1 + arch/arm/mach-rockchip/rk3399/clk_rk3399.c | 1 + arch/arm/mach-rockchip/rk3399/rk3399.c | 1 + arch/arm/mach-rockchip/rk3399/syscon_rk3399.c | 1 + arch/arm/mach-rockchip/rk3568/clk_rk3568.c | 1 + arch/arm/mach-rockchip/rk3568/rk3568.c | 1 + arch/arm/mach-rockchip/rk3568/syscon_rk3568.c | 1 + arch/arm/mach-rockchip/rk3588/clk_rk3588.c | 1 + arch/arm/mach-rockchip/rk3588/rk3588.c | 1 + arch/arm/mach-rockchip/rk3588/syscon_rk3588.c | 1 + arch/arm/mach-rockchip/rv1108/clk_rv1108.c | 1 + arch/arm/mach-rockchip/rv1108/syscon_rv1108.c | 1 + arch/arm/mach-rockchip/rv1126/clk_rv1126.c | 1 + arch/arm/mach-rockchip/rv1126/rv1126.c | 1 + arch/arm/mach-rockchip/rv1126/syscon_rv1126.c | 1 + arch/arm/mach-rockchip/sdram.c | 2 +- arch/arm/mach-rockchip/spl-boot-order.c | 1 + arch/arm/mach-rockchip/tpl.c | 1 + arch/arm/mach-s5pc1xx/cache.c | 1 + arch/arm/mach-s5pc1xx/clock.c | 2 +- arch/arm/mach-s5pc1xx/pinmux.c | 1 + arch/arm/mach-sc5xx/Kconfig | 475 -------- arch/arm/mach-sc5xx/Makefile | 19 - arch/arm/mach-sc5xx/config.mk | 16 - arch/arm/mach-sc5xx/init/Makefile | 11 - arch/arm/mach-sc5xx/init/clkinit.c | 558 ---------- arch/arm/mach-sc5xx/init/clkinit.h | 18 - arch/arm/mach-sc5xx/init/dmcinit.c | 954 ---------------- arch/arm/mach-sc5xx/init/dmcinit.h | 31 - arch/arm/mach-sc5xx/init/mem/is43tr16512bl.h | 62 -- arch/arm/mach-sc5xx/init/mem/mt41k128m16jt.h | 50 - arch/arm/mach-sc5xx/init/mem/mt41k512m16ha.h | 50 - arch/arm/mach-sc5xx/init/mem/mt47h128m16rt.h | 49 - arch/arm/mach-sc5xx/rcu.c | 22 - arch/arm/mach-sc5xx/sc57x.c | 32 - arch/arm/mach-sc5xx/sc58x.c | 32 - arch/arm/mach-sc5xx/sc59x.c | 43 - arch/arm/mach-sc5xx/sc59x_64.c | 97 -- arch/arm/mach-sc5xx/soc.c | 179 --- arch/arm/mach-sc5xx/spl.c | 102 -- arch/arm/mach-socfpga/board.c | 2 +- arch/arm/mach-socfpga/clock_manager.c | 1 + arch/arm/mach-socfpga/clock_manager_agilex.c | 1 + arch/arm/mach-socfpga/clock_manager_agilex5.c | 1 + arch/arm/mach-socfpga/clock_manager_arria10.c | 1 + arch/arm/mach-socfpga/clock_manager_gen5.c | 1 + arch/arm/mach-socfpga/clock_manager_n5x.c | 1 + arch/arm/mach-socfpga/clock_manager_s10.c | 2 +- arch/arm/mach-socfpga/firewall.c | 2 +- arch/arm/mach-socfpga/fpga_manager.c | 2 +- arch/arm/mach-socfpga/freeze_controller.c | 2 +- arch/arm/mach-socfpga/include/mach/clock_manager.h | 2 - .../mach-socfpga/include/mach/secure_reg_helper.h | 2 - arch/arm/mach-socfpga/mailbox_s10.c | 1 + arch/arm/mach-socfpga/misc.c | 2 +- arch/arm/mach-socfpga/misc_arria10.c | 2 +- arch/arm/mach-socfpga/misc_gen5.c | 2 +- arch/arm/mach-socfpga/misc_soc64.c | 1 + arch/arm/mach-socfpga/mmu-arm64_s10.c | 1 + arch/arm/mach-socfpga/pinmux_arria10.c | 2 +- arch/arm/mach-socfpga/reset_manager_arria10.c | 1 + arch/arm/mach-socfpga/reset_manager_gen5.c | 2 +- arch/arm/mach-socfpga/reset_manager_s10.c | 1 + arch/arm/mach-socfpga/scan_manager.c | 2 +- arch/arm/mach-socfpga/secure_reg_helper.c | 1 + arch/arm/mach-socfpga/secure_vab.c | 1 + arch/arm/mach-socfpga/smc_api.c | 3 +- arch/arm/mach-socfpga/spl_a10.c | 3 +- arch/arm/mach-socfpga/spl_agilex.c | 2 + arch/arm/mach-socfpga/spl_gen5.c | 2 + arch/arm/mach-socfpga/spl_n5x.c | 2 + arch/arm/mach-socfpga/spl_s10.c | 2 + arch/arm/mach-socfpga/spl_soc64.c | 1 + arch/arm/mach-socfpga/system_manager_gen5.c | 1 + arch/arm/mach-socfpga/system_manager_soc64.c | 1 + arch/arm/mach-socfpga/timer.c | 2 +- arch/arm/mach-socfpga/timer_s10.c | 1 + arch/arm/mach-socfpga/vab.c | 2 +- arch/arm/mach-socfpga/wrap_handoff_soc64.c | 1 + arch/arm/mach-socfpga/wrap_iocsr_config.c | 2 +- arch/arm/mach-socfpga/wrap_pinmux_config.c | 3 +- arch/arm/mach-socfpga/wrap_pll_config.c | 2 +- arch/arm/mach-socfpga/wrap_pll_config_soc64.c | 1 + arch/arm/mach-socfpga/wrap_sdram_config.c | 4 +- arch/arm/mach-stm32/soc.c | 1 + arch/arm/mach-stm32mp/boot_params.c | 2 +- arch/arm/mach-stm32mp/bsec.c | 1 + arch/arm/mach-stm32mp/cmd_stm32key.c | 1 + .../arm/mach-stm32mp/cmd_stm32prog/cmd_stm32prog.c | 1 + .../mach-stm32mp/cmd_stm32prog/stm32prog_serial.c | 2 +- .../arm/mach-stm32mp/cmd_stm32prog/stm32prog_usb.c | 1 + arch/arm/mach-stm32mp/dram_init.c | 1 + arch/arm/mach-stm32mp/stm32mp1/cpu.c | 1 + arch/arm/mach-stm32mp/stm32mp1/fdt.c | 2 +- arch/arm/mach-stm32mp/stm32mp1/psci.c | 2 +- arch/arm/mach-stm32mp/stm32mp1/pwr_regulator.c | 2 +- arch/arm/mach-stm32mp/stm32mp1/spl.c | 2 +- arch/arm/mach-stm32mp/stm32mp1/stm32mp13x.c | 2 +- arch/arm/mach-stm32mp/stm32mp1/stm32mp15x.c | 1 + arch/arm/mach-stm32mp/syscon.c | 1 + arch/arm/mach-sunxi/dram_timings/ddr2_v3s.c | 1 + arch/arm/mach-sunxi/dram_timings/ddr3_1333.c | 1 + arch/arm/mach-sunxi/dram_timings/h616_ddr3_1333.c | 1 + arch/arm/mach-sunxi/dram_timings/h616_lpddr3.c | 1 + .../arm/mach-sunxi/dram_timings/h616_lpddr4_2133.c | 1 + arch/arm/mach-sunxi/dram_timings/h6_ddr3_1333.c | 1 + arch/arm/mach-sunxi/dram_timings/h6_lpddr3.c | 1 + arch/arm/mach-sunxi/dram_timings/lpddr3_stock.c | 1 + arch/arm/mach-tegra/ap.c | 2 +- arch/arm/mach-tegra/arm64-mmu.c | 1 + arch/arm/mach-tegra/board.c | 2 +- arch/arm/mach-tegra/board2.c | 2 +- arch/arm/mach-tegra/cache.c | 1 + arch/arm/mach-tegra/cboot.c | 1 + arch/arm/mach-tegra/clock.c | 1 + arch/arm/mach-tegra/cmd_enterrcm.c | 1 + arch/arm/mach-tegra/cpu.c | 1 + arch/arm/mach-tegra/crypto.c | 1 + arch/arm/mach-tegra/dt-setup.c | 1 + arch/arm/mach-tegra/emc.c | 1 + arch/arm/mach-tegra/fuse.c | 1 + arch/arm/mach-tegra/gpu.c | 1 + arch/arm/mach-tegra/ivc.c | 2 +- arch/arm/mach-tegra/pmc.c | 1 + arch/arm/mach-tegra/powergate.c | 2 +- arch/arm/mach-tegra/spl.c | 1 + arch/arm/mach-tegra/sys_info.c | 1 + arch/arm/mach-tegra/tegra114/clock.c | 1 + arch/arm/mach-tegra/tegra114/cpu.c | 1 + arch/arm/mach-tegra/tegra124/clock.c | 2 +- arch/arm/mach-tegra/tegra124/cpu.c | 1 + arch/arm/mach-tegra/tegra124/pmc.c | 1 + arch/arm/mach-tegra/tegra124/psci.c | 1 + arch/arm/mach-tegra/tegra124/xusb-padctl.c | 2 +- arch/arm/mach-tegra/tegra20/bct.c | 1 + arch/arm/mach-tegra/tegra20/clock.c | 1 + arch/arm/mach-tegra/tegra20/cpu.c | 1 + arch/arm/mach-tegra/tegra20/display.c | 1 + arch/arm/mach-tegra/tegra20/emc.c | 2 +- arch/arm/mach-tegra/tegra20/pmu.c | 1 + arch/arm/mach-tegra/tegra20/warmboot.c | 1 + arch/arm/mach-tegra/tegra20/warmboot_avp.c | 2 +- arch/arm/mach-tegra/tegra210/clock.c | 2 +- arch/arm/mach-tegra/tegra210/xusb-padctl.c | 2 +- arch/arm/mach-tegra/tegra30/bct.c | 2 +- arch/arm/mach-tegra/tegra30/clock.c | 1 + arch/arm/mach-tegra/tegra30/cpu.c | 1 + arch/arm/mach-tegra/xusb-padctl-common.c | 1 + arch/arm/mach-tegra/xusb-padctl-dummy.c | 2 +- arch/arm/mach-u8500/cache.c | 2 +- arch/arm/mach-u8500/cpuinfo.c | 1 + arch/arm/mach-uniphier/dram_init.c | 1 + arch/arm/mach-versal-net/clk.c | 1 + arch/arm/mach-versal-net/cpu.c | 1 + arch/arm/mach-versal/clk.c | 1 + arch/arm/mach-versal/cpu.c | 1 + arch/arm/mach-versal/mp.c | 3 +- arch/arm/mach-versatile/Makefile | 7 + arch/arm/mach-versatile/reset.S | 28 + arch/arm/mach-versatile/timer.c | 62 ++ arch/arm/mach-zynq/clk.c | 1 + arch/arm/mach-zynq/cpu.c | 3 +- arch/arm/mach-zynq/ddrc.c | 2 +- arch/arm/mach-zynq/slcr.c | 1 + arch/arm/mach-zynq/spl.c | 1 + arch/arm/mach-zynqmp-r5/cpu.c | 1 + arch/arm/mach-zynqmp/aes.c | 3 +- arch/arm/mach-zynqmp/clk.c | 1 + arch/arm/mach-zynqmp/cpu.c | 3 +- arch/arm/mach-zynqmp/ecc_spl_init.c | 1 + arch/arm/mach-zynqmp/handoff.c | 1 + arch/arm/mach-zynqmp/include/mach/zynqmp_aes.h | 2 - arch/arm/mach-zynqmp/mp.c | 4 +- arch/arm/mach-zynqmp/psu_spl_init.c | 1 + arch/arm/mach-zynqmp/spl.c | 1 + arch/m68k/include/asm/global_data.h | 2 - arch/m68k/lib/bdinfo.c | 1 + arch/microblaze/cpu/spl.c | 1 + arch/microblaze/include/asm/global_data.h | 1 - arch/mips/include/asm/global_data.h | 1 - arch/mips/lib/traps.c | 1 + arch/mips/mach-mtmips/Kconfig | 1 - arch/nios2/cpu/cpu.c | 2 +- arch/nios2/cpu/interrupts.c | 1 + arch/nios2/cpu/traps.c | 2 +- arch/nios2/include/asm/global_data.h | 1 - arch/nios2/lib/bootm.c | 1 + arch/nios2/lib/cache.c | 1 + arch/powerpc/cpu/mpc83xx/cpu.c | 1 + arch/powerpc/cpu/mpc83xx/ecc.c | 1 + arch/powerpc/cpu/mpc83xx/fdt.c | 1 + arch/powerpc/cpu/mpc83xx/interrupts.c | 1 + arch/powerpc/cpu/mpc83xx/law.c | 1 + arch/powerpc/cpu/mpc83xx/pci.c | 1 + arch/powerpc/cpu/mpc83xx/pcie.c | 1 + arch/powerpc/cpu/mpc83xx/qe_io.c | 1 + arch/powerpc/cpu/mpc83xx/serdes.c | 1 + arch/powerpc/cpu/mpc83xx/spd_sdram.c | 1 + arch/powerpc/cpu/mpc83xx/speed.c | 1 + arch/powerpc/cpu/mpc83xx/spl_minimal.c | 2 +- arch/powerpc/cpu/mpc83xx/traps.c | 1 + arch/powerpc/cpu/mpc85xx/b4860_ids.c | 3 +- arch/powerpc/cpu/mpc85xx/b4860_serdes.c | 1 + arch/powerpc/cpu/mpc85xx/bsc9132_serdes.c | 1 + arch/powerpc/cpu/mpc85xx/c29x_serdes.c | 1 + arch/powerpc/cpu/mpc85xx/cmd_errata.c | 1 + arch/powerpc/cpu/mpc85xx/cpu.c | 1 + arch/powerpc/cpu/mpc85xx/cpu_init_early.c | 3 +- arch/powerpc/cpu/mpc85xx/fdt.c | 2 +- arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c | 1 + arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c | 2 +- arch/powerpc/cpu/mpc85xx/interrupts.c | 2 +- arch/powerpc/cpu/mpc85xx/liodn.c | 2 +- arch/powerpc/cpu/mpc85xx/mp.c | 2 +- arch/powerpc/cpu/mpc85xx/mpc8536_serdes.c | 1 + arch/powerpc/cpu/mpc85xx/mpc8544_serdes.c | 1 + arch/powerpc/cpu/mpc85xx/mpc8548_serdes.c | 1 + arch/powerpc/cpu/mpc85xx/p1010_serdes.c | 1 + arch/powerpc/cpu/mpc85xx/p1021_serdes.c | 1 + arch/powerpc/cpu/mpc85xx/p1023_serdes.c | 1 + arch/powerpc/cpu/mpc85xx/p2020_serdes.c | 1 + arch/powerpc/cpu/mpc85xx/p2041_ids.c | 3 +- arch/powerpc/cpu/mpc85xx/p2041_serdes.c | 1 + arch/powerpc/cpu/mpc85xx/p3041_ids.c | 3 +- arch/powerpc/cpu/mpc85xx/p3041_serdes.c | 1 + arch/powerpc/cpu/mpc85xx/p4080_ids.c | 3 +- arch/powerpc/cpu/mpc85xx/p4080_serdes.c | 1 + arch/powerpc/cpu/mpc85xx/p5040_ids.c | 3 +- arch/powerpc/cpu/mpc85xx/p5040_serdes.c | 1 + arch/powerpc/cpu/mpc85xx/portals.c | 1 + arch/powerpc/cpu/mpc85xx/qe_io.c | 2 +- arch/powerpc/cpu/mpc85xx/speed.c | 1 + arch/powerpc/cpu/mpc85xx/spl_minimal.c | 1 + arch/powerpc/cpu/mpc85xx/t1024_ids.c | 3 +- arch/powerpc/cpu/mpc85xx/t1024_serdes.c | 1 + arch/powerpc/cpu/mpc85xx/t1040_ids.c | 3 +- arch/powerpc/cpu/mpc85xx/t1040_serdes.c | 3 +- arch/powerpc/cpu/mpc85xx/t2080_ids.c | 3 +- arch/powerpc/cpu/mpc85xx/t2080_serdes.c | 3 +- arch/powerpc/cpu/mpc85xx/t4240_ids.c | 3 +- arch/powerpc/cpu/mpc85xx/t4240_serdes.c | 1 + arch/powerpc/cpu/mpc85xx/tlb.c | 2 +- arch/powerpc/cpu/mpc85xx/traps.c | 2 +- arch/powerpc/cpu/mpc8xxx/cpu.c | 1 + arch/powerpc/cpu/mpc8xxx/fdt.c | 1 + arch/powerpc/cpu/mpc8xxx/fsl_lbc.c | 1 + arch/powerpc/cpu/mpc8xxx/fsl_pamu.c | 4 +- arch/powerpc/cpu/mpc8xxx/law.c | 1 + arch/powerpc/cpu/mpc8xxx/pamu_table.c | 1 + arch/powerpc/cpu/mpc8xxx/srio.c | 2 +- arch/powerpc/include/asm/cache.h | 2 - arch/powerpc/include/asm/fsl_dma.h | 2 +- arch/powerpc/include/asm/fsl_liodn.h | 4 +- arch/powerpc/include/asm/fsl_portals.h | 2 - arch/powerpc/include/asm/fsl_serdes.h | 1 - arch/powerpc/include/asm/global_data.h | 2 - arch/powerpc/include/asm/immap_8xx.h | 2 - arch/powerpc/lib/bdinfo.c | 1 + arch/powerpc/lib/bootm.c | 2 +- arch/powerpc/lib/cache.c | 1 + arch/powerpc/lib/extable.c | 1 + arch/powerpc/lib/interrupts.c | 2 +- arch/powerpc/lib/kgdb.c | 1 + arch/powerpc/lib/spl.c | 1 + arch/powerpc/lib/stack.c | 1 + arch/powerpc/lib/time.c | 1 + arch/riscv/lib/boot.c | 3 +- arch/sandbox/include/asm/global_data.h | 1 - arch/sh/cpu/sh4/cache.c | 1 + arch/sh/cpu/sh4/cpu.c | 1 + arch/sh/cpu/sh4/interrupts.c | 1 + arch/sh/cpu/sh4/watchdog.c | 1 + arch/sh/include/asm/global_data.h | 2 - arch/sh/lib/board.c | 2 +- arch/sh/lib/bootm.c | 2 +- arch/sh/lib/time.c | 1 + arch/sh/lib/time_sh2.c | 1 + arch/sh/lib/zimageboot.c | 2 +- arch/x86/cpu/acpi_gpe.c | 2 +- arch/x86/cpu/apollolake/acpi.c | 1 + arch/x86/cpu/apollolake/cpu.c | 1 + arch/x86/cpu/apollolake/cpu_common.c | 1 + arch/x86/cpu/apollolake/cpu_spl.c | 1 + arch/x86/cpu/apollolake/fsp_bindings.c | 1 + arch/x86/cpu/apollolake/fsp_m.c | 1 + arch/x86/cpu/apollolake/fsp_s.c | 1 + arch/x86/cpu/apollolake/hostbridge.c | 1 + arch/x86/cpu/apollolake/lpc.c | 1 + arch/x86/cpu/apollolake/pch.c | 1 + arch/x86/cpu/apollolake/pmc.c | 1 + arch/x86/cpu/apollolake/punit.c | 2 +- arch/x86/cpu/apollolake/spl.c | 1 + arch/x86/cpu/apollolake/systemagent.c | 1 + arch/x86/cpu/apollolake/uart.c | 1 + arch/x86/cpu/baytrail/acpi.c | 1 + arch/x86/cpu/baytrail/cpu.c | 1 + arch/x86/cpu/baytrail/early_uart.c | 1 + arch/x86/cpu/baytrail/fsp_configs.c | 1 + arch/x86/cpu/baytrail/valleyview.c | 2 +- arch/x86/cpu/braswell/braswell.c | 2 +- arch/x86/cpu/braswell/early_uart.c | 1 + arch/x86/cpu/braswell/fsp_configs.c | 1 + arch/x86/cpu/broadwell/adsp.c | 1 + arch/x86/cpu/broadwell/cpu.c | 1 + arch/x86/cpu/broadwell/cpu_from_spl.c | 2 +- arch/x86/cpu/broadwell/cpu_full.c | 1 + arch/x86/cpu/broadwell/iobp.c | 1 + arch/x86/cpu/broadwell/lpc.c | 1 + arch/x86/cpu/broadwell/me.c | 1 + arch/x86/cpu/broadwell/northbridge.c | 1 + arch/x86/cpu/broadwell/pch.c | 1 + arch/x86/cpu/broadwell/pinctrl_broadwell.c | 1 + arch/x86/cpu/broadwell/power_state.c | 1 + arch/x86/cpu/broadwell/refcode.c | 2 +- arch/x86/cpu/broadwell/sata.c | 1 + arch/x86/cpu/broadwell/sdram.c | 1 + arch/x86/cpu/coreboot/coreboot.c | 1 + arch/x86/cpu/coreboot/coreboot_spl.c | 1 + arch/x86/cpu/coreboot/sdram.c | 1 + arch/x86/cpu/coreboot/timestamp.c | 2 +- arch/x86/cpu/cpu.c | 1 + arch/x86/cpu/cpu_x86.c | 1 + arch/x86/cpu/efi/app.c | 2 +- arch/x86/cpu/efi/payload.c | 2 +- arch/x86/cpu/efi/sdram.c | 1 + arch/x86/cpu/i386/cpu.c | 2 +- arch/x86/cpu/i386/interrupt.c | 1 + arch/x86/cpu/intel_common/acpi.c | 1 + arch/x86/cpu/intel_common/car.S | 1 + arch/x86/cpu/intel_common/cpu.c | 1 + arch/x86/cpu/intel_common/cpu_from_spl.c | 1 + arch/x86/cpu/intel_common/fast_spi.c | 1 + arch/x86/cpu/intel_common/generic_wifi.c | 1 + arch/x86/cpu/intel_common/intel_opregion.c | 1 + arch/x86/cpu/intel_common/itss.c | 1 + arch/x86/cpu/intel_common/lpc.c | 1 + arch/x86/cpu/intel_common/lpss.c | 1 + arch/x86/cpu/intel_common/me_status.c | 1 + arch/x86/cpu/intel_common/microcode.c | 1 + arch/x86/cpu/intel_common/mrc.c | 4 +- arch/x86/cpu/intel_common/p2sb.c | 1 + arch/x86/cpu/intel_common/pch.c | 1 + arch/x86/cpu/intel_common/report_platform.c | 2 +- arch/x86/cpu/ioapic.c | 1 + arch/x86/cpu/irq.c | 1 + arch/x86/cpu/ivybridge/bd82x6x.c | 1 + arch/x86/cpu/ivybridge/cpu.c | 1 + arch/x86/cpu/ivybridge/early_me.c | 1 + arch/x86/cpu/ivybridge/fsp_configs.c | 1 + arch/x86/cpu/ivybridge/ivybridge.c | 2 +- arch/x86/cpu/ivybridge/lpc.c | 1 + arch/x86/cpu/ivybridge/model_206ax.c | 1 + arch/x86/cpu/ivybridge/northbridge.c | 1 + arch/x86/cpu/ivybridge/sata.c | 1 + arch/x86/cpu/ivybridge/sdram.c | 1 + arch/x86/cpu/ivybridge/sdram_nop.c | 1 + arch/x86/cpu/lapic.c | 1 + arch/x86/cpu/mp_init.c | 2 +- arch/x86/cpu/mtrr.c | 1 + arch/x86/cpu/pci.c | 1 + arch/x86/cpu/qemu/cpu.c | 1 + arch/x86/cpu/qemu/dram.c | 1 + arch/x86/cpu/qemu/e820.c | 1 + arch/x86/cpu/qemu/qemu.c | 2 +- arch/x86/cpu/qfw_cpu.c | 1 + arch/x86/cpu/quark/acpi.c | 2 +- arch/x86/cpu/quark/dram.c | 1 + arch/x86/cpu/quark/hte.c | 1 + arch/x86/cpu/quark/mrc.c | 2 +- arch/x86/cpu/quark/mrc_util.c | 2 +- arch/x86/cpu/quark/msg_port.c | 1 + arch/x86/cpu/quark/quark.c | 2 +- arch/x86/cpu/quark/smc.c | 3 +- arch/x86/cpu/queensbay/fsp_configs.c | 1 + arch/x86/cpu/queensbay/tnc.c | 1 + arch/x86/cpu/slimbootloader/sdram.c | 1 + arch/x86/cpu/slimbootloader/serial.c | 1 + arch/x86/cpu/slimbootloader/slimbootloader.c | 1 + arch/x86/cpu/tangier/acpi.c | 1 + arch/x86/cpu/tangier/pinmux.c | 1 + arch/x86/cpu/tangier/sdram.c | 1 + arch/x86/cpu/tangier/sysreset.c | 1 + arch/x86/cpu/tangier/tangier.c | 1 + arch/x86/cpu/turbo.c | 1 + arch/x86/cpu/x86_64/cpu.c | 1 + arch/x86/cpu/x86_64/interrupts.c | 1 + arch/x86/cpu/x86_64/misc.c | 1 + arch/x86/include/asm/arch-quark/mrc.h | 2 - arch/x86/include/asm/arch-quark/msg_port.h | 2 - arch/x86/include/asm/arch-quark/quark.h | 2 - arch/x86/include/asm/cb_sysinfo.h | 1 - arch/x86/include/asm/coreboot_tables.h | 3 - arch/x86/include/asm/early_cmos.h | 2 - arch/x86/include/asm/global_data.h | 1 - arch/x86/include/asm/handoff.h | 2 - arch/x86/include/asm/me_common.h | 1 - arch/x86/include/asm/mp.h | 1 - arch/x86/lib/acpi.c | 1 + arch/x86/lib/acpi_nhlt.c | 1 + arch/x86/lib/acpi_s3.c | 1 + arch/x86/lib/acpi_table.c | 1 + arch/x86/lib/acpigen.c | 1 + arch/x86/lib/asm-offsets.c | 1 + arch/x86/lib/bdinfo.c | 1 + arch/x86/lib/bios.c | 1 + arch/x86/lib/bios_interrupts.c | 1 + arch/x86/lib/bootm.c | 1 + arch/x86/lib/cmd_boot.c | 1 + arch/x86/lib/coreboot/cb_support.c | 2 +- arch/x86/lib/coreboot/cb_sysinfo.c | 2 +- arch/x86/lib/coreboot_table.c | 1 + arch/x86/lib/div64.c | 2 +- arch/x86/lib/e820.c | 1 + arch/x86/lib/early_cmos.c | 1 + arch/x86/lib/fsp/fsp_common.c | 1 + arch/x86/lib/fsp/fsp_dram.c | 1 + arch/x86/lib/fsp/fsp_graphics.c | 1 + arch/x86/lib/fsp/fsp_support.c | 1 + arch/x86/lib/fsp1/fsp_common.c | 1 + arch/x86/lib/fsp1/fsp_dram.c | 1 + arch/x86/lib/fsp1/fsp_support.c | 1 + arch/x86/lib/fsp2/fsp_common.c | 1 + arch/x86/lib/fsp2/fsp_dram.c | 1 + arch/x86/lib/fsp2/fsp_init.c | 1 + arch/x86/lib/fsp2/fsp_meminit.c | 1 + arch/x86/lib/fsp2/fsp_silicon_init.c | 1 + arch/x86/lib/fsp2/fsp_support.c | 1 + arch/x86/lib/hob.c | 1 + arch/x86/lib/i8254.c | 2 +- arch/x86/lib/i8259.c | 1 + arch/x86/lib/init_helpers.c | 2 +- arch/x86/lib/interrupts.c | 1 + arch/x86/lib/lpc-uclass.c | 1 + arch/x86/lib/mpspec.c | 1 + arch/x86/lib/mrccache.c | 1 + arch/x86/lib/northbridge-uclass.c | 1 + arch/x86/lib/physmem.c | 1 + arch/x86/lib/pinctrl_ich6.c | 1 + arch/x86/lib/pirq_routing.c | 1 + arch/x86/lib/pmu.c | 1 + arch/x86/lib/ramtest.c | 2 +- arch/x86/lib/reloc_ia32_efi.c | 1 + arch/x86/lib/reloc_x86_64_efi.c | 1 + arch/x86/lib/relocate.c | 1 + arch/x86/lib/scu.c | 1 + arch/x86/lib/sfi.c | 1 + arch/x86/lib/spl.c | 2 +- arch/x86/lib/tables.c | 1 + arch/x86/lib/tpl.c | 1 + arch/x86/lib/zimage.c | 1 + arch/xtensa/cpu/cpu.c | 2 +- arch/xtensa/cpu/exceptions.c | 2 +- arch/xtensa/include/asm/global_data.h | 2 - arch/xtensa/lib/bootm.c | 1 + arch/xtensa/lib/cache.c | 1 + arch/xtensa/lib/time.c | 1 + board/BuR/brppt1/board.c | 2 +- board/BuR/brppt1/mux.c | 1 + board/BuR/brppt2/board.c | 1 + board/BuR/brsmarc1/board.c | 1 + board/BuR/brsmarc1/mux.c | 1 + board/BuR/brxre1/board.c | 1 + board/BuR/brxre1/mux.c | 1 + board/BuR/common/br_resetc.c | 1 + board/BuR/common/common.c | 1 + board/BuS/eb_cpu5282/eb_cpu5282.c | 2 +- board/CZ.NIC/turris_mox/mox_sp.c | 2 +- board/CZ.NIC/turris_mox/turris_mox.c | 2 +- board/CZ.NIC/turris_omnia/turris_omnia.c | 2 +- board/LaCie/common/common.c | 1 + board/LaCie/net2big_v2/net2big_v2.c | 2 +- board/LaCie/netspace_v2/netspace_v2.c | 1 + board/Marvell/db-88f6720/db-88f6720.c | 1 + board/Marvell/db-88f6820-amc/db-88f6820-amc.c | 2 +- board/Marvell/db-88f6820-gp/db-88f6820-gp.c | 2 +- board/Marvell/db-mv784mp-gp/db-mv784mp-gp.c | 1 + board/Marvell/db-xc3-24g4xg/db-xc3-24g4xg.c | 1 + board/Marvell/dreamplug/dreamplug.c | 1 + board/Marvell/guruplug/guruplug.c | 1 + board/Marvell/mvebu_alleycat-5/board.c | 2 +- board/Marvell/mvebu_armada-37xx/board.c | 2 +- board/Marvell/mvebu_armada-8k/board.c | 2 +- board/Marvell/octeontx2/soc-utils.c | 1 + board/Marvell/openrd/openrd.c | 1 + board/Marvell/sheevaplug/sheevaplug.c | 1 + board/Seagate/dockstar/dockstar.c | 1 + board/Seagate/goflexhome/goflexhome.c | 1 + board/Seagate/nas220/nas220.c | 1 + board/Synology/ds109/ds109.c | 2 +- board/Synology/ds414/cmd_syno.c | 1 + board/Synology/ds414/ds414.c | 1 + .../advantech/imx8mp_rsb3720a1/imx8mp_rsb3720a1.c | 1 + board/advantech/imx8mp_rsb3720a1/spl.c | 2 +- .../imx8qm_dmsse20_a1/imx8qm_dmsse20_a1.c | 1 + board/advantech/imx8qm_dmsse20_a1/spl.c | 2 +- .../imx8qm_rom7720_a1/imx8qm_rom7720_a1.c | 1 + board/advantech/imx8qm_rom7720_a1/spl.c | 2 +- .../som-db5800-som-6867/som-db5800-som-6867.c | 1 + board/alliedtelesis/SBx81LIFKW/sbx81lifkw.c | 1 + board/alliedtelesis/SBx81LIFXCAT/sbx81lifxcat.c | 1 + board/alliedtelesis/common/gpio_hog.c | 1 + board/alliedtelesis/x240/x240.c | 2 +- board/alliedtelesis/x530/x530.c | 2 +- board/amarula/vyasa-rk3288/vyasa-rk3288.c | 1 + board/amlogic/beelink-s922x/beelink-s922x.c | 1 + board/amlogic/jethub-j100/jethub-j100.c | 1 + board/amlogic/jethub-j80/jethub-j80.c | 1 + board/amlogic/odroid-go-ultra/odroid-go-ultra.c | 2 +- board/amlogic/odroid-n2/odroid-n2.c | 1 + board/amlogic/p200/p200.c | 1 + board/amlogic/p201/p201.c | 1 + board/amlogic/p212/p212.c | 1 + board/amlogic/q200/q200.c | 1 + board/amlogic/s400/s400.c | 1 + board/amlogic/sei510/sei510.c | 1 + board/amlogic/sei610/sei610.c | 1 + board/amlogic/u200/u200.c | 1 + board/amlogic/vim3/vim3.c | 1 + board/amlogic/w400/w400.c | 1 + board/aristainetos/aristainetos.c | 1 + board/armadeus/opos6uldev/board.c | 1 + board/armltd/corstone1000/corstone1000.c | 1 + board/armltd/integrator/integrator.c | 2 +- board/armltd/integrator/timer.c | 2 +- board/armltd/total_compute/total_compute.c | 2 +- board/armltd/vexpress/vexpress_common.c | 2 +- board/armltd/vexpress64/pcie.c | 1 + board/armltd/vexpress64/vexpress64.c | 2 +- board/astro/mcf5373l/fpga.c | 1 + board/astro/mcf5373l/mcf5373l.c | 3 +- board/atmel/at91sam9260ek/at91sam9260ek.c | 2 +- board/atmel/at91sam9261ek/at91sam9261ek.c | 2 +- board/atmel/at91sam9263ek/at91sam9263ek.c | 2 +- board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c | 2 +- board/atmel/at91sam9n12ek/at91sam9n12ek.c | 2 +- board/atmel/at91sam9rlek/at91sam9rlek.c | 2 +- board/atmel/at91sam9x5ek/at91sam9x5ek.c | 2 +- board/atmel/common/board.c | 1 + board/atmel/common/mac-spi-nor.c | 1 + board/atmel/common/mac_eeprom.c | 2 + board/atmel/common/video_display.c | 1 + board/atmel/sam9x60_curiosity/sam9x60_curiosity.c | 1 + board/atmel/sam9x60ek/sam9x60ek.c | 2 +- board/atmel/sama5d27_som1_ek/sama5d27_som1_ek.c | 1 + .../atmel/sama5d27_wlsom1_ek/sama5d27_wlsom1_ek.c | 2 +- .../atmel/sama5d29_curiosity/sama5d29_curiosity.c | 1 + board/atmel/sama5d2_icp/sama5d2_icp.c | 2 +- board/atmel/sama5d2_ptc_ek/sama5d2_ptc_ek.c | 2 +- board/atmel/sama5d2_xplained/sama5d2_xplained.c | 1 + board/atmel/sama5d3_xplained/sama5d3_xplained.c | 2 +- board/atmel/sama5d3xek/sama5d3xek.c | 2 +- board/atmel/sama5d4_xplained/sama5d4_xplained.c | 2 +- board/atmel/sama5d4ek/sama5d4ek.c | 2 +- .../atmel/sama7g54_curiosity/sama7g54_curiosity.c | 1 + board/atmel/sama7g5ek/sama7g5ek.c | 2 +- board/avionic-design/common/tamonten-ng.c | 1 + board/avionic-design/common/tamonten.c | 1 + board/avionic-design/tec-ng/tec-ng-spl.c | 1 + board/beacon/beacon-rzg2m/beacon-rzg2m.c | 1 + board/beacon/imx8mm/lpddr4_timing.c | 1 + board/beacon/imx8mm/spl.c | 1 + board/beacon/imx8mn/spl.c | 1 + board/beacon/imx8mp/imx8mp_beacon.c | 1 + board/beacon/imx8mp/spl.c | 1 + board/beagle/beagle/beagle.c | 2 +- board/beagle/beagle/led.c | 1 + board/beckhoff/mx53cx9020/mx53cx9020.c | 1 + board/beckhoff/mx53cx9020/mx53cx9020_video.c | 1 + board/bluewater/gurnard/gurnard.c | 2 +- board/bosch/acc/acc.c | 2 +- board/bosch/guardian/board.c | 2 +- board/bosch/guardian/mux.c | 1 + board/bosch/shc/board.c | 2 +- board/bosch/shc/mux.c | 1 + board/boundary/nitrogen6x/nitrogen6x.c | 1 + board/broadcom/bcmbca/board.c | 1 + board/broadcom/bcmns/ns.c | 1 + board/broadcom/bcmns3/ns3.c | 2 +- board/broadcom/bcmstb/bcmstb.c | 1 + board/bsh/imx6ulz_smm_m2/imx6ulz_smm_m2.c | 1 + board/bsh/imx6ulz_smm_m2/spl.c | 1 + board/bsh/imx8mn_smm_s2/imx8mn_smm_s2.c | 1 + board/bticino/mamoj/mamoj.c | 1 + board/bticino/mamoj/spl.c | 1 + board/buffalo/lsxl/lsxl.c | 1 + board/cadence/xtfpga/xtfpga.c | 2 +- board/calao/usb_a9263/usb_a9263.c | 2 +- board/cavium/thunderx/atf.c | 3 +- board/cavium/thunderx/thunderx.c | 2 +- board/cei/cei-tk1-som/cei-tk1-som.c | 2 +- board/chipspark/popmetal_rk3288/popmetal-rk3288.c | 1 + board/cloos/imx8mm_phg/imx8mm_phg.c | 1 + board/cloos/imx8mm_phg/spl.c | 1 + board/cloudengines/pogo_e02/pogo_e02.c | 1 + board/cloudengines/pogo_v4/pogo_v4.c | 1 + board/cobra5272/cobra5272.c | 2 +- board/cobra5272/flash.c | 6 +- board/compulab/cl-som-imx7/cl-som-imx7.c | 2 +- board/compulab/cl-som-imx7/common.c | 1 + board/compulab/cl-som-imx7/mux.c | 2 +- board/compulab/cl-som-imx7/spl.c | 1 + board/compulab/cm_fx6/cm_fx6.c | 2 +- board/compulab/cm_fx6/common.c | 1 + board/compulab/cm_fx6/spl.c | 1 + board/compulab/cm_t43/cm_t43.c | 2 +- board/compulab/cm_t43/mux.c | 1 + board/compulab/cm_t43/spl.c | 2 +- board/compulab/common/common.c | 1 + board/compulab/common/eeprom.c | 4 +- board/compulab/common/omap3_smc911x.c | 1 + board/compulab/imx8mm-cl-iot-gate/ddr/ddr.c | 1 + .../ddr/lpddr4_timing_01061010.1_2.c | 1 + .../ddr/lpddr4_timing_01061010.c | 1 + .../ddr/lpddr4_timing_ff000110.c | 1 + .../ddr/lpddr4_timing_ff020008.c | 1 + board/compulab/imx8mm-cl-iot-gate/eeprom_spl.c | 2 +- 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include/extension_board.h | 2 - include/flash.h | 2 - include/fsl_errata.h | 2 +- include/fsl_ifc.h | 2 - include/fsl_immap.h | 3 - include/fuse.h | 2 - include/gzip.h | 2 - include/handoff.h | 1 - include/i2c_eeprom.h | 1 - include/init.h | 2 - include/jffs2/load_kernel.h | 1 - include/libata.h | 1 - include/linux/compat.h | 1 - include/linux/mtd/omap_gpmc.h | 2 - include/mailbox.h | 2 - include/mmc.h | 9 +- include/mpc85xx.h | 1 - include/nand.h | 2 + include/netdev.h | 3 - include/pci.h | 1 - include/phy_interface.h | 1 - include/ram.h | 2 - include/s_record.h | 2 - include/sm.h | 2 +- include/splash.h | 1 - include/u-boot/sha1.h | 2 - include/u-boot/sha256.h | 2 - include/u-boot/sha512.h | 2 - include/virtio.h | 1 - include/xen/events.h | 1 - net/arp.c | 2 +- net/bootp.c | 1 + net/cdp.c | 1 + net/dhcpv6.c | 1 + net/dns.c | 1 + net/eth-uclass.c | 1 + net/eth_bootdev.c | 1 + net/eth_common.c | 1 + net/fastboot_tcp.c | 1 + net/fastboot_udp.c | 1 + net/link_local.c | 1 + net/mdio-mux-uclass.c | 1 + net/mdio-uclass.c | 1 + net/ndisc.c | 1 + net/net.c | 1 + net/net6.c | 2 +- net/nfs.c | 1 + net/pcap.c | 2 +- net/ping6.c | 1 + net/rarp.c | 1 + net/sntp.c | 1 + net/tcp.c | 1 + net/tftp.c | 1 + net/udp.c | 1 + net/wget.c | 1 + net/wol.c | 1 + post/cpu/mpc83xx/ecc.c | 2 +- post/drivers/flash.c | 2 +- post/drivers/i2c.c | 2 +- post/drivers/memory.c | 2 +- post/drivers/rtc.c | 2 +- post/lib_powerpc/andi.c | 2 +- post/lib_powerpc/b.c | 2 +- post/lib_powerpc/cmp.c | 2 +- post/lib_powerpc/cmpi.c | 2 +- post/lib_powerpc/complex.c | 2 +- post/lib_powerpc/cpu.c | 2 +- post/lib_powerpc/cr.c | 2 +- post/lib_powerpc/fpu/20001122-1.c | 2 +- post/lib_powerpc/fpu/20010114-2.c | 2 +- post/lib_powerpc/fpu/20010226-1.c | 2 +- post/lib_powerpc/fpu/980619-1.c | 2 +- post/lib_powerpc/fpu/acc1.c | 2 +- post/lib_powerpc/fpu/compare-fp-1.c | 2 +- post/lib_powerpc/fpu/fpu.c | 2 +- post/lib_powerpc/fpu/mul-subnormal-single-1.c | 2 +- post/lib_powerpc/load.c | 2 +- post/lib_powerpc/multi.c | 2 +- post/lib_powerpc/rlwimi.c | 2 +- post/lib_powerpc/rlwinm.c | 2 +- post/lib_powerpc/rlwnm.c | 2 +- post/lib_powerpc/srawi.c | 2 +- post/lib_powerpc/store.c | 2 +- post/lib_powerpc/string.c | 2 +- post/lib_powerpc/three.c | 2 +- post/lib_powerpc/threei.c | 2 +- post/lib_powerpc/threex.c | 2 +- post/lib_powerpc/two.c | 2 +- post/lib_powerpc/twox.c | 2 +- post/post.c | 2 +- post/tests.c | 3 +- scripts/Makefile.autoconf | 4 +- scripts/gen_ll_addressable_symbols.sh | 2 +- test/bloblist.c | 1 + test/boot/bootdev.c | 1 + test/boot/bootflow.c | 1 + test/boot/bootmeth.c | 1 + test/boot/bootstd_common.c | 1 + test/boot/cedit.c | 1 + test/boot/expo.c | 1 + test/boot/image.c | 1 + test/boot/measurement.c | 1 + test/boot/vbe_fixup.c | 1 + test/boot/vbe_simple.c | 1 + test/bootm.c | 1 + test/cmd/addrmap.c | 1 + test/cmd/armffa.c | 1 + test/cmd/bdinfo.c | 1 + test/cmd/exit.c | 1 + test/cmd/fdt.c | 1 + test/cmd/font.c | 1 + test/cmd/history.c | 1 + test/cmd/loadm.c | 1 + test/cmd/mem.c | 1 + test/cmd/mem_search.c | 1 + test/cmd/pci_mps.c | 1 + test/cmd/pinmux.c | 1 + test/cmd/rw.c | 1 + test/cmd/seama.c | 1 + test/cmd/setexpr.c | 1 + test/cmd/temperature.c | 1 + test/cmd/test_echo.c | 1 + test/cmd/test_pause.c | 1 + test/cmd/wget.c | 1 + test/cmd_ut.c | 2 +- test/command_ut.c | 1 + test/common/cmd_ut_common.c | 1 + test/common/cread.c | 2 +- test/common/cyclic.c | 1 + test/common/event.c | 1 + test/common/test_autoboot.c | 1 + test/compression.c | 1 + test/dm/acpi.c | 1 + test/dm/acpi_dp.c | 1 + test/dm/acpigen.c | 1 + test/dm/adc.c | 1 + test/dm/audio.c | 1 + test/dm/axi.c | 1 + test/dm/blk.c | 1 + test/dm/blkmap.c | 1 + test/dm/bootcount.c | 1 + test/dm/bus.c | 1 + test/dm/button.c | 1 + test/dm/cache.c | 1 + test/dm/clk.c | 1 + test/dm/clk_ccf.c | 1 + test/dm/core.c | 1 + test/dm/cpu.c | 1 + test/dm/cros_ec.c | 1 + test/dm/cros_ec_pwm.c | 1 + test/dm/devres.c | 1 + test/dm/dma.c | 1 + test/dm/dsi_host.c | 1 + test/dm/efi_media.c | 1 + test/dm/eth.c | 1 + test/dm/fastboot.c | 1 + test/dm/fdtdec.c | 1 + test/dm/ffa.c | 1 + test/dm/firmware.c | 1 + test/dm/fwu_mdata.c | 1 + test/dm/gpio.c | 1 + test/dm/host.c | 1 + test/dm/hwspinlock.c | 1 + test/dm/i2c.c | 1 + test/dm/i2s.c | 1 + test/dm/iommu.c | 1 + test/dm/irq.c | 1 + test/dm/k210_pll.c | 1 + test/dm/led.c | 1 + test/dm/mailbox.c | 1 + test/dm/mdio.c | 1 + test/dm/mdio_mux.c | 1 + test/dm/misc.c | 1 + test/dm/mmc.c | 1 + test/dm/mux-cmd.c | 2 +- test/dm/mux-emul.c | 1 + test/dm/mux-mmio.c | 1 + test/dm/nop.c | 1 + test/dm/nvmxip.c | 1 + test/dm/of_extra.c | 1 + test/dm/of_platdata.c | 1 + test/dm/ofnode.c | 1 + test/dm/ofread.c | 1 + test/dm/osd.c | 1 + test/dm/p2sb.c | 1 + test/dm/panel.c | 1 + test/dm/part.c | 1 + test/dm/pch.c | 1 + test/dm/pci.c | 1 + test/dm/pci_ep.c | 1 + test/dm/phy.c | 1 + test/dm/phys2bus.c | 1 + test/dm/pinmux.c | 1 + test/dm/pmc.c | 1 + test/dm/pmic.c | 1 + test/dm/power-domain.c | 1 + test/dm/pwm.c | 1 + test/dm/qfw.c | 1 + test/dm/ram.c | 1 + test/dm/read.c | 1 + test/dm/reboot-mode.c | 1 + test/dm/regmap.c | 2 +- test/dm/regulator.c | 1 + test/dm/remoteproc.c | 3 +- test/dm/reset.c | 1 + test/dm/rkmtd.c | 1 + test/dm/rng.c | 1 + test/dm/rtc.c | 1 + test/dm/scmi.c | 1 + test/dm/scsi.c | 1 + test/dm/serial.c | 1 + test/dm/sf.c | 1 + test/dm/simple-bus.c | 1 + test/dm/simple-pm-bus.c | 1 + test/dm/sm.c | 1 + test/dm/smem.c | 1 + test/dm/soc.c | 1 + test/dm/sound.c | 1 + test/dm/spi.c | 1 + test/dm/spmi.c | 1 + test/dm/syscon-reset.c | 1 + test/dm/syscon.c | 1 + test/dm/sysinfo-gpio.c | 1 + test/dm/sysinfo.c | 1 + test/dm/sysreset.c | 1 + test/dm/tag.c | 1 + test/dm/tee.c | 1 + test/dm/test-dm.c | 1 + test/dm/test-driver.c | 1 + test/dm/test-fdt.c | 1 + test/dm/test-uclass.c | 1 + test/dm/timer.c | 1 + test/dm/tpm.c | 1 + test/dm/usb.c | 1 + test/dm/video.c | 1 + test/dm/virtio.c | 1 + test/dm/virtio_device.c | 1 + test/dm/virtio_rng.c | 1 + test/dm/wdt.c | 2 +- test/env/attr.c | 1 + test/env/cmd_ut_env.c | 1 + test/env/fdt.c | 1 + test/env/hashtable.c | 2 +- test/fuzz/cmd_fuzz.c | 1 + test/fuzz/virtio.c | 1 + test/image/spl_load.c | 1 + test/image/spl_load_fs.c | 1 + test/image/spl_load_net.c | 1 + test/image/spl_load_nor.c | 1 + test/image/spl_load_os.c | 1 + test/image/spl_load_spi.c | 1 + test/lib/abuf.c | 1 + test/lib/asn1.c | 1 + test/lib/cmd_ut_lib.c | 1 + test/lib/efi_device_path.c | 1 + test/lib/efi_image_region.c | 1 + test/lib/getopt.c | 1 + test/lib/hexdump.c | 1 + test/lib/kconfig.c | 1 + test/lib/kconfig_spl.c | 1 + test/lib/lmb.c | 1 + test/lib/longjmp.c | 1 + test/lib/rsa.c | 1 + test/lib/sscanf.c | 1 + test/lib/string.c | 1 + test/lib/strlcat.c | 1 + test/lib/test_aes.c | 1 + test/lib/test_crypt.c | 1 + test/lib/test_errno_str.c | 1 + test/lib/test_print.c | 1 + test/lib/uuid.c | 1 + test/log/cont_test.c | 1 + test/log/log_filter.c | 1 + test/log/log_test.c | 1 + test/log/log_ut.c | 1 + test/log/nolog_ndebug.c | 1 + test/log/nolog_test.c | 1 + test/log/pr_cont_test.c | 1 + test/log/syslog_test.c | 1 + test/log/syslog_test_ndebug.c | 1 + test/optee/cmd_ut_optee.c | 1 + test/overlay/cmd_ut_overlay.c | 1 + test/print_ut.c | 1 + test/py/u_boot_console_base.py | 15 +- test/stdint/int-types.c | 2 +- test/str_ut.c | 1 + test/test-main.c | 1 + test/time_ut.c | 1 + test/unicode_ut.c | 1 + test/ut.c | 1 + tools/dtoc/dtb_platdata.py | 3 + tools/dtoc/test_dtoc.py | 3 + 4281 files changed, 4581 insertions(+), 8984 deletions(-) delete mode 100644 arch/arm/include/asm/arch-adi/sc5xx/sc5xx.h delete mode 100644 arch/arm/include/asm/arch-adi/sc5xx/soc.h delete mode 100644 arch/arm/include/asm/arch-adi/sc5xx/spl.h delete mode 100644 arch/arm/mach-k3/am64x/Makefile delete mode 100644 arch/arm/mach-k3/am64x/boot.c delete mode 100644 arch/arm/mach-sc5xx/Kconfig delete mode 100644 arch/arm/mach-sc5xx/Makefile delete mode 100644 arch/arm/mach-sc5xx/config.mk delete mode 100644 arch/arm/mach-sc5xx/init/Makefile delete mode 100644 arch/arm/mach-sc5xx/init/clkinit.c delete mode 100644 arch/arm/mach-sc5xx/init/clkinit.h delete mode 100644 arch/arm/mach-sc5xx/init/dmcinit.c delete mode 100644 arch/arm/mach-sc5xx/init/dmcinit.h delete mode 100644 arch/arm/mach-sc5xx/init/mem/is43tr16512bl.h delete mode 100644 arch/arm/mach-sc5xx/init/mem/mt41k128m16jt.h delete mode 100644 arch/arm/mach-sc5xx/init/mem/mt41k512m16ha.h delete mode 100644 arch/arm/mach-sc5xx/init/mem/mt47h128m16rt.h delete mode 100644 arch/arm/mach-sc5xx/rcu.c delete mode 100644 arch/arm/mach-sc5xx/sc57x.c delete mode 100644 arch/arm/mach-sc5xx/sc58x.c delete mode 100644 arch/arm/mach-sc5xx/sc59x.c delete mode 100644 arch/arm/mach-sc5xx/sc59x_64.c delete mode 100644 arch/arm/mach-sc5xx/soc.c delete mode 100644 arch/arm/mach-sc5xx/spl.c create mode 100644 arch/arm/mach-versatile/Makefile create mode 100644 arch/arm/mach-versatile/reset.S create mode 100644 arch/arm/mach-versatile/timer.c delete mode 100644 board/phytec/common/k3/Makefile delete mode 100644 board/phytec/common/k3/board.c delete mode 100644 drivers/clk/adi/Kconfig delete mode 100644 drivers/clk/adi/Makefile delete mode 100644 drivers/clk/adi/clk-adi-pll.c delete mode 100644 drivers/clk/adi/clk-adi-sc57x.c delete mode 100644 drivers/clk/adi/clk-adi-sc58x.c delete mode 100644 drivers/clk/adi/clk-adi-sc594.c delete mode 100644 drivers/clk/adi/clk-adi-sc598.c delete mode 100644 drivers/clk/adi/clk-shared.c delete mode 100644 drivers/clk/adi/clk.h delete mode 100644 drivers/net/dwc_eth_xgmac.c delete mode 100644 drivers/net/dwc_eth_xgmac.h delete mode 100644 drivers/net/dwc_eth_xgmac_socfpga.c delete mode 100644 drivers/serial/serial_adi_uart4.c delete mode 100644 drivers/timer/adi_sc5xx_timer.c create mode 100644 include/common.h delete mode 100644 include/dt-bindings/clock/adi-sc5xx-clock.h delete mode 100644 include/env/adi/adi_boot.env (limited to 'include') diff --git a/MAINTAINERS b/MAINTAINERS index 6d021763a62..638b2fdd442 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -598,22 +598,6 @@ R: Marc Murphy S: Supported F: arch/arm/dts/am335x-sancloud* -ARM SC5XX -M: Nathan Barrett-Morrison -M: Greg Malysa -M: Ian Roberts -M: Vasileios Bimpikas -M: Utsav Agarwal -M: Arturs Artamonovs -S: Supported -T: git https://github.com/analogdevicesinc/lnxdsp-u-boot -F: arch/arm/include/asm/arch-adi/ -F: arch/arm/mach-sc5xx/ -F: drivers/clk/adi/ -F: drivers/serial/serial_adi_uart4.c -F: drivers/timer/adi_sc5xx_timer.c -F: include/env/adi/ - ARM SNAPDRAGON M: Caleb Connolly M: Neil Armstrong diff --git a/api/api.c b/api/api.c index d22132f62fe..89003c161c2 100644 --- a/api/api.c +++ b/api/api.c @@ -7,13 +7,11 @@ #include #include +#include #include #include -#include #include -#include #include -#include #include #include #include diff --git a/api/api_display.c b/api/api_display.c index 8fd078c8c4a..2e877a85d14 100644 --- a/api/api_display.c +++ b/api/api_display.c @@ -3,9 +3,9 @@ * Copyright (c) 2011 The Chromium OS Authors. */ +#include #include #include -#include /* TODO(clchiou): add support of video device */ diff --git a/api/api_net.c b/api/api_net.c index 264ff530563..7515c26e8b4 100644 --- a/api/api_net.c +++ b/api/api_net.c @@ -6,6 +6,7 @@ */ #include +#include #include #include #include diff --git a/api/api_platform-arm.c b/api/api_platform-arm.c index 9afba66c244..6cfd9e6cc20 100644 --- a/api/api_platform-arm.c +++ b/api/api_platform-arm.c @@ -12,6 +12,7 @@ #include #include +#include #include #include "api_private.h" diff --git a/api/api_platform-mips.c b/api/api_platform-mips.c index 262b35a2777..e1509663af5 100644 --- a/api/api_platform-mips.c +++ b/api/api_platform-mips.c @@ -9,6 +9,7 @@ #include #include +#include #include #include "api_private.h" diff --git a/api/api_platform-powerpc.c b/api/api_platform-powerpc.c index 3a04a9f691c..847a4a3015b 100644 --- a/api/api_platform-powerpc.c +++ b/api/api_platform-powerpc.c @@ -12,6 +12,7 @@ #include #include +#include #include #include "api_private.h" diff --git a/api/api_storage.c b/api/api_storage.c index 3d2d9d6ef4c..78becbe39fb 100644 --- a/api/api_storage.c +++ b/api/api_storage.c @@ -6,10 +6,10 @@ */ #include +#include #include #include #include -#include #if defined(CONFIG_CMD_USB) && defined(CONFIG_USB_STORAGE) #include diff --git a/arch/arc/include/asm/global_data.h b/arch/arc/include/asm/global_data.h index fd9b7fb5f8d..e35a26f1eb1 100644 --- a/arch/arc/include/asm/global_data.h +++ b/arch/arc/include/asm/global_data.h @@ -6,8 +6,6 @@ #ifndef __ASM_ARC_GLOBAL_DATA_H #define __ASM_ARC_GLOBAL_DATA_H -#include - #ifndef __ASSEMBLY__ /* Architecture-specific global data */ struct arch_global_data { diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 39ad03acd2e..38fc757c1f0 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1853,9 +1853,6 @@ config TARGET_LS1046AFRWY development platform that supports the QorIQ LS1046A Layerscape Architecture processor. -config ARCH_SC5XX - bool "Analog Devices SC5XX-processor family" - config TARGET_SL28 bool "Support sl28" select ARCH_LS1028A @@ -2289,8 +2286,6 @@ source "arch/arm/mach-rockchip/Kconfig" source "arch/arm/mach-s5pc1xx/Kconfig" -source "arch/arm/mach-sc5xx/Kconfig" - source "arch/arm/mach-snapdragon/Kconfig" source "arch/arm/mach-socfpga/Kconfig" diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 734c6d69926..a4266a3e366 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -78,7 +78,6 @@ machine-$(CONFIG_ARCH_OWL) += owl machine-$(CONFIG_ARCH_RENESAS) += renesas machine-$(CONFIG_ARCH_ROCKCHIP) += rockchip machine-$(CONFIG_ARCH_S5PC1XX) += s5pc1xx -machine-$(CONFIG_ARCH_SC5XX) += sc5xx machine-$(CONFIG_ARCH_SNAPDRAGON) += snapdragon machine-$(CONFIG_ARCH_SOCFPGA) += socfpga machine-$(CONFIG_ARCH_STM32) += stm32 diff --git a/arch/arm/cpu/arm11/cpu.c b/arch/arm/cpu/arm11/cpu.c index 01d2e1a125d..1e16b89d006 100644 --- a/arch/arm/cpu/arm11/cpu.c +++ b/arch/arm/cpu/arm11/cpu.c @@ -14,6 +14,7 @@ * CPU specific code */ +#include #include #include #include diff --git a/arch/arm/cpu/arm1136/mx31/devices.c b/arch/arm/cpu/arm1136/mx31/devices.c index 87ca303e31b..9997e8fc339 100644 --- a/arch/arm/cpu/arm1136/mx31/devices.c +++ b/arch/arm/cpu/arm1136/mx31/devices.c @@ -6,6 +6,7 @@ * (c) 2007 Pengutronix, Sascha Hauer */ +#include #include #include diff --git a/arch/arm/cpu/arm1136/mx31/generic.c b/arch/arm/cpu/arm1136/mx31/generic.c index fc56baccfcd..a3d4f147962 100644 --- a/arch/arm/cpu/arm1136/mx31/generic.c +++ b/arch/arm/cpu/arm1136/mx31/generic.c @@ -4,6 +4,7 @@ * Sascha Hauer, Pengutronix */ +#include #include #include #include diff --git a/arch/arm/cpu/arm1136/mx31/timer.c b/arch/arm/cpu/arm1136/mx31/timer.c index b41ca68ae55..a913860491c 100644 --- a/arch/arm/cpu/arm1136/mx31/timer.c +++ b/arch/arm/cpu/arm1136/mx31/timer.c @@ -4,6 +4,7 @@ * Sascha Hauer, Pengutronix */ +#include #include #include #include diff --git a/arch/arm/cpu/arm720t/interrupts.c b/arch/arm/cpu/arm720t/interrupts.c index e3d0216158f..f0fc58deadb 100644 --- a/arch/arm/cpu/arm720t/interrupts.c +++ b/arch/arm/cpu/arm720t/interrupts.c @@ -9,7 +9,7 @@ * Alex Zuepke */ -#include +#include #if defined(CONFIG_ARCH_TEGRA) static ulong timestamp; diff --git a/arch/arm/cpu/arm920t/cpu.c b/arch/arm/cpu/arm920t/cpu.c index 61e18230573..305713e7861 100644 --- a/arch/arm/cpu/arm920t/cpu.c +++ b/arch/arm/cpu/arm920t/cpu.c @@ -12,6 +12,7 @@ * CPU specific code */ +#include #include #include #include diff --git a/arch/arm/cpu/arm920t/start.S b/arch/arm/cpu/arm920t/start.S index e792e8e795e..cba4a1f0358 100644 --- a/arch/arm/cpu/arm920t/start.S +++ b/arch/arm/cpu/arm920t/start.S @@ -8,6 +8,7 @@ */ #include +#include #include /* diff --git a/arch/arm/cpu/arm926ejs/cache.c b/arch/arm/cpu/arm926ejs/cache.c index 5b87a3af91b..95963d2665f 100644 --- a/arch/arm/cpu/arm926ejs/cache.c +++ b/arch/arm/cpu/arm926ejs/cache.c @@ -6,6 +6,7 @@ #include #include #include +#include #if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) void invalidate_dcache_all(void) diff --git a/arch/arm/cpu/arm926ejs/cpu.c b/arch/arm/cpu/arm926ejs/cpu.c index 07ab04b7b08..2ce413a7f86 100644 --- a/arch/arm/cpu/arm926ejs/cpu.c +++ b/arch/arm/cpu/arm926ejs/cpu.c @@ -12,6 +12,7 @@ * CPU specific code */ +#include #include #include #include diff --git a/arch/arm/cpu/arm926ejs/mxs/clock.c b/arch/arm/cpu/arm926ejs/mxs/clock.c index 58f6cf80cae..4e1cf3a1e32 100644 --- a/arch/arm/cpu/arm926ejs/mxs/clock.c +++ b/arch/arm/cpu/arm926ejs/mxs/clock.c @@ -9,6 +9,7 @@ * Copyright (C) 2010 Freescale Semiconductor, Inc. */ +#include #include #include #include diff --git a/arch/arm/cpu/arm926ejs/mxs/iomux.c b/arch/arm/cpu/arm926ejs/mxs/iomux.c index 851b4deb080..381264b8a18 100644 --- a/arch/arm/cpu/arm926ejs/mxs/iomux.c +++ b/arch/arm/cpu/arm926ejs/mxs/iomux.c @@ -6,6 +6,7 @@ * */ +#include #include #include #include diff --git a/arch/arm/cpu/arm926ejs/mxs/mxs.c b/arch/arm/cpu/arm926ejs/mxs/mxs.c index 7b2bb09551b..4f3cb63c56d 100644 --- a/arch/arm/cpu/arm926ejs/mxs/mxs.c +++ b/arch/arm/cpu/arm926ejs/mxs/mxs.c @@ -9,6 +9,7 @@ * Copyright (C) 2010 Freescale Semiconductor, Inc. */ +#include #include #include #include diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_boot.c b/arch/arm/cpu/arm926ejs/mxs/spl_boot.c index 76a69d7f958..249f8de8fbe 100644 --- a/arch/arm/cpu/arm926ejs/mxs/spl_boot.c +++ b/arch/arm/cpu/arm926ejs/mxs/spl_boot.c @@ -6,6 +6,7 @@ * on behalf of DENX Software Engineering GmbH */ +#include #include #include #include diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_lradc_init.c b/arch/arm/cpu/arm926ejs/mxs/spl_lradc_init.c index b2d3b2b13ef..2cfbd780953 100644 --- a/arch/arm/cpu/arm926ejs/mxs/spl_lradc_init.c +++ b/arch/arm/cpu/arm926ejs/mxs/spl_lradc_init.c @@ -6,6 +6,7 @@ * on behalf of DENX Software Engineering GmbH */ +#include #include #include #include diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c index c3136dd8976..a94803ee93d 100644 --- a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c +++ b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c @@ -6,6 +6,7 @@ * on behalf of DENX Software Engineering GmbH */ +#include #include #include #include diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c b/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c index 8b65c094a8a..77bca7e331a 100644 --- a/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c +++ b/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c @@ -6,6 +6,7 @@ * on behalf of DENX Software Engineering GmbH */ +#include #include #include #include diff --git a/arch/arm/cpu/arm926ejs/mxs/start.S b/arch/arm/cpu/arm926ejs/mxs/start.S index a6eb053cadb..61982e38a1d 100644 --- a/arch/arm/cpu/arm926ejs/mxs/start.S +++ b/arch/arm/cpu/arm926ejs/mxs/start.S @@ -20,6 +20,7 @@ #include #include +#include #include /* diff --git a/arch/arm/cpu/arm926ejs/mxs/timer.c b/arch/arm/cpu/arm926ejs/mxs/timer.c index cbd3b5d9958..3dff3d768d1 100644 --- a/arch/arm/cpu/arm926ejs/mxs/timer.c +++ b/arch/arm/cpu/arm926ejs/mxs/timer.c @@ -9,6 +9,7 @@ * (C) Copyright 2009-2010 Freescale Semiconductor, Inc. */ +#include #include #include #include diff --git a/arch/arm/cpu/arm926ejs/start.S b/arch/arm/cpu/arm926ejs/start.S index 5d6c9f0861e..c882bd39eab 100644 --- a/arch/arm/cpu/arm926ejs/start.S +++ b/arch/arm/cpu/arm926ejs/start.S @@ -16,6 +16,7 @@ #include #include +#include #include /* diff --git a/arch/arm/cpu/arm946es/cpu.c b/arch/arm/cpu/arm946es/cpu.c index efd232d3423..334bb542743 100644 --- a/arch/arm/cpu/arm946es/cpu.c +++ b/arch/arm/cpu/arm946es/cpu.c @@ -12,6 +12,7 @@ * CPU specific code */ +#include #include #include #include diff --git a/arch/arm/cpu/armv7/arch_timer.c b/arch/arm/cpu/armv7/arch_timer.c index f25a8674dea..17bd53dae84 100644 --- a/arch/arm/cpu/armv7/arch_timer.c +++ b/arch/arm/cpu/armv7/arch_timer.c @@ -4,7 +4,7 @@ * Texas Instruments Incorporated, */ -#include +#include #include #include #include diff --git a/arch/arm/cpu/armv7/bcm235xx/clk-bcm235xx.c b/arch/arm/cpu/armv7/bcm235xx/clk-bcm235xx.c index 7f73f893458..39217c5b2bf 100644 --- a/arch/arm/cpu/armv7/bcm235xx/clk-bcm235xx.c +++ b/arch/arm/cpu/armv7/bcm235xx/clk-bcm235xx.c @@ -9,6 +9,7 @@ * */ +#include #include #include #include diff --git a/arch/arm/cpu/armv7/bcm235xx/clk-bsc.c b/arch/arm/cpu/armv7/bcm235xx/clk-bsc.c index 55dcc2fd78c..1b3f36aebe1 100644 --- a/arch/arm/cpu/armv7/bcm235xx/clk-bsc.c +++ b/arch/arm/cpu/armv7/bcm235xx/clk-bsc.c @@ -3,6 +3,7 @@ * Copyright 2013 Broadcom Corporation. */ +#include #include #include #include diff --git a/arch/arm/cpu/armv7/bcm235xx/clk-core.c b/arch/arm/cpu/armv7/bcm235xx/clk-core.c index b769c451105..d7edefee231 100644 --- a/arch/arm/cpu/armv7/bcm235xx/clk-core.c +++ b/arch/arm/cpu/armv7/bcm235xx/clk-core.c @@ -9,6 +9,7 @@ * */ +#include #include #include #include diff --git a/arch/arm/cpu/armv7/bcm235xx/clk-eth.c b/arch/arm/cpu/armv7/bcm235xx/clk-eth.c index 5f7cc4a102d..209ceca9a06 100644 --- a/arch/arm/cpu/armv7/bcm235xx/clk-eth.c +++ b/arch/arm/cpu/armv7/bcm235xx/clk-eth.c @@ -3,6 +3,7 @@ * Copyright 2014 Broadcom Corporation. */ +#include #include #include #include diff --git a/arch/arm/cpu/armv7/bcm235xx/clk-sdio.c b/arch/arm/cpu/armv7/bcm235xx/clk-sdio.c index f3ff29bebe8..f2ba354c24f 100644 --- a/arch/arm/cpu/armv7/bcm235xx/clk-sdio.c +++ b/arch/arm/cpu/armv7/bcm235xx/clk-sdio.c @@ -3,6 +3,7 @@ * Copyright 2013 Broadcom Corporation. */ +#include #include #include #include diff --git a/arch/arm/cpu/armv7/bcm235xx/clk-usb-otg.c b/arch/arm/cpu/armv7/bcm235xx/clk-usb-otg.c index 87918059408..f604aec62fa 100644 --- a/arch/arm/cpu/armv7/bcm235xx/clk-usb-otg.c +++ b/arch/arm/cpu/armv7/bcm235xx/clk-usb-otg.c @@ -3,6 +3,7 @@ * Copyright 2014 Broadcom Corporation. */ +#include #include #include #include "clk-core.h" diff --git a/arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c b/arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c index b258fea45c8..8f6260e7857 100644 --- a/arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c +++ b/arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c @@ -9,6 +9,7 @@ * */ +#include #include #include #include diff --git a/arch/arm/cpu/armv7/bcm281xx/clk-bsc.c b/arch/arm/cpu/armv7/bcm281xx/clk-bsc.c index 55dcc2fd78c..1b3f36aebe1 100644 --- a/arch/arm/cpu/armv7/bcm281xx/clk-bsc.c +++ b/arch/arm/cpu/armv7/bcm281xx/clk-bsc.c @@ -3,6 +3,7 @@ * Copyright 2013 Broadcom Corporation. */ +#include #include #include #include diff --git a/arch/arm/cpu/armv7/bcm281xx/clk-core.c b/arch/arm/cpu/armv7/bcm281xx/clk-core.c index 3f2e021a307..26b673a5405 100644 --- a/arch/arm/cpu/armv7/bcm281xx/clk-core.c +++ b/arch/arm/cpu/armv7/bcm281xx/clk-core.c @@ -9,6 +9,7 @@ * */ +#include #include #include #include diff --git a/arch/arm/cpu/armv7/bcm281xx/clk-eth.c b/arch/arm/cpu/armv7/bcm281xx/clk-eth.c index 5f7cc4a102d..209ceca9a06 100644 --- a/arch/arm/cpu/armv7/bcm281xx/clk-eth.c +++ b/arch/arm/cpu/armv7/bcm281xx/clk-eth.c @@ -3,6 +3,7 @@ * Copyright 2014 Broadcom Corporation. */ +#include #include #include #include diff --git a/arch/arm/cpu/armv7/bcm281xx/clk-sdio.c b/arch/arm/cpu/armv7/bcm281xx/clk-sdio.c index f3ff29bebe8..f2ba354c24f 100644 --- a/arch/arm/cpu/armv7/bcm281xx/clk-sdio.c +++ b/arch/arm/cpu/armv7/bcm281xx/clk-sdio.c @@ -3,6 +3,7 @@ * Copyright 2013 Broadcom Corporation. */ +#include #include #include #include diff --git a/arch/arm/cpu/armv7/bcm281xx/clk-usb-otg.c b/arch/arm/cpu/armv7/bcm281xx/clk-usb-otg.c index 87918059408..f604aec62fa 100644 --- a/arch/arm/cpu/armv7/bcm281xx/clk-usb-otg.c +++ b/arch/arm/cpu/armv7/bcm281xx/clk-usb-otg.c @@ -3,6 +3,7 @@ * Copyright 2014 Broadcom Corporation. */ +#include #include #include #include "clk-core.h" diff --git a/arch/arm/cpu/armv7/bcm281xx/reset.c b/arch/arm/cpu/armv7/bcm281xx/reset.c index 87e4337be4e..1491e5c88b2 100644 --- a/arch/arm/cpu/armv7/bcm281xx/reset.c +++ b/arch/arm/cpu/armv7/bcm281xx/reset.c @@ -3,6 +3,7 @@ * Copyright 2013 Broadcom Corporation. */ +#include #include #include #include diff --git a/arch/arm/cpu/armv7/bcmcygnus/reset.c b/arch/arm/cpu/armv7/bcmcygnus/reset.c index 617c8d68a2a..63992fd8701 100644 --- a/arch/arm/cpu/armv7/bcmcygnus/reset.c +++ b/arch/arm/cpu/armv7/bcmcygnus/reset.c @@ -3,6 +3,7 @@ * Copyright 2014 Broadcom Corporation. */ +#include #include #include diff --git a/arch/arm/cpu/armv7/bcmnsp/reset.c b/arch/arm/cpu/armv7/bcmnsp/reset.c index c3be33124c6..a3137752e88 100644 --- a/arch/arm/cpu/armv7/bcmnsp/reset.c +++ b/arch/arm/cpu/armv7/bcmnsp/reset.c @@ -3,6 +3,7 @@ * Copyright 2014 Broadcom Corporation. */ +#include #include #include diff --git a/arch/arm/cpu/armv7/cache_v7.c b/arch/arm/cpu/armv7/cache_v7.c index d11420d2fdd..19ff4323528 100644 --- a/arch/arm/cpu/armv7/cache_v7.c +++ b/arch/arm/cpu/armv7/cache_v7.c @@ -7,6 +7,7 @@ #include #include #include +#include #include #include diff --git a/arch/arm/cpu/armv7/cp15.c b/arch/arm/cpu/armv7/cp15.c index b2c52db68dc..0ac4e7ba8c8 100644 --- a/arch/arm/cpu/armv7/cp15.c +++ b/arch/arm/cpu/armv7/cp15.c @@ -7,6 +7,7 @@ * CP15 specific code */ +#include #include #include #include diff --git a/arch/arm/cpu/armv7/cpu.c b/arch/arm/cpu/armv7/cpu.c index aa981faef00..6259ffa5108 100644 --- a/arch/arm/cpu/armv7/cpu.c +++ b/arch/arm/cpu/armv7/cpu.c @@ -14,6 +14,7 @@ * CPU specific code */ +#include #include #include #include diff --git a/arch/arm/cpu/armv7/exception_level.c b/arch/arm/cpu/armv7/exception_level.c index 7baade61b07..f6d25bb682c 100644 --- a/arch/arm/cpu/armv7/exception_level.c +++ b/arch/arm/cpu/armv7/exception_level.c @@ -8,6 +8,7 @@ * secure mode before booting an operating system. */ +#include #include #include #include diff --git a/arch/arm/cpu/armv7/iproc-common/armpll.c b/arch/arm/cpu/armv7/iproc-common/armpll.c index b345671b0a6..8c3a323f065 100644 --- a/arch/arm/cpu/armv7/iproc-common/armpll.c +++ b/arch/arm/cpu/armv7/iproc-common/armpll.c @@ -3,6 +3,7 @@ * Copyright 2014 Broadcom Corporation. */ +#include #include #include #include diff --git a/arch/arm/cpu/armv7/iproc-common/hwinit-common.c b/arch/arm/cpu/armv7/iproc-common/hwinit-common.c index eca7e8b512b..896d2f95694 100644 --- a/arch/arm/cpu/armv7/iproc-common/hwinit-common.c +++ b/arch/arm/cpu/armv7/iproc-common/hwinit-common.c @@ -3,6 +3,7 @@ * Copyright 2014 Broadcom Corporation. */ +#include #include #include diff --git a/arch/arm/cpu/armv7/iproc-common/timer.c b/arch/arm/cpu/armv7/iproc-common/timer.c index b60d90f7e6a..a4255a44c00 100644 --- a/arch/arm/cpu/armv7/iproc-common/timer.c +++ b/arch/arm/cpu/armv7/iproc-common/timer.c @@ -3,6 +3,7 @@ * Copyright 2014 Broadcom Corporation. */ +#include #include #include #include diff --git a/arch/arm/cpu/armv7/ls102xa/clock.c b/arch/arm/cpu/armv7/ls102xa/clock.c index e885a85ce65..4e1fe281201 100644 --- a/arch/arm/cpu/armv7/ls102xa/clock.c +++ b/arch/arm/cpu/armv7/ls102xa/clock.c @@ -3,7 +3,7 @@ * Copyright 2014 Freescale Semiconductor, Inc. */ -#include +#include #include #include #include diff --git a/arch/arm/cpu/armv7/ls102xa/cpu.c b/arch/arm/cpu/armv7/ls102xa/cpu.c index 74a2dcbc116..c455969609f 100644 --- a/arch/arm/cpu/armv7/ls102xa/cpu.c +++ b/arch/arm/cpu/armv7/ls102xa/cpu.c @@ -4,6 +4,7 @@ * Copyright 2021 NXP */ +#include #include #include #include diff --git a/arch/arm/cpu/armv7/ls102xa/fdt.c b/arch/arm/cpu/armv7/ls102xa/fdt.c index 34eea22eb92..1c3d24bcad9 100644 --- a/arch/arm/cpu/armv7/ls102xa/fdt.c +++ b/arch/arm/cpu/armv7/ls102xa/fdt.c @@ -3,7 +3,7 @@ * Copyright 2014 Freescale Semiconductor, Inc. */ -#include +#include #include #include #include diff --git a/arch/arm/cpu/armv7/ls102xa/fsl_epu.c b/arch/arm/cpu/armv7/ls102xa/fsl_epu.c index 664eae532d5..e31a4fb6c31 100644 --- a/arch/arm/cpu/armv7/ls102xa/fsl_epu.c +++ b/arch/arm/cpu/armv7/ls102xa/fsl_epu.c @@ -3,6 +3,7 @@ * Copyright 2014 Freescale Semiconductor, Inc. */ +#include #include #include "fsl_epu.h" diff --git a/arch/arm/cpu/armv7/ls102xa/fsl_ls1_serdes.c b/arch/arm/cpu/armv7/ls102xa/fsl_ls1_serdes.c index c1eadb34523..f74d819ea1e 100644 --- a/arch/arm/cpu/armv7/ls102xa/fsl_ls1_serdes.c +++ b/arch/arm/cpu/armv7/ls102xa/fsl_ls1_serdes.c @@ -3,7 +3,7 @@ * Copyright 2014 Freescale Semiconductor, Inc. */ -#include +#include #include #include #include diff --git a/arch/arm/cpu/armv7/ls102xa/ls102xa_serdes.c b/arch/arm/cpu/armv7/ls102xa/ls102xa_serdes.c index 3032e266c5d..8c030be8b36 100644 --- a/arch/arm/cpu/armv7/ls102xa/ls102xa_serdes.c +++ b/arch/arm/cpu/armv7/ls102xa/ls102xa_serdes.c @@ -3,7 +3,7 @@ * Copyright 2014 Freescale Semiconductor, Inc. */ -#include +#include #include #include diff --git a/arch/arm/cpu/armv7/ls102xa/soc.c b/arch/arm/cpu/armv7/ls102xa/soc.c index 7ff59edd452..84d4ea3a8f4 100644 --- a/arch/arm/cpu/armv7/ls102xa/soc.c +++ b/arch/arm/cpu/armv7/ls102xa/soc.c @@ -3,7 +3,7 @@ * Copyright 2015 Freescale Semiconductor, Inc. */ -#include +#include #include #include #include diff --git a/arch/arm/cpu/armv7/ls102xa/spl.c b/arch/arm/cpu/armv7/ls102xa/spl.c index 374de92d026..a1949686235 100644 --- a/arch/arm/cpu/armv7/ls102xa/spl.c +++ b/arch/arm/cpu/armv7/ls102xa/spl.c @@ -3,6 +3,7 @@ * Copyright 2014 Freescale Semiconductor, Inc. */ +#include #include u32 spl_boot_device(void) diff --git a/arch/arm/cpu/armv7/ls102xa/timer.c b/arch/arm/cpu/armv7/ls102xa/timer.c index 6f32ced5aec..c6126b10c35 100644 --- a/arch/arm/cpu/armv7/ls102xa/timer.c +++ b/arch/arm/cpu/armv7/ls102xa/timer.c @@ -3,6 +3,7 @@ * Copyright 2014 Freescale Semiconductor, Inc. */ +#include #include #include #include diff --git a/arch/arm/cpu/armv7/mpu_v7r.c b/arch/arm/cpu/armv7/mpu_v7r.c index 2d83e4c721d..1d31c63e5fd 100644 --- a/arch/arm/cpu/armv7/mpu_v7r.c +++ b/arch/arm/cpu/armv7/mpu_v7r.c @@ -6,6 +6,7 @@ * Lokesh Vutla */ +#include #include #include #include diff --git a/arch/arm/cpu/armv7/s5p-common/cpu_info.c b/arch/arm/cpu/armv7/s5p-common/cpu_info.c index 4331dde7643..fb2920950d4 100644 --- a/arch/arm/cpu/armv7/s5p-common/cpu_info.c +++ b/arch/arm/cpu/armv7/s5p-common/cpu_info.c @@ -3,6 +3,7 @@ * Copyright (C) 2009 Samsung Electronics * Minkyu Kang */ +#include #include #include #include diff --git a/arch/arm/cpu/armv7/s5p-common/pwm.c b/arch/arm/cpu/armv7/s5p-common/pwm.c index 986b585b70e..5068327d3c5 100644 --- a/arch/arm/cpu/armv7/s5p-common/pwm.c +++ b/arch/arm/cpu/armv7/s5p-common/pwm.c @@ -5,7 +5,7 @@ * Donghwa Lee */ -#include +#include #include #include #include diff --git a/arch/arm/cpu/armv7/s5p-common/sromc.c b/arch/arm/cpu/armv7/s5p-common/sromc.c index c0035fb18eb..0fc170936ae 100644 --- a/arch/arm/cpu/armv7/s5p-common/sromc.c +++ b/arch/arm/cpu/armv7/s5p-common/sromc.c @@ -4,7 +4,7 @@ * Naveen Krishna Ch */ -#include +#include #include #include diff --git a/arch/arm/cpu/armv7/s5p-common/timer.c b/arch/arm/cpu/armv7/s5p-common/timer.c index 12994ecc843..9d981cce145 100644 --- a/arch/arm/cpu/armv7/s5p-common/timer.c +++ b/arch/arm/cpu/armv7/s5p-common/timer.c @@ -6,6 +6,7 @@ * Minkyu Kang */ +#include #include #include #include diff --git a/arch/arm/cpu/armv7/s5p4418/cpu.c b/arch/arm/cpu/armv7/s5p4418/cpu.c index 27ffb450378..8febfe52766 100644 --- a/arch/arm/cpu/armv7/s5p4418/cpu.c +++ b/arch/arm/cpu/armv7/s5p4418/cpu.c @@ -4,6 +4,7 @@ * Hyunseok, Jung */ +#include #include #include #include diff --git a/arch/arm/cpu/armv7/sunxi/psci.c b/arch/arm/cpu/armv7/sunxi/psci.c index 4c30f3294b7..5cb8cfa6cf3 100644 --- a/arch/arm/cpu/armv7/sunxi/psci.c +++ b/arch/arm/cpu/armv7/sunxi/psci.c @@ -7,6 +7,7 @@ * which was based on code by Carl van Schaik . */ #include +#include #include #include diff --git a/arch/arm/cpu/armv7/sunxi/sram.c b/arch/arm/cpu/armv7/sunxi/sram.c index bc25719c9c4..28ff6a1b7c2 100644 --- a/arch/arm/cpu/armv7/sunxi/sram.c +++ b/arch/arm/cpu/armv7/sunxi/sram.c @@ -9,6 +9,7 @@ * SRAM init for older sunxi SoCs. */ +#include #include #include #include diff --git a/arch/arm/cpu/armv7/syslib.c b/arch/arm/cpu/armv7/syslib.c index f0eda1ca98d..7e29636972d 100644 --- a/arch/arm/cpu/armv7/syslib.c +++ b/arch/arm/cpu/armv7/syslib.c @@ -7,6 +7,7 @@ * Syed Mohammed Khasim */ +#include #include /************************************************************ diff --git a/arch/arm/cpu/armv7/vf610/generic.c b/arch/arm/cpu/armv7/vf610/generic.c index e61ad7b96e9..c23ddc12b45 100644 --- a/arch/arm/cpu/armv7/vf610/generic.c +++ b/arch/arm/cpu/armv7/vf610/generic.c @@ -3,6 +3,7 @@ * Copyright 2013 Freescale Semiconductor, Inc. */ +#include #include #include #include diff --git a/arch/arm/cpu/armv7/vf610/timer.c b/arch/arm/cpu/armv7/vf610/timer.c index 7bae0b5574a..a9c1a8fcebc 100644 --- a/arch/arm/cpu/armv7/vf610/timer.c +++ b/arch/arm/cpu/armv7/vf610/timer.c @@ -3,6 +3,7 @@ * Copyright 2013 Freescale Semiconductor, Inc. */ +#include #include #include #include diff --git a/arch/arm/cpu/armv7/virt-dt.c b/arch/arm/cpu/armv7/virt-dt.c index 5dc7ed5e270..c0422485ba4 100644 --- a/arch/arm/cpu/armv7/virt-dt.c +++ b/arch/arm/cpu/armv7/virt-dt.c @@ -15,6 +15,7 @@ * along with this program. If not, see . */ +#include #include #include #include diff --git a/arch/arm/cpu/armv7/virt-v7.c b/arch/arm/cpu/armv7/virt-v7.c index 811499367d4..5ffeca13d91 100644 --- a/arch/arm/cpu/armv7/virt-v7.c +++ b/arch/arm/cpu/armv7/virt-v7.c @@ -8,6 +8,7 @@ * needed to enable ARMv7 virtualization for current hypervisors */ +#include #include #include #include diff --git a/arch/arm/cpu/armv7m/cache.c b/arch/arm/cpu/armv7m/cache.c index b6d08b7aad7..d1aecf6a85c 100644 --- a/arch/arm/cpu/armv7m/cache.c +++ b/arch/arm/cpu/armv7m/cache.c @@ -4,6 +4,7 @@ * Author(s): Vikas Manocha, for STMicroelectronics. */ +#include #include #include #include diff --git a/arch/arm/cpu/armv7m/cpu.c b/arch/arm/cpu/armv7m/cpu.c index b4440d3f3f8..65427b5312b 100644 --- a/arch/arm/cpu/armv7m/cpu.c +++ b/arch/arm/cpu/armv7m/cpu.c @@ -7,6 +7,7 @@ * Kamil Lulko, */ +#include #include #include #include diff --git a/arch/arm/cpu/armv7m/systick-timer.c b/arch/arm/cpu/armv7m/systick-timer.c index d8fa4f0c707..c30af4ff7a2 100644 --- a/arch/arm/cpu/armv7m/systick-timer.c +++ b/arch/arm/cpu/armv7m/systick-timer.c @@ -21,7 +21,7 @@ * using CFG_SYS_HZ_CLOCK. */ -#include +#include #include #include #include diff --git a/arch/arm/cpu/armv8/cache_v8.c b/arch/arm/cpu/armv8/cache_v8.c index d4c64f2d60d..57d06f0575d 100644 --- a/arch/arm/cpu/armv8/cache_v8.c +++ b/arch/arm/cpu/armv8/cache_v8.c @@ -7,6 +7,7 @@ * Alexander Graf */ +#include #include #include #include diff --git a/arch/arm/cpu/armv8/cpu-dt.c b/arch/arm/cpu/armv8/cpu-dt.c index 97667e607a8..9bfe3815e51 100644 --- a/arch/arm/cpu/armv8/cpu-dt.c +++ b/arch/arm/cpu/armv8/cpu-dt.c @@ -3,6 +3,7 @@ * Copyright 2016 NXP Semiconductor, Inc. */ +#include #include #include #include diff --git a/arch/arm/cpu/armv8/cpu.c b/arch/arm/cpu/armv8/cpu.c index d568efa427a..3c7f36ad8d8 100644 --- a/arch/arm/cpu/armv8/cpu.c +++ b/arch/arm/cpu/armv8/cpu.c @@ -10,6 +10,7 @@ * Gary Jennejohn, DENX Software Engineering, */ +#include #include #include #include diff --git a/arch/arm/cpu/armv8/exception_level.c b/arch/arm/cpu/armv8/exception_level.c index 85c78f55789..b11936548fb 100644 --- a/arch/arm/cpu/armv8/exception_level.c +++ b/arch/arm/cpu/armv8/exception_level.c @@ -8,6 +8,7 @@ * level before booting an operating system. */ +#include #include #include #include diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c index d2dbfdd08a0..12d31184ad9 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c @@ -4,7 +4,7 @@ * Copyright 2014-2015 Freescale Semiconductor, Inc. */ -#include +#include #include #include #include diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c index ca6be3626fb..22ce6992165 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c @@ -4,7 +4,7 @@ * Copyright 2020-2021 NXP */ -#include +#include #include #include #include diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_serdes.c b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_serdes.c index 78961d8089e..b1bb29bcaf5 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_serdes.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_serdes.c @@ -3,12 +3,11 @@ * Copyright 2015 Freescale Semiconductor, Inc. */ -#include +#include #include #include #include #include -#include #include #include diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c index 9a24d4b3031..4455eb1726d 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c @@ -4,7 +4,7 @@ * Copyright 2019 NXP. */ -#include +#include #include #include #include diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c index b768790437f..fbd5fd7d433 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c @@ -4,7 +4,7 @@ * Copyright 2014-2015 Freescale Semiconductor, Inc. */ -#include +#include #include #include #include diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_speed.c b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_speed.c index 452246e0e67..137778dc136 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_speed.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_speed.c @@ -6,7 +6,7 @@ * Derived from arch/power/cpu/mpc85xx/speed.c */ -#include +#include #include #include #include diff --git a/arch/arm/cpu/armv8/fsl-layerscape/icid.c b/arch/arm/cpu/armv8/fsl-layerscape/icid.c index 04ffefafbf7..c22e73253c3 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/icid.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/icid.c @@ -3,7 +3,7 @@ * Copyright 2018 NXP */ -#include +#include #include #include diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ls1012a_serdes.c b/arch/arm/cpu/armv8/fsl-layerscape/ls1012a_serdes.c index c0e5455507a..8d7beca7db3 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/ls1012a_serdes.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/ls1012a_serdes.c @@ -3,7 +3,7 @@ * Copyright 2016 Freescale Semiconductor, Inc. */ -#include +#include #include #include diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ls1028_ids.c b/arch/arm/cpu/armv8/fsl-layerscape/ls1028_ids.c index d48baa63816..86a49b152e4 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/ls1028_ids.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/ls1028_ids.c @@ -3,9 +3,9 @@ * Copyright 2019 NXP */ +#include #include #include -#include #include #include #include diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ls1028a_serdes.c b/arch/arm/cpu/armv8/fsl-layerscape/ls1028a_serdes.c index 1b4eab3613e..80d2910f679 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/ls1028a_serdes.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/ls1028a_serdes.c @@ -3,8 +3,7 @@ * Copyright 2019 NXP */ -#include -#include +#include #include struct serdes_config { diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ls1043_ids.c b/arch/arm/cpu/armv8/fsl-layerscape/ls1043_ids.c index ec80e42055d..e3c3fc6bfb5 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/ls1043_ids.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/ls1043_ids.c @@ -3,12 +3,11 @@ * Copyright 2018 NXP */ -#include +#include #include #include #include #include -#include #ifdef CONFIG_SYS_DPAA_QBMAN struct qportal_info qp_info[CFG_SYS_QMAN_NUM_PORTALS] = { diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ls1043a_serdes.c b/arch/arm/cpu/armv8/fsl-layerscape/ls1043a_serdes.c index 1911ca1a175..6c5e52ebaa6 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/ls1043a_serdes.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/ls1043a_serdes.c @@ -3,7 +3,7 @@ * Copyright 2015 Freescale Semiconductor, Inc. */ -#include +#include #include #include diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ls1046_ids.c b/arch/arm/cpu/armv8/fsl-layerscape/ls1046_ids.c index a73dd316f8d..333d7e2fa21 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/ls1046_ids.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/ls1046_ids.c @@ -3,11 +3,10 @@ * Copyright 2018 NXP */ -#include +#include #include #include #include -#include #ifdef CONFIG_SYS_DPAA_QBMAN struct qportal_info qp_info[CFG_SYS_QMAN_NUM_PORTALS] = { diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ls1046a_serdes.c b/arch/arm/cpu/armv8/fsl-layerscape/ls1046a_serdes.c index 26ca4ca10f3..9347e516bf6 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/ls1046a_serdes.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/ls1046a_serdes.c @@ -4,7 +4,7 @@ * Copyright 2019 NXP */ -#include +#include #include #include diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ls1088_ids.c b/arch/arm/cpu/armv8/fsl-layerscape/ls1088_ids.c index 3a076ca04f6..23743ae10cf 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/ls1088_ids.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/ls1088_ids.c @@ -3,11 +3,10 @@ * Copyright 2019 NXP */ -#include +#include #include #include #include -#include struct icid_id_table icid_tbl[] = { SET_SDHC_ICID(1, FSL_SDMMC_STREAM_ID), diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ls1088a_serdes.c b/arch/arm/cpu/armv8/fsl-layerscape/ls1088a_serdes.c index 154b727392e..fe667f06c39 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/ls1088a_serdes.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/ls1088a_serdes.c @@ -3,7 +3,7 @@ * Copyright 2017-2019 NXP */ -#include +#include #include #include #include diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ls2080a_serdes.c b/arch/arm/cpu/armv8/fsl-layerscape/ls2080a_serdes.c index 5088c8ebb7f..7997422840f 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/ls2080a_serdes.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/ls2080a_serdes.c @@ -3,7 +3,7 @@ * Copyright 2014-2015 Freescale Semiconductor, Inc. */ -#include +#include #include struct serdes_config { diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ls2088_ids.c b/arch/arm/cpu/armv8/fsl-layerscape/ls2088_ids.c index c320e835c99..e6403b79526 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/ls2088_ids.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/ls2088_ids.c @@ -3,11 +3,10 @@ * Copyright 2019 NXP */ -#include +#include #include #include #include -#include struct icid_id_table icid_tbl[] = { SET_SDHC_ICID(1, FSL_SDMMC_STREAM_ID), diff --git a/arch/arm/cpu/armv8/fsl-layerscape/lx2160_ids.c b/arch/arm/cpu/armv8/fsl-layerscape/lx2160_ids.c index df9329df77e..3a0ed1fa550 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/lx2160_ids.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/lx2160_ids.c @@ -3,11 +3,10 @@ * Copyright 2019 NXP */ -#include +#include #include #include #include -#include struct icid_id_table icid_tbl[] = { SET_SDHC_ICID(1, FSL_SDMMC_STREAM_ID), diff --git a/arch/arm/cpu/armv8/fsl-layerscape/lx2160a_serdes.c b/arch/arm/cpu/armv8/fsl-layerscape/lx2160a_serdes.c index 43f0e8c87ba..5941d90e036 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/lx2160a_serdes.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/lx2160a_serdes.c @@ -3,7 +3,7 @@ * Copyright 2018, 2020 NXP */ -#include +#include #include struct serdes_config { diff --git a/arch/arm/cpu/armv8/fsl-layerscape/mp.c b/arch/arm/cpu/armv8/fsl-layerscape/mp.c index db913208b9e..ce0c46ad0d4 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/mp.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/mp.c @@ -3,7 +3,7 @@ * Copyright 2014-2015 Freescale Semiconductor, Inc. */ -#include +#include #include #include #include diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c b/arch/arm/cpu/armv8/fsl-layerscape/soc.c index d85a630f8a3..4c61d28c20f 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c @@ -4,7 +4,7 @@ * Copyright 2019-2021 NXP */ -#include +#include #include #include #include diff --git a/arch/arm/cpu/armv8/fsl-layerscape/spl.c b/arch/arm/cpu/armv8/fsl-layerscape/spl.c index a739ff2da58..232adfa843a 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/spl.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/spl.c @@ -3,7 +3,7 @@ * Copyright 2014-2015 Freescale Semiconductor, Inc. */ -#include +#include #include #include #include diff --git a/arch/arm/cpu/armv8/generic_timer.c b/arch/arm/cpu/armv8/generic_timer.c index e4aa5a47455..8f83372cbca 100644 --- a/arch/arm/cpu/armv8/generic_timer.c +++ b/arch/arm/cpu/armv8/generic_timer.c @@ -4,6 +4,7 @@ * David Feng */ +#include #include #include #include diff --git a/arch/arm/cpu/armv8/hisilicon/pinmux.c b/arch/arm/cpu/armv8/hisilicon/pinmux.c index d7a5a792610..e14057c0a47 100644 --- a/arch/arm/cpu/armv8/hisilicon/pinmux.c +++ b/arch/arm/cpu/armv8/hisilicon/pinmux.c @@ -4,6 +4,7 @@ * Peter Griffin */ +#include #include #include #include diff --git a/arch/arm/cpu/armv8/sec_firmware.c b/arch/arm/cpu/armv8/sec_firmware.c index 44372cbe4a1..c0e8726346f 100644 --- a/arch/arm/cpu/armv8/sec_firmware.c +++ b/arch/arm/cpu/armv8/sec_firmware.c @@ -3,7 +3,7 @@ * Copyright 2016 NXP Semiconductor, Inc. */ -#include +#include #include #include #include diff --git a/arch/arm/cpu/armv8/sha1_ce_glue.c b/arch/arm/cpu/armv8/sha1_ce_glue.c index c88b4dc66e1..780b119a90b 100644 --- a/arch/arm/cpu/armv8/sha1_ce_glue.c +++ b/arch/arm/cpu/armv8/sha1_ce_glue.c @@ -5,6 +5,7 @@ * Copyright (C) 2022 Linaro Ltd */ +#include #include extern void sha1_armv8_ce_process(uint32_t state[5], uint8_t const *src, diff --git a/arch/arm/cpu/armv8/sha256_ce_glue.c b/arch/arm/cpu/armv8/sha256_ce_glue.c index d5d2b4f4ac7..67dd796c122 100644 --- a/arch/arm/cpu/armv8/sha256_ce_glue.c +++ b/arch/arm/cpu/armv8/sha256_ce_glue.c @@ -5,6 +5,7 @@ * Copyright (C) 2022 Linaro Ltd */ +#include #include extern void sha256_armv8_ce_process(uint32_t state[8], uint8_t const *src, diff --git a/arch/arm/cpu/armv8/spin_table.c b/arch/arm/cpu/armv8/spin_table.c index 485294b88d0..42a0962fdcd 100644 --- a/arch/arm/cpu/armv8/spin_table.c +++ b/arch/arm/cpu/armv8/spin_table.c @@ -4,6 +4,7 @@ * Author: Masahiro Yamada */ +#include #include #include diff --git a/arch/arm/cpu/armv8/spl_data.c b/arch/arm/cpu/armv8/spl_data.c index 259b49ff364..8f1231c86eb 100644 --- a/arch/arm/cpu/armv8/spl_data.c +++ b/arch/arm/cpu/armv8/spl_data.c @@ -3,6 +3,7 @@ * Copyright 2020 NXP */ +#include #include char __data_save_start[0] __section(".__data_save_start"); diff --git a/arch/arm/dts/k3-am62-main.dtsi b/arch/arm/dts/k3-am62-main.dtsi index e9cffca073e..e5c64c86d1d 100644 --- a/arch/arm/dts/k3-am62-main.dtsi +++ b/arch/arm/dts/k3-am62-main.dtsi @@ -1,8 +1,8 @@ -// SPDX-License-Identifier: GPL-2.0-only OR MIT +// SPDX-License-Identifier: GPL-2.0 /* * Device Tree Source for AM625 SoC Family Main Domain peripherals * - * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/ + * Copyright (C) 2020-2022 Texas Instruments Incorporated - https://www.ti.com/ */ &cbass_main { @@ -42,8 +42,9 @@ }; }; - main_conf: bus@100000 { - compatible = "simple-bus"; + main_conf: syscon@100000 { + compatible = "syscon", "simple-mfd"; + reg = <0x00 0x00100000 0x00 0x20000>; #address-cells = <1>; #size-cells = <1>; ranges = <0x0 0x00 0x00100000 0x20000>; @@ -120,13 +121,8 @@ <0x00 0x4c000000 0x00 0x20000>, <0x00 0x4a820000 0x00 0x20000>, <0x00 0x4aa40000 0x00 0x20000>, - <0x00 0x4bc00000 0x00 0x100000>, - <0x00 0x48600000 0x00 0x8000>, - <0x00 0x484a4000 0x00 0x2000>, - <0x00 0x484c2000 0x00 0x2000>, - <0x00 0x48420000 0x00 0x2000>; - reg-names = "gcfg", "bchanrt", "rchanrt", "tchanrt", "ringrt", - "ring", "tchan", "rchan", "bchan"; + <0x00 0x4bc00000 0x00 0x100000>; + reg-names = "gcfg", "bchanrt", "rchanrt", "tchanrt", "ringrt"; msi-parent = <&inta_main_dmss>; #dma-cells = <3>; @@ -142,13 +138,8 @@ reg = <0x00 0x485c0000 0x00 0x100>, <0x00 0x4a800000 0x00 0x20000>, <0x00 0x4aa00000 0x00 0x40000>, - <0x00 0x4b800000 0x00 0x400000>, - <0x00 0x485e0000 0x00 0x10000>, - <0x00 0x484a0000 0x00 0x2000>, - <0x00 0x484c0000 0x00 0x2000>, - <0x00 0x48430000 0x00 0x1000>; - reg-names = "gcfg", "rchanrt", "tchanrt", "ringrt", - "ring", "tchan", "rchan", "rflow"; + <0x00 0x4b800000 0x00 0x400000>; + reg-names = "gcfg", "rchanrt", "tchanrt", "ringrt"; msi-parent = <&inta_main_dmss>; #dma-cells = <2>; @@ -511,9 +502,6 @@ main_gpio0: gpio@600000 { compatible = "ti,am64-gpio", "ti,keystone-gpio"; reg = <0x0 0x00600000 0x0 0x100>; - gpio-ranges = <&main_pmx0 0 0 32>, - <&main_pmx0 32 33 38>, - <&main_pmx0 70 72 22>; gpio-controller; #gpio-cells = <2>; interrupt-parent = <&main_gpio_intr>; @@ -532,10 +520,6 @@ compatible = "ti,am64-gpio", "ti,keystone-gpio"; reg = <0x0 0x00601000 0x0 0x100>; gpio-controller; - gpio-ranges = <&main_pmx0 0 94 41>, - <&main_pmx0 41 136 6>, - <&main_pmx0 47 143 3>, - <&main_pmx0 50 149 2>; #gpio-cells = <2>; interrupt-parent = <&main_gpio_intr>; interrupts = <180>, <181>, <182>, @@ -558,9 +542,10 @@ clock-names = "clk_ahb", "clk_xin"; assigned-clocks = <&k3_clks 57 6>; assigned-clock-parents = <&k3_clks 57 8>; - bus-width = <8>; mmc-ddr-1_8v; mmc-hs200-1_8v; + ti,trm-icp = <0x2>; + bus-width = <8>; ti,clkbuf-sel = <0x7>; ti,otap-del-sel-legacy = <0x0>; ti,otap-del-sel-mmc-hs = <0x0>; @@ -578,8 +563,7 @@ power-domains = <&k3_pds 58 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 58 5>, <&k3_clks 58 6>; clock-names = "clk_ahb", "clk_xin"; - bus-width = <4>; - ti,clkbuf-sel = <0x7>; + ti,trm-icp = <0x2>; ti,otap-del-sel-legacy = <0x8>; ti,otap-del-sel-sd-hs = <0x0>; ti,otap-del-sel-sdr12 = <0x0>; @@ -591,6 +575,8 @@ ti,itap-del-sel-sd-hs = <0x1>; ti,itap-del-sel-sdr12 = <0xa>; ti,itap-del-sel-sdr25 = <0x1>; + ti,clkbuf-sel = <0x7>; + bus-width = <4>; status = "disabled"; }; @@ -601,8 +587,7 @@ power-domains = <&k3_pds 184 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 184 5>, <&k3_clks 184 6>; clock-names = "clk_ahb", "clk_xin"; - bus-width = <4>; - ti,clkbuf-sel = <0x7>; + ti,trm-icp = <0x2>; ti,otap-del-sel-legacy = <0x8>; ti,otap-del-sel-sd-hs = <0x0>; ti,otap-del-sel-sdr12 = <0x0>; @@ -614,6 +599,7 @@ ti,itap-del-sel-sd-hs = <0xa>; ti,itap-del-sel-sdr12 = <0xa>; ti,itap-del-sel-sdr25 = <0x1>; + ti,clkbuf-sel = <0x7>; status = "disabled"; }; @@ -637,8 +623,6 @@ interrupt-names = "host", "peripheral"; maximum-speed = "high-speed"; dr_mode = "otg"; - snps,usb2-gadget-lpm-disable; - snps,usb2-lpm-disable; }; }; @@ -662,8 +646,6 @@ interrupt-names = "host", "peripheral"; maximum-speed = "high-speed"; dr_mode = "otg"; - snps,usb2-gadget-lpm-disable; - snps,usb2-lpm-disable; }; }; @@ -693,15 +675,6 @@ }; }; - gpu: gpu@fd00000 { - compatible = "ti,am62-gpu", "img,img-axe"; - reg = <0x00 0x0fd00000 0x00 0x20000>; - clocks = <&k3_clks 187 0>; - clock-names = "core"; - interrupts = ; - power-domains = <&k3_pds 187 TI_SCI_PD_EXCLUSIVE>; - }; - cpsw3g: ethernet@8000000 { compatible = "ti,am642-cpsw-nuss"; #address-cells = <2>; @@ -780,10 +753,9 @@ <0x00 0x30207000 0x00 0x1000>, /* ovr1 */ <0x00 0x30208000 0x00 0x1000>, /* ovr2 */ <0x00 0x3020a000 0x00 0x1000>, /* vp1: Used for OLDI */ - <0x00 0x3020b000 0x00 0x1000>, /* vp2: Used as DPI Out */ - <0x00 0x30201000 0x00 0x1000>; /* common1 */ + <0x00 0x3020b000 0x00 0x1000>; /* vp2: Used as DPI Out */ reg-names = "common", "vidl1", "vid", - "ovr1", "ovr2", "vp1", "vp2", "common1"; + "ovr1", "ovr2", "vp1", "vp2"; power-domains = <&k3_pds 186 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 186 6>, <&dss_vp1_clk>, @@ -993,66 +965,4 @@ power-domains = <&k3_pds 192 TI_SCI_PD_EXCLUSIVE>; status = "disabled"; }; - - ti_csi2rx0: ticsi2rx@30102000 { - compatible = "ti,j721e-csi2rx-shim"; - dmas = <&main_bcdma 0 0x4700 0>; - dma-names = "rx0"; - reg = <0x00 0x30102000 0x00 0x1000>; - power-domains = <&k3_pds 182 TI_SCI_PD_EXCLUSIVE>; - #address-cells = <2>; - #size-cells = <2>; - ranges; - status = "disabled"; - - cdns_csi2rx0: csi-bridge@30101000 { - compatible = "ti,j721e-csi2rx", "cdns,csi2rx"; - reg = <0x00 0x30101000 0x00 0x1000>; - clocks = <&k3_clks 182 0>, <&k3_clks 182 3>, <&k3_clks 182 0>, - <&k3_clks 182 0>, <&k3_clks 182 4>, <&k3_clks 182 4>; - clock-names = "sys_clk", "p_clk", "pixel_if0_clk", - "pixel_if1_clk", "pixel_if2_clk", "pixel_if3_clk"; - phys = <&dphy0>; - phy-names = "dphy"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - csi0_port0: port@0 { - reg = <0>; - status = "disabled"; - }; - - csi0_port1: port@1 { - reg = <1>; - status = "disabled"; - }; - - csi0_port2: port@2 { - reg = <2>; - status = "disabled"; - }; - - csi0_port3: port@3 { - reg = <3>; - status = "disabled"; - }; - - csi0_port4: port@4 { - reg = <4>; - status = "disabled"; - }; - }; - }; - }; - - dphy0: phy@30110000 { - compatible = "cdns,dphy-rx"; - reg = <0x00 0x30110000 0x00 0x1100>; - #phy-cells = <0>; - power-domains = <&k3_pds 185 TI_SCI_PD_EXCLUSIVE>; - status = "disabled"; - }; - }; diff --git a/arch/arm/dts/k3-am62-mcu.dtsi b/arch/arm/dts/k3-am62-mcu.dtsi index e66d486ef1f..0e0b234581c 100644 --- a/arch/arm/dts/k3-am62-mcu.dtsi +++ b/arch/arm/dts/k3-am62-mcu.dtsi @@ -1,8 +1,8 @@ -// SPDX-License-Identifier: GPL-2.0-only OR MIT +// SPDX-License-Identifier: GPL-2.0 /* * Device Tree Source for AM625 SoC Family MCU Domain peripherals * - * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/ + * Copyright (C) 2020-2022 Texas Instruments Incorporated - https://www.ti.com/ */ &cbass_mcu { diff --git a/arch/arm/dts/k3-am62-thermal.dtsi b/arch/arm/dts/k3-am62-thermal.dtsi index 12ba833002a..a358757e26f 100644 --- a/arch/arm/dts/k3-am62-thermal.dtsi +++ b/arch/arm/dts/k3-am62-thermal.dtsi @@ -1,7 +1,4 @@ -// SPDX-License-Identifier: GPL-2.0-only OR MIT -/* - * Copyright (C) 2023-2024 Texas Instruments Incorporated - https://www.ti.com/ - */ +// SPDX-License-Identifier: GPL-2.0 #include diff --git a/arch/arm/dts/k3-am62-wakeup.dtsi b/arch/arm/dts/k3-am62-wakeup.dtsi index 23ce1bfda8d..fef76f52a52 100644 --- a/arch/arm/dts/k3-am62-wakeup.dtsi +++ b/arch/arm/dts/k3-am62-wakeup.dtsi @@ -1,12 +1,10 @@ -// SPDX-License-Identifier: GPL-2.0-only OR MIT +// SPDX-License-Identifier: GPL-2.0 /* * Device Tree Source for AM625 SoC Family Wakeup Domain peripherals * - * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/ + * Copyright (C) 2020-2022 Texas Instruments Incorporated - https://www.ti.com/ */ -#include - &cbass_wakeup { wkup_conf: syscon@43000000 { bootph-all; @@ -23,34 +21,14 @@ }; }; - target-module@2b300050 { - compatible = "ti,sysc-omap2", "ti,sysc"; - reg = <0x00 0x2b300050 0x00 0x4>, - <0x00 0x2b300054 0x00 0x4>, - <0x00 0x2b300058 0x00 0x4>; - reg-names = "rev", "sysc", "syss"; - ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP | - SYSC_OMAP2_SOFTRESET | - SYSC_OMAP2_AUTOIDLE)>; - ti,sysc-sidle = , - , - , - ; - ti,syss-mask = <1>; - ti,no-reset-on-init; + wkup_uart0: serial@2b300000 { + compatible = "ti,am64-uart", "ti,am654-uart"; + reg = <0x00 0x2b300000 0x00 0x100>; + interrupts = ; power-domains = <&k3_pds 114 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 114 0>; - clock-names = "fck"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x0 0x00 0x2b300000 0x100000>; - - wkup_uart0: serial@0 { - compatible = "ti,am64-uart", "ti,am654-uart"; - reg = <0x0 0x100>; - interrupts = ; - status = "disabled"; - }; + clock-names = "fclk"; + status = "disabled"; }; wkup_i2c0: i2c@2b200000 { diff --git a/arch/arm/dts/k3-am62.dtsi b/arch/arm/dts/k3-am62.dtsi index f0781f2bea2..f1e15206e1c 100644 --- a/arch/arm/dts/k3-am62.dtsi +++ b/arch/arm/dts/k3-am62.dtsi @@ -1,8 +1,8 @@ -// SPDX-License-Identifier: GPL-2.0-only OR MIT +// SPDX-License-Identifier: GPL-2.0 /* * Device Tree Source for AM62 SoC Family * - * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/ + * Copyright (C) 2020-2022 Texas Instruments Incorporated - https://www.ti.com/ */ #include diff --git a/arch/arm/dts/k3-am625-beagleplay-u-boot.dtsi b/arch/arm/dts/k3-am625-beagleplay-u-boot.dtsi index 54a7702037d..fb2032068d1 100644 --- a/arch/arm/dts/k3-am625-beagleplay-u-boot.dtsi +++ b/arch/arm/dts/k3-am625-beagleplay-u-boot.dtsi @@ -206,66 +206,3 @@ }; }; #endif - -&main_bcdma { - reg = <0x00 0x485c0100 0x00 0x100>, - <0x00 0x4c000000 0x00 0x20000>, - <0x00 0x4a820000 0x00 0x20000>, - <0x00 0x4aa40000 0x00 0x20000>, - <0x00 0x4bc00000 0x00 0x100000>, - <0x00 0x48600000 0x00 0x8000>, - <0x00 0x484a4000 0x00 0x2000>, - <0x00 0x484c2000 0x00 0x2000>; - reg-names = "gcfg", "bchanrt", "rchanrt", "tchanrt", "ringrt", - "cfg", "tchan", "rchan"; -}; - -&main_pktdma { - reg = <0x00 0x485c0000 0x00 0x100>, - <0x00 0x4a800000 0x00 0x20000>, - <0x00 0x4aa00000 0x00 0x40000>, - <0x00 0x4b800000 0x00 0x400000>, - <0x00 0x485e0000 0x00 0x20000>, - <0x00 0x484a0000 0x00 0x4000>, - <0x00 0x484c0000 0x00 0x2000>, - <0x00 0x48430000 0x00 0x4000>; - reg-names = "gcfg", "rchanrt", "tchanrt", "ringrt", "cfg", - "tchan", "rchan", "rflow"; - bootph-all; -}; - -&mdio0_pins_default { - bootph-all; -}; - -&cpsw3g_mdio { - bootph-all; -}; - -&cpsw3g_phy0 { - bootph-all; -}; - -&rgmii1_pins_default { - bootph-all; -}; - -&cpsw3g { - bootph-all; - - ethernet-ports { - bootph-all; - }; -}; - -&phy_gmii_sel { - bootph-all; -}; - -&cpsw_port1 { - bootph-all; -}; - -&cpsw_port2 { - status = "disabled"; -}; diff --git a/arch/arm/dts/k3-am625-beagleplay.dts b/arch/arm/dts/k3-am625-beagleplay.dts index 8ab838f1697..9a6bd0a3c94 100644 --- a/arch/arm/dts/k3-am625-beagleplay.dts +++ b/arch/arm/dts/k3-am625-beagleplay.dts @@ -1,9 +1,9 @@ -// SPDX-License-Identifier: GPL-2.0-only OR MIT +// SPDX-License-Identifier: GPL-2.0 /* * https://beagleplay.org/ * - * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/ - * Copyright (C) 2022-2024 Robert Nelson, BeagleBoard.org Foundation + * Copyright (C) 2022-2023 Texas Instruments Incorporated - https://www.ti.com/ + * Copyright (C) 2022-2023 Robert Nelson, BeagleBoard.org Foundation */ /dts-v1/; @@ -29,6 +29,7 @@ i2c3 = &main_i2c3; i2c4 = &wkup_i2c0; i2c5 = &mcu_i2c0; + mdio-gpio0 = &mdio0; mmc0 = &sdhci0; mmc1 = &sdhci1; mmc2 = &sdhci2; @@ -230,6 +231,27 @@ }; }; + /* Workaround for errata i2329 - just use mdio bitbang */ + mdio0: mdio { + compatible = "virtual,mdio-gpio"; + pinctrl-names = "default"; + pinctrl-0 = <&mdio0_pins_default>; + gpios = <&main_gpio0 86 GPIO_ACTIVE_HIGH>, /* MDC */ + <&main_gpio0 85 GPIO_ACTIVE_HIGH>; /* MDIO */ + #address-cells = <1>; + #size-cells = <0>; + + cpsw3g_phy0: ethernet-phy@0 { + reg = <0>; + }; + + cpsw3g_phy1: ethernet-phy@1 { + reg = <1>; + reset-gpios = <&main_gpio1 5 GPIO_ACTIVE_LOW>; + reset-assert-us = <25>; + reset-deassert-us = <60000>; /* T2 */ + }; + }; }; &main_pmx0 { @@ -290,10 +312,8 @@ mdio0_pins_default: mdio0-default-pins { pinctrl-single,pins = < - AM62X_IOPAD(0x0160, PIN_OUTPUT, 0) /* (AD24) MDIO0_MDC */ - AM62X_IOPAD(0x015c, PIN_INPUT, 0) /* (AB22) MDIO0_MDIO */ - AM62X_IOPAD(0x003c, PIN_INPUT, 7) /* (M25) GPMC0_AD0.GPIO0_15 */ - AM62X_IOPAD(0x018c, PIN_INPUT, 7) /* (AC21) RGMII2_RD2.GPIO1_5 */ + AM62X_IOPAD(0x0160, PIN_OUTPUT, 7) /* (AD24) MDIO0_MDC.GPIO0_86 */ + AM62X_IOPAD(0x015c, PIN_INPUT, 7) /* (AB22) MDIO0_MDIO.GPIO0_85 */ >; }; @@ -385,6 +405,7 @@ AM62X_IOPAD(0x016c, PIN_INPUT, 1) /* (Y18) RGMII2_TD0.RMII2_TXD0 */ AM62X_IOPAD(0x0170, PIN_INPUT, 1) /* (AA18) RGMII2_TD1.RMII2_TXD1 */ AM62X_IOPAD(0x0164, PIN_INPUT, 1) /* (AA19) RGMII2_TX_CTL.RMII2_TX_EN */ + AM62X_IOPAD(0x018c, PIN_OUTPUT, 7) /* (AC21) RGMII2_RD2.GPIO1_5 */ AM62X_IOPAD(0x0190, PIN_INPUT, 7) /* (AE22) RGMII2_RD3.GPIO1_6 */ AM62X_IOPAD(0x01f0, PIN_OUTPUT, 5) /* (A18) EXT_REFCLK1.CLKOUT0 */ >; @@ -422,7 +443,7 @@ >; }; - main_uart0_pins_default: main-uart0-default-pins { + console_pins_default: console-default-pins { bootph-all; pinctrl-single,pins = < AM62X_IOPAD(0x01c8, PIN_INPUT, 0) /* (D14) UART0_RXD */ @@ -552,13 +573,11 @@ }; &usbss0 { - bootph-all; ti,vbus-divider; status = "okay"; }; &usb0 { - bootph-all; dr_mode = "peripheral"; }; @@ -592,23 +611,8 @@ }; &cpsw3g_mdio { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&mdio0_pins_default>; - - cpsw3g_phy0: ethernet-phy@0 { - reg = <0>; - reset-gpios = <&main_gpio0 15 GPIO_ACTIVE_LOW>; - reset-assert-us = <10000>; - reset-deassert-us = <50000>; - }; - - cpsw3g_phy1: ethernet-phy@1 { - reg = <1>; - reset-gpios = <&main_gpio1 5 GPIO_ACTIVE_LOW>; - reset-assert-us = <25>; - reset-deassert-us = <60000>; /* T2 */ - }; + /* Workaround for errata i2329 - Use mdio bitbang */ + status = "disabled"; }; &main_gpio0 { @@ -619,7 +623,7 @@ "USR0", "USR1", "USR2", "USR3", "", "", "USR4", /* 3-9 */ "EEPROM_WP", /* 10 */ "CSI2_CAMERA_GPIO1", "CSI2_CAMERA_GPIO2", /* 11-12 */ - "CC1352P7_BOOT", "CC1352P7_RSTN", "GBE_RSTN", "", "", /* 13-17 */ + "CC1352P7_BOOT", "CC1352P7_RSTN", "", "", "", /* 13-17 */ "USR_BUTTON", "", "", "", "", "", "", "", "", /* 18-26 */ "", "", "", "", "", "", "", "", "", "HDMI_INT", /* 27-36 */ "", "VDD_WLAN_EN", "", "", "WL_IRQ", "GBE_INTN",/* 37-42 */ @@ -823,6 +827,7 @@ bootph-all; pinctrl-names = "default"; pinctrl-0 = <&emmc_pins_default>; + ti,driver-strength-ohm = <50>; disable-wp; status = "okay"; }; @@ -835,6 +840,7 @@ vmmc-supply = <&vdd_3v3_sd>; vqmmc-supply = <&vdd_sd_dv>; + ti,driver-strength-ohm = <50>; disable-wp; cd-gpios = <&main_gpio1 48 GPIO_ACTIVE_LOW>; cd-debounce-delay-ms = <100>; @@ -846,10 +852,12 @@ vmmc-supply = <&wlan_en>; pinctrl-names = "default"; pinctrl-0 = <&wifi_pins_default>, <&wifi_32k_clk>; + bus-width = <4>; non-removable; ti,fails-without-test-cd; cap-power-off-card; keep-power-in-suspend; + ti,driver-strength-ohm = <50>; assigned-clocks = <&k3_clks 157 158>; assigned-clock-parents = <&k3_clks 157 160>; #address-cells = <1>; @@ -869,7 +877,7 @@ &main_uart0 { bootph-all; pinctrl-names = "default"; - pinctrl-0 = <&main_uart0_pins_default>; + pinctrl-0 = <&console_pins_default>; status = "okay"; }; diff --git a/arch/arm/dts/k3-am625-sk.dts b/arch/arm/dts/k3-am625-sk.dts index ae81ebb39d0..b18092497c9 100644 --- a/arch/arm/dts/k3-am625-sk.dts +++ b/arch/arm/dts/k3-am625-sk.dts @@ -1,8 +1,8 @@ -// SPDX-License-Identifier: GPL-2.0-only OR MIT +// SPDX-License-Identifier: GPL-2.0 /* * AM625 SK: https://www.ti.com/lit/zip/sprr448 * - * Copyright (C) 2021-2024 Texas Instruments Incorporated - https://www.ti.com/ + * Copyright (C) 2021-2022 Texas Instruments Incorporated - https://www.ti.com/ */ /dts-v1/; diff --git a/arch/arm/dts/k3-am625.dtsi b/arch/arm/dts/k3-am625.dtsi index 4014add6320..4193c2b3eed 100644 --- a/arch/arm/dts/k3-am625.dtsi +++ b/arch/arm/dts/k3-am625.dtsi @@ -1,10 +1,10 @@ -// SPDX-License-Identifier: GPL-2.0-only OR MIT +// SPDX-License-Identifier: GPL-2.0 /* * Device Tree Source for AM625 SoC family in Quad core configuration * * TRM: https://www.ti.com/lit/pdf/spruiv7 * - * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/ + * Copyright (C) 2020-2022 Texas Instruments Incorporated - https://www.ti.com/ */ /dts-v1/; diff --git a/arch/arm/dts/k3-am62a-main.dtsi b/arch/arm/dts/k3-am62a-main.dtsi index aa1e057082f..4ae7fdc5221 100644 --- a/arch/arm/dts/k3-am62a-main.dtsi +++ b/arch/arm/dts/k3-am62a-main.dtsi @@ -1,8 +1,8 @@ -// SPDX-License-Identifier: GPL-2.0-only OR MIT +// SPDX-License-Identifier: GPL-2.0 /* * Device Tree Source for AM62A SoC Family Main Domain peripherals * - * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/ + * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/ */ &cbass_main { @@ -42,8 +42,9 @@ }; }; - main_conf: bus@100000 { - compatible = "simple-bus"; + main_conf: syscon@100000 { + compatible = "ti,j721e-system-controller", "syscon", "simple-mfd"; + reg = <0x00 0x00100000 0x00 0x20000>; #address-cells = <1>; #size-cells = <1>; ranges = <0x00 0x00 0x00100000 0x20000>; @@ -100,13 +101,8 @@ <0x00 0x4c000000 0x00 0x20000>, <0x00 0x4a820000 0x00 0x20000>, <0x00 0x4aa40000 0x00 0x20000>, - <0x00 0x4bc00000 0x00 0x100000>, - <0x00 0x48600000 0x00 0x8000>, - <0x00 0x484a4000 0x00 0x2000>, - <0x00 0x484c2000 0x00 0x2000>, - <0x00 0x48420000 0x00 0x2000>; - reg-names = "gcfg", "bchanrt", "rchanrt", "tchanrt", "ringrt", - "ring", "tchan", "rchan", "bchan"; + <0x00 0x4bc00000 0x00 0x100000>; + reg-names = "gcfg", "bchanrt", "rchanrt", "tchanrt", "ringrt"; msi-parent = <&inta_main_dmss>; #dma-cells = <3>; ti,sci = <&dmsc>; @@ -121,13 +117,8 @@ reg = <0x00 0x485c0000 0x00 0x100>, <0x00 0x4a800000 0x00 0x20000>, <0x00 0x4aa00000 0x00 0x40000>, - <0x00 0x4b800000 0x00 0x400000>, - <0x00 0x485e0000 0x00 0x10000>, - <0x00 0x484a0000 0x00 0x2000>, - <0x00 0x484c0000 0x00 0x2000>, - <0x00 0x48430000 0x00 0x1000>; - reg-names = "gcfg", "rchanrt", "tchanrt", "ringrt", - "ring", "tchan", "rchan", "rflow"; + <0x00 0x4b800000 0x00 0x400000>; + reg-names = "gcfg", "rchanrt", "tchanrt", "ringrt"; msi-parent = <&inta_main_dmss>; #dma-cells = <2>; ti,sci = <&dmsc>; @@ -153,44 +144,6 @@ }; }; - dmss_csi: bus@4e000000 { - compatible = "simple-bus"; - #address-cells = <2>; - #size-cells = <2>; - dma-ranges; - ranges = <0x00 0x4e000000 0x00 0x4e000000 0x00 0x300000>; - - ti,sci-dev-id = <198>; - - inta_main_dmss_csi: interrupt-controller@4e0a0000 { - compatible = "ti,sci-inta"; - reg = <0x00 0x4e0a0000 0x00 0x8000>; - #interrupt-cells = <0>; - interrupt-controller; - interrupt-parent = <&gic500>; - msi-controller; - ti,sci = <&dmsc>; - ti,sci-dev-id = <200>; - ti,interrupt-ranges = <0 237 8>; - ti,unmapped-event-sources = <&main_bcdma_csi>; - power-domains = <&k3_pds 182 TI_SCI_PD_EXCLUSIVE>; - }; - - main_bcdma_csi: dma-controller@4e230000 { - compatible = "ti,am62a-dmss-bcdma-csirx"; - reg = <0x00 0x4e230000 0x00 0x100>, - <0x00 0x4e180000 0x00 0x8000>, - <0x00 0x4e100000 0x00 0x10000>; - reg-names = "gcfg", "rchanrt", "ringrt"; - msi-parent = <&inta_main_dmss_csi>; - #dma-cells = <3>; - ti,sci = <&dmsc>; - ti,sci-dev-id = <199>; - ti,sci-rm-range-rchan = <0x21>; - power-domains = <&k3_pds 182 TI_SCI_PD_EXCLUSIVE>; - }; - }; - dmsc: system-controller@44043000 { compatible = "ti,k2g-sci"; reg = <0x00 0x44043000 0x00 0xfe0>; @@ -509,7 +462,7 @@ <193>, <194>, <195>; interrupt-controller; #interrupt-cells = <2>; - ti,ngpio = <92>; + ti,ngpio = <87>; ti,davinci-gpio-unbanked = <0>; power-domains = <&k3_pds 77 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 77 0>; @@ -527,7 +480,7 @@ <183>, <184>, <185>; interrupt-controller; #interrupt-cells = <2>; - ti,ngpio = <52>; + ti,ngpio = <88>; ti,davinci-gpio-unbanked = <0>; power-domains = <&k3_pds 78 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 78 0>; @@ -535,24 +488,6 @@ status = "disabled"; }; - sdhci0: mmc@fa10000 { - compatible = "ti,am62-sdhci"; - reg = <0x00 0xfa10000 0x00 0x260>, <0x00 0xfa18000 0x00 0x134>; - interrupts = ; - power-domains = <&k3_pds 57 TI_SCI_PD_EXCLUSIVE>; - clocks = <&k3_clks 57 5>, <&k3_clks 57 6>; - clock-names = "clk_ahb", "clk_xin"; - assigned-clocks = <&k3_clks 57 6>; - assigned-clock-parents = <&k3_clks 57 8>; - bus-width = <8>; - mmc-hs200-1_8v; - ti,clkbuf-sel = <0x7>; - ti,otap-del-sel-legacy = <0x0>; - ti,otap-del-sel-mmc-hs = <0x0>; - ti,otap-del-sel-hs200 = <0x6>; - status = "disabled"; - }; - sdhci1: mmc@fa00000 { compatible = "ti,am62-sdhci"; reg = <0x00 0xfa00000 0x00 0x260>, <0x00 0xfa08000 0x00 0x134>; @@ -560,8 +495,7 @@ power-domains = <&k3_pds 58 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 58 5>, <&k3_clks 58 6>; clock-names = "clk_ahb", "clk_xin"; - bus-width = <4>; - ti,clkbuf-sel = <0x7>; + ti,trm-icp = <0x2>; ti,otap-del-sel-legacy = <0x0>; ti,otap-del-sel-sd-hs = <0x0>; ti,otap-del-sel-sdr12 = <0xf>; @@ -573,30 +507,8 @@ ti,itap-del-sel-sd-hs = <0x0>; ti,itap-del-sel-sdr12 = <0x0>; ti,itap-del-sel-sdr25 = <0x0>; - no-1-8-v; - status = "disabled"; - }; - - sdhci2: mmc@fa20000 { - compatible = "ti,am62-sdhci"; - reg = <0x00 0xfa20000 0x00 0x260>, <0x00 0xfa28000 0x00 0x134>; - interrupts = ; - power-domains = <&k3_pds 184 TI_SCI_PD_EXCLUSIVE>; - clocks = <&k3_clks 184 5>, <&k3_clks 184 6>; - clock-names = "clk_ahb", "clk_xin"; - bus-width = <4>; ti,clkbuf-sel = <0x7>; - ti,otap-del-sel-legacy = <0x0>; - ti,otap-del-sel-sd-hs = <0x0>; - ti,otap-del-sel-sdr12 = <0xf>; - ti,otap-del-sel-sdr25 = <0xf>; - ti,otap-del-sel-sdr50 = <0xc>; - ti,otap-del-sel-sdr104 = <0x6>; - ti,otap-del-sel-ddr50 = <0x9>; - ti,itap-del-sel-legacy = <0x0>; - ti,itap-del-sel-sd-hs = <0x0>; - ti,itap-del-sel-sdr12 = <0x0>; - ti,itap-del-sel-sdr25 = <0x0>; + bus-width = <4>; no-1-8-v; status = "disabled"; }; @@ -964,91 +876,4 @@ power-domains = <&k3_pds 192 TI_SCI_PD_EXCLUSIVE>; status = "disabled"; }; - - ti_csi2rx0: ticsi2rx@30102000 { - compatible = "ti,j721e-csi2rx-shim"; - dmas = <&main_bcdma_csi 0 0x5000 0>; - dma-names = "rx0"; - reg = <0x00 0x30102000 0x00 0x1000>; - power-domains = <&k3_pds 182 TI_SCI_PD_EXCLUSIVE>; - #address-cells = <2>; - #size-cells = <2>; - ranges; - status = "disabled"; - - cdns_csi2rx0: csi-bridge@30101000 { - compatible = "ti,j721e-csi2rx", "cdns,csi2rx"; - reg = <0x00 0x30101000 0x00 0x1000>; - clocks = <&k3_clks 182 0>, <&k3_clks 182 3>, <&k3_clks 182 0>, - <&k3_clks 182 0>, <&k3_clks 182 4>, <&k3_clks 182 4>; - clock-names = "sys_clk", "p_clk", "pixel_if0_clk", - "pixel_if1_clk", "pixel_if2_clk", "pixel_if3_clk"; - phys = <&dphy0>; - phy-names = "dphy"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - csi0_port0: port@0 { - reg = <0>; - status = "disabled"; - }; - - csi0_port1: port@1 { - reg = <1>; - status = "disabled"; - }; - - csi0_port2: port@2 { - reg = <2>; - status = "disabled"; - }; - - csi0_port3: port@3 { - reg = <3>; - status = "disabled"; - }; - - csi0_port4: port@4 { - reg = <4>; - status = "disabled"; - }; - }; - }; - }; - - dphy0: phy@30110000 { - compatible = "cdns,dphy-rx"; - reg = <0x00 0x30110000 0x00 0x1100>; - #phy-cells = <0>; - power-domains = <&k3_pds 185 TI_SCI_PD_EXCLUSIVE>; - status = "disabled"; - }; - - dss: dss@30200000 { - compatible = "ti,am62a7-dss"; - reg = <0x00 0x30200000 0x00 0x1000>, /* common */ - <0x00 0x30202000 0x00 0x1000>, /* vidl1 */ - <0x00 0x30206000 0x00 0x1000>, /* vid */ - <0x00 0x30207000 0x00 0x1000>, /* ovr1 */ - <0x00 0x30208000 0x00 0x1000>, /* ovr2 */ - <0x00 0x3020a000 0x00 0x1000>, /* vp1: Tied OFF in the SoC */ - <0x00 0x3020b000 0x00 0x1000>, /* vp2: Used as DPI Out */ - <0x00 0x30201000 0x00 0x1000>; /* common1 */ - reg-names = "common", "vidl1", "vid", - "ovr1", "ovr2", "vp1", "vp2", "common1"; - power-domains = <&k3_pds 186 TI_SCI_PD_EXCLUSIVE>; - clocks = <&k3_clks 186 6>, - <&k3_clks 186 0>, - <&k3_clks 186 2>; - clock-names = "fck", "vp1", "vp2"; - interrupts = ; - status = "disabled"; - - dss_ports: ports { - #address-cells = <1>; - #size-cells = <0>; - }; - }; }; diff --git a/arch/arm/dts/k3-am62a-mcu.dtsi b/arch/arm/dts/k3-am62a-mcu.dtsi index 8c36e56f413..a6d16a94088 100644 --- a/arch/arm/dts/k3-am62a-mcu.dtsi +++ b/arch/arm/dts/k3-am62a-mcu.dtsi @@ -1,8 +1,8 @@ -// SPDX-License-Identifier: GPL-2.0-only OR MIT +// SPDX-License-Identifier: GPL-2.0 /* * Device Tree Source for AM625 SoC Family MCU Domain peripherals * - * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/ + * Copyright (C) 2020-2022 Texas Instruments Incorporated - https://www.ti.com/ */ &cbass_mcu { diff --git a/arch/arm/dts/k3-am62a-thermal.dtsi b/arch/arm/dts/k3-am62a-thermal.dtsi index c7486fb2a5b..85ce545633e 100644 --- a/arch/arm/dts/k3-am62a-thermal.dtsi +++ b/arch/arm/dts/k3-am62a-thermal.dtsi @@ -1,7 +1,4 @@ -// SPDX-License-Identifier: GPL-2.0-only OR MIT -/* - * Copyright (C) 2023-2024 Texas Instruments Incorporated - https://www.ti.com/ - */ +// SPDX-License-Identifier: GPL-2.0 #include diff --git a/arch/arm/dts/k3-am62a-wakeup.dtsi b/arch/arm/dts/k3-am62a-wakeup.dtsi index f7bec484705..4e8279fa01e 100644 --- a/arch/arm/dts/k3-am62a-wakeup.dtsi +++ b/arch/arm/dts/k3-am62a-wakeup.dtsi @@ -1,8 +1,8 @@ -// SPDX-License-Identifier: GPL-2.0-only OR MIT +// SPDX-License-Identifier: GPL-2.0 /* * Device Tree Source for AM62A SoC Family Wakeup Domain peripherals * - * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/ + * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/ */ &cbass_wakeup { diff --git a/arch/arm/dts/k3-am62a.dtsi b/arch/arm/dts/k3-am62a.dtsi index b1b88460029..61a210ecd5f 100644 --- a/arch/arm/dts/k3-am62a.dtsi +++ b/arch/arm/dts/k3-am62a.dtsi @@ -1,8 +1,8 @@ -// SPDX-License-Identifier: GPL-2.0-only OR MIT +// SPDX-License-Identifier: GPL-2.0 /* * Device Tree Source for AM62A SoC Family * - * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/ + * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/ */ #include diff --git a/arch/arm/dts/k3-am62a7-sk.dts b/arch/arm/dts/k3-am62a7-sk.dts index f241637a564..8f64ac2c756 100644 --- a/arch/arm/dts/k3-am62a7-sk.dts +++ b/arch/arm/dts/k3-am62a7-sk.dts @@ -1,8 +1,8 @@ -// SPDX-License-Identifier: GPL-2.0-only OR MIT +// SPDX-License-Identifier: GPL-2.0 /* * AM62A SK: https://www.ti.com/lit/zip/sprr459 * - * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/ + * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/ */ /dts-v1/; @@ -20,7 +20,6 @@ serial0 = &wkup_uart0; serial2 = &main_uart0; serial3 = &main_uart1; - mmc0 = &sdhci0; mmc1 = &sdhci1; }; @@ -133,18 +132,6 @@ clock-frequency = <12288000>; }; - hdmi0: connector-hdmi { - compatible = "hdmi-connector"; - label = "hdmi"; - type = "a"; - - port { - hdmi_connector_in: endpoint { - remote-endpoint = <&sii9022_out>; - }; - }; - }; - codec_audio: sound { compatible = "simple-audio-card"; simple-audio-card,name = "AM62Ax-SKEVM"; @@ -194,39 +181,6 @@ }; &main_pmx0 { - main_dss0_pins_default: main-dss0-default-pins { - pinctrl-single,pins = < - AM62AX_IOPAD(0x100, PIN_OUTPUT, 0) /* (V17) VOUT0_VSYNC */ - AM62AX_IOPAD(0x0f8, PIN_OUTPUT, 0) /* (T18) VOUT0_HSYNC */ - AM62AX_IOPAD(0x104, PIN_OUTPUT, 0) /* (AA22) VOUT0_PCLK */ - AM62AX_IOPAD(0x0fc, PIN_OUTPUT, 0) /* (U17) VOUT0_DE */ - AM62AX_IOPAD(0x0b8, PIN_OUTPUT, 0) /* (U22) VOUT0_DATA0 */ - AM62AX_IOPAD(0x0bc, PIN_OUTPUT, 0) /* (U21) VOUT0_DATA1 */ - AM62AX_IOPAD(0x0c0, PIN_OUTPUT, 0) /* (U20) VOUT0_DATA2 */ - AM62AX_IOPAD(0x0c4, PIN_OUTPUT, 0) /* (U19) VOUT0_DATA3 */ - AM62AX_IOPAD(0x0c8, PIN_OUTPUT, 0) /* (T19) VOUT0_DATA4 */ - AM62AX_IOPAD(0x0cc, PIN_OUTPUT, 0) /* (U18) VOUT0_DATA5 */ - AM62AX_IOPAD(0x0d0, PIN_OUTPUT, 0) /* (V22) VOUT0_DATA6 */ - AM62AX_IOPAD(0x0d4, PIN_OUTPUT, 0) /* (V21) VOUT0_DATA7 */ - AM62AX_IOPAD(0x0d8, PIN_OUTPUT, 0) /* (V19) VOUT0_DATA8 */ - AM62AX_IOPAD(0x0dc, PIN_OUTPUT, 0) /* (V18) VOUT0_DATA9 */ - AM62AX_IOPAD(0x0e0, PIN_OUTPUT, 0) /* (W22) VOUT0_DATA10 */ - AM62AX_IOPAD(0x0e4, PIN_OUTPUT, 0) /* (W21) VOUT0_DATA11 */ - AM62AX_IOPAD(0x0e8, PIN_OUTPUT, 0) /* (W20) VOUT0_DATA12 */ - AM62AX_IOPAD(0x0ec, PIN_OUTPUT, 0) /* (W19) VOUT0_DATA13 */ - AM62AX_IOPAD(0x0f0, PIN_OUTPUT, 0) /* (Y21) VOUT0_DATA14 */ - AM62AX_IOPAD(0x0f4, PIN_OUTPUT, 0) /* (Y22) VOUT0_DATA15 */ - AM62AX_IOPAD(0x05c, PIN_OUTPUT, 1) /* (P22) GPMC0_AD8.VOUT0_DATA16 */ - AM62AX_IOPAD(0x060, PIN_OUTPUT, 1) /* (R19) GPMC0_AD9.VOUT0_DATA17 */ - AM62AX_IOPAD(0x064, PIN_OUTPUT, 1) /* (R20) GPMC0_AD10.VOUT0_DATA18 */ - AM62AX_IOPAD(0x068, PIN_OUTPUT, 1) /* (R22) GPMC0_AD11.VOUT0_DATA19 */ - AM62AX_IOPAD(0x06c, PIN_OUTPUT, 1) /* (T22) GPMC0_AD12.VOUT0_DATA20 */ - AM62AX_IOPAD(0x070, PIN_OUTPUT, 1) /* (R21) GPMC0_AD13.VOUT0_DATA21 */ - AM62AX_IOPAD(0x074, PIN_OUTPUT, 1) /* (T20) GPMC0_AD14.VOUT0_DATA22 */ - AM62AX_IOPAD(0x078, PIN_OUTPUT, 1) /* (T21) GPMC0_AD15.VOUT0_DATA23 */ - >; - }; - main_uart0_pins_default: main-uart0-default-pins { pinctrl-single,pins = < AM62AX_IOPAD(0x1c8, PIN_INPUT, 0) /* (E14) UART0_RXD */ @@ -264,22 +218,6 @@ >; }; - main_mmc0_pins_default: main-mmc0-default-pins { - pinctrl-single,pins = < - AM62AX_IOPAD(0x220, PIN_INPUT, 0) /* (Y3) MMC0_CMD */ - AM62AX_IOPAD(0x218, PIN_INPUT, 0) /* (AB1) MMC0_CLKLB */ - AM62AX_IOPAD(0x21c, PIN_INPUT, 0) /* (AB1) MMC0_CLK */ - AM62AX_IOPAD(0x214, PIN_INPUT, 0) /* (AA2) MMC0_DAT0 */ - AM62AX_IOPAD(0x210, PIN_INPUT_PULLUP, 0) /* (AA1) MMC0_DAT1 */ - AM62AX_IOPAD(0x20c, PIN_INPUT_PULLUP, 0) /* (AA3) MMC0_DAT2 */ - AM62AX_IOPAD(0x208, PIN_INPUT_PULLUP, 0) /* (Y4) MMC0_DAT3 */ - AM62AX_IOPAD(0x204, PIN_INPUT_PULLUP, 0) /* (AB2) MMC0_DAT4 */ - AM62AX_IOPAD(0x200, PIN_INPUT_PULLUP, 0) /* (AC1) MMC0_DAT5 */ - AM62AX_IOPAD(0x1fc, PIN_INPUT_PULLUP, 0) /* (AD2) MMC0_DAT6 */ - AM62AX_IOPAD(0x1f8, PIN_INPUT_PULLUP, 0) /* (AC2) MMC0_DAT7 */ - >; - }; - main_mmc1_pins_default: main-mmc1-default-pins { pinctrl-single,pins = < AM62AX_IOPAD(0x23c, PIN_INPUT, 0) /* (A21) MMC1_CMD */ @@ -336,12 +274,6 @@ AM62AX_IOPAD(0x084, PIN_INPUT, 2) /* (L18) GPMC0_ADVn_ALE.MCASP1_AXR2 */ >; }; - - main_gpio1_ioexp_intr_pins_default: main-gpio1-ioexp-intr-default-pins { - pinctrl-single,pins = < - AM62AX_IOPAD(0x01d4, PIN_INPUT, 7) /* (C15) UART0_RTSn.GPIO1_23 */ - >; - }; }; &mcu_pmx0 { @@ -475,12 +407,6 @@ reg = <0x22>; gpio-controller; #gpio-cells = <2>; - interrupt-parent = <&main_gpio1>; - interrupts = <23 IRQ_TYPE_EDGE_FALLING>; - interrupt-controller; - #interrupt-cells = <2>; - pinctrl-names = "default"; - pinctrl-0 = <&main_gpio1_ioexp_intr_pins_default>; gpio-line-names = "GPIO_CPSW2_RST", "GPIO_CPSW1_RST", "BT_EN_SOC", "MMC1_SD_EN", @@ -508,72 +434,6 @@ DRVDD-supply = <&vcc_3v3_sys>; DVDD-supply = <&buck5>; }; - - exp2: gpio@23 { - compatible = "ti,tca6424"; - reg = <0x23>; - gpio-controller; - #gpio-cells = <2>; - - gpio-line-names = "", "", - "", "", - "", "", - "", "", - "WL_LT_EN", "CSI_RSTz", - "", "", - "", "", - "", "", - "SPI0_FET_SEL", "SPI0_FET_OE", - "RGMII2_BRD_CONN_DET", "CSI_SEL2", - "CSI_EN", "AUTO_100M_1000M_CONFIG", - "CSI_VLDO_SEL", "SoC_WLAN_SDIO_RST"; - }; - - sii9022: bridge-hdmi@3b { - compatible = "sil,sii9022"; - reg = <0x3b>; - interrupt-parent = <&exp1>; - interrupts = <16 IRQ_TYPE_EDGE_FALLING>; - #sound-dai-cells = <0>; - sil,i2s-data-lanes = < 0 >; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - - sii9022_in: endpoint { - remote-endpoint = <&dpi1_out>; - }; - }; - - port@1 { - reg = <1>; - - sii9022_out: endpoint { - remote-endpoint = <&hdmi_connector_in>; - }; - }; - }; - }; -}; - -&main_i2c2 { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&main_i2c2_pins_default>; - clock-frequency = <400000>; -}; - -&sdhci0 { - /* eMMC */ - status = "okay"; - non-removable; - pinctrl-names = "default"; - pinctrl-0 = <&main_mmc0_pins_default>; - disable-wp; }; &sdhci1 { @@ -582,6 +442,7 @@ vmmc-supply = <&vdd_mmc1>; pinctrl-names = "default"; pinctrl-0 = <&main_mmc1_pins_default>; + ti,driver-strength-ohm = <50>; disable-wp; }; @@ -683,20 +544,3 @@ tx-num-evt = <32>; rx-num-evt = <32>; }; - -&dss { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&main_dss0_pins_default>; -}; - -&dss_ports { - /* VP2: DPI Output */ - port@1 { - reg = <1>; - - dpi1_out: endpoint { - remote-endpoint = <&sii9022_in>; - }; - }; -}; diff --git a/arch/arm/dts/k3-am62a7.dtsi b/arch/arm/dts/k3-am62a7.dtsi index f86a23404e6..58f1c43edcf 100644 --- a/arch/arm/dts/k3-am62a7.dtsi +++ b/arch/arm/dts/k3-am62a7.dtsi @@ -1,10 +1,10 @@ -// SPDX-License-Identifier: GPL-2.0-only OR MIT +// SPDX-License-Identifier: GPL-2.0 /* * Device Tree Source for AM62A7 SoC family in Quad core configuration * * TRM: https://www.ti.com/lit/zip/spruj16 * - * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/ + * Copyright (C) 2020-2022 Texas Instruments Incorporated - https://www.ti.com/ */ /dts-v1/; diff --git a/arch/arm/dts/k3-am62x-sk-common.dtsi b/arch/arm/dts/k3-am62x-sk-common.dtsi index 3c45782ab2b..19f57ead4eb 100644 --- a/arch/arm/dts/k3-am62x-sk-common.dtsi +++ b/arch/arm/dts/k3-am62x-sk-common.dtsi @@ -1,8 +1,8 @@ -// SPDX-License-Identifier: GPL-2.0-only OR MIT +// SPDX-License-Identifier: GPL-2.0 /* * Common dtsi for AM62x SK and derivatives * - * Copyright (C) 2021-2024 Texas Instruments Incorporated - https://www.ti.com/ + * Copyright (C) 2021-2023 Texas Instruments Incorporated - https://www.ti.com/ */ #include @@ -399,18 +399,12 @@ }; }; -&main_i2c2 { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&main_i2c2_pins_default>; - clock-frequency = <400000>; -}; - &sdhci0 { bootph-all; status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&main_mmc0_pins_default>; + ti,driver-strength-ohm = <50>; disable-wp; }; @@ -420,6 +414,7 @@ status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&main_mmc1_pins_default>; + ti,driver-strength-ohm = <50>; disable-wp; }; @@ -458,7 +453,6 @@ }; &usbss0 { - bootph-all; status = "okay"; ti,vbus-divider; }; @@ -469,7 +463,6 @@ }; &usb0 { - bootph-all; #address-cells = <1>; #size-cells = <0>; usb-role-switch; @@ -524,12 +517,3 @@ }; }; }; - -/* mcu_gpio0 and mcu_gpio_intr are reserved for mcu firmware usage */ -&mcu_gpio0 { - status = "reserved"; -}; - -&mcu_gpio_intr { - status = "reserved"; -}; diff --git a/arch/arm/dts/k3-j7200-binman.dtsi b/arch/arm/dts/k3-j7200-binman.dtsi index e8020fec2dc..06db8659876 100644 --- a/arch/arm/dts/k3-j7200-binman.dtsi +++ b/arch/arm/dts/k3-j7200-binman.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 /* - * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/ + * Copyright (C) 2022-2023 Texas Instruments Incorporated - https://www.ti.com/ */ #include "k3-binman.dtsi" @@ -47,52 +47,6 @@ config = "pm-cfg_j7200.yaml"; }; -&binman { - tiboot3-j7200-hs-evm.bin { - filename = "tiboot3-j7200-hs-evm.bin"; - ti-secure-rom { - content = <&u_boot_spl_sr1>, <&ti_fs_enc_sr1>, <&combined_tifs_cfg_sr1>, - <&combined_dm_cfg_sr1>, <&sysfw_inner_cert_sr1>; - combined; - dm-data; - core-opts = <2>; - sysfw-inner-cert; - keyfile = "custMpk.pem"; - sw-rev = <1>; - content-sbl = <&u_boot_spl_sr1>; - content-sysfw = <&ti_fs_enc_sr1>; - content-sysfw-data = <&combined_tifs_cfg_sr1>; - content-sysfw-inner-cert = <&sysfw_inner_cert_sr1>; - content-dm-data = <&combined_dm_cfg_sr1>; - load = <0x41c00000>; - load-sysfw = <0x40000>; - load-sysfw-data = <0x7f000>; - load-dm-data = <0x41c80000>; - }; - u_boot_spl_sr1: u-boot-spl { - no-expanded; - }; - ti_fs_enc_sr1: ti-fs-enc.bin { - filename = "ti-sysfw/ti-fs-firmware-j7200-hs-enc.bin"; - type = "blob-ext"; - optional; - }; - combined_tifs_cfg_sr1: combined-tifs-cfg.bin { - filename = "combined-tifs-cfg.bin"; - type = "blob-ext"; - }; - sysfw_inner_cert_sr1: sysfw-inner-cert { - filename = "ti-sysfw/ti-fs-firmware-j7200-hs-cert.bin"; - type = "blob-ext"; - optional; - }; - combined_dm_cfg_sr1: combined-dm-cfg.bin { - filename = "combined-dm-cfg.bin"; - type = "blob-ext"; - }; - }; -}; - &binman { tiboot3-j7200_sr2-hs-evm.bin { filename = "tiboot3-j7200_sr2-hs-evm.bin"; @@ -138,53 +92,6 @@ }; }; -&binman { - tiboot3-j7200-hs-fs-evm.bin { - filename = "tiboot3-j7200-hs-fs-evm.bin"; - ti-secure-rom { - content = <&u_boot_spl_fs_sr1>, <&ti_fs_enc_fs_sr1>, - <&combined_tifs_cfg_fs_sr1>, <&combined_dm_cfg_fs_sr1>, - <&sysfw_inner_cert_fs_sr1>; - combined; - dm-data; - core-opts = <2>; - sysfw-inner-cert; - keyfile = "custMpk.pem"; - sw-rev = <1>; - content-sbl = <&u_boot_spl_fs_sr1>; - content-sysfw = <&ti_fs_enc_fs_sr1>; - content-sysfw-data = <&combined_tifs_cfg_fs_sr1>; - content-sysfw-inner-cert = <&sysfw_inner_cert_fs_sr1>; - content-dm-data = <&combined_dm_cfg_fs_sr1>; - load = <0x41c00000>; - load-sysfw = <0x40000>; - load-sysfw-data = <0x7f000>; - load-dm-data = <0x41c80000>; - }; - u_boot_spl_fs_sr1: u-boot-spl { - no-expanded; - }; - ti_fs_enc_fs_sr1: ti-fs-enc.bin { - filename = "ti-sysfw/ti-fs-firmware-j7200-hs-fs-enc.bin"; - type = "blob-ext"; - optional; - }; - combined_tifs_cfg_fs_sr1: combined-tifs-cfg.bin { - filename = "combined-tifs-cfg.bin"; - type = "blob-ext"; - }; - sysfw_inner_cert_fs_sr1: sysfw-inner-cert { - filename = "ti-sysfw/ti-fs-firmware-j7200-hs-fs-cert.bin"; - type = "blob-ext"; - optional; - }; - combined_dm_cfg_fs_sr1: combined-dm-cfg.bin { - filename = "combined-dm-cfg.bin"; - type = "blob-ext"; - }; - }; -}; - &binman { tiboot3-j7200_sr2-hs-fs-evm.bin { filename = "tiboot3-j7200_sr2-hs-fs-evm.bin"; diff --git a/arch/arm/dts/k3-j721e-binman.dtsi b/arch/arm/dts/k3-j721e-binman.dtsi index 1514d897634..75a6e9599b9 100644 --- a/arch/arm/dts/k3-j721e-binman.dtsi +++ b/arch/arm/dts/k3-j721e-binman.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 /* - * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/ + * Copyright (C) 2022-2023 Texas Instruments Incorporated - https://www.ti.com/ */ #include "k3-binman.dtsi" @@ -129,94 +129,6 @@ }; }; -&binman { - tiboot3-j721e_sr1_1-hs-fs-evm.bin { - filename = "tiboot3-j721e_sr1_1-hs-fs-evm.bin"; - ti-secure-rom { - content = <&u_boot_spl_fs_sr1_1>; - core = "public"; - core-opts = <2>; - load = ; - keyfile = "custMpk.pem"; - }; - u_boot_spl_fs_sr1_1: u-boot-spl { - no-expanded; - }; - }; - sysfw_fs_sr1_1 { - filename = "sysfw.bin_fs_sr1_1"; - ti-fs-cert-fs.bin { - filename = "ti-sysfw/ti-fs-firmware-j721e_sr1_1-hs-fs-cert.bin"; - type = "blob-ext"; - optional; - }; - ti-fs-firmware-j721e-hs-fs-enc.bin { - filename = "ti-sysfw/ti-fs-firmware-j721e_sr1_1-hs-fs-enc.bin"; - type = "blob-ext"; - optional; - }; - }; - itb_fs_sr1_1 { - filename = "sysfw-j721e_sr1_1-hs-fs-evm.itb"; - fit { - description = "SYSFW and Config fragments"; - #address-cells = <1>; - images { - sysfw.bin { - description = "sysfw"; - type = "firmware"; - arch = "arm"; - compression = "none"; - blob-ext { - filename = "sysfw.bin_fs_sr1_1"; - }; - }; - board-cfg.bin { - description = "board-cfg"; - type = "firmware"; - arch = "arm"; - compression = "none"; - board-cfg { - filename = "board-cfg.bin"; - type = "blob-ext"; - }; - - }; - pm-cfg.bin { - description = "pm-cfg"; - type = "firmware"; - arch = "arm"; - compression = "none"; - pm-cfg { - filename = "pm-cfg.bin"; - type = "blob-ext"; - }; - }; - rm-cfg.bin { - description = "rm-cfg"; - type = "firmware"; - arch = "arm"; - compression = "none"; - rm-cfg { - filename = "rm-cfg.bin"; - type = "blob-ext"; - }; - }; - sec-cfg.bin { - description = "sec-cfg"; - type = "firmware"; - arch = "arm"; - compression = "none"; - sec-cfg { - filename = "sec-cfg.bin"; - type = "blob-ext"; - }; - }; - }; - }; - }; -}; - &binman { tiboot3-j721e_sr2-hs-fs-evm.bin { filename = "tiboot3-j721e_sr2-hs-fs-evm.bin"; diff --git a/arch/arm/include/asm/arch-adi/sc5xx/sc5xx.h b/arch/arm/include/asm/arch-adi/sc5xx/sc5xx.h deleted file mode 100644 index 683e3d412ce..00000000000 --- a/arch/arm/include/asm/arch-adi/sc5xx/sc5xx.h +++ /dev/null @@ -1,39 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later */ -/* - * (C) Copyright 2022 - Analog Devices, Inc. - * - * Written and/or maintained by Timesys Corporation - * - * Contact: Nathan Barrett-Morrison - * Contact: Greg Malysa - */ -#ifndef ARCH_ADI_SC5XX_SC5XX_H -#define ARCH_ADI_SC5XX_SC5XX_H - -#include - -#define TWI0_CLKDIV 0x31001400 // TWI0 SCL Clock Divider Register -#define TWI1_CLKDIV 0x31001500 // TWI1 SCL Clock Divider Register -#define TWI2_CLKDIV 0x31001600 // TWI2 SCL Clock Divider Register - -const char *sc5xx_get_boot_mode(u32 *bmode); -void sc5xx_enable_rgmii(void); - -void sc5xx_enable_ns_sharc_access(uintptr_t securec0_base); -void sc5xx_disable_spu0(uintptr_t spu0_start, uintptr_t spu0_end); -void sc5xx_enable_pmu(void); - -/** - * Per-SoC init function to be used to initialize hw-specific things. Examples: - * enable PMU on armv7, enable coresight timer on armv8, etc. - */ -void sc5xx_soc_init(void); - -/* - * Reconfigure SPI memory map region for OSPI use. The adi-spi3 driver - * does not use the memory map, while the OSPI driver requires it. Only - * available on sc59x and sc59x-64 - */ -void sc59x_remap_ospi(void); - -#endif diff --git a/arch/arm/include/asm/arch-adi/sc5xx/soc.h b/arch/arm/include/asm/arch-adi/sc5xx/soc.h deleted file mode 100644 index 430dbe2dae4..00000000000 --- a/arch/arm/include/asm/arch-adi/sc5xx/soc.h +++ /dev/null @@ -1,18 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later */ -/* - * (C) Copyright 2022 - Analog Devices, Inc. - * - * Written and/or maintained by Timesys Corporation - * - * Contact: Nathan Barrett-Morrison - * Contact: Greg Malysa - */ - -#ifndef BOARD_ADI_COMMON_SOC_H -#define BOARD_ADI_COMMON_SOC_H - -#include - -void fixup_dp83867_phy(struct phy_device *phydev); - -#endif diff --git a/arch/arm/include/asm/arch-adi/sc5xx/spl.h b/arch/arm/include/asm/arch-adi/sc5xx/spl.h deleted file mode 100644 index c215e6b892a..00000000000 --- a/arch/arm/include/asm/arch-adi/sc5xx/spl.h +++ /dev/null @@ -1,43 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later */ -/* - * (C) Copyright 2022 - Analog Devices, Inc. - * - * Written and/or maintained by Timesys Corporation - * - * Contact: Nathan Barrett-Morrison - * Contact: Greg Malysa - */ -#ifndef ARCH_ADI_SC5XX_SPL_H -#define ARCH_ADI_SC5XX_SPL_H - -#include - -struct adi_boot_args { - phys_addr_t addr; - u32 flags; - u32 cmd; -}; - -extern u32 bmode; - -/** - * This table stores the arguments to the rom boot function per bootmode, - * and it is populated per SoC in the corresponding SoC support file (sc7x, sc58x, - * and so on). - */ -extern const struct adi_boot_args adi_rom_boot_args[8]; - -/** - * Struct layout for the boot config is also specific to an SoC, so you should - * only access it inside an SoC-specific boot hook function, which will be called - * from the boot rom while going from SPL to proper u-boot - */ -struct ADI_ROM_BOOT_CONFIG; -int32_t adi_rom_boot_hook(struct ADI_ROM_BOOT_CONFIG *cfg, int32_t cause); - -typedef void (*adi_rom_boot_fn)(void *address, uint32_t flags, int32_t count, - void *hook, uint32_t command); - -extern adi_rom_boot_fn adi_rom_boot; - -#endif diff --git a/arch/arm/include/asm/arch-am33xx/clk_synthesizer.h b/arch/arm/include/asm/arch-am33xx/clk_synthesizer.h index 393bc7a6a8a..8e3d55f3e76 100644 --- a/arch/arm/include/asm/arch-am33xx/clk_synthesizer.h +++ b/arch/arm/include/asm/arch-am33xx/clk_synthesizer.h @@ -10,8 +10,6 @@ #ifndef __CLK_SYNTHESIZER_H #define __CLK_SYNTHESIZER_H -#include - #define CLK_SYNTHESIZER_ID_REG 0x0 #define CLK_SYNTHESIZER_XCSEL 0x05 #define CLK_SYNTHESIZER_MUX_REG 0x14 diff --git a/arch/arm/include/asm/arch-aspeed/scu_ast2500.h b/arch/arm/include/asm/arch-aspeed/scu_ast2500.h index a415693de6e..50d6a6bc760 100644 --- a/arch/arm/include/asm/arch-aspeed/scu_ast2500.h +++ b/arch/arm/include/asm/arch-aspeed/scu_ast2500.h @@ -140,7 +140,6 @@ #define SCU_CLKDUTY_RGMII2TXCK_MASK (0x7f << SCU_CLKDUTY_RGMII2TXCK_SHIFT) #ifndef __ASSEMBLY__ -#include struct ast2500_clk_priv { struct ast2500_scu *scu; diff --git a/arch/arm/include/asm/arch-aspeed/scu_ast2600.h b/arch/arm/include/asm/arch-aspeed/scu_ast2600.h index a2c8852db84..251bfa269bf 100644 --- a/arch/arm/include/asm/arch-aspeed/scu_ast2600.h +++ b/arch/arm/include/asm/arch-aspeed/scu_ast2600.h @@ -125,8 +125,6 @@ #define SCU_MISC_CTRL1_UART5_DIV BIT(12) #ifndef __ASSEMBLY__ -#include - struct ast2600_scu { uint32_t prot_key1; /* 0x000 */ uint32_t chip_id1; /* 0x004 */ diff --git a/arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h b/arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h index a02bec9371c..9e29350ca4b 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h @@ -7,8 +7,6 @@ #ifndef __FSL_SERDES_H__ #define __FSL_SERDES_H__ -#include - #ifdef CONFIG_FSL_LSCH3 enum srds_prtcl { /* diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h index 147ca2f99de..9794db04499 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h @@ -6,7 +6,6 @@ #ifndef __ARCH_FSL_LSCH2_IMMAP_H__ #define __ARCH_FSL_LSCH2_IMMAP_H__ -#include #include #ifndef __ASSEMBLY__ #include diff --git a/arch/arm/include/asm/arch-imx8m/ddr.h b/arch/arm/include/asm/arch-imx8m/ddr.h index 1f81d91977c..c14855d177e 100644 --- a/arch/arm/include/asm/arch-imx8m/ddr.h +++ b/arch/arm/include/asm/arch-imx8m/ddr.h @@ -8,7 +8,7 @@ #include #include -#include +#include #define DDRC_DDR_SS_GPR0 0x3d000000 #define DDRC_IPS_BASE_ADDR_0 0x3f400000 diff --git a/arch/arm/include/asm/arch-ls102xa/fsl_serdes.h b/arch/arm/include/asm/arch-ls102xa/fsl_serdes.h index 35e3ec7a987..9244e0a78fd 100644 --- a/arch/arm/include/asm/arch-ls102xa/fsl_serdes.h +++ b/arch/arm/include/asm/arch-ls102xa/fsl_serdes.h @@ -6,8 +6,6 @@ #ifndef __FSL_SERDES_H #define __FSL_SERDES_H -#include - enum srds_prtcl { /* * Nobody will check whether the device 'NONE' has been configured, diff --git a/arch/arm/include/asm/arch-mx5/clock.h b/arch/arm/include/asm/arch-mx5/clock.h index 58013a85951..d585b5cf4b2 100644 --- a/arch/arm/include/asm/arch-mx5/clock.h +++ b/arch/arm/include/asm/arch-mx5/clock.h @@ -7,8 +7,6 @@ #ifndef __ASM_ARCH_CLOCK_H #define __ASM_ARCH_CLOCK_H -#include - #ifdef CONFIG_SYS_MX5_HCLK #define MXC_HCLK CONFIG_SYS_MX5_HCLK #else diff --git a/arch/arm/include/asm/arch-mx7/sys_proto.h b/arch/arm/include/asm/arch-mx7/sys_proto.h index 5da0037b2c6..634736cc09c 100644 --- a/arch/arm/include/asm/arch-mx7/sys_proto.h +++ b/arch/arm/include/asm/arch-mx7/sys_proto.h @@ -7,8 +7,6 @@ #include -struct wdog_regs; - void set_wdog_reset(struct wdog_regs *wdog); #endif /* __SYS_PROTO_IMX7_ */ diff --git a/arch/arm/include/asm/arch-rockchip/bootrom.h b/arch/arm/include/asm/arch-rockchip/bootrom.h index e736772fda7..ecf3b4e7428 100644 --- a/arch/arm/include/asm/arch-rockchip/bootrom.h +++ b/arch/arm/include/asm/arch-rockchip/bootrom.h @@ -7,8 +7,6 @@ #ifndef _ASM_ARCH_BOOTROM_H #define _ASM_ARCH_BOOTROM_H -#include - /* * Saved Stack pointer address. * Access might be needed in some special cases. diff --git a/arch/arm/include/asm/arch-rockchip/clock.h b/arch/arm/include/asm/arch-rockchip/clock.h index 73e5283108b..f01c5aeb71c 100644 --- a/arch/arm/include/asm/arch-rockchip/clock.h +++ b/arch/arm/include/asm/arch-rockchip/clock.h @@ -6,8 +6,6 @@ #ifndef _ASM_ARCH_CLOCK_H #define _ASM_ARCH_CLOCK_H -#include - struct udevice; /* define pll mode */ diff --git a/arch/arm/include/asm/arch-rockchip/grf_rk3308.h b/arch/arm/include/asm/arch-rockchip/grf_rk3308.h index f4bbc240131..a995bb950d9 100644 --- a/arch/arm/include/asm/arch-rockchip/grf_rk3308.h +++ b/arch/arm/include/asm/arch-rockchip/grf_rk3308.h @@ -5,8 +5,6 @@ #ifndef _ASM_ARCH_GRF_rk3308_H #define _ASM_ARCH_GRF_rk3308_H -#include - struct rk3308_grf { unsigned int gpio0a_iomux; unsigned int reserved0; diff --git a/arch/arm/include/asm/arch-sunxi/pmic_bus.h b/arch/arm/include/asm/arch-sunxi/pmic_bus.h index e26459fdd3b..5ab9b2809f2 100644 --- a/arch/arm/include/asm/arch-sunxi/pmic_bus.h +++ b/arch/arm/include/asm/arch-sunxi/pmic_bus.h @@ -8,8 +8,6 @@ #ifndef _SUNXI_PMIC_BUS_H #define _SUNXI_PMIC_BUS_H -#include - int pmic_bus_init(void); int pmic_bus_read(u8 reg, u8 *data); int pmic_bus_write(u8 reg, u8 data); diff --git a/arch/arm/include/asm/arch-sunxi/tve.h b/arch/arm/include/asm/arch-sunxi/tve.h index 4fbb4b91c86..46cd87e79e8 100644 --- a/arch/arm/include/asm/arch-sunxi/tve.h +++ b/arch/arm/include/asm/arch-sunxi/tve.h @@ -9,8 +9,6 @@ #ifndef _TVE_H #define _TVE_H -#include - enum tve_mode { tve_mode_vga, tve_mode_composite_pal, diff --git a/arch/arm/include/asm/arch-tegra/ap.h b/arch/arm/include/asm/arch-tegra/ap.h index b922b2d30ea..78aeb25ac78 100644 --- a/arch/arm/include/asm/arch-tegra/ap.h +++ b/arch/arm/include/asm/arch-tegra/ap.h @@ -4,7 +4,6 @@ * NVIDIA Corporation */ #include -#include /* Stabilization delays, in usec */ #define PLL_STABILIZATION_DELAY (300) diff --git a/arch/arm/include/asm/arch-tegra/cboot.h b/arch/arm/include/asm/arch-tegra/cboot.h index d0ba83ae8bc..4e1da98d1f2 100644 --- a/arch/arm/include/asm/arch-tegra/cboot.h +++ b/arch/arm/include/asm/arch-tegra/cboot.h @@ -6,8 +6,6 @@ #ifndef _TEGRA_CBOOT_H_ #define _TEGRA_CBOOT_H_ -#include -#include #include #ifdef CONFIG_ARM64 diff --git a/arch/arm/include/asm/arch-tegra/gpio.h b/arch/arm/include/asm/arch-tegra/gpio.h index 3c1838cf137..fe7b3a50e0d 100644 --- a/arch/arm/include/asm/arch-tegra/gpio.h +++ b/arch/arm/include/asm/arch-tegra/gpio.h @@ -6,7 +6,6 @@ #ifndef _TEGRA_GPIO_H_ #define _TEGRA_GPIO_H_ -#include #include #define TEGRA_GPIOS_PER_PORT 8 diff --git a/arch/arm/include/asm/arch-tegra/tegra_i2c.h b/arch/arm/include/asm/arch-tegra/tegra_i2c.h index dc8db391221..afec6bbdda3 100644 --- a/arch/arm/include/asm/arch-tegra/tegra_i2c.h +++ b/arch/arm/include/asm/arch-tegra/tegra_i2c.h @@ -10,7 +10,6 @@ #include #include -#include struct udevice; diff --git a/arch/arm/include/asm/esr.h b/arch/arm/include/asm/esr.h index 99488730998..f19e4e726a1 100644 --- a/arch/arm/include/asm/esr.h +++ b/arch/arm/include/asm/esr.h @@ -7,7 +7,6 @@ #ifndef __ASM_ESR_H #define __ASM_ESR_H -#include #include #include diff --git a/arch/arm/include/asm/global_data.h b/arch/arm/include/asm/global_data.h index 45401d5e3c8..452bcd1b8fd 100644 --- a/arch/arm/include/asm/global_data.h +++ b/arch/arm/include/asm/global_data.h @@ -12,7 +12,6 @@ #include #include -#include /* Architecture-specific global data */ struct arch_global_data { diff --git a/arch/arm/include/asm/mach-imx/gpio.h b/arch/arm/include/asm/mach-imx/gpio.h index 25763526f5f..1b7c9cd5249 100644 --- a/arch/arm/include/asm/mach-imx/gpio.h +++ b/arch/arm/include/asm/mach-imx/gpio.h @@ -9,8 +9,6 @@ #define __ASM_ARCH_IMX_GPIO_H #if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__)) -#include - /* GPIO registers */ struct gpio_regs { u32 gpio_dr; /* data */ diff --git a/arch/arm/include/asm/ti-common/davinci_nand.h b/arch/arm/include/asm/ti-common/davinci_nand.h index 84fe01e3b71..38a1a6ea0d7 100644 --- a/arch/arm/include/asm/ti-common/davinci_nand.h +++ b/arch/arm/include/asm/ti-common/davinci_nand.h @@ -9,7 +9,6 @@ #ifndef _DAVINCI_NAND_H_ #define _DAVINCI_NAND_H_ -#include #include #define NAND_READ_START 0x00 diff --git a/arch/arm/lib/asm-offsets.c b/arch/arm/lib/asm-offsets.c index 9afd8375999..181a8ac4c27 100644 --- a/arch/arm/lib/asm-offsets.c +++ b/arch/arm/lib/asm-offsets.c @@ -16,6 +16,7 @@ * Abdellatif El Khlifi */ +#include #include #include diff --git a/arch/arm/lib/bdinfo.c b/arch/arm/lib/bdinfo.c index 7c49462c8eb..b88b01eefdc 100644 --- a/arch/arm/lib/bdinfo.c +++ b/arch/arm/lib/bdinfo.c @@ -6,7 +6,7 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ -#include +#include #include #include #include diff --git a/arch/arm/lib/bootm-fdt.c b/arch/arm/lib/bootm-fdt.c index 2671f9a0ebf..29020bd1c6b 100644 --- a/arch/arm/lib/bootm-fdt.c +++ b/arch/arm/lib/bootm-fdt.c @@ -14,6 +14,7 @@ * Copyright (C) 2001 Erik Mouw (J.A.K.Mouw@its.tudelft.nl) */ +#include #include #ifdef CONFIG_ARMV7_NONSEC #include diff --git a/arch/arm/lib/bootm.c b/arch/arm/lib/bootm.c index 192c120a7d2..f30a483ed8b 100644 --- a/arch/arm/lib/bootm.c +++ b/arch/arm/lib/bootm.c @@ -11,6 +11,7 @@ * Copyright (C) 2001 Erik Mouw (J.A.K.Mouw@its.tudelft.nl) */ +#include #include #include #include diff --git a/arch/arm/lib/cache-cp15.c b/arch/arm/lib/cache-cp15.c index 947012f2996..0893915b300 100644 --- a/arch/arm/lib/cache-cp15.c +++ b/arch/arm/lib/cache-cp15.c @@ -4,6 +4,7 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ +#include #include #include #include diff --git a/arch/arm/lib/cache-pl310.c b/arch/arm/lib/cache-pl310.c index 0afd3880447..d05314ee57f 100644 --- a/arch/arm/lib/cache-pl310.c +++ b/arch/arm/lib/cache-pl310.c @@ -9,6 +9,7 @@ #include #include #include +#include struct pl310_regs *const pl310 = (struct pl310_regs *)CFG_SYS_PL310_BASE; diff --git a/arch/arm/lib/cache.c b/arch/arm/lib/cache.c index b2ae74a59f1..7a160158671 100644 --- a/arch/arm/lib/cache.c +++ b/arch/arm/lib/cache.c @@ -6,7 +6,7 @@ /* for now: just dummy functions to satisfy the linker */ -#include +#include #include #include #include diff --git a/arch/arm/lib/cmd_boot.c b/arch/arm/lib/cmd_boot.c index 5df5bc305a2..c905ecc4bd9 100644 --- a/arch/arm/lib/cmd_boot.c +++ b/arch/arm/lib/cmd_boot.c @@ -17,6 +17,7 @@ * Copyright 2015 Konsulko Group, Matt Porter */ +#include #include /* diff --git a/arch/arm/lib/eabi_compat.c b/arch/arm/lib/eabi_compat.c index 0a96ba1355f..f7029918d4f 100644 --- a/arch/arm/lib/eabi_compat.c +++ b/arch/arm/lib/eabi_compat.c @@ -5,9 +5,7 @@ * (C) Copyright 2009 Wolfgang Denk */ -#include -#include -#include +#include int raise (int signum) { diff --git a/arch/arm/lib/gic-v3-its.c b/arch/arm/lib/gic-v3-its.c index 2cc0a32f9d4..f4bbd21da91 100644 --- a/arch/arm/lib/gic-v3-its.c +++ b/arch/arm/lib/gic-v3-its.c @@ -2,6 +2,7 @@ /* * Copyright 2019 Broadcom. */ +#include #include #include #include diff --git a/arch/arm/lib/image.c b/arch/arm/lib/image.c index 1f672eee2c8..e394c1ad909 100644 --- a/arch/arm/lib/image.c +++ b/arch/arm/lib/image.c @@ -4,6 +4,7 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ +#include #include #include #include diff --git a/arch/arm/lib/interrupts.c b/arch/arm/lib/interrupts.c index 333a5026a46..9961472f69f 100644 --- a/arch/arm/lib/interrupts.c +++ b/arch/arm/lib/interrupts.c @@ -18,6 +18,7 @@ * Philippe Robin, ARM Ltd. */ +#include #include #include #include diff --git a/arch/arm/lib/interrupts_64.c b/arch/arm/lib/interrupts_64.c index b3024ba514e..125dc0bb390 100644 --- a/arch/arm/lib/interrupts_64.c +++ b/arch/arm/lib/interrupts_64.c @@ -4,6 +4,7 @@ * David Feng */ +#include #include #include #include diff --git a/arch/arm/lib/interrupts_m.c b/arch/arm/lib/interrupts_m.c index b977961bde8..277854aa878 100644 --- a/arch/arm/lib/interrupts_m.c +++ b/arch/arm/lib/interrupts_m.c @@ -4,10 +4,9 @@ * Kamil Lulko, */ -#include +#include #include #include -#include /* * Upon exception entry ARMv7-M processors automatically save stack diff --git a/arch/arm/lib/psci-dt.c b/arch/arm/lib/psci-dt.c index be800a3bc9e..903b3357048 100644 --- a/arch/arm/lib/psci-dt.c +++ b/arch/arm/lib/psci-dt.c @@ -3,6 +3,7 @@ * Copyright 2016 NXP Semiconductor, Inc. */ +#include #include #include #include diff --git a/arch/arm/lib/reset.c b/arch/arm/lib/reset.c index c9796a4435c..3e051e36f12 100644 --- a/arch/arm/lib/reset.c +++ b/arch/arm/lib/reset.c @@ -20,6 +20,7 @@ * (C) Copyright 2004 Texas Insturments */ +#include #include #include #include diff --git a/arch/arm/lib/save_prev_bl_data.c b/arch/arm/lib/save_prev_bl_data.c index 4357acaef6c..b286bac9bf0 100644 --- a/arch/arm/lib/save_prev_bl_data.c +++ b/arch/arm/lib/save_prev_bl_data.c @@ -10,6 +10,7 @@ #include #include #include +#include #include #include #include diff --git a/arch/arm/lib/spl.c b/arch/arm/lib/spl.c index c43a63f1819..b13897495da 100644 --- a/arch/arm/lib/spl.c +++ b/arch/arm/lib/spl.c @@ -7,6 +7,7 @@ * Tom Rini */ +#include #include #include #include diff --git a/arch/arm/lib/stack.c b/arch/arm/lib/stack.c index ea1b937add7..656084c7e51 100644 --- a/arch/arm/lib/stack.c +++ b/arch/arm/lib/stack.c @@ -10,6 +10,7 @@ * Sysgo Real-Time Solutions, GmbH * Marius Groeger */ +#include #include #include #include diff --git a/arch/arm/lib/zimage.c b/arch/arm/lib/zimage.c index 51287251b3f..45e9c4506a9 100644 --- a/arch/arm/lib/zimage.c +++ b/arch/arm/lib/zimage.c @@ -6,6 +6,7 @@ * bootz code: * Copyright (C) 2012 Marek Vasut */ +#include #include #define LINUX_ARM_ZIMAGE_MAGIC 0x016f2818 diff --git a/arch/arm/mach-apple/board.c b/arch/arm/mach-apple/board.c index 8bace3005eb..7a6151a9722 100644 --- a/arch/arm/mach-apple/board.c +++ b/arch/arm/mach-apple/board.c @@ -3,6 +3,7 @@ * (C) Copyright 2021 Mark Kettenis */ +#include #include #include #include diff --git a/arch/arm/mach-apple/rtkit.c b/arch/arm/mach-apple/rtkit.c index b8f4771e5e7..a550b553b66 100644 --- a/arch/arm/mach-apple/rtkit.c +++ b/arch/arm/mach-apple/rtkit.c @@ -4,14 +4,13 @@ * (C) Copyright 2021 Copyright The Asahi Linux Contributors */ +#include #include #include #include #include #include -#include -#include #define APPLE_RTKIT_EP_MGMT 0 #define APPLE_RTKIT_EP_CRASHLOG 1 diff --git a/arch/arm/mach-aspeed/ast2500/board_common.c b/arch/arm/mach-aspeed/ast2500/board_common.c index 531c2ad1562..bae10271844 100644 --- a/arch/arm/mach-aspeed/ast2500/board_common.c +++ b/arch/arm/mach-aspeed/ast2500/board_common.c @@ -2,7 +2,7 @@ /* * Copyright (c) 2016 Google, Inc */ -#include +#include #include #include #include diff --git a/arch/arm/mach-aspeed/ast2500/clk_ast2500.c b/arch/arm/mach-aspeed/ast2500/clk_ast2500.c index 50d7f99b264..02bd3f67c96 100644 --- a/arch/arm/mach-aspeed/ast2500/clk_ast2500.c +++ b/arch/arm/mach-aspeed/ast2500/clk_ast2500.c @@ -3,6 +3,7 @@ * Copyright (C) 2016 Google, Inc */ +#include #include #include #include diff --git a/arch/arm/mach-aspeed/ast2600/board_common.c b/arch/arm/mach-aspeed/ast2600/board_common.c index 4c0b705ea88..dc6cdc35d15 100644 --- a/arch/arm/mach-aspeed/ast2600/board_common.c +++ b/arch/arm/mach-aspeed/ast2600/board_common.c @@ -2,7 +2,7 @@ /* * Copyright (c) Aspeed Technology Inc. */ -#include +#include #include #include #include diff --git a/arch/arm/mach-aspeed/ast2600/spl.c b/arch/arm/mach-aspeed/ast2600/spl.c index 05390c16f3a..0952e73a457 100644 --- a/arch/arm/mach-aspeed/ast2600/spl.c +++ b/arch/arm/mach-aspeed/ast2600/spl.c @@ -2,6 +2,7 @@ /* * Copyright (c) Aspeed Technology Inc. */ +#include #include #include #include diff --git a/arch/arm/mach-aspeed/ast_wdt.c b/arch/arm/mach-aspeed/ast_wdt.c index c420940d1cb..5bc442ef33c 100644 --- a/arch/arm/mach-aspeed/ast_wdt.c +++ b/arch/arm/mach-aspeed/ast_wdt.c @@ -3,6 +3,7 @@ * (C) Copyright 2016 Google, Inc */ +#include #include #include #include diff --git a/arch/arm/mach-at91/arm920t/at91rm9200_devices.c b/arch/arm/mach-at91/arm920t/at91rm9200_devices.c index 459edadb587..c849885bc2b 100644 --- a/arch/arm/mach-at91/arm920t/at91rm9200_devices.c +++ b/arch/arm/mach-at91/arm920t/at91rm9200_devices.c @@ -10,6 +10,7 @@ * Lead Tech Design */ +#include #include #include #include diff --git a/arch/arm/mach-at91/arm920t/clock.c b/arch/arm/mach-at91/arm920t/clock.c index ac55a61be64..09ac66d619d 100644 --- a/arch/arm/mach-at91/arm920t/clock.c +++ b/arch/arm/mach-at91/arm920t/clock.c @@ -7,7 +7,7 @@ * Copyright (C) 2005 Ivan Kokshaysky * Copyright (C) 2009 Jean-Christophe PLAGNIOL-VILLARD */ -#include +#include #include #include #include diff --git a/arch/arm/mach-at91/arm920t/cpu.c b/arch/arm/mach-at91/arm920t/cpu.c index 579e76b339d..9bf03fd68ec 100644 --- a/arch/arm/mach-at91/arm920t/cpu.c +++ b/arch/arm/mach-at91/arm920t/cpu.c @@ -10,7 +10,7 @@ * Jean-Christophe PLAGNIOL-VILLARD */ -#include +#include #include #include #include diff --git a/arch/arm/mach-at91/arm920t/reset.c b/arch/arm/mach-at91/arm920t/reset.c index 7582cef417f..91e375146ad 100644 --- a/arch/arm/mach-at91/arm920t/reset.c +++ b/arch/arm/mach-at91/arm920t/reset.c @@ -13,6 +13,7 @@ * Alex Zuepke */ +#include #include #include #include diff --git a/arch/arm/mach-at91/arm920t/timer.c b/arch/arm/mach-at91/arm920t/timer.c index f7b4116344c..8ef5764e315 100644 --- a/arch/arm/mach-at91/arm920t/timer.c +++ b/arch/arm/mach-at91/arm920t/timer.c @@ -13,7 +13,7 @@ * Alex Zuepke */ -#include +#include #include #include #include diff --git a/arch/arm/mach-at91/arm926ejs/at91sam9260_devices.c b/arch/arm/mach-at91/arm926ejs/at91sam9260_devices.c index 201c99ade4e..c10571fa28a 100644 --- a/arch/arm/mach-at91/arm926ejs/at91sam9260_devices.c +++ b/arch/arm/mach-at91/arm926ejs/at91sam9260_devices.c @@ -5,6 +5,7 @@ * Lead Tech Design */ +#include #include #include #include diff --git a/arch/arm/mach-at91/arm926ejs/at91sam9261_devices.c b/arch/arm/mach-at91/arm926ejs/at91sam9261_devices.c index b8d209cbec8..0c2b9f2ecc9 100644 --- a/arch/arm/mach-at91/arm926ejs/at91sam9261_devices.c +++ b/arch/arm/mach-at91/arm926ejs/at91sam9261_devices.c @@ -5,6 +5,7 @@ * Lead Tech Design */ +#include #include #include #include diff --git a/arch/arm/mach-at91/arm926ejs/at91sam9263_devices.c b/arch/arm/mach-at91/arm926ejs/at91sam9263_devices.c index 1749662dae9..3b8a4623866 100644 --- a/arch/arm/mach-at91/arm926ejs/at91sam9263_devices.c +++ b/arch/arm/mach-at91/arm926ejs/at91sam9263_devices.c @@ -9,6 +9,7 @@ * esd electronic system design gmbh */ +#include #include #include #include diff --git a/arch/arm/mach-at91/arm926ejs/at91sam9m10g45_devices.c b/arch/arm/mach-at91/arm926ejs/at91sam9m10g45_devices.c index 4c481484c3d..d517810c991 100644 --- a/arch/arm/mach-at91/arm926ejs/at91sam9m10g45_devices.c +++ b/arch/arm/mach-at91/arm926ejs/at91sam9m10g45_devices.c @@ -5,6 +5,7 @@ * Lead Tech Design */ +#include #include #include #include diff --git a/arch/arm/mach-at91/arm926ejs/at91sam9n12_devices.c b/arch/arm/mach-at91/arm926ejs/at91sam9n12_devices.c index 4dc6e51aba8..9f98ce7a45c 100644 --- a/arch/arm/mach-at91/arm926ejs/at91sam9n12_devices.c +++ b/arch/arm/mach-at91/arm926ejs/at91sam9n12_devices.c @@ -4,6 +4,7 @@ * Josh Wu */ +#include #include #include #include diff --git a/arch/arm/mach-at91/arm926ejs/at91sam9rl_devices.c b/arch/arm/mach-at91/arm926ejs/at91sam9rl_devices.c index 4f5bafb8c2e..b4002eb7504 100644 --- a/arch/arm/mach-at91/arm926ejs/at91sam9rl_devices.c +++ b/arch/arm/mach-at91/arm926ejs/at91sam9rl_devices.c @@ -5,6 +5,7 @@ * Lead Tech Design */ +#include #include #include #include diff --git a/arch/arm/mach-at91/arm926ejs/at91sam9x5_devices.c b/arch/arm/mach-at91/arm926ejs/at91sam9x5_devices.c index 40c8a58b563..f44760bed31 100644 --- a/arch/arm/mach-at91/arm926ejs/at91sam9x5_devices.c +++ b/arch/arm/mach-at91/arm926ejs/at91sam9x5_devices.c @@ -3,6 +3,7 @@ * Copyright (C) 2012 Atmel Corporation */ +#include #include #include #include diff --git a/arch/arm/mach-at91/arm926ejs/clock.c b/arch/arm/mach-at91/arm926ejs/clock.c index 241de6a5378..013daf43b74 100644 --- a/arch/arm/mach-at91/arm926ejs/clock.c +++ b/arch/arm/mach-at91/arm926ejs/clock.c @@ -7,8 +7,7 @@ * Copyright (C) 2009 Jean-Christophe PLAGNIOL-VILLARD */ -#include -#include +#include #include #include #include diff --git a/arch/arm/mach-at91/arm926ejs/cpu.c b/arch/arm/mach-at91/arm926ejs/cpu.c index e476cd5bcf3..5e84b0a40e1 100644 --- a/arch/arm/mach-at91/arm926ejs/cpu.c +++ b/arch/arm/mach-at91/arm926ejs/cpu.c @@ -6,7 +6,7 @@ * Jean-Christophe PLAGNIOL-VILLARD */ -#include +#include #include #include #include diff --git a/arch/arm/mach-at91/arm926ejs/eflash.c b/arch/arm/mach-at91/arm926ejs/eflash.c index bb66700566e..aade13cc014 100644 --- a/arch/arm/mach-at91/arm926ejs/eflash.c +++ b/arch/arm/mach-at91/arm926ejs/eflash.c @@ -42,6 +42,7 @@ * someone puts a jffs2 into them) * do a read-modify-write for partially programmed pages */ +#include #include #include #include diff --git a/arch/arm/mach-at91/arm926ejs/reset.c b/arch/arm/mach-at91/arm926ejs/reset.c index 01b2663f96c..6acbfa33011 100644 --- a/arch/arm/mach-at91/arm926ejs/reset.c +++ b/arch/arm/mach-at91/arm926ejs/reset.c @@ -5,6 +5,7 @@ * Lead Tech Design */ +#include #include #include #include diff --git a/arch/arm/mach-at91/arm926ejs/sam9x60_devices.c b/arch/arm/mach-at91/arm926ejs/sam9x60_devices.c index 97c572deaaf..e3d3dd880ca 100644 --- a/arch/arm/mach-at91/arm926ejs/sam9x60_devices.c +++ b/arch/arm/mach-at91/arm926ejs/sam9x60_devices.c @@ -3,6 +3,7 @@ * Copyright (C) 2018 Microchip Technology Inc. and its subsidiaries */ +#include #include #include #include diff --git a/arch/arm/mach-at91/arm926ejs/timer.c b/arch/arm/mach-at91/arm926ejs/timer.c index 137a5e5b8fd..a8cf0e4bd79 100644 --- a/arch/arm/mach-at91/arm926ejs/timer.c +++ b/arch/arm/mach-at91/arm926ejs/timer.c @@ -5,6 +5,7 @@ * Lead Tech Design */ +#include #include #include #include diff --git a/arch/arm/mach-at91/armv7/clock.c b/arch/arm/mach-at91/armv7/clock.c index 5357b4cffc2..6bfa02d1d0a 100644 --- a/arch/arm/mach-at91/armv7/clock.c +++ b/arch/arm/mach-at91/armv7/clock.c @@ -9,7 +9,7 @@ * Copyright (C) 2015 Wenyou Yang */ -#include +#include #include #include #include diff --git a/arch/arm/mach-at91/armv7/cpu.c b/arch/arm/mach-at91/armv7/cpu.c index f4b2f4f351c..5ea7e2609f5 100644 --- a/arch/arm/mach-at91/armv7/cpu.c +++ b/arch/arm/mach-at91/armv7/cpu.c @@ -8,7 +8,7 @@ * Bo Shen */ -#include +#include #include #include #include diff --git a/arch/arm/mach-at91/armv7/sama5d2_devices.c b/arch/arm/mach-at91/armv7/sama5d2_devices.c index 469c2211766..edc20574c31 100644 --- a/arch/arm/mach-at91/armv7/sama5d2_devices.c +++ b/arch/arm/mach-at91/armv7/sama5d2_devices.c @@ -4,6 +4,7 @@ * Wenyou Yang */ +#include #include #include #include diff --git a/arch/arm/mach-at91/armv7/sama5d3_devices.c b/arch/arm/mach-at91/armv7/sama5d3_devices.c index 67b63208eda..04b700a94d7 100644 --- a/arch/arm/mach-at91/armv7/sama5d3_devices.c +++ b/arch/arm/mach-at91/armv7/sama5d3_devices.c @@ -4,6 +4,7 @@ * Bo Shen */ +#include #include #include #include diff --git a/arch/arm/mach-at91/armv7/sama5d4_devices.c b/arch/arm/mach-at91/armv7/sama5d4_devices.c index 76fff9cd466..e68ae994078 100644 --- a/arch/arm/mach-at91/armv7/sama5d4_devices.c +++ b/arch/arm/mach-at91/armv7/sama5d4_devices.c @@ -4,6 +4,7 @@ * Bo Shen */ +#include #include #include #include diff --git a/arch/arm/mach-at91/armv7/timer.c b/arch/arm/mach-at91/armv7/timer.c index bfdb75ce39a..1f54c5dcad9 100644 --- a/arch/arm/mach-at91/armv7/timer.c +++ b/arch/arm/mach-at91/armv7/timer.c @@ -8,6 +8,7 @@ * Bo Shen */ +#include #include #include #include diff --git a/arch/arm/mach-at91/atmel_sfr.c b/arch/arm/mach-at91/atmel_sfr.c index 019ef930022..62108d2bd0a 100644 --- a/arch/arm/mach-at91/atmel_sfr.c +++ b/arch/arm/mach-at91/atmel_sfr.c @@ -4,7 +4,7 @@ * Wenyou Yang */ -#include +#include #include #include #include diff --git a/arch/arm/mach-at91/clock.c b/arch/arm/mach-at91/clock.c index 442b822fe77..8344daeb39a 100644 --- a/arch/arm/mach-at91/clock.c +++ b/arch/arm/mach-at91/clock.c @@ -4,8 +4,8 @@ * Wenyou Yang */ +#include #include -#include #include #include #include diff --git a/arch/arm/mach-at91/include/mach/at91_common.h b/arch/arm/mach-at91/include/mach/at91_common.h index 683e539b1b3..f7b411cf7df 100644 --- a/arch/arm/mach-at91/include/mach/at91_common.h +++ b/arch/arm/mach-at91/include/mach/at91_common.h @@ -8,8 +8,6 @@ #ifndef AT91_COMMON_H #define AT91_COMMON_H -#include - void at91_can_hw_init(void); void at91_gmac_hw_init(void); void at91_macb_hw_init(void); diff --git a/arch/arm/mach-at91/matrix.c b/arch/arm/mach-at91/matrix.c index 3bef5648d4a..2fa8493a0bd 100644 --- a/arch/arm/mach-at91/matrix.c +++ b/arch/arm/mach-at91/matrix.c @@ -4,6 +4,7 @@ * Wenyou Yang */ +#include #include #include #include diff --git a/arch/arm/mach-at91/mpddrc.c b/arch/arm/mach-at91/mpddrc.c index ac6a719d9c0..5422c05456e 100644 --- a/arch/arm/mach-at91/mpddrc.c +++ b/arch/arm/mach-at91/mpddrc.c @@ -7,6 +7,7 @@ * Wenyou Yang */ +#include #include #include #include diff --git a/arch/arm/mach-at91/phy.c b/arch/arm/mach-at91/phy.c index ec38f5bc931..f4484a77c7d 100644 --- a/arch/arm/mach-at91/phy.c +++ b/arch/arm/mach-at91/phy.c @@ -11,7 +11,7 @@ * Copyright (C) 2013 DENX Software Engineering, hs@denx.de */ -#include +#include #include #include #include diff --git a/arch/arm/mach-at91/sdram.c b/arch/arm/mach-at91/sdram.c index be3e91c7dba..6638aa82bb6 100644 --- a/arch/arm/mach-at91/sdram.c +++ b/arch/arm/mach-at91/sdram.c @@ -9,6 +9,7 @@ * Lead Tech Design */ +#include #include #include #include diff --git a/arch/arm/mach-at91/spl.c b/arch/arm/mach-at91/spl.c index 5feb8f73551..8d537998c98 100644 --- a/arch/arm/mach-at91/spl.c +++ b/arch/arm/mach-at91/spl.c @@ -4,6 +4,7 @@ * Bo Shen */ +#include #include #include #include diff --git a/arch/arm/mach-at91/spl_at91.c b/arch/arm/mach-at91/spl_at91.c index cde1700a283..dfba9f730c1 100644 --- a/arch/arm/mach-at91/spl_at91.c +++ b/arch/arm/mach-at91/spl_at91.c @@ -8,7 +8,7 @@ * Bo Shen */ -#include +#include #include #include #include diff --git a/arch/arm/mach-at91/spl_atmel.c b/arch/arm/mach-at91/spl_atmel.c index 62a7df8a195..a30c4f6c075 100644 --- a/arch/arm/mach-at91/spl_atmel.c +++ b/arch/arm/mach-at91/spl_atmel.c @@ -4,7 +4,7 @@ * Bo Shen */ -#include +#include #include #include #include diff --git a/arch/arm/mach-bcm283x/init.c b/arch/arm/mach-bcm283x/init.c index 1b459707bc6..016bc1eb412 100644 --- a/arch/arm/mach-bcm283x/init.c +++ b/arch/arm/mach-bcm283x/init.c @@ -6,6 +6,7 @@ * project. */ +#include #include #include #include diff --git a/arch/arm/mach-bcm283x/mbox.c b/arch/arm/mach-bcm283x/mbox.c index c7cbfa72ffc..da9faafe1dd 100644 --- a/arch/arm/mach-bcm283x/mbox.c +++ b/arch/arm/mach-bcm283x/mbox.c @@ -3,9 +3,9 @@ * (C) Copyright 2012 Stephen Warren */ +#include #include #include -#include #include #include #include diff --git a/arch/arm/mach-bcm283x/msg.c b/arch/arm/mach-bcm283x/msg.c index 4993c0bdb81..2188b38d84b 100644 --- a/arch/arm/mach-bcm283x/msg.c +++ b/arch/arm/mach-bcm283x/msg.c @@ -3,6 +3,7 @@ * (C) Copyright 2012 Stephen Warren */ +#include #include #include #include diff --git a/arch/arm/mach-bcm283x/reset.c b/arch/arm/mach-bcm283x/reset.c index 9199234917f..f13ac0c6375 100644 --- a/arch/arm/mach-bcm283x/reset.c +++ b/arch/arm/mach-bcm283x/reset.c @@ -6,7 +6,7 @@ * project. */ -#include +#include #include #include #include diff --git a/arch/arm/mach-bcmbca/bcm4908/mmu_table.c b/arch/arm/mach-bcmbca/bcm4908/mmu_table.c index ca403bae991..5ab04083cc6 100644 --- a/arch/arm/mach-bcmbca/bcm4908/mmu_table.c +++ b/arch/arm/mach-bcmbca/bcm4908/mmu_table.c @@ -2,6 +2,7 @@ /* * Copyright 2022 Broadcom Ltd. */ +#include #include #include diff --git a/arch/arm/mach-bcmbca/bcm4912/mmu_table.c b/arch/arm/mach-bcmbca/bcm4912/mmu_table.c index b11effe0667..52a53a2c76d 100644 --- a/arch/arm/mach-bcmbca/bcm4912/mmu_table.c +++ b/arch/arm/mach-bcmbca/bcm4912/mmu_table.c @@ -2,6 +2,7 @@ /* * Copyright 2022 Broadcom Ltd. */ +#include #include #include diff --git a/arch/arm/mach-bcmbca/bcm63146/mmu_table.c b/arch/arm/mach-bcmbca/bcm63146/mmu_table.c index a883e74ac00..c6b7a54fbdf 100644 --- a/arch/arm/mach-bcmbca/bcm63146/mmu_table.c +++ b/arch/arm/mach-bcmbca/bcm63146/mmu_table.c @@ -2,6 +2,7 @@ /* * Copyright 2022 Broadcom Ltd. */ +#include #include #include diff --git a/arch/arm/mach-bcmbca/bcm63158/mmu_table.c b/arch/arm/mach-bcmbca/bcm63158/mmu_table.c index eb3cc3e5aec..fe7efb30e22 100644 --- a/arch/arm/mach-bcmbca/bcm63158/mmu_table.c +++ b/arch/arm/mach-bcmbca/bcm63158/mmu_table.c @@ -2,6 +2,7 @@ /* * Copyright 2022 Broadcom Ltd. */ +#include #include #include diff --git a/arch/arm/mach-bcmbca/bcm6813/mmu_table.c b/arch/arm/mach-bcmbca/bcm6813/mmu_table.c index 458624e87aa..eb736bf7d50 100644 --- a/arch/arm/mach-bcmbca/bcm6813/mmu_table.c +++ b/arch/arm/mach-bcmbca/bcm6813/mmu_table.c @@ -2,6 +2,7 @@ /* * Copyright 2022 Broadcom Ltd. */ +#include #include #include diff --git a/arch/arm/mach-bcmbca/bcm6856/mmu_table.c b/arch/arm/mach-bcmbca/bcm6856/mmu_table.c index 83c07727573..8e53b4929eb 100644 --- a/arch/arm/mach-bcmbca/bcm6856/mmu_table.c +++ b/arch/arm/mach-bcmbca/bcm6856/mmu_table.c @@ -2,6 +2,7 @@ /* * Copyright 2022 Broadcom Ltd. */ +#include #include #include diff --git a/arch/arm/mach-bcmbca/bcm6858/mmu_table.c b/arch/arm/mach-bcmbca/bcm6858/mmu_table.c index 82aba326dcb..898291075f5 100644 --- a/arch/arm/mach-bcmbca/bcm6858/mmu_table.c +++ b/arch/arm/mach-bcmbca/bcm6858/mmu_table.c @@ -2,6 +2,7 @@ /* * Copyright 2022 Broadcom Ltd. */ +#include #include #include diff --git a/arch/arm/mach-davinci/cpu.c b/arch/arm/mach-davinci/cpu.c index 7c0a2638977..dae60262f5b 100644 --- a/arch/arm/mach-davinci/cpu.c +++ b/arch/arm/mach-davinci/cpu.c @@ -4,7 +4,7 @@ * Copyright (C) 2009 David Brownell */ -#include +#include #include #include #include diff --git a/arch/arm/mach-davinci/da850_lowlevel.c b/arch/arm/mach-davinci/da850_lowlevel.c index 936b5e11667..08c8f592524 100644 --- a/arch/arm/mach-davinci/da850_lowlevel.c +++ b/arch/arm/mach-davinci/da850_lowlevel.c @@ -5,7 +5,7 @@ * Copyright (C) 2011 * Heiko Schocher, DENX Software Engineering, hs@denx.de. */ -#include +#include #include #include #include diff --git a/arch/arm/mach-davinci/da850_pinmux.c b/arch/arm/mach-davinci/da850_pinmux.c index 4ee3cd0d5b3..f2536c8dd6d 100644 --- a/arch/arm/mach-davinci/da850_pinmux.c +++ b/arch/arm/mach-davinci/da850_pinmux.c @@ -5,6 +5,7 @@ * Copyright (C) 2011 OMICRON electronics GmbH */ +#include #include #include #include diff --git a/arch/arm/mach-davinci/include/mach/davinci_misc.h b/arch/arm/mach-davinci/include/mach/davinci_misc.h index 0d0ad1e593e..1133a23bdee 100644 --- a/arch/arm/mach-davinci/include/mach/davinci_misc.h +++ b/arch/arm/mach-davinci/include/mach/davinci_misc.h @@ -6,7 +6,6 @@ #ifndef __MISC_H #define __MISC_H -#include #include /* pin muxer definitions */ diff --git a/arch/arm/mach-davinci/misc.c b/arch/arm/mach-davinci/misc.c index 6c97e5810cd..cfad28c43d0 100644 --- a/arch/arm/mach-davinci/misc.c +++ b/arch/arm/mach-davinci/misc.c @@ -8,7 +8,7 @@ * Copyright (C) 2004 Texas Instruments. */ -#include +#include #include #include #include diff --git a/arch/arm/mach-davinci/pinmux.c b/arch/arm/mach-davinci/pinmux.c index 5ecb434b03b..7904257b4a4 100644 --- a/arch/arm/mach-davinci/pinmux.c +++ b/arch/arm/mach-davinci/pinmux.c @@ -8,6 +8,7 @@ * Copyright (C) 2004 Texas Instruments. */ +#include #include #include #include diff --git a/arch/arm/mach-davinci/psc.c b/arch/arm/mach-davinci/psc.c index 90b817860a6..dae10aa03bb 100644 --- a/arch/arm/mach-davinci/psc.c +++ b/arch/arm/mach-davinci/psc.c @@ -7,6 +7,7 @@ * Copyright (C) 2004 Texas Instruments. */ +#include #include #include diff --git a/arch/arm/mach-davinci/reset.c b/arch/arm/mach-davinci/reset.c index e3e2c56a676..0d59eb6e3ce 100644 --- a/arch/arm/mach-davinci/reset.c +++ b/arch/arm/mach-davinci/reset.c @@ -6,6 +6,7 @@ * Copyright (C) 2007 Sergey Kubushyn */ +#include #include #include #include diff --git a/arch/arm/mach-davinci/spl.c b/arch/arm/mach-davinci/spl.c index 8c6cf9c2192..5f5b9ebbf97 100644 --- a/arch/arm/mach-davinci/spl.c +++ b/arch/arm/mach-davinci/spl.c @@ -3,10 +3,12 @@ * Copyright (C) 2011 * Heiko Schocher, DENX Software Engineering, hs@denx.de. */ +#include #include #include #include #include +#include #include #include #include diff --git a/arch/arm/mach-davinci/timer.c b/arch/arm/mach-davinci/timer.c index f2990f71877..83c190b620e 100644 --- a/arch/arm/mach-davinci/timer.c +++ b/arch/arm/mach-davinci/timer.c @@ -20,7 +20,7 @@ * Copyright (C) 2007 Sergey Kubushyn */ -#include +#include #include #include #include diff --git a/arch/arm/mach-exynos/clock.c b/arch/arm/mach-exynos/clock.c index ee71b95237d..f91f2ee862d 100644 --- a/arch/arm/mach-exynos/clock.c +++ b/arch/arm/mach-exynos/clock.c @@ -4,10 +4,9 @@ * Minkyu Kang */ +#include #include #include -#include -#include #include #include #include diff --git a/arch/arm/mach-exynos/clock_init_exynos4.c b/arch/arm/mach-exynos/clock_init_exynos4.c index 95ed1956a07..584e4bac09f 100644 --- a/arch/arm/mach-exynos/clock_init_exynos4.c +++ b/arch/arm/mach-exynos/clock_init_exynos4.c @@ -23,6 +23,7 @@ * MA 02111-1307 USA */ +#include #include #include #include diff --git a/arch/arm/mach-exynos/clock_init_exynos5.c b/arch/arm/mach-exynos/clock_init_exynos5.c index 232a2482dc6..1cb8d391e7c 100644 --- a/arch/arm/mach-exynos/clock_init_exynos5.c +++ b/arch/arm/mach-exynos/clock_init_exynos5.c @@ -5,6 +5,7 @@ * Copyright (C) 2012 Samsung Electronics */ +#include #include #include #include diff --git a/arch/arm/mach-exynos/common_setup.h b/arch/arm/mach-exynos/common_setup.h index 4f56160ee50..d7f02231fdf 100644 --- a/arch/arm/mach-exynos/common_setup.h +++ b/arch/arm/mach-exynos/common_setup.h @@ -23,8 +23,6 @@ * MA 02111-1307 USA */ -#include -#include #include #define DMC_OFFSET 0x10000 diff --git a/arch/arm/mach-exynos/dmc_common.c b/arch/arm/mach-exynos/dmc_common.c index a96ded443b9..44923dd5520 100644 --- a/arch/arm/mach-exynos/dmc_common.c +++ b/arch/arm/mach-exynos/dmc_common.c @@ -5,7 +5,7 @@ * Copyright (C) 2012 Samsung Electronics */ -#include +#include #include #include "clock_init.h" diff --git a/arch/arm/mach-exynos/dmc_init_ddr3.c b/arch/arm/mach-exynos/dmc_init_ddr3.c index 193de4c3a59..cad8ccc5315 100644 --- a/arch/arm/mach-exynos/dmc_init_ddr3.c +++ b/arch/arm/mach-exynos/dmc_init_ddr3.c @@ -5,6 +5,7 @@ * Copyright (C) 2012 Samsung Electronics */ +#include #include #include #include diff --git a/arch/arm/mach-exynos/exynos5_setup.h b/arch/arm/mach-exynos/exynos5_setup.h index 4e508edba0c..e9874a8c1b2 100644 --- a/arch/arm/mach-exynos/exynos5_setup.h +++ b/arch/arm/mach-exynos/exynos5_setup.h @@ -8,7 +8,6 @@ #ifndef _SMDK5250_SETUP_H #define _SMDK5250_SETUP_H -#include #include #define NOT_AVAILABLE 0 diff --git a/arch/arm/mach-exynos/include/mach/power.h b/arch/arm/mach-exynos/include/mach/power.h index 757e1586bde..a3d8974dcb5 100644 --- a/arch/arm/mach-exynos/include/mach/power.h +++ b/arch/arm/mach-exynos/include/mach/power.h @@ -8,8 +8,6 @@ #define __ASM_ARM_ARCH_POWER_H_ #ifndef __ASSEMBLY__ -#include - struct exynos4_power { unsigned int om_stat; unsigned char res1[0x8]; diff --git a/arch/arm/mach-exynos/lowlevel_init.c b/arch/arm/mach-exynos/lowlevel_init.c index 0967ab995a9..c57b8aee798 100644 --- a/arch/arm/mach-exynos/lowlevel_init.c +++ b/arch/arm/mach-exynos/lowlevel_init.c @@ -23,6 +23,7 @@ * MA 02111-1307 USA */ +#include #include #include #include diff --git a/arch/arm/mach-exynos/mmu-arm64.c b/arch/arm/mach-exynos/mmu-arm64.c index e2f32547adf..30e522804fb 100644 --- a/arch/arm/mach-exynos/mmu-arm64.c +++ b/arch/arm/mach-exynos/mmu-arm64.c @@ -4,6 +4,7 @@ * Thomas Abraham */ +#include #include #include diff --git a/arch/arm/mach-exynos/pinmux.c b/arch/arm/mach-exynos/pinmux.c index 4061dd4aafa..ad3fbf2da7a 100644 --- a/arch/arm/mach-exynos/pinmux.c +++ b/arch/arm/mach-exynos/pinmux.c @@ -4,6 +4,7 @@ * Abhilash Kesavan */ +#include #include #include #include diff --git a/arch/arm/mach-exynos/power.c b/arch/arm/mach-exynos/power.c index 599d3ccff60..f2a6c00dd62 100644 --- a/arch/arm/mach-exynos/power.c +++ b/arch/arm/mach-exynos/power.c @@ -4,7 +4,7 @@ * Donghwa Lee */ -#include +#include #include #include diff --git a/arch/arm/mach-exynos/soc.c b/arch/arm/mach-exynos/soc.c index be18f181a7a..aff2b5e1b6e 100644 --- a/arch/arm/mach-exynos/soc.c +++ b/arch/arm/mach-exynos/soc.c @@ -4,6 +4,7 @@ * Minkyu Kang */ +#include #include #include #include diff --git a/arch/arm/mach-exynos/spl_boot.c b/arch/arm/mach-exynos/spl_boot.c index bd5a06447b9..553dac75b61 100644 --- a/arch/arm/mach-exynos/spl_boot.c +++ b/arch/arm/mach-exynos/spl_boot.c @@ -3,6 +3,7 @@ * Copyright (C) 2012 Samsung Electronics */ +#include #include #include #include diff --git a/arch/arm/mach-exynos/system.c b/arch/arm/mach-exynos/system.c index f5090613c0d..12d0d8fd34a 100644 --- a/arch/arm/mach-exynos/system.c +++ b/arch/arm/mach-exynos/system.c @@ -4,7 +4,7 @@ * Donghwa Lee */ -#include +#include #include #include diff --git a/arch/arm/mach-exynos/tzpc.c b/arch/arm/mach-exynos/tzpc.c index 320a0cf3513..abe8e7f4589 100644 --- a/arch/arm/mach-exynos/tzpc.c +++ b/arch/arm/mach-exynos/tzpc.c @@ -5,7 +5,7 @@ * Copyright (C) 2012 Samsung Electronics */ -#include +#include #include #include diff --git a/arch/arm/mach-highbank/timer.c b/arch/arm/mach-highbank/timer.c index 32ec6f0ac0e..2423a0e3785 100644 --- a/arch/arm/mach-highbank/timer.c +++ b/arch/arm/mach-highbank/timer.c @@ -5,6 +5,7 @@ * Based on arm926ejs/mx27/timer.c */ +#include #include #include #include diff --git a/arch/arm/mach-histb/board_common.c b/arch/arm/mach-histb/board_common.c index 84d02c9aca2..a26c2066e02 100644 --- a/arch/arm/mach-histb/board_common.c +++ b/arch/arm/mach-histb/board_common.c @@ -5,6 +5,7 @@ * (C) Copyright 2023 Yang Xiwen */ +#include #include #include #include diff --git a/arch/arm/mach-histb/sysmap-histb.c b/arch/arm/mach-histb/sysmap-histb.c index 76414558379..83a2bb94179 100644 --- a/arch/arm/mach-histb/sysmap-histb.c +++ b/arch/arm/mach-histb/sysmap-histb.c @@ -5,6 +5,7 @@ * (C) Copyright 2023 Yang Xiwen */ +#include #include static struct mm_region histb_mem_map[] = { diff --git a/arch/arm/mach-imx/cache.c b/arch/arm/mach-imx/cache.c index b368db49fce..ab9b621a2a6 100644 --- a/arch/arm/mach-imx/cache.c +++ b/arch/arm/mach-imx/cache.c @@ -3,7 +3,7 @@ * Copyright 2015 Freescale Semiconductor, Inc. */ -#include +#include #include #include #include diff --git a/arch/arm/mach-imx/cmd_bmode.c b/arch/arm/mach-imx/cmd_bmode.c index c20e80725f8..5b2f4686230 100644 --- a/arch/arm/mach-imx/cmd_bmode.c +++ b/arch/arm/mach-imx/cmd_bmode.c @@ -2,6 +2,7 @@ /* * Copyright (C) 2012 Boundary Devices Inc. */ +#include #include #include #include diff --git a/arch/arm/mach-imx/cmd_dek.c b/arch/arm/mach-imx/cmd_dek.c index c7962ead2d5..2f389dbe8df 100644 --- a/arch/arm/mach-imx/cmd_dek.c +++ b/arch/arm/mach-imx/cmd_dek.c @@ -6,7 +6,7 @@ * Command for encapsulating DEK blob */ -#include +#include #include #include #include @@ -17,7 +17,6 @@ #include #include #include -#include #ifdef CONFIG_IMX_SECO_DEK_ENCAP #include #include diff --git a/arch/arm/mach-imx/cmd_hdmidet.c b/arch/arm/mach-imx/cmd_hdmidet.c index 8104ab26b08..e2571adfb00 100644 --- a/arch/arm/mach-imx/cmd_hdmidet.c +++ b/arch/arm/mach-imx/cmd_hdmidet.c @@ -2,6 +2,7 @@ /* * Copyright (C) 2012 Boundary Devices Inc. */ +#include #include #include #include diff --git a/arch/arm/mach-imx/cmd_mfgprot.c b/arch/arm/mach-imx/cmd_mfgprot.c index 9925c992268..9576b48dde3 100644 --- a/arch/arm/mach-imx/cmd_mfgprot.c +++ b/arch/arm/mach-imx/cmd_mfgprot.c @@ -11,7 +11,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/arch/arm/mach-imx/cmd_nandbcb.c b/arch/arm/mach-imx/cmd_nandbcb.c index c2e452b6927..70a213a49dd 100644 --- a/arch/arm/mach-imx/cmd_nandbcb.c +++ b/arch/arm/mach-imx/cmd_nandbcb.c @@ -11,6 +11,7 @@ * SPDX-License-Identifier: GPL-2.0+ */ +#include #include #include #include diff --git a/arch/arm/mach-imx/cpu.c b/arch/arm/mach-imx/cpu.c index ceee31eecd7..488638c9058 100644 --- a/arch/arm/mach-imx/cpu.c +++ b/arch/arm/mach-imx/cpu.c @@ -7,6 +7,7 @@ */ #include +#include #include #include #include diff --git a/arch/arm/mach-imx/ddrmc-vf610-calibration.c b/arch/arm/mach-imx/ddrmc-vf610-calibration.c index 2cf684322ea..7d787d04598 100644 --- a/arch/arm/mach-imx/ddrmc-vf610-calibration.c +++ b/arch/arm/mach-imx/ddrmc-vf610-calibration.c @@ -7,6 +7,7 @@ * */ /* #define DEBUG */ +#include #include #include #include diff --git a/arch/arm/mach-imx/ddrmc-vf610.c b/arch/arm/mach-imx/ddrmc-vf610.c index e449fa6f552..7895ee66f8a 100644 --- a/arch/arm/mach-imx/ddrmc-vf610.c +++ b/arch/arm/mach-imx/ddrmc-vf610.c @@ -6,6 +6,7 @@ * Copyright 2013 Freescale Semiconductor, Inc. */ +#include #include #include #include diff --git a/arch/arm/mach-imx/ele_ahab.c b/arch/arm/mach-imx/ele_ahab.c index c13d9f0e00e..d02316ed6cb 100644 --- a/arch/arm/mach-imx/ele_ahab.c +++ b/arch/arm/mach-imx/ele_ahab.c @@ -3,6 +3,7 @@ * Copyright 2022 NXP */ +#include #include #include #include diff --git a/arch/arm/mach-imx/hab.c b/arch/arm/mach-imx/hab.c index 85d90686f68..27e053ef701 100644 --- a/arch/arm/mach-imx/hab.c +++ b/arch/arm/mach-imx/hab.c @@ -3,6 +3,7 @@ * Copyright (C) 2010-2015 Freescale Semiconductor, Inc. */ +#include #include #include #include diff --git a/arch/arm/mach-imx/i2c-mxv7.c b/arch/arm/mach-imx/i2c-mxv7.c index 256db150818..a5866cf9f70 100644 --- a/arch/arm/mach-imx/i2c-mxv7.c +++ b/arch/arm/mach-imx/i2c-mxv7.c @@ -2,8 +2,8 @@ /* * Copyright (C) 2012 Boundary Devices Inc. */ +#include #include -#include #include #include #include diff --git a/arch/arm/mach-imx/image-container.c b/arch/arm/mach-imx/image-container.c index e2388e3fef8..35da0ae0425 100644 --- a/arch/arm/mach-imx/image-container.c +++ b/arch/arm/mach-imx/image-container.c @@ -3,7 +3,7 @@ * Copyright 2019 NXP */ -#include +#include #include #include #include diff --git a/arch/arm/mach-imx/imx8/ahab.c b/arch/arm/mach-imx/imx8/ahab.c index ed44df394b1..1c072f6af11 100644 --- a/arch/arm/mach-imx/imx8/ahab.c +++ b/arch/arm/mach-imx/imx8/ahab.c @@ -3,6 +3,7 @@ * Copyright 2018-2019, 2022 NXP */ +#include #include #include #include diff --git a/arch/arm/mach-imx/imx8/clock.c b/arch/arm/mach-imx/imx8/clock.c index 4e49b5bf375..9941b57b4be 100644 --- a/arch/arm/mach-imx/imx8/clock.c +++ b/arch/arm/mach-imx/imx8/clock.c @@ -3,6 +3,7 @@ * Copyright 2018 NXP */ +#include #include #include #include diff --git a/arch/arm/mach-imx/imx8/cpu.c b/arch/arm/mach-imx/imx8/cpu.c index 627baa1d83f..6e643188f40 100644 --- a/arch/arm/mach-imx/imx8/cpu.c +++ b/arch/arm/mach-imx/imx8/cpu.c @@ -3,6 +3,7 @@ * Copyright 2018, 2021 NXP */ +#include #include #include #include diff --git a/arch/arm/mach-imx/imx8/fdt.c b/arch/arm/mach-imx/imx8/fdt.c index 6d0585f5cc6..c2bed3e0c1f 100644 --- a/arch/arm/mach-imx/imx8/fdt.c +++ b/arch/arm/mach-imx/imx8/fdt.c @@ -3,6 +3,7 @@ * Copyright 2019 NXP */ +#include #include #include #include diff --git a/arch/arm/mach-imx/imx8/iomux.c b/arch/arm/mach-imx/imx8/iomux.c index 3e27d75827a..e4f7651bd1d 100644 --- a/arch/arm/mach-imx/imx8/iomux.c +++ b/arch/arm/mach-imx/imx8/iomux.c @@ -3,6 +3,7 @@ * Copyright 2018 NXP */ +#include #include #include #include diff --git a/arch/arm/mach-imx/imx8/misc.c b/arch/arm/mach-imx/imx8/misc.c index c77104d0338..0ce3036818b 100644 --- a/arch/arm/mach-imx/imx8/misc.c +++ b/arch/arm/mach-imx/imx8/misc.c @@ -1,4 +1,5 @@ // SPDX-License-Identifier: GPL-2.0+ +#include #include #include #include diff --git a/arch/arm/mach-imx/imx8/snvs_security_sc.c b/arch/arm/mach-imx/imx8/snvs_security_sc.c index f13dfc15516..1eaa68f8d5f 100644 --- a/arch/arm/mach-imx/imx8/snvs_security_sc.c +++ b/arch/arm/mach-imx/imx8/snvs_security_sc.c @@ -14,6 +14,7 @@ #include #include #include +#include #include #include #include diff --git a/arch/arm/mach-imx/imx8m/clock_imx8mm.c b/arch/arm/mach-imx/imx8m/clock_imx8mm.c index de630e940c9..47219957b58 100644 --- a/arch/arm/mach-imx/imx8m/clock_imx8mm.c +++ b/arch/arm/mach-imx/imx8m/clock_imx8mm.c @@ -5,6 +5,7 @@ * Peng Fan */ +#include #include #include #include diff --git a/arch/arm/mach-imx/imx8m/clock_imx8mq.c b/arch/arm/mach-imx/imx8m/clock_imx8mq.c index 7e6c3748716..9db62b944e4 100644 --- a/arch/arm/mach-imx/imx8m/clock_imx8mq.c +++ b/arch/arm/mach-imx/imx8m/clock_imx8mq.c @@ -5,6 +5,7 @@ * Peng Fan */ +#include #include #include #include diff --git a/arch/arm/mach-imx/imx8m/clock_slice.c b/arch/arm/mach-imx/imx8m/clock_slice.c index 7cfdc46d349..b5ed27a923e 100644 --- a/arch/arm/mach-imx/imx8m/clock_slice.c +++ b/arch/arm/mach-imx/imx8m/clock_slice.c @@ -5,6 +5,7 @@ * Peng Fan */ +#include #include #include #include diff --git a/arch/arm/mach-imx/imx8m/psci.c b/arch/arm/mach-imx/imx8m/psci.c index f5644c642bd..62f0b768cfa 100644 --- a/arch/arm/mach-imx/imx8m/psci.c +++ b/arch/arm/mach-imx/imx8m/psci.c @@ -10,6 +10,7 @@ #include #include #include +#include #include #include #include diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-imx/imx8m/soc.c index be38ca52885..0c49fb9cd48 100644 --- a/arch/arm/mach-imx/imx8m/soc.c +++ b/arch/arm/mach-imx/imx8m/soc.c @@ -5,7 +5,7 @@ * Peng Fan */ -#include +#include #include #include #include diff --git a/arch/arm/mach-imx/imx8ulp/cgc.c b/arch/arm/mach-imx/imx8ulp/cgc.c index f9d8ed5b048..d2fadb4877c 100644 --- a/arch/arm/mach-imx/imx8ulp/cgc.c +++ b/arch/arm/mach-imx/imx8ulp/cgc.c @@ -3,6 +3,7 @@ * Copyright 2021 NXP */ +#include #include #include #include diff --git a/arch/arm/mach-imx/imx8ulp/clock.c b/arch/arm/mach-imx/imx8ulp/clock.c index fadf165ece2..36d12943a05 100644 --- a/arch/arm/mach-imx/imx8ulp/clock.c +++ b/arch/arm/mach-imx/imx8ulp/clock.c @@ -3,6 +3,7 @@ * Copyright 2020 NXP */ +#include #include #include #include diff --git a/arch/arm/mach-imx/imx8ulp/iomux.c b/arch/arm/mach-imx/imx8ulp/iomux.c index 43f856bf732..c6d20f54680 100644 --- a/arch/arm/mach-imx/imx8ulp/iomux.c +++ b/arch/arm/mach-imx/imx8ulp/iomux.c @@ -3,6 +3,7 @@ * Copyright 2020-2021 NXP */ +#include #include #include #include diff --git a/arch/arm/mach-imx/imx8ulp/pcc.c b/arch/arm/mach-imx/imx8ulp/pcc.c index 449e496521f..e3c6d6760be 100644 --- a/arch/arm/mach-imx/imx8ulp/pcc.c +++ b/arch/arm/mach-imx/imx8ulp/pcc.c @@ -3,6 +3,7 @@ * Copyright 2021 NXP */ +#include #include #include #include diff --git a/arch/arm/mach-imx/imx8ulp/rdc.c b/arch/arm/mach-imx/imx8ulp/rdc.c index ca657748ed9..cfc09e79cbd 100644 --- a/arch/arm/mach-imx/imx8ulp/rdc.c +++ b/arch/arm/mach-imx/imx8ulp/rdc.c @@ -3,8 +3,7 @@ * Copyright 2021 NXP */ -#include -#include +#include #include #include #include diff --git a/arch/arm/mach-imx/imx9/clock.c b/arch/arm/mach-imx/imx9/clock.c index 0abf4579a1e..75d92af036a 100644 --- a/arch/arm/mach-imx/imx9/clock.c +++ b/arch/arm/mach-imx/imx9/clock.c @@ -5,6 +5,7 @@ * Peng Fan */ +#include #include #include #include diff --git a/arch/arm/mach-imx/imx9/clock_root.c b/arch/arm/mach-imx/imx9/clock_root.c index 47106fffefb..7d7ae865946 100644 --- a/arch/arm/mach-imx/imx9/clock_root.c +++ b/arch/arm/mach-imx/imx9/clock_root.c @@ -5,7 +5,7 @@ * Peng Fan */ -#include +#include #include #include #include diff --git a/arch/arm/mach-imx/imx9/imx_bootaux.c b/arch/arm/mach-imx/imx9/imx_bootaux.c index 73f2e72263d..6afb59e0515 100644 --- a/arch/arm/mach-imx/imx9/imx_bootaux.c +++ b/arch/arm/mach-imx/imx9/imx_bootaux.c @@ -3,12 +3,11 @@ * Copyright 2022 NXP */ +#include #include #include #include -#include #include -#include int arch_auxiliary_core_check_up(u32 core_id) { diff --git a/arch/arm/mach-imx/imx9/soc.c b/arch/arm/mach-imx/imx9/soc.c index 32208220b20..2117489f232 100644 --- a/arch/arm/mach-imx/imx9/soc.c +++ b/arch/arm/mach-imx/imx9/soc.c @@ -5,7 +5,7 @@ * Peng Fan */ -#include +#include #include #include #include diff --git a/arch/arm/mach-imx/imx9/trdc.c b/arch/arm/mach-imx/imx9/trdc.c index 8cdb28459a3..d0f855bb1bc 100644 --- a/arch/arm/mach-imx/imx9/trdc.c +++ b/arch/arm/mach-imx/imx9/trdc.c @@ -3,8 +3,8 @@ * Copyright 2022 NXP */ +#include #include -#include #include #include #include diff --git a/arch/arm/mach-imx/imx_bootaux.c b/arch/arm/mach-imx/imx_bootaux.c index 26374fdc33e..f7b14ca38d9 100644 --- a/arch/arm/mach-imx/imx_bootaux.c +++ b/arch/arm/mach-imx/imx_bootaux.c @@ -3,18 +3,15 @@ * Copyright (C) 2016 Freescale Semiconductor, Inc. */ +#include #include -#include #include #include #include #include #include -#include #include #include -#include -#include #include #ifndef CONFIG_IMX8 diff --git a/arch/arm/mach-imx/imxrt/soc.c b/arch/arm/mach-imx/imxrt/soc.c index 3028957953b..34162a3976f 100644 --- a/arch/arm/mach-imx/imxrt/soc.c +++ b/arch/arm/mach-imx/imxrt/soc.c @@ -4,6 +4,7 @@ * Author(s): Giulio Benetti */ +#include #include #include #include diff --git a/arch/arm/mach-imx/iomux-v3.c b/arch/arm/mach-imx/iomux-v3.c index c134e95ed78..18131a20f43 100644 --- a/arch/arm/mach-imx/iomux-v3.c +++ b/arch/arm/mach-imx/iomux-v3.c @@ -7,6 +7,7 @@ * * Copyright (C) 2004-2011 Freescale Semiconductor, Inc. */ +#include #include #include #include diff --git a/arch/arm/mach-imx/mac.c b/arch/arm/mach-imx/mac.c index e739fd14c89..9bb63d25b48 100644 --- a/arch/arm/mach-imx/mac.c +++ b/arch/arm/mach-imx/mac.c @@ -5,6 +5,7 @@ * Peng Fan */ +#include #include #include #include diff --git a/arch/arm/mach-imx/misc.c b/arch/arm/mach-imx/misc.c index 7452b82f110..09a758ff6e8 100644 --- a/arch/arm/mach-imx/misc.c +++ b/arch/arm/mach-imx/misc.c @@ -3,6 +3,7 @@ * Copyright 2013 Stefan Roese */ +#include #include #include #include diff --git a/arch/arm/mach-imx/mmc_env.c b/arch/arm/mach-imx/mmc_env.c index 34a7d1706f3..9c822f721c6 100644 --- a/arch/arm/mach-imx/mmc_env.c +++ b/arch/arm/mach-imx/mmc_env.c @@ -3,6 +3,7 @@ * Copyright (C) 2017 NXP */ +#include #include #include #include diff --git a/arch/arm/mach-imx/mmdc_size.c b/arch/arm/mach-imx/mmdc_size.c index 2b1d203f863..41a5af6bd30 100644 --- a/arch/arm/mach-imx/mmdc_size.c +++ b/arch/arm/mach-imx/mmdc_size.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ -#include +#include #include #if defined(CONFIG_MX53) diff --git a/arch/arm/mach-imx/mx5/clock.c b/arch/arm/mach-imx/mx5/clock.c index 0b8a10fd729..bbaddd5a33f 100644 --- a/arch/arm/mach-imx/mx5/clock.c +++ b/arch/arm/mach-imx/mx5/clock.c @@ -6,6 +6,7 @@ * (C) Copyright 2009 Freescale Semiconductor, Inc. */ +#include #include #include #include diff --git a/arch/arm/mach-imx/mx5/mx53_dram.c b/arch/arm/mach-imx/mx5/mx53_dram.c index 180a745d435..f7441441947 100644 --- a/arch/arm/mach-imx/mx5/mx53_dram.c +++ b/arch/arm/mach-imx/mx5/mx53_dram.c @@ -4,6 +4,7 @@ * Patrick Bruenn */ +#include #include #include diff --git a/arch/arm/mach-imx/mx5/soc.c b/arch/arm/mach-imx/mx5/soc.c index 4df5f9c1641..47f531dc856 100644 --- a/arch/arm/mach-imx/mx5/soc.c +++ b/arch/arm/mach-imx/mx5/soc.c @@ -6,6 +6,7 @@ * (C) Copyright 2009 Freescale Semiconductor, Inc. */ +#include #include #include #include diff --git a/arch/arm/mach-imx/mx6/clock.c b/arch/arm/mach-imx/mx6/clock.c index fb9f56d2e63..e0da9c23958 100644 --- a/arch/arm/mach-imx/mx6/clock.c +++ b/arch/arm/mach-imx/mx6/clock.c @@ -3,10 +3,10 @@ * Copyright (C) 2010-2011 Freescale Semiconductor, Inc. */ +#include #include #include #include -#include #include #include #include diff --git a/arch/arm/mach-imx/mx6/ddr.c b/arch/arm/mach-imx/mx6/ddr.c index 5a1258e002d..3c87c577737 100644 --- a/arch/arm/mach-imx/mx6/ddr.c +++ b/arch/arm/mach-imx/mx6/ddr.c @@ -4,6 +4,7 @@ * Author: Tim Harvey */ +#include #include #include #include diff --git a/arch/arm/mach-imx/mx6/litesom.c b/arch/arm/mach-imx/mx6/litesom.c index ab5de266577..2ba3245e226 100644 --- a/arch/arm/mach-imx/mx6/litesom.c +++ b/arch/arm/mach-imx/mx6/litesom.c @@ -17,7 +17,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/arch/arm/mach-imx/mx6/module_fuse.c b/arch/arm/mach-imx/mx6/module_fuse.c index 8b23d48a854..b58f11c1e56 100644 --- a/arch/arm/mach-imx/mx6/module_fuse.c +++ b/arch/arm/mach-imx/mx6/module_fuse.c @@ -3,6 +3,7 @@ * Copyright 2019 NXP */ +#include #include #include #include diff --git a/arch/arm/mach-imx/mx6/mp.c b/arch/arm/mach-imx/mx6/mp.c index 091a3723831..de9ace083ce 100644 --- a/arch/arm/mach-imx/mx6/mp.c +++ b/arch/arm/mach-imx/mx6/mp.c @@ -6,6 +6,7 @@ * (C) Copyright 2009 Freescale Semiconductor, Inc. */ +#include #include #include #include diff --git a/arch/arm/mach-imx/mx6/opos6ul.c b/arch/arm/mach-imx/mx6/opos6ul.c index 340e6147b63..38ead8ace20 100644 --- a/arch/arm/mach-imx/mx6/opos6ul.c +++ b/arch/arm/mach-imx/mx6/opos6ul.c @@ -10,7 +10,7 @@ #include #include #include -#include +#include #include DECLARE_GLOBAL_DATA_PTR; diff --git a/arch/arm/mach-imx/mx6/soc.c b/arch/arm/mach-imx/mx6/soc.c index 3a3e01f3d0a..c2875e727c9 100644 --- a/arch/arm/mach-imx/mx6/soc.c +++ b/arch/arm/mach-imx/mx6/soc.c @@ -7,6 +7,7 @@ * Copyright 2021 NXP */ +#include #include #include #include diff --git a/arch/arm/mach-imx/mx7/clock.c b/arch/arm/mach-imx/mx7/clock.c index a8606fa9b24..4e232385afc 100644 --- a/arch/arm/mach-imx/mx7/clock.c +++ b/arch/arm/mach-imx/mx7/clock.c @@ -6,12 +6,11 @@ * Peng Fan */ -#include +#include #include #include #include #include -#include #include #include #include diff --git a/arch/arm/mach-imx/mx7/clock_slice.c b/arch/arm/mach-imx/mx7/clock_slice.c index 2a1304fc112..dd731d94962 100644 --- a/arch/arm/mach-imx/mx7/clock_slice.c +++ b/arch/arm/mach-imx/mx7/clock_slice.c @@ -6,6 +6,7 @@ * Peng Fan */ +#include #include #include #include diff --git a/arch/arm/mach-imx/mx7/ddr.c b/arch/arm/mach-imx/mx7/ddr.c index c4a90be3945..cf25569765e 100644 --- a/arch/arm/mach-imx/mx7/ddr.c +++ b/arch/arm/mach-imx/mx7/ddr.c @@ -12,6 +12,7 @@ #include #include #include +#include #include /* diff --git a/arch/arm/mach-imx/mx7/psci-mx7.c b/arch/arm/mach-imx/mx7/psci-mx7.c index 12d6a63b925..0b71fa40344 100644 --- a/arch/arm/mach-imx/mx7/psci-mx7.c +++ b/arch/arm/mach-imx/mx7/psci-mx7.c @@ -13,6 +13,7 @@ #include #include #include +#include #include #define GPC_LPCR_A7_BSC 0x0 diff --git a/arch/arm/mach-imx/mx7/soc.c b/arch/arm/mach-imx/mx7/soc.c index 16c77cbf7be..689dbefe8ee 100644 --- a/arch/arm/mach-imx/mx7/soc.c +++ b/arch/arm/mach-imx/mx7/soc.c @@ -4,6 +4,7 @@ * Copyright 2021 NXP */ +#include #include #include #include diff --git a/arch/arm/mach-imx/mx7ulp/clock.c b/arch/arm/mach-imx/mx7ulp/clock.c index fb19c62a520..37d8565c20f 100644 --- a/arch/arm/mach-imx/mx7ulp/clock.c +++ b/arch/arm/mach-imx/mx7ulp/clock.c @@ -3,7 +3,7 @@ * Copyright (C) 2016 Freescale Semiconductor, Inc. */ -#include +#include #include #include #include diff --git a/arch/arm/mach-imx/mx7ulp/iomux.c b/arch/arm/mach-imx/mx7ulp/iomux.c index 2c87a8c18b9..05ddeed2a64 100644 --- a/arch/arm/mach-imx/mx7ulp/iomux.c +++ b/arch/arm/mach-imx/mx7ulp/iomux.c @@ -2,6 +2,7 @@ /* * Copyright (C) 2016 Freescale Semiconductor, Inc. */ +#include #include #include #include diff --git a/arch/arm/mach-imx/mx7ulp/pcc.c b/arch/arm/mach-imx/mx7ulp/pcc.c index 0bfd8f71815..aa7ea86a443 100644 --- a/arch/arm/mach-imx/mx7ulp/pcc.c +++ b/arch/arm/mach-imx/mx7ulp/pcc.c @@ -3,6 +3,7 @@ * Copyright (C) 2016 Freescale Semiconductor, Inc. */ +#include #include #include #include diff --git a/arch/arm/mach-imx/mx7ulp/scg.c b/arch/arm/mach-imx/mx7ulp/scg.c index d4fb5389cac..4c066557c1c 100644 --- a/arch/arm/mach-imx/mx7ulp/scg.c +++ b/arch/arm/mach-imx/mx7ulp/scg.c @@ -3,7 +3,7 @@ * Copyright (C) 2016 Freescale Semiconductor, Inc. */ -#include +#include #include #include #include diff --git a/arch/arm/mach-imx/mx7ulp/soc.c b/arch/arm/mach-imx/mx7ulp/soc.c index 198ae2d919c..217b7c45867 100644 --- a/arch/arm/mach-imx/mx7ulp/soc.c +++ b/arch/arm/mach-imx/mx7ulp/soc.c @@ -4,7 +4,7 @@ * Copyright 2021 NXP */ -#include +#include #include #include #include diff --git a/arch/arm/mach-imx/priblob.c b/arch/arm/mach-imx/priblob.c index 65924483bc8..5b022d5c820 100644 --- a/arch/arm/mach-imx/priblob.c +++ b/arch/arm/mach-imx/priblob.c @@ -11,6 +11,7 @@ */ #include +#include #include #include diff --git a/arch/arm/mach-imx/rdc-sema.c b/arch/arm/mach-imx/rdc-sema.c index 56725cc109f..e683673753e 100644 --- a/arch/arm/mach-imx/rdc-sema.c +++ b/arch/arm/mach-imx/rdc-sema.c @@ -2,6 +2,7 @@ /* * Copyright (C) 2016 Freescale Semiconductor, Inc. */ +#include #include #include #include diff --git a/arch/arm/mach-imx/speed.c b/arch/arm/mach-imx/speed.c index 98a42b22f9c..0e81cc880a1 100644 --- a/arch/arm/mach-imx/speed.c +++ b/arch/arm/mach-imx/speed.c @@ -7,7 +7,7 @@ * TsiChung Liew (Tsi-Chung.Liew@freescale.com) */ -#include +#include #include #include #include diff --git a/arch/arm/mach-imx/spl.c b/arch/arm/mach-imx/spl.c index bc291dcd129..b30cd962553 100644 --- a/arch/arm/mach-imx/spl.c +++ b/arch/arm/mach-imx/spl.c @@ -6,7 +6,7 @@ * Author: Tim Harvey */ -#include +#include #include #include #include diff --git a/arch/arm/mach-imx/spl_imx_romapi.c b/arch/arm/mach-imx/spl_imx_romapi.c index 9a86f5c133f..b9ff9bb83b3 100644 --- a/arch/arm/mach-imx/spl_imx_romapi.c +++ b/arch/arm/mach-imx/spl_imx_romapi.c @@ -3,6 +3,7 @@ * Copyright 2019 NXP */ +#include #include #include #include diff --git a/arch/arm/mach-imx/syscounter.c b/arch/arm/mach-imx/syscounter.c index 922f851c56b..16df1186759 100644 --- a/arch/arm/mach-imx/syscounter.c +++ b/arch/arm/mach-imx/syscounter.c @@ -5,7 +5,7 @@ * The file use ls102xa/timer.c as a reference. */ -#include +#include #include #include #include diff --git a/arch/arm/mach-imx/timer.c b/arch/arm/mach-imx/timer.c index 5ac8f28e670..fcd45f09f18 100644 --- a/arch/arm/mach-imx/timer.c +++ b/arch/arm/mach-imx/timer.c @@ -6,6 +6,7 @@ * (C) Copyright 2009 Freescale Semiconductor, Inc. */ +#include #include #include #include diff --git a/arch/arm/mach-imx/video.c b/arch/arm/mach-imx/video.c index 6cbb49da53c..1bc9b7cc7e1 100644 --- a/arch/arm/mach-imx/video.c +++ b/arch/arm/mach-imx/video.c @@ -1,9 +1,8 @@ // SPDX-License-Identifier: GPL-2.0+ -#include +#include #include #include -#include #include #ifdef CONFIG_IMX_HDMI diff --git a/arch/arm/mach-k3/Makefile b/arch/arm/mach-k3/Makefile index 3101f57d324..1bd523329a4 100644 --- a/arch/arm/mach-k3/Makefile +++ b/arch/arm/mach-k3/Makefile @@ -26,4 +26,3 @@ obj-$(CONFIG_SOC_K3_AM62P5) += am62p5_init.o endif obj-y += common.o security.o obj-$(CONFIG_SOC_K3_AM625) += am62x/ -obj-$(CONFIG_SOC_K3_AM642) += am64x/ diff --git a/arch/arm/mach-k3/am642_init.c b/arch/arm/mach-k3/am642_init.c index f341b4f367c..80c3cb3479f 100644 --- a/arch/arm/mach-k3/am642_init.c +++ b/arch/arm/mach-k3/am642_init.c @@ -285,7 +285,97 @@ u32 spl_mmc_boot_mode(struct mmc *mmc, const u32 boot_device) } } +static u32 __get_backup_bootmedia(u32 main_devstat) +{ + u32 bkup_bootmode = + (main_devstat & MAIN_DEVSTAT_BACKUP_BOOTMODE_MASK) >> + MAIN_DEVSTAT_BACKUP_BOOTMODE_SHIFT; + u32 bkup_bootmode_cfg = + (main_devstat & MAIN_DEVSTAT_BACKUP_BOOTMODE_CFG_MASK) >> + MAIN_DEVSTAT_BACKUP_BOOTMODE_CFG_SHIFT; + + switch (bkup_bootmode) { + case BACKUP_BOOT_DEVICE_UART: + return BOOT_DEVICE_UART; + + case BACKUP_BOOT_DEVICE_DFU: + if (bkup_bootmode_cfg & MAIN_DEVSTAT_BACKUP_USB_MODE_MASK) + return BOOT_DEVICE_USB; + return BOOT_DEVICE_DFU; + + + case BACKUP_BOOT_DEVICE_ETHERNET: + return BOOT_DEVICE_ETHERNET; + + case BACKUP_BOOT_DEVICE_MMC: + if (bkup_bootmode_cfg) + return BOOT_DEVICE_MMC2; + return BOOT_DEVICE_MMC1; + + case BACKUP_BOOT_DEVICE_SPI: + return BOOT_DEVICE_SPI; + + case BACKUP_BOOT_DEVICE_I2C: + return BOOT_DEVICE_I2C; + }; + + return BOOT_DEVICE_RAM; +} + +static u32 __get_primary_bootmedia(u32 main_devstat) +{ + u32 bootmode = (main_devstat & MAIN_DEVSTAT_PRIMARY_BOOTMODE_MASK) >> + MAIN_DEVSTAT_PRIMARY_BOOTMODE_SHIFT; + u32 bootmode_cfg = + (main_devstat & MAIN_DEVSTAT_PRIMARY_BOOTMODE_CFG_MASK) >> + MAIN_DEVSTAT_PRIMARY_BOOTMODE_CFG_SHIFT; + + switch (bootmode) { + case BOOT_DEVICE_OSPI: + fallthrough; + case BOOT_DEVICE_QSPI: + fallthrough; + case BOOT_DEVICE_XSPI: + fallthrough; + case BOOT_DEVICE_SPI: + return BOOT_DEVICE_SPI; + + case BOOT_DEVICE_ETHERNET_RGMII: + fallthrough; + case BOOT_DEVICE_ETHERNET_RMII: + return BOOT_DEVICE_ETHERNET; + + case BOOT_DEVICE_EMMC: + return BOOT_DEVICE_MMC1; + + case BOOT_DEVICE_NAND: + return BOOT_DEVICE_NAND; + + case BOOT_DEVICE_MMC: + if ((bootmode_cfg & MAIN_DEVSTAT_PRIMARY_MMC_PORT_MASK) >> + MAIN_DEVSTAT_PRIMARY_MMC_PORT_SHIFT) + return BOOT_DEVICE_MMC2; + return BOOT_DEVICE_MMC1; + + case BOOT_DEVICE_DFU: + if ((bootmode_cfg & MAIN_DEVSTAT_PRIMARY_USB_MODE_MASK) >> + MAIN_DEVSTAT_PRIMARY_USB_MODE_SHIFT) + return BOOT_DEVICE_USB; + return BOOT_DEVICE_DFU; + + case BOOT_DEVICE_NOBOOT: + return BOOT_DEVICE_RAM; + } + + return bootmode; +} + u32 spl_boot_device(void) { - return get_boot_device(); + u32 devstat = readl(CTRLMMR_MAIN_DEVSTAT); + + if (bootindex == K3_PRIMARY_BOOTMODE) + return __get_primary_bootmedia(devstat); + else + return __get_backup_bootmedia(devstat); } diff --git a/arch/arm/mach-k3/am64x/Makefile b/arch/arm/mach-k3/am64x/Makefile deleted file mode 100644 index acf09c3426c..00000000000 --- a/arch/arm/mach-k3/am64x/Makefile +++ /dev/null @@ -1,2 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0+ -obj-y += boot.o diff --git a/arch/arm/mach-k3/am64x/boot.c b/arch/arm/mach-k3/am64x/boot.c deleted file mode 100644 index ce8ae941be6..00000000000 --- a/arch/arm/mach-k3/am64x/boot.c +++ /dev/null @@ -1,105 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -#include -#include -#include - -static u32 __get_backup_bootmedia(u32 main_devstat) -{ - u32 bkup_bootmode = - (main_devstat & MAIN_DEVSTAT_BACKUP_BOOTMODE_MASK) >> - MAIN_DEVSTAT_BACKUP_BOOTMODE_SHIFT; - u32 bkup_bootmode_cfg = - (main_devstat & MAIN_DEVSTAT_BACKUP_BOOTMODE_CFG_MASK) >> - MAIN_DEVSTAT_BACKUP_BOOTMODE_CFG_SHIFT; - - switch (bkup_bootmode) { - case BACKUP_BOOT_DEVICE_UART: - return BOOT_DEVICE_UART; - - case BACKUP_BOOT_DEVICE_DFU: - if (bkup_bootmode_cfg & MAIN_DEVSTAT_BACKUP_USB_MODE_MASK) - return BOOT_DEVICE_USB; - return BOOT_DEVICE_DFU; - - case BACKUP_BOOT_DEVICE_ETHERNET: - return BOOT_DEVICE_ETHERNET; - - case BACKUP_BOOT_DEVICE_MMC: - if (bkup_bootmode_cfg) - return BOOT_DEVICE_MMC2; - return BOOT_DEVICE_MMC1; - - case BACKUP_BOOT_DEVICE_SPI: - return BOOT_DEVICE_SPI; - - case BACKUP_BOOT_DEVICE_I2C: - return BOOT_DEVICE_I2C; - }; - - return BOOT_DEVICE_RAM; -} - -static u32 __get_primary_bootmedia(u32 main_devstat) -{ - u32 bootmode = (main_devstat & MAIN_DEVSTAT_PRIMARY_BOOTMODE_MASK) >> - MAIN_DEVSTAT_PRIMARY_BOOTMODE_SHIFT; - u32 bootmode_cfg = - (main_devstat & MAIN_DEVSTAT_PRIMARY_BOOTMODE_CFG_MASK) >> - MAIN_DEVSTAT_PRIMARY_BOOTMODE_CFG_SHIFT; - - switch (bootmode) { - case BOOT_DEVICE_OSPI: - fallthrough; - case BOOT_DEVICE_QSPI: - fallthrough; - case BOOT_DEVICE_XSPI: - fallthrough; - case BOOT_DEVICE_SPI: - return BOOT_DEVICE_SPI; - - case BOOT_DEVICE_ETHERNET_RGMII: - fallthrough; - case BOOT_DEVICE_ETHERNET_RMII: - return BOOT_DEVICE_ETHERNET; - - case BOOT_DEVICE_EMMC: - return BOOT_DEVICE_MMC1; - - case BOOT_DEVICE_NAND: - return BOOT_DEVICE_NAND; - - case BOOT_DEVICE_MMC: - if ((bootmode_cfg & MAIN_DEVSTAT_PRIMARY_MMC_PORT_MASK) >> - MAIN_DEVSTAT_PRIMARY_MMC_PORT_SHIFT) - return BOOT_DEVICE_MMC2; - return BOOT_DEVICE_MMC1; - - case BOOT_DEVICE_DFU: - if ((bootmode_cfg & MAIN_DEVSTAT_PRIMARY_USB_MODE_MASK) >> - MAIN_DEVSTAT_PRIMARY_USB_MODE_SHIFT) - return BOOT_DEVICE_USB; - return BOOT_DEVICE_DFU; - - case BOOT_DEVICE_NOBOOT: - return BOOT_DEVICE_RAM; - } - - return bootmode; -} - -u32 get_boot_device(void) -{ - u32 devstat = readl(CTRLMMR_MAIN_DEVSTAT); - u32 bootmode = *(u32 *)(CONFIG_SYS_K3_BOOT_PARAM_TABLE_INDEX); - u32 bootmedia; - - if (bootmode == K3_PRIMARY_BOOTMODE) - bootmedia = __get_primary_bootmedia(devstat); - else - bootmedia = __get_backup_bootmedia(devstat); - - debug("%s: devstat = 0x%x bootmedia = 0x%x bootmode = %d\n", - __func__, devstat, bootmedia, bootmode); - - return bootmedia; -} diff --git a/arch/arm/mach-kirkwood/cache.c b/arch/arm/mach-kirkwood/cache.c index acd2e8b1145..009b7deeca6 100644 --- a/arch/arm/mach-kirkwood/cache.c +++ b/arch/arm/mach-kirkwood/cache.c @@ -3,6 +3,7 @@ * Copyright (c) 2012 Michael Walle * Michael Walle */ +#include #include #include diff --git a/arch/arm/mach-kirkwood/cpu.c b/arch/arm/mach-kirkwood/cpu.c index a432abe615d..2b493b36c20 100644 --- a/arch/arm/mach-kirkwood/cpu.c +++ b/arch/arm/mach-kirkwood/cpu.c @@ -5,6 +5,7 @@ * Written-by: Prafulla Wadaskar */ +#include #include #include #include diff --git a/arch/arm/mach-kirkwood/include/mach/mpp.h b/arch/arm/mach-kirkwood/include/mach/mpp.h index e2757942590..4d1f58c0cbd 100644 --- a/arch/arm/mach-kirkwood/include/mach/mpp.h +++ b/arch/arm/mach-kirkwood/include/mach/mpp.h @@ -8,8 +8,6 @@ #ifndef __KIRKWOOD_MPP_H #define __KIRKWOOD_MPP_H -#include - #define MPP(_num, _sel, _in, _out, _F6180, _F6190, _F6192, _F6281) ( \ /* MPP number */ ((_num) & 0xff) | \ /* MPP select value */ (((_sel) & 0xf) << 8) | \ diff --git a/arch/arm/mach-kirkwood/mpp.c b/arch/arm/mach-kirkwood/mpp.c index 7938820e513..4fdad99cade 100644 --- a/arch/arm/mach-kirkwood/mpp.c +++ b/arch/arm/mach-kirkwood/mpp.c @@ -9,6 +9,7 @@ * warranty of any kind, whether express or implied. */ +#include #include #include #include diff --git a/arch/arm/mach-lpc32xx/clk.c b/arch/arm/mach-lpc32xx/clk.c index 2e11903e7e0..cb2344d79fe 100644 --- a/arch/arm/mach-lpc32xx/clk.c +++ b/arch/arm/mach-lpc32xx/clk.c @@ -3,6 +3,7 @@ * Copyright (C) 2011 by Vladimir Zapolskiy */ +#include #include #include #include diff --git a/arch/arm/mach-lpc32xx/cpu.c b/arch/arm/mach-lpc32xx/cpu.c index 80f5e7c88eb..a97f9a1958a 100644 --- a/arch/arm/mach-lpc32xx/cpu.c +++ b/arch/arm/mach-lpc32xx/cpu.c @@ -3,6 +3,7 @@ * Copyright (C) 2011-2015 by Vladimir Zapolskiy */ +#include #include #include #include diff --git a/arch/arm/mach-lpc32xx/devices.c b/arch/arm/mach-lpc32xx/devices.c index 49308d6d4be..6a67a3591aa 100644 --- a/arch/arm/mach-lpc32xx/devices.c +++ b/arch/arm/mach-lpc32xx/devices.c @@ -3,7 +3,7 @@ * Copyright (C) 2011 by Vladimir Zapolskiy */ -#include +#include #include #include diff --git a/arch/arm/mach-lpc32xx/dram.c b/arch/arm/mach-lpc32xx/dram.c index ab7c13512a5..16022379235 100644 --- a/arch/arm/mach-lpc32xx/dram.c +++ b/arch/arm/mach-lpc32xx/dram.c @@ -10,6 +10,7 @@ * This code runs from SRAM. */ +#include #include #include #include diff --git a/arch/arm/mach-lpc32xx/timer.c b/arch/arm/mach-lpc32xx/timer.c index 523f9cfc8c4..90183e3014e 100644 --- a/arch/arm/mach-lpc32xx/timer.c +++ b/arch/arm/mach-lpc32xx/timer.c @@ -3,6 +3,7 @@ * Copyright (C) 2011 Vladimir Zapolskiy */ +#include #include #include #include diff --git a/arch/arm/mach-mediatek/Kconfig b/arch/arm/mach-mediatek/Kconfig index ff1fdee5c8d..82018bd9d3e 100644 --- a/arch/arm/mach-mediatek/Kconfig +++ b/arch/arm/mach-mediatek/Kconfig @@ -23,7 +23,6 @@ config TARGET_MT7622 config TARGET_MT7623 bool "MediaTek MT7623 SoC" select CPU_V7A - select MMC_SUPPORTS_TUNING help The MediaTek MT7623 is a ARM-based SoC with a quad-core Cortex-A7 including NEON and GPU, Mali-450 graphics, several DDR3 options, diff --git a/arch/arm/mach-mediatek/cpu.c b/arch/arm/mach-mediatek/cpu.c index 8e8bc4f9cea..c329e7cc98a 100644 --- a/arch/arm/mach-mediatek/cpu.c +++ b/arch/arm/mach-mediatek/cpu.c @@ -3,6 +3,7 @@ * Copyright (C) 2018 MediaTek Inc. */ +#include #include #include #include diff --git a/arch/arm/mach-mediatek/mt7622/init.c b/arch/arm/mach-mediatek/mt7622/init.c index 6e970acf8b0..00d3eb9ce7a 100644 --- a/arch/arm/mach-mediatek/mt7622/init.c +++ b/arch/arm/mach-mediatek/mt7622/init.c @@ -9,6 +9,7 @@ #include #include #include +#include #include DECLARE_GLOBAL_DATA_PTR; diff --git a/arch/arm/mach-mediatek/mt7623/init.c b/arch/arm/mach-mediatek/mt7623/init.c index 3d6ba3f383c..988b057e598 100644 --- a/arch/arm/mach-mediatek/mt7623/init.c +++ b/arch/arm/mach-mediatek/mt7623/init.c @@ -3,7 +3,7 @@ * Copyright (C) 2018 MediaTek Inc. */ -#include +#include #include #include #include diff --git a/arch/arm/mach-mediatek/mt7629/init.c b/arch/arm/mach-mediatek/mt7629/init.c index 7cb8b72c364..0130554ff35 100644 --- a/arch/arm/mach-mediatek/mt7629/init.c +++ b/arch/arm/mach-mediatek/mt7629/init.c @@ -5,7 +5,7 @@ */ #include -#include +#include #include #include #include diff --git a/arch/arm/mach-mediatek/mt7981/init.c b/arch/arm/mach-mediatek/mt7981/init.c index 07da5897190..862f0ca4793 100644 --- a/arch/arm/mach-mediatek/mt7981/init.c +++ b/arch/arm/mach-mediatek/mt7981/init.c @@ -9,6 +9,7 @@ #include #include #include +#include #include DECLARE_GLOBAL_DATA_PTR; diff --git a/arch/arm/mach-mediatek/mt7986/init.c b/arch/arm/mach-mediatek/mt7986/init.c index a521c95bd9d..905a3ab4e27 100644 --- a/arch/arm/mach-mediatek/mt7986/init.c +++ b/arch/arm/mach-mediatek/mt7986/init.c @@ -9,6 +9,7 @@ #include #include #include +#include #include DECLARE_GLOBAL_DATA_PTR; diff --git a/arch/arm/mach-mediatek/mt7988/init.c b/arch/arm/mach-mediatek/mt7988/init.c index 2efc8c6a88f..082f12bf65e 100644 --- a/arch/arm/mach-mediatek/mt7988/init.c +++ b/arch/arm/mach-mediatek/mt7988/init.c @@ -8,6 +8,7 @@ #include #include #include +#include #include DECLARE_GLOBAL_DATA_PTR; diff --git a/arch/arm/mach-mediatek/mt8183/init.c b/arch/arm/mach-mediatek/mt8183/init.c index 37243547da8..7496029705f 100644 --- a/arch/arm/mach-mediatek/mt8183/init.c +++ b/arch/arm/mach-mediatek/mt8183/init.c @@ -6,6 +6,7 @@ */ #include +#include #include #include #include diff --git a/arch/arm/mach-mediatek/mt8512/init.c b/arch/arm/mach-mediatek/mt8512/init.c index 3b48caf5196..5a21e9a4485 100644 --- a/arch/arm/mach-mediatek/mt8512/init.c +++ b/arch/arm/mach-mediatek/mt8512/init.c @@ -7,6 +7,7 @@ */ #include +#include #include #include #include diff --git a/arch/arm/mach-mediatek/mt8516/init.c b/arch/arm/mach-mediatek/mt8516/init.c index 892bd441a33..3460dcc2494 100644 --- a/arch/arm/mach-mediatek/mt8516/init.c +++ b/arch/arm/mach-mediatek/mt8516/init.c @@ -6,6 +6,7 @@ */ #include +#include #include #include #include diff --git a/arch/arm/mach-mediatek/mt8518/init.c b/arch/arm/mach-mediatek/mt8518/init.c index c04bcb63517..f7e03de3650 100644 --- a/arch/arm/mach-mediatek/mt8518/init.c +++ b/arch/arm/mach-mediatek/mt8518/init.c @@ -7,6 +7,7 @@ */ #include +#include #include #include #include diff --git a/arch/arm/mach-mediatek/spl.c b/arch/arm/mach-mediatek/spl.c index 247d7ee6f1d..d3cda94617e 100644 --- a/arch/arm/mach-mediatek/spl.c +++ b/arch/arm/mach-mediatek/spl.c @@ -5,6 +5,7 @@ */ #include +#include #include #include #include diff --git a/arch/arm/mach-meson/board-a1.c b/arch/arm/mach-meson/board-a1.c index f848c0f068e..967bb671822 100644 --- a/arch/arm/mach-meson/board-a1.c +++ b/arch/arm/mach-meson/board-a1.c @@ -3,12 +3,12 @@ * (C) Copyright 2023 SberDevices, Inc. */ +#include #include #include #include #include #include -#include #include phys_size_t get_effective_memsize(void) diff --git a/arch/arm/mach-meson/board-axg.c b/arch/arm/mach-meson/board-axg.c index 6535539184c..fdf18752cdd 100644 --- a/arch/arm/mach-meson/board-axg.c +++ b/arch/arm/mach-meson/board-axg.c @@ -4,6 +4,7 @@ * (C) Copyright 2018 Neil Armstrong */ +#include #include #include #include diff --git a/arch/arm/mach-meson/board-common.c b/arch/arm/mach-meson/board-common.c index 39774c43049..7ceba7cede8 100644 --- a/arch/arm/mach-meson/board-common.c +++ b/arch/arm/mach-meson/board-common.c @@ -3,6 +3,7 @@ * (C) Copyright 2016 Beniamino Galvani */ +#include #include #include #include diff --git a/arch/arm/mach-meson/board-g12a.c b/arch/arm/mach-meson/board-g12a.c index dc4abe1e107..d5a830fb1db 100644 --- a/arch/arm/mach-meson/board-g12a.c +++ b/arch/arm/mach-meson/board-g12a.c @@ -4,6 +4,7 @@ * (C) Copyright 2018 Neil Armstrong */ +#include #include #include #include diff --git a/arch/arm/mach-meson/board-gx.c b/arch/arm/mach-meson/board-gx.c index 0370ed57e20..c3fbdfffeae 100644 --- a/arch/arm/mach-meson/board-gx.c +++ b/arch/arm/mach-meson/board-gx.c @@ -4,6 +4,7 @@ * (C) Copyright 2018 Neil Armstrong */ +#include #include #include #include diff --git a/arch/arm/mach-meson/board-info.c b/arch/arm/mach-meson/board-info.c index b4058f59323..d51d9b8f064 100644 --- a/arch/arm/mach-meson/board-info.c +++ b/arch/arm/mach-meson/board-info.c @@ -4,6 +4,7 @@ * (C) Copyright 2019 Neil Armstrong */ +#include #include #include #include diff --git a/arch/arm/mach-meson/sm.c b/arch/arm/mach-meson/sm.c index 4d9f83d3b38..914fd11c989 100644 --- a/arch/arm/mach-meson/sm.c +++ b/arch/arm/mach-meson/sm.c @@ -5,6 +5,7 @@ * Secure monitor calls. */ +#include #include #include #include diff --git a/arch/arm/mach-mvebu/alleycat5/cpu.c b/arch/arm/mach-mvebu/alleycat5/cpu.c index be2d9a25bf9..0f72ae1709b 100644 --- a/arch/arm/mach-mvebu/alleycat5/cpu.c +++ b/arch/arm/mach-mvebu/alleycat5/cpu.c @@ -3,7 +3,7 @@ * Copyright (C) 2018 Marvell International Ltd. */ -#include +#include #include #include #include diff --git a/arch/arm/mach-mvebu/alleycat5/soc.c b/arch/arm/mach-mvebu/alleycat5/soc.c index 98e66735eb9..734b0a87dd4 100644 --- a/arch/arm/mach-mvebu/alleycat5/soc.c +++ b/arch/arm/mach-mvebu/alleycat5/soc.c @@ -3,6 +3,7 @@ * Copyright (C) 2018 Marvell International Ltd. */ +#include #include #include #include diff --git a/arch/arm/mach-mvebu/arm64-common.c b/arch/arm/mach-mvebu/arm64-common.c index 63a12f7d774..4c67f1aba4d 100644 --- a/arch/arm/mach-mvebu/arm64-common.c +++ b/arch/arm/mach-mvebu/arm64-common.c @@ -3,7 +3,7 @@ * Copyright (C) 2016 Stefan Roese */ -#include +#include #include #include #include diff --git a/arch/arm/mach-mvebu/armada3700/cpu.c b/arch/arm/mach-mvebu/armada3700/cpu.c index 17525691e68..ab72b304e5d 100644 --- a/arch/arm/mach-mvebu/armada3700/cpu.c +++ b/arch/arm/mach-mvebu/armada3700/cpu.c @@ -4,6 +4,7 @@ * Copyright (C) 2020 Marek Behún */ +#include #include #include #include diff --git a/arch/arm/mach-mvebu/armada3700/efuse.c b/arch/arm/mach-mvebu/armada3700/efuse.c index 84a1e388c11..07d5f394354 100644 --- a/arch/arm/mach-mvebu/armada3700/efuse.c +++ b/arch/arm/mach-mvebu/armada3700/efuse.c @@ -5,10 +5,9 @@ */ #include +#include #include #include -#include -#include #include #include diff --git a/arch/arm/mach-mvebu/armada3700/mbox.c b/arch/arm/mach-mvebu/armada3700/mbox.c index 5ac543abce5..6555b8673ce 100644 --- a/arch/arm/mach-mvebu/armada3700/mbox.c +++ b/arch/arm/mach-mvebu/armada3700/mbox.c @@ -4,11 +4,11 @@ * Copyright (C) 2021 Pali Rohár */ +#include #include #include #include #include -#include #include #define RWTM_BASE (MVEBU_REGISTER(0xb0000)) diff --git a/arch/arm/mach-mvebu/armada8k/cpu.c b/arch/arm/mach-mvebu/armada8k/cpu.c index 7908f75809c..939abce000f 100644 --- a/arch/arm/mach-mvebu/armada8k/cpu.c +++ b/arch/arm/mach-mvebu/armada8k/cpu.c @@ -3,6 +3,7 @@ * Copyright (C) 2016 Stefan Roese */ +#include #include #include #include diff --git a/arch/arm/mach-mvebu/armada8k/dram.c b/arch/arm/mach-mvebu/armada8k/dram.c index fd58551d0e3..6c801bfa1db 100644 --- a/arch/arm/mach-mvebu/armada8k/dram.c +++ b/arch/arm/mach-mvebu/armada8k/dram.c @@ -3,7 +3,7 @@ * Copyright (C) 2016 Stefan Roese */ -#include +#include #include #include #include diff --git a/arch/arm/mach-mvebu/cpu.c b/arch/arm/mach-mvebu/cpu.c index e603ab9ffb7..7c62a5dbb6a 100644 --- a/arch/arm/mach-mvebu/cpu.c +++ b/arch/arm/mach-mvebu/cpu.c @@ -3,7 +3,7 @@ * Copyright (C) 2014-2016 Stefan Roese */ -#include +#include #include #include #include diff --git a/arch/arm/mach-mvebu/dram.c b/arch/arm/mach-mvebu/dram.c index c00c6b9b3fc..d398d0f7676 100644 --- a/arch/arm/mach-mvebu/dram.c +++ b/arch/arm/mach-mvebu/dram.c @@ -6,6 +6,7 @@ */ #include +#include #include #include #include diff --git a/arch/arm/mach-mvebu/efuse.c b/arch/arm/mach-mvebu/efuse.c index 475687955e0..be5dc0e07d9 100644 --- a/arch/arm/mach-mvebu/efuse.c +++ b/arch/arm/mach-mvebu/efuse.c @@ -4,6 +4,7 @@ */ #include +#include #include #include #include diff --git a/arch/arm/mach-mvebu/gpio.c b/arch/arm/mach-mvebu/gpio.c index 587cbb00e7f..1d1e3df8ba9 100644 --- a/arch/arm/mach-mvebu/gpio.c +++ b/arch/arm/mach-mvebu/gpio.c @@ -5,6 +5,7 @@ * Written-by: Prafulla Wadaskar */ +#include #include #include #include diff --git a/arch/arm/mach-mvebu/mbus.c b/arch/arm/mach-mvebu/mbus.c index 9baeece3c85..959ca8e9260 100644 --- a/arch/arm/mach-mvebu/mbus.c +++ b/arch/arm/mach-mvebu/mbus.c @@ -46,7 +46,7 @@ * mvebu_mbus_del_window(). */ -#include +#include #include #include #include diff --git a/arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec-38x.c b/arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec-38x.c index 4582871556d..12596ec2d8b 100644 --- a/arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec-38x.c +++ b/arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec-38x.c @@ -3,6 +3,7 @@ * Copyright (C) Marvell International Ltd. and its affiliates */ +#include #include #include #include diff --git a/arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c b/arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c index efc31d5218a..3349f4eb549 100644 --- a/arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c +++ b/arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c @@ -3,7 +3,7 @@ * Copyright (C) Marvell International Ltd. and its affiliates */ -#include +#include #include #include #include diff --git a/arch/arm/mach-mvebu/serdes/a38x/seq_exec.c b/arch/arm/mach-mvebu/serdes/a38x/seq_exec.c index 9a1bbba7f2f..2a51b7113ce 100644 --- a/arch/arm/mach-mvebu/serdes/a38x/seq_exec.c +++ b/arch/arm/mach-mvebu/serdes/a38x/seq_exec.c @@ -3,6 +3,7 @@ * Copyright (C) Marvell International Ltd. and its affiliates */ +#include #include #include #include diff --git a/arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.c b/arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.c index 8290b861c07..fb8ec11dfb9 100644 --- a/arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.c +++ b/arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.c @@ -3,6 +3,7 @@ * Copyright (C) Marvell International Ltd. and its affiliates */ +#include #include #include #include diff --git a/arch/arm/mach-mvebu/serdes/axp/high_speed_env_lib.c b/arch/arm/mach-mvebu/serdes/axp/high_speed_env_lib.c index 61b7f168697..68f8eade272 100644 --- a/arch/arm/mach-mvebu/serdes/axp/high_speed_env_lib.c +++ b/arch/arm/mach-mvebu/serdes/axp/high_speed_env_lib.c @@ -3,7 +3,7 @@ * Copyright (C) Marvell International Ltd. and its affiliates */ -#include +#include #include #include #include diff --git a/arch/arm/mach-mvebu/serdes/axp/high_speed_env_spec.c b/arch/arm/mach-mvebu/serdes/axp/high_speed_env_spec.c index 9b7bb2c3851..539d237623a 100644 --- a/arch/arm/mach-mvebu/serdes/axp/high_speed_env_spec.c +++ b/arch/arm/mach-mvebu/serdes/axp/high_speed_env_spec.c @@ -3,6 +3,7 @@ * Copyright (C) Marvell International Ltd. and its affiliates */ +#include #include #include #include diff --git a/arch/arm/mach-mvebu/spl.c b/arch/arm/mach-mvebu/spl.c index 4f4f7e00e3c..79f8877745b 100644 --- a/arch/arm/mach-mvebu/spl.c +++ b/arch/arm/mach-mvebu/spl.c @@ -3,6 +3,7 @@ * Copyright (C) 2014-2016 Stefan Roese */ +#include #include #include #include diff --git a/arch/arm/mach-mvebu/system-controller.c b/arch/arm/mach-mvebu/system-controller.c index d94bde0777c..682431ee11d 100644 --- a/arch/arm/mach-mvebu/system-controller.c +++ b/arch/arm/mach-mvebu/system-controller.c @@ -4,6 +4,7 @@ * Copyright (C) 2024 Marek Behún */ +#include #include #include #include diff --git a/arch/arm/mach-nexell/clock.c b/arch/arm/mach-nexell/clock.c index 3082f6077b7..59ffa26255f 100644 --- a/arch/arm/mach-nexell/clock.c +++ b/arch/arm/mach-nexell/clock.c @@ -4,8 +4,8 @@ * Hyunseok, Jung */ +#include #include -#include #include #include #include diff --git a/arch/arm/mach-nexell/include/mach/mipi_display.h b/arch/arm/mach-nexell/include/mach/mipi_display.h index 9183ffdd9c3..f3fdec64647 100644 --- a/arch/arm/mach-nexell/include/mach/mipi_display.h +++ b/arch/arm/mach-nexell/include/mach/mipi_display.h @@ -11,8 +11,6 @@ #ifndef MIPI_DISPLAY_H #define MIPI_DISPLAY_H -#include - /* MIPI DSI Processor-to-Peripheral transaction types */ enum { MIPI_DSI_V_SYNC_START = 0x01, diff --git a/arch/arm/mach-nexell/include/mach/reset.h b/arch/arm/mach-nexell/include/mach/reset.h index 0c6a13043f9..e1301d4e53d 100644 --- a/arch/arm/mach-nexell/include/mach/reset.h +++ b/arch/arm/mach-nexell/include/mach/reset.h @@ -7,8 +7,6 @@ #ifndef __NEXELL_RESET__ #define __NEXELL_RESET__ -#include - #define NUMBER_OF_RESET_MODULE_PIN 69 enum rstcon { diff --git a/arch/arm/mach-nexell/reset.c b/arch/arm/mach-nexell/reset.c index 627f568270b..1f732a3d373 100644 --- a/arch/arm/mach-nexell/reset.c +++ b/arch/arm/mach-nexell/reset.c @@ -8,6 +8,7 @@ *FIXME : Not support device tree & reset control driver. * will remove after support device tree & reset control driver. */ +#include #include #include #include diff --git a/arch/arm/mach-nexell/tieoff.c b/arch/arm/mach-nexell/tieoff.c index 51cca6744d6..5a4744c296a 100644 --- a/arch/arm/mach-nexell/tieoff.c +++ b/arch/arm/mach-nexell/tieoff.c @@ -4,6 +4,7 @@ * Youngbok, Park */ +#include #include #include #include diff --git a/arch/arm/mach-nexell/timer.c b/arch/arm/mach-nexell/timer.c index b35c7b1bb33..3b311fd22a5 100644 --- a/arch/arm/mach-nexell/timer.c +++ b/arch/arm/mach-nexell/timer.c @@ -4,6 +4,7 @@ * Hyunseok, Jung */ +#include #include #include diff --git a/arch/arm/mach-npcm/npcm7xx/cpu.c b/arch/arm/mach-npcm/npcm7xx/cpu.c index 47d51cab5c7..dd74bb9e087 100644 --- a/arch/arm/mach-npcm/npcm7xx/cpu.c +++ b/arch/arm/mach-npcm/npcm7xx/cpu.c @@ -3,6 +3,7 @@ * Copyright (c) 2021 Nuvoton Technology Corp. */ +#include #include #include #include diff --git a/arch/arm/mach-npcm/npcm7xx/l2_cache_pl310.c b/arch/arm/mach-npcm/npcm7xx/l2_cache_pl310.c index df80687c857..ed4b1ca5c98 100644 --- a/arch/arm/mach-npcm/npcm7xx/l2_cache_pl310.c +++ b/arch/arm/mach-npcm/npcm7xx/l2_cache_pl310.c @@ -3,7 +3,7 @@ * Copyright (c) 2021 Nuvoton Technology Corp. */ -#include +#include #include #include diff --git a/arch/arm/mach-npcm/npcm8xx/cpu.c b/arch/arm/mach-npcm/npcm8xx/cpu.c index a1fb400b264..af594526094 100644 --- a/arch/arm/mach-npcm/npcm8xx/cpu.c +++ b/arch/arm/mach-npcm/npcm8xx/cpu.c @@ -3,6 +3,7 @@ * Copyright (c) 2022 Nuvoton Technology Corp. */ +#include #include #include #include diff --git a/arch/arm/mach-npcm/npcm8xx/reset.c b/arch/arm/mach-npcm/npcm8xx/reset.c index e28b4ae7ae4..6954e6c6a17 100644 --- a/arch/arm/mach-npcm/npcm8xx/reset.c +++ b/arch/arm/mach-npcm/npcm8xx/reset.c @@ -3,6 +3,7 @@ * Copyright (c) 2022 Nuvoton Technology Corp. */ +#include #include #include #include diff --git a/arch/arm/mach-octeontx/clock.c b/arch/arm/mach-octeontx/clock.c index ffdee8799fb..9da21077ecd 100644 --- a/arch/arm/mach-octeontx/clock.c +++ b/arch/arm/mach-octeontx/clock.c @@ -5,6 +5,7 @@ * https://spdx.org/licenses */ +#include #include #include #include diff --git a/arch/arm/mach-octeontx/cpu.c b/arch/arm/mach-octeontx/cpu.c index 90454edca25..aa5f4585c6f 100644 --- a/arch/arm/mach-octeontx/cpu.c +++ b/arch/arm/mach-octeontx/cpu.c @@ -5,6 +5,7 @@ * https://spdx.org/licenses */ +#include #include #include #include diff --git a/arch/arm/mach-octeontx2/clock.c b/arch/arm/mach-octeontx2/clock.c index ffdee8799fb..9da21077ecd 100644 --- a/arch/arm/mach-octeontx2/clock.c +++ b/arch/arm/mach-octeontx2/clock.c @@ -5,6 +5,7 @@ * https://spdx.org/licenses */ +#include #include #include #include diff --git a/arch/arm/mach-octeontx2/cpu.c b/arch/arm/mach-octeontx2/cpu.c index 0a44af71a40..723deef719b 100644 --- a/arch/arm/mach-octeontx2/cpu.c +++ b/arch/arm/mach-octeontx2/cpu.c @@ -5,6 +5,7 @@ * https://spdx.org/licenses */ +#include #include #include #include diff --git a/arch/arm/mach-omap2/abb.c b/arch/arm/mach-omap2/abb.c index ce33d2fe129..722e6db0566 100644 --- a/arch/arm/mach-omap2/abb.c +++ b/arch/arm/mach-omap2/abb.c @@ -8,6 +8,7 @@ * Andrii Tseglytskyi */ +#include #include #include #include diff --git a/arch/arm/mach-omap2/am33xx/board.c b/arch/arm/mach-omap2/am33xx/board.c index 78c1e965c9f..09659da5867 100644 --- a/arch/arm/mach-omap2/am33xx/board.c +++ b/arch/arm/mach-omap2/am33xx/board.c @@ -7,7 +7,7 @@ * Copyright (C) 2011, Texas Instruments, Incorporated - https://www.ti.com/ */ -#include +#include #include #include #include diff --git a/arch/arm/mach-omap2/am33xx/chilisom.c b/arch/arm/mach-omap2/am33xx/chilisom.c index 4765ce0adee..d4f2abe17a9 100644 --- a/arch/arm/mach-omap2/am33xx/chilisom.c +++ b/arch/arm/mach-omap2/am33xx/chilisom.c @@ -4,6 +4,7 @@ * Copyright (C) 2017, Grinn - http://grinn-global.com/ */ +#include #include #include #include diff --git a/arch/arm/mach-omap2/am33xx/clk_synthesizer.c b/arch/arm/mach-omap2/am33xx/clk_synthesizer.c index b75eb58ee82..0969a404bf6 100644 --- a/arch/arm/mach-omap2/am33xx/clk_synthesizer.c +++ b/arch/arm/mach-omap2/am33xx/clk_synthesizer.c @@ -7,7 +7,8 @@ * Copyright (C) 2016, Texas Instruments, Incorporated - https://www.ti.com/ */ -#include + +#include #include #include diff --git a/arch/arm/mach-omap2/am33xx/clock.c b/arch/arm/mach-omap2/am33xx/clock.c index f07003c95bc..3273632c648 100644 --- a/arch/arm/mach-omap2/am33xx/clock.c +++ b/arch/arm/mach-omap2/am33xx/clock.c @@ -7,6 +7,7 @@ * * Copyright (C) 2013, Texas Instruments, Incorporated - https://www.ti.com/ */ +#include #include #include #include diff --git a/arch/arm/mach-omap2/am33xx/clock_am33xx.c b/arch/arm/mach-omap2/am33xx/clock_am33xx.c index c33d974dccd..d39e7e4fed1 100644 --- a/arch/arm/mach-omap2/am33xx/clock_am33xx.c +++ b/arch/arm/mach-omap2/am33xx/clock_am33xx.c @@ -7,6 +7,7 @@ * Copyright (C) 2013, Texas Instruments, Incorporated - https://www.ti.com/ */ +#include #include #include #include diff --git a/arch/arm/mach-omap2/am33xx/clock_am43xx.c b/arch/arm/mach-omap2/am33xx/clock_am43xx.c index abd65ffd77f..8039bc2fe75 100644 --- a/arch/arm/mach-omap2/am33xx/clock_am43xx.c +++ b/arch/arm/mach-omap2/am33xx/clock_am43xx.c @@ -8,6 +8,7 @@ * Copyright (C) 2013, Texas Instruments, Incorporated - https://www.ti.com/ */ +#include #include #include #include diff --git a/arch/arm/mach-omap2/am33xx/ddr.c b/arch/arm/mach-omap2/am33xx/ddr.c index 41eec005cb1..61b95c93733 100644 --- a/arch/arm/mach-omap2/am33xx/ddr.c +++ b/arch/arm/mach-omap2/am33xx/ddr.c @@ -5,7 +5,7 @@ * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/ */ -#include +#include #include #include #include diff --git a/arch/arm/mach-omap2/am33xx/emif4.c b/arch/arm/mach-omap2/am33xx/emif4.c index f19c66822d2..b29250b8d20 100644 --- a/arch/arm/mach-omap2/am33xx/emif4.c +++ b/arch/arm/mach-omap2/am33xx/emif4.c @@ -7,6 +7,7 @@ * Copyright (C) 2011, Texas Instruments, Incorporated - https://www.ti.com/ */ +#include #include #include #include diff --git a/arch/arm/mach-omap2/am33xx/fdt.c b/arch/arm/mach-omap2/am33xx/fdt.c index 3e81616cb74..2ec30b1f9c3 100644 --- a/arch/arm/mach-omap2/am33xx/fdt.c +++ b/arch/arm/mach-omap2/am33xx/fdt.c @@ -3,6 +3,7 @@ * Copyright 2017 Texas Instruments, Inc. */ +#include #include #include #include diff --git a/arch/arm/mach-omap2/am33xx/mux.c b/arch/arm/mach-omap2/am33xx/mux.c index 06b08e89e7f..49605593979 100644 --- a/arch/arm/mach-omap2/am33xx/mux.c +++ b/arch/arm/mach-omap2/am33xx/mux.c @@ -13,6 +13,7 @@ * GNU General Public License for more details. */ +#include #include #include #include diff --git a/arch/arm/mach-omap2/am33xx/sys_info.c b/arch/arm/mach-omap2/am33xx/sys_info.c index 87afc096602..390d540e85a 100644 --- a/arch/arm/mach-omap2/am33xx/sys_info.c +++ b/arch/arm/mach-omap2/am33xx/sys_info.c @@ -11,6 +11,7 @@ * Syed Mohammed Khasim */ +#include #include #include #include diff --git a/arch/arm/mach-omap2/boot-common.c b/arch/arm/mach-omap2/boot-common.c index e1ea3515ac1..aa0ab13d5fb 100644 --- a/arch/arm/mach-omap2/boot-common.c +++ b/arch/arm/mach-omap2/boot-common.c @@ -7,6 +7,7 @@ * Copyright (C) 2011, Texas Instruments, Incorporated - https://www.ti.com/ */ +#include #include #include #include diff --git a/arch/arm/mach-omap2/clocks-common.c b/arch/arm/mach-omap2/clocks-common.c index 2a0c22841d0..390d1f2a649 100644 --- a/arch/arm/mach-omap2/clocks-common.c +++ b/arch/arm/mach-omap2/clocks-common.c @@ -12,6 +12,7 @@ * Santosh Shilimkar * Rajendra Nayak */ +#include #include #include #include diff --git a/arch/arm/mach-omap2/emif-common.c b/arch/arm/mach-omap2/emif-common.c index 4d431e20779..9daaeef7319 100644 --- a/arch/arm/mach-omap2/emif-common.c +++ b/arch/arm/mach-omap2/emif-common.c @@ -8,7 +8,7 @@ * Aneesh V */ -#include +#include #include #include #include diff --git a/arch/arm/mach-omap2/fdt-common.c b/arch/arm/mach-omap2/fdt-common.c index c6b4c03b508..e90d5776703 100644 --- a/arch/arm/mach-omap2/fdt-common.c +++ b/arch/arm/mach-omap2/fdt-common.c @@ -3,7 +3,7 @@ * Copyright 2016-2017 Texas Instruments, Inc. */ -#include +#include #include #include #include diff --git a/arch/arm/mach-omap2/hwinit-common.c b/arch/arm/mach-omap2/hwinit-common.c index 138501602c3..0e4572ca41a 100644 --- a/arch/arm/mach-omap2/hwinit-common.c +++ b/arch/arm/mach-omap2/hwinit-common.c @@ -10,6 +10,7 @@ * Aneesh V * Steve Sakoman */ +#include #include #include #include diff --git a/arch/arm/mach-omap2/mem-common.c b/arch/arm/mach-omap2/mem-common.c index 00f144eb747..19197482aa4 100644 --- a/arch/arm/mach-omap2/mem-common.c +++ b/arch/arm/mach-omap2/mem-common.c @@ -12,7 +12,7 @@ * Syed Mohammed Khasim */ -#include +#include #include #include #if IS_ENABLED(CONFIG_TARGET_AM335X_GUARDIAN) diff --git a/arch/arm/mach-omap2/omap-cache.c b/arch/arm/mach-omap2/omap-cache.c index 200a08fa5c8..36db5882433 100644 --- a/arch/arm/mach-omap2/omap-cache.c +++ b/arch/arm/mach-omap2/omap-cache.c @@ -11,9 +11,9 @@ * Steve Sakoman */ +#include #include #include -#include #include #include diff --git a/arch/arm/mach-omap2/omap3/am35x_musb.c b/arch/arm/mach-omap2/omap3/am35x_musb.c index d3807623bc6..1121acc0058 100644 --- a/arch/arm/mach-omap2/omap3/am35x_musb.c +++ b/arch/arm/mach-omap2/omap3/am35x_musb.c @@ -8,8 +8,8 @@ * Hema HK */ +#include #include -#include #include #include #include diff --git a/arch/arm/mach-omap2/omap3/board.c b/arch/arm/mach-omap2/omap3/board.c index c5ada607f97..c76a95dd5d0 100644 --- a/arch/arm/mach-omap2/omap3/board.c +++ b/arch/arm/mach-omap2/omap3/board.c @@ -15,6 +15,7 @@ * Syed Mohammed Khasim * */ +#include #include #include #include diff --git a/arch/arm/mach-omap2/omap3/boot.c b/arch/arm/mach-omap2/omap3/boot.c index 2a36a25e279..ea26115b711 100644 --- a/arch/arm/mach-omap2/omap3/boot.c +++ b/arch/arm/mach-omap2/omap3/boot.c @@ -5,6 +5,7 @@ * Copyright (C) 2015 Paul Kocialkowski */ +#include #include #include #include diff --git a/arch/arm/mach-omap2/omap3/clock.c b/arch/arm/mach-omap2/omap3/clock.c index 417d1eb846f..13685e0567a 100644 --- a/arch/arm/mach-omap2/omap3/clock.c +++ b/arch/arm/mach-omap2/omap3/clock.c @@ -11,12 +11,11 @@ * Syed Mohammed Khasim */ -#include +#include #include #include #include #include -#include #include #include diff --git a/arch/arm/mach-omap2/omap3/emac.c b/arch/arm/mach-omap2/omap3/emac.c index 7348e92cabd..d0d0b7a75a6 100644 --- a/arch/arm/mach-omap2/omap3/emac.c +++ b/arch/arm/mach-omap2/omap3/emac.c @@ -6,6 +6,7 @@ * (C) Copyright 2011, Ilya Yanok, Emcraft Systems */ +#include #include #include #include diff --git a/arch/arm/mach-omap2/omap3/emif4.c b/arch/arm/mach-omap2/omap3/emif4.c index 049eedfeb65..4fbfb387ab0 100644 --- a/arch/arm/mach-omap2/omap3/emif4.c +++ b/arch/arm/mach-omap2/omap3/emif4.c @@ -9,7 +9,7 @@ * Texas Instruments Incorporated - https://www.ti.com/ */ -#include +#include #include #include #include diff --git a/arch/arm/mach-omap2/omap3/sdrc.c b/arch/arm/mach-omap2/omap3/sdrc.c index 404333689f6..4d27d82c788 100644 --- a/arch/arm/mach-omap2/omap3/sdrc.c +++ b/arch/arm/mach-omap2/omap3/sdrc.c @@ -21,6 +21,7 @@ * Manikandan Pillai */ +#include #include #include #include diff --git a/arch/arm/mach-omap2/omap3/spl_id_nand.c b/arch/arm/mach-omap2/omap3/spl_id_nand.c index d4712629d9d..84a0b0ade93 100644 --- a/arch/arm/mach-omap2/omap3/spl_id_nand.c +++ b/arch/arm/mach-omap2/omap3/spl_id_nand.c @@ -11,6 +11,7 @@ * Jian Zhang */ +#include #include #include #include diff --git a/arch/arm/mach-omap2/omap3/sys_info.c b/arch/arm/mach-omap2/omap3/sys_info.c index 1e3fcd59796..5f535e27827 100644 --- a/arch/arm/mach-omap2/omap3/sys_info.c +++ b/arch/arm/mach-omap2/omap3/sys_info.c @@ -11,10 +11,9 @@ * Syed Mohammed Khasim */ -#include +#include #include #include /* get mem tables */ -#include #include #include #include diff --git a/arch/arm/mach-omap2/omap4/boot.c b/arch/arm/mach-omap2/omap4/boot.c index a60249f7fd6..90b5380ae39 100644 --- a/arch/arm/mach-omap2/omap4/boot.c +++ b/arch/arm/mach-omap2/omap4/boot.c @@ -5,6 +5,7 @@ * Copyright (C) 2015 Paul Kocialkowski */ +#include #include #include #include diff --git a/arch/arm/mach-omap2/omap4/emif.c b/arch/arm/mach-omap2/omap4/emif.c index 5b0d3b5c78a..35a51645be7 100644 --- a/arch/arm/mach-omap2/omap4/emif.c +++ b/arch/arm/mach-omap2/omap4/emif.c @@ -8,6 +8,7 @@ * Aneesh V */ +#include #include #include #include diff --git a/arch/arm/mach-omap2/omap4/hw_data.c b/arch/arm/mach-omap2/omap4/hw_data.c index a81d7655494..d587a4d4def 100644 --- a/arch/arm/mach-omap2/omap4/hw_data.c +++ b/arch/arm/mach-omap2/omap4/hw_data.c @@ -8,6 +8,7 @@ * * Sricharan R */ +#include #include #include #include diff --git a/arch/arm/mach-omap2/omap4/hwinit.c b/arch/arm/mach-omap2/omap4/hwinit.c index e3e6cc8e578..27dfa9142dc 100644 --- a/arch/arm/mach-omap2/omap4/hwinit.c +++ b/arch/arm/mach-omap2/omap4/hwinit.c @@ -10,6 +10,7 @@ * Aneesh V * Steve Sakoman */ +#include #include #include #include diff --git a/arch/arm/mach-omap2/omap4/sdram_elpida.c b/arch/arm/mach-omap2/omap4/sdram_elpida.c index a29a264016e..2a18cf0215d 100644 --- a/arch/arm/mach-omap2/omap4/sdram_elpida.c +++ b/arch/arm/mach-omap2/omap4/sdram_elpida.c @@ -9,6 +9,7 @@ * Aneesh V */ +#include #include #include diff --git a/arch/arm/mach-omap2/omap5/abb.c b/arch/arm/mach-omap2/omap5/abb.c index 21da0b11661..2f9f8e65d03 100644 --- a/arch/arm/mach-omap2/omap5/abb.c +++ b/arch/arm/mach-omap2/omap5/abb.c @@ -8,7 +8,7 @@ * Andrii Tseglytskyi */ -#include +#include #include #include #include diff --git a/arch/arm/mach-omap2/omap5/boot.c b/arch/arm/mach-omap2/omap5/boot.c index 5b479a87516..15d6836c6ea 100644 --- a/arch/arm/mach-omap2/omap5/boot.c +++ b/arch/arm/mach-omap2/omap5/boot.c @@ -5,6 +5,7 @@ * Copyright (C) 2015 Paul Kocialkowski */ +#include #include #include #include diff --git a/arch/arm/mach-omap2/omap5/dra7xx_iodelay.c b/arch/arm/mach-omap2/omap5/dra7xx_iodelay.c index d50452b5a30..8569eff31ab 100644 --- a/arch/arm/mach-omap2/omap5/dra7xx_iodelay.c +++ b/arch/arm/mach-omap2/omap5/dra7xx_iodelay.c @@ -6,7 +6,7 @@ * Lokesh Vutla */ -#include +#include #include #include #include diff --git a/arch/arm/mach-omap2/omap5/emif.c b/arch/arm/mach-omap2/omap5/emif.c index d243ff3bd8f..2de36b6feca 100644 --- a/arch/arm/mach-omap2/omap5/emif.c +++ b/arch/arm/mach-omap2/omap5/emif.c @@ -8,6 +8,7 @@ * Aneesh V for OMAP4 */ +#include #include #include #include diff --git a/arch/arm/mach-omap2/omap5/fdt.c b/arch/arm/mach-omap2/omap5/fdt.c index f75ec47d821..0ca02e664c4 100644 --- a/arch/arm/mach-omap2/omap5/fdt.c +++ b/arch/arm/mach-omap2/omap5/fdt.c @@ -3,7 +3,7 @@ * Copyright 2016 Texas Instruments, Inc. */ -#include +#include #include #include #include diff --git a/arch/arm/mach-omap2/omap5/hw_data.c b/arch/arm/mach-omap2/omap5/hw_data.c index e65727026ef..b39132222ee 100644 --- a/arch/arm/mach-omap2/omap5/hw_data.c +++ b/arch/arm/mach-omap2/omap5/hw_data.c @@ -8,6 +8,7 @@ * * Sricharan R */ +#include #include #include #include diff --git a/arch/arm/mach-omap2/omap5/hwinit.c b/arch/arm/mach-omap2/omap5/hwinit.c index 7f41e85c4a6..edab9a92982 100644 --- a/arch/arm/mach-omap2/omap5/hwinit.c +++ b/arch/arm/mach-omap2/omap5/hwinit.c @@ -11,6 +11,7 @@ * Steve Sakoman * Sricharan */ +#include #include #include #include diff --git a/arch/arm/mach-omap2/omap5/sdram.c b/arch/arm/mach-omap2/omap5/sdram.c index 6bf4cf4a758..786da45fac8 100644 --- a/arch/arm/mach-omap2/omap5/sdram.c +++ b/arch/arm/mach-omap2/omap5/sdram.c @@ -10,6 +10,7 @@ * Sricharan R */ +#include #include #include diff --git a/arch/arm/mach-omap2/sec-common.c b/arch/arm/mach-omap2/sec-common.c index 16bbc93f4a3..64560b21e3f 100644 --- a/arch/arm/mach-omap2/sec-common.c +++ b/arch/arm/mach-omap2/sec-common.c @@ -12,7 +12,7 @@ * Andrew F. Davis */ -#include +#include #include #include #include diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c index ed0620e7b63..71fdf5bf487 100644 --- a/arch/arm/mach-omap2/timer.c +++ b/arch/arm/mach-omap2/timer.c @@ -15,7 +15,7 @@ * Gary Jennejohn, DENX Software Engineering, */ -#include +#include #include #include #include diff --git a/arch/arm/mach-omap2/utils.c b/arch/arm/mach-omap2/utils.c index 2326d153b12..0623281a3c7 100644 --- a/arch/arm/mach-omap2/utils.c +++ b/arch/arm/mach-omap2/utils.c @@ -3,9 +3,9 @@ * Copyright 2011 Linaro Limited * Aneesh V */ +#include #include #include -#include #include #include #include diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c index cb377aa1272..054782efbdb 100644 --- a/arch/arm/mach-omap2/vc.c +++ b/arch/arm/mach-omap2/vc.c @@ -14,7 +14,7 @@ * GNU General Public License for more details. */ -#include +#include #include #include #include diff --git a/arch/arm/mach-orion5x/cpu.c b/arch/arm/mach-orion5x/cpu.c index 58ee67eca50..ffae9a01e37 100644 --- a/arch/arm/mach-orion5x/cpu.c +++ b/arch/arm/mach-orion5x/cpu.c @@ -8,6 +8,7 @@ * Written-by: Prafulla Wadaskar */ +#include #include #include #include diff --git a/arch/arm/mach-orion5x/dram.c b/arch/arm/mach-orion5x/dram.c index 228a3f7ad07..5647f847d78 100644 --- a/arch/arm/mach-orion5x/dram.c +++ b/arch/arm/mach-orion5x/dram.c @@ -8,6 +8,7 @@ * Written-by: Prafulla Wadaskar */ +#include #include #include #include diff --git a/arch/arm/mach-orion5x/timer.c b/arch/arm/mach-orion5x/timer.c index 85736f04e67..b373e59e6fe 100644 --- a/arch/arm/mach-orion5x/timer.c +++ b/arch/arm/mach-orion5x/timer.c @@ -7,7 +7,7 @@ * Written-by: Prafulla Wadaskar */ -#include +#include #include #include #include diff --git a/arch/arm/mach-owl/soc.c b/arch/arm/mach-owl/soc.c index 0130cad7678..f0f46f2dcb7 100644 --- a/arch/arm/mach-owl/soc.c +++ b/arch/arm/mach-owl/soc.c @@ -5,13 +5,13 @@ * Copyright (C) 2018 Manivannan Sadhasivam */ -#include #include #include #include #include #include #include +#include #include #include #include diff --git a/arch/arm/mach-owl/sysmap-owl.c b/arch/arm/mach-owl/sysmap-owl.c index 6f0a220320e..81f6ca2e491 100644 --- a/arch/arm/mach-owl/sysmap-owl.c +++ b/arch/arm/mach-owl/sysmap-owl.c @@ -6,6 +6,7 @@ * Copyright (C) 2018 Manivannan Sadhasivam */ +#include #include static struct mm_region owl_mem_map[] = { diff --git a/arch/arm/mach-renesas/memmap-gen3.c b/arch/arm/mach-renesas/memmap-gen3.c index c50700df078..4dff9e07629 100644 --- a/arch/arm/mach-renesas/memmap-gen3.c +++ b/arch/arm/mach-renesas/memmap-gen3.c @@ -7,6 +7,7 @@ #include #include +#include #include #define GEN3_NR_REGIONS 16 diff --git a/arch/arm/mach-renesas/memmap-rzg2l.c b/arch/arm/mach-renesas/memmap-rzg2l.c index 3b3c6f7cde9..9934a775220 100644 --- a/arch/arm/mach-renesas/memmap-rzg2l.c +++ b/arch/arm/mach-renesas/memmap-rzg2l.c @@ -8,6 +8,7 @@ #include #include +#include #include #define RZG2L_NR_REGIONS 16 diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c index 8a57b8217ff..cd226844b63 100644 --- a/arch/arm/mach-rockchip/board.c +++ b/arch/arm/mach-rockchip/board.c @@ -8,7 +8,7 @@ * Based on puma-rk3399.c: * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH */ -#include +#include #include #include #include diff --git a/arch/arm/mach-rockchip/boot_mode.c b/arch/arm/mach-rockchip/boot_mode.c index 55e9456668a..f9be396aa55 100644 --- a/arch/arm/mach-rockchip/boot_mode.c +++ b/arch/arm/mach-rockchip/boot_mode.c @@ -3,6 +3,7 @@ * (C) Copyright 2016 Rockchip Electronics Co., Ltd */ +#include #include #include #include diff --git a/arch/arm/mach-rockchip/bootrom.c b/arch/arm/mach-rockchip/bootrom.c index 82a0b3efef9..b36e559e871 100644 --- a/arch/arm/mach-rockchip/bootrom.c +++ b/arch/arm/mach-rockchip/bootrom.c @@ -3,6 +3,7 @@ * Copyright (c) 2017 Google, Inc */ +#include #include #include #include diff --git a/arch/arm/mach-rockchip/cpu-info.c b/arch/arm/mach-rockchip/cpu-info.c index 14c7331e1ab..a62ff53c6a0 100644 --- a/arch/arm/mach-rockchip/cpu-info.c +++ b/arch/arm/mach-rockchip/cpu-info.c @@ -4,6 +4,7 @@ * Author: Jagan Teki */ +#include #include #include #include diff --git a/arch/arm/mach-rockchip/px30-board-tpl.c b/arch/arm/mach-rockchip/px30-board-tpl.c index f0b3c5f83f4..db368a7b8c2 100644 --- a/arch/arm/mach-rockchip/px30-board-tpl.c +++ b/arch/arm/mach-rockchip/px30-board-tpl.c @@ -3,6 +3,7 @@ * (C) Copyright 2019 Rockchip Electronics Co., Ltd */ +#include #include #include #include diff --git a/arch/arm/mach-rockchip/px30/clk_px30.c b/arch/arm/mach-rockchip/px30/clk_px30.c index 410134769f8..7edf1321feb 100644 --- a/arch/arm/mach-rockchip/px30/clk_px30.c +++ b/arch/arm/mach-rockchip/px30/clk_px30.c @@ -3,6 +3,7 @@ * (C) Copyright 2017 Rockchip Electronics Co., Ltd. */ +#include #include #include #include diff --git a/arch/arm/mach-rockchip/px30/px30.c b/arch/arm/mach-rockchip/px30/px30.c index 8b1509e55f2..2ec3289d75b 100644 --- a/arch/arm/mach-rockchip/px30/px30.c +++ b/arch/arm/mach-rockchip/px30/px30.c @@ -2,6 +2,7 @@ /* * Copyright (c) 2017 Rockchip Electronics Co., Ltd */ +#include #include #include #include diff --git a/arch/arm/mach-rockchip/px30/syscon_px30.c b/arch/arm/mach-rockchip/px30/syscon_px30.c index c9de57493d8..37e88f5ccb9 100644 --- a/arch/arm/mach-rockchip/px30/syscon_px30.c +++ b/arch/arm/mach-rockchip/px30/syscon_px30.c @@ -3,6 +3,7 @@ * (C) Copyright 2017 Rockchip Electronics Co., Ltd */ +#include #include #include #include diff --git a/arch/arm/mach-rockchip/rk3036-board-spl.c b/arch/arm/mach-rockchip/rk3036-board-spl.c index 64e100172fa..73f6d241a1c 100644 --- a/arch/arm/mach-rockchip/rk3036-board-spl.c +++ b/arch/arm/mach-rockchip/rk3036-board-spl.c @@ -3,6 +3,7 @@ * (C) Copyright 2015-2019 Rockchip Electronics Co., Ltd */ +#include #include #include #include diff --git a/arch/arm/mach-rockchip/rk3036/clk_rk3036.c b/arch/arm/mach-rockchip/rk3036/clk_rk3036.c index 9046601a75e..116dccd7b87 100644 --- a/arch/arm/mach-rockchip/rk3036/clk_rk3036.c +++ b/arch/arm/mach-rockchip/rk3036/clk_rk3036.c @@ -4,6 +4,7 @@ * Written by Simon Glass */ +#include #include #include #include diff --git a/arch/arm/mach-rockchip/rk3036/rk3036.c b/arch/arm/mach-rockchip/rk3036/rk3036.c index 6c92b31dc84..e8130abdd77 100644 --- a/arch/arm/mach-rockchip/rk3036/rk3036.c +++ b/arch/arm/mach-rockchip/rk3036/rk3036.c @@ -3,6 +3,7 @@ * (C) Copyright 2019 Rockchip Electronics Co., Ltd */ +#include #include #include #include diff --git a/arch/arm/mach-rockchip/rk3036/sdram_rk3036.c b/arch/arm/mach-rockchip/rk3036/sdram_rk3036.c index 308b9e6b8a8..07cd29a33e6 100644 --- a/arch/arm/mach-rockchip/rk3036/sdram_rk3036.c +++ b/arch/arm/mach-rockchip/rk3036/sdram_rk3036.c @@ -2,7 +2,7 @@ /* * (C) Copyright 2015 Rockchip Electronics Co., Ltd */ -#include +#include #include #include #include diff --git a/arch/arm/mach-rockchip/rk3036/syscon_rk3036.c b/arch/arm/mach-rockchip/rk3036/syscon_rk3036.c index 23b75269d50..c2fd1607990 100644 --- a/arch/arm/mach-rockchip/rk3036/syscon_rk3036.c +++ b/arch/arm/mach-rockchip/rk3036/syscon_rk3036.c @@ -3,6 +3,7 @@ * (C) Copyright 2015 Rockchip Electronics Co., Ltd */ +#include #include #include #include diff --git a/arch/arm/mach-rockchip/rk3066/clk_rk3066.c b/arch/arm/mach-rockchip/rk3066/clk_rk3066.c index 88057fad050..c47526dca5d 100644 --- a/arch/arm/mach-rockchip/rk3066/clk_rk3066.c +++ b/arch/arm/mach-rockchip/rk3066/clk_rk3066.c @@ -4,6 +4,7 @@ * Written by Simon Glass */ +#include #include #include #include diff --git a/arch/arm/mach-rockchip/rk3066/rk3066.c b/arch/arm/mach-rockchip/rk3066/rk3066.c index 70b55ca8abf..9a95ff85041 100644 --- a/arch/arm/mach-rockchip/rk3066/rk3066.c +++ b/arch/arm/mach-rockchip/rk3066/rk3066.c @@ -3,6 +3,7 @@ * (C) Copyright 2016 Rockchip Electronics Co., Ltd */ +#include #include #include #include diff --git a/arch/arm/mach-rockchip/rk3066/syscon_rk3066.c b/arch/arm/mach-rockchip/rk3066/syscon_rk3066.c index ff269b53b54..a598f6400de 100644 --- a/arch/arm/mach-rockchip/rk3066/syscon_rk3066.c +++ b/arch/arm/mach-rockchip/rk3066/syscon_rk3066.c @@ -4,6 +4,7 @@ * Written by Simon Glass */ +#include #include #include #include diff --git a/arch/arm/mach-rockchip/rk3128/clk_rk3128.c b/arch/arm/mach-rockchip/rk3128/clk_rk3128.c index ae552af3ff5..a1b038c6486 100644 --- a/arch/arm/mach-rockchip/rk3128/clk_rk3128.c +++ b/arch/arm/mach-rockchip/rk3128/clk_rk3128.c @@ -3,6 +3,7 @@ * Copyright (c) 2017 Rockchip Electronics Co., Ltd */ +#include #include #include #include diff --git a/arch/arm/mach-rockchip/rk3128/syscon_rk3128.c b/arch/arm/mach-rockchip/rk3128/syscon_rk3128.c index f81c57a48be..1406d5d0d32 100644 --- a/arch/arm/mach-rockchip/rk3128/syscon_rk3128.c +++ b/arch/arm/mach-rockchip/rk3128/syscon_rk3128.c @@ -3,6 +3,7 @@ * (C) Copyright 2017 Rockchip Electronics Co., Ltd */ +#include #include #include #include diff --git a/arch/arm/mach-rockchip/rk3188/clk_rk3188.c b/arch/arm/mach-rockchip/rk3188/clk_rk3188.c index c0e71c3fa90..94d1d23e1f4 100644 --- a/arch/arm/mach-rockchip/rk3188/clk_rk3188.c +++ b/arch/arm/mach-rockchip/rk3188/clk_rk3188.c @@ -4,6 +4,7 @@ * Written by Simon Glass */ +#include #include #include #include diff --git a/arch/arm/mach-rockchip/rk3188/rk3188.c b/arch/arm/mach-rockchip/rk3188/rk3188.c index 53b2eaa2d53..ffdcaa49a1e 100644 --- a/arch/arm/mach-rockchip/rk3188/rk3188.c +++ b/arch/arm/mach-rockchip/rk3188/rk3188.c @@ -2,6 +2,7 @@ /* * (C) Copyright 2019 Rockchip Electronics Co., Ltd */ +#include #include #include #include diff --git a/arch/arm/mach-rockchip/rk3188/syscon_rk3188.c b/arch/arm/mach-rockchip/rk3188/syscon_rk3188.c index 6df054e5b27..917ff37c0fc 100644 --- a/arch/arm/mach-rockchip/rk3188/syscon_rk3188.c +++ b/arch/arm/mach-rockchip/rk3188/syscon_rk3188.c @@ -4,6 +4,7 @@ * Written by Simon Glass */ +#include #include #include #include diff --git a/arch/arm/mach-rockchip/rk322x/clk_rk322x.c b/arch/arm/mach-rockchip/rk322x/clk_rk322x.c index 4703125392e..2e57672b246 100644 --- a/arch/arm/mach-rockchip/rk322x/clk_rk322x.c +++ b/arch/arm/mach-rockchip/rk322x/clk_rk322x.c @@ -3,6 +3,7 @@ * (C) Copyright 2017 Rockchip Electronics Co., Ltd. */ +#include #include #include #include diff --git a/arch/arm/mach-rockchip/rk322x/syscon_rk322x.c b/arch/arm/mach-rockchip/rk322x/syscon_rk322x.c index c471a4c9fb7..0d9dca8173c 100644 --- a/arch/arm/mach-rockchip/rk322x/syscon_rk322x.c +++ b/arch/arm/mach-rockchip/rk322x/syscon_rk322x.c @@ -3,6 +3,7 @@ * (C) Copyright 2017 Rockchip Electronics Co., Ltd */ +#include #include #include #include diff --git a/arch/arm/mach-rockchip/rk3288/clk_rk3288.c b/arch/arm/mach-rockchip/rk3288/clk_rk3288.c index af6c5d1f59b..fb4c0891d0d 100644 --- a/arch/arm/mach-rockchip/rk3288/clk_rk3288.c +++ b/arch/arm/mach-rockchip/rk3288/clk_rk3288.c @@ -4,6 +4,7 @@ * Written by Simon Glass */ +#include #include #include #include diff --git a/arch/arm/mach-rockchip/rk3288/rk3288.c b/arch/arm/mach-rockchip/rk3288/rk3288.c index d1170f7e23d..70cf5002912 100644 --- a/arch/arm/mach-rockchip/rk3288/rk3288.c +++ b/arch/arm/mach-rockchip/rk3288/rk3288.c @@ -2,6 +2,7 @@ /* * Copyright (c) 2016 Rockchip Electronics Co., Ltd */ +#include #include #include #include diff --git a/arch/arm/mach-rockchip/rk3288/syscon_rk3288.c b/arch/arm/mach-rockchip/rk3288/syscon_rk3288.c index 6413d0a88a1..8b2c2f323a7 100644 --- a/arch/arm/mach-rockchip/rk3288/syscon_rk3288.c +++ b/arch/arm/mach-rockchip/rk3288/syscon_rk3288.c @@ -4,6 +4,7 @@ * Written by Simon Glass */ +#include #include #include #include diff --git a/arch/arm/mach-rockchip/rk3308/clk_rk3308.c b/arch/arm/mach-rockchip/rk3308/clk_rk3308.c index 557e21f8199..201bf661f9b 100644 --- a/arch/arm/mach-rockchip/rk3308/clk_rk3308.c +++ b/arch/arm/mach-rockchip/rk3308/clk_rk3308.c @@ -3,6 +3,7 @@ * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd */ +#include #include #include #include diff --git a/arch/arm/mach-rockchip/rk3308/rk3308.c b/arch/arm/mach-rockchip/rk3308/rk3308.c index 6f88638d156..a0915c72bfa 100644 --- a/arch/arm/mach-rockchip/rk3308/rk3308.c +++ b/arch/arm/mach-rockchip/rk3308/rk3308.c @@ -2,6 +2,7 @@ /* *Copyright (c) 2018 Rockchip Electronics Co., Ltd */ +#include #include #include #include diff --git a/arch/arm/mach-rockchip/rk3308/syscon_rk3308.c b/arch/arm/mach-rockchip/rk3308/syscon_rk3308.c index 2d7e9711015..b380ff57233 100644 --- a/arch/arm/mach-rockchip/rk3308/syscon_rk3308.c +++ b/arch/arm/mach-rockchip/rk3308/syscon_rk3308.c @@ -3,6 +3,7 @@ * (C) Copyright 2018 Rockchip Electronics Co., Ltd */ +#include #include #include #include diff --git a/arch/arm/mach-rockchip/rk3328/clk_rk3328.c b/arch/arm/mach-rockchip/rk3328/clk_rk3328.c index b0c5af53da6..70c0eb6f98e 100644 --- a/arch/arm/mach-rockchip/rk3328/clk_rk3328.c +++ b/arch/arm/mach-rockchip/rk3328/clk_rk3328.c @@ -3,6 +3,7 @@ * (C) Copyright 2017 Rockchip Electronics Co., Ltd */ +#include #include #include #include diff --git a/arch/arm/mach-rockchip/rk3328/rk3328.c b/arch/arm/mach-rockchip/rk3328/rk3328.c index c86d11943d6..ca3fa81e127 100644 --- a/arch/arm/mach-rockchip/rk3328/rk3328.c +++ b/arch/arm/mach-rockchip/rk3328/rk3328.c @@ -3,6 +3,7 @@ * Copyright (c) 2016 Rockchip Electronics Co., Ltd */ +#include #include #include #include diff --git a/arch/arm/mach-rockchip/rk3328/syscon_rk3328.c b/arch/arm/mach-rockchip/rk3328/syscon_rk3328.c index 02ed366d8b6..d2f267e6353 100644 --- a/arch/arm/mach-rockchip/rk3328/syscon_rk3328.c +++ b/arch/arm/mach-rockchip/rk3328/syscon_rk3328.c @@ -3,6 +3,7 @@ * (C) Copyright 2016 Rockchip Electronics Co., Ltd */ +#include #include #include #include diff --git a/arch/arm/mach-rockchip/rk3368/clk_rk3368.c b/arch/arm/mach-rockchip/rk3368/clk_rk3368.c index c4d41e52af0..b075319720d 100644 --- a/arch/arm/mach-rockchip/rk3368/clk_rk3368.c +++ b/arch/arm/mach-rockchip/rk3368/clk_rk3368.c @@ -4,6 +4,7 @@ * Author: Andy Yan */ +#include #include #include #include diff --git a/arch/arm/mach-rockchip/rk3368/rk3368.c b/arch/arm/mach-rockchip/rk3368/rk3368.c index f589bf67328..8f5ca1dfa7c 100644 --- a/arch/arm/mach-rockchip/rk3368/rk3368.c +++ b/arch/arm/mach-rockchip/rk3368/rk3368.c @@ -4,6 +4,7 @@ * Copyright (c) 2016 Andreas Färber */ +#include #include #include #include diff --git a/arch/arm/mach-rockchip/rk3368/syscon_rk3368.c b/arch/arm/mach-rockchip/rk3368/syscon_rk3368.c index 7389c028364..dc2d831dd84 100644 --- a/arch/arm/mach-rockchip/rk3368/syscon_rk3368.c +++ b/arch/arm/mach-rockchip/rk3368/syscon_rk3368.c @@ -5,6 +5,7 @@ * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH */ +#include #include #include #include diff --git a/arch/arm/mach-rockchip/rk3399/clk_rk3399.c b/arch/arm/mach-rockchip/rk3399/clk_rk3399.c index de552b5903b..9d9a837fc74 100644 --- a/arch/arm/mach-rockchip/rk3399/clk_rk3399.c +++ b/arch/arm/mach-rockchip/rk3399/clk_rk3399.c @@ -4,6 +4,7 @@ * Written by Simon Glass */ +#include #include #include #include diff --git a/arch/arm/mach-rockchip/rk3399/rk3399.c b/arch/arm/mach-rockchip/rk3399/rk3399.c index 2d7d0f82a2f..7fa1d7c7b7a 100644 --- a/arch/arm/mach-rockchip/rk3399/rk3399.c +++ b/arch/arm/mach-rockchip/rk3399/rk3399.c @@ -3,6 +3,7 @@ * Copyright (c) 2016 Rockchip Electronics Co., Ltd */ +#include #include #include #include diff --git a/arch/arm/mach-rockchip/rk3399/syscon_rk3399.c b/arch/arm/mach-rockchip/rk3399/syscon_rk3399.c index b92ad54ede5..2b5746cb31b 100644 --- a/arch/arm/mach-rockchip/rk3399/syscon_rk3399.c +++ b/arch/arm/mach-rockchip/rk3399/syscon_rk3399.c @@ -3,6 +3,7 @@ * (C) Copyright 2016 Rockchip Electronics Co., Ltd */ +#include #include #include #include diff --git a/arch/arm/mach-rockchip/rk3568/clk_rk3568.c b/arch/arm/mach-rockchip/rk3568/clk_rk3568.c index 1c6b2ece602..8917edcbd30 100644 --- a/arch/arm/mach-rockchip/rk3568/clk_rk3568.c +++ b/arch/arm/mach-rockchip/rk3568/clk_rk3568.c @@ -3,6 +3,7 @@ * (C) Copyright 2021 Rockchip Electronics Co., Ltd */ +#include #include #include #include diff --git a/arch/arm/mach-rockchip/rk3568/rk3568.c b/arch/arm/mach-rockchip/rk3568/rk3568.c index 1b3e40074e3..b30ea04f737 100644 --- a/arch/arm/mach-rockchip/rk3568/rk3568.c +++ b/arch/arm/mach-rockchip/rk3568/rk3568.c @@ -3,6 +3,7 @@ * (C) Copyright 2021 Rockchip Electronics Co., Ltd */ +#include #include #include #include diff --git a/arch/arm/mach-rockchip/rk3568/syscon_rk3568.c b/arch/arm/mach-rockchip/rk3568/syscon_rk3568.c index 255259eabfd..5407e7827f5 100644 --- a/arch/arm/mach-rockchip/rk3568/syscon_rk3568.c +++ b/arch/arm/mach-rockchip/rk3568/syscon_rk3568.c @@ -3,6 +3,7 @@ * (C) Copyright 2021 Rockchip Electronics Co., Ltd */ +#include #include #include #include diff --git a/arch/arm/mach-rockchip/rk3588/clk_rk3588.c b/arch/arm/mach-rockchip/rk3588/clk_rk3588.c index 250ec423bd2..3df0bf223e3 100644 --- a/arch/arm/mach-rockchip/rk3588/clk_rk3588.c +++ b/arch/arm/mach-rockchip/rk3588/clk_rk3588.c @@ -3,6 +3,7 @@ * (C) Copyright 2020 Rockchip Electronics Co., Ltd. */ +#include #include #include #include diff --git a/arch/arm/mach-rockchip/rk3588/rk3588.c b/arch/arm/mach-rockchip/rk3588/rk3588.c index d3162d3447e..eb65dafe3a2 100644 --- a/arch/arm/mach-rockchip/rk3588/rk3588.c +++ b/arch/arm/mach-rockchip/rk3588/rk3588.c @@ -4,6 +4,7 @@ * Copyright (c) 2022 Edgeble AI Technologies Pvt. Ltd. */ +#include #include #include #include diff --git a/arch/arm/mach-rockchip/rk3588/syscon_rk3588.c b/arch/arm/mach-rockchip/rk3588/syscon_rk3588.c index f86567fcaf4..7b2cf37d9da 100644 --- a/arch/arm/mach-rockchip/rk3588/syscon_rk3588.c +++ b/arch/arm/mach-rockchip/rk3588/syscon_rk3588.c @@ -3,6 +3,7 @@ * (C) Copyright 2021 Rockchip Electronics Co., Ltd */ +#include #include #include #include diff --git a/arch/arm/mach-rockchip/rv1108/clk_rv1108.c b/arch/arm/mach-rockchip/rv1108/clk_rv1108.c index 5659ae03d71..44b53c407a7 100644 --- a/arch/arm/mach-rockchip/rv1108/clk_rv1108.c +++ b/arch/arm/mach-rockchip/rv1108/clk_rv1108.c @@ -4,6 +4,7 @@ * Author: Andy Yan */ +#include #include #include #include diff --git a/arch/arm/mach-rockchip/rv1108/syscon_rv1108.c b/arch/arm/mach-rockchip/rv1108/syscon_rv1108.c index d68fbf1bd25..babdf5720b2 100644 --- a/arch/arm/mach-rockchip/rv1108/syscon_rv1108.c +++ b/arch/arm/mach-rockchip/rv1108/syscon_rv1108.c @@ -3,6 +3,7 @@ * (C) Copyright 2016 Rockchip Electronics Co., Ltd */ +#include #include #include #include diff --git a/arch/arm/mach-rockchip/rv1126/clk_rv1126.c b/arch/arm/mach-rockchip/rv1126/clk_rv1126.c index 3d64fcd4594..bd8902718f2 100644 --- a/arch/arm/mach-rockchip/rv1126/clk_rv1126.c +++ b/arch/arm/mach-rockchip/rv1126/clk_rv1126.c @@ -4,6 +4,7 @@ * Copyright (c) 2022 Edgeble AI Technologies Pvt. Ltd. */ +#include #include #include #include diff --git a/arch/arm/mach-rockchip/rv1126/rv1126.c b/arch/arm/mach-rockchip/rv1126/rv1126.c index 1c10e9b9f23..40eb9eb7b19 100644 --- a/arch/arm/mach-rockchip/rv1126/rv1126.c +++ b/arch/arm/mach-rockchip/rv1126/rv1126.c @@ -4,6 +4,7 @@ * Copyright (c) 2022 Edgeble AI Technologies Pvt. Ltd. */ +#include #include #include #include diff --git a/arch/arm/mach-rockchip/rv1126/syscon_rv1126.c b/arch/arm/mach-rockchip/rv1126/syscon_rv1126.c index 67d2f18a8d0..599ea66e3d6 100644 --- a/arch/arm/mach-rockchip/rv1126/syscon_rv1126.c +++ b/arch/arm/mach-rockchip/rv1126/syscon_rv1126.c @@ -4,6 +4,7 @@ * Copyright (c) 2022 Edgeble AI Technologies Pvt. Ltd. */ +#include #include #include #include diff --git a/arch/arm/mach-rockchip/sdram.c b/arch/arm/mach-rockchip/sdram.c index 1fb01e1c4b1..f2a3d6b1400 100644 --- a/arch/arm/mach-rockchip/sdram.c +++ b/arch/arm/mach-rockchip/sdram.c @@ -3,7 +3,7 @@ * Copyright (C) 2017 Rockchip Electronics Co., Ltd. */ -#include +#include #include #include #include diff --git a/arch/arm/mach-rockchip/spl-boot-order.c b/arch/arm/mach-rockchip/spl-boot-order.c index 3dce9b30898..3543267aa57 100644 --- a/arch/arm/mach-rockchip/spl-boot-order.c +++ b/arch/arm/mach-rockchip/spl-boot-order.c @@ -3,6 +3,7 @@ * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH */ +#include #include #include #include diff --git a/arch/arm/mach-rockchip/tpl.c b/arch/arm/mach-rockchip/tpl.c index 50f04f9474a..2c3e9789cc8 100644 --- a/arch/arm/mach-rockchip/tpl.c +++ b/arch/arm/mach-rockchip/tpl.c @@ -3,6 +3,7 @@ * (C) Copyright 2019 Rockchip Electronics Co., Ltd */ +#include #include #include #include diff --git a/arch/arm/mach-s5pc1xx/cache.c b/arch/arm/mach-s5pc1xx/cache.c index f0aec7c0fe0..b390bdf8278 100644 --- a/arch/arm/mach-s5pc1xx/cache.c +++ b/arch/arm/mach-s5pc1xx/cache.c @@ -7,6 +7,7 @@ * based on arch/arm/cpu/armv7/omap3/cache.S */ +#include #include #include diff --git a/arch/arm/mach-s5pc1xx/clock.c b/arch/arm/mach-s5pc1xx/clock.c index b92ce1152f6..c90c341b508 100644 --- a/arch/arm/mach-s5pc1xx/clock.c +++ b/arch/arm/mach-s5pc1xx/clock.c @@ -5,7 +5,7 @@ * Heungjun Kim */ -#include +#include #include #include #include diff --git a/arch/arm/mach-s5pc1xx/pinmux.c b/arch/arm/mach-s5pc1xx/pinmux.c index 23b9252827a..818d75164de 100644 --- a/arch/arm/mach-s5pc1xx/pinmux.c +++ b/arch/arm/mach-s5pc1xx/pinmux.c @@ -6,6 +6,7 @@ * Written by Simon Glass */ +#include #include int exynos_pinmux_config(int peripheral, int flags) diff --git a/arch/arm/mach-sc5xx/Kconfig b/arch/arm/mach-sc5xx/Kconfig deleted file mode 100644 index 3846b4fd5b6..00000000000 --- a/arch/arm/mach-sc5xx/Kconfig +++ /dev/null @@ -1,475 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0-or-later -# -# (C) Copyright 2022 - Analog Devices, Inc. -# -# Written and/or maintained by Timesys Corporation -# -# Contact: Nathan Barrett-Morrison -# Contact: Greg Malysa -# - -# All 32-bit platforms require SYS_ARM_CACHE_WRITETHROUGH -# But it is ignored if selected here, so it must be in the defconfig - -if ARCH_SC5XX - -config SC57X - bool - select SUPPORT_SPL - select CPU_V7A - select PANIC_HANG - select COMMON_CLK_ADI_SC57X - select TIMER - select ADI_SC5XX_TIMER - -config SC58X - bool - select SUPPORT_SPL - select CPU_V7A - select PANIC_HANG - select COMMON_CLK_ADI_SC58X - select TIMER - select ADI_SC5XX_TIMER - -config SC59X - bool - select SUPPORT_SPL - select CPU_V7A - select PANIC_HANG - select COMMON_CLK_ADI_SC594 - select TIMER - select ADI_SC5XX_TIMER - select NOP_PHY - -config SC59X_64 - bool - select SUPPORT_SPL - select PANIC_HANG - select MMC_SDHCI_ADMA_FORCE_32BIT - select ARM64 - select DM - select DM_SERIAL - select COMMON_CLK_ADI_SC598 - select GICV3 - select GIC_600_CLEAR_RDPD - select NOP_PHY - -config SC_BOOT_MODE - int "SC5XX boot mode select" - default 1 - range 0 7 - help - Mode 0: do nothing, just idle - Mode 1: boot ldr out of serial flash - Mode 7: boot ldr over uart - -config SC_BOOT_SPI_BUS - int "sc5xx spi boot bus" - default 2 - range 0 4 - help - This is the SPI peripheral number to use for booting, X in the - expression `sf probe X:Y` - -config SC_BOOT_SPI_SSEL - int "sc5xx spi boot chipselect" - default 1 - range 0 6 - help - This is the SPI chip select number to use for booting, Y in the - expression `sf probe X:Y` - -config SC_BOOT_OSPI_BUS - int "sc5xx ospi boot bus" - default 0 - help - This is the OSPI peripheral number to use for booting, X in the - expression `sf probe X:Y` - -config SC_BOOT_OSPI_SSEL - int "sc5xx ospi boot chipselect" - default 0 - help - This is the OSPI chip select number to use for booting, Y in the - expression `sf probe X:Y` - -config SYS_FLASH_BASE - hex - default 0x60000000 - -config UART_CONSOLE - int - default 0 - -config UART4_SERIAL - bool - depends on DM_SERIAL - default y - -config WDT_ADI - bool - default y - -config WATCHDOG_TIMEOUT_MSECS - int - default 30000 - -config DW_PORTS - int - default 1 - -config ADI_BUG_EZKHW21 - bool "SC584 EZKIT phy bug workaround" - depends on SC58X - help - This workaround affects the SC584 EZKIT and addresses bug EZKHW21. - It disables gigabit ethernet mode and limits the board to 100 Mbps - -config ADI_CARRIER_SOMCRR_EZKIT - bool "Support the EV-SOMCRR-EZKIT" - depends on (SC59X || SC59X_64) - help - Say y to include support for the EV-SOMCRR-EZKIT carrier board, - which is compatible with the SC594 and SC598 SOMs. The EZKIT is - mutually incompatible with the EZLITE. - -config ADI_CARRIER_SOMCRR_EZLITE - bool "Support the EV-SOMCRR-EZLITE" - depends on (SC59X || SC59X_64) - help - Say y to include support for the EV-SOMCRR-EZLITE carrier board, - which is compatible with the SC594 and SC598 SOMs. The EZLITE is - mutually incompatible with the EZKIT. - -config ADI_SPL_FORCE_BMODE - int "Force the SPL to use this BMODE device during next boot stage" - default 0 - range 0 9 - depends on SPL - help - Force the SPL to use this BMODE device during next boot stage. - For example, if booting via QSPI, we can force the second stage - Of the boot process to use other peripherals via: - 1 = QSPI -> QSPI - 5 = QSPI -> OSPI - 6 = QSPI -> eMMC - -config ADI_USE_DMC0 - bool "Configure DMC0" - default y - help - During hardware initialization, channel 0 of the DMC will be - initialized. Select this if you have DMC0 connected to external - DDR memory. This is expected to be true for every board using - an SC5xx SoC. - -config ADI_USE_DMC1 - bool "Configure DMC1" - help - During hardware initialization, channel 1 of the DMC will be - initialized. Not all processors have a DMC1. Select this if your - SoC has DMC1 and you have it connected to external DDR memory. - -config ADI_USE_DDR2 - bool "Configure DMC for DDR2 mode" - help - Configure the DMC in DDR2 mode. The default is DDR3 and not all - parts may actually support DDR2. Please consult the manual for - the SoC that you are using to determine if DDR2 mode is supported. - This also requires that DDR2 memory is present on the board or it - will probably cause strange failure. - -menu "Clock configuration" - -config CGU0_DF_DIV - int "CGU0_DF_DIV" - range 0 1 - help - Select 0 to pass CLKIN to PLL - Select 1 to pass CLKIN/2 to PLL - -config CGU0_VCO_MULT - int "CGU0_VCO_MULT" - range 0 127 - help - VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL - A value of 0 means 128 - -config CGU0_CCLK_DIV - int "CGU0_CCLK_DIV" - range 0 31 - help - CCLK_DIV controls the core clock divider - A value of 0 means 32 - CCLK = ((CLKIN / (1 + DF)) * VCO_MULT) / CCLK_DIV - -config CGU0_SCLK_DIV - int "CGU0_SCLK_DIV" - range 0 31 - help - SCLK_DIV controls the system clock divider - A value of 0 means 32 - SCLK = ((CLKIN / (1 + DF)) * VCO_MULT) / SYSCLK_DIV - -config CGU0_SCLK0_DIV - int "CGU0_SCLK0_DIV" - range 0 7 - help - A value of 0 means 8 - SCLK0 = SCLK / SCLK0_DIV - -config CGU0_SCLK1_DIV - int "CGU0_SCLK1_DIV" - depends on (SC57X || SC58X) - range 0 7 - help - A value of 0 means 8 - SCLK1 = SCLK / SCLK1_DIV - -config CGU0_DCLK_DIV - int "CGU0_DCLK_DIV" - range 0 31 - help - DCLK_DIV controls the DDR clock divider - A value of 0 means 32 - DCLK = ((CLKIN / (1 + DF)) * VCO_MULT) / DCLK_DIV - -config CGU0_OCLK_DIV - int "CGU0_OCLK_DIV" - range 0 127 - help - OCLK_DIV controls the output clock divider - A value of 0 means 128 - OCLK = ((CLKIN / (1 + DF)) * VCO_MULT) / OCLK_DIV - -config CGU0_DIV_S1SELEX - int "CGU0_DIV_S1SELEX" - depends on !SC57X && !SC58X - range 0 255 - help - CGU0 SCLK1 Extended divisor register. - A value of 0 means 256. - SCLK1 = ((CLKIN / (1 + DF)) * VCO_MULT) / DIV_S1SELEX - -config CGU0_CLKOUTSEL - int "CGU0_CLKOUTSEL" - default 0 - range 0 31 - help - Select signal driven through CLKOUT pin multiplexer. - This value varies on each SOC. Refer to - CGU_CLKOUTSEL.CLKOUTSEL in the Hardware Reference Manual - for values applicable to each SOC. - Commonly, values 0 and 1 select CLKIN0 or CLKIN1 respectively. - -config CGU1_PLL3_DDRCLK - bool "DDRCLK From 3rd PLL" - depends on SC59X_64 - help - 3rd PLL output is connected to DMC block when set. - When cleared, DDR clock is CLKO3 output of CDU. - -config CGU1_PLL3_VCO_MSEL - int "CGU0_PLL3_VCO_MSEL" - depends on CGU1_PLL3_DDRCLK - range 1 128 - help - PLL multiplier value for the 3rd PLL. - DCLK = (CLKIN * PLL3_VCO_MSEL) / PLL3_DCLK_DIV - -config CGU1_PLL3_DCLK_DIV - int "CGU0_PLL3_DCLK_DIV" - depends on CGU1_PLL3_DDRCLK - range 1 32 - help - PLL divider value for the 3rd PLL. - DCLK = (CLKIN * PLL3_VCO_MSEL) / PLL3_DCLK_DIV - -config CGU1_DF_DIV - int "CGU1_DF_DIV" - range 0 1 - help - Select 0 to pass CLKIN to PLL - Select 1 to pass CLKIN/2 to PLL - -config CGU1_VCO_MULT - int "CGU1_VCO_MULT" - range 0 127 - help - VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL - A value of 0 means 128 - -config CGU1_CCLK_DIV - int "CGU1_CCLK_DIV" - range 0 31 - help - CCLK_DIV controls the core clock divider - A value of 0 means 32 - CCLK = ((CLKIN / (1 + DF)) * VCO_MULT) / CCLK_DIV - -config CGU1_SCLK_DIV - int "CGU1_SCLK_DIV" - range 0 31 - help - SCLK_DIV controls the system clock divider - A value of 0 means 32 - SCLK = ((CLKIN / (1 + DF)) * VCO_MULT) / SYSCLK_DIV - -config CGU1_SCLK0_DIV - int "CGU1_SCLK0_DIV" - depends on (SC57X || SC58X || SC59X) - range 0 7 - help - A value of 0 means 8 - SCLK0 = SCLK / SCLK0_DIV - -config CGU1_SCLK1_DIV - int "CGU1_SCLK1_DIV" - depends on (SC57X || SC58X) - range 0 7 - help - A value of 0 means 8 - SCLK1 = SCLK / SCLK1_DIV - -config CGU1_DCLK_DIV - int "CGU1_DCLK_DIV" - range 0 31 - help - DCLK_DIV controls the DDR clock divider - A value of 0 means 32 - DCLK = ((CLKIN / (1 + DF)) * VCO_MULT) / DCLK_DIV - -config CGU1_OCLK_DIV - int "CGU1_OCLK_DIV" - range 0 127 - help - OCLK_DIV controls the output clock divider - A value of 0 means 128 - OCLK = ((CLKIN / (1 + DF)) * VCO_MULT) / OCLK_DIV - -config CGU1_DIV_S0SELEX - int "CGU1_DIV_S0SELEX" - depends on !SC57X && !SC58X && !SC59X - range 0 255 - help - CGU1 SCLK0 Extended divisor register. - A value of 0 means 256. - SCLK0 = ((CLKIN / (1 + DF)) * VCO_MULT) / DIV_S0SELEX - -config CGU1_DIV_S1SELEX - int "CGU1_DIV_S1SELEX" - depends on !SC57X && !SC58X - range 0 255 - help - CGU1 SCLK1 Extended divisor register. - A value of 0 means 256. - SCLK1 = ((CLKIN / (1 + DF)) * VCO_MULT) / DIV_S1SELEX - -config CDU0_CGU1_CLKIN - int "CDU0 CGU1 CLKINn Select" - default 0 - range 0 1 - help - Selects source clock for CGU1. - 0 for CLKIN0 - 1 for CLKIN1 - -config CDU0_CLKO0 - int "CDU0_CLKO0" - range 1 7 - help - Clock source select. Refer to SOC Hardware Reference Manual - -config CDU0_CLKO1 - int "CDU0_CLKO1" - range 1 7 - help - Clock source select. Refer to SOC Hardware Reference Manual - -config CDU0_CLKO2 - int "CDU0_CLKO2" - range 1 7 - help - Clock source select. Refer to SOC Hardware Reference Manual - -config CDU0_CLKO3 - int "CDU0_CLKO3" - range 1 7 - help - Clock source select. Refer to SOC Hardware Reference Manual - -config CDU0_CLKO4 - int "CDU0_CLKO4" - range 1 7 - help - Clock source select. Refer to SOC Hardware Reference Manual - -config CDU0_CLKO5 - int "CDU0_CLKO5" - range 1 7 - help - Clock source select. Refer to SOC Hardware Reference Manual - -config CDU0_CLKO6 - int "CDU0_CLKO6" - range 1 7 - help - Clock source select. Refer to SOC Hardware Reference Manual - -config CDU0_CLKO7 - int "CDU0_CLKO7" - range 1 7 - help - Clock source select. Refer to SOC Hardware Reference Manual - -config CDU0_CLKO8 - int "CDU0_CLKO8" - range 1 7 - help - Clock source select. Refer to SOC Hardware Reference Manual - -config CDU0_CLKO9 - int "CDU0_CLKO9" - range 1 7 - help - Clock source select. Refer to SOC Hardware Reference Manual - -config CDU0_CLKO10 - int "CDU0_CLKO10" - range 1 7 - depends on (SC59X || SC59X_64) - help - Clock source select. Refer to SOC Hardware Reference Manual - -config CDU0_CLKO12 - int "CDU0_CLKO12" - range 1 7 - depends on (SC59X || SC59X_64) - help - Clock source select. Refer to SOC Hardware Reference Manual - -config CDU0_CLKO13 - int "CDU0_CLKO13" - range 1 7 - depends on SC59X_64 - help - Clock source select. Refer to SOC Hardware Reference Manual - -config CDU0_CLKO14 - int "CDU0_CLKO14" - range 1 7 - depends on SC59X_64 - help - Clock source select. Refer to SOC Hardware Reference Manual - -endmenu - -config ADI_GPIO - bool - default y - -config PINCTRL_ADI - bool - default y - -endif diff --git a/arch/arm/mach-sc5xx/Makefile b/arch/arm/mach-sc5xx/Makefile deleted file mode 100644 index eeb56c078b3..00000000000 --- a/arch/arm/mach-sc5xx/Makefile +++ /dev/null @@ -1,19 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0-or-later -# -# (C) Copyright 2022 - Analog Devices, Inc. -# -# Written and/or maintained by Timesys Corporation -# -# Contact: Nathan Barrett-Morrison -# Contact: Greg Malysa -# - -obj-y += soc.o init/ - -obj-$(CONFIG_SC57X) += sc57x.o -obj-$(CONFIG_SC58X) += sc58x.o -obj-$(CONFIG_SC59X) += sc59x.o -obj-$(CONFIG_SC59X_64) += sc59x_64.o - -obj-$(CONFIG_SPL_BUILD) += spl.o -obj-$(CONFIG_SYSCON) += rcu.o diff --git a/arch/arm/mach-sc5xx/config.mk b/arch/arm/mach-sc5xx/config.mk deleted file mode 100644 index 580964e559c..00000000000 --- a/arch/arm/mach-sc5xx/config.mk +++ /dev/null @@ -1,16 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0-or-later -# -# (C) Copyright 2022 - Analog Devices, Inc. -# -# Written and/or maintained by Timesys Corporation -# -# Contact: Nathan Barrett-Morrison -# Contact: Greg Malysa -# - -ifdef CONFIG_SPL_BUILD -INPUTS-y += $(obj)/u-boot-spl.ldr -endif - -LDR_FLAGS += --bcode=$(CONFIG_SC_BOOT_MODE) -LDR_FLAGS += --use-vmas diff --git a/arch/arm/mach-sc5xx/init/Makefile b/arch/arm/mach-sc5xx/init/Makefile deleted file mode 100644 index 9d4920fe076..00000000000 --- a/arch/arm/mach-sc5xx/init/Makefile +++ /dev/null @@ -1,11 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0-or-later -# -# (C) Copyright 2022 - Analog Devices, Inc. -# -# Written and/or maintained by Timesys Corporation -# -# Contact: Nathan Barrett-Morrison -# Contact: Greg Malysa -# - -obj-y += dmcinit.o clkinit.o diff --git a/arch/arm/mach-sc5xx/init/clkinit.c b/arch/arm/mach-sc5xx/init/clkinit.c deleted file mode 100644 index ae53cd61efd..00000000000 --- a/arch/arm/mach-sc5xx/init/clkinit.c +++ /dev/null @@ -1,558 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * (C) Copyright 2022 - Analog Devices, Inc. - * - * Written and/or maintained by Timesys Corporation - * - * Contact: Nathan Barrett-Morrison - * Contact: Greg Malysa - */ - -#include -#include -#include -#include "clkinit.h" -#include "dmcinit.h" - -#ifdef CONFIG_CGU0_SCLK0_DIV - #define VAL_CGU0_SCLK0_DIV CONFIG_CGU0_SCLK0_DIV -#else - #define VAL_CGU0_SCLK0_DIV 1 -#endif -#ifdef CONFIG_CGU0_SCLK1_DIV - #define VAL_CGU0_SCLK1_DIV CONFIG_CGU0_SCLK1_DIV -#else - #define VAL_CGU0_SCLK1_DIV 1 -#endif -#ifdef CONFIG_CGU0_DIV_S0SELEX - #define VAL_CGU0_DIV_S0SELEX CONFIG_CGU0_DIV_S0SELEX -#else - #define VAL_CGU0_DIV_S0SELEX -1 -#endif -#ifdef CONFIG_CGU0_DIV_S1SELEX - #define VAL_CGU0_DIV_S1SELEX CONFIG_CGU0_DIV_S1SELEX -#else - #define VAL_CGU0_DIV_S1SELEX -1 -#endif -#ifdef CONFIG_CGU0_CLKOUTSEL - #define VAL_CGU0_CLKOUTSEL CONFIG_CGU0_CLKOUTSEL -#else - #define VAL_CGU0_CLKOUTSEL -1 -#endif -#ifdef CONFIG_CGU1_SCLK0_DIV - #define VAL_CGU1_SCLK0_DIV CONFIG_CGU1_SCLK0_DIV -#else - #define VAL_CGU1_SCLK0_DIV 1 -#endif -#ifdef CONFIG_CGU1_SCLK1_DIV - #define VAL_CGU1_SCLK1_DIV CONFIG_CGU1_SCLK1_DIV -#else - #define VAL_CGU1_SCLK1_DIV 1 -#endif -#ifdef CONFIG_CGU1_DIV_S0SELEX - #define VAL_CGU1_DIV_S0SELEX CONFIG_CGU1_DIV_S0SELEX -#else - #define VAL_CGU1_DIV_S0SELEX -1 -#endif -#ifdef CONFIG_CGU1_DIV_S1SELEX - #define VAL_CGU1_DIV_S1SELEX CONFIG_CGU1_DIV_S1SELEX -#else - #define VAL_CGU1_DIV_S1SELEX -1 -#endif -#ifdef CONFIG_CGU1_CLKOUTSEL - #define VAL_CGU1_CLKOUTSEL CONFIG_CGU1_CLKOUTSEL -#else - #define VAL_CGU1_CLKOUTSEL -1 -#endif - -#define REG_MISC_REG10_tst_addr 0x310A902C - -#define CGU0_REGBASE 0x3108D000 -#define CGU1_REGBASE 0x3108E000 - -#define CGU_CTL 0x00 // CGU0 Control Register -#define CGU_PLLCTL 0x04 // CGU0 PLL Control Register -#define CGU_STAT 0x08 // CGU0 Status Register -#define CGU_DIV 0x0C // CGU0 Clocks Divisor Register -#define CGU_CLKOUTSEL 0x10 // CGU0 CLKOUT Select Register -#define CGU_DIVEX 0x40 // CGU0 DIV Register Extension - -#define BITP_CGU_DIV_OSEL 22 // OUTCLK Divisor -#define BITP_CGU_DIV_DSEL 16 // DCLK Divisor -#define BITP_CGU_DIV_S1SEL 13 // SCLK 1 Divisor -#define BITP_CGU_DIV_SYSSEL 8 // SYSCLK Divisor -#define BITP_CGU_DIV_S0SEL 5 // SCLK 0 Divisor -#define BITP_CGU_DIV_CSEL 0 // CCLK Divisor - -#define BITP_CGU_CTL_MSEL 8 // Multiplier Select -#define BITP_CGU_CTL_DF 0 // Divide Frequency - -#define BITM_CGU_STAT_CLKSALGN 0x00000008 -#define BITM_CGU_STAT_PLOCK 0x00000004 -#define BITM_CGU_STAT_PLLBP 0x00000002 -#define BITM_CGU_STAT_PLLEN 0x00000001 - -/* PLL Multiplier and Divisor Selections (Required Value, Bit Position) */ -/* PLL Multiplier Select */ -#define MSEL(X) (((X) << BITP_CGU_CTL_MSEL) & \ - BITM_CGU_CTL_MSEL) -/* Divide frequency[true or false] */ -#define DF(X) (((X) << BITP_CGU_CTL_DF) & \ - BITM_CGU_CTL_DF) -/* Core Clock Divisor Select */ -#define CSEL(X) (((X) << BITP_CGU_DIV_CSEL) & \ - BITM_CGU_DIV_CSEL) -/* System Clock Divisor Select */ -#define SYSSEL(X) (((X) << BITP_CGU_DIV_SYSSEL) & \ - BITM_CGU_DIV_SYSSEL) -/* SCLK0 Divisor Select */ -#define S0SEL(X) (((X) << BITP_CGU_DIV_S0SEL) & \ - BITM_CGU_DIV_S0SEL) -/* SCLK1 Divisor Select */ -#define S1SEL(X) (((X) << BITP_CGU_DIV_S1SEL) & \ - BITM_CGU_DIV_S1SEL) -/* DDR Clock Divisor Select */ -#define DSEL(X) (((X) << BITP_CGU_DIV_DSEL) & \ - BITM_CGU_DIV_DSEL) -/* OUTCLK Divisor Select */ -#define OSEL(X) (((X) << BITP_CGU_DIV_OSEL) & \ - BITM_CGU_DIV_OSEL) -/* CLKOUT select */ -#define CLKOUTSEL(X) (((X) << BITP_CGU_CLKOUTSEL_CLKOUTSEL) & \ - BITM_CGU_CLKOUTSEL_CLKOUTSEL) -#define S0SELEX(X) (((X) << BITP_CGU_DIVEX_S0SELEX) & \ - BITM_CGU_DIVEX_S0SELEX) -#define S1SELEX(X) (((X) << BITP_CGU_DIVEX_S1SELEX) & \ - BITM_CGU_DIVEX_S1SELEX) - -struct CGU_Settings { - phys_addr_t rbase; - u32 ctl_MSEL:7; - u32 ctl_DF:1; - u32 div_CSEL:5; - u32 div_SYSSEL:5; - u32 div_S0SEL:3; - u32 div_S1SEL:3; - u32 div_DSEL:5; - u32 div_OSEL:7; - s16 divex_S0SELEX; - s16 divex_S1SELEX; - s8 clkoutsel; -}; - -/* CGU Registers */ -#define BITM_CGU_CTL_LOCK 0x80000000 /* Lock */ - -#define BITM_CGU_CTL_MSEL 0x00007F00 /* Multiplier Select */ -#define BITM_CGU_CTL_DF 0x00000001 /* Divide Frequency */ -#define BITM_CGU_CTL_S1SELEXEN 0x00020000 /* SCLK1 Extension Divider Enable */ -#define BITM_CGU_CTL_S0SELEXEN 0x00010000 /* SCLK0 Extension Divider Enable */ - -#define BITM_CGU_DIV_LOCK 0x80000000 /* Lock */ -#define BITM_CGU_DIV_UPDT 0x40000000 /* Update Clock Divisors */ -#define BITM_CGU_DIV_ALGN 0x20000000 /* Align */ -#define BITM_CGU_DIV_OSEL 0x1FC00000 /* OUTCLK Divisor */ -#define BITM_CGU_DIV_DSEL 0x001F0000 /* DCLK Divisor */ -#define BITM_CGU_DIV_S1SEL 0x0000E000 /* SCLK 1 Divisor */ -#define BITM_CGU_DIV_SYSSEL 0x00001F00 /* SYSCLK Divisor */ -#define BITM_CGU_DIV_S0SEL 0x000000E0 /* SCLK 0 Divisor */ -#define BITM_CGU_DIV_CSEL 0x0000001F /* CCLK Divisor */ - -#define BITP_CGU_DIVEX_S0SELEX 0 -#define BITM_CGU_DIVEX_S0SELEX 0x000000FF /* SCLK 0 Extension Divisor */ - -#define BITP_CGU_DIVEX_S1SELEX 16 -#define BITM_CGU_DIVEX_S1SELEX 0x00FF0000 /* SCLK 1 Extension Divisor */ - -#define BITM_CGU_PLLCTL_PLLEN 0x00000008 /* PLL Enable */ -#define BITM_CGU_PLLCTL_PLLBPCL 0x00000002 /* PLL Bypass Clear */ -#define BITM_CGU_PLLCTL_PLLBPST 0x00000001 /* PLL Bypass Set */ - -#define BITP_CGU_CLKOUTSEL_CLKOUTSEL 0 /* CLKOUT Select */ -#define BITM_CGU_CLKOUTSEL_CLKOUTSEL 0x0000001F /* CLKOUT Select */ - -#define CGU_STAT_MASK (BITM_CGU_STAT_PLLEN | BITM_CGU_STAT_PLOCK | \ - BITM_CGU_STAT_CLKSALGN) -#define CGU_STAT_ALGN_LOCK (BITM_CGU_STAT_PLLEN | BITM_CGU_STAT_PLOCK) - -/* Clock Distribution Unit Registers */ -#define REG_CDU0_CFG0 0x3108F000 -#define REG_CDU0_CFG1 0x3108F004 -#define REG_CDU0_CFG2 0x3108F008 -#define REG_CDU0_CFG3 0x3108F00C -#define REG_CDU0_CFG4 0x3108F010 -#define REG_CDU0_CFG5 0x3108F014 -#define REG_CDU0_CFG6 0x3108F018 -#define REG_CDU0_CFG7 0x3108F01C -#define REG_CDU0_CFG8 0x3108F020 -#define REG_CDU0_CFG9 0x3108F024 -#define REG_CDU0_CFG10 0x3108F028 -#define REG_CDU0_CFG11 0x3108F02C -#define REG_CDU0_CFG12 0x3108F030 -#define REG_CDU0_CFG13 0x3108F034 -#define REG_CDU0_CFG14 0x3108F038 -#define REG_CDU0_STAT 0x3108F040 -#define REG_CDU0_CLKINSEL 0x3108F044 -#define REG_CDU0_REVID 0x3108F048 - -#define BITM_REG10_MSEL3 0x000007F0 -#define BITP_REG10_MSEL3 4 - -#define BITM_REG10_DSEL3 0x0001F000 -#define BITP_REG10_DSEL3 12 - -/* Selected clock macros */ -#define CGUn_MULT(cgu) ((CONFIG_CGU##cgu##_VCO_MULT == 0) ? \ - 128 : CONFIG_CGU##cgu##_VCO_MULT) -#define CGUn_DIV(clkname, cgu) ((CONFIG_CGU##cgu##_##clkname##_DIV == 0) ? \ - 32 : CONFIG_CGU##cgu##_##clkname##_DIV) -#define CCLK1_n_RATIO(cgu) (((CGUn_MULT(cgu)) / \ - (1 + CONFIG_CGU##cgu##_DF_DIV)) / \ - CGUn_DIV(CCLK, cgu)) -#define CCLK2_n_RATIO(cgu) (((CGUn_MULT(cgu) * 2) / 3) / \ - (1 + CONFIG_CGU##cgu##_DF_DIV)) -#define DCLK_n_RATIO(cgu) (((CGUn_MULT(cgu)) / \ - (1 + CONFIG_CGU##cgu##_DF_DIV)) / \ - CGUn_DIV(DCLK, cgu)) -#define SYSCLK_n_RATIO(cgu) (((CGUn_MULT(cgu)) / \ - (1 + CONFIG_CGU##cgu##_DF_DIV)) / \ - CGUn_DIV(SCLK, cgu)) -#define PLL3_RATIO ((CONFIG_CGU1_PLL3_VCO_MSEL) / \ - (CONFIG_CGU1_PLL3_DCLK_DIV)) - -#if (1 == CONFIG_CDU0_CLKO2) - #define ARMCLK_IN 0 - #define ARMCLK_RATIO CCLK1_n_RATIO(0) -#elif (3 == CONFIG_CDU0_CLKO2) && \ - (defined(CONFIG_SC57X) || defined(CONFIG_SC58X)) - #define ARMCLK_IN 0 - #define ARMCLK_RATIO SYSCLK_n_RATIO(0) -#elif (5 == CONFIG_CDU0_CLKO2) && defined(CONFIG_SC59X_64) - #define ARMCLK_IN 0 - #define ARMCLK_RATIO CCLK2_n_RATIO(0) -#elif (7 == CONFIG_CDU0_CLKO2) && defined(CONFIG_SC59X_64) - #define ARMCLK_IN CDU0_CGU1_CLKIN - #define ARMCLK_RATIO CCLK2_n_RATIO(1) -#endif - -#ifdef CONFIG_CGU1_PLL3_DDRCLK - #define DDRCLK_IN CDU0_CGU1_CLKIN - #define DDRCLK_RATIO PLL3_RATIO -#elif (1 == CONFIG_CDU0_CLKO3) - #define DDRCLK_IN 0 - #define DDRCLK_RATIO DCLK_n_RATIO(0) -#elif (3 == CONFIG_CDU0_CLKO3) - #define DDRCLK_IN CDU0_CGU1_CLKIN - #define DDRCLK_RATIO DCLK_n_RATIO(1) -#endif - -#ifndef ARMCLK_RATIO - #error Invalid/unknown ARMCLK selection! -#endif -#ifndef DDRCLK_RATIO - #error Invalid/unknown DDRCLK selection! -#endif - -#define ARMDDR_CLK_RATIO_FPERCISION 1000 - -#if ARMCLK_IN != DDRCLK_IN - #ifndef CUSTOM_ARMDDR_CLK_RATIO - /** - * SYS_CLKINx are defined within the device tree, not configs. - * Thus, we can only determine cross-CGU clock ratios if they - * use the same SYS_CLKINx. - */ - #error Define CUSTOM_ARMDDR_CLK_RATIO for different SYS_CLKINs - #else - #define ARMDDR_CLK_RATIO CUSTOM_ARMDDR_CLK_RATIO - #endif -#else - #define ARMDDR_CLK_RATIO (ARMDDR_CLK_RATIO_FPERCISION *\ - ARMCLK_RATIO / DDRCLK_RATIO) -#endif - -void dmcdelay(uint32_t delay) -{ - /* There is no zero-overhead loop on ARM, so assume each iteration - * takes 4 processor cycles (based on examination of -O3 and -Ofast - * output). - */ - u32 i, remainder; - - /* Convert DDR cycles to core clock cycles */ - u32 f = delay * ARMDDR_CLK_RATIO; - - delay = f + 500; - delay /= ARMDDR_CLK_RATIO_FPERCISION; - - /* Round up to multiple of 4 */ - remainder = delay % 4; - if (remainder != 0u) - delay += (4u - remainder); - - for (i = 0; i < delay; i += 4) - asm("nop"); -} - -static void program_cgu(const struct CGU_Settings *cgu) -{ - const uintptr_t b = cgu->rbase; - const bool use_extension0 = cgu->divex_S0SELEX >= 0; - const bool use_extension1 = cgu->divex_S1SELEX >= 0; - u32 temp; - - temp = OSEL(cgu->div_OSEL); - temp |= SYSSEL(cgu->div_SYSSEL); - temp |= CSEL(cgu->div_CSEL); - temp |= DSEL(cgu->div_DSEL); - temp |= (S0SEL(cgu->div_S0SEL)); - temp |= (S1SEL(cgu->div_S1SEL)); - temp &= ~BITM_CGU_DIV_LOCK; - - //Put PLL in to Bypass Mode - writel(BITM_CGU_PLLCTL_PLLEN | BITM_CGU_PLLCTL_PLLBPST, - b + CGU_PLLCTL); - while (!(readl(b + CGU_STAT) & BITM_CGU_STAT_PLLBP)) - ; - - while (!((readl(b + CGU_STAT) & CGU_STAT_MASK) == CGU_STAT_ALGN_LOCK)) - ; - - dmcdelay(1000); - - writel(temp & (~BITM_CGU_DIV_ALGN) & (~BITM_CGU_DIV_UPDT), - b + CGU_DIV); - - dmcdelay(1000); - - temp = MSEL(cgu->ctl_MSEL) | DF(cgu->ctl_DF); - if (use_extension0) - temp |= BITM_CGU_CTL_S0SELEXEN; - if (use_extension1) - temp |= BITM_CGU_CTL_S1SELEXEN; - - writel(temp & (~BITM_CGU_CTL_LOCK), b + CGU_CTL); - - if (use_extension0 || use_extension1) { - u32 mask = BITM_CGU_CTL_S1SELEXEN | BITM_CGU_CTL_S0SELEXEN; - - while (!(readl(b + CGU_CTL) & mask)) - ; - - temp = readl(b + CGU_DIVEX); - - if (use_extension0) { - temp &= ~BITM_CGU_DIVEX_S0SELEX; - temp |= S0SELEX(cgu->divex_S0SELEX); - } - - if (use_extension1) { - temp &= ~BITM_CGU_DIVEX_S1SELEX; - temp |= S1SELEX(cgu->divex_S1SELEX); - } - - writel(temp, b + CGU_DIVEX); - } - - dmcdelay(1000); - - //Take PLL out of Bypass Mode - writel(BITM_CGU_PLLCTL_PLLEN | BITM_CGU_PLLCTL_PLLBPCL, - b + CGU_PLLCTL); - while ((readl(b + CGU_STAT) & - (BITM_CGU_STAT_PLLBP | BITM_CGU_STAT_CLKSALGN))) - ; - - dmcdelay(1000); - - if (cgu->clkoutsel >= 0) { - temp = readl(b + CGU_CLKOUTSEL); - temp &= ~BITM_CGU_CLKOUTSEL_CLKOUTSEL; - temp |= CLKOUTSEL(cgu->clkoutsel); - writel(temp, b + CGU_CLKOUTSEL); - } -} - -void adi_config_third_pll(void) -{ -#if defined(CONFIG_CGU1_PLL3_VCO_MSEL) && defined(CONFIG_CGU1_PLL3_DCLK_DIV) - u32 temp; - - u32 msel = CONFIG_CGU1_PLL3_VCO_MSEL - 1; - u32 dsel = CONFIG_CGU1_PLL3_DCLK_DIV - 1; - - temp = readl(REG_MISC_REG10_tst_addr); - temp &= 0xFFFE0000; - writel(temp, REG_MISC_REG10_tst_addr); - - dmcdelay(4000u); - - //update MSEL [10:4] - temp = readl(REG_MISC_REG10_tst_addr); - temp |= ((msel << BITP_REG10_MSEL3) & BITM_REG10_MSEL3); - writel(temp, REG_MISC_REG10_tst_addr); - - temp = readl(REG_MISC_REG10_tst_addr); - temp |= 0x2; - writel(temp, REG_MISC_REG10_tst_addr); - - dmcdelay(100000u); - - temp = readl(REG_MISC_REG10_tst_addr); - temp |= 0x1; - writel(temp, REG_MISC_REG10_tst_addr); - - temp = readl(REG_MISC_REG10_tst_addr); - temp |= 0x800; - writel(temp, REG_MISC_REG10_tst_addr); - - temp = readl(REG_MISC_REG10_tst_addr); - temp &= 0xFFFFF7F8; - writel(temp, REG_MISC_REG10_tst_addr); - - dmcdelay(4000u); - - temp = readl(REG_MISC_REG10_tst_addr); - temp |= ((dsel << BITP_REG10_DSEL3) & BITM_REG10_DSEL3); - writel(temp, REG_MISC_REG10_tst_addr); - - temp = readl(REG_MISC_REG10_tst_addr); - temp |= 0x4; - writel(temp, REG_MISC_REG10_tst_addr); - - dmcdelay(100000u); - - temp = readl(REG_MISC_REG10_tst_addr); - temp |= 0x1; - writel(temp, REG_MISC_REG10_tst_addr); - - temp = readl(REG_MISC_REG10_tst_addr); - temp |= 0x800; - writel(temp, REG_MISC_REG10_tst_addr); -#endif -} - -static void Active_To_Fullon(const struct CGU_Settings *pCGU) -{ - u32 tmp; - - while (1) { - tmp = readl(pCGU->rbase + CGU_STAT); - if ((tmp & BITM_CGU_STAT_PLLEN) && - (tmp & BITM_CGU_STAT_PLLBP)) - break; - } - - writel(BITM_CGU_PLLCTL_PLLBPCL, pCGU->rbase + CGU_PLLCTL); - - while (1) { - tmp = readl(pCGU->rbase + CGU_STAT); - if ((tmp & BITM_CGU_STAT_PLLEN) && - ~(tmp & BITM_CGU_STAT_PLLBP) && - ~(tmp & BITM_CGU_STAT_CLKSALGN)) - break; - } -} - -static void CGU_Init(const struct CGU_Settings *pCGU) -{ - const uintptr_t b = pCGU->rbase; - -#if defined(CONFIG_SC59X) || defined(CONFIG_SC59X_64) - if (readl(b + CGU_STAT) & BITM_CGU_STAT_PLLEN) - writel(BITM_CGU_PLLCTL_PLLEN, b + CGU_PLLCTL); - - dmcdelay(1000); -#endif - - /* Check if processor is in Active mode */ - if (readl(b + CGU_STAT) & BITM_CGU_STAT_PLLBP) - Active_To_Fullon(pCGU); - -#if defined(CONFIG_SC59X) || defined(CONFIG_SC59X_64) - dmcdelay(1000); -#endif - - program_cgu(pCGU); -} - -void cgu_init(void) -{ - const struct CGU_Settings dividers0 = { - .rbase = CGU0_REGBASE, - .ctl_MSEL = CONFIG_CGU0_VCO_MULT, - .ctl_DF = CONFIG_CGU0_DF_DIV, - .div_CSEL = CONFIG_CGU0_CCLK_DIV, - .div_SYSSEL = CONFIG_CGU0_SCLK_DIV, - .div_S0SEL = VAL_CGU0_SCLK0_DIV, - .div_S1SEL = VAL_CGU0_SCLK1_DIV, - .div_DSEL = CONFIG_CGU0_DCLK_DIV, - .div_OSEL = CONFIG_CGU0_OCLK_DIV, - .divex_S0SELEX = VAL_CGU0_DIV_S0SELEX, - .divex_S1SELEX = VAL_CGU0_DIV_S1SELEX, - .clkoutsel = VAL_CGU0_CLKOUTSEL, - }; - const struct CGU_Settings dividers1 = { - .rbase = CGU1_REGBASE, - .ctl_MSEL = CONFIG_CGU1_VCO_MULT, - .ctl_DF = CONFIG_CGU1_DF_DIV, - .div_CSEL = CONFIG_CGU1_CCLK_DIV, - .div_SYSSEL = CONFIG_CGU1_SCLK_DIV, - .div_S0SEL = VAL_CGU1_SCLK0_DIV, - .div_S1SEL = VAL_CGU1_SCLK1_DIV, - .div_DSEL = CONFIG_CGU1_DCLK_DIV, - .div_OSEL = CONFIG_CGU1_OCLK_DIV, - .divex_S0SELEX = VAL_CGU1_DIV_S0SELEX, - .divex_S1SELEX = VAL_CGU1_DIV_S1SELEX, - .clkoutsel = VAL_CGU1_CLKOUTSEL, - }; - - CGU_Init(÷rs0); - CGU_Init(÷rs1); -} - -#define CONFIGURE_CDU0(a, b, c) \ - writel(a, b); \ - while (readl(REG_CDU0_STAT) & (1 << (c))) - -void cdu_init(void) -{ - while (readl(REG_CDU0_STAT) & 0xffff) - ; - writel((CONFIG_CDU0_CGU1_CLKIN & 0x1), REG_CDU0_CLKINSEL); - - CONFIGURE_CDU0(CONFIG_CDU0_CLKO0, REG_CDU0_CFG0, 0); - CONFIGURE_CDU0(CONFIG_CDU0_CLKO1, REG_CDU0_CFG1, 1); - CONFIGURE_CDU0(CONFIG_CDU0_CLKO2, REG_CDU0_CFG2, 2); - CONFIGURE_CDU0(CONFIG_CDU0_CLKO3, REG_CDU0_CFG3, 3); - CONFIGURE_CDU0(CONFIG_CDU0_CLKO4, REG_CDU0_CFG4, 4); - CONFIGURE_CDU0(CONFIG_CDU0_CLKO5, REG_CDU0_CFG5, 5); - CONFIGURE_CDU0(CONFIG_CDU0_CLKO6, REG_CDU0_CFG6, 6); - CONFIGURE_CDU0(CONFIG_CDU0_CLKO7, REG_CDU0_CFG7, 7); - CONFIGURE_CDU0(CONFIG_CDU0_CLKO8, REG_CDU0_CFG8, 8); - CONFIGURE_CDU0(CONFIG_CDU0_CLKO9, REG_CDU0_CFG9, 9); -#ifdef CONFIG_CDU0_CLKO10 - CONFIGURE_CDU0(CONFIG_CDU0_CLKO10, REG_CDU0_CFG10, 10); -#endif -#ifdef CONFIG_CDU0_CLKO12 - CONFIGURE_CDU0(CONFIG_CDU0_CLKO12, REG_CDU0_CFG12, 12); -#endif -#ifdef CONFIG_CDU0_CLKO13 - CONFIGURE_CDU0(CONFIG_CDU0_CLKO13, REG_CDU0_CFG13, 13); -#endif -#ifdef CONFIG_CDU0_CLKO14 - CONFIGURE_CDU0(CONFIG_CDU0_CLKO14, REG_CDU0_CFG14, 14); -#endif -} - -void clks_init(void) -{ - adi_dmc_reset_lanes(true); - - cdu_init(); - cgu_init(); - - adi_config_third_pll(); - - adi_dmc_reset_lanes(false); -} diff --git a/arch/arm/mach-sc5xx/init/clkinit.h b/arch/arm/mach-sc5xx/init/clkinit.h deleted file mode 100644 index b05f4325bfc..00000000000 --- a/arch/arm/mach-sc5xx/init/clkinit.h +++ /dev/null @@ -1,18 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later */ -/* - * (C) Copyright 2022 - Analog Devices, Inc. - * - * Written and/or maintained by Timesys Corporation - * - * Contact: Nathan Barrett-Morrison - * Contact: Greg Malysa - */ - -#ifndef CLKINIT_H_ -#define CLKINIT_H_ - -void clks_init(void); - -void dmcdelay(uint32_t delay); - -#endif diff --git a/arch/arm/mach-sc5xx/init/dmcinit.c b/arch/arm/mach-sc5xx/init/dmcinit.c deleted file mode 100644 index e375b5c9dfa..00000000000 --- a/arch/arm/mach-sc5xx/init/dmcinit.c +++ /dev/null @@ -1,954 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * (C) Copyright 2022 - Analog Devices, Inc. - * - * Written and/or maintained by Timesys Corporation - * - * Contact: Nathan Barrett-Morrison - * Contact: Greg Malysa - */ - -#include -#include -#include -#include "clkinit.h" -#include "dmcinit.h" - -#define REG_DMC0_BASE 0x31070000 -#define REG_DMC1_BASE 0x31073000 - -#define REG_DMC_CTL 0x0004 // Control Register -#define REG_DMC_STAT 0x0008 // Status Register -#define REG_DMC_CFG 0x0040 // Configuration Register -#define REG_DMC_TR0 0x0044 // Timing 0 Register -#define REG_DMC_TR1 0x0048 // Timing 1 Register -#define REG_DMC_TR2 0x004C // Timing 2 Register -#define REG_DMC_MR 0x0060 // Shadow MR Register (DDR3) -#define REG_DMC_EMR1 0x0064 // Shadow EMR1 Register -#define REG_DMC_EMR2 0x0068 // Shadow EMR2 Register -#define REG_DMC_EMR3 0x006C -#define REG_DMC_DLLCTL 0x0080 // DLL Control Register -#define REG_DMC_DT_CALIB_ADDR 0x0090 // Data Calibration Address Register -#define REG_DMC_CPHY_CTL 0x01C0 // Controller to PHY Interface Register - -/* SC57x && SC58x DMC REGs */ -#define REG_DMC_PHY_CTL0 0x1000 // PHY Control 0 Register -#define REG_DMC_PHY_CTL1 0x1004 // PHY Control 1 Register -#define REG_DMC_PHY_CTL2 0x1008 // PHY Control 2 Register -#define REG_DMC_PHY_CTL3 0x100c // PHY Control 3 Register -#define REG_DMC_PHY_CTL4 0x1010 // PHY Control 4 Register -#define REG_DMC_CAL_PADCTL0 0x1034 // CALIBRATION PAD CTL 0 Register -#define REG_DMC_CAL_PADCTL2 0x103C // CALIBRATION PAD CTL2 Register -/* END */ - -/* SC59x DMC REGs */ -#define REG_DMC_DDR_LANE0_CTL0 0x1000 // Data Lane 0 Control Register 0 -#define REG_DMC_DDR_LANE0_CTL1 0x1004 // Data Lane 0 Control Register 1 -#define REG_DMC_DDR_LANE1_CTL0 0x100C // Data Lane 1 Control Register 0 -#define REG_DMC_DDR_LANE1_CTL1 0x1010 // Data Lane 1 Control Register 1 -#define REG_DMC_DDR_ROOT_CTL 0x1018 // DDR ROOT Module Control Register -#define REG_DMC_DDR_ZQ_CTL0 0x1034 // DDR Calibration Control Register 0 -#define REG_DMC_DDR_ZQ_CTL1 0x1038 // DDR Calibration Control Register 1 -#define REG_DMC_DDR_ZQ_CTL2 0x103C // DDR Calibration Control Register 2 -#define REG_DMC_DDR_CA_CTL 0x1068 // DDR CA Lane Control Register -/* END */ - -#define REG_DMC_DDR_SCRATCH_2 0x1074 -#define REG_DMC_DDR_SCRATCH_3 0x1078 -#define REG_DMC_DDR_SCRATCH_6 0x1084 -#define REG_DMC_DDR_SCRATCH_7 0x1088 - -#define REG_DMC_DDR_SCRATCH_STAT0 0x107C -#define REG_DMC_DDR_SCRATCH_STAT1 0x1080 - -#define DMC0_DATA_CALIB_ADD 0x80000000 -#define DMC1_DATA_CALIB_ADD 0xC0000000 - -#define BITM_DMC_CFG_EXTBANK 0x0000F000 /* External Banks */ -#define ENUM_DMC_CFG_EXTBANK1 0x00000000 /* EXTBANK: 1 External Bank */ -#define BITM_DMC_CFG_SDRSIZE 0x00000F00 /* SDRAM Size */ -#define ENUM_DMC_CFG_SDRSIZE64 0x00000000 /* SDRSIZE: 64M Bit SDRAM (LPDDR Only) */ -#define ENUM_DMC_CFG_SDRSIZE128 0x00000100 /* SDRSIZE: 128M Bit SDRAM (LPDDR Only) */ -#define ENUM_DMC_CFG_SDRSIZE256 0x00000200 /* SDRSIZE: 256M Bit SDRAM */ -#define ENUM_DMC_CFG_SDRSIZE512 0x00000300 /* SDRSIZE: 512M Bit SDRAM */ -#define ENUM_DMC_CFG_SDRSIZE1G 0x00000400 /* SDRSIZE: 1G Bit SDRAM */ -#define ENUM_DMC_CFG_SDRSIZE2G 0x00000500 /* SDRSIZE: 2G Bit SDRAM */ -#define ENUM_DMC_CFG_SDRSIZE4G 0x00000600 /* SDRSIZE: 4G Bit SDRAM */ -#define ENUM_DMC_CFG_SDRSIZE8G 0x00000700 /* SDRSIZE: 8G Bit SDRAM */ -#define BITM_DMC_CFG_SDRWID 0x000000F0 /* SDRAM Width */ -#define ENUM_DMC_CFG_SDRWID16 0x00000020 /* SDRWID: 16-Bit Wide SDRAM */ -#define BITM_DMC_CFG_IFWID 0x0000000F /* Interface Width */ -#define ENUM_DMC_CFG_IFWID16 0x00000002 /* IFWID: 16-Bit Wide Interface */ - -#define BITM_DMC_CTL_DDR3EN 0x00000001 -#define BITM_DMC_CTL_INIT 0x00000004 -#define BITP_DMC_STAT_INITDONE 2 /* Initialization Done */ -#define BITM_DMC_STAT_INITDONE 0x00000004 - -#define BITP_DMC_CTL_AL_EN 27 -#define BITP_DMC_CTL_ZQCL 25 /* ZQ Calibration Long */ -#define BITP_DMC_CTL_ZQCS 24 /* ZQ Calibration Short */ -#define BITP_DMC_CTL_DLLCAL 13 /* DLL Calibration Start */ -#define BITP_DMC_CTL_PPREF 12 /* Postpone Refresh */ -#define BITP_DMC_CTL_RDTOWR 9 /* Read-to-Write Cycle */ -#define BITP_DMC_CTL_ADDRMODE 8 /* Addressing (Page/Bank) Mode */ -#define BITP_DMC_CTL_RESET 7 /* Reset SDRAM */ -#define BITP_DMC_CTL_PREC 6 /* Precharge */ -#define BITP_DMC_CTL_DPDREQ 5 /* Deep Power Down Request */ -#define BITP_DMC_CTL_PDREQ 4 /* Power Down Request */ -#define BITP_DMC_CTL_SRREQ 3 /* Self Refresh Request */ -#define BITP_DMC_CTL_INIT 2 /* Initialize DRAM Start */ -#define BITP_DMC_CTL_LPDDR 1 /* Low Power DDR Mode */ -#define BITP_DMC_CTL_DDR3EN 0 /* DDR3 Mode */ - -#ifdef CONFIG_TARGET_SC584_EZKIT - #define DMC_PADCTL2_VALUE 0x0078283C -#elif CONFIG_TARGET_SC573_EZKIT - #define DMC_PADCTL2_VALUE 0x00782828 -#elif CONFIG_TARGET_SC589_MINI || CONFIG_TARGET_SC589_EZKIT - #define DMC_PADCTL2_VALUE 0x00783C3C -#elif defined(CONFIG_SC57X) || defined(CONFIG_SC58X) - #error "PADCTL2 not specified for custom board!" -#else - //Newer DMC. Legacy calibration obsolete - #define DMC_PADCTL2_VALUE 0x0 -#endif - -#define DMC_CPHYCTL_VALUE 0x0000001A - -#define BITP_DMC_MR1_QOFF 12 /* Output Buffer Enable */ -#define BITP_DMC_MR1_TDQS 11 /* Termination Data Strobe */ -#define BITP_DMC_MR1_RTT2 9 /* Rtt_nom */ -#define BITP_DMC_MR1_WL 7 /* Write Leveling Enable. */ -#define BITP_DMC_MR1_RTT1 6 /* Rtt_nom */ -#define BITP_DMC_MR1_DIC1 5 /* Output Driver Impedance Control */ -#define BITP_DMC_MR1_AL 3 /* Additive Latency */ -#define BITP_DMC_MR1_RTT0 2 /* Rtt_nom */ -#define BITP_DMC_MR1_DIC0 1 /* Output Driver Impedance control */ -#define BITP_DMC_MR1_DLLEN 0 /* DLL Enable */ - -#define BITP_DMC_MR2_CWL 3 /* CAS write Latency */ - -#define BITP_DMC_TR0_TMRD 28 /* Timing Mode Register Delay */ -#define BITP_DMC_TR0_TRC 20 /* Timing Row Cycle */ -#define BITP_DMC_TR0_TRAS 12 /* Timing Row Active Time */ -#define BITP_DMC_TR0_TRP 8 /* Timing RAS Precharge. */ -#define BITP_DMC_TR0_TWTR 4 /* Timing Write to Read */ -#define BITP_DMC_TR0_TRCD 0 /* Timing RAS to CAS Delay */ - -#define BITP_DMC_TR1_TRRD 28 /* Timing Read-Read Delay */ -#define BITP_DMC_TR1_TRFC 16 /* Timing Refresh-to-Command */ -#define BITP_DMC_TR1_TREF 0 /* Timing Refresh Interval */ - -#define BITP_DMC_TR2_TCKE 20 /* Timing Clock Enable */ -#define BITP_DMC_TR2_TXP 16 /* Timing Exit Powerdown */ -#define BITP_DMC_TR2_TWR 12 /* Timing Write Recovery */ -#define BITP_DMC_TR2_TRTP 8 /* Timing Read-to-Precharge */ -#define BITP_DMC_TR2_TFAW 0 /* Timing Four-Activated-Window */ - -#define BITP_DMC_MR_PD 12 /* Active Powerdown Mode */ -#define BITP_DMC_MR_WRRECOV 9 /* Write Recovery */ -#define BITP_DMC_MR_DLLRST 8 /* DLL Reset */ -#define BITP_DMC_MR_CL 4 /* CAS Latency */ -#define BITP_DMC_MR_CL0 2 /* CAS Latency */ -#define BITP_DMC_MR_BLEN 0 /* Burst Length */ - -#define BITP_DMC_DLLCTL_DATACYC 8 /* Data Cycles */ -#define BITP_DMC_DLLCTL_DLLCALRDCNT 0 /* DLL Calibration RD Count */ - -#define BITM_DMC_DLLCTL_DATACYC 0x00000F00 /* Data Cycles */ -#define BITM_DMC_DLLCTL_DLLCALRDCNT 0x000000FF /* DLL Calib RD Count */ - -#define BITP_DMC_STAT_PHYRDPHASE 20 /* PHY Read Phase */ - -#define BITM_DMC_DDR_LANE0_CTL0_CB_RSTDAT 0x08000000 /* Rst Data Pads */ -#define BITM_DMC_DDR_LANE1_CTL0_CB_RSTDAT 0x08000000 /* Rst Data Pads */ -#define BITM_DMC_DDR_LANE0_CTL1_COMP_DCYCLE 0x00000002 /* Compute Dcycle */ -#define BITM_DMC_DDR_LANE1_CTL1_COMP_DCYCLE 0x00000002 /* Compute Dcycle */ -#define BITM_DMC_DDR_LANE1_CTL0_CB_RSTDLL 0x00000100 /* Rst Lane DLL */ -#define BITM_DMC_DDR_LANE0_CTL0_CB_RSTDLL 0x00000100 /* Rst Lane DLL */ -#define BITP_DMC_DDR_ROOT_CTL_PIPE_OFSTDCYCLE 10 /* Pipeline offset for PHYC_DATACYCLE */ -#define BITM_DMC_DDR_ROOT_CTL_SW_REFRESH 0x00002000 /* Refresh Lane DLL Code */ -#define BITM_DMC_DDR_CA_CTL_SW_REFRESH 0x00004000 /* Refresh Lane DLL Code */ - -#define BITP_DMC_CTL_RL_DQS 26 /* RL_DQS */ -#define BITM_DMC_CTL_RL_DQS 0x04000000 /* RL_DQS */ -#define BITP_DMC_EMR3_MPR 2 /* Multi Purpose Read Enable (Read Leveling)*/ -#define BITM_DMC_EMR3_MPR 0x00000004 /* Multi Purpose Read Enable (Read Leveling)*/ -#define BITM_DMC_MR1_WL 0x00000080 /* Write Leveling Enable.*/ -#define BITM_DMC_STAT_PHYRDPHASE 0x00F00000 /* PHY Read Phase */ - -#define BITP_DMC_DDR_LANE0_CTL1_BYPCODE 10 -#define BITM_DMC_DDR_LANE0_CTL1_BYPCODE 0x00007C00 -#define BITP_DMC_DDR_LANE0_CTL1_BYPDELCHAINEN 15 -#define BITM_DMC_DDR_LANE0_CTL1_BYPDELCHAINEN 0x00008000 - -#define DMC_ZQCTL0_VALUE 0x00785A64 -#define DMC_ZQCTL1_VALUE 0 -#define DMC_ZQCTL2_VALUE 0x70000000 - -#define DMC_TRIG_CALIB 0 -#define DMC_OFSTDCYCLE 2 - -#define BITP_DMC_CAL_PADCTL0_RTTCALEN 31 /* RTT Calibration Enable */ -#define BITP_DMC_CAL_PADCTL0_PDCALEN 30 /* PULLDOWN Calib Enable */ -#define BITP_DMC_CAL_PADCTL0_PUCALEN 29 /* PULLUP Calib Enable */ -#define BITP_DMC_CAL_PADCTL0_CALSTRT 28 /* Start New Calib ( Hardware Cleared) */ -#define BITM_DMC_CAL_PADCTL0_RTTCALEN 0x80000000 /* RTT Calibration Enable */ -#define BITM_DMC_CAL_PADCTL0_PDCALEN 0x40000000 /* PULLDOWN Calib Enable */ -#define BITM_DMC_CAL_PADCTL0_PUCALEN 0x20000000 /* PULLUP Calib Enable */ -#define BITM_DMC_CAL_PADCTL0_CALSTRT 0x10000000 /* Start New Calib ( Hardware Cleared) */ -#define ENUM_DMC_PHY_CTL4_DDR3 0x00000000 /* DDRMODE: DDR3 Mode */ -#define ENUM_DMC_PHY_CTL4_DDR2 0x00000001 /* DDRMODE: DDR2 Mode */ -#define ENUM_DMC_PHY_CTL4_LPDDR 0x00000003 /* DDRMODE: LPDDR Mode */ - -#define BITP_DMC_DDR_ZQ_CTL0_IMPRTT 16 /* Data/DQS ODT */ -#define BITP_DMC_DDR_ZQ_CTL0_IMPWRDQ 8 /* Data/DQS/DM/CLK Drive Strength */ -#define BITP_DMC_DDR_ZQ_CTL0_IMPWRADD 0 /* Address/Command Drive Strength */ -#define BITM_DMC_DDR_ZQ_CTL0_IMPRTT 0x00FF0000 /* Data/DQS ODT */ -#define BITM_DMC_DDR_ZQ_CTL0_IMPWRDQ 0x0000FF00 /* Data/DQS/DM/CLK Drive Strength */ -#define BITM_DMC_DDR_ZQ_CTL0_IMPWRADD 0x000000FF /* Address/Command Drive Strength */ - -#define BITM_DMC_DDR_ROOT_CTL_TRIG_RD_XFER_ALL 0x00200000 /* All Lane Read Status */ - -#if defined(CONFIG_ADI_USE_DDR2) - #define DMC_MR0_VALUE \ - ((DMC_BL / 4 + 1) << BITP_DMC_MR_BLEN) | \ - (DMC_CL << BITP_DMC_MR_CL) | \ - (DMC_WRRECOV << BITP_DMC_MR_WRRECOV) - - #define DMC_MR1_VALUE \ - (DMC_MR1_AL << BITP_DMC_MR1_AL | 0x04) \ - - #define DMC_MR2_VALUE 0 - #define DMC_MR3_VALUE 0 - - #define DMC_CTL_VALUE \ - (DMC_RDTOWR << BITP_DMC_CTL_RDTOWR) | \ - (1 << BITP_DMC_CTL_DLLCAL) | \ - (BITM_DMC_CTL_INIT) -#else - #define DMC_MR0_VALUE \ - (0 << BITP_DMC_MR_BLEN) | \ - (DMC_CL0 << BITP_DMC_MR_CL0) | \ - (DMC_CL123 << BITP_DMC_MR_CL) | \ - (DMC_WRRECOV << BITP_DMC_MR_WRRECOV) | \ - (1 << BITP_DMC_MR_DLLRST) - - #define DMC_MR1_VALUE \ - (DMC_MR1_DLLEN << BITP_DMC_MR1_DLLEN) | \ - (DMC_MR1_DIC0 << BITP_DMC_MR1_DIC0) | \ - (DMC_MR1_RTT0 << BITP_DMC_MR1_RTT0) | \ - (DMC_MR1_AL << BITP_DMC_MR1_AL) | \ - (DMC_MR1_DIC1 << BITP_DMC_MR1_DIC1) | \ - (DMC_MR1_RTT1 << BITP_DMC_MR1_RTT1) | \ - (DMC_MR1_RTT2 << BITP_DMC_MR1_RTT2) | \ - (DMC_MR1_WL << BITP_DMC_MR1_WL) | \ - (DMC_MR1_TDQS << BITP_DMC_MR1_TDQS) | \ - (DMC_MR1_QOFF << BITP_DMC_MR1_QOFF) - - #define DMC_MR2_VALUE \ - ((DMC_WL) << BITP_DMC_MR2_CWL) - - #define DMC_MR3_VALUE \ - ((DMC_WL) << BITP_DMC_MR2_CWL) - - #define DMC_CTL_VALUE \ - (DMC_RDTOWR << BITP_DMC_CTL_RDTOWR) | \ - (BITM_DMC_CTL_INIT) | \ - (BITM_DMC_CTL_DDR3EN) | \ - (DMC_CTL_AL_EN << BITP_DMC_CTL_AL_EN) -#endif - -#define DMC_DLLCTL_VALUE \ - (DMC_DATACYC << BITP_DMC_DLLCTL_DATACYC) | \ - (DMC_DLLCALRDCNT << BITP_DMC_DLLCTL_DLLCALRDCNT) - -#define DMC_CFG_VALUE \ - ENUM_DMC_CFG_IFWID16 | \ - ENUM_DMC_CFG_SDRWID16 | \ - SDR_CHIP_SIZE | \ - ENUM_DMC_CFG_EXTBANK1 - -#define DMC_TR0_VALUE \ - (DMC_TRCD << BITP_DMC_TR0_TRCD) | \ - (DMC_TWTR << BITP_DMC_TR0_TWTR) | \ - (DMC_TRP << BITP_DMC_TR0_TRP) | \ - (DMC_TRAS << BITP_DMC_TR0_TRAS) | \ - (DMC_TRC << BITP_DMC_TR0_TRC) | \ - (DMC_TMRD << BITP_DMC_TR0_TMRD) - -#define DMC_TR1_VALUE \ - (DMC_TREF << BITP_DMC_TR1_TREF) | \ - (DMC_TRFC << BITP_DMC_TR1_TRFC) | \ - (DMC_TRRD << BITP_DMC_TR1_TRRD) - -#define DMC_TR2_VALUE \ - (DMC_TFAW << BITP_DMC_TR2_TFAW) | \ - (DMC_TRTP << BITP_DMC_TR2_TRTP) | \ - (DMC_TWR << BITP_DMC_TR2_TWR) | \ - (DMC_TXP << BITP_DMC_TR2_TXP) | \ - (DMC_TCKE << BITP_DMC_TR2_TCKE) - -enum DDR_MODE { - DDR3_MODE, - DDR2_MODE, - LPDDR_MODE, -}; - -enum CALIBRATION_MODE { - CALIBRATION_LEGACY, - CALIBRATION_METHOD1, - CALIBRATION_METHOD2, -}; - -static struct dmc_param { - phys_addr_t reg; - u32 ddr_mode; - u32 padctl2_value; - u32 dmc_cphyctl_value; - u32 dmc_cfg_value; - u32 dmc_dllctl_value; - u32 dmc_ctl_value; - u32 dmc_tr0_value; - u32 dmc_tr1_value; - u32 dmc_tr2_value; - u32 dmc_mr0_value; - u32 dmc_mr1_value; - u32 dmc_mr2_value; - u32 dmc_mr3_value; - u32 dmc_zqctl0_value; - u32 dmc_zqctl1_value; - u32 dmc_zqctl2_value; - u32 dmc_data_calib_add_value; - bool phy_init_required; - bool anomaly_20000037_applicable; - enum CALIBRATION_MODE calib_mode; -} dmc; - -#ifdef CONFIG_SC59X_64 -#define DQS_DEFAULT_DELAY 3ul - -#define DELAYTRIM 1 -#define LANE0_DQS_DELAY 1 -#define LANE1_DQS_DELAY 1 - -#define CLKDIR 0ul - -#define DQSTRIM 0 -#define DQSCODE 0ul - -#define CLKTRIM 0 -#define CLKCODE 0ul -#endif - -static inline void calibration_legacy(void) -{ - u32 temp; - - /* 1. Set DDR mode to DDR3/DDR2/LPDDR in DMCx_PHY_CTL4 register */ - if (dmc.ddr_mode == DDR3_MODE) - writel(ENUM_DMC_PHY_CTL4_DDR3, dmc.reg + REG_DMC_PHY_CTL4); - else if (dmc.ddr_mode == DDR2_MODE) - writel(ENUM_DMC_PHY_CTL4_DDR2, dmc.reg + REG_DMC_PHY_CTL4); - else if (dmc.ddr_mode == LPDDR_MODE) - writel(ENUM_DMC_PHY_CTL4_LPDDR, dmc.reg + REG_DMC_PHY_CTL4); - - /* - * 2. Make sure that the bits 6, 7, 25, and 27 of the DMC_PHY_ - * CTL3 register are set - */ - writel(0x0A0000C0, dmc.reg + REG_DMC_PHY_CTL3); - - /* - * 3. For DDR2/DDR3 mode, make sure that the bits 0, 1, 2, 3 of - * the DMC_PHY_CTL0 register and the bits 26, 27, 28, 29, 30, 31 - * of the DMC_PHY_CTL2 are set. - */ - if (dmc.ddr_mode == DDR3_MODE || - dmc.ddr_mode == DDR2_MODE) { - writel(0XFC000000, dmc.reg + REG_DMC_PHY_CTL2); - writel(0x0000000f, dmc.reg + REG_DMC_PHY_CTL0); - } - - writel(0x00000000, dmc.reg + REG_DMC_PHY_CTL1); - - /* 4. For DDR3 mode, set bit 1 and configure bits [5:2] of the - * DMC_CPHY_CTL register with WL=CWL+AL in DCLK cycles. - */ - if (dmc.ddr_mode == DDR3_MODE) - writel(dmc.dmc_cphyctl_value, dmc.reg + REG_DMC_CPHY_CTL); - /* 5. Perform On Die Termination(ODT) & Driver Impedance Calibration */ - if (dmc.ddr_mode == LPDDR_MODE) { - /* Bypass processor ODT */ - writel(0x80000, dmc.reg + REG_DMC_PHY_CTL1); - } else { - /* Set bits RTTCALEN, PDCALEN, PUCALEN of register */ - temp = BITM_DMC_CAL_PADCTL0_RTTCALEN | - BITM_DMC_CAL_PADCTL0_PDCALEN | - BITM_DMC_CAL_PADCTL0_PUCALEN; - writel(temp, dmc.reg + REG_DMC_CAL_PADCTL0); - /* Configure ODT and drive impedance values in the - * DMCx_CAL_PADCTL2 register - */ - writel(dmc.padctl2_value, dmc.reg + REG_DMC_CAL_PADCTL2); - /* start calibration */ - temp |= BITM_DMC_CAL_PADCTL0_CALSTRT; - writel(temp, dmc.reg + REG_DMC_CAL_PADCTL0); - /* Wait for PAD calibration to complete - 300 DCLK cycle. - * Worst case: CCLK=450 MHz, DCLK=125 MHz - */ - dmcdelay(300); - } -} - -static inline void calibration_method1(void) -{ -#if defined(CONFIG_SC59X) || defined(CONFIG_SC59X_64) - writel(dmc.dmc_zqctl0_value, dmc.reg + REG_DMC_DDR_ZQ_CTL0); - writel(dmc.dmc_zqctl1_value, dmc.reg + REG_DMC_DDR_ZQ_CTL1); - writel(dmc.dmc_zqctl2_value, dmc.reg + REG_DMC_DDR_ZQ_CTL2); - - /* Generate the trigger */ - writel(0x0ul, dmc.reg + REG_DMC_DDR_CA_CTL); - writel(0x0ul, dmc.reg + REG_DMC_DDR_ROOT_CTL); - writel(0x00010000ul, dmc.reg + REG_DMC_DDR_ROOT_CTL); - dmcdelay(8000u); - - /* The [31:26] bits may change if pad ring changes */ - writel(0x0C000001ul | DMC_TRIG_CALIB, dmc.reg + REG_DMC_DDR_CA_CTL); - dmcdelay(8000u); - writel(0x0ul, dmc.reg + REG_DMC_DDR_CA_CTL); - writel(0x0ul, dmc.reg + REG_DMC_DDR_ROOT_CTL); -#endif -} - -static inline void calibration_method2(void) -{ -#if defined(CONFIG_SC59X) || defined(CONFIG_SC59X_64) - u32 stat_value = 0x0u; - u32 drv_pu, drv_pd, odt_pu, odt_pd; - u32 ro_dt, clk_dqs_drv_impedance; - u32 temp; - - /* Reset trigger */ - writel(0x0ul, dmc.reg + REG_DMC_DDR_CA_CTL); - writel(0x0ul, dmc.reg + REG_DMC_DDR_ROOT_CTL); - writel(0x0ul, dmc.reg + REG_DMC_DDR_SCRATCH_3); - writel(0x0ul, dmc.reg + REG_DMC_DDR_SCRATCH_2); - - /* Writing internal registers in calib pad to zero. Calib mode set - * to 1 [26], trig M1 S1 write [16], this enables usage of scratch - * registers instead of ZQCTL registers - */ - writel(0x04010000ul, dmc.reg + REG_DMC_DDR_ROOT_CTL); - dmcdelay(2500u); - - /* TRIGGER FOR M2-S2 WRITE -> slave id 31:26 trig m2,s2 write - * bit 1->1 slave1 address is 4 - */ - writel(0x10000002ul, dmc.reg + REG_DMC_DDR_CA_CTL); - dmcdelay(2500u); - - /* reset Trigger */ - writel(0x0u, dmc.reg + REG_DMC_DDR_CA_CTL); - writel(0x0u, dmc.reg + REG_DMC_DDR_ROOT_CTL); - - /* write to slave 1, make the power down bit high */ - writel(0x1ul << 12, dmc.reg + REG_DMC_DDR_SCRATCH_3); - writel(0x0ul, dmc.reg + REG_DMC_DDR_SCRATCH_2); - dmcdelay(2500u); - - /* Calib mode set to 1 [26], trig M1 S1 write [16] */ - writel(0x04010000ul, dmc.reg + REG_DMC_DDR_ROOT_CTL); - dmcdelay(2500u); - - writel(0x10000002ul, dmc.reg + REG_DMC_DDR_CA_CTL); - dmcdelay(2500u); - - writel(0x0ul, dmc.reg + REG_DMC_DDR_CA_CTL); - writel(0x0ul, dmc.reg + REG_DMC_DDR_ROOT_CTL); - writel(0x0, dmc.reg + REG_DMC_DDR_SCRATCH_3); - - /* for slave 0 */ - writel(dmc.dmc_zqctl0_value, dmc.reg + REG_DMC_DDR_SCRATCH_2); - - /* Calib mode set to 1 [26], trig M1 S1 write [16] */ - writel(0x04010000ul, dmc.reg + REG_DMC_DDR_ROOT_CTL); - dmcdelay(2500u); - - writel(0x0C000002ul, dmc.reg + REG_DMC_DDR_CA_CTL); - dmcdelay(2500u); - - writel(0x0ul, dmc.reg + REG_DMC_DDR_CA_CTL); - writel(0x0ul, dmc.reg + REG_DMC_DDR_ROOT_CTL); - - /* writing to slave 1 - * calstrt is 0, but other programming is done - * - * make power down LOW again, to kickstart BIAS circuit - */ - writel(0x0ul, dmc.reg + REG_DMC_DDR_SCRATCH_3); - writel(0x30000000ul, dmc.reg + REG_DMC_DDR_SCRATCH_2); - - /* write to ca_ctl lane, calib mode set to 1 [26], - * trig M1 S1 write [16] - */ - writel(0x04010000ul, dmc.reg + REG_DMC_DDR_ROOT_CTL); - dmcdelay(2500u); - - /* copies data to lane controller slave - * TRIGGER FOR M2-S2 WRITE -> slave id 31:26 - * trig m2,s2 write bit 1->1 - * slave1 address is 4 - */ - writel(0x10000002ul, dmc.reg + REG_DMC_DDR_CA_CTL); - dmcdelay(2500u); - - /* reset Trigger */ - writel(0x0ul, dmc.reg + REG_DMC_DDR_CA_CTL); - writel(0x0ul, dmc.reg + REG_DMC_DDR_ROOT_CTL); - writel(0x0ul, dmc.reg + REG_DMC_DDR_SCRATCH_3); - writel(0x0ul, dmc.reg + REG_DMC_DDR_SCRATCH_2); - writel(0x0ul, dmc.reg + REG_DMC_DDR_SCRATCH_3); - writel(0x0ul, dmc.reg + REG_DMC_DDR_SCRATCH_2); - writel(0x04010000ul, dmc.reg + REG_DMC_DDR_ROOT_CTL); - dmcdelay(2500u); - writel(0x10000002ul, dmc.reg + REG_DMC_DDR_CA_CTL); - dmcdelay(2500u); - writel(0x0ul, dmc.reg + REG_DMC_DDR_CA_CTL); - writel(0x0ul, dmc.reg + REG_DMC_DDR_ROOT_CTL); - writel(0x0ul, dmc.reg + REG_DMC_DDR_SCRATCH_3); - writel(0x0ul, dmc.reg + REG_DMC_DDR_SCRATCH_2); - writel(0x0ul, dmc.reg + REG_DMC_DDR_SCRATCH_3); - writel(0x50000000ul, dmc.reg + REG_DMC_DDR_SCRATCH_2); - writel(0x04010000ul, dmc.reg + REG_DMC_DDR_ROOT_CTL); - dmcdelay(2500u); - writel(0x10000002ul, dmc.reg + REG_DMC_DDR_CA_CTL); - dmcdelay(2500u); - writel(0u, dmc.reg + REG_DMC_DDR_CA_CTL); - writel(0u, dmc.reg + REG_DMC_DDR_ROOT_CTL); - writel(0x0C000004u, dmc.reg + REG_DMC_DDR_CA_CTL); - dmcdelay(2500u); - writel(BITM_DMC_DDR_ROOT_CTL_TRIG_RD_XFER_ALL, - dmc.reg + REG_DMC_DDR_ROOT_CTL); - dmcdelay(2500u); - writel(0u, dmc.reg + REG_DMC_DDR_CA_CTL); - writel(0u, dmc.reg + REG_DMC_DDR_ROOT_CTL); - // calculate ODT PU and PD values - stat_value = ((readl(dmc.reg + REG_DMC_DDR_SCRATCH_7) & 0x0000FFFFu) << - 16); - stat_value |= ((readl(dmc.reg + REG_DMC_DDR_SCRATCH_6) & 0xFFFF0000u) >> - 16); - clk_dqs_drv_impedance = ((dmc.dmc_zqctl0_value) & - BITM_DMC_DDR_ZQ_CTL0_IMPWRDQ) >> BITP_DMC_DDR_ZQ_CTL0_IMPWRDQ; - ro_dt = ((dmc.dmc_zqctl0_value) & BITM_DMC_DDR_ZQ_CTL0_IMPRTT) >> - BITP_DMC_DDR_ZQ_CTL0_IMPRTT; - drv_pu = stat_value & 0x0000003Fu; - drv_pd = (stat_value >> 12) & 0x0000003Fu; - odt_pu = (drv_pu * clk_dqs_drv_impedance) / ro_dt; - odt_pd = (drv_pd * clk_dqs_drv_impedance) / ro_dt; - temp = ((1uL << 24) | - ((drv_pd & 0x0000003Fu)) | - ((odt_pd & 0x0000003Fu) << 6) | - ((drv_pu & 0x0000003Fu) << 12) | - ((odt_pu & 0x0000003Fu) << 18)); - temp |= readl(dmc.reg + REG_DMC_DDR_SCRATCH_2); - writel(temp, dmc.reg + REG_DMC_DDR_SCRATCH_2); - writel(0x0C010000u, dmc.reg + REG_DMC_DDR_ROOT_CTL); - dmcdelay(2500u); - writel(0x08000002u, dmc.reg + REG_DMC_DDR_CA_CTL); - dmcdelay(2500u); - writel(0u, dmc.reg + REG_DMC_DDR_CA_CTL); - writel(0u, dmc.reg + REG_DMC_DDR_ROOT_CTL); - writel(0x04010000u, dmc.reg + REG_DMC_DDR_ROOT_CTL); - dmcdelay(2500u); - writel(0x80000002u, dmc.reg + REG_DMC_DDR_CA_CTL); - dmcdelay(2500u); - writel(0u, dmc.reg + REG_DMC_DDR_CA_CTL); - writel(0u, dmc.reg + REG_DMC_DDR_ROOT_CTL); -#endif -} - -static inline void adi_dmc_lane_reset(bool reset, uint32_t dmc_no) -{ -#if defined(CONFIG_SC59X) || defined(CONFIG_SC59X_64) - u32 temp; - phys_addr_t base = (dmc_no == 0) ? REG_DMC0_BASE : REG_DMC1_BASE; - phys_addr_t ln0 = base + REG_DMC_DDR_LANE0_CTL0; - phys_addr_t ln1 = base + REG_DMC_DDR_LANE1_CTL0; - - if (reset) { - temp = readl(ln0); - temp |= BITM_DMC_DDR_LANE0_CTL0_CB_RSTDLL; - writel(temp, ln0); - - temp = readl(ln1); - temp |= BITM_DMC_DDR_LANE1_CTL0_CB_RSTDLL; - writel(temp, ln1); - } else { - temp = readl(ln0); - temp &= ~BITM_DMC_DDR_LANE0_CTL0_CB_RSTDLL; - writel(temp, ln0); - - temp = readl(ln1); - temp &= ~BITM_DMC_DDR_LANE1_CTL0_CB_RSTDLL; - writel(temp, ln1); - } - dmcdelay(9000u); -#endif -} - -void adi_dmc_reset_lanes(bool reset) -{ - if (!IS_ENABLED(CONFIG_ADI_USE_DDR2)) { - if (IS_ENABLED(CONFIG_SC59X) || IS_ENABLED(CONFIG_SC59X_64)) { - if (IS_ENABLED(CONFIG_ADI_USE_DMC0)) - adi_dmc_lane_reset(reset, 0); - if (IS_ENABLED(CONFIG_ADI_USE_DMC1)) - adi_dmc_lane_reset(reset, 1); - } - else { - u32 temp = reset ? 0x800 : 0x0; - - if (IS_ENABLED(CONFIG_ADI_USE_DMC0)) - writel(temp, REG_DMC0_BASE + REG_DMC_PHY_CTL0); - if (IS_ENABLED(CONFIG_ADI_USE_DMC1)) - writel(temp, REG_DMC1_BASE + REG_DMC_PHY_CTL0); - } - } -} - -static inline void dmc_controller_init(void) -{ -#if defined(CONFIG_SC59X) || defined(CONFIG_SC59X_64) - u32 phyphase, rd_cnt, t_EMR1, t_EMR3, t_CTL, data_cyc, temp; -#endif - - /* 1. Program the DMC controller registers: DMCx_CFG, DMCx_TR0, - * DMCx_TR1, DMCx_TR2, DMCx_MR(DDR2/LPDDR)/DMCx_MR0(DDR3), - * DMCx_EMR1(DDR2)/DMCx_MR1(DDR3), - * DMCx_EMR2(DDR2)/DMCx_EMR(LPDDR)/DMCx_MR2(DDR3) - */ - writel(dmc.dmc_cfg_value, dmc.reg + REG_DMC_CFG); - writel(dmc.dmc_tr0_value, dmc.reg + REG_DMC_TR0); - writel(dmc.dmc_tr1_value, dmc.reg + REG_DMC_TR1); - writel(dmc.dmc_tr2_value, dmc.reg + REG_DMC_TR2); - writel(dmc.dmc_mr0_value, dmc.reg + REG_DMC_MR); - writel(dmc.dmc_mr1_value, dmc.reg + REG_DMC_EMR1); - writel(dmc.dmc_mr2_value, dmc.reg + REG_DMC_EMR2); - -#if defined(CONFIG_SC59X) || defined(CONFIG_SC59X_64) - writel(dmc.dmc_mr3_value, dmc.reg + REG_DMC_EMR3); - writel(dmc.dmc_dllctl_value, dmc.reg + REG_DMC_DLLCTL); - dmcdelay(2000u); - - temp = readl(dmc.reg + REG_DMC_DDR_CA_CTL); - temp |= BITM_DMC_DDR_CA_CTL_SW_REFRESH; - writel(temp, dmc.reg + REG_DMC_DDR_CA_CTL); - dmcdelay(5u); - - temp = readl(dmc.reg + REG_DMC_DDR_ROOT_CTL); - temp |= BITM_DMC_DDR_ROOT_CTL_SW_REFRESH | - (DMC_OFSTDCYCLE << BITP_DMC_DDR_ROOT_CTL_PIPE_OFSTDCYCLE); - writel(temp, dmc.reg + REG_DMC_DDR_ROOT_CTL); -#endif - - /* 2. Make sure that the REG_DMC_DT_CALIB_ADDR register is programmed - * to an unused DMC location corresponding to a burst of 16 bytes - * (by default it is the starting address of the DMC address range). - */ -#ifndef CONFIG_SC59X - writel(dmc.dmc_data_calib_add_value, dmc.reg + REG_DMC_DT_CALIB_ADDR); -#endif - /* 3. Program the DMCx_CTL register with INIT bit set to start - * the DMC initialization sequence - */ - writel(dmc.dmc_ctl_value, dmc.reg + REG_DMC_CTL); - /* 4. Wait for the DMC initialization to complete by polling - * DMCx_STAT.INITDONE bit. - */ - -#if defined(CONFIG_SC59X) || defined(CONFIG_SC59X_64) - dmcdelay(722000u); - - /* Add necessary delay depending on the configuration */ - t_EMR1 = (dmc.dmc_mr1_value & BITM_DMC_MR1_WL) >> BITP_DMC_MR1_WL; - - dmcdelay(600u); - if (t_EMR1 != 0u) - while ((readl(dmc.reg + REG_DMC_EMR1) & BITM_DMC_MR1_WL) != 0) - ; - - t_EMR3 = (dmc.dmc_mr3_value & BITM_DMC_EMR3_MPR) >> - BITP_DMC_EMR3_MPR; - dmcdelay(2000u); - if (t_EMR3 != 0u) - while ((readl(dmc.reg + REG_DMC_EMR3) & BITM_DMC_EMR3_MPR) != 0) - ; - - t_CTL = (dmc.dmc_ctl_value & BITM_DMC_CTL_RL_DQS) >> BITP_DMC_CTL_RL_DQS; - dmcdelay(600u); - if (t_CTL != 0u) - while ((readl(dmc.reg + REG_DMC_CTL) & BITM_DMC_CTL_RL_DQS) != 0) - ; -#endif - - /* check if DMC initialization finished*/ - while ((readl(dmc.reg + REG_DMC_STAT) & BITM_DMC_STAT_INITDONE) == 0) - ; - -#if defined(CONFIG_SC59X) || defined(CONFIG_SC59X_64) - /* toggle DCYCLE */ - temp = readl(dmc.reg + REG_DMC_DDR_LANE0_CTL1); - temp |= BITM_DMC_DDR_LANE0_CTL1_COMP_DCYCLE; - writel(temp, dmc.reg + REG_DMC_DDR_LANE0_CTL1); - - temp = readl(dmc.reg + REG_DMC_DDR_LANE1_CTL1); - temp |= BITM_DMC_DDR_LANE1_CTL1_COMP_DCYCLE; - writel(temp, dmc.reg + REG_DMC_DDR_LANE1_CTL1); - - dmcdelay(10u); - - temp = readl(dmc.reg + REG_DMC_DDR_LANE0_CTL1); - temp &= (~BITM_DMC_DDR_LANE0_CTL1_COMP_DCYCLE); - writel(temp, dmc.reg + REG_DMC_DDR_LANE0_CTL1); - - temp = readl(dmc.reg + REG_DMC_DDR_LANE1_CTL1); - temp &= (~BITM_DMC_DDR_LANE1_CTL1_COMP_DCYCLE); - writel(temp, dmc.reg + REG_DMC_DDR_LANE1_CTL1); - - /* toggle RSTDAT */ - temp = readl(dmc.reg + REG_DMC_DDR_LANE0_CTL0); - temp |= BITM_DMC_DDR_LANE0_CTL0_CB_RSTDAT; - writel(temp, dmc.reg + REG_DMC_DDR_LANE0_CTL0); - - temp = readl(dmc.reg + REG_DMC_DDR_LANE0_CTL0); - temp &= (~BITM_DMC_DDR_LANE0_CTL0_CB_RSTDAT); - writel(temp, dmc.reg + REG_DMC_DDR_LANE0_CTL0); - - temp = readl(dmc.reg + REG_DMC_DDR_LANE1_CTL0); - temp |= BITM_DMC_DDR_LANE1_CTL0_CB_RSTDAT; - writel(temp, dmc.reg + REG_DMC_DDR_LANE1_CTL0); - - temp = readl(dmc.reg + REG_DMC_DDR_LANE1_CTL0); - temp &= (~BITM_DMC_DDR_LANE1_CTL0_CB_RSTDAT); - writel(temp, dmc.reg + REG_DMC_DDR_LANE1_CTL0); - - dmcdelay(2500u); - - /* Program phyphase*/ - phyphase = (readl(dmc.reg + REG_DMC_STAT) & - BITM_DMC_STAT_PHYRDPHASE) >> BITP_DMC_STAT_PHYRDPHASE; - data_cyc = (phyphase << BITP_DMC_DLLCTL_DATACYC) & - BITM_DMC_DLLCTL_DATACYC; - rd_cnt = dmc.dmc_dllctl_value; - rd_cnt <<= BITP_DMC_DLLCTL_DLLCALRDCNT; - rd_cnt &= BITM_DMC_DLLCTL_DLLCALRDCNT; - writel(rd_cnt | data_cyc, dmc.reg + REG_DMC_DLLCTL); - writel((dmc.dmc_ctl_value & (~BITM_DMC_CTL_INIT) & - (~BITM_DMC_CTL_RL_DQS)), dmc.reg + REG_DMC_CTL); - -#if DELAYTRIM - /* DQS delay trim*/ - u32 stat_value, WL_code_LDQS, WL_code_UDQS; - - /* For LDQS */ - temp = readl(dmc.reg + REG_DMC_DDR_LANE0_CTL1) | (0x000000D0); - writel(temp, dmc.reg + REG_DMC_DDR_LANE0_CTL1); - dmcdelay(2500u); - writel(0x00400000, dmc.reg + REG_DMC_DDR_ROOT_CTL); - dmcdelay(2500u); - writel(0x0, dmc.reg + REG_DMC_DDR_ROOT_CTL); - stat_value = (readl(dmc.reg + REG_DMC_DDR_SCRATCH_STAT0) & - (0xFFFF0000)) >> 16; - WL_code_LDQS = (stat_value) & (0x0000001F); - - temp = readl(dmc.reg + REG_DMC_DDR_LANE0_CTL1); - temp &= ~(BITM_DMC_DDR_LANE0_CTL1_BYPCODE | - BITM_DMC_DDR_LANE0_CTL1_BYPDELCHAINEN); - writel(temp, dmc.reg + REG_DMC_DDR_LANE0_CTL1); - - /* If write leveling is enabled */ - if ((dmc.dmc_mr1_value & BITM_DMC_MR1_WL) >> BITP_DMC_MR1_WL) { - temp = readl(dmc.reg + REG_DMC_DDR_LANE0_CTL1); - temp |= (((WL_code_LDQS + LANE0_DQS_DELAY) << - BITP_DMC_DDR_LANE0_CTL1_BYPCODE) & - BITM_DMC_DDR_LANE0_CTL1_BYPCODE) | - BITM_DMC_DDR_LANE0_CTL1_BYPDELCHAINEN; - writel(temp, dmc.reg + REG_DMC_DDR_LANE0_CTL1); - } else { - temp = readl(dmc.reg + REG_DMC_DDR_LANE0_CTL1); - temp |= (((DQS_DEFAULT_DELAY + LANE0_DQS_DELAY) << - BITP_DMC_DDR_LANE0_CTL1_BYPCODE) & - BITM_DMC_DDR_LANE0_CTL1_BYPCODE) | - BITM_DMC_DDR_LANE0_CTL1_BYPDELCHAINEN; - writel(temp, dmc.reg + REG_DMC_DDR_LANE0_CTL1); - } - dmcdelay(2500u); - - /* For UDQS */ - temp = readl(dmc.reg + REG_DMC_DDR_LANE1_CTL1) | (0x000000D0); - writel(temp, dmc.reg + REG_DMC_DDR_LANE1_CTL1); - dmcdelay(2500u); - writel(0x00800000, dmc.reg + REG_DMC_DDR_ROOT_CTL); - dmcdelay(2500u); - writel(0x0, dmc.reg + REG_DMC_DDR_ROOT_CTL); - stat_value = (readl(dmc.reg + REG_DMC_DDR_SCRATCH_STAT1) & - (0xFFFF0000)) >> 16; - WL_code_UDQS = (stat_value) & (0x0000001F); - - temp = readl(dmc.reg + REG_DMC_DDR_LANE1_CTL1); - temp &= ~(BITM_DMC_DDR_LANE0_CTL1_BYPCODE | - BITM_DMC_DDR_LANE0_CTL1_BYPDELCHAINEN); - writel(temp, dmc.reg + REG_DMC_DDR_LANE1_CTL1); - - /* If write leveling is enabled */ - if ((dmc.dmc_mr1_value & BITM_DMC_MR1_WL) >> BITP_DMC_MR1_WL) { - temp = readl(dmc.reg + REG_DMC_DDR_LANE1_CTL1); - temp |= (((WL_code_UDQS + LANE1_DQS_DELAY) << - BITP_DMC_DDR_LANE0_CTL1_BYPCODE) & - BITM_DMC_DDR_LANE0_CTL1_BYPCODE) | - BITM_DMC_DDR_LANE0_CTL1_BYPDELCHAINEN; - writel(temp, dmc.reg + REG_DMC_DDR_LANE1_CTL1); - } else { - temp = readl(dmc.reg + REG_DMC_DDR_LANE1_CTL1); - temp |= (((DQS_DEFAULT_DELAY + LANE1_DQS_DELAY) << - BITP_DMC_DDR_LANE0_CTL1_BYPCODE) & - BITM_DMC_DDR_LANE0_CTL1_BYPCODE) | - BITM_DMC_DDR_LANE0_CTL1_BYPDELCHAINEN; - writel(temp, dmc.reg + REG_DMC_DDR_LANE1_CTL1); - } - dmcdelay(2500u); -#endif - -#else - /* 5. Program the DMCx_CTL.DLLCTL register with 0x948 value - * (DATACYC=9, DLLCALRDCNT=72). - */ - writel(0x00000948, dmc.reg + REG_DMC_DLLCTL); -#endif - - /* 6. Workaround for anomaly#20000037 */ - if (dmc.anomaly_20000037_applicable) { - /* Perform dummy read to any DMC location */ - readl(0x80000000); - - writel(readl(dmc.reg + REG_DMC_PHY_CTL0) | 0x1000, - dmc.reg + REG_DMC_PHY_CTL0); - /* Clear DMCx_PHY_CTL0.RESETDAT bit */ - writel(readl(dmc.reg + REG_DMC_PHY_CTL0) & (~0x1000), - dmc.reg + REG_DMC_PHY_CTL0); - } -} - -static inline void dmc_init(void) -{ - /* PHY Calibration+Initialization */ - if (!dmc.phy_init_required) - goto out; - - switch (dmc.calib_mode) { - case CALIBRATION_LEGACY: - calibration_legacy(); - break; - case CALIBRATION_METHOD1: - calibration_method1(); - break; - case CALIBRATION_METHOD2: - calibration_method2(); - break; - } - -#if DQSTRIM - /* DQS duty trim */ - temp = readl(dmc.reg + REG_DMC_DDR_LANE0_CTL0); - temp |= ((DQSCODE) << BITP_DMC_DDR_LANE0_CTL0_BYPENB) & - (BITM_DMC_DDR_LANE1_CTL0_BYPENB | - BITM_DMC_DDR_LANE0_CTL0_BYPSELP | - BITM_DMC_DDR_LANE0_CTL0_BYPCODE); - writel(temp, dmc.reg + REG_DMC_DDR_LANE0_CTL0); - - temp = readl(dmc.reg + REG_DMC_DDR_LANE1_CTL0); - temp |= ((DQSCODE) << BITP_DMC_DDR_LANE1_CTL0_BYPENB) & - (BITM_DMC_DDR_LANE1_CTL1_BYPCODE | - BITM_DMC_DDR_LANE1_CTL0_BYPSELP | - BITM_DMC_DDR_LANE1_CTL0_BYPCODE); - writel(temp, dmc.reg + REG_DMC_DDR_LANE1_CTL0); -#endif - -#if CLKTRIM - /* Clock duty trim */ - temp = readl(dmc.reg + REG_DMC_DDR_CA_CTL); - temp |= (((CLKCODE << BITP_DMC_DDR_CA_CTL_BYPCODE1) & - BITM_DMC_DDR_CA_CTL_BYPCODE1) | - BITM_DMC_DDR_CA_CTL_BYPENB | - ((CLKDIR << BITP_DMC_DDR_CA_CTL_BYPSELP) & - BITM_DMC_DDR_CA_CTL_BYPSELP)); - writel(temp, dmc.reg + REG_DMC_DDR_CA_CTL); -#endif - -out: - /* Controller Initialization */ - dmc_controller_init(); -} - -static inline void __dmc_config(uint32_t dmc_no) -{ - if (dmc_no == 0) { - dmc.reg = REG_DMC0_BASE; - dmc.dmc_data_calib_add_value = DMC0_DATA_CALIB_ADD; - } else if (dmc_no == 1) { - dmc.reg = REG_DMC1_BASE; - dmc.dmc_data_calib_add_value = DMC1_DATA_CALIB_ADD; - } else { - return; - } - - if (IS_ENABLED(CONFIG_ADI_USE_DDR2)) - dmc.ddr_mode = DDR2_MODE; - else - dmc.ddr_mode = DDR3_MODE; - - dmc.phy_init_required = true; - -#if defined(CONFIG_SC59X) || defined(CONFIG_SC59X_64) - dmc.anomaly_20000037_applicable = false; - dmc.dmc_dllctl_value = DMC_DLLCTL_VALUE; - dmc.calib_mode = CALIBRATION_METHOD2; -#else - dmc.anomaly_20000037_applicable = true; - dmc.calib_mode = CALIBRATION_LEGACY; -#endif - - dmc.dmc_ctl_value = DMC_CTL_VALUE; - dmc.dmc_cfg_value = DMC_CFG_VALUE; - dmc.dmc_tr0_value = DMC_TR0_VALUE; - dmc.dmc_tr1_value = DMC_TR1_VALUE; - dmc.dmc_tr2_value = DMC_TR2_VALUE; - dmc.dmc_mr0_value = DMC_MR0_VALUE; - dmc.dmc_mr1_value = DMC_MR1_VALUE; - dmc.dmc_mr2_value = DMC_MR2_VALUE; - -#if defined(CONFIG_SC59X) || defined(CONFIG_SC59X_64) - dmc.dmc_mr3_value = DMC_MR3_VALUE; - dmc.dmc_zqctl0_value = DMC_ZQCTL0_VALUE; - dmc.dmc_zqctl1_value = DMC_ZQCTL1_VALUE; - dmc.dmc_zqctl2_value = DMC_ZQCTL2_VALUE; -#endif - - dmc.padctl2_value = DMC_PADCTL2_VALUE; - dmc.dmc_cphyctl_value = DMC_CPHYCTL_VALUE; - - /* Initialize DMC now */ - dmc_init(); -} - -void DMC_Config(void) -{ - if (IS_ENABLED(CONFIG_ADI_USE_DMC0)) - __dmc_config(0); - - if (IS_ENABLED(CONFIG_ADI_USE_DMC1)) - __dmc_config(1); -} diff --git a/arch/arm/mach-sc5xx/init/dmcinit.h b/arch/arm/mach-sc5xx/init/dmcinit.h deleted file mode 100644 index 46ff729282d..00000000000 --- a/arch/arm/mach-sc5xx/init/dmcinit.h +++ /dev/null @@ -1,31 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later */ -/* - * (C) Copyright 2022 - Analog Devices, Inc. - * - * Written and/or maintained by Timesys Corporation - * - * Contact: Nathan Barrett-Morrison - * Contact: Greg Malysa - */ - -#ifndef DMCINIT_H_ -#define DMCINIT_H_ - -#include - -#ifdef MEM_MT41K512M16HA - #include "mem/mt41k512m16ha.h" -#elif defined(MEM_MT41K128M16JT) - #include "mem/mt41k128m16jt.h" -#elif defined(MEM_MT47H128M16RT) - #include "mem/mt47h128m16rt.h" -#elif defined(MEM_IS43TR16512BL) - #include "mem/is43tr16512bl.h" -#else - #error "No DDR part name is defined for this board." -#endif - -void DMC_Config(void); -void adi_dmc_reset_lanes(bool reset); - -#endif diff --git a/arch/arm/mach-sc5xx/init/mem/is43tr16512bl.h b/arch/arm/mach-sc5xx/init/mem/is43tr16512bl.h deleted file mode 100644 index a5838370555..00000000000 --- a/arch/arm/mach-sc5xx/init/mem/is43tr16512bl.h +++ /dev/null @@ -1,62 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later */ -/* - * (C) Copyright 2022 - Analog Devices, Inc. - * - * Written and/or maintained by Timesys Corporation - * - * Contact: Nathan Barrett-Morrison - * Contact: Greg Malysa - */ - -#ifndef IS43TR16512BL_H -#define IS43TR16512BL_H - -/* DMC0 setup for the EV-21593-SOM and EV-SC594-SOM : - * - uses a single 8GB IS43TR16512BL-125KBL DDR3 chip configured for - * 800 MHz DCLK. - * DMC0 setup for the EV-SC594-SOMS : - * - uses a single 4GB IS43TR16256BL-093NBL DDR3 chip configured for - * 800 MHz DCLK. - */ -#define DMC_DLLCALRDCNT 240 -#define DMC_DATACYC 12 -#define DMC_TRCD 11 -#define DMC_TWTR 6 -#define DMC_TRP 11 -#define DMC_TRAS 28 -#define DMC_TRC 39 -#define DMC_TMRD 4 -#define DMC_TREF 6240 -#define DMC_TRRD 6 -#define DMC_TFAW 32 -#define DMC_TRTP 6 -#define DMC_TWR 12 -#define DMC_TXP 5 -#define DMC_TCKE 4 -#define DMC_CL0 0 -#define DMC_CL123 7 -#define DMC_WRRECOV 6 -#define DMC_MR1_DLLEN 0 -#define DMC_MR1_DIC0 0 -#define DMC_MR1_RTT0 0 -#define DMC_MR1_AL 0 -#define DMC_MR1_DIC1 0 -#define DMC_MR1_RTT1 1 -#define DMC_MR1_WL 0 -#define DMC_MR1_RTT2 0 -#define DMC_MR1_TDQS 0 -#define DMC_MR1_QOFF 0 -#define DMC_WL 3 -#define DMC_RDTOWR 5 -#define DMC_CTL_AL_EN 1 -#if defined(MEM_ISSI_4Gb_DDR3_800MHZ) - #define SDR_CHIP_SIZE (ENUM_DMC_CFG_SDRSIZE4G) - #define DMC_TRFC 208ul -#elif defined(MEM_ISSI_8Gb_DDR3_800MHZ) - #define SDR_CHIP_SIZE (ENUM_DMC_CFG_SDRSIZE8G) - #define DMC_TRFC 280ul -#else - #error "Need to select MEM_ISSI_4Gb_DDR3_800MHZ or MEM_ISSI_8Gb_DDR3_800MHZ" -#endif - -#endif diff --git a/arch/arm/mach-sc5xx/init/mem/mt41k128m16jt.h b/arch/arm/mach-sc5xx/init/mem/mt41k128m16jt.h deleted file mode 100644 index 882777521b8..00000000000 --- a/arch/arm/mach-sc5xx/init/mem/mt41k128m16jt.h +++ /dev/null @@ -1,50 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later */ -/* - * (C) Copyright 2022 - Analog Devices, Inc. - * - * Written and/or maintained by Timesys Corporation - * - * Contact: Nathan Barrett-Morrison - * Contact: Greg Malysa - */ - -#ifndef MT41K128M16JT_H -#define MT41K128M16JT_H - -/* Default DDR3 part assumed: MT41K128M16JT-125, 2Gb part */ -/* For DCLK= 450 MHz */ -#define DMC_DLLCALRDCNT 72 -#define DMC_DATACYC 9 -#define DMC_TRCD 6 -#define DMC_TWTR 4 -#define DMC_TRP 6 -#define DMC_TRAS 17 -#define DMC_TRC 23 -#define DMC_TMRD 4 -#define DMC_TREF 3510 -#define DMC_TRFC 72 -#define DMC_TRRD 4 -#define DMC_TFAW 17 -#define DMC_TRTP 4 -#define DMC_TWR 7 -#define DMC_TXP 4 -#define DMC_TCKE 3 -#define DMC_CL0 0 -#define DMC_CL123 3 -#define DMC_WRRECOV (DMC_TWR - 1) -#define DMC_MR1_DLLEN 0 -#define DMC_MR1_DIC0 1 -#define DMC_MR1_RTT0 1 -#define DMC_MR1_AL 0 -#define DMC_MR1_DIC1 0 -#define DMC_MR1_RTT1 0 -#define DMC_MR1_WL 0 -#define DMC_MR1_RTT2 0 -#define DMC_MR1_TDQS 0 -#define DMC_MR1_QOFF 0 -#define DMC_WL 1 -#define DMC_RDTOWR 2 -#define DMC_CTL_AL_EN 0 -#define SDR_CHIP_SIZE ENUM_DMC_CFG_SDRSIZE2G - -#endif diff --git a/arch/arm/mach-sc5xx/init/mem/mt41k512m16ha.h b/arch/arm/mach-sc5xx/init/mem/mt41k512m16ha.h deleted file mode 100644 index 5735b87871c..00000000000 --- a/arch/arm/mach-sc5xx/init/mem/mt41k512m16ha.h +++ /dev/null @@ -1,50 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later */ -/* - * (C) Copyright 2022 - Analog Devices, Inc. - * - * Written and/or maintained by Timesys Corporation - * - * Contact: Nathan Barrett-Morrison - * Contact: Greg Malysa - */ - -#ifndef MT41K512M16HA_H -#define MT41K512M16HA_H - -/* Default DDR3 part assumed: MT41K512M16HA-107, 8Gb part */ -/* For DCLK= 450 MHz */ -#define DMC_DLLCALRDCNT 72 -#define DMC_DATACYC 9 -#define DMC_TRCD 7 -#define DMC_TWTR 4 -#define DMC_TRP 7 -#define DMC_TRAS 10 -#define DMC_TRC 16 -#define DMC_TMRD 4 -#define DMC_TREF 3510 -#define DMC_TRFC 158 -#define DMC_TRRD 6 -#define DMC_TFAW 16 -#define DMC_TRTP 4 -#define DMC_TWR 7 -#define DMC_TXP 3 -#define DMC_TCKE 3 -#define DMC_CL0 0 -#define DMC_CL123 3 -#define DMC_WRRECOV (DMC_TWR - 1) -#define DMC_MR1_DLLEN 0 -#define DMC_MR1_DIC0 1 -#define DMC_MR1_RTT0 1 -#define DMC_MR1_AL 0 -#define DMC_MR1_DIC1 0 -#define DMC_MR1_RTT1 0 -#define DMC_MR1_WL 0 -#define DMC_MR1_RTT2 0 -#define DMC_MR1_TDQS 0 -#define DMC_MR1_QOFF 0 -#define DMC_WL 1 -#define DMC_RDTOWR 2 -#define DMC_CTL_AL_EN 0 -#define SDR_CHIP_SIZE ENUM_DMC_CFG_SDRSIZE8G - -#endif diff --git a/arch/arm/mach-sc5xx/init/mem/mt47h128m16rt.h b/arch/arm/mach-sc5xx/init/mem/mt47h128m16rt.h deleted file mode 100644 index 5ada7f2985b..00000000000 --- a/arch/arm/mach-sc5xx/init/mem/mt47h128m16rt.h +++ /dev/null @@ -1,49 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later */ -/* - * (C) Copyright 2022 - Analog Devices, Inc. - * - * Written and/or maintained by Timesys Corporation - * - * Contact: Nathan Barrett-Morrison - * Contact: Greg Malysa - */ - -#ifndef MT47H128M16RT_H -#define MT47H128M16RT_H - -/* Default DDR2 part: MT47H128M16RT-25E XIT:C, 2 Gb part */ -/* For DCLK= 400 MHz */ -#define DMC_DLLCALRDCNT 72 -#define DMC_DATACYC 9 -#define DMC_TRCD 5 -#define DMC_TWTR 3 -#define DMC_TRP 5 -#define DMC_TRAS 16 -#define DMC_TRC 22 -#define DMC_TMRD 2 -#define DMC_TREF 3120 -#define DMC_TRFC 78 -#define DMC_TRRD 4 -#define DMC_TFAW 18 -#define DMC_TRTP 3 -#define DMC_TWR 6 -#define DMC_TXP 2 -#define DMC_TCKE 3 -#define DMC_CL 5 -#define DMC_WRRECOV (DMC_TWR - 1) -#define DMC_MR1_DLLEN 0 -#define DMC_MR1_DIC0 1 -#define DMC_MR1_RTT0 1 -#define DMC_MR1_AL 4 -#define DMC_MR1_DIC1 0 -#define DMC_MR1_RTT1 0 -#define DMC_MR1_WL 0 -#define DMC_MR1_RTT2 0 -#define DMC_MR1_TDQS 0 -#define DMC_MR1_QOFF 0 -#define DMC_BL 4 -#define DMC_RDTOWR 2 -#define DMC_CTL_AL_EN 0 -#define SDR_CHIP_SIZE ENUM_DMC_CFG_SDRSIZE2G - -#endif diff --git a/arch/arm/mach-sc5xx/rcu.c b/arch/arm/mach-sc5xx/rcu.c deleted file mode 100644 index 49357501a93..00000000000 --- a/arch/arm/mach-sc5xx/rcu.c +++ /dev/null @@ -1,22 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * (C) Copyright 2024 - Analog Devices, Inc. - * - * Written and/or maintained by Timesys Corporation - * - * Contact: Ian Roberts - */ - -#include -#include - -static const struct udevice_id adi_syscon_ids[] = { - { .compatible = "adi,reset-controller" }, - { } -}; - -U_BOOT_DRIVER(syscon_sc5xx_rcu) = { - .name = "sc5xx_rcu", - .id = UCLASS_SYSCON, - .of_match = adi_syscon_ids, -}; diff --git a/arch/arm/mach-sc5xx/sc57x.c b/arch/arm/mach-sc5xx/sc57x.c deleted file mode 100644 index b0587686d73..00000000000 --- a/arch/arm/mach-sc5xx/sc57x.c +++ /dev/null @@ -1,32 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * (C) Copyright 2024 - Analog Devices, Inc. - * - * Written and/or maintained by Timesys Corporation - * - * Contact: Nathan Barrett-Morrison - * Contact: Greg Malysa - */ - -#include -#include -#include - -#define REG_SPU0_SECUREC0 0x3108B980 -#define REG_PADS0_PCFG0 0x31004404 -#define REG_SPU0_SECUREP_START 0x3108BA00 -#define REG_SPU0_SECUREP_END 0x3108BD24 - -adi_rom_boot_fn adi_rom_boot = (adi_rom_boot_fn)0x000000e1; - -void sc5xx_enable_rgmii(void) -{ - writel((readl(REG_PADS0_PCFG0) | 0xc), REG_PADS0_PCFG0); -} - -void sc5xx_soc_init(void) -{ - sc5xx_enable_ns_sharc_access(REG_SPU0_SECUREC0); - sc5xx_disable_spu0(REG_SPU0_SECUREP_START, REG_SPU0_SECUREP_END); - sc5xx_enable_pmu(); -} diff --git a/arch/arm/mach-sc5xx/sc58x.c b/arch/arm/mach-sc5xx/sc58x.c deleted file mode 100644 index 0f892774309..00000000000 --- a/arch/arm/mach-sc5xx/sc58x.c +++ /dev/null @@ -1,32 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * (C) Copyright 2024 - Analog Devices, Inc. - * - * Written and/or maintained by Timesys Corporation - * - * Contact: Nathan Barrett-Morrison - * Contact: Greg Malysa - */ - -#include -#include -#include - -#define REG_SPU0_SECUREC0 0x3108C980 -#define REG_PADS0_PCFG0 0x31004404 -#define REG_SPU0_SECUREP_START 0x3108CA00 -#define REG_SPU0_SECUREP_END 0x3108CCF0 - -adi_rom_boot_fn adi_rom_boot = (adi_rom_boot_fn)0x000000e1; - -void sc5xx_enable_rgmii(void) -{ - writel((readl(REG_PADS0_PCFG0) | 0xc), REG_PADS0_PCFG0); -} - -void sc5xx_soc_init(void) -{ - sc5xx_enable_ns_sharc_access(REG_SPU0_SECUREC0); - sc5xx_disable_spu0(REG_SPU0_SECUREP_START, REG_SPU0_SECUREP_END); - sc5xx_enable_pmu(); -} diff --git a/arch/arm/mach-sc5xx/sc59x.c b/arch/arm/mach-sc5xx/sc59x.c deleted file mode 100644 index 174c6f5c445..00000000000 --- a/arch/arm/mach-sc5xx/sc59x.c +++ /dev/null @@ -1,43 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * (C) Copyright 2024 - Analog Devices, Inc. - * - * Written and/or maintained by Timesys Corporation - * - * Contact: Nathan Barrett-Morrison - * Contact: Greg Malysa - */ - -#include -#include -#include - -#define REG_SPU0_SECUREC0 0x3108B980 -#define REG_PADS0_PCFG0 0x31004604 -#define REG_SPU0_SECUREP_START 0x3108BA00 -#define REG_SPU0_SECUREP_END 0x3108BD24 - -#define REG_SCB5_SPI2_OSPI_REMAP 0x30400000 -#define BITM_SCB5_SPI2_OSPI_REMAP_REMAP 0x00000003 -#define ENUM_SCB5_SPI2_OSPI_REMAP_OSPI0 0x00000001 - -adi_rom_boot_fn adi_rom_boot = (adi_rom_boot_fn)0x000000e9; - -void sc5xx_enable_rgmii(void) -{ - writel((readl(REG_PADS0_PCFG0) | 0xc), REG_PADS0_PCFG0); -} - -void sc59x_remap_ospi(void) -{ - clrsetbits_le32(REG_SCB5_SPI2_OSPI_REMAP, - BITM_SCB5_SPI2_OSPI_REMAP_REMAP, - ENUM_SCB5_SPI2_OSPI_REMAP_OSPI0); -} - -void sc5xx_soc_init(void) -{ - sc5xx_enable_ns_sharc_access(REG_SPU0_SECUREC0); - sc5xx_disable_spu0(REG_SPU0_SECUREP_START, REG_SPU0_SECUREP_END); - sc5xx_enable_pmu(); -} diff --git a/arch/arm/mach-sc5xx/sc59x_64.c b/arch/arm/mach-sc5xx/sc59x_64.c deleted file mode 100644 index 82537bf1965..00000000000 --- a/arch/arm/mach-sc5xx/sc59x_64.c +++ /dev/null @@ -1,97 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * (C) Copyright 2024 - Analog Devices, Inc. - * - * Written and/or maintained by Timesys Corporation - * - * Contact: Nathan Barrett-Morrison - * Contact: Greg Malysa - */ - -#include -#include -#include - -#define REG_TSGENWR0_CNTCR 0x310AE000 -#define REG_PADS0_PCFG0 0x31004604 -#define REG_RCU0_BCODE 0x3108C028 - -#define REG_SPU0_SECUREP_START 0x3108BA00 -#define REG_SPU0_WP_START 0x3108B400 -#define REG_SPU0_SECUREC0 0x3108B980 - -#define REG_SCB5_SPI2_OSPI_REMAP 0x30400000 -#define BITM_SCB5_SPI2_OSPI_REMAP_REMAP 0x00000003 -#define ENUM_SCB5_SPI2_OSPI_REMAP_OSPI0 0x00000001 - -adi_rom_boot_fn adi_rom_boot = (adi_rom_boot_fn)0x000000e4; - -void sc5xx_enable_rgmii(void) -{ - writel((readl(REG_PADS0_PCFG0) | 0xc), REG_PADS0_PCFG0); - - // Set dw for little endian operation as well - writel(readl(REG_PADS0_PCFG0) & ~(1 << 19), REG_PADS0_PCFG0); - writel(readl(REG_PADS0_PCFG0) & ~(1 << 20), REG_PADS0_PCFG0); -} - -void sc59x_remap_ospi(void) -{ - clrsetbits_le32(REG_SCB5_SPI2_OSPI_REMAP, - BITM_SCB5_SPI2_OSPI_REMAP_REMAP, - ENUM_SCB5_SPI2_OSPI_REMAP_OSPI0); -} - -/** - * SPU/SMPU configuration is the default for permissive access from non-secure - * EL1. If TFA and OPTEE are configured, they run *after* this code, as the - * current boot flow is SPL -> TFA -> OPTEE -> Proper -> Linux, and will - * be expected to configure peripheral security correctly. If they are not - * configured, then this permissive setting will allow Linux (which always - * runs in NS EL1) to control all access to these peripherals. Without it, - * the peripherals would simply be unavailable in a non-security build, - * which is not OK. - */ -void sc5xx_soc_init(void) -{ - phys_addr_t smpus[] = { - 0x31007800, //SMPU0 - 0x31083800, //SMPU2 - 0x31084800, //SMPU3 - 0x31085800, //SMPU4 - 0x31086800, //SMPU5 - 0x31087800, //SMPU6 - 0x310A0800, //SMPU9 - 0x310A1800, //SMPU11 - 0x31012800, //SMPU12 - }; - size_t i; - - // Enable coresight timer - writel(1, REG_TSGENWR0_CNTCR); - - //Do not rerun preboot routine -- - // Without this, hardware resets triggered by RCU0_CTL:SYSRST - // lead to a deadlock somewhere in the boot ROM - writel(0x200, REG_RCU0_BCODE); - - /* Alter outstanding transactions property of A55*/ - writel(0x1, 0x30643108); /* SCB6 A55 M0 Ib.fn Mod */ - isb(); - - /* configure DDR prefetch behavior, per ADI */ - writel(0x1, 0x31076000); - - /* configure smart mode, per ADI */ - writel(0x1307, 0x31076004); - - // Disable SPU and SPU WP registers - sc5xx_disable_spu0(REG_SPU0_SECUREP_START, REG_SPU0_SECUREP_START + 4*213); - sc5xx_disable_spu0(REG_SPU0_WP_START, REG_SPU0_WP_START + 4*213); - - /* configure smpus permissively */ - for (i = 0; i < ARRAY_SIZE(smpus); ++i) - writel(0x500, smpus[i]); - - sc5xx_enable_ns_sharc_access(REG_SPU0_SECUREC0); -} diff --git a/arch/arm/mach-sc5xx/soc.c b/arch/arm/mach-sc5xx/soc.c deleted file mode 100644 index 8f13127a660..00000000000 --- a/arch/arm/mach-sc5xx/soc.c +++ /dev/null @@ -1,179 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * (C) Copyright 2022 - Analog Devices, Inc. - * - * Written and/or maintained by Timesys Corporation - * - * Contact: Nathan Barrett-Morrison - * Contact: Greg Malysa - */ - -#include -#include -#include -#include -#include - -#ifdef CONFIG_SC58X - #define RCU0_CTL 0x3108B000 - #define RCU0_STAT 0x3108B004 - #define RCU0_CRCTL 0x3108B008 - #define RCU0_CRSTAT 0x3108B00C - #define RCU0_SIDIS 0x3108B010 - #define RCU0_MSG_SET 0x3108B064 -#elif defined(CONFIG_SC57X) || defined(CONFIG_SC59X) || defined(CONFIG_SC59X_64) - #define RCU0_CTL 0x3108C000 - #define RCU0_STAT 0x3108C004 - #define RCU0_CRCTL 0x3108C008 - #define RCU0_CRSTAT 0x3108C00C - #define RCU0_SIDIS 0x3108C01C - #define RCU0_MSG_SET 0x3108C070 -#else - #error "No SC5xx SoC CONFIG_ enabled" -#endif - -#define BITP_RCU_STAT_BMODE 8 -#define BITM_RCU_STAT_BMODE 0x00000F00 - -#define REG_ARMPMU0_PMCR 0x31121E04 -#define REG_ARMPMU0_PMUSERENR 0x31121E08 -#define REG_ARMPMU0_PMLAR 0x31121FB0 - -DECLARE_GLOBAL_DATA_PTR; - -void reset_cpu(void) -{ - u32 val = readl(RCU0_CTL); - writel(val | 1, RCU0_CTL); -} - -void enable_caches(void) -{ - if (!IS_ENABLED(CONFIG_SYS_DCACHE_OFF)) - dcache_enable(); -} - -void sc5xx_enable_ns_sharc_access(uintptr_t securec0_base) -{ - writel(0, securec0_base); - writel(0, securec0_base + 0x4); - writel(0, securec0_base + 0x8); -} - -void sc5xx_disable_spu0(uintptr_t spu0_start, uintptr_t spu0_end) -{ - for (uintptr_t i = spu0_start; i <= spu0_end; i += 4) - writel(0, i); -} - -/** - * PMU is only available on armv7 platforms and all share the same location - */ -void sc5xx_enable_pmu(void) -{ - if (!IS_ENABLED(CONFIG_SC59X_64)) { - writel(readl(REG_ARMPMU0_PMUSERENR) | 0x01, REG_ARMPMU0_PMUSERENR); - writel(0xc5acce55, REG_ARMPMU0_PMLAR); - writel(readl(REG_ARMPMU0_PMCR) | (1 << 1), REG_ARMPMU0_PMCR); - } -} - -const char *sc5xx_get_boot_mode(u32 *bmode) -{ - static const char * const bmodes[] = { - "JTAG/BOOTROM", - "QSPI Master", - "QSPI Slave", - "UART", - "LP0 Slave", - "OSPI", -#ifdef CONFIG_SC59X_64 - "eMMC" -#endif - }; - u32 local_mode; - - local_mode = (readl(RCU0_STAT) & BITM_RCU_STAT_BMODE) >> BITP_RCU_STAT_BMODE; - -#if CONFIG_ADI_SPL_FORCE_BMODE != 0 - /* - * In case we want to force boot sequences such as: - * QSPI -> OSPI - * QSPI -> eMMC - * If this is not set, then we will always try to use the BMODE setting - * for both stages... i.e. - * QSPI -> QSPI - */ - - // (Don't allow skipping JTAG/UART BMODE settings) - if (local_mode != 0 && local_mode != 3) - local_mode = CONFIG_ADI_SPL_FORCE_BMODE; -#endif - - *bmode = local_mode; - - if (local_mode >= 0 && local_mode <= ARRAY_SIZE(bmodes)) - return bmodes[local_mode]; - return "unknown"; -} - -void print_cpu_id(void) -{ - if (!IS_ENABLED(CONFIG_ARM64)) { - u32 cpuid = 0; - - __asm__ __volatile__("mrc p15, 0, %0, c0, c0, 0" : "=r"(cpuid)); - - printf("Detected Revision: %d.%d\n", cpuid & 0xf00000 >> 20, cpuid & 0xf); - } -} - -int print_cpuinfo(void) -{ - u32 bmode; - - printf("CPU: ADSP %s (%s boot)\n", CONFIG_LDR_CPU, sc5xx_get_boot_mode(&bmode)); - print_cpu_id(); - - return 0; -} - -void fixup_dp83867_phy(struct phy_device *phydev) -{ - int phy_data = 0; - - phy_data = phy_read(phydev, MDIO_DEVAD_NONE, 0x32); - phy_write(phydev, MDIO_DEVAD_NONE, 0x32, (1 << 7) | phy_data); - int cfg3 = 0; - #define MII_DP83867_CFG3 (0x1e) - /* - * Pin INT/PWDN on DP83867 should be configured as an Interrupt Output - * instead of a Power-Down Input on ADI SC5XX boards in order to - * prevent the signal interference from other peripherals during they - * are running at the same time. - */ - cfg3 = phy_read(phydev, MDIO_DEVAD_NONE, MII_DP83867_CFG3); - cfg3 |= (1 << 7); - phy_write(phydev, MDIO_DEVAD_NONE, MII_DP83867_CFG3, cfg3); - - // Mystery second port fixup on ezkits with two PHYs - if (CONFIG_DW_PORTS & 2) - phy_write(phydev, MDIO_DEVAD_NONE, 0x11, 3); - - if (IS_ENABLED(CONFIG_ADI_BUG_EZKHW21)) { - phydev->advertising &= PHY_BASIC_FEATURES; - phydev->speed = SPEED_100; - } - - if (phydev->drv->config) - phydev->drv->config(phydev); - - if (IS_ENABLED(CONFIG_ADI_BUG_EZKHW21)) - phy_write(phydev, MDIO_DEVAD_NONE, 0, 0x3100); -} - -int dram_init(void) -{ - gd->ram_size = CFG_SYS_SDRAM_SIZE; - return 0; -} diff --git a/arch/arm/mach-sc5xx/spl.c b/arch/arm/mach-sc5xx/spl.c deleted file mode 100644 index 68e0310f5af..00000000000 --- a/arch/arm/mach-sc5xx/spl.c +++ /dev/null @@ -1,102 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * (C) Copyright 2022 - Analog Devices, Inc. - * - * Written and/or maintained by Timesys Corporation - * - * Contact: Nathan Barrett-Morrison - * Contact: Greg Malysa - */ - -#include -#include -#include -#include "init/clkinit.h" -#include "init/dmcinit.h" - -static bool adi_start_uboot_proper; - -static int adi_sf_default_bus = CONFIG_SF_DEFAULT_BUS; -static int adi_sf_default_cs = CONFIG_SF_DEFAULT_CS; -static int adi_sf_default_speed = CONFIG_SF_DEFAULT_SPEED; - -u32 bmode; - -int spl_start_uboot(void) -{ - return adi_start_uboot_proper; -} - -unsigned int spl_spi_get_default_speed(void) -{ - return adi_sf_default_speed; -} - -unsigned int spl_spi_get_default_bus(void) -{ - return adi_sf_default_bus; -} - -unsigned int spl_spi_get_default_cs(void) -{ - return adi_sf_default_cs; -} - -void board_boot_order(u32 *spl_boot_list) -{ - const char *bmodestring = sc5xx_get_boot_mode(&bmode); - - printf("ADI Boot Mode: 0x%x (%s)\n", bmode, bmodestring); - - /* - * By default everything goes back to the bootrom, where we'll read table - * parameters and ask for another image to be loaded - */ - spl_boot_list[0] = BOOT_DEVICE_BOOTROM; - - if (bmode == 0) { - printf("SPL execution has completed. Please load U-Boot Proper via JTAG"); - while (1) - ; - } -} - -int32_t __weak adi_rom_boot_hook(struct ADI_ROM_BOOT_CONFIG *config, int32_t cause) -{ - return 0; -} - -int board_return_to_bootrom(struct spl_image_info *spl_image, - struct spl_boot_device *bootdev) -{ -#if CONFIG_ADI_SPL_FORCE_BMODE != 0 - // see above - if (bmode != 0 && bmode != 3) - bmode = CONFIG_ADI_SPL_FORCE_BMODE; -#endif - - if (bmode >= (ARRAY_SIZE(adi_rom_boot_args))) - bmode = 0; - - adi_rom_boot((void *)adi_rom_boot_args[bmode].addr, - adi_rom_boot_args[bmode].flags, - 0, &adi_rom_boot_hook, - adi_rom_boot_args[bmode].cmd); - return 0; -}; - -void board_init_f(ulong dummy) -{ - int ret; - - clks_init(); - DMC_Config(); - sc5xx_soc_init(); - - ret = spl_early_init(); - if (ret) - panic("spl_early_init() failed\n"); - - preloader_console_init(); -} - diff --git a/arch/arm/mach-socfpga/board.c b/arch/arm/mach-socfpga/board.c index feaf5ce4596..616e1afe5de 100644 --- a/arch/arm/mach-socfpga/board.c +++ b/arch/arm/mach-socfpga/board.c @@ -5,7 +5,7 @@ * Copyright (C) 2015 Marek Vasut */ -#include +#include #include #include #include diff --git a/arch/arm/mach-socfpga/clock_manager.c b/arch/arm/mach-socfpga/clock_manager.c index 160f6e73ca9..9e645a42531 100644 --- a/arch/arm/mach-socfpga/clock_manager.c +++ b/arch/arm/mach-socfpga/clock_manager.c @@ -3,6 +3,7 @@ * Copyright (C) 2013-2017 Altera Corporation */ +#include #include #include #include diff --git a/arch/arm/mach-socfpga/clock_manager_agilex.c b/arch/arm/mach-socfpga/clock_manager_agilex.c index 9987d5bcee6..28f593b60e6 100644 --- a/arch/arm/mach-socfpga/clock_manager_agilex.c +++ b/arch/arm/mach-socfpga/clock_manager_agilex.c @@ -5,6 +5,7 @@ */ #include +#include #include #include #include diff --git a/arch/arm/mach-socfpga/clock_manager_agilex5.c b/arch/arm/mach-socfpga/clock_manager_agilex5.c index 7ec28d91ef3..b92f0b3af80 100644 --- a/arch/arm/mach-socfpga/clock_manager_agilex5.c +++ b/arch/arm/mach-socfpga/clock_manager_agilex5.c @@ -16,6 +16,7 @@ #include #include #include +#include #include #include #include diff --git a/arch/arm/mach-socfpga/clock_manager_arria10.c b/arch/arm/mach-socfpga/clock_manager_arria10.c index 58b9321131a..8ab18f6b725 100644 --- a/arch/arm/mach-socfpga/clock_manager_arria10.c +++ b/arch/arm/mach-socfpga/clock_manager_arria10.c @@ -3,6 +3,7 @@ * Copyright (C) 2016-2017 Intel Corporation */ +#include #include #include #include diff --git a/arch/arm/mach-socfpga/clock_manager_gen5.c b/arch/arm/mach-socfpga/clock_manager_gen5.c index 154ad2154ae..8fa2760798b 100644 --- a/arch/arm/mach-socfpga/clock_manager_gen5.c +++ b/arch/arm/mach-socfpga/clock_manager_gen5.c @@ -3,6 +3,7 @@ * Copyright (C) 2013-2017 Altera Corporation */ +#include #include #include #include diff --git a/arch/arm/mach-socfpga/clock_manager_n5x.c b/arch/arm/mach-socfpga/clock_manager_n5x.c index c4c071330fc..0ed480de670 100644 --- a/arch/arm/mach-socfpga/clock_manager_n5x.c +++ b/arch/arm/mach-socfpga/clock_manager_n5x.c @@ -4,6 +4,7 @@ * */ +#include #include #include #include diff --git a/arch/arm/mach-socfpga/clock_manager_s10.c b/arch/arm/mach-socfpga/clock_manager_s10.c index 1e148947a33..45300336d52 100644 --- a/arch/arm/mach-socfpga/clock_manager_s10.c +++ b/arch/arm/mach-socfpga/clock_manager_s10.c @@ -4,7 +4,7 @@ * */ -#include +#include #include #include #include diff --git a/arch/arm/mach-socfpga/firewall.c b/arch/arm/mach-socfpga/firewall.c index 4dec47b8e96..69229dc651e 100644 --- a/arch/arm/mach-socfpga/firewall.c +++ b/arch/arm/mach-socfpga/firewall.c @@ -4,8 +4,8 @@ * */ -#include #include +#include #include #include diff --git a/arch/arm/mach-socfpga/fpga_manager.c b/arch/arm/mach-socfpga/fpga_manager.c index c946d4c38d9..18d692c6314 100644 --- a/arch/arm/mach-socfpga/fpga_manager.c +++ b/arch/arm/mach-socfpga/fpga_manager.c @@ -7,7 +7,7 @@ * platform code, the real meat is located in drivers/fpga/socfpga.c . */ -#include +#include #include #include #include diff --git a/arch/arm/mach-socfpga/freeze_controller.c b/arch/arm/mach-socfpga/freeze_controller.c index 7c86350d5ea..561d3408cd8 100644 --- a/arch/arm/mach-socfpga/freeze_controller.c +++ b/arch/arm/mach-socfpga/freeze_controller.c @@ -4,7 +4,7 @@ */ -#include +#include #include #include #include diff --git a/arch/arm/mach-socfpga/include/mach/clock_manager.h b/arch/arm/mach-socfpga/include/mach/clock_manager.h index 49f3fb2e705..6c9d32b9dd8 100644 --- a/arch/arm/mach-socfpga/include/mach/clock_manager.h +++ b/arch/arm/mach-socfpga/include/mach/clock_manager.h @@ -6,8 +6,6 @@ #ifndef _CLOCK_MANAGER_H_ #define _CLOCK_MANAGER_H_ -#include - phys_addr_t socfpga_get_clkmgr_addr(void); #ifndef __ASSEMBLY__ diff --git a/arch/arm/mach-socfpga/include/mach/secure_reg_helper.h b/arch/arm/mach-socfpga/include/mach/secure_reg_helper.h index 01335dc9310..d5a11122c72 100644 --- a/arch/arm/mach-socfpga/include/mach/secure_reg_helper.h +++ b/arch/arm/mach-socfpga/include/mach/secure_reg_helper.h @@ -7,8 +7,6 @@ #ifndef _SECURE_REG_HELPER_H_ #define _SECURE_REG_HELPER_H_ -#include - #define SOCFPGA_SECURE_REG_SYSMGR_SOC64_SDMMC 1 #define SOCFPGA_SECURE_REG_SYSMGR_SOC64_EMAC0 2 #define SOCFPGA_SECURE_REG_SYSMGR_SOC64_EMAC1 3 diff --git a/arch/arm/mach-socfpga/mailbox_s10.c b/arch/arm/mach-socfpga/mailbox_s10.c index 4c86f1e9917..101af238552 100644 --- a/arch/arm/mach-socfpga/mailbox_s10.c +++ b/arch/arm/mach-socfpga/mailbox_s10.c @@ -4,6 +4,7 @@ * */ +#include #include #include #include diff --git a/arch/arm/mach-socfpga/misc.c b/arch/arm/mach-socfpga/misc.c index 495ba2a0d41..80ad0870341 100644 --- a/arch/arm/mach-socfpga/misc.c +++ b/arch/arm/mach-socfpga/misc.c @@ -3,7 +3,7 @@ * Copyright (C) 2012-2017 Altera Corporation */ -#include +#include #include #include #include diff --git a/arch/arm/mach-socfpga/misc_arria10.c b/arch/arm/mach-socfpga/misc_arria10.c index 34c21317894..93c9e8b0fb4 100644 --- a/arch/arm/mach-socfpga/misc_arria10.c +++ b/arch/arm/mach-socfpga/misc_arria10.c @@ -4,7 +4,7 @@ */ #include -#include +#include #include #include #include diff --git a/arch/arm/mach-socfpga/misc_gen5.c b/arch/arm/mach-socfpga/misc_gen5.c index b898b6f8f22..e7500c16f72 100644 --- a/arch/arm/mach-socfpga/misc_gen5.c +++ b/arch/arm/mach-socfpga/misc_gen5.c @@ -3,7 +3,7 @@ * Copyright (C) 2012-2017 Altera Corporation */ -#include +#include #include #include #include diff --git a/arch/arm/mach-socfpga/misc_soc64.c b/arch/arm/mach-socfpga/misc_soc64.c index ad1ef0db186..2acdfad07b3 100644 --- a/arch/arm/mach-socfpga/misc_soc64.c +++ b/arch/arm/mach-socfpga/misc_soc64.c @@ -5,6 +5,7 @@ */ #include +#include #include #include #include diff --git a/arch/arm/mach-socfpga/mmu-arm64_s10.c b/arch/arm/mach-socfpga/mmu-arm64_s10.c index b8e40d9a788..91c6d7c55f1 100644 --- a/arch/arm/mach-socfpga/mmu-arm64_s10.c +++ b/arch/arm/mach-socfpga/mmu-arm64_s10.c @@ -4,6 +4,7 @@ * */ +#include #include #include diff --git a/arch/arm/mach-socfpga/pinmux_arria10.c b/arch/arm/mach-socfpga/pinmux_arria10.c index c8074f47e76..f378fce7f02 100644 --- a/arch/arm/mach-socfpga/pinmux_arria10.c +++ b/arch/arm/mach-socfpga/pinmux_arria10.c @@ -4,9 +4,9 @@ */ #include -#include #include #include +#include #include static int do_pinctr_pin(const void *blob, int child, const char *node_name) diff --git a/arch/arm/mach-socfpga/reset_manager_arria10.c b/arch/arm/mach-socfpga/reset_manager_arria10.c index da335f4292c..27c03080113 100644 --- a/arch/arm/mach-socfpga/reset_manager_arria10.c +++ b/arch/arm/mach-socfpga/reset_manager_arria10.c @@ -9,6 +9,7 @@ #include #include #include +#include #include #include #include diff --git a/arch/arm/mach-socfpga/reset_manager_gen5.c b/arch/arm/mach-socfpga/reset_manager_gen5.c index 9395122dae1..a65860ef021 100644 --- a/arch/arm/mach-socfpga/reset_manager_gen5.c +++ b/arch/arm/mach-socfpga/reset_manager_gen5.c @@ -4,7 +4,7 @@ */ -#include +#include #include #include #include diff --git a/arch/arm/mach-socfpga/reset_manager_s10.c b/arch/arm/mach-socfpga/reset_manager_s10.c index dd0383c7c76..f47fec10a0c 100644 --- a/arch/arm/mach-socfpga/reset_manager_s10.c +++ b/arch/arm/mach-socfpga/reset_manager_s10.c @@ -4,6 +4,7 @@ * */ +#include #include #include #include diff --git a/arch/arm/mach-socfpga/scan_manager.c b/arch/arm/mach-socfpga/scan_manager.c index f8811525da4..36d6880141e 100644 --- a/arch/arm/mach-socfpga/scan_manager.c +++ b/arch/arm/mach-socfpga/scan_manager.c @@ -3,7 +3,7 @@ * Copyright (C) 2013 Altera Corporation */ -#include +#include #include #include #include diff --git a/arch/arm/mach-socfpga/secure_reg_helper.c b/arch/arm/mach-socfpga/secure_reg_helper.c index 802a966ce87..0d4f45f33da 100644 --- a/arch/arm/mach-socfpga/secure_reg_helper.c +++ b/arch/arm/mach-socfpga/secure_reg_helper.c @@ -4,6 +4,7 @@ * */ +#include #include #include #include diff --git a/arch/arm/mach-socfpga/secure_vab.c b/arch/arm/mach-socfpga/secure_vab.c index 4347bf6e792..e2db5885064 100644 --- a/arch/arm/mach-socfpga/secure_vab.c +++ b/arch/arm/mach-socfpga/secure_vab.c @@ -8,6 +8,7 @@ #include #include #include +#include #include #include #include diff --git a/arch/arm/mach-socfpga/smc_api.c b/arch/arm/mach-socfpga/smc_api.c index ebaa0b8fa17..8ffc7a472b5 100644 --- a/arch/arm/mach-socfpga/smc_api.c +++ b/arch/arm/mach-socfpga/smc_api.c @@ -4,11 +4,10 @@ * */ +#include #include #include -#include #include -#include int invoke_smc(u32 func_id, u64 *args, int arg_len, u64 *ret_arg, int ret_len) { diff --git a/arch/arm/mach-socfpga/spl_a10.c b/arch/arm/mach-socfpga/spl_a10.c index c20376f7f8e..3981d2d4f14 100644 --- a/arch/arm/mach-socfpga/spl_a10.c +++ b/arch/arm/mach-socfpga/spl_a10.c @@ -3,13 +3,14 @@ * Copyright (C) 2012-2021 Altera Corporation */ -#include +#include #include #include #include #include #include #include +#include #include #include #include diff --git a/arch/arm/mach-socfpga/spl_agilex.c b/arch/arm/mach-socfpga/spl_agilex.c index 52617a39cca..ee5a9dc1e2f 100644 --- a/arch/arm/mach-socfpga/spl_agilex.c +++ b/arch/arm/mach-socfpga/spl_agilex.c @@ -8,7 +8,9 @@ #include #include #include +#include #include +#include #include #include #include diff --git a/arch/arm/mach-socfpga/spl_gen5.c b/arch/arm/mach-socfpga/spl_gen5.c index df79cfe0f7f..287fbd1713c 100644 --- a/arch/arm/mach-socfpga/spl_gen5.c +++ b/arch/arm/mach-socfpga/spl_gen5.c @@ -3,11 +3,13 @@ * Copyright (C) 2012 Altera Corporation */ +#include #include #include #include #include #include +#include #include #include #include diff --git a/arch/arm/mach-socfpga/spl_n5x.c b/arch/arm/mach-socfpga/spl_n5x.c index 5ff137e5c6f..d056871d292 100644 --- a/arch/arm/mach-socfpga/spl_n5x.c +++ b/arch/arm/mach-socfpga/spl_n5x.c @@ -4,6 +4,7 @@ * */ +#include #include #include #include @@ -12,6 +13,7 @@ #include #include #include +#include #include #include #include diff --git a/arch/arm/mach-socfpga/spl_s10.c b/arch/arm/mach-socfpga/spl_s10.c index 53852cb7443..c20e87cdbef 100644 --- a/arch/arm/mach-socfpga/spl_s10.c +++ b/arch/arm/mach-socfpga/spl_s10.c @@ -9,7 +9,9 @@ #include #include #include +#include #include +#include #include #include #include diff --git a/arch/arm/mach-socfpga/spl_soc64.c b/arch/arm/mach-socfpga/spl_soc64.c index 4fe67ea0811..ba6efc1d864 100644 --- a/arch/arm/mach-socfpga/spl_soc64.c +++ b/arch/arm/mach-socfpga/spl_soc64.c @@ -4,6 +4,7 @@ * */ +#include #include DECLARE_GLOBAL_DATA_PTR; diff --git a/arch/arm/mach-socfpga/system_manager_gen5.c b/arch/arm/mach-socfpga/system_manager_gen5.c index c377d1c32c7..09caebb3c88 100644 --- a/arch/arm/mach-socfpga/system_manager_gen5.c +++ b/arch/arm/mach-socfpga/system_manager_gen5.c @@ -3,6 +3,7 @@ * Copyright (C) 2013-2017 Altera Corporation */ +#include #include #include #include diff --git a/arch/arm/mach-socfpga/system_manager_soc64.c b/arch/arm/mach-socfpga/system_manager_soc64.c index 4b42158be9d..958bb5107b5 100644 --- a/arch/arm/mach-socfpga/system_manager_soc64.c +++ b/arch/arm/mach-socfpga/system_manager_soc64.c @@ -8,6 +8,7 @@ #include #include #include +#include DECLARE_GLOBAL_DATA_PTR; diff --git a/arch/arm/mach-socfpga/timer.c b/arch/arm/mach-socfpga/timer.c index 99de5744c48..d9e8c84bfcf 100644 --- a/arch/arm/mach-socfpga/timer.c +++ b/arch/arm/mach-socfpga/timer.c @@ -3,7 +3,7 @@ * Copyright (C) 2012 Altera Corporation */ -#include +#include #include #include #include diff --git a/arch/arm/mach-socfpga/timer_s10.c b/arch/arm/mach-socfpga/timer_s10.c index 80933586319..84b13ce9d3a 100644 --- a/arch/arm/mach-socfpga/timer_s10.c +++ b/arch/arm/mach-socfpga/timer_s10.c @@ -4,6 +4,7 @@ * */ +#include #include #include #include diff --git a/arch/arm/mach-socfpga/vab.c b/arch/arm/mach-socfpga/vab.c index e74c71cfbb4..e146f2c5290 100644 --- a/arch/arm/mach-socfpga/vab.c +++ b/arch/arm/mach-socfpga/vab.c @@ -4,9 +4,9 @@ * */ -#include #include #include +#include #include static int do_vab(struct cmd_tbl *cmdtp, int flag, int argc, diff --git a/arch/arm/mach-socfpga/wrap_handoff_soc64.c b/arch/arm/mach-socfpga/wrap_handoff_soc64.c index 92051d19b73..6aa9bb26b4e 100644 --- a/arch/arm/mach-socfpga/wrap_handoff_soc64.c +++ b/arch/arm/mach-socfpga/wrap_handoff_soc64.c @@ -6,6 +6,7 @@ #include #include +#include #include #include "log.h" diff --git a/arch/arm/mach-socfpga/wrap_iocsr_config.c b/arch/arm/mach-socfpga/wrap_iocsr_config.c index 43ce329dd10..ce86f04cad1 100644 --- a/arch/arm/mach-socfpga/wrap_iocsr_config.c +++ b/arch/arm/mach-socfpga/wrap_iocsr_config.c @@ -3,7 +3,7 @@ * Copyright (C) 2015 Marek Vasut */ -#include +#include #include #include diff --git a/arch/arm/mach-socfpga/wrap_pinmux_config.c b/arch/arm/mach-socfpga/wrap_pinmux_config.c index e494d2eb3f9..33ca14c9dc7 100644 --- a/arch/arm/mach-socfpga/wrap_pinmux_config.c +++ b/arch/arm/mach-socfpga/wrap_pinmux_config.c @@ -3,9 +3,8 @@ * Copyright (C) 2015 Marek Vasut */ +#include #include -#include -#include /* Board-specific header. */ #include diff --git a/arch/arm/mach-socfpga/wrap_pll_config.c b/arch/arm/mach-socfpga/wrap_pll_config.c index e0d0f8f81b7..0c40ae98761 100644 --- a/arch/arm/mach-socfpga/wrap_pll_config.c +++ b/arch/arm/mach-socfpga/wrap_pll_config.c @@ -3,7 +3,7 @@ * Copyright (C) 2015 Marek Vasut */ -#include +#include #include #include diff --git a/arch/arm/mach-socfpga/wrap_pll_config_soc64.c b/arch/arm/mach-socfpga/wrap_pll_config_soc64.c index f13581033e6..6a0d6b5ead7 100644 --- a/arch/arm/mach-socfpga/wrap_pll_config_soc64.c +++ b/arch/arm/mach-socfpga/wrap_pll_config_soc64.c @@ -4,6 +4,7 @@ * */ +#include #include #include #include diff --git a/arch/arm/mach-socfpga/wrap_sdram_config.c b/arch/arm/mach-socfpga/wrap_sdram_config.c index 8f3fbaf80c8..cd3a0f66335 100644 --- a/arch/arm/mach-socfpga/wrap_sdram_config.c +++ b/arch/arm/mach-socfpga/wrap_sdram_config.c @@ -3,10 +3,8 @@ * Copyright (C) 2015 Marek Vasut */ -#include +#include #include -#include -#include #include /* Board-specific header. */ diff --git a/arch/arm/mach-stm32/soc.c b/arch/arm/mach-stm32/soc.c index 737e6809f8d..0bd8d7b22c4 100644 --- a/arch/arm/mach-stm32/soc.c +++ b/arch/arm/mach-stm32/soc.c @@ -4,6 +4,7 @@ * Author(s): Patrice Chotard, for STMicroelectronics. */ +#include #include #include #include diff --git a/arch/arm/mach-stm32mp/boot_params.c b/arch/arm/mach-stm32mp/boot_params.c index ebddf6a7dbc..158bf40cb97 100644 --- a/arch/arm/mach-stm32mp/boot_params.c +++ b/arch/arm/mach-stm32mp/boot_params.c @@ -5,7 +5,7 @@ #define LOG_CATEGORY LOGC_ARCH -#include +#include #include #include #include diff --git a/arch/arm/mach-stm32mp/bsec.c b/arch/arm/mach-stm32mp/bsec.c index 9ba7a6c9a89..5b869017ec1 100644 --- a/arch/arm/mach-stm32mp/bsec.c +++ b/arch/arm/mach-stm32mp/bsec.c @@ -5,6 +5,7 @@ #define LOG_CATEGORY UCLASS_MISC +#include #include #include #include diff --git a/arch/arm/mach-stm32mp/cmd_stm32key.c b/arch/arm/mach-stm32mp/cmd_stm32key.c index 0cb3c7a9fa4..c7fe232f86e 100644 --- a/arch/arm/mach-stm32mp/cmd_stm32key.c +++ b/arch/arm/mach-stm32mp/cmd_stm32key.c @@ -3,6 +3,7 @@ * Copyright (C) 2019, STMicroelectronics - All Rights Reserved */ +#include #include #include #include diff --git a/arch/arm/mach-stm32mp/cmd_stm32prog/cmd_stm32prog.c b/arch/arm/mach-stm32mp/cmd_stm32prog/cmd_stm32prog.c index 967fa4e06c0..adee6e05b63 100644 --- a/arch/arm/mach-stm32mp/cmd_stm32prog/cmd_stm32prog.c +++ b/arch/arm/mach-stm32mp/cmd_stm32prog/cmd_stm32prog.c @@ -3,6 +3,7 @@ * Copyright (C) 2020, STMicroelectronics - All Rights Reserved */ +#include #include #include #include diff --git a/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog_serial.c b/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog_serial.c index 07c5e0456f8..35bed319942 100644 --- a/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog_serial.c +++ b/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog_serial.c @@ -3,12 +3,12 @@ * Copyright (C) 2020, STMicroelectronics - All Rights Reserved */ +#include #include #include #include #include #include -#include #include #include #include diff --git a/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog_usb.c b/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog_usb.c index 4b1ed50e9fe..d18455bf36f 100644 --- a/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog_usb.c +++ b/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog_usb.c @@ -3,6 +3,7 @@ * Copyright (C) 2020, STMicroelectronics - All Rights Reserved */ +#include #include #include #include diff --git a/arch/arm/mach-stm32mp/dram_init.c b/arch/arm/mach-stm32mp/dram_init.c index 78b12fcbb6a..fb1208fc5d5 100644 --- a/arch/arm/mach-stm32mp/dram_init.c +++ b/arch/arm/mach-stm32mp/dram_init.c @@ -5,6 +5,7 @@ #define LOG_CATEGORY LOGC_ARCH +#include #include #include #include diff --git a/arch/arm/mach-stm32mp/stm32mp1/cpu.c b/arch/arm/mach-stm32mp/stm32mp1/cpu.c index 478c3efae73..524778f00c6 100644 --- a/arch/arm/mach-stm32mp/stm32mp1/cpu.c +++ b/arch/arm/mach-stm32mp/stm32mp1/cpu.c @@ -5,6 +5,7 @@ #define LOG_CATEGORY LOGC_ARCH +#include #include #include #include diff --git a/arch/arm/mach-stm32mp/stm32mp1/fdt.c b/arch/arm/mach-stm32mp/stm32mp1/fdt.c index e1e4dc04e01..d0b6c3cc5a5 100644 --- a/arch/arm/mach-stm32mp/stm32mp1/fdt.c +++ b/arch/arm/mach-stm32mp/stm32mp1/fdt.c @@ -5,11 +5,11 @@ #define LOG_CATEGORY LOGC_ARCH +#include #include #include #include #include -#include #include #include #include diff --git a/arch/arm/mach-stm32mp/stm32mp1/psci.c b/arch/arm/mach-stm32mp/stm32mp1/psci.c index 7772546b2fe..4f2379df45f 100644 --- a/arch/arm/mach-stm32mp/stm32mp1/psci.c +++ b/arch/arm/mach-stm32mp/stm32mp1/psci.c @@ -4,6 +4,7 @@ */ #include +#include #include #include #include @@ -12,7 +13,6 @@ #include #include #include -#include /* PWR */ #define PWR_CR3 0x0c diff --git a/arch/arm/mach-stm32mp/stm32mp1/pwr_regulator.c b/arch/arm/mach-stm32mp/stm32mp1/pwr_regulator.c index 79c44188cc5..846637ab162 100644 --- a/arch/arm/mach-stm32mp/stm32mp1/pwr_regulator.c +++ b/arch/arm/mach-stm32mp/stm32mp1/pwr_regulator.c @@ -5,10 +5,10 @@ #define LOG_CATEGORY UCLASS_REGULATOR +#include #include #include #include -#include #include #include #include diff --git a/arch/arm/mach-stm32mp/stm32mp1/spl.c b/arch/arm/mach-stm32mp/stm32mp1/spl.c index 7a8fd3178ad..6c79259b2c8 100644 --- a/arch/arm/mach-stm32mp/stm32mp1/spl.c +++ b/arch/arm/mach-stm32mp/stm32mp1/spl.c @@ -5,7 +5,7 @@ #define LOG_CATEGORY LOGC_ARCH -#include +#include #include #include #include diff --git a/arch/arm/mach-stm32mp/stm32mp1/stm32mp13x.c b/arch/arm/mach-stm32mp/stm32mp1/stm32mp13x.c index 4a811065fc3..845d973ad1b 100644 --- a/arch/arm/mach-stm32mp/stm32mp1/stm32mp13x.c +++ b/arch/arm/mach-stm32mp/stm32mp1/stm32mp13x.c @@ -5,7 +5,7 @@ #define LOG_CATEGORY LOGC_ARCH -#include +#include #include #include #include diff --git a/arch/arm/mach-stm32mp/stm32mp1/stm32mp15x.c b/arch/arm/mach-stm32mp/stm32mp1/stm32mp15x.c index f096fe538d8..d75ec99d6a1 100644 --- a/arch/arm/mach-stm32mp/stm32mp1/stm32mp15x.c +++ b/arch/arm/mach-stm32mp/stm32mp1/stm32mp15x.c @@ -5,6 +5,7 @@ #define LOG_CATEGORY LOGC_ARCH +#include #include #include #include diff --git a/arch/arm/mach-stm32mp/syscon.c b/arch/arm/mach-stm32mp/syscon.c index 8bcbd979340..a2e351d74a7 100644 --- a/arch/arm/mach-stm32mp/syscon.c +++ b/arch/arm/mach-stm32mp/syscon.c @@ -3,6 +3,7 @@ * Copyright (C) 2018, STMicroelectronics - All Rights Reserved */ +#include #include #include #include diff --git a/arch/arm/mach-sunxi/dram_timings/ddr2_v3s.c b/arch/arm/mach-sunxi/dram_timings/ddr2_v3s.c index 3666dddca15..9077f86a8b4 100644 --- a/arch/arm/mach-sunxi/dram_timings/ddr2_v3s.c +++ b/arch/arm/mach-sunxi/dram_timings/ddr2_v3s.c @@ -1,3 +1,4 @@ +#include #include #include diff --git a/arch/arm/mach-sunxi/dram_timings/ddr3_1333.c b/arch/arm/mach-sunxi/dram_timings/ddr3_1333.c index ceaafd6ec6f..0471e8a49e5 100644 --- a/arch/arm/mach-sunxi/dram_timings/ddr3_1333.c +++ b/arch/arm/mach-sunxi/dram_timings/ddr3_1333.c @@ -1,3 +1,4 @@ +#include #include #include diff --git a/arch/arm/mach-sunxi/dram_timings/h616_ddr3_1333.c b/arch/arm/mach-sunxi/dram_timings/h616_ddr3_1333.c index 3faf8d5bd97..232b4fe2df7 100644 --- a/arch/arm/mach-sunxi/dram_timings/h616_ddr3_1333.c +++ b/arch/arm/mach-sunxi/dram_timings/h616_ddr3_1333.c @@ -11,6 +11,7 @@ * SPDX-License-Identifier: GPL-2.0+ */ +#include #include #include diff --git a/arch/arm/mach-sunxi/dram_timings/h616_lpddr3.c b/arch/arm/mach-sunxi/dram_timings/h616_lpddr3.c index ce2ffa7a020..b6d6a687468 100644 --- a/arch/arm/mach-sunxi/dram_timings/h616_lpddr3.c +++ b/arch/arm/mach-sunxi/dram_timings/h616_lpddr3.c @@ -11,6 +11,7 @@ * SPDX-License-Identifier: GPL-2.0+ */ +#include #include #include diff --git a/arch/arm/mach-sunxi/dram_timings/h616_lpddr4_2133.c b/arch/arm/mach-sunxi/dram_timings/h616_lpddr4_2133.c index e6446b9180d..c11cb8678f6 100644 --- a/arch/arm/mach-sunxi/dram_timings/h616_lpddr4_2133.c +++ b/arch/arm/mach-sunxi/dram_timings/h616_lpddr4_2133.c @@ -9,6 +9,7 @@ * SPDX-License-Identifier: GPL-2.0+ */ +#include #include #include diff --git a/arch/arm/mach-sunxi/dram_timings/h6_ddr3_1333.c b/arch/arm/mach-sunxi/dram_timings/h6_ddr3_1333.c index afe8e25c7f5..2136ca3a4cb 100644 --- a/arch/arm/mach-sunxi/dram_timings/h6_ddr3_1333.c +++ b/arch/arm/mach-sunxi/dram_timings/h6_ddr3_1333.c @@ -19,6 +19,7 @@ * SPDX-License-Identifier: GPL-2.0+ */ +#include #include #include diff --git a/arch/arm/mach-sunxi/dram_timings/h6_lpddr3.c b/arch/arm/mach-sunxi/dram_timings/h6_lpddr3.c index c243b574406..10008601134 100644 --- a/arch/arm/mach-sunxi/dram_timings/h6_lpddr3.c +++ b/arch/arm/mach-sunxi/dram_timings/h6_lpddr3.c @@ -6,6 +6,7 @@ * SPDX-License-Identifier: GPL-2.0+ */ +#include #include #include diff --git a/arch/arm/mach-sunxi/dram_timings/lpddr3_stock.c b/arch/arm/mach-sunxi/dram_timings/lpddr3_stock.c index bc47a463853..bd57e2f6aac 100644 --- a/arch/arm/mach-sunxi/dram_timings/lpddr3_stock.c +++ b/arch/arm/mach-sunxi/dram_timings/lpddr3_stock.c @@ -1,3 +1,4 @@ +#include #include #include diff --git a/arch/arm/mach-tegra/ap.c b/arch/arm/mach-tegra/ap.c index 1ea620e4ab5..532730fe727 100644 --- a/arch/arm/mach-tegra/ap.c +++ b/arch/arm/mach-tegra/ap.c @@ -6,7 +6,7 @@ /* Tegra AP (Application Processor) code */ -#include +#include #include #include #include diff --git a/arch/arm/mach-tegra/arm64-mmu.c b/arch/arm/mach-tegra/arm64-mmu.c index 4fbe47a91e1..ea4eac392d9 100644 --- a/arch/arm/mach-tegra/arm64-mmu.c +++ b/arch/arm/mach-tegra/arm64-mmu.c @@ -7,6 +7,7 @@ * Copyright (c) 2015, NVIDIA CORPORATION. All rights reserved. */ +#include #include #include diff --git a/arch/arm/mach-tegra/board.c b/arch/arm/mach-tegra/board.c index c382e042860..327d70bd4cc 100644 --- a/arch/arm/mach-tegra/board.c +++ b/arch/arm/mach-tegra/board.c @@ -4,7 +4,7 @@ * NVIDIA Corporation */ -#include +#include #include #include #include diff --git a/arch/arm/mach-tegra/board2.c b/arch/arm/mach-tegra/board2.c index 479137e457c..adea12c9b7f 100644 --- a/arch/arm/mach-tegra/board2.c +++ b/arch/arm/mach-tegra/board2.c @@ -4,7 +4,7 @@ * NVIDIA Corporation */ -#include +#include #include #include #include diff --git a/arch/arm/mach-tegra/cache.c b/arch/arm/mach-tegra/cache.c index 462364abf03..d7063490e22 100644 --- a/arch/arm/mach-tegra/cache.c +++ b/arch/arm/mach-tegra/cache.c @@ -5,6 +5,7 @@ /* Tegra cache routines */ +#include #include #include #if IS_ENABLED(CONFIG_TEGRA_GP_PADCTRL) diff --git a/arch/arm/mach-tegra/cboot.c b/arch/arm/mach-tegra/cboot.c index c12543d71ac..8f5bb2f261a 100644 --- a/arch/arm/mach-tegra/cboot.c +++ b/arch/arm/mach-tegra/cboot.c @@ -3,6 +3,7 @@ * Copyright (c) 2016-2018, NVIDIA CORPORATION. */ +#include #include #include #include diff --git a/arch/arm/mach-tegra/clock.c b/arch/arm/mach-tegra/clock.c index 157e6c4911a..575da2bdb5a 100644 --- a/arch/arm/mach-tegra/clock.c +++ b/arch/arm/mach-tegra/clock.c @@ -5,6 +5,7 @@ /* Tegra SoC common clock control functions */ +#include #include #include #include diff --git a/arch/arm/mach-tegra/cmd_enterrcm.c b/arch/arm/mach-tegra/cmd_enterrcm.c index 8fa1207e97a..92ff6cb1bf8 100644 --- a/arch/arm/mach-tegra/cmd_enterrcm.c +++ b/arch/arm/mach-tegra/cmd_enterrcm.c @@ -24,6 +24,7 @@ * (C) Copyright 2004 Texas Insturments */ +#include #include #include #include diff --git a/arch/arm/mach-tegra/cpu.c b/arch/arm/mach-tegra/cpu.c index 5f2a5917102..59ca8aeabac 100644 --- a/arch/arm/mach-tegra/cpu.c +++ b/arch/arm/mach-tegra/cpu.c @@ -3,6 +3,7 @@ * Copyright (c) 2010-2019, NVIDIA CORPORATION. All rights reserved. */ +#include #include #include #include diff --git a/arch/arm/mach-tegra/crypto.c b/arch/arm/mach-tegra/crypto.c index 49e6a45243a..893da35e0b9 100644 --- a/arch/arm/mach-tegra/crypto.c +++ b/arch/arm/mach-tegra/crypto.c @@ -4,6 +4,7 @@ * (C) Copyright 2010 - 2011 NVIDIA Corporation */ +#include #include #include #include diff --git a/arch/arm/mach-tegra/dt-setup.c b/arch/arm/mach-tegra/dt-setup.c index f4ae602d523..c11494722bc 100644 --- a/arch/arm/mach-tegra/dt-setup.c +++ b/arch/arm/mach-tegra/dt-setup.c @@ -3,6 +3,7 @@ * Copyright (c) 2010-2016, NVIDIA CORPORATION. */ +#include #include #include #include diff --git a/arch/arm/mach-tegra/emc.c b/arch/arm/mach-tegra/emc.c index 83fad35d4dc..2eea14b5a74 100644 --- a/arch/arm/mach-tegra/emc.c +++ b/arch/arm/mach-tegra/emc.c @@ -3,6 +3,7 @@ * Copyright (c) 2011 The Chromium OS Authors. */ +#include #include #include "emc.h" #include diff --git a/arch/arm/mach-tegra/fuse.c b/arch/arm/mach-tegra/fuse.c index e9b5259ac70..83bd5055384 100644 --- a/arch/arm/mach-tegra/fuse.c +++ b/arch/arm/mach-tegra/fuse.c @@ -7,6 +7,7 @@ * Svyatoslav Ryhel */ +#include #include #include diff --git a/arch/arm/mach-tegra/gpu.c b/arch/arm/mach-tegra/gpu.c index 23381759b79..36538e7f96a 100644 --- a/arch/arm/mach-tegra/gpu.c +++ b/arch/arm/mach-tegra/gpu.c @@ -5,6 +5,7 @@ /* Tegra vpr routines */ +#include #include #include #include diff --git a/arch/arm/mach-tegra/ivc.c b/arch/arm/mach-tegra/ivc.c index 0445d5d48e5..66c1276f4b8 100644 --- a/arch/arm/mach-tegra/ivc.c +++ b/arch/arm/mach-tegra/ivc.c @@ -3,11 +3,11 @@ * Copyright (c) 2016, NVIDIA CORPORATION. */ +#include #include #include #include #include -#include #include #define TEGRA_IVC_ALIGN 64 diff --git a/arch/arm/mach-tegra/pmc.c b/arch/arm/mach-tegra/pmc.c index 3f968d4aeae..c4f5106750b 100644 --- a/arch/arm/mach-tegra/pmc.c +++ b/arch/arm/mach-tegra/pmc.c @@ -3,6 +3,7 @@ * Copyright (c) 2018-2019, NVIDIA CORPORATION. All rights reserved. */ +#include #include #include #include diff --git a/arch/arm/mach-tegra/powergate.c b/arch/arm/mach-tegra/powergate.c index 2a2f8467216..631bc04e950 100644 --- a/arch/arm/mach-tegra/powergate.c +++ b/arch/arm/mach-tegra/powergate.c @@ -3,8 +3,8 @@ * Copyright (c) 2014-2019, NVIDIA CORPORATION. All rights reserved. */ +#include #include -#include #include #include diff --git a/arch/arm/mach-tegra/spl.c b/arch/arm/mach-tegra/spl.c index 5df0eb28c96..ed897efc5f0 100644 --- a/arch/arm/mach-tegra/spl.c +++ b/arch/arm/mach-tegra/spl.c @@ -5,6 +5,7 @@ * * Allen Martin */ +#include #include #include #include diff --git a/arch/arm/mach-tegra/sys_info.c b/arch/arm/mach-tegra/sys_info.c index 11b40480246..5ad586ac17f 100644 --- a/arch/arm/mach-tegra/sys_info.c +++ b/arch/arm/mach-tegra/sys_info.c @@ -4,6 +4,7 @@ * NVIDIA Corporation */ +#include #include #include #if defined(CONFIG_TEGRA124) || defined(CONFIG_TEGRA30) diff --git a/arch/arm/mach-tegra/tegra114/clock.c b/arch/arm/mach-tegra/tegra114/clock.c index d5cc8ac44dd..2ee755bc649 100644 --- a/arch/arm/mach-tegra/tegra114/clock.c +++ b/arch/arm/mach-tegra/tegra114/clock.c @@ -6,6 +6,7 @@ /* Tegra114 Clock control functions */ +#include #include #include #include diff --git a/arch/arm/mach-tegra/tegra114/cpu.c b/arch/arm/mach-tegra/tegra114/cpu.c index 3fe2d2d7324..7d8f080c310 100644 --- a/arch/arm/mach-tegra/tegra114/cpu.c +++ b/arch/arm/mach-tegra/tegra114/cpu.c @@ -4,6 +4,7 @@ * NVIDIA Corporation */ +#include #include #include #include diff --git a/arch/arm/mach-tegra/tegra124/clock.c b/arch/arm/mach-tegra/tegra124/clock.c index 4ac0c10c597..ed8b6d96381 100644 --- a/arch/arm/mach-tegra/tegra124/clock.c +++ b/arch/arm/mach-tegra/tegra124/clock.c @@ -6,7 +6,7 @@ /* Tegra124 Clock control functions */ -#include +#include #include #include #include diff --git a/arch/arm/mach-tegra/tegra124/cpu.c b/arch/arm/mach-tegra/tegra124/cpu.c index 07892aedd3c..b1bfe8fb5e1 100644 --- a/arch/arm/mach-tegra/tegra124/cpu.c +++ b/arch/arm/mach-tegra/tegra124/cpu.c @@ -4,6 +4,7 @@ * NVIDIA Corporation */ +#include #include #include #include diff --git a/arch/arm/mach-tegra/tegra124/pmc.c b/arch/arm/mach-tegra/tegra124/pmc.c index 2294911501e..3921ffb52af 100644 --- a/arch/arm/mach-tegra/tegra124/pmc.c +++ b/arch/arm/mach-tegra/tegra124/pmc.c @@ -3,6 +3,7 @@ * Copyright (C) 2017 Google, Inc */ +#include #include #include diff --git a/arch/arm/mach-tegra/tegra124/psci.c b/arch/arm/mach-tegra/tegra124/psci.c index a50b681935a..ab102a62261 100644 --- a/arch/arm/mach-tegra/tegra124/psci.c +++ b/arch/arm/mach-tegra/tegra124/psci.c @@ -4,6 +4,7 @@ * Author: Jan Kiszka */ +#include #include #include #include diff --git a/arch/arm/mach-tegra/tegra124/xusb-padctl.c b/arch/arm/mach-tegra/tegra124/xusb-padctl.c index 1153444267d..69736aa3925 100644 --- a/arch/arm/mach-tegra/tegra124/xusb-padctl.c +++ b/arch/arm/mach-tegra/tegra124/xusb-padctl.c @@ -5,9 +5,9 @@ #define pr_fmt(fmt) "tegra-xusb-padctl: " fmt +#include #include #include -#include #include #include #include diff --git a/arch/arm/mach-tegra/tegra20/bct.c b/arch/arm/mach-tegra/tegra20/bct.c index e155b98cf65..b2c44f3d237 100644 --- a/arch/arm/mach-tegra/tegra20/bct.c +++ b/arch/arm/mach-tegra/tegra20/bct.c @@ -4,6 +4,7 @@ * Copyright (c) 2022, Svyatoslav Ryhel */ +#include #include #include #include diff --git a/arch/arm/mach-tegra/tegra20/clock.c b/arch/arm/mach-tegra/tegra20/clock.c index 6af20e9c782..109b73bfbe7 100644 --- a/arch/arm/mach-tegra/tegra20/clock.c +++ b/arch/arm/mach-tegra/tegra20/clock.c @@ -7,6 +7,7 @@ /* Tegra20 Clock control functions */ +#include #include #include #include diff --git a/arch/arm/mach-tegra/tegra20/cpu.c b/arch/arm/mach-tegra/tegra20/cpu.c index 1ba3930b5e6..e5b60598f7f 100644 --- a/arch/arm/mach-tegra/tegra20/cpu.c +++ b/arch/arm/mach-tegra/tegra20/cpu.c @@ -3,6 +3,7 @@ * Copyright (c) 2010-2012, NVIDIA CORPORATION. All rights reserved. */ +#include #include #include #include diff --git a/arch/arm/mach-tegra/tegra20/display.c b/arch/arm/mach-tegra/tegra20/display.c index 207e50aac90..4ba3fb23fd6 100644 --- a/arch/arm/mach-tegra/tegra20/display.c +++ b/arch/arm/mach-tegra/tegra20/display.c @@ -4,6 +4,7 @@ * NVIDIA Corporation */ +#include #include #include #include diff --git a/arch/arm/mach-tegra/tegra20/emc.c b/arch/arm/mach-tegra/tegra20/emc.c index e2ee8f124ac..fb5e699c940 100644 --- a/arch/arm/mach-tegra/tegra20/emc.c +++ b/arch/arm/mach-tegra/tegra20/emc.c @@ -3,7 +3,7 @@ * Copyright (c) 2011 The Chromium OS Authors. */ -#include +#include #include #include #include diff --git a/arch/arm/mach-tegra/tegra20/pmu.c b/arch/arm/mach-tegra/tegra20/pmu.c index f2fe5d0fa9d..05d0668cdba 100644 --- a/arch/arm/mach-tegra/tegra20/pmu.c +++ b/arch/arm/mach-tegra/tegra20/pmu.c @@ -4,6 +4,7 @@ * (C) Copyright 2010,2011 NVIDIA Corporation */ +#include #include #include #include diff --git a/arch/arm/mach-tegra/tegra20/warmboot.c b/arch/arm/mach-tegra/tegra20/warmboot.c index 18034c83a1c..5e3a9ebaceb 100644 --- a/arch/arm/mach-tegra/tegra20/warmboot.c +++ b/arch/arm/mach-tegra/tegra20/warmboot.c @@ -4,6 +4,7 @@ * NVIDIA Corporation */ +#include #include #include #include diff --git a/arch/arm/mach-tegra/tegra20/warmboot_avp.c b/arch/arm/mach-tegra/tegra20/warmboot_avp.c index 65bbe182535..94ce762e01f 100644 --- a/arch/arm/mach-tegra/tegra20/warmboot_avp.c +++ b/arch/arm/mach-tegra/tegra20/warmboot_avp.c @@ -4,7 +4,7 @@ * NVIDIA Corporation */ -#include +#include #include #include #include diff --git a/arch/arm/mach-tegra/tegra210/clock.c b/arch/arm/mach-tegra/tegra210/clock.c index 57ff0b2a19a..74817e0440b 100644 --- a/arch/arm/mach-tegra/tegra210/clock.c +++ b/arch/arm/mach-tegra/tegra210/clock.c @@ -6,10 +6,10 @@ /* Tegra210 Clock control functions */ +#include #include #include #include -#include #include #include #include diff --git a/arch/arm/mach-tegra/tegra210/xusb-padctl.c b/arch/arm/mach-tegra/tegra210/xusb-padctl.c index e409c2842e2..30d0395bb0e 100644 --- a/arch/arm/mach-tegra/tegra210/xusb-padctl.c +++ b/arch/arm/mach-tegra/tegra210/xusb-padctl.c @@ -5,9 +5,9 @@ #define pr_fmt(fmt) "tegra-xusb-padctl: " fmt +#include #include #include -#include #include #include #include diff --git a/arch/arm/mach-tegra/tegra30/bct.c b/arch/arm/mach-tegra/tegra30/bct.c index 250009ea8d8..cff1a3e98d2 100644 --- a/arch/arm/mach-tegra/tegra30/bct.c +++ b/arch/arm/mach-tegra/tegra30/bct.c @@ -4,9 +4,9 @@ * Copyright (c) 2022, Svyatoslav Ryhel */ +#include #include #include -#include #include #include "bct.h" #include "uboot_aes.h" diff --git a/arch/arm/mach-tegra/tegra30/clock.c b/arch/arm/mach-tegra/tegra30/clock.c index 7d61127920b..0af8cde8c64 100644 --- a/arch/arm/mach-tegra/tegra30/clock.c +++ b/arch/arm/mach-tegra/tegra30/clock.c @@ -6,6 +6,7 @@ /* Tegra30 Clock control functions */ +#include #include #include #include diff --git a/arch/arm/mach-tegra/tegra30/cpu.c b/arch/arm/mach-tegra/tegra30/cpu.c index 51a9deab1fd..60bbf13ea52 100644 --- a/arch/arm/mach-tegra/tegra30/cpu.c +++ b/arch/arm/mach-tegra/tegra30/cpu.c @@ -3,6 +3,7 @@ * Copyright (c) 2010-2014, NVIDIA CORPORATION. All rights reserved. */ +#include #include #include #include diff --git a/arch/arm/mach-tegra/xusb-padctl-common.c b/arch/arm/mach-tegra/xusb-padctl-common.c index a3515d903a6..28fdebe50a3 100644 --- a/arch/arm/mach-tegra/xusb-padctl-common.c +++ b/arch/arm/mach-tegra/xusb-padctl-common.c @@ -5,6 +5,7 @@ #define pr_fmt(fmt) "tegra-xusb-padctl: " fmt +#include #include #include #include diff --git a/arch/arm/mach-tegra/xusb-padctl-dummy.c b/arch/arm/mach-tegra/xusb-padctl-dummy.c index 1345b80747e..f2d90302f6d 100644 --- a/arch/arm/mach-tegra/xusb-padctl-dummy.c +++ b/arch/arm/mach-tegra/xusb-padctl-dummy.c @@ -3,9 +3,9 @@ * Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved. */ +#include #include -#include #include struct tegra_xusb_phy * __weak tegra_xusb_phy_get(unsigned int type) diff --git a/arch/arm/mach-u8500/cache.c b/arch/arm/mach-u8500/cache.c index 7541b567d0f..05a91346a89 100644 --- a/arch/arm/mach-u8500/cache.c +++ b/arch/arm/mach-u8500/cache.c @@ -3,7 +3,7 @@ * Copyright (C) 2019 Stephan Gerhold */ -#include +#include #include #include #include diff --git a/arch/arm/mach-u8500/cpuinfo.c b/arch/arm/mach-u8500/cpuinfo.c index 6d4c6196c3d..ab05b8a51b2 100644 --- a/arch/arm/mach-u8500/cpuinfo.c +++ b/arch/arm/mach-u8500/cpuinfo.c @@ -3,6 +3,7 @@ * Copyright (C) 2019 Stephan Gerhold */ +#include #include #include diff --git a/arch/arm/mach-uniphier/dram_init.c b/arch/arm/mach-uniphier/dram_init.c index 0e1164a2680..e6f1286e71f 100644 --- a/arch/arm/mach-uniphier/dram_init.c +++ b/arch/arm/mach-uniphier/dram_init.c @@ -12,6 +12,7 @@ #include #include #include +#include #include "init.h" #include "sg-regs.h" diff --git a/arch/arm/mach-versal-net/clk.c b/arch/arm/mach-versal-net/clk.c index 61b8fe71b1a..d097de7afa6 100644 --- a/arch/arm/mach-versal-net/clk.c +++ b/arch/arm/mach-versal-net/clk.c @@ -6,6 +6,7 @@ * Michal Simek */ +#include #include #include #include diff --git a/arch/arm/mach-versal-net/cpu.c b/arch/arm/mach-versal-net/cpu.c index d088e440f63..a82741e70fc 100644 --- a/arch/arm/mach-versal-net/cpu.c +++ b/arch/arm/mach-versal-net/cpu.c @@ -6,6 +6,7 @@ * Michal Simek */ +#include #include #include #include diff --git a/arch/arm/mach-versal/clk.c b/arch/arm/mach-versal/clk.c index 19943dfdd4c..5e3f44c7782 100644 --- a/arch/arm/mach-versal/clk.c +++ b/arch/arm/mach-versal/clk.c @@ -4,6 +4,7 @@ * Michal Simek */ +#include #include #include #include diff --git a/arch/arm/mach-versal/cpu.c b/arch/arm/mach-versal/cpu.c index 363ce3007fd..e4dc305d928 100644 --- a/arch/arm/mach-versal/cpu.c +++ b/arch/arm/mach-versal/cpu.c @@ -4,6 +4,7 @@ * Michal Simek */ +#include #include #include #include diff --git a/arch/arm/mach-versal/mp.c b/arch/arm/mach-versal/mp.c index 921ca49c359..2487b482ddb 100644 --- a/arch/arm/mach-versal/mp.c +++ b/arch/arm/mach-versal/mp.c @@ -4,8 +4,7 @@ * Siva Durga Prasad Paladugu */ -#include -#include +#include #include #include #include diff --git a/arch/arm/mach-versatile/Makefile b/arch/arm/mach-versatile/Makefile new file mode 100644 index 00000000000..858ca9414c0 --- /dev/null +++ b/arch/arm/mach-versatile/Makefile @@ -0,0 +1,7 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# (C) Copyright 2000-2006 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. + +obj-y = timer.o +obj-y += reset.o diff --git a/arch/arm/mach-versatile/reset.S b/arch/arm/mach-versatile/reset.S new file mode 100644 index 00000000000..c7f1225fb29 --- /dev/null +++ b/arch/arm/mach-versatile/reset.S @@ -0,0 +1,28 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * armboot - Startup Code for ARM926EJS CPU-core + * + * Copyright (c) 2003 Texas Instruments + * + * ----- Adapted for OMAP1610 OMAP730 from ARM925t code ------ + * + * Copyright (c) 2001 Marius Gröger + * Copyright (c) 2002 Alex Züpke + * Copyright (c) 2002 Gary Jennejohn + * Copyright (c) 2003 Richard Woodruff + * Copyright (c) 2003 Kshitij + */ + + .align 5 +.globl reset_cpu +reset_cpu: + ldr r1, rstctl1 /* get clkm1 reset ctl */ + mov r3, #0x0 + strh r3, [r1] /* clear it */ + mov r3, #0x8 + strh r3, [r1] /* force dsp+arm reset */ +_loop_forever: + b _loop_forever + +rstctl1: + .word 0xfffece10 diff --git a/arch/arm/mach-versatile/timer.c b/arch/arm/mach-versatile/timer.c new file mode 100644 index 00000000000..b471412186d --- /dev/null +++ b/arch/arm/mach-versatile/timer.c @@ -0,0 +1,62 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * (C) Copyright 2003 + * Texas Instruments + * + * (C) Copyright 2002 + * Sysgo Real-Time Solutions, GmbH + * Marius Groeger + * + * (C) Copyright 2002 + * Sysgo Real-Time Solutions, GmbH + * Alex Zuepke + * + * (C) Copyright 2002-2004 + * Gary Jennejohn, DENX Software Engineering, + * + * (C) Copyright 2004 + * Philippe Robin, ARM Ltd. + */ + +#include + +#define TIMER_ENABLE (1 << 7) +#define TIMER_MODE_MSK (1 << 6) +#define TIMER_MODE_FR (0 << 6) +#define TIMER_MODE_PD (1 << 6) + +#define TIMER_INT_EN (1 << 5) +#define TIMER_PRS_MSK (3 << 2) +#define TIMER_PRS_8S (1 << 3) +#define TIMER_SIZE_MSK (1 << 2) +#define TIMER_ONE_SHT (1 << 0) + +int timer_init (void) +{ + ulong tmr_ctrl_val; + + /* 1st disable the Timer */ + tmr_ctrl_val = *(volatile ulong *)(CFG_SYS_TIMERBASE + 8); + tmr_ctrl_val &= ~TIMER_ENABLE; + *(volatile ulong *)(CFG_SYS_TIMERBASE + 8) = tmr_ctrl_val; + + /* + * The Timer Control Register has one Undefined/Shouldn't Use Bit + * So we should do read/modify/write Operation + */ + + /* + * Timer Mode : Free Running + * Interrupt : Disabled + * Prescale : 8 Stage, Clk/256 + * Tmr Siz : 16 Bit Counter + * Tmr in Wrapping Mode + */ + tmr_ctrl_val = *(volatile ulong *)(CFG_SYS_TIMERBASE + 8); + tmr_ctrl_val &= ~(TIMER_MODE_MSK | TIMER_INT_EN | TIMER_PRS_MSK | TIMER_SIZE_MSK | TIMER_ONE_SHT ); + tmr_ctrl_val |= (TIMER_ENABLE | TIMER_PRS_8S); + + *(volatile ulong *)(CFG_SYS_TIMERBASE + 8) = tmr_ctrl_val; + + return 0; +} diff --git a/arch/arm/mach-zynq/clk.c b/arch/arm/mach-zynq/clk.c index c1b018cf22e..5e1ba8d43ed 100644 --- a/arch/arm/mach-zynq/clk.c +++ b/arch/arm/mach-zynq/clk.c @@ -4,6 +4,7 @@ * Copyright (C) 2013 Xilinx, Inc. All rights reserved. */ #include +#include #include #include #include diff --git a/arch/arm/mach-zynq/cpu.c b/arch/arm/mach-zynq/cpu.c index c75e453d573..3b6518c71c9 100644 --- a/arch/arm/mach-zynq/cpu.c +++ b/arch/arm/mach-zynq/cpu.c @@ -3,11 +3,10 @@ * Copyright (C) 2012 Michal Simek * Copyright (C) 2012 Xilinx, Inc. All rights reserved. */ -#include +#include #include #include #include -#include #include #include #include diff --git a/arch/arm/mach-zynq/ddrc.c b/arch/arm/mach-zynq/ddrc.c index b9a2eef5a6f..28988ef95b5 100644 --- a/arch/arm/mach-zynq/ddrc.c +++ b/arch/arm/mach-zynq/ddrc.c @@ -4,7 +4,7 @@ * Copyright (C) 2012 - 2017 Xilinx, Inc. All rights reserved. */ -#include +#include #include #include #include diff --git a/arch/arm/mach-zynq/slcr.c b/arch/arm/mach-zynq/slcr.c index ef877df0fe8..5d9f4d23f34 100644 --- a/arch/arm/mach-zynq/slcr.c +++ b/arch/arm/mach-zynq/slcr.c @@ -3,6 +3,7 @@ * Copyright (c) 2013 - 2017 Xilinx Inc. */ +#include #include #include #include diff --git a/arch/arm/mach-zynq/spl.c b/arch/arm/mach-zynq/spl.c index 8ef12ed65ce..fea1c9b12ad 100644 --- a/arch/arm/mach-zynq/spl.c +++ b/arch/arm/mach-zynq/spl.c @@ -2,6 +2,7 @@ /* * (C) Copyright 2014 - 2017 Xilinx, Inc. Michal Simek */ +#include #include #include #include diff --git a/arch/arm/mach-zynqmp-r5/cpu.c b/arch/arm/mach-zynqmp-r5/cpu.c index 9a912dd5bd7..0d368443d82 100644 --- a/arch/arm/mach-zynqmp-r5/cpu.c +++ b/arch/arm/mach-zynqmp-r5/cpu.c @@ -3,6 +3,7 @@ * Copyright (C) 2018 Xilinx, Inc. (Michal Simek) */ +#include #include #include #include diff --git a/arch/arm/mach-zynqmp/aes.c b/arch/arm/mach-zynqmp/aes.c index 9a05fbf9c11..8a2b7fdcbe9 100644 --- a/arch/arm/mach-zynqmp/aes.c +++ b/arch/arm/mach-zynqmp/aes.c @@ -7,8 +7,9 @@ * Christian Taedcke */ +#include #include -#include + #include #include #include diff --git a/arch/arm/mach-zynqmp/clk.c b/arch/arm/mach-zynqmp/clk.c index 9b573b1746a..3b05f8455bf 100644 --- a/arch/arm/mach-zynqmp/clk.c +++ b/arch/arm/mach-zynqmp/clk.c @@ -4,6 +4,7 @@ * Michal Simek */ +#include #include #include #include diff --git a/arch/arm/mach-zynqmp/cpu.c b/arch/arm/mach-zynqmp/cpu.c index 07668c94689..6ae27894ecd 100644 --- a/arch/arm/mach-zynqmp/cpu.c +++ b/arch/arm/mach-zynqmp/cpu.c @@ -4,10 +4,9 @@ * Michal Simek */ +#include #include #include -#include -#include #include #include #include diff --git a/arch/arm/mach-zynqmp/ecc_spl_init.c b/arch/arm/mach-zynqmp/ecc_spl_init.c index 1eef1078951..f547d8e3a5b 100644 --- a/arch/arm/mach-zynqmp/ecc_spl_init.c +++ b/arch/arm/mach-zynqmp/ecc_spl_init.c @@ -5,6 +5,7 @@ * Jorge Ramirez-Ortiz */ +#include #include #include #include diff --git a/arch/arm/mach-zynqmp/handoff.c b/arch/arm/mach-zynqmp/handoff.c index b007307e1f3..dce92438926 100644 --- a/arch/arm/mach-zynqmp/handoff.c +++ b/arch/arm/mach-zynqmp/handoff.c @@ -5,6 +5,7 @@ * Michal Simek */ +#include #include #include #include diff --git a/arch/arm/mach-zynqmp/include/mach/zynqmp_aes.h b/arch/arm/mach-zynqmp/include/mach/zynqmp_aes.h index 01a13d4c7c0..2a9cffbd0f8 100644 --- a/arch/arm/mach-zynqmp/include/mach/zynqmp_aes.h +++ b/arch/arm/mach-zynqmp/include/mach/zynqmp_aes.h @@ -9,8 +9,6 @@ #ifndef ZYNQMP_AES_H #define ZYNQMP_AES_H -#include - struct zynqmp_aes { u64 srcaddr; u64 ivaddr; diff --git a/arch/arm/mach-zynqmp/mp.c b/arch/arm/mach-zynqmp/mp.c index 9b46a25a1cb..aff9054212c 100644 --- a/arch/arm/mach-zynqmp/mp.c +++ b/arch/arm/mach-zynqmp/mp.c @@ -4,16 +4,14 @@ * Michal Simek */ -#include +#include #include #include -#include #include #include #include #include #include -#include #define LOCK 0 #define SPLIT 1 diff --git a/arch/arm/mach-zynqmp/psu_spl_init.c b/arch/arm/mach-zynqmp/psu_spl_init.c index 5b4d66359bf..b4d7f44bbee 100644 --- a/arch/arm/mach-zynqmp/psu_spl_init.c +++ b/arch/arm/mach-zynqmp/psu_spl_init.c @@ -4,6 +4,7 @@ * * Michal Simek */ +#include #include #include #include diff --git a/arch/arm/mach-zynqmp/spl.c b/arch/arm/mach-zynqmp/spl.c index 6b67245f348..979ff3aef6c 100644 --- a/arch/arm/mach-zynqmp/spl.c +++ b/arch/arm/mach-zynqmp/spl.c @@ -5,6 +5,7 @@ * Michal Simek */ +#include #include #include #include diff --git a/arch/m68k/include/asm/global_data.h b/arch/m68k/include/asm/global_data.h index 93efc722ba8..c2ef5770a3d 100644 --- a/arch/m68k/include/asm/global_data.h +++ b/arch/m68k/include/asm/global_data.h @@ -7,8 +7,6 @@ #ifndef __ASM_GBL_DATA_H #define __ASM_GBL_DATA_H -#include - /* Architecture-specific global data */ struct arch_global_data { #ifdef CONFIG_SYS_I2C_FSL diff --git a/arch/m68k/lib/bdinfo.c b/arch/m68k/lib/bdinfo.c index cf6ae5adddf..3719f11c03c 100644 --- a/arch/m68k/lib/bdinfo.c +++ b/arch/m68k/lib/bdinfo.c @@ -8,6 +8,7 @@ #include #include +#include #include DECLARE_GLOBAL_DATA_PTR; diff --git a/arch/microblaze/cpu/spl.c b/arch/microblaze/cpu/spl.c index 52177670578..cb224bd2542 100644 --- a/arch/microblaze/cpu/spl.c +++ b/arch/microblaze/cpu/spl.c @@ -10,6 +10,7 @@ #include #include #include +#include #include void board_boot_order(u32 *spl_boot_list) diff --git a/arch/microblaze/include/asm/global_data.h b/arch/microblaze/include/asm/global_data.h index bb4112f22a3..93506dec894 100644 --- a/arch/microblaze/include/asm/global_data.h +++ b/arch/microblaze/include/asm/global_data.h @@ -9,7 +9,6 @@ #define __ASM_GBL_DATA_H #include -#include /* Architecture-specific global data */ struct arch_global_data { diff --git a/arch/mips/include/asm/global_data.h b/arch/mips/include/asm/global_data.h index 147a95ecea8..34b7e0bed94 100644 --- a/arch/mips/include/asm/global_data.h +++ b/arch/mips/include/asm/global_data.h @@ -9,7 +9,6 @@ #include #include -#include struct octeon_eeprom_mac_addr { u8 mac_addr_base[6]; diff --git a/arch/mips/lib/traps.c b/arch/mips/lib/traps.c index 89846c9723c..40469d1be09 100644 --- a/arch/mips/lib/traps.c +++ b/arch/mips/lib/traps.c @@ -20,6 +20,7 @@ #include #include #include +#include DECLARE_GLOBAL_DATA_PTR; diff --git a/arch/mips/mach-mtmips/Kconfig b/arch/mips/mach-mtmips/Kconfig index 3fcd0b8465b..15b2792e619 100644 --- a/arch/mips/mach-mtmips/Kconfig +++ b/arch/mips/mach-mtmips/Kconfig @@ -80,7 +80,6 @@ config SOC_MT7621 bool "MT7621" select MIPS_CM select MIPS_L2_CACHE - select MMC_SUPPORTS_TUNING select SYS_CACHE_SHIFT_5 select SYS_MIPS_CACHE_INIT_RAM_LOAD select PINCTRL_MT7621 diff --git a/arch/nios2/cpu/cpu.c b/arch/nios2/cpu/cpu.c index 792fa01ab9e..de7bfa947f1 100644 --- a/arch/nios2/cpu/cpu.c +++ b/arch/nios2/cpu/cpu.c @@ -4,7 +4,7 @@ * Scott McNutt */ -#include +#include #include #include #include diff --git a/arch/nios2/cpu/interrupts.c b/arch/nios2/cpu/interrupts.c index 27093c4faa3..90cabb67571 100644 --- a/arch/nios2/cpu/interrupts.c +++ b/arch/nios2/cpu/interrupts.c @@ -7,6 +7,7 @@ * Scott McNutt */ +#include #include #include #include diff --git a/arch/nios2/cpu/traps.c b/arch/nios2/cpu/traps.c index 59690214f14..087a05097d9 100644 --- a/arch/nios2/cpu/traps.c +++ b/arch/nios2/cpu/traps.c @@ -4,8 +4,8 @@ * Scott McNutt */ +#include #include -#include #include void trap_handler (struct pt_regs *regs) diff --git a/arch/nios2/include/asm/global_data.h b/arch/nios2/include/asm/global_data.h index d9bbd54734e..b56e8a5078e 100644 --- a/arch/nios2/include/asm/global_data.h +++ b/arch/nios2/include/asm/global_data.h @@ -7,7 +7,6 @@ #define __ASM_NIOS2_GLOBALDATA_H_ #include -#include /* Architecture-specific global data */ struct arch_global_data { diff --git a/arch/nios2/lib/bootm.c b/arch/nios2/lib/bootm.c index ce939ff5e15..657a17c7204 100644 --- a/arch/nios2/lib/bootm.c +++ b/arch/nios2/lib/bootm.c @@ -4,6 +4,7 @@ * Scott McNutt */ +#include #include #include #include diff --git a/arch/nios2/lib/cache.c b/arch/nios2/lib/cache.c index 8f543f2a2f2..5864d8f0f47 100644 --- a/arch/nios2/lib/cache.c +++ b/arch/nios2/lib/cache.c @@ -5,6 +5,7 @@ * Implemented by fredrik.markstrom@gmail.com and ivarholmqvist@gmail.com */ +#include #include #include #include diff --git a/arch/powerpc/cpu/mpc83xx/cpu.c b/arch/powerpc/cpu/mpc83xx/cpu.c index e0be938ea98..f6ffe295b8e 100644 --- a/arch/powerpc/cpu/mpc83xx/cpu.c +++ b/arch/powerpc/cpu/mpc83xx/cpu.c @@ -9,6 +9,7 @@ * Derived from the MPC8260 and MPC85xx. */ +#include #include #include #include diff --git a/arch/powerpc/cpu/mpc83xx/ecc.c b/arch/powerpc/cpu/mpc83xx/ecc.c index 9ab5ea313d3..3e24752e2f6 100644 --- a/arch/powerpc/cpu/mpc83xx/ecc.c +++ b/arch/powerpc/cpu/mpc83xx/ecc.c @@ -6,6 +6,7 @@ * based on the contribution of Marian Balakowicz */ +#include #include #include #include diff --git a/arch/powerpc/cpu/mpc83xx/fdt.c b/arch/powerpc/cpu/mpc83xx/fdt.c index 1bd4f2b3449..33b2151f878 100644 --- a/arch/powerpc/cpu/mpc83xx/fdt.c +++ b/arch/powerpc/cpu/mpc83xx/fdt.c @@ -6,6 +6,7 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ +#include #include #include #include diff --git a/arch/powerpc/cpu/mpc83xx/interrupts.c b/arch/powerpc/cpu/mpc83xx/interrupts.c index d86c981811e..f9486678af3 100644 --- a/arch/powerpc/cpu/mpc83xx/interrupts.c +++ b/arch/powerpc/cpu/mpc83xx/interrupts.c @@ -6,6 +6,7 @@ * Copyright 2004 Freescale Semiconductor, Inc. */ +#include #include #include #include diff --git a/arch/powerpc/cpu/mpc83xx/law.c b/arch/powerpc/cpu/mpc83xx/law.c index ae60be9e877..5e02f4094bb 100644 --- a/arch/powerpc/cpu/mpc83xx/law.c +++ b/arch/powerpc/cpu/mpc83xx/law.c @@ -3,6 +3,7 @@ * Copyright 2011 Freescale Semiconductor, Inc. */ +#include #include #include #include diff --git a/arch/powerpc/cpu/mpc83xx/pci.c b/arch/powerpc/cpu/mpc83xx/pci.c index 6f378c4e221..65ef0497c2a 100644 --- a/arch/powerpc/cpu/mpc83xx/pci.c +++ b/arch/powerpc/cpu/mpc83xx/pci.c @@ -6,6 +6,7 @@ * with some bits from older board-specific PCI initialization. */ +#include #include #include #include diff --git a/arch/powerpc/cpu/mpc83xx/pcie.c b/arch/powerpc/cpu/mpc83xx/pcie.c index efa30c68338..47ca74c5c35 100644 --- a/arch/powerpc/cpu/mpc83xx/pcie.c +++ b/arch/powerpc/cpu/mpc83xx/pcie.c @@ -7,6 +7,7 @@ * Anton Vorontsov */ +#include #include #include #include diff --git a/arch/powerpc/cpu/mpc83xx/qe_io.c b/arch/powerpc/cpu/mpc83xx/qe_io.c index 256dbfe8a4b..52360703a7d 100644 --- a/arch/powerpc/cpu/mpc83xx/qe_io.c +++ b/arch/powerpc/cpu/mpc83xx/qe_io.c @@ -6,6 +6,7 @@ * based on source code of Shlomi Gridish */ +#include #include #include #include diff --git a/arch/powerpc/cpu/mpc83xx/serdes.c b/arch/powerpc/cpu/mpc83xx/serdes.c index d3ca24422a5..d4848b2ec4d 100644 --- a/arch/powerpc/cpu/mpc83xx/serdes.c +++ b/arch/powerpc/cpu/mpc83xx/serdes.c @@ -9,6 +9,7 @@ */ #include +#include #include #include #include diff --git a/arch/powerpc/cpu/mpc83xx/spd_sdram.c b/arch/powerpc/cpu/mpc83xx/spd_sdram.c index e847c03f378..6da8fc4381d 100644 --- a/arch/powerpc/cpu/mpc83xx/spd_sdram.c +++ b/arch/powerpc/cpu/mpc83xx/spd_sdram.c @@ -12,6 +12,7 @@ #ifndef CONFIG_MPC83XX_SDRAM +#include #include #include #include diff --git a/arch/powerpc/cpu/mpc83xx/speed.c b/arch/powerpc/cpu/mpc83xx/speed.c index 72464962613..b7a87fec2f5 100644 --- a/arch/powerpc/cpu/mpc83xx/speed.c +++ b/arch/powerpc/cpu/mpc83xx/speed.c @@ -8,6 +8,7 @@ #ifndef CONFIG_CLK_MPC83XX +#include #include #include #include diff --git a/arch/powerpc/cpu/mpc83xx/spl_minimal.c b/arch/powerpc/cpu/mpc83xx/spl_minimal.c index 7036e3fae0c..b55bfaffcae 100644 --- a/arch/powerpc/cpu/mpc83xx/spl_minimal.c +++ b/arch/powerpc/cpu/mpc83xx/spl_minimal.c @@ -3,7 +3,7 @@ * Copyright (C) 2004-2008 Freescale Semiconductor, Inc. */ -#include +#include #include #include #include diff --git a/arch/powerpc/cpu/mpc83xx/traps.c b/arch/powerpc/cpu/mpc83xx/traps.c index 79ea1a9bb3c..94e6323d736 100644 --- a/arch/powerpc/cpu/mpc83xx/traps.c +++ b/arch/powerpc/cpu/mpc83xx/traps.c @@ -11,6 +11,7 @@ * exceptions */ +#include #include #include #include diff --git a/arch/powerpc/cpu/mpc85xx/b4860_ids.c b/arch/powerpc/cpu/mpc85xx/b4860_ids.c index df2f0efe3ed..013a171ed87 100644 --- a/arch/powerpc/cpu/mpc85xx/b4860_ids.c +++ b/arch/powerpc/cpu/mpc85xx/b4860_ids.c @@ -3,8 +3,7 @@ * Copyright 2012 Freescale Semiconductor, Inc. */ -#include -#include +#include #include #include diff --git a/arch/powerpc/cpu/mpc85xx/b4860_serdes.c b/arch/powerpc/cpu/mpc85xx/b4860_serdes.c index 25fdb4b0421..8e18e12f634 100644 --- a/arch/powerpc/cpu/mpc85xx/b4860_serdes.c +++ b/arch/powerpc/cpu/mpc85xx/b4860_serdes.c @@ -3,6 +3,7 @@ * Copyright 2012 Freescale Semiconductor, Inc. */ +#include #include #include #include diff --git a/arch/powerpc/cpu/mpc85xx/bsc9132_serdes.c b/arch/powerpc/cpu/mpc85xx/bsc9132_serdes.c index 9ebb3d838fa..79213348274 100644 --- a/arch/powerpc/cpu/mpc85xx/bsc9132_serdes.c +++ b/arch/powerpc/cpu/mpc85xx/bsc9132_serdes.c @@ -5,6 +5,7 @@ */ #include +#include #include #include #include diff --git a/arch/powerpc/cpu/mpc85xx/c29x_serdes.c b/arch/powerpc/cpu/mpc85xx/c29x_serdes.c index bbe4a0dd62b..e53dd43f31f 100644 --- a/arch/powerpc/cpu/mpc85xx/c29x_serdes.c +++ b/arch/powerpc/cpu/mpc85xx/c29x_serdes.c @@ -4,6 +4,7 @@ */ #include +#include #include #include #include diff --git a/arch/powerpc/cpu/mpc85xx/cmd_errata.c b/arch/powerpc/cpu/mpc85xx/cmd_errata.c index f91a4d441d3..c7d473d4a1b 100644 --- a/arch/powerpc/cpu/mpc85xx/cmd_errata.c +++ b/arch/powerpc/cpu/mpc85xx/cmd_errata.c @@ -3,6 +3,7 @@ * Copyright 2010-2011 Freescale Semiconductor, Inc. */ +#include #include #include #include diff --git a/arch/powerpc/cpu/mpc85xx/cpu.c b/arch/powerpc/cpu/mpc85xx/cpu.c index 6356b021638..e8a3e82765f 100644 --- a/arch/powerpc/cpu/mpc85xx/cpu.c +++ b/arch/powerpc/cpu/mpc85xx/cpu.c @@ -9,6 +9,7 @@ */ #include +#include #include #include #include diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init_early.c b/arch/powerpc/cpu/mpc85xx/cpu_init_early.c index 574510fa088..a67f37e3af9 100644 --- a/arch/powerpc/cpu/mpc85xx/cpu_init_early.c +++ b/arch/powerpc/cpu/mpc85xx/cpu_init_early.c @@ -3,9 +3,8 @@ * Copyright 2009-2012 Freescale Semiconductor, Inc */ -#include +#include #include -#include #include #include #include diff --git a/arch/powerpc/cpu/mpc85xx/fdt.c b/arch/powerpc/cpu/mpc85xx/fdt.c index c56e98d4b49..e26436bf570 100644 --- a/arch/powerpc/cpu/mpc85xx/fdt.c +++ b/arch/powerpc/cpu/mpc85xx/fdt.c @@ -6,7 +6,7 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ -#include +#include #include #include #include diff --git a/arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c b/arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c index 945020f7ecb..9b6577e547e 100644 --- a/arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c +++ b/arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c @@ -3,6 +3,7 @@ * Copyright 2012 Freescale Semiconductor, Inc. */ +#include #include #include #include diff --git a/arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c b/arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c index 78316ea5ffe..7c2de02c4c5 100644 --- a/arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c +++ b/arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c @@ -3,7 +3,7 @@ * Copyright 2009-2011 Freescale Semiconductor, Inc. */ -#include +#include #include #include #include diff --git a/arch/powerpc/cpu/mpc85xx/interrupts.c b/arch/powerpc/cpu/mpc85xx/interrupts.c index 3c98768f22e..bcbdfac0279 100644 --- a/arch/powerpc/cpu/mpc85xx/interrupts.c +++ b/arch/powerpc/cpu/mpc85xx/interrupts.c @@ -10,7 +10,7 @@ * Xianghua Xiao (X.Xiao@motorola.com) */ -#include +#include #include #include #include diff --git a/arch/powerpc/cpu/mpc85xx/liodn.c b/arch/powerpc/cpu/mpc85xx/liodn.c index af6731cbb3a..4b8844a4d96 100644 --- a/arch/powerpc/cpu/mpc85xx/liodn.c +++ b/arch/powerpc/cpu/mpc85xx/liodn.c @@ -3,7 +3,7 @@ * Copyright 2008-2011 Freescale Semiconductor, Inc. */ -#include +#include #include #include #include diff --git a/arch/powerpc/cpu/mpc85xx/mp.c b/arch/powerpc/cpu/mpc85xx/mp.c index b638f24ed14..7c47e415f05 100644 --- a/arch/powerpc/cpu/mpc85xx/mp.c +++ b/arch/powerpc/cpu/mpc85xx/mp.c @@ -3,7 +3,7 @@ * Copyright 2008-2011 Freescale Semiconductor, Inc. */ -#include +#include #include #include #include diff --git a/arch/powerpc/cpu/mpc85xx/mpc8536_serdes.c b/arch/powerpc/cpu/mpc85xx/mpc8536_serdes.c index bafff2083b3..cbcb57fe3a5 100644 --- a/arch/powerpc/cpu/mpc85xx/mpc8536_serdes.c +++ b/arch/powerpc/cpu/mpc85xx/mpc8536_serdes.c @@ -5,6 +5,7 @@ */ #include +#include #include #include #include diff --git a/arch/powerpc/cpu/mpc85xx/mpc8544_serdes.c b/arch/powerpc/cpu/mpc85xx/mpc8544_serdes.c index ad979caf6a7..a48f3c15128 100644 --- a/arch/powerpc/cpu/mpc85xx/mpc8544_serdes.c +++ b/arch/powerpc/cpu/mpc85xx/mpc8544_serdes.c @@ -4,6 +4,7 @@ */ #include +#include #include #include #include diff --git a/arch/powerpc/cpu/mpc85xx/mpc8548_serdes.c b/arch/powerpc/cpu/mpc85xx/mpc8548_serdes.c index 924afa096d1..479ee085d3a 100644 --- a/arch/powerpc/cpu/mpc85xx/mpc8548_serdes.c +++ b/arch/powerpc/cpu/mpc85xx/mpc8548_serdes.c @@ -4,6 +4,7 @@ */ #include +#include #include #include #include diff --git a/arch/powerpc/cpu/mpc85xx/p1010_serdes.c b/arch/powerpc/cpu/mpc85xx/p1010_serdes.c index d38041ef5c2..56e5ef6468c 100644 --- a/arch/powerpc/cpu/mpc85xx/p1010_serdes.c +++ b/arch/powerpc/cpu/mpc85xx/p1010_serdes.c @@ -5,6 +5,7 @@ */ #include +#include #include #include #include diff --git a/arch/powerpc/cpu/mpc85xx/p1021_serdes.c b/arch/powerpc/cpu/mpc85xx/p1021_serdes.c index ec0f14ae6a7..47f13e3c1cd 100644 --- a/arch/powerpc/cpu/mpc85xx/p1021_serdes.c +++ b/arch/powerpc/cpu/mpc85xx/p1021_serdes.c @@ -4,6 +4,7 @@ */ #include +#include #include #include #include diff --git a/arch/powerpc/cpu/mpc85xx/p1023_serdes.c b/arch/powerpc/cpu/mpc85xx/p1023_serdes.c index 6d306d99c32..7a8f653727e 100644 --- a/arch/powerpc/cpu/mpc85xx/p1023_serdes.c +++ b/arch/powerpc/cpu/mpc85xx/p1023_serdes.c @@ -5,6 +5,7 @@ */ #include +#include #include #include #include diff --git a/arch/powerpc/cpu/mpc85xx/p2020_serdes.c b/arch/powerpc/cpu/mpc85xx/p2020_serdes.c index 49626fc1d1b..8c5d82ae8ad 100644 --- a/arch/powerpc/cpu/mpc85xx/p2020_serdes.c +++ b/arch/powerpc/cpu/mpc85xx/p2020_serdes.c @@ -4,6 +4,7 @@ */ #include +#include #include #include #include diff --git a/arch/powerpc/cpu/mpc85xx/p2041_ids.c b/arch/powerpc/cpu/mpc85xx/p2041_ids.c index ae5227a1eed..540a6e6e191 100644 --- a/arch/powerpc/cpu/mpc85xx/p2041_ids.c +++ b/arch/powerpc/cpu/mpc85xx/p2041_ids.c @@ -3,8 +3,7 @@ * Copyright 2011 Freescale Semiconductor, Inc. */ -#include -#include +#include #include #include diff --git a/arch/powerpc/cpu/mpc85xx/p2041_serdes.c b/arch/powerpc/cpu/mpc85xx/p2041_serdes.c index 3943859a518..3eca3a69326 100644 --- a/arch/powerpc/cpu/mpc85xx/p2041_serdes.c +++ b/arch/powerpc/cpu/mpc85xx/p2041_serdes.c @@ -3,6 +3,7 @@ * Copyright 2010-2011 Freescale Semiconductor, Inc. */ +#include #include #include #include diff --git a/arch/powerpc/cpu/mpc85xx/p3041_ids.c b/arch/powerpc/cpu/mpc85xx/p3041_ids.c index 0675a59414b..8f645258a5f 100644 --- a/arch/powerpc/cpu/mpc85xx/p3041_ids.c +++ b/arch/powerpc/cpu/mpc85xx/p3041_ids.c @@ -3,8 +3,7 @@ * Copyright 2010-2011 Freescale Semiconductor, Inc. */ -#include -#include +#include #include #include diff --git a/arch/powerpc/cpu/mpc85xx/p3041_serdes.c b/arch/powerpc/cpu/mpc85xx/p3041_serdes.c index b1586f110e8..ec8234c1c1e 100644 --- a/arch/powerpc/cpu/mpc85xx/p3041_serdes.c +++ b/arch/powerpc/cpu/mpc85xx/p3041_serdes.c @@ -3,6 +3,7 @@ * Copyright 2009-2011 Freescale Semiconductor, Inc. */ +#include #include #include #include diff --git a/arch/powerpc/cpu/mpc85xx/p4080_ids.c b/arch/powerpc/cpu/mpc85xx/p4080_ids.c index 15ab4ac9385..db411162022 100644 --- a/arch/powerpc/cpu/mpc85xx/p4080_ids.c +++ b/arch/powerpc/cpu/mpc85xx/p4080_ids.c @@ -3,8 +3,7 @@ * Copyright 2010-2011 Freescale Semiconductor, Inc. */ -#include -#include +#include #include #include diff --git a/arch/powerpc/cpu/mpc85xx/p4080_serdes.c b/arch/powerpc/cpu/mpc85xx/p4080_serdes.c index 438fd446be3..463fa119c9b 100644 --- a/arch/powerpc/cpu/mpc85xx/p4080_serdes.c +++ b/arch/powerpc/cpu/mpc85xx/p4080_serdes.c @@ -3,6 +3,7 @@ * Copyright 2009-2010 Freescale Semiconductor, Inc. */ +#include #include #include #include diff --git a/arch/powerpc/cpu/mpc85xx/p5040_ids.c b/arch/powerpc/cpu/mpc85xx/p5040_ids.c index 0a34e066e94..bd05eae2551 100644 --- a/arch/powerpc/cpu/mpc85xx/p5040_ids.c +++ b/arch/powerpc/cpu/mpc85xx/p5040_ids.c @@ -3,8 +3,7 @@ * Copyright 2010-2011 Freescale Semiconductor, Inc. */ -#include -#include +#include #include #include diff --git a/arch/powerpc/cpu/mpc85xx/p5040_serdes.c b/arch/powerpc/cpu/mpc85xx/p5040_serdes.c index 409f2ac938d..2327b2c2a41 100644 --- a/arch/powerpc/cpu/mpc85xx/p5040_serdes.c +++ b/arch/powerpc/cpu/mpc85xx/p5040_serdes.c @@ -3,6 +3,7 @@ * Copyright 2009-2011 Freescale Semiconductor, Inc. */ +#include #include #include #include diff --git a/arch/powerpc/cpu/mpc85xx/portals.c b/arch/powerpc/cpu/mpc85xx/portals.c index 782874d79d7..6b4cbddcdfe 100644 --- a/arch/powerpc/cpu/mpc85xx/portals.c +++ b/arch/powerpc/cpu/mpc85xx/portals.c @@ -3,6 +3,7 @@ * Copyright 2008-2011 Freescale Semiconductor, Inc. */ +#include #include #include diff --git a/arch/powerpc/cpu/mpc85xx/qe_io.c b/arch/powerpc/cpu/mpc85xx/qe_io.c index c3f7493efc7..3cf41ca76d5 100644 --- a/arch/powerpc/cpu/mpc85xx/qe_io.c +++ b/arch/powerpc/cpu/mpc85xx/qe_io.c @@ -6,7 +6,7 @@ * based on source code of Shlomi Gridish */ -#include +#include #include #include #include diff --git a/arch/powerpc/cpu/mpc85xx/speed.c b/arch/powerpc/cpu/mpc85xx/speed.c index a7e1b3c98a9..9af40310b46 100644 --- a/arch/powerpc/cpu/mpc85xx/speed.c +++ b/arch/powerpc/cpu/mpc85xx/speed.c @@ -9,6 +9,7 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ +#include #include #include #include diff --git a/arch/powerpc/cpu/mpc85xx/spl_minimal.c b/arch/powerpc/cpu/mpc85xx/spl_minimal.c index 29318fad5f0..ce2b9c21667 100644 --- a/arch/powerpc/cpu/mpc85xx/spl_minimal.c +++ b/arch/powerpc/cpu/mpc85xx/spl_minimal.c @@ -3,6 +3,7 @@ * Copyright 2009 Freescale Semiconductor, Inc. */ +#include #include #include #include diff --git a/arch/powerpc/cpu/mpc85xx/t1024_ids.c b/arch/powerpc/cpu/mpc85xx/t1024_ids.c index 7239d28f936..bab076b2b18 100644 --- a/arch/powerpc/cpu/mpc85xx/t1024_ids.c +++ b/arch/powerpc/cpu/mpc85xx/t1024_ids.c @@ -3,8 +3,7 @@ * Copyright 2014 Freescale Semiconductor, Inc. */ -#include -#include +#include #include #include diff --git a/arch/powerpc/cpu/mpc85xx/t1024_serdes.c b/arch/powerpc/cpu/mpc85xx/t1024_serdes.c index 0d958fe131b..16458e73be1 100644 --- a/arch/powerpc/cpu/mpc85xx/t1024_serdes.c +++ b/arch/powerpc/cpu/mpc85xx/t1024_serdes.c @@ -3,6 +3,7 @@ * Copyright 2014 Freescale Semiconductor, Inc. */ +#include #include #include #include diff --git a/arch/powerpc/cpu/mpc85xx/t1040_ids.c b/arch/powerpc/cpu/mpc85xx/t1040_ids.c index bb92fc392cc..59f4f9c6692 100644 --- a/arch/powerpc/cpu/mpc85xx/t1040_ids.c +++ b/arch/powerpc/cpu/mpc85xx/t1040_ids.c @@ -3,8 +3,7 @@ * Copyright 2012 Freescale Semiconductor, Inc. */ -#include -#include +#include #include #include diff --git a/arch/powerpc/cpu/mpc85xx/t1040_serdes.c b/arch/powerpc/cpu/mpc85xx/t1040_serdes.c index 2033ebbaa5e..3a7fdef79c2 100644 --- a/arch/powerpc/cpu/mpc85xx/t1040_serdes.c +++ b/arch/powerpc/cpu/mpc85xx/t1040_serdes.c @@ -3,11 +3,10 @@ * Copyright 2012 Freescale Semiconductor, Inc. */ -#include +#include #include #include #include -#include static u8 serdes_cfg_tbl[][SRDS_MAX_LANES] = { diff --git a/arch/powerpc/cpu/mpc85xx/t2080_ids.c b/arch/powerpc/cpu/mpc85xx/t2080_ids.c index 26a2d745a86..390bb115375 100644 --- a/arch/powerpc/cpu/mpc85xx/t2080_ids.c +++ b/arch/powerpc/cpu/mpc85xx/t2080_ids.c @@ -3,8 +3,7 @@ * Copyright 2013 Freescale Semiconductor, Inc. */ -#include -#include +#include #include #include diff --git a/arch/powerpc/cpu/mpc85xx/t2080_serdes.c b/arch/powerpc/cpu/mpc85xx/t2080_serdes.c index 6702acaf772..5f34aab4531 100644 --- a/arch/powerpc/cpu/mpc85xx/t2080_serdes.c +++ b/arch/powerpc/cpu/mpc85xx/t2080_serdes.c @@ -5,10 +5,9 @@ * Shengzhou Liu */ -#include +#include #include #include -#include #include "fsl_corenet2_serdes.h" struct serdes_config { diff --git a/arch/powerpc/cpu/mpc85xx/t4240_ids.c b/arch/powerpc/cpu/mpc85xx/t4240_ids.c index c319bf5cff5..37ea7788ccf 100644 --- a/arch/powerpc/cpu/mpc85xx/t4240_ids.c +++ b/arch/powerpc/cpu/mpc85xx/t4240_ids.c @@ -3,8 +3,7 @@ * Copyright 2012 Freescale Semiconductor, Inc. */ -#include -#include +#include #include #include diff --git a/arch/powerpc/cpu/mpc85xx/t4240_serdes.c b/arch/powerpc/cpu/mpc85xx/t4240_serdes.c index 36fe34f11ec..61402e84ef6 100644 --- a/arch/powerpc/cpu/mpc85xx/t4240_serdes.c +++ b/arch/powerpc/cpu/mpc85xx/t4240_serdes.c @@ -3,6 +3,7 @@ * Copyright 2012 Freescale Semiconductor, Inc. */ +#include #include #include #include diff --git a/arch/powerpc/cpu/mpc85xx/tlb.c b/arch/powerpc/cpu/mpc85xx/tlb.c index e0b36f869a9..2a78f0fe502 100644 --- a/arch/powerpc/cpu/mpc85xx/tlb.c +++ b/arch/powerpc/cpu/mpc85xx/tlb.c @@ -6,7 +6,7 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ -#include +#include #include #include #include diff --git a/arch/powerpc/cpu/mpc85xx/traps.c b/arch/powerpc/cpu/mpc85xx/traps.c index db70f07500c..8f451b48624 100644 --- a/arch/powerpc/cpu/mpc85xx/traps.c +++ b/arch/powerpc/cpu/mpc85xx/traps.c @@ -19,7 +19,7 @@ * This file handles the architecture-dependent parts of hardware exceptions */ -#include +#include #include #include #include diff --git a/arch/powerpc/cpu/mpc8xxx/cpu.c b/arch/powerpc/cpu/mpc8xxx/cpu.c index 82f28749eb1..73d28f2a4e2 100644 --- a/arch/powerpc/cpu/mpc8xxx/cpu.c +++ b/arch/powerpc/cpu/mpc8xxx/cpu.c @@ -8,6 +8,7 @@ */ #include +#include #include #include #include diff --git a/arch/powerpc/cpu/mpc8xxx/fdt.c b/arch/powerpc/cpu/mpc8xxx/fdt.c index f1c1cbc1c3c..30042902487 100644 --- a/arch/powerpc/cpu/mpc8xxx/fdt.c +++ b/arch/powerpc/cpu/mpc8xxx/fdt.c @@ -8,6 +8,7 @@ * cpu specific common code for 85xx/86xx processors. */ +#include #include #include #include diff --git a/arch/powerpc/cpu/mpc8xxx/fsl_lbc.c b/arch/powerpc/cpu/mpc8xxx/fsl_lbc.c index 843dd191ccf..29489b46e6c 100644 --- a/arch/powerpc/cpu/mpc8xxx/fsl_lbc.c +++ b/arch/powerpc/cpu/mpc8xxx/fsl_lbc.c @@ -3,6 +3,7 @@ * Copyright 2010-2011 Freescale Semiconductor, Inc. */ +#include #include #include #include diff --git a/arch/powerpc/cpu/mpc8xxx/fsl_pamu.c b/arch/powerpc/cpu/mpc8xxx/fsl_pamu.c index 29399bcd8b6..8e1f6c964d3 100644 --- a/arch/powerpc/cpu/mpc8xxx/fsl_pamu.c +++ b/arch/powerpc/cpu/mpc8xxx/fsl_pamu.c @@ -5,14 +5,12 @@ * Copyright 2012-2016 Freescale Semiconductor, Inc. */ -#include +#include #include #include #include #include #include -#include -#include struct paace *ppaact; struct paace *sec; diff --git a/arch/powerpc/cpu/mpc8xxx/law.c b/arch/powerpc/cpu/mpc8xxx/law.c index f16bc199663..35409dc8824 100644 --- a/arch/powerpc/cpu/mpc8xxx/law.c +++ b/arch/powerpc/cpu/mpc8xxx/law.c @@ -6,6 +6,7 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ +#include #include #include #include diff --git a/arch/powerpc/cpu/mpc8xxx/pamu_table.c b/arch/powerpc/cpu/mpc8xxx/pamu_table.c index 831a11736cc..b906279226a 100644 --- a/arch/powerpc/cpu/mpc8xxx/pamu_table.c +++ b/arch/powerpc/cpu/mpc8xxx/pamu_table.c @@ -3,6 +3,7 @@ * Copyright 2012-2016 Freescale Semiconductor, Inc. */ +#include #include #include #include diff --git a/arch/powerpc/cpu/mpc8xxx/srio.c b/arch/powerpc/cpu/mpc8xxx/srio.c index 0c7288c7574..c0b4a1217d3 100644 --- a/arch/powerpc/cpu/mpc8xxx/srio.c +++ b/arch/powerpc/cpu/mpc8xxx/srio.c @@ -3,13 +3,13 @@ * Copyright 2011 Freescale Semiconductor, Inc. */ +#include #include #include #include #include #include #include -#include #include #include diff --git a/arch/powerpc/include/asm/cache.h b/arch/powerpc/include/asm/cache.h index 21dfce4c8c7..b94faa5408e 100644 --- a/arch/powerpc/include/asm/cache.h +++ b/arch/powerpc/include/asm/cache.h @@ -39,8 +39,6 @@ #endif #if defined(__KERNEL__) && !defined(__ASSEMBLY__) -#include - extern void flush_dcache_range(unsigned long start, unsigned long stop); extern void clean_dcache_range(unsigned long start, unsigned long stop); extern void invalidate_dcache_range(unsigned long start, unsigned long stop); diff --git a/arch/powerpc/include/asm/fsl_dma.h b/arch/powerpc/include/asm/fsl_dma.h index e69e7dbefe8..1459db74bee 100644 --- a/arch/powerpc/include/asm/fsl_dma.h +++ b/arch/powerpc/include/asm/fsl_dma.h @@ -8,7 +8,7 @@ #ifndef _ASM_FSL_DMA_H_ #define _ASM_FSL_DMA_H_ -#include +#include #ifdef CONFIG_MPC83xx typedef struct fsl_dma { diff --git a/arch/powerpc/include/asm/fsl_liodn.h b/arch/powerpc/include/asm/fsl_liodn.h index 4ce869b5c18..0af3d8902ac 100644 --- a/arch/powerpc/include/asm/fsl_liodn.h +++ b/arch/powerpc/include/asm/fsl_liodn.h @@ -6,9 +6,7 @@ #ifndef _FSL_LIODN_H_ #define _FSL_LIODN_H_ -#include -#include -#include +#include #include struct srio_liodn_id_table { diff --git a/arch/powerpc/include/asm/fsl_portals.h b/arch/powerpc/include/asm/fsl_portals.h index 021eec72382..54ef4fb6295 100644 --- a/arch/powerpc/include/asm/fsl_portals.h +++ b/arch/powerpc/include/asm/fsl_portals.h @@ -6,8 +6,6 @@ #ifndef _FSL_PORTALS_H_ #define _FSL_PORTALS_H_ -#include - /* entries must be in order and contiguous */ enum fsl_dpaa_dev { FSL_HW_PORTAL_SEC, diff --git a/arch/powerpc/include/asm/fsl_serdes.h b/arch/powerpc/include/asm/fsl_serdes.h index fdf76115233..ddde4f80c63 100644 --- a/arch/powerpc/include/asm/fsl_serdes.h +++ b/arch/powerpc/include/asm/fsl_serdes.h @@ -7,7 +7,6 @@ #define __FSL_SERDES_H #include -#include enum srds_prtcl { /* diff --git a/arch/powerpc/include/asm/global_data.h b/arch/powerpc/include/asm/global_data.h index a9efbbdd3d4..f7860122a00 100644 --- a/arch/powerpc/include/asm/global_data.h +++ b/arch/powerpc/include/asm/global_data.h @@ -93,6 +93,4 @@ struct arch_global_data { #define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm ("r2") -#include - #endif /* __ASM_GBL_DATA_H */ diff --git a/arch/powerpc/include/asm/immap_8xx.h b/arch/powerpc/include/asm/immap_8xx.h index e11300cab20..cf1300f6e29 100644 --- a/arch/powerpc/include/asm/immap_8xx.h +++ b/arch/powerpc/include/asm/immap_8xx.h @@ -12,8 +12,6 @@ #ifndef __IMMAP_8XX__ #define __IMMAP_8XX__ -#include - /* System configuration registers. */ typedef struct sys_conf { diff --git a/arch/powerpc/lib/bdinfo.c b/arch/powerpc/lib/bdinfo.c index 6491c210f4e..55dcad5df8e 100644 --- a/arch/powerpc/lib/bdinfo.c +++ b/arch/powerpc/lib/bdinfo.c @@ -6,6 +6,7 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ +#include #include #include diff --git a/arch/powerpc/lib/bootm.c b/arch/powerpc/lib/bootm.c index f55b5ff8320..75c6bfd2bf8 100644 --- a/arch/powerpc/lib/bootm.c +++ b/arch/powerpc/lib/bootm.c @@ -7,7 +7,7 @@ */ -#include +#include #include #include #include diff --git a/arch/powerpc/lib/cache.c b/arch/powerpc/lib/cache.c index e480b269649..c4c5c2d4513 100644 --- a/arch/powerpc/lib/cache.c +++ b/arch/powerpc/lib/cache.c @@ -4,6 +4,7 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ +#include #include #include #include diff --git a/arch/powerpc/lib/extable.c b/arch/powerpc/lib/extable.c index fd45e8a790d..7e9d4f22f39 100644 --- a/arch/powerpc/lib/extable.c +++ b/arch/powerpc/lib/extable.c @@ -5,6 +5,7 @@ * (C) Copyright 2000 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ +#include #include /* diff --git a/arch/powerpc/lib/interrupts.c b/arch/powerpc/lib/interrupts.c index 92b8a0bceac..df312dfa28e 100644 --- a/arch/powerpc/lib/interrupts.c +++ b/arch/powerpc/lib/interrupts.c @@ -7,7 +7,7 @@ * Gleb Natapov */ -#include +#include #include #include #include diff --git a/arch/powerpc/lib/kgdb.c b/arch/powerpc/lib/kgdb.c index 20fcb7eef0e..8727d18884c 100644 --- a/arch/powerpc/lib/kgdb.c +++ b/arch/powerpc/lib/kgdb.c @@ -1,3 +1,4 @@ +#include #include #include #include diff --git a/arch/powerpc/lib/spl.c b/arch/powerpc/lib/spl.c index 3a24cbfff3b..b638ea7be61 100644 --- a/arch/powerpc/lib/spl.c +++ b/arch/powerpc/lib/spl.c @@ -2,6 +2,7 @@ /* * Copyright 2012 Stefan Roese */ +#include #include #include #include diff --git a/arch/powerpc/lib/stack.c b/arch/powerpc/lib/stack.c index afd869e4ac3..2e731aa8701 100644 --- a/arch/powerpc/lib/stack.c +++ b/arch/powerpc/lib/stack.c @@ -10,6 +10,7 @@ * Sysgo Real-Time Solutions, GmbH * Marius Groeger */ +#include #include #include #include diff --git a/arch/powerpc/lib/time.c b/arch/powerpc/lib/time.c index 0a0e75e726b..8d6babfb83d 100644 --- a/arch/powerpc/lib/time.c +++ b/arch/powerpc/lib/time.c @@ -4,6 +4,7 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ +#include #include #include #include diff --git a/arch/riscv/lib/boot.c b/arch/riscv/lib/boot.c index 161335abee1..03014c56dce 100644 --- a/arch/riscv/lib/boot.c +++ b/arch/riscv/lib/boot.c @@ -4,8 +4,7 @@ * Rick Chen, Andes Technology Corporation */ -#include -#include +#include unsigned long do_go_exec(ulong (*entry)(int, char * const []), int argc, char *const argv[]) diff --git a/arch/sandbox/include/asm/global_data.h b/arch/sandbox/include/asm/global_data.h index 309422f75e3..001b2b53c1c 100644 --- a/arch/sandbox/include/asm/global_data.h +++ b/arch/sandbox/include/asm/global_data.h @@ -10,7 +10,6 @@ #define __ASM_GBL_DATA_H #include -#include /* Architecture-specific global data */ struct arch_global_data { diff --git a/arch/sh/cpu/sh4/cache.c b/arch/sh/cpu/sh4/cache.c index 8c1839935ca..0f7dfdd3cf7 100644 --- a/arch/sh/cpu/sh4/cache.c +++ b/arch/sh/cpu/sh4/cache.c @@ -4,6 +4,7 @@ * (C) Copyright 2007 Nobuhiro Iwamatsu */ +#include #include #include #include diff --git a/arch/sh/cpu/sh4/cpu.c b/arch/sh/cpu/sh4/cpu.c index b0ad685a91b..1b2f50dbe6e 100644 --- a/arch/sh/cpu/sh4/cpu.c +++ b/arch/sh/cpu/sh4/cpu.c @@ -4,6 +4,7 @@ * Nobuhiro Iwamatsu */ +#include #include #include #include diff --git a/arch/sh/cpu/sh4/interrupts.c b/arch/sh/cpu/sh4/interrupts.c index eace09aeabf..278a3e32ac9 100644 --- a/arch/sh/cpu/sh4/interrupts.c +++ b/arch/sh/cpu/sh4/interrupts.c @@ -4,6 +4,7 @@ * Nobuhiro Iwamatsu */ +#include #include int interrupt_init(void) diff --git a/arch/sh/cpu/sh4/watchdog.c b/arch/sh/cpu/sh4/watchdog.c index c5974337465..bf403d3c520 100644 --- a/arch/sh/cpu/sh4/watchdog.c +++ b/arch/sh/cpu/sh4/watchdog.c @@ -1,5 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ +#include #include #include #include diff --git a/arch/sh/include/asm/global_data.h b/arch/sh/include/asm/global_data.h index 933c302d68c..bd946ffd8fd 100644 --- a/arch/sh/include/asm/global_data.h +++ b/arch/sh/include/asm/global_data.h @@ -10,8 +10,6 @@ #ifndef __ASM_SH_GLOBALDATA_H_ #define __ASM_SH_GLOBALDATA_H_ -#include - /* Architecture-specific global data */ struct arch_global_data { }; diff --git a/arch/sh/lib/board.c b/arch/sh/lib/board.c index 53b1c147c2e..b31fa6d7031 100644 --- a/arch/sh/lib/board.c +++ b/arch/sh/lib/board.c @@ -3,7 +3,7 @@ * Copyright (C) 2016 Vladimir Zapolskiy */ -#include +#include #include #include diff --git a/arch/sh/lib/bootm.c b/arch/sh/lib/bootm.c index e298d766b52..05d586b1b6c 100644 --- a/arch/sh/lib/bootm.c +++ b/arch/sh/lib/bootm.c @@ -7,7 +7,7 @@ * (c) Copyright 2008 Renesas Solutions Corp. */ -#include +#include #include #include #include diff --git a/arch/sh/lib/time.c b/arch/sh/lib/time.c index 5feb1983556..19c8e3ca3e7 100644 --- a/arch/sh/lib/time.c +++ b/arch/sh/lib/time.c @@ -10,6 +10,7 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ +#include #include #include #include diff --git a/arch/sh/lib/time_sh2.c b/arch/sh/lib/time_sh2.c index 0ee7dc756ba..5484c543c6c 100644 --- a/arch/sh/lib/time_sh2.c +++ b/arch/sh/lib/time_sh2.c @@ -7,6 +7,7 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ +#include #include #include #include diff --git a/arch/sh/lib/zimageboot.c b/arch/sh/lib/zimageboot.c index e731c6a7cb3..c2e285ff0f6 100644 --- a/arch/sh/lib/zimageboot.c +++ b/arch/sh/lib/zimageboot.c @@ -9,10 +9,10 @@ * Linux SuperH zImage loading and boot */ +#include #include #include #include -#include #include #include diff --git a/arch/x86/cpu/acpi_gpe.c b/arch/x86/cpu/acpi_gpe.c index 13fe695014b..da01e71335f 100644 --- a/arch/x86/cpu/acpi_gpe.c +++ b/arch/x86/cpu/acpi_gpe.c @@ -6,10 +6,10 @@ #define LOG_CATEGORY UCLASS_IRQ +#include #include #include #include -#include #include #include #include diff --git a/arch/x86/cpu/apollolake/acpi.c b/arch/x86/cpu/apollolake/acpi.c index 76230aea837..c610a7f4477 100644 --- a/arch/x86/cpu/apollolake/acpi.c +++ b/arch/x86/cpu/apollolake/acpi.c @@ -10,6 +10,7 @@ #define LOG_CATEGORY LOGC_ACPI +#include #include #include #include diff --git a/arch/x86/cpu/apollolake/cpu.c b/arch/x86/cpu/apollolake/cpu.c index f480bb1d8c3..647c9df6a72 100644 --- a/arch/x86/cpu/apollolake/cpu.c +++ b/arch/x86/cpu/apollolake/cpu.c @@ -3,6 +3,7 @@ * Copyright 2019 Google LLC */ +#include #include #include #include diff --git a/arch/x86/cpu/apollolake/cpu_common.c b/arch/x86/cpu/apollolake/cpu_common.c index 498b306cd61..9a5502617bf 100644 --- a/arch/x86/cpu/apollolake/cpu_common.c +++ b/arch/x86/cpu/apollolake/cpu_common.c @@ -3,6 +3,7 @@ * Copyright 2019 Google LLC */ +#include #include #include #include diff --git a/arch/x86/cpu/apollolake/cpu_spl.c b/arch/x86/cpu/apollolake/cpu_spl.c index 8798fa79d4c..8f48457ee22 100644 --- a/arch/x86/cpu/apollolake/cpu_spl.c +++ b/arch/x86/cpu/apollolake/cpu_spl.c @@ -5,6 +5,7 @@ * Portions taken from coreboot */ +#include #include #include #include diff --git a/arch/x86/cpu/apollolake/fsp_bindings.c b/arch/x86/cpu/apollolake/fsp_bindings.c index f6fbddce922..fb75e1f7095 100644 --- a/arch/x86/cpu/apollolake/fsp_bindings.c +++ b/arch/x86/cpu/apollolake/fsp_bindings.c @@ -3,6 +3,7 @@ * Copyright 2020 B&R Industrial Automation GmbH - http://www.br-automation.com */ +#include #include #include #include diff --git a/arch/x86/cpu/apollolake/fsp_m.c b/arch/x86/cpu/apollolake/fsp_m.c index 19065e17ae0..c6be707e4ea 100644 --- a/arch/x86/cpu/apollolake/fsp_m.c +++ b/arch/x86/cpu/apollolake/fsp_m.c @@ -4,6 +4,7 @@ * Written by Simon Glass */ +#include #include #include #include diff --git a/arch/x86/cpu/apollolake/fsp_s.c b/arch/x86/cpu/apollolake/fsp_s.c index 5fca19f90d3..a9b13c0c704 100644 --- a/arch/x86/cpu/apollolake/fsp_s.c +++ b/arch/x86/cpu/apollolake/fsp_s.c @@ -4,6 +4,7 @@ * Written by Simon Glass */ +#include #include #include #include diff --git a/arch/x86/cpu/apollolake/hostbridge.c b/arch/x86/cpu/apollolake/hostbridge.c index 9ee362239ef..2405dec8525 100644 --- a/arch/x86/cpu/apollolake/hostbridge.c +++ b/arch/x86/cpu/apollolake/hostbridge.c @@ -11,6 +11,7 @@ #define LOG_CATEGORY UCLASS_NORTHBRIDGE +#include #include #include #include diff --git a/arch/x86/cpu/apollolake/lpc.c b/arch/x86/cpu/apollolake/lpc.c index 531ff1cd91f..4be6366f043 100644 --- a/arch/x86/cpu/apollolake/lpc.c +++ b/arch/x86/cpu/apollolake/lpc.c @@ -5,6 +5,7 @@ * From coreboot Apollo Lake support lpc.c */ +#include #include #include #include diff --git a/arch/x86/cpu/apollolake/pch.c b/arch/x86/cpu/apollolake/pch.c index 32190312ff8..a0f9b031dea 100644 --- a/arch/x86/cpu/apollolake/pch.c +++ b/arch/x86/cpu/apollolake/pch.c @@ -3,6 +3,7 @@ * Copyright 2019 Google LLC */ +#include #include #include #include diff --git a/arch/x86/cpu/apollolake/pmc.c b/arch/x86/cpu/apollolake/pmc.c index 32fd0344861..163119e2e9e 100644 --- a/arch/x86/cpu/apollolake/pmc.c +++ b/arch/x86/cpu/apollolake/pmc.c @@ -8,6 +8,7 @@ #define LOG_CATEGORY UCLASS_ACPI_PMC +#include #include #include #include diff --git a/arch/x86/cpu/apollolake/punit.c b/arch/x86/cpu/apollolake/punit.c index b1503c25140..5ed7963579e 100644 --- a/arch/x86/cpu/apollolake/punit.c +++ b/arch/x86/cpu/apollolake/punit.c @@ -3,10 +3,10 @@ * Copyright 2019 Google LLC */ +#include #include #include #include -#include #include #include #include diff --git a/arch/x86/cpu/apollolake/spl.c b/arch/x86/cpu/apollolake/spl.c index b351d73e7d8..6078d5a200e 100644 --- a/arch/x86/cpu/apollolake/spl.c +++ b/arch/x86/cpu/apollolake/spl.c @@ -5,6 +5,7 @@ #define LOG_CATEGORY LOGC_BOOT +#include #include #include #include diff --git a/arch/x86/cpu/apollolake/systemagent.c b/arch/x86/cpu/apollolake/systemagent.c index f966b9083fc..b6bc2ba14f1 100644 --- a/arch/x86/cpu/apollolake/systemagent.c +++ b/arch/x86/cpu/apollolake/systemagent.c @@ -4,6 +4,7 @@ * Take from coreboot project file of the same name */ +#include #include #include #include diff --git a/arch/x86/cpu/apollolake/uart.c b/arch/x86/cpu/apollolake/uart.c index 7e4c816dcef..a9362436000 100644 --- a/arch/x86/cpu/apollolake/uart.c +++ b/arch/x86/cpu/apollolake/uart.c @@ -7,6 +7,7 @@ * Some code from coreboot lpss.c */ +#include #include #include #include diff --git a/arch/x86/cpu/baytrail/acpi.c b/arch/x86/cpu/baytrail/acpi.c index 7821964f1fc..ccc4851b188 100644 --- a/arch/x86/cpu/baytrail/acpi.c +++ b/arch/x86/cpu/baytrail/acpi.c @@ -3,6 +3,7 @@ * Copyright (C) 2016, Bin Meng */ +#include #include #include #include diff --git a/arch/x86/cpu/baytrail/cpu.c b/arch/x86/cpu/baytrail/cpu.c index 7756a1a4a8e..c270426d820 100644 --- a/arch/x86/cpu/baytrail/cpu.c +++ b/arch/x86/cpu/baytrail/cpu.c @@ -5,6 +5,7 @@ * Based on code from coreboot */ +#include #include #include #include diff --git a/arch/x86/cpu/baytrail/early_uart.c b/arch/x86/cpu/baytrail/early_uart.c index 3736127239e..08dbd5538f7 100644 --- a/arch/x86/cpu/baytrail/early_uart.c +++ b/arch/x86/cpu/baytrail/early_uart.c @@ -3,6 +3,7 @@ * Copyright (C) 2015 Google, Inc */ +#include #include #include diff --git a/arch/x86/cpu/baytrail/fsp_configs.c b/arch/x86/cpu/baytrail/fsp_configs.c index 9eb456f90d1..fb3f946c45f 100644 --- a/arch/x86/cpu/baytrail/fsp_configs.c +++ b/arch/x86/cpu/baytrail/fsp_configs.c @@ -5,6 +5,7 @@ * Copyright (C) 2015, Kodak Alaris, Inc */ +#include #include #include #include diff --git a/arch/x86/cpu/baytrail/valleyview.c b/arch/x86/cpu/baytrail/valleyview.c index 839ff4d2bf2..f73738ce5c0 100644 --- a/arch/x86/cpu/baytrail/valleyview.c +++ b/arch/x86/cpu/baytrail/valleyview.c @@ -3,6 +3,7 @@ * Copyright (C) 2014, Bin Meng */ +#include #include #include #include @@ -10,7 +11,6 @@ #include #include #include -#include #include /* GPIO SUS */ diff --git a/arch/x86/cpu/braswell/braswell.c b/arch/x86/cpu/braswell/braswell.c index 8cf4b628d41..3345049993d 100644 --- a/arch/x86/cpu/braswell/braswell.c +++ b/arch/x86/cpu/braswell/braswell.c @@ -3,10 +3,10 @@ * Copyright (C) 2017, Bin Meng */ +#include #include #include #include -#include int arch_cpu_init(void) { diff --git a/arch/x86/cpu/braswell/early_uart.c b/arch/x86/cpu/braswell/early_uart.c index 8b28d28d136..d78c6b0feb6 100644 --- a/arch/x86/cpu/braswell/early_uart.c +++ b/arch/x86/cpu/braswell/early_uart.c @@ -3,6 +3,7 @@ * Copyright (C) 2017, Bin Meng */ +#include #include #define PCI_DEV_CONFIG(segbus, dev, fn) ( \ diff --git a/arch/x86/cpu/braswell/fsp_configs.c b/arch/x86/cpu/braswell/fsp_configs.c index aaf3e67f81c..243298fd571 100644 --- a/arch/x86/cpu/braswell/fsp_configs.c +++ b/arch/x86/cpu/braswell/fsp_configs.c @@ -3,6 +3,7 @@ * Copyright (C) 2017, Bin Meng */ +#include #include #include #include diff --git a/arch/x86/cpu/broadwell/adsp.c b/arch/x86/cpu/broadwell/adsp.c index 90b2449475e..1fa18237809 100644 --- a/arch/x86/cpu/broadwell/adsp.c +++ b/arch/x86/cpu/broadwell/adsp.c @@ -9,6 +9,7 @@ #define LOG_CATEGORY UCLASS_SYSCON +#include #include #include #include diff --git a/arch/x86/cpu/broadwell/cpu.c b/arch/x86/cpu/broadwell/cpu.c index dc6717eca40..cbd4a3b6797 100644 --- a/arch/x86/cpu/broadwell/cpu.c +++ b/arch/x86/cpu/broadwell/cpu.c @@ -5,6 +5,7 @@ * Based on code from coreboot src/soc/intel/broadwell/cpu.c */ +#include #include #include #include diff --git a/arch/x86/cpu/broadwell/cpu_from_spl.c b/arch/x86/cpu/broadwell/cpu_from_spl.c index a48be295994..df5a9675ee4 100644 --- a/arch/x86/cpu/broadwell/cpu_from_spl.c +++ b/arch/x86/cpu/broadwell/cpu_from_spl.c @@ -4,6 +4,7 @@ * Written by Simon Glass */ +#include #include #include #include @@ -12,7 +13,6 @@ #include #include #include -#include int misc_init_r(void) { diff --git a/arch/x86/cpu/broadwell/cpu_full.c b/arch/x86/cpu/broadwell/cpu_full.c index c43fb7a608b..2049dbfe24a 100644 --- a/arch/x86/cpu/broadwell/cpu_full.c +++ b/arch/x86/cpu/broadwell/cpu_full.c @@ -5,6 +5,7 @@ * Based on code from coreboot src/soc/intel/broadwell/cpu.c */ +#include #include #include #include diff --git a/arch/x86/cpu/broadwell/iobp.c b/arch/x86/cpu/broadwell/iobp.c index f8b2a60d09f..cb5595c930e 100644 --- a/arch/x86/cpu/broadwell/iobp.c +++ b/arch/x86/cpu/broadwell/iobp.c @@ -5,6 +5,7 @@ * Modified from coreboot */ +#include #include #include #include diff --git a/arch/x86/cpu/broadwell/lpc.c b/arch/x86/cpu/broadwell/lpc.c index b945693f1cf..d2638a4e7a6 100644 --- a/arch/x86/cpu/broadwell/lpc.c +++ b/arch/x86/cpu/broadwell/lpc.c @@ -5,6 +5,7 @@ * From coreboot broadwell support */ +#include #include #include #include diff --git a/arch/x86/cpu/broadwell/me.c b/arch/x86/cpu/broadwell/me.c index 3399d822e5b..ae16ce26499 100644 --- a/arch/x86/cpu/broadwell/me.c +++ b/arch/x86/cpu/broadwell/me.c @@ -5,6 +5,7 @@ * Based on code from coreboot src/soc/intel/broadwell/me_status.c */ +#include #include #include #include diff --git a/arch/x86/cpu/broadwell/northbridge.c b/arch/x86/cpu/broadwell/northbridge.c index d67ab03627d..141babc51c3 100644 --- a/arch/x86/cpu/broadwell/northbridge.c +++ b/arch/x86/cpu/broadwell/northbridge.c @@ -3,6 +3,7 @@ * Copyright (C) 2011 The Chromium Authors */ +#include #include #include #include diff --git a/arch/x86/cpu/broadwell/pch.c b/arch/x86/cpu/broadwell/pch.c index 2c8b7380d96..37fcddbb9b0 100644 --- a/arch/x86/cpu/broadwell/pch.c +++ b/arch/x86/cpu/broadwell/pch.c @@ -3,6 +3,7 @@ * Copyright (c) 2016 Google, Inc */ +#include #include #include #include diff --git a/arch/x86/cpu/broadwell/pinctrl_broadwell.c b/arch/x86/cpu/broadwell/pinctrl_broadwell.c index b6313c3466a..85bd37101ba 100644 --- a/arch/x86/cpu/broadwell/pinctrl_broadwell.c +++ b/arch/x86/cpu/broadwell/pinctrl_broadwell.c @@ -3,6 +3,7 @@ * Copyright (C) 2016 Google, Inc */ +#include #include #include #include diff --git a/arch/x86/cpu/broadwell/power_state.c b/arch/x86/cpu/broadwell/power_state.c index e1d60915f55..62fd2e8d2c0 100644 --- a/arch/x86/cpu/broadwell/power_state.c +++ b/arch/x86/cpu/broadwell/power_state.c @@ -5,6 +5,7 @@ * Copyright (C) 2016 Google, Inc. */ +#include #include #include #include diff --git a/arch/x86/cpu/broadwell/refcode.c b/arch/x86/cpu/broadwell/refcode.c index 653d31dd67c..df2df7972e9 100644 --- a/arch/x86/cpu/broadwell/refcode.c +++ b/arch/x86/cpu/broadwell/refcode.c @@ -6,7 +6,7 @@ * Copyright (c) 2016 Google, Inc */ -#include +#include #include #include #include diff --git a/arch/x86/cpu/broadwell/sata.c b/arch/x86/cpu/broadwell/sata.c index 0f67ba9666f..be3c9e764ef 100644 --- a/arch/x86/cpu/broadwell/sata.c +++ b/arch/x86/cpu/broadwell/sata.c @@ -5,6 +5,7 @@ * From coreboot src/soc/intel/broadwell/sata.c */ +#include #include #include #include diff --git a/arch/x86/cpu/broadwell/sdram.c b/arch/x86/cpu/broadwell/sdram.c index cd534a17cf1..d30ebee021e 100644 --- a/arch/x86/cpu/broadwell/sdram.c +++ b/arch/x86/cpu/broadwell/sdram.c @@ -7,6 +7,7 @@ #define LOG_CATEGORY UCLASS_RAM +#include #include #include #include diff --git a/arch/x86/cpu/coreboot/coreboot.c b/arch/x86/cpu/coreboot/coreboot.c index d474c79e25e..82fe4c71cd2 100644 --- a/arch/x86/cpu/coreboot/coreboot.c +++ b/arch/x86/cpu/coreboot/coreboot.c @@ -5,6 +5,7 @@ * Graeme Russ, graeme.russ@gmail.com. */ +#include #include #include #include diff --git a/arch/x86/cpu/coreboot/coreboot_spl.c b/arch/x86/cpu/coreboot/coreboot_spl.c index 566c65a96ae..36661871e92 100644 --- a/arch/x86/cpu/coreboot/coreboot_spl.c +++ b/arch/x86/cpu/coreboot/coreboot_spl.c @@ -3,6 +3,7 @@ * Copyright 2020 Google LLC */ +#include #include int dram_init(void) diff --git a/arch/x86/cpu/coreboot/sdram.c b/arch/x86/cpu/coreboot/sdram.c index 013225f129a..26352df421f 100644 --- a/arch/x86/cpu/coreboot/sdram.c +++ b/arch/x86/cpu/coreboot/sdram.c @@ -5,6 +5,7 @@ * Graeme Russ, */ +#include #include #include #include diff --git a/arch/x86/cpu/coreboot/timestamp.c b/arch/x86/cpu/coreboot/timestamp.c index ec4003c4e77..3ad611a530c 100644 --- a/arch/x86/cpu/coreboot/timestamp.c +++ b/arch/x86/cpu/coreboot/timestamp.c @@ -5,10 +5,10 @@ * Modified from the coreboot version */ +#include #include #include #include -#include #include static struct timestamp_table *ts_table __section(".data"); diff --git a/arch/x86/cpu/cpu.c b/arch/x86/cpu/cpu.c index c8433360f28..ce55efc454b 100644 --- a/arch/x86/cpu/cpu.c +++ b/arch/x86/cpu/cpu.c @@ -20,6 +20,7 @@ #define LOG_CATEGORY UCLASS_CPU +#include #include #include #include diff --git a/arch/x86/cpu/cpu_x86.c b/arch/x86/cpu/cpu_x86.c index 6c53f0ea821..59da41f3833 100644 --- a/arch/x86/cpu/cpu_x86.c +++ b/arch/x86/cpu/cpu_x86.c @@ -3,6 +3,7 @@ * Copyright (C) 2015, Bin Meng */ +#include #include #include #include diff --git a/arch/x86/cpu/efi/app.c b/arch/x86/cpu/efi/app.c index 218a68c4642..f754489784a 100644 --- a/arch/x86/cpu/efi/app.c +++ b/arch/x86/cpu/efi/app.c @@ -3,11 +3,11 @@ * Copyright (c) 2015 Google, Inc */ +#include #include #include #include #include -#include int arch_cpu_init(void) { diff --git a/arch/x86/cpu/efi/payload.c b/arch/x86/cpu/efi/payload.c index 642a87a37d8..708bfbe7ee4 100644 --- a/arch/x86/cpu/efi/payload.c +++ b/arch/x86/cpu/efi/payload.c @@ -4,6 +4,7 @@ * Written by Simon Glass */ +#include #include #include #include @@ -16,7 +17,6 @@ #include #include #include -#include DECLARE_GLOBAL_DATA_PTR; diff --git a/arch/x86/cpu/efi/sdram.c b/arch/x86/cpu/efi/sdram.c index 6fe40071140..56f3326146c 100644 --- a/arch/x86/cpu/efi/sdram.c +++ b/arch/x86/cpu/efi/sdram.c @@ -3,6 +3,7 @@ * Copyright (c) 2015 Google, Inc */ +#include #include #include #include diff --git a/arch/x86/cpu/i386/cpu.c b/arch/x86/cpu/i386/cpu.c index db2727d7485..8882532ebf3 100644 --- a/arch/x86/cpu/i386/cpu.c +++ b/arch/x86/cpu/i386/cpu.c @@ -18,6 +18,7 @@ * src/arch/x86/lib/cpu.c */ +#include #include #include #include @@ -31,7 +32,6 @@ #include #include #include -#include DECLARE_GLOBAL_DATA_PTR; diff --git a/arch/x86/cpu/i386/interrupt.c b/arch/x86/cpu/i386/interrupt.c index b3f4214acdb..f3f3527237f 100644 --- a/arch/x86/cpu/i386/interrupt.c +++ b/arch/x86/cpu/i386/interrupt.c @@ -10,6 +10,7 @@ * Copyright (C) 1991, 1992 Linus Torvalds */ +#include #include #include #include diff --git a/arch/x86/cpu/intel_common/acpi.c b/arch/x86/cpu/intel_common/acpi.c index 29676b4abfa..d94ec208f65 100644 --- a/arch/x86/cpu/intel_common/acpi.c +++ b/arch/x86/cpu/intel_common/acpi.c @@ -8,6 +8,7 @@ * Modified from coreboot src/soc/intel/common/block/acpi.c */ +#include #include #include #include diff --git a/arch/x86/cpu/intel_common/car.S b/arch/x86/cpu/intel_common/car.S index 46d9ede09cb..00308dbdef9 100644 --- a/arch/x86/cpu/intel_common/car.S +++ b/arch/x86/cpu/intel_common/car.S @@ -10,6 +10,7 @@ * Copyright (C) 2012 Kyösti Mälkki */ +#include #include #include #include diff --git a/arch/x86/cpu/intel_common/cpu.c b/arch/x86/cpu/intel_common/cpu.c index e7f41913042..8f489e6c651 100644 --- a/arch/x86/cpu/intel_common/cpu.c +++ b/arch/x86/cpu/intel_common/cpu.c @@ -7,6 +7,7 @@ * Some code taken from coreboot cpulib.c */ +#include #include #include #include diff --git a/arch/x86/cpu/intel_common/cpu_from_spl.c b/arch/x86/cpu/intel_common/cpu_from_spl.c index 48b2ef253cb..1c0dcedb582 100644 --- a/arch/x86/cpu/intel_common/cpu_from_spl.c +++ b/arch/x86/cpu/intel_common/cpu_from_spl.c @@ -3,6 +3,7 @@ * Copyright (c) 2016 Google, Inc */ +#include #include #include #include diff --git a/arch/x86/cpu/intel_common/fast_spi.c b/arch/x86/cpu/intel_common/fast_spi.c index e1d536be212..5d3944dee2c 100644 --- a/arch/x86/cpu/intel_common/fast_spi.c +++ b/arch/x86/cpu/intel_common/fast_spi.c @@ -3,6 +3,7 @@ * Copyright 2019 Google LLC */ +#include #include #include #include diff --git a/arch/x86/cpu/intel_common/generic_wifi.c b/arch/x86/cpu/intel_common/generic_wifi.c index 75fa4e01d8a..61ec5391b09 100644 --- a/arch/x86/cpu/intel_common/generic_wifi.c +++ b/arch/x86/cpu/intel_common/generic_wifi.c @@ -6,6 +6,7 @@ * Modified from coreboot src/drivers/wifi/generic.c */ +#include #include #include #include diff --git a/arch/x86/cpu/intel_common/intel_opregion.c b/arch/x86/cpu/intel_common/intel_opregion.c index 78caff0dc12..1eed21d8cdf 100644 --- a/arch/x86/cpu/intel_common/intel_opregion.c +++ b/arch/x86/cpu/intel_common/intel_opregion.c @@ -6,6 +6,7 @@ * Modified from coreboot src/soc/intel/gma/opregion.c */ +#include #include #include #include diff --git a/arch/x86/cpu/intel_common/itss.c b/arch/x86/cpu/intel_common/itss.c index 6d3184f969f..ec73b3d8931 100644 --- a/arch/x86/cpu/intel_common/itss.c +++ b/arch/x86/cpu/intel_common/itss.c @@ -9,6 +9,7 @@ * Taken from coreboot itss.c */ +#include #include #include #include diff --git a/arch/x86/cpu/intel_common/lpc.c b/arch/x86/cpu/intel_common/lpc.c index f2bdf8c1e87..af68c0f079c 100644 --- a/arch/x86/cpu/intel_common/lpc.c +++ b/arch/x86/cpu/intel_common/lpc.c @@ -3,6 +3,7 @@ * Copyright (c) 2016 Google, Inc */ +#include #include #include #include diff --git a/arch/x86/cpu/intel_common/lpss.c b/arch/x86/cpu/intel_common/lpss.c index 44cd3f0ca5f..26a2d2d1e36 100644 --- a/arch/x86/cpu/intel_common/lpss.c +++ b/arch/x86/cpu/intel_common/lpss.c @@ -7,6 +7,7 @@ * Some code from coreboot lpss.c */ +#include #include #include #include diff --git a/arch/x86/cpu/intel_common/me_status.c b/arch/x86/cpu/intel_common/me_status.c index a09bd5029eb..abc5f6fbc77 100644 --- a/arch/x86/cpu/intel_common/me_status.c +++ b/arch/x86/cpu/intel_common/me_status.c @@ -5,6 +5,7 @@ * Copyright (C) 2011 The Chromium OS Authors. All rights reserved. */ +#include #include #include diff --git a/arch/x86/cpu/intel_common/microcode.c b/arch/x86/cpu/intel_common/microcode.c index 6cad2727075..4d8e1d21083 100644 --- a/arch/x86/cpu/intel_common/microcode.c +++ b/arch/x86/cpu/intel_common/microcode.c @@ -6,6 +6,7 @@ * Microcode update for Intel PIII and later CPUs */ +#include #include #include #include diff --git a/arch/x86/cpu/intel_common/mrc.c b/arch/x86/cpu/intel_common/mrc.c index c834c05d130..ff959d1bd8d 100644 --- a/arch/x86/cpu/intel_common/mrc.c +++ b/arch/x86/cpu/intel_common/mrc.c @@ -5,17 +5,17 @@ #define LOG_CATEGORY UCLASS_RAM -#include +#include #include #include #include #include #include -#include #include #include #include #include +#include #include #include #include diff --git a/arch/x86/cpu/intel_common/p2sb.c b/arch/x86/cpu/intel_common/p2sb.c index 7aad8f8ca56..e4e53f73c08 100644 --- a/arch/x86/cpu/intel_common/p2sb.c +++ b/arch/x86/cpu/intel_common/p2sb.c @@ -7,6 +7,7 @@ #define LOG_CATEGORY UCLASS_P2SB +#include #include #include #include diff --git a/arch/x86/cpu/intel_common/pch.c b/arch/x86/cpu/intel_common/pch.c index c4cc478b306..af82b64a13c 100644 --- a/arch/x86/cpu/intel_common/pch.c +++ b/arch/x86/cpu/intel_common/pch.c @@ -3,6 +3,7 @@ * Copyright (c) 2016 Google, Inc */ +#include #include #include diff --git a/arch/x86/cpu/intel_common/report_platform.c b/arch/x86/cpu/intel_common/report_platform.c index a7524435ba0..a3612817c45 100644 --- a/arch/x86/cpu/intel_common/report_platform.c +++ b/arch/x86/cpu/intel_common/report_platform.c @@ -5,12 +5,12 @@ * Copyright (C) 2012 Google Inc. */ +#include #include #include #include #include #include -#include static void report_cpu_info(void) { diff --git a/arch/x86/cpu/ioapic.c b/arch/x86/cpu/ioapic.c index fa912bac57d..4f99de6ece2 100644 --- a/arch/x86/cpu/ioapic.c +++ b/arch/x86/cpu/ioapic.c @@ -3,6 +3,7 @@ * Copyright (C) 2015, Bin Meng */ +#include #include #include #include diff --git a/arch/x86/cpu/irq.c b/arch/x86/cpu/irq.c index d4dd1816092..766b2451a2c 100644 --- a/arch/x86/cpu/irq.c +++ b/arch/x86/cpu/irq.c @@ -3,6 +3,7 @@ * Copyright (C) 2015, Bin Meng */ +#include #include #include #include diff --git a/arch/x86/cpu/ivybridge/bd82x6x.c b/arch/x86/cpu/ivybridge/bd82x6x.c index 8ae4798f125..417290f559e 100644 --- a/arch/x86/cpu/ivybridge/bd82x6x.c +++ b/arch/x86/cpu/ivybridge/bd82x6x.c @@ -2,6 +2,7 @@ /* * Copyright (C) 2014 Google, Inc */ +#include #include #include #include diff --git a/arch/x86/cpu/ivybridge/cpu.c b/arch/x86/cpu/ivybridge/cpu.c index d71ab0a6385..e71a10bfd44 100644 --- a/arch/x86/cpu/ivybridge/cpu.c +++ b/arch/x86/cpu/ivybridge/cpu.c @@ -10,6 +10,7 @@ * Copyright (C) 2011 Google Inc. */ +#include #include #include #include diff --git a/arch/x86/cpu/ivybridge/early_me.c b/arch/x86/cpu/ivybridge/early_me.c index ac868025f8e..bee1671baf8 100644 --- a/arch/x86/cpu/ivybridge/early_me.c +++ b/arch/x86/cpu/ivybridge/early_me.c @@ -5,6 +5,7 @@ * Copyright (C) 2011 The Chromium OS Authors. All rights reserved. */ +#include #include #include #include diff --git a/arch/x86/cpu/ivybridge/fsp_configs.c b/arch/x86/cpu/ivybridge/fsp_configs.c index 19b6ef283bc..3c4ea6c267f 100644 --- a/arch/x86/cpu/ivybridge/fsp_configs.c +++ b/arch/x86/cpu/ivybridge/fsp_configs.c @@ -3,6 +3,7 @@ * Copyright (C) 2016, Bin Meng */ +#include #include #include #include diff --git a/arch/x86/cpu/ivybridge/ivybridge.c b/arch/x86/cpu/ivybridge/ivybridge.c index 81b54bb8dda..eb3f362e4e9 100644 --- a/arch/x86/cpu/ivybridge/ivybridge.c +++ b/arch/x86/cpu/ivybridge/ivybridge.c @@ -3,10 +3,10 @@ * Copyright (C) 2016, Bin Meng */ +#include #include #include #include -#include int arch_cpu_init(void) { diff --git a/arch/x86/cpu/ivybridge/lpc.c b/arch/x86/cpu/ivybridge/lpc.c index 17a47edadbb..f931d2be1b5 100644 --- a/arch/x86/cpu/ivybridge/lpc.c +++ b/arch/x86/cpu/ivybridge/lpc.c @@ -5,6 +5,7 @@ * Copyright (C) 2008-2009 coresystems GmbH */ +#include #include #include #include diff --git a/arch/x86/cpu/ivybridge/model_206ax.c b/arch/x86/cpu/ivybridge/model_206ax.c index b72de96a277..3906a69796f 100644 --- a/arch/x86/cpu/ivybridge/model_206ax.c +++ b/arch/x86/cpu/ivybridge/model_206ax.c @@ -6,6 +6,7 @@ * Copyright (C) 2011 The Chromium Authors */ +#include #include #include #include diff --git a/arch/x86/cpu/ivybridge/northbridge.c b/arch/x86/cpu/ivybridge/northbridge.c index 76e52f38ad8..994f8a4ff6a 100644 --- a/arch/x86/cpu/ivybridge/northbridge.c +++ b/arch/x86/cpu/ivybridge/northbridge.c @@ -6,6 +6,7 @@ * Copyright (C) 2011 The Chromium Authors */ +#include #include #include #include diff --git a/arch/x86/cpu/ivybridge/sata.c b/arch/x86/cpu/ivybridge/sata.c index 4e2484fa956..f47ecdffae7 100644 --- a/arch/x86/cpu/ivybridge/sata.c +++ b/arch/x86/cpu/ivybridge/sata.c @@ -4,6 +4,7 @@ * Copyright (C) 2008-2009 coresystems GmbH */ +#include #include #include #include diff --git a/arch/x86/cpu/ivybridge/sdram.c b/arch/x86/cpu/ivybridge/sdram.c index bddec6c66b6..95a826da713 100644 --- a/arch/x86/cpu/ivybridge/sdram.c +++ b/arch/x86/cpu/ivybridge/sdram.c @@ -11,6 +11,7 @@ #define LOG_CATEGORY UCLASS_RAM +#include #include #include #include diff --git a/arch/x86/cpu/ivybridge/sdram_nop.c b/arch/x86/cpu/ivybridge/sdram_nop.c index d20c9a2a379..51dfe23f94d 100644 --- a/arch/x86/cpu/ivybridge/sdram_nop.c +++ b/arch/x86/cpu/ivybridge/sdram_nop.c @@ -3,6 +3,7 @@ * Copyright (c) 2016 Google, Inc */ +#include #include #include diff --git a/arch/x86/cpu/lapic.c b/arch/x86/cpu/lapic.c index 55b1b1833ee..c0691454f12 100644 --- a/arch/x86/cpu/lapic.c +++ b/arch/x86/cpu/lapic.c @@ -6,6 +6,7 @@ * Copyright (C) 2014 Google, Inc */ +#include #include #include #include diff --git a/arch/x86/cpu/mp_init.c b/arch/x86/cpu/mp_init.c index aa1f47d7227..a133a5d8116 100644 --- a/arch/x86/cpu/mp_init.c +++ b/arch/x86/cpu/mp_init.c @@ -5,13 +5,13 @@ * Based on code from the coreboot file of the same name */ +#include #include #include #include #include #include #include -#include #include #include #include diff --git a/arch/x86/cpu/mtrr.c b/arch/x86/cpu/mtrr.c index 50cba5fb88d..9c24ae984e9 100644 --- a/arch/x86/cpu/mtrr.c +++ b/arch/x86/cpu/mtrr.c @@ -16,6 +16,7 @@ * since the MTRR registers are sometimes in flux. */ +#include #include #include #include diff --git a/arch/x86/cpu/pci.c b/arch/x86/cpu/pci.c index a7ad57f6de0..8a992ed8233 100644 --- a/arch/x86/cpu/pci.c +++ b/arch/x86/cpu/pci.c @@ -8,6 +8,7 @@ * Daniel Engström, Omicron Ceti AB, */ +#include #include #include #include diff --git a/arch/x86/cpu/qemu/cpu.c b/arch/x86/cpu/qemu/cpu.c index 0708a380626..735b6560843 100644 --- a/arch/x86/cpu/qemu/cpu.c +++ b/arch/x86/cpu/qemu/cpu.c @@ -3,6 +3,7 @@ * Copyright (C) 2015, Miao Yan */ +#include #include #include #include diff --git a/arch/x86/cpu/qemu/dram.c b/arch/x86/cpu/qemu/dram.c index 62a301c0fd3..d83abf00527 100644 --- a/arch/x86/cpu/qemu/dram.c +++ b/arch/x86/cpu/qemu/dram.c @@ -3,6 +3,7 @@ * Copyright (C) 2015, Bin Meng */ +#include #include #include #include diff --git a/arch/x86/cpu/qemu/e820.c b/arch/x86/cpu/qemu/e820.c index 17a04f86479..ebfe5956442 100644 --- a/arch/x86/cpu/qemu/e820.c +++ b/arch/x86/cpu/qemu/e820.c @@ -6,6 +6,7 @@ * (C) Copyright 2019 Bin Meng */ +#include #include #include #include diff --git a/arch/x86/cpu/qemu/qemu.c b/arch/x86/cpu/qemu/qemu.c index 262584d01f0..70414556086 100644 --- a/arch/x86/cpu/qemu/qemu.c +++ b/arch/x86/cpu/qemu/qemu.c @@ -3,6 +3,7 @@ * Copyright (C) 2015, Bin Meng */ +#include #include #include #include @@ -13,7 +14,6 @@ #include #include #include -#include static bool i440fx; diff --git a/arch/x86/cpu/qfw_cpu.c b/arch/x86/cpu/qfw_cpu.c index 468df5a36e6..ee00b8fe732 100644 --- a/arch/x86/cpu/qfw_cpu.c +++ b/arch/x86/cpu/qfw_cpu.c @@ -3,6 +3,7 @@ * Copyright (C) 2015 Google, Inc */ +#include #include #include #include diff --git a/arch/x86/cpu/quark/acpi.c b/arch/x86/cpu/quark/acpi.c index 80e94600fc5..0e18ceab68d 100644 --- a/arch/x86/cpu/quark/acpi.c +++ b/arch/x86/cpu/quark/acpi.c @@ -3,13 +3,13 @@ * Copyright (C) 2016, Bin Meng */ +#include #include #include #include #include #include #include -#include static int quark_write_fadt(struct acpi_ctx *ctx, const struct acpi_writer *entry) diff --git a/arch/x86/cpu/quark/dram.c b/arch/x86/cpu/quark/dram.c index 34e576940d4..ad98f3e07ba 100644 --- a/arch/x86/cpu/quark/dram.c +++ b/arch/x86/cpu/quark/dram.c @@ -3,6 +3,7 @@ * Copyright (C) 2015, Bin Meng */ +#include #include #include #include diff --git a/arch/x86/cpu/quark/hte.c b/arch/x86/cpu/quark/hte.c index 3cca6bd4c22..df14779357d 100644 --- a/arch/x86/cpu/quark/hte.c +++ b/arch/x86/cpu/quark/hte.c @@ -7,6 +7,7 @@ * QuarkSocPkg/QuarkNorthCluster/MemoryInit/Pei */ +#include #include #include #include "mrc_util.h" diff --git a/arch/x86/cpu/quark/mrc.c b/arch/x86/cpu/quark/mrc.c index be9c36b96c4..ce3c2b8ab42 100644 --- a/arch/x86/cpu/quark/mrc.c +++ b/arch/x86/cpu/quark/mrc.c @@ -32,9 +32,9 @@ * DRAM unit configuration based on Valleyview MRC. */ +#include #include #include -#include #include "mrc_util.h" #include "smc.h" diff --git a/arch/x86/cpu/quark/mrc_util.c b/arch/x86/cpu/quark/mrc_util.c index 85408b3e335..b0bc59b71ef 100644 --- a/arch/x86/cpu/quark/mrc_util.c +++ b/arch/x86/cpu/quark/mrc_util.c @@ -7,12 +7,12 @@ * QuarkSocPkg/QuarkNorthCluster/MemoryInit/Pei */ +#include #include #include #include #include #include -#include #include "mrc_util.h" #include "hte.h" #include "smc.h" diff --git a/arch/x86/cpu/quark/msg_port.c b/arch/x86/cpu/quark/msg_port.c index 6261766cdf8..d4f8c082ffc 100644 --- a/arch/x86/cpu/quark/msg_port.c +++ b/arch/x86/cpu/quark/msg_port.c @@ -3,6 +3,7 @@ * Copyright (C) 2015, Bin Meng */ +#include #include #include #include diff --git a/arch/x86/cpu/quark/quark.c b/arch/x86/cpu/quark/quark.c index fdf92b2c0c3..62b83c228cf 100644 --- a/arch/x86/cpu/quark/quark.c +++ b/arch/x86/cpu/quark/quark.c @@ -3,6 +3,7 @@ * Copyright (C) 2015, Bin Meng */ +#include #include #include #include @@ -18,7 +19,6 @@ #include #include #include -#include #include static void quark_setup_mtrr(void) diff --git a/arch/x86/cpu/quark/smc.c b/arch/x86/cpu/quark/smc.c index a7e92b3f5c1..b4b3e1204bd 100644 --- a/arch/x86/cpu/quark/smc.c +++ b/arch/x86/cpu/quark/smc.c @@ -7,12 +7,11 @@ * QuarkSocPkg/QuarkNorthCluster/MemoryInit/Pei */ +#include #include #include #include #include -#include -#include #include "mrc_util.h" #include "hte.h" #include "smc.h" diff --git a/arch/x86/cpu/queensbay/fsp_configs.c b/arch/x86/cpu/queensbay/fsp_configs.c index 3b5cbdb44f1..381edd07615 100644 --- a/arch/x86/cpu/queensbay/fsp_configs.c +++ b/arch/x86/cpu/queensbay/fsp_configs.c @@ -4,6 +4,7 @@ * Copyright (C) 2014, Bin Meng */ +#include #include void fsp_update_configs(struct fsp_config_data *config, diff --git a/arch/x86/cpu/queensbay/tnc.c b/arch/x86/cpu/queensbay/tnc.c index 7c7eb413f99..4a008622d19 100644 --- a/arch/x86/cpu/queensbay/tnc.c +++ b/arch/x86/cpu/queensbay/tnc.c @@ -3,6 +3,7 @@ * Copyright (C) 2014, Bin Meng */ +#include #include #include #include diff --git a/arch/x86/cpu/slimbootloader/sdram.c b/arch/x86/cpu/slimbootloader/sdram.c index 75ca5273625..fbb33b246e5 100644 --- a/arch/x86/cpu/slimbootloader/sdram.c +++ b/arch/x86/cpu/slimbootloader/sdram.c @@ -3,6 +3,7 @@ * Copyright (C) 2019 Intel Corporation */ +#include #include #include #include diff --git a/arch/x86/cpu/slimbootloader/serial.c b/arch/x86/cpu/slimbootloader/serial.c index 4c889dad6d2..d28b280890d 100644 --- a/arch/x86/cpu/slimbootloader/serial.c +++ b/arch/x86/cpu/slimbootloader/serial.c @@ -3,6 +3,7 @@ * Copyright (C) 2019 Intel Corporation */ +#include #include #include #include diff --git a/arch/x86/cpu/slimbootloader/slimbootloader.c b/arch/x86/cpu/slimbootloader/slimbootloader.c index 142c9341cf8..ec5b87cfd63 100644 --- a/arch/x86/cpu/slimbootloader/slimbootloader.c +++ b/arch/x86/cpu/slimbootloader/slimbootloader.c @@ -3,6 +3,7 @@ * Copyright (C) 2019 Intel Corporation */ +#include #include #include #include diff --git a/arch/x86/cpu/tangier/acpi.c b/arch/x86/cpu/tangier/acpi.c index d4d0ef6f855..1d37cc9e2b0 100644 --- a/arch/x86/cpu/tangier/acpi.c +++ b/arch/x86/cpu/tangier/acpi.c @@ -5,6 +5,7 @@ * Partially based on acpi.c for other x86 platforms */ +#include #include #include #include diff --git a/arch/x86/cpu/tangier/pinmux.c b/arch/x86/cpu/tangier/pinmux.c index 6afb8646a98..23bfa7c18d2 100644 --- a/arch/x86/cpu/tangier/pinmux.c +++ b/arch/x86/cpu/tangier/pinmux.c @@ -3,6 +3,7 @@ * Copyright (c) 2018 Emlid Limited */ +#include #include #include #include diff --git a/arch/x86/cpu/tangier/sdram.c b/arch/x86/cpu/tangier/sdram.c index 6192f2296b8..374b262b134 100644 --- a/arch/x86/cpu/tangier/sdram.c +++ b/arch/x86/cpu/tangier/sdram.c @@ -3,6 +3,7 @@ * Copyright (c) 2017 Intel Corporation */ +#include #include #include #include diff --git a/arch/x86/cpu/tangier/sysreset.c b/arch/x86/cpu/tangier/sysreset.c index f57423a611d..b03bc28f935 100644 --- a/arch/x86/cpu/tangier/sysreset.c +++ b/arch/x86/cpu/tangier/sysreset.c @@ -5,6 +5,7 @@ * Reset driver for tangier processor */ +#include #include #include #include diff --git a/arch/x86/cpu/tangier/tangier.c b/arch/x86/cpu/tangier/tangier.c index 8a8f7d27a9d..1e2f6cc8b70 100644 --- a/arch/x86/cpu/tangier/tangier.c +++ b/arch/x86/cpu/tangier/tangier.c @@ -3,6 +3,7 @@ * Copyright (c) 2017 Intel Corporation */ +#include #include #include #include diff --git a/arch/x86/cpu/turbo.c b/arch/x86/cpu/turbo.c index c9b402c4dc7..e2c84cddec8 100644 --- a/arch/x86/cpu/turbo.c +++ b/arch/x86/cpu/turbo.c @@ -5,6 +5,7 @@ * Copyright (C) 2011 The Chromium Authors. */ +#include #include #include #include diff --git a/arch/x86/cpu/x86_64/cpu.c b/arch/x86/cpu/x86_64/cpu.c index 80eab710315..5ea746ecce4 100644 --- a/arch/x86/cpu/x86_64/cpu.c +++ b/arch/x86/cpu/x86_64/cpu.c @@ -4,6 +4,7 @@ * Written by Simon Glass */ +#include #include #include #include diff --git a/arch/x86/cpu/x86_64/interrupts.c b/arch/x86/cpu/x86_64/interrupts.c index b84ff798814..634f7660c03 100644 --- a/arch/x86/cpu/x86_64/interrupts.c +++ b/arch/x86/cpu/x86_64/interrupts.c @@ -4,6 +4,7 @@ * Written by Simon Glass */ +#include #include #include diff --git a/arch/x86/cpu/x86_64/misc.c b/arch/x86/cpu/x86_64/misc.c index 294511e6eba..691b67ff68a 100644 --- a/arch/x86/cpu/x86_64/misc.c +++ b/arch/x86/cpu/x86_64/misc.c @@ -4,6 +4,7 @@ * Written by Simon Glass */ +#include #include DECLARE_GLOBAL_DATA_PTR; diff --git a/arch/x86/include/asm/arch-quark/mrc.h b/arch/x86/include/asm/arch-quark/mrc.h index 40c92a549cd..2353426cd6d 100644 --- a/arch/x86/include/asm/arch-quark/mrc.h +++ b/arch/x86/include/asm/arch-quark/mrc.h @@ -10,8 +10,6 @@ #ifndef _MRC_H_ #define _MRC_H_ -#include - #define MRC_VERSION 0x0111 /* architectural definitions */ diff --git a/arch/x86/include/asm/arch-quark/msg_port.h b/arch/x86/include/asm/arch-quark/msg_port.h index 98a9360d543..9527fdad3fd 100644 --- a/arch/x86/include/asm/arch-quark/msg_port.h +++ b/arch/x86/include/asm/arch-quark/msg_port.h @@ -34,8 +34,6 @@ #ifndef __ASSEMBLY__ -#include - /** * msg_port_setup - set up the message port control register * diff --git a/arch/x86/include/asm/arch-quark/quark.h b/arch/x86/include/asm/arch-quark/quark.h index dec30e2b27f..feca1983ba8 100644 --- a/arch/x86/include/asm/arch-quark/quark.h +++ b/arch/x86/include/asm/arch-quark/quark.h @@ -71,8 +71,6 @@ #ifndef __ASSEMBLY__ -#include - /* variable range MTRR usage */ enum { MTRR_VAR_ROM, diff --git a/arch/x86/include/asm/cb_sysinfo.h b/arch/x86/include/asm/cb_sysinfo.h index 5864b2700ce..12fa395ffd2 100644 --- a/arch/x86/include/asm/cb_sysinfo.h +++ b/arch/x86/include/asm/cb_sysinfo.h @@ -9,7 +9,6 @@ #define _COREBOOT_SYSINFO_H #include -#include /* Maximum number of memory range definitions */ #define SYSINFO_MAX_MEM_RANGES 32 diff --git a/arch/x86/include/asm/coreboot_tables.h b/arch/x86/include/asm/coreboot_tables.h index 54aeffb9889..0dfb64babb9 100644 --- a/arch/x86/include/asm/coreboot_tables.h +++ b/arch/x86/include/asm/coreboot_tables.h @@ -8,9 +8,6 @@ #ifndef _COREBOOT_TABLES_H #define _COREBOOT_TABLES_H -#include -#include - struct timestamp_entry { u32 entry_id; u64 entry_stamp; diff --git a/arch/x86/include/asm/early_cmos.h b/arch/x86/include/asm/early_cmos.h index 007aeb7c23e..543a9e69f03 100644 --- a/arch/x86/include/asm/early_cmos.h +++ b/arch/x86/include/asm/early_cmos.h @@ -6,8 +6,6 @@ #ifndef __EARLY_CMOS_H #define __EARLY_CMOS_H -#include - /* CMOS actually resides in the RTC SRAM */ #define CMOS_IO_PORT 0x70 diff --git a/arch/x86/include/asm/global_data.h b/arch/x86/include/asm/global_data.h index 06bd80ccc13..1ef7f1f0349 100644 --- a/arch/x86/include/asm/global_data.h +++ b/arch/x86/include/asm/global_data.h @@ -12,7 +12,6 @@ #include #include #include -#include enum pei_boot_mode_t { PEI_BOOT_NONE = 0, diff --git a/arch/x86/include/asm/handoff.h b/arch/x86/include/asm/handoff.h index 5f6691939eb..aec49b9b815 100644 --- a/arch/x86/include/asm/handoff.h +++ b/arch/x86/include/asm/handoff.h @@ -9,8 +9,6 @@ #ifndef __x86_asm_handoff_h #define __x86_asm_handoff_h -#include - /** * struct arch_spl_handoff - architecture-specific handoff info * diff --git a/arch/x86/include/asm/me_common.h b/arch/x86/include/asm/me_common.h index aa478594ec9..85703683149 100644 --- a/arch/x86/include/asm/me_common.h +++ b/arch/x86/include/asm/me_common.h @@ -13,7 +13,6 @@ #define __ASM_ME_COMMON_H #include -#include #include #include diff --git a/arch/x86/include/asm/mp.h b/arch/x86/include/asm/mp.h index 7c08f7a1d5c..f4c4d6c257c 100644 --- a/arch/x86/include/asm/mp.h +++ b/arch/x86/include/asm/mp.h @@ -11,7 +11,6 @@ #include #include #include -#include struct udevice; diff --git a/arch/x86/lib/acpi.c b/arch/x86/lib/acpi.c index a73a2539ad3..155fffabf08 100644 --- a/arch/x86/lib/acpi.c +++ b/arch/x86/lib/acpi.c @@ -3,6 +3,7 @@ * Copyright (C) 2018, Bin Meng */ +#include #include #include #include diff --git a/arch/x86/lib/acpi_nhlt.c b/arch/x86/lib/acpi_nhlt.c index 880ef31df7d..08e13fdea67 100644 --- a/arch/x86/lib/acpi_nhlt.c +++ b/arch/x86/lib/acpi_nhlt.c @@ -7,6 +7,7 @@ #define LOG_CATEGORY LOGC_ACPI +#include #include #include #include diff --git a/arch/x86/lib/acpi_s3.c b/arch/x86/lib/acpi_s3.c index 3a1e3318a15..2c70acbe7b0 100644 --- a/arch/x86/lib/acpi_s3.c +++ b/arch/x86/lib/acpi_s3.c @@ -3,6 +3,7 @@ * Copyright (C) 2017, Bin Meng */ +#include #include #include #include diff --git a/arch/x86/lib/acpi_table.c b/arch/x86/lib/acpi_table.c index a42a7e6bbd6..a5683132b01 100644 --- a/arch/x86/lib/acpi_table.c +++ b/arch/x86/lib/acpi_table.c @@ -8,6 +8,7 @@ #define LOG_CATEGORY LOGC_ACPI +#include #include #include #include diff --git a/arch/x86/lib/acpigen.c b/arch/x86/lib/acpigen.c index b486f8fb37d..ea2ec2a9083 100644 --- a/arch/x86/lib/acpigen.c +++ b/arch/x86/lib/acpigen.c @@ -3,6 +3,7 @@ * Copyright (C) 2020 Google LLC */ +#include #include #include #include diff --git a/arch/x86/lib/asm-offsets.c b/arch/x86/lib/asm-offsets.c index 7b2905dda56..8df67db65c3 100644 --- a/arch/x86/lib/asm-offsets.c +++ b/arch/x86/lib/asm-offsets.c @@ -11,6 +11,7 @@ * #defines from the assembly-language output. */ +#include #include #include diff --git a/arch/x86/lib/bdinfo.c b/arch/x86/lib/bdinfo.c index 165e8ab944f..124058442c5 100644 --- a/arch/x86/lib/bdinfo.c +++ b/arch/x86/lib/bdinfo.c @@ -5,6 +5,7 @@ * Copyright 2021 Google LLC */ +#include #include #include #include diff --git a/arch/x86/lib/bios.c b/arch/x86/lib/bios.c index 03f7360032c..f146bbd5422 100644 --- a/arch/x86/lib/bios.c +++ b/arch/x86/lib/bios.c @@ -5,6 +5,7 @@ * Copyright (C) 2007 Advanced Micro Devices, Inc. * Copyright (C) 2009-2010 coresystems GmbH */ +#include #include #include #include diff --git a/arch/x86/lib/bios_interrupts.c b/arch/x86/lib/bios_interrupts.c index b2cf1527b1c..d6b4da7e250 100644 --- a/arch/x86/lib/bios_interrupts.c +++ b/arch/x86/lib/bios_interrupts.c @@ -7,6 +7,7 @@ * Copyright (C) 2007-2009 coresystems GmbH */ +#include #include #include #include "bios_emul.h" diff --git a/arch/x86/lib/bootm.c b/arch/x86/lib/bootm.c index 2c889bcd33c..050c420e86b 100644 --- a/arch/x86/lib/bootm.c +++ b/arch/x86/lib/bootm.c @@ -7,6 +7,7 @@ * Copyright (C) 2001 Erik Mouw (J.A.K.Mouw@its.tudelft.nl) */ +#include #include #include #include diff --git a/arch/x86/lib/cmd_boot.c b/arch/x86/lib/cmd_boot.c index 0444a5f89d3..4facbe5f32f 100644 --- a/arch/x86/lib/cmd_boot.c +++ b/arch/x86/lib/cmd_boot.c @@ -14,6 +14,7 @@ * Marius Groeger */ +#include #include #include #include diff --git a/arch/x86/lib/coreboot/cb_support.c b/arch/x86/lib/coreboot/cb_support.c index b4d5fa4af32..ebb45cdfb5b 100644 --- a/arch/x86/lib/coreboot/cb_support.c +++ b/arch/x86/lib/coreboot/cb_support.c @@ -5,9 +5,9 @@ * Copyright 2021 Google LLC */ +#include #include #include -#include unsigned int cb_install_e820_map(unsigned int max_entries, struct e820_entry *entries) diff --git a/arch/x86/lib/coreboot/cb_sysinfo.c b/arch/x86/lib/coreboot/cb_sysinfo.c index ec997fa49cf..f7fd9ea5bcb 100644 --- a/arch/x86/lib/coreboot/cb_sysinfo.c +++ b/arch/x86/lib/coreboot/cb_sysinfo.c @@ -6,12 +6,12 @@ * Copyright (C) 2009 coresystems GmbH */ +#include #include #include #include #include #include -#include DECLARE_GLOBAL_DATA_PTR; diff --git a/arch/x86/lib/coreboot_table.c b/arch/x86/lib/coreboot_table.c index 33fce5d0a5e..05519d851a9 100644 --- a/arch/x86/lib/coreboot_table.c +++ b/arch/x86/lib/coreboot_table.c @@ -3,6 +3,7 @@ * Copyright (C) 2016, Bin Meng */ +#include #include #include #include diff --git a/arch/x86/lib/div64.c b/arch/x86/lib/div64.c index 57da889ef49..2bea205f60f 100644 --- a/arch/x86/lib/div64.c +++ b/arch/x86/lib/div64.c @@ -6,7 +6,7 @@ * Copyright 2014 Google Inc. */ -#include +#include union overlay64 { u64 longw; diff --git a/arch/x86/lib/e820.c b/arch/x86/lib/e820.c index 122b4f7ca01..12fcff12380 100644 --- a/arch/x86/lib/e820.c +++ b/arch/x86/lib/e820.c @@ -3,6 +3,7 @@ * Copyright (C) 2015, Bin Meng */ +#include #include #include #include diff --git a/arch/x86/lib/early_cmos.c b/arch/x86/lib/early_cmos.c index 5635d08718f..f7b3bb2a8e1 100644 --- a/arch/x86/lib/early_cmos.c +++ b/arch/x86/lib/early_cmos.c @@ -10,6 +10,7 @@ * uclass write ops, that data is stored in little-endian mode. */ +#include #include #include diff --git a/arch/x86/lib/fsp/fsp_common.c b/arch/x86/lib/fsp/fsp_common.c index c47e6ca4738..8f2977a8070 100644 --- a/arch/x86/lib/fsp/fsp_common.c +++ b/arch/x86/lib/fsp/fsp_common.c @@ -3,6 +3,7 @@ * Copyright (C) 2014, Bin Meng */ +#include #include #include #include diff --git a/arch/x86/lib/fsp/fsp_dram.c b/arch/x86/lib/fsp/fsp_dram.c index 730721dc176..cc889a688d8 100644 --- a/arch/x86/lib/fsp/fsp_dram.c +++ b/arch/x86/lib/fsp/fsp_dram.c @@ -3,6 +3,7 @@ * Copyright (C) 2014, Bin Meng */ +#include #include #include #include diff --git a/arch/x86/lib/fsp/fsp_graphics.c b/arch/x86/lib/fsp/fsp_graphics.c index 5f7701265a9..09d5da8c841 100644 --- a/arch/x86/lib/fsp/fsp_graphics.c +++ b/arch/x86/lib/fsp/fsp_graphics.c @@ -5,6 +5,7 @@ #define LOG_CATEGORY UCLASS_VIDEO +#include #include #include #include diff --git a/arch/x86/lib/fsp/fsp_support.c b/arch/x86/lib/fsp/fsp_support.c index 19f9f65b2e4..fd4d98ef627 100644 --- a/arch/x86/lib/fsp/fsp_support.c +++ b/arch/x86/lib/fsp/fsp_support.c @@ -4,6 +4,7 @@ * Copyright (C) 2014, Bin Meng */ +#include #include #include #include diff --git a/arch/x86/lib/fsp1/fsp_common.c b/arch/x86/lib/fsp1/fsp_common.c index ebf655a1143..df18f476756 100644 --- a/arch/x86/lib/fsp1/fsp_common.c +++ b/arch/x86/lib/fsp1/fsp_common.c @@ -3,6 +3,7 @@ * Copyright (C) 2014, Bin Meng */ +#include #include #include #include diff --git a/arch/x86/lib/fsp1/fsp_dram.c b/arch/x86/lib/fsp1/fsp_dram.c index f3a8134a3f2..eee9ce54b1c 100644 --- a/arch/x86/lib/fsp1/fsp_dram.c +++ b/arch/x86/lib/fsp1/fsp_dram.c @@ -3,6 +3,7 @@ * Copyright (C) 2014, Bin Meng */ +#include #include #include #include diff --git a/arch/x86/lib/fsp1/fsp_support.c b/arch/x86/lib/fsp1/fsp_support.c index 6e311a12d20..d84c632f140 100644 --- a/arch/x86/lib/fsp1/fsp_support.c +++ b/arch/x86/lib/fsp1/fsp_support.c @@ -4,6 +4,7 @@ * Copyright (C) 2014, Bin Meng */ +#include #include #include #include diff --git a/arch/x86/lib/fsp2/fsp_common.c b/arch/x86/lib/fsp2/fsp_common.c index 45a274c0512..d802a86967d 100644 --- a/arch/x86/lib/fsp2/fsp_common.c +++ b/arch/x86/lib/fsp2/fsp_common.c @@ -4,6 +4,7 @@ * Written by Simon Glass */ +#include #include #include diff --git a/arch/x86/lib/fsp2/fsp_dram.c b/arch/x86/lib/fsp2/fsp_dram.c index 83c6d7bcc93..a1432239cfc 100644 --- a/arch/x86/lib/fsp2/fsp_dram.c +++ b/arch/x86/lib/fsp2/fsp_dram.c @@ -6,6 +6,7 @@ #define LOG_CATEGORY LOGC_ARCH +#include #include #include #include diff --git a/arch/x86/lib/fsp2/fsp_init.c b/arch/x86/lib/fsp2/fsp_init.c index ecbadaae75c..aadc08cf3c4 100644 --- a/arch/x86/lib/fsp2/fsp_init.c +++ b/arch/x86/lib/fsp2/fsp_init.c @@ -3,6 +3,7 @@ * Copyright 2019 Google LLC */ +#include #include #include #include diff --git a/arch/x86/lib/fsp2/fsp_meminit.c b/arch/x86/lib/fsp2/fsp_meminit.c index f4817830cc2..022e2cb64e5 100644 --- a/arch/x86/lib/fsp2/fsp_meminit.c +++ b/arch/x86/lib/fsp2/fsp_meminit.c @@ -6,6 +6,7 @@ * Mostly taken from coreboot fsp2_0/memory_init.c */ +#include #include #include #include diff --git a/arch/x86/lib/fsp2/fsp_silicon_init.c b/arch/x86/lib/fsp2/fsp_silicon_init.c index 16d30c25a57..a96d2b183f6 100644 --- a/arch/x86/lib/fsp2/fsp_silicon_init.c +++ b/arch/x86/lib/fsp2/fsp_silicon_init.c @@ -8,6 +8,7 @@ #define LOG_CATEGORY UCLASS_NORTHBRIDGE +#include #include #include #include diff --git a/arch/x86/lib/fsp2/fsp_support.c b/arch/x86/lib/fsp2/fsp_support.c index 808f0eb9d29..b2c76582453 100644 --- a/arch/x86/lib/fsp2/fsp_support.c +++ b/arch/x86/lib/fsp2/fsp_support.c @@ -4,6 +4,7 @@ * Written by Simon Glass */ +#include #include #include #include diff --git a/arch/x86/lib/hob.c b/arch/x86/lib/hob.c index 46e83aa395a..b35248e5fde 100644 --- a/arch/x86/lib/hob.c +++ b/arch/x86/lib/hob.c @@ -4,6 +4,7 @@ * Copyright (C) 2014, Bin Meng */ +#include #include /** diff --git a/arch/x86/lib/i8254.c b/arch/x86/lib/i8254.c index 8a590c6191f..a8d1db188ec 100644 --- a/arch/x86/lib/i8254.c +++ b/arch/x86/lib/i8254.c @@ -4,10 +4,10 @@ * Daniel Engström, Omicron Ceti AB, */ +#include #include #include #include -#include #define TIMER1_VALUE 18 /* 15.6us */ #define BEEP_FREQUENCY_HZ 440 diff --git a/arch/x86/lib/i8259.c b/arch/x86/lib/i8259.c index 465ff70146f..a0e3c092573 100644 --- a/arch/x86/lib/i8259.c +++ b/arch/x86/lib/i8259.c @@ -13,6 +13,7 @@ * Programmable Interrupt Controllers. */ +#include #include #include #include diff --git a/arch/x86/lib/init_helpers.c b/arch/x86/lib/init_helpers.c index bd0efde00c1..bf0c921577d 100644 --- a/arch/x86/lib/init_helpers.c +++ b/arch/x86/lib/init_helpers.c @@ -4,11 +4,11 @@ * Graeme Russ, */ +#include #include #include #include #include -#include DECLARE_GLOBAL_DATA_PTR; diff --git a/arch/x86/lib/interrupts.c b/arch/x86/lib/interrupts.c index f96b2bfd70e..ff52959ed28 100644 --- a/arch/x86/lib/interrupts.c +++ b/arch/x86/lib/interrupts.c @@ -29,6 +29,7 @@ * Daniel Engström */ +#include #include #include #include diff --git a/arch/x86/lib/lpc-uclass.c b/arch/x86/lib/lpc-uclass.c index 4f89db4e538..67b931d3b28 100644 --- a/arch/x86/lib/lpc-uclass.c +++ b/arch/x86/lib/lpc-uclass.c @@ -4,6 +4,7 @@ * Written by Simon Glass */ +#include #include UCLASS_DRIVER(lpc) = { diff --git a/arch/x86/lib/mpspec.c b/arch/x86/lib/mpspec.c index 5abd9288c2a..8e97d9ff36d 100644 --- a/arch/x86/lib/mpspec.c +++ b/arch/x86/lib/mpspec.c @@ -5,6 +5,7 @@ * Adapted from coreboot src/arch/x86/boot/mpspec.c */ +#include #include #include #include diff --git a/arch/x86/lib/mrccache.c b/arch/x86/lib/mrccache.c index 970704a8dd6..6494b8d2634 100644 --- a/arch/x86/lib/mrccache.c +++ b/arch/x86/lib/mrccache.c @@ -8,6 +8,7 @@ #define LOG_CATEGORY UCLASS_RAM +#include #include #include #include diff --git a/arch/x86/lib/northbridge-uclass.c b/arch/x86/lib/northbridge-uclass.c index 1d1780535a2..38388872484 100644 --- a/arch/x86/lib/northbridge-uclass.c +++ b/arch/x86/lib/northbridge-uclass.c @@ -4,6 +4,7 @@ * Written by Simon Glass */ +#include #include #include diff --git a/arch/x86/lib/physmem.c b/arch/x86/lib/physmem.c index 48cd1073c15..382f768149f 100644 --- a/arch/x86/lib/physmem.c +++ b/arch/x86/lib/physmem.c @@ -8,6 +8,7 @@ * Software Foundation. */ +#include #include #include #include diff --git a/arch/x86/lib/pinctrl_ich6.c b/arch/x86/lib/pinctrl_ich6.c index d4f71c562f8..c93f245845d 100644 --- a/arch/x86/lib/pinctrl_ich6.c +++ b/arch/x86/lib/pinctrl_ich6.c @@ -3,6 +3,7 @@ * Copyright (C) 2016 Google, Inc */ +#include #include #include #include diff --git a/arch/x86/lib/pirq_routing.c b/arch/x86/lib/pirq_routing.c index 5178940901c..caeaec9287f 100644 --- a/arch/x86/lib/pirq_routing.c +++ b/arch/x86/lib/pirq_routing.c @@ -5,6 +5,7 @@ * Part of this file is ported from coreboot src/arch/x86/boot/pirq_routing.c */ +#include #include #include #include diff --git a/arch/x86/lib/pmu.c b/arch/x86/lib/pmu.c index 2127257cd43..083aec8d8dd 100644 --- a/arch/x86/lib/pmu.c +++ b/arch/x86/lib/pmu.c @@ -2,6 +2,7 @@ /* * Copyright (c) 2017 Intel Corporation */ +#include #include #include #include diff --git a/arch/x86/lib/ramtest.c b/arch/x86/lib/ramtest.c index 16cd6e49437..03385396325 100644 --- a/arch/x86/lib/ramtest.c +++ b/arch/x86/lib/ramtest.c @@ -5,9 +5,9 @@ * From Coreboot src/lib/ramtest.c */ +#include #include #include -#include static void write_phys(unsigned long addr, u32 value) { diff --git a/arch/x86/lib/reloc_ia32_efi.c b/arch/x86/lib/reloc_ia32_efi.c index 17ab54dc246..d56cd50bd93 100644 --- a/arch/x86/lib/reloc_ia32_efi.c +++ b/arch/x86/lib/reloc_ia32_efi.c @@ -7,6 +7,7 @@ * All rights reserved. */ +#include #include #include diff --git a/arch/x86/lib/reloc_x86_64_efi.c b/arch/x86/lib/reloc_x86_64_efi.c index c7a21d9393d..2694de71104 100644 --- a/arch/x86/lib/reloc_x86_64_efi.c +++ b/arch/x86/lib/reloc_x86_64_efi.c @@ -9,6 +9,7 @@ * All rights reserved. */ +#include #include #include diff --git a/arch/x86/lib/relocate.c b/arch/x86/lib/relocate.c index 9ce56062d24..da819b9bdd2 100644 --- a/arch/x86/lib/relocate.c +++ b/arch/x86/lib/relocate.c @@ -14,6 +14,7 @@ * Marius Groeger */ +#include #include #include #include diff --git a/arch/x86/lib/scu.c b/arch/x86/lib/scu.c index 02fed601fb6..90ef239bcd3 100644 --- a/arch/x86/lib/scu.c +++ b/arch/x86/lib/scu.c @@ -9,6 +9,7 @@ * * This driver enables IPC channel to SCU. */ +#include #include #include #include diff --git a/arch/x86/lib/sfi.c b/arch/x86/lib/sfi.c index 04d97327a4d..85e963b634b 100644 --- a/arch/x86/lib/sfi.c +++ b/arch/x86/lib/sfi.c @@ -12,6 +12,7 @@ * See https://simplefirmware.org/ for details */ +#include #include #include #include diff --git a/arch/x86/lib/spl.c b/arch/x86/lib/spl.c index f761fbc8bc3..c15f11f8cdf 100644 --- a/arch/x86/lib/spl.c +++ b/arch/x86/lib/spl.c @@ -5,6 +5,7 @@ #define LOG_CATEGORY LOGC_BOOT +#include #include #include #include @@ -28,7 +29,6 @@ #include #include #include -#include #include DECLARE_GLOBAL_DATA_PTR; diff --git a/arch/x86/lib/tables.c b/arch/x86/lib/tables.c index 45a70e92763..1095dc92c5a 100644 --- a/arch/x86/lib/tables.c +++ b/arch/x86/lib/tables.c @@ -5,6 +5,7 @@ #define LOG_CATEGORY LOGC_ACPI +#include #include #include #include diff --git a/arch/x86/lib/tpl.c b/arch/x86/lib/tpl.c index 7c03dea0711..273e9c8e1ca 100644 --- a/arch/x86/lib/tpl.c +++ b/arch/x86/lib/tpl.c @@ -5,6 +5,7 @@ #define LOG_CATEGORY LOGC_BOOT +#include #include #include #include diff --git a/arch/x86/lib/zimage.c b/arch/x86/lib/zimage.c index 73a21bc8f03..d7403876c13 100644 --- a/arch/x86/lib/zimage.c +++ b/arch/x86/lib/zimage.c @@ -14,6 +14,7 @@ #define LOG_CATEGORY LOGC_BOOT +#include #include #include #include diff --git a/arch/xtensa/cpu/cpu.c b/arch/xtensa/cpu/cpu.c index abcd8f7984f..98d9753b7e3 100644 --- a/arch/xtensa/cpu/cpu.c +++ b/arch/xtensa/cpu/cpu.c @@ -8,7 +8,7 @@ * CPU specific code */ -#include +#include #include #include #include diff --git a/arch/xtensa/cpu/exceptions.c b/arch/xtensa/cpu/exceptions.c index 206767094e9..cf9af4326a2 100644 --- a/arch/xtensa/cpu/exceptions.c +++ b/arch/xtensa/cpu/exceptions.c @@ -10,12 +10,12 @@ * (Note that alloca is a special case and handled in start.S) */ +#include #include #include #include #include #include -#include typedef void (*handler_t)(struct pt_regs *); diff --git a/arch/xtensa/include/asm/global_data.h b/arch/xtensa/include/asm/global_data.h index 40c129db4ac..1157978ab68 100644 --- a/arch/xtensa/include/asm/global_data.h +++ b/arch/xtensa/include/asm/global_data.h @@ -6,8 +6,6 @@ #ifndef _XTENSA_GBL_DATA_H #define _XTENSA_GBL_DATA_H -#include - /* Architecture-specific global data */ struct arch_global_data { diff --git a/arch/xtensa/lib/bootm.c b/arch/xtensa/lib/bootm.c index 1de06b7fb53..9780d46e9b8 100644 --- a/arch/xtensa/lib/bootm.c +++ b/arch/xtensa/lib/bootm.c @@ -4,6 +4,7 @@ * (C) Copyright 2014 Cadence Design Systems Inc. */ +#include #include #include #include diff --git a/arch/xtensa/lib/cache.c b/arch/xtensa/lib/cache.c index e6a7f6827fc..4e0c0acc3bb 100644 --- a/arch/xtensa/lib/cache.c +++ b/arch/xtensa/lib/cache.c @@ -4,6 +4,7 @@ * (C) Copyright 2014 - 2016 Cadence Design Systems Inc. */ +#include #include #include diff --git a/arch/xtensa/lib/time.c b/arch/xtensa/lib/time.c index c6739584bbf..1c927d2a6a3 100644 --- a/arch/xtensa/lib/time.c +++ b/arch/xtensa/lib/time.c @@ -3,6 +3,7 @@ * (C) Copyright 2008 - 2013 Tensilica Inc. */ +#include #include #include #include diff --git a/board/BuR/brppt1/board.c b/board/BuR/brppt1/board.c index 192a2fa6327..36945bbdccf 100644 --- a/board/BuR/brppt1/board.c +++ b/board/BuR/brppt1/board.c @@ -9,7 +9,7 @@ * */ -#include +#include #include #include #include diff --git a/board/BuR/brppt1/mux.c b/board/BuR/brppt1/mux.c index 8932b9ab3b1..5d2c7a201ea 100644 --- a/board/BuR/brppt1/mux.c +++ b/board/BuR/brppt1/mux.c @@ -8,6 +8,7 @@ * Bernecker & Rainer Industrieelektronik GmbH - http://www.br-automation.com */ +#include #include #include #include diff --git a/board/BuR/brppt2/board.c b/board/BuR/brppt2/board.c index 105fac8912d..ee006f0196c 100644 --- a/board/BuR/brppt2/board.c +++ b/board/BuR/brppt2/board.c @@ -6,6 +6,7 @@ * B&R Industrial Automation GmbH - http://www.br-automation.com/ * */ +#include #include #include #include diff --git a/board/BuR/brsmarc1/board.c b/board/BuR/brsmarc1/board.c index 2d3f593d0ab..738a5d2ff94 100644 --- a/board/BuR/brsmarc1/board.c +++ b/board/BuR/brsmarc1/board.c @@ -8,6 +8,7 @@ * B&R Industrial Automation GmbH - http://www.br-automation.com * */ +#include #include #include #include diff --git a/board/BuR/brsmarc1/mux.c b/board/BuR/brsmarc1/mux.c index b59d64f93ef..33c214d6b2a 100644 --- a/board/BuR/brsmarc1/mux.c +++ b/board/BuR/brsmarc1/mux.c @@ -9,6 +9,7 @@ * */ +#include #include #include #include diff --git a/board/BuR/brxre1/board.c b/board/BuR/brxre1/board.c index b9b595cb156..a909104df4a 100644 --- a/board/BuR/brxre1/board.c +++ b/board/BuR/brxre1/board.c @@ -8,6 +8,7 @@ * Bernecker & Rainer Industrieelektronik GmbH - http://www.br-automation.com * */ +#include #include #include #include diff --git a/board/BuR/brxre1/mux.c b/board/BuR/brxre1/mux.c index e2e8ec57678..6c5ad891ba9 100644 --- a/board/BuR/brxre1/mux.c +++ b/board/BuR/brxre1/mux.c @@ -8,6 +8,7 @@ * Bernecker & Rainer Industrieelektronik GmbH - http://www.br-automation.com */ +#include #include #include #include diff --git a/board/BuR/common/br_resetc.c b/board/BuR/common/br_resetc.c index f5d09fef3d3..32f32b65e9d 100644 --- a/board/BuR/common/br_resetc.c +++ b/board/BuR/common/br_resetc.c @@ -5,6 +5,7 @@ * Copyright (C) 2019 Hannes Schmelzer * B&R Industrial Automation GmbH - http://www.br-automation.com/ * */ +#include #include #include #include diff --git a/board/BuR/common/common.c b/board/BuR/common/common.c index 8aff821cfe8..3c78020bf93 100644 --- a/board/BuR/common/common.c +++ b/board/BuR/common/common.c @@ -10,6 +10,7 @@ */ #include #include +#include #include #include #include diff --git a/board/BuS/eb_cpu5282/eb_cpu5282.c b/board/BuS/eb_cpu5282/eb_cpu5282.c index cf5610861b5..ea49c7a99c0 100644 --- a/board/BuS/eb_cpu5282/eb_cpu5282.c +++ b/board/BuS/eb_cpu5282/eb_cpu5282.c @@ -7,7 +7,7 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ -#include +#include #include #include #include "asm/m5282.h" diff --git a/board/CZ.NIC/turris_mox/mox_sp.c b/board/CZ.NIC/turris_mox/mox_sp.c index 1591b40deee..11d87564717 100644 --- a/board/CZ.NIC/turris_mox/mox_sp.c +++ b/board/CZ.NIC/turris_mox/mox_sp.c @@ -3,7 +3,7 @@ * Copyright (C) 2018 Marek Behún */ -#include +#include #include #include #include diff --git a/board/CZ.NIC/turris_mox/turris_mox.c b/board/CZ.NIC/turris_mox/turris_mox.c index e4ed7f25810..00114e6d915 100644 --- a/board/CZ.NIC/turris_mox/turris_mox.c +++ b/board/CZ.NIC/turris_mox/turris_mox.c @@ -3,7 +3,7 @@ * Copyright (C) 2018 Marek Behún */ -#include +#include #include #include #include diff --git a/board/CZ.NIC/turris_omnia/turris_omnia.c b/board/CZ.NIC/turris_omnia/turris_omnia.c index 4ee1a394b02..3b7a71bdad2 100644 --- a/board/CZ.NIC/turris_omnia/turris_omnia.c +++ b/board/CZ.NIC/turris_omnia/turris_omnia.c @@ -7,7 +7,7 @@ * Marvell/db-88f6820-gp by Stefan Roese */ -#include +#include #include #include #include diff --git a/board/LaCie/common/common.c b/board/LaCie/common/common.c index e8a7830fc05..52880a16fad 100644 --- a/board/LaCie/common/common.c +++ b/board/LaCie/common/common.c @@ -3,6 +3,7 @@ * Copyright (C) 2011 Simon Guinot */ +#include #include #include diff --git a/board/LaCie/net2big_v2/net2big_v2.c b/board/LaCie/net2big_v2/net2big_v2.c index 083d91b696a..91709134000 100644 --- a/board/LaCie/net2big_v2/net2big_v2.c +++ b/board/LaCie/net2big_v2/net2big_v2.c @@ -8,7 +8,7 @@ * Written-by: Prafulla Wadaskar */ -#include +#include #include #include #include diff --git a/board/LaCie/netspace_v2/netspace_v2.c b/board/LaCie/netspace_v2/netspace_v2.c index 3a2fdb5c154..22bb008745e 100644 --- a/board/LaCie/netspace_v2/netspace_v2.c +++ b/board/LaCie/netspace_v2/netspace_v2.c @@ -8,6 +8,7 @@ * Written-by: Prafulla Wadaskar */ +#include #include #include #include diff --git a/board/Marvell/db-88f6720/db-88f6720.c b/board/Marvell/db-88f6720/db-88f6720.c index 920421366f1..26c30647fbb 100644 --- a/board/Marvell/db-88f6720/db-88f6720.c +++ b/board/Marvell/db-88f6720/db-88f6720.c @@ -3,6 +3,7 @@ * Copyright (C) 2016 Stefan Roese */ +#include #include #include #include diff --git a/board/Marvell/db-88f6820-amc/db-88f6820-amc.c b/board/Marvell/db-88f6820-amc/db-88f6820-amc.c index 0f92cc385bc..122c63d11f9 100644 --- a/board/Marvell/db-88f6820-amc/db-88f6820-amc.c +++ b/board/Marvell/db-88f6820-amc/db-88f6820-amc.c @@ -3,7 +3,7 @@ * Copyright (C) 2015 Stefan Roese */ -#include +#include #include #include #include diff --git a/board/Marvell/db-88f6820-gp/db-88f6820-gp.c b/board/Marvell/db-88f6820-gp/db-88f6820-gp.c index 8f8b2720107..1edc1cb6515 100644 --- a/board/Marvell/db-88f6820-gp/db-88f6820-gp.c +++ b/board/Marvell/db-88f6820-gp/db-88f6820-gp.c @@ -3,7 +3,7 @@ * Copyright (C) 2015 Stefan Roese */ -#include +#include #include #include #include diff --git a/board/Marvell/db-mv784mp-gp/db-mv784mp-gp.c b/board/Marvell/db-mv784mp-gp/db-mv784mp-gp.c index 6bca1f91a0a..9e1fdecfca4 100644 --- a/board/Marvell/db-mv784mp-gp/db-mv784mp-gp.c +++ b/board/Marvell/db-mv784mp-gp/db-mv784mp-gp.c @@ -3,6 +3,7 @@ * Copyright (C) 2014 Stefan Roese */ +#include #include #include #include diff --git a/board/Marvell/db-xc3-24g4xg/db-xc3-24g4xg.c b/board/Marvell/db-xc3-24g4xg/db-xc3-24g4xg.c index a7a84798a53..0abdca1cd21 100644 --- a/board/Marvell/db-xc3-24g4xg/db-xc3-24g4xg.c +++ b/board/Marvell/db-xc3-24g4xg/db-xc3-24g4xg.c @@ -3,6 +3,7 @@ * Copyright (C) 2015 Stefan Roese */ +#include #include #include #include diff --git a/board/Marvell/dreamplug/dreamplug.c b/board/Marvell/dreamplug/dreamplug.c index 38127506131..d15faa1cb7f 100644 --- a/board/Marvell/dreamplug/dreamplug.c +++ b/board/Marvell/dreamplug/dreamplug.c @@ -8,6 +8,7 @@ * Written-by: Siddarth Gore */ +#include #include #include #include diff --git a/board/Marvell/guruplug/guruplug.c b/board/Marvell/guruplug/guruplug.c index 7c3cea22b93..ea87ded222e 100644 --- a/board/Marvell/guruplug/guruplug.c +++ b/board/Marvell/guruplug/guruplug.c @@ -5,6 +5,7 @@ * Written-by: Siddarth Gore */ +#include #include #include #include diff --git a/board/Marvell/mvebu_alleycat-5/board.c b/board/Marvell/mvebu_alleycat-5/board.c index c1b7cc3b613..0c4f8e03b85 100644 --- a/board/Marvell/mvebu_alleycat-5/board.c +++ b/board/Marvell/mvebu_alleycat-5/board.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ -#include +#include #include DECLARE_GLOBAL_DATA_PTR; diff --git a/board/Marvell/mvebu_armada-37xx/board.c b/board/Marvell/mvebu_armada-37xx/board.c index df3fb6d2164..1685b12b847 100644 --- a/board/Marvell/mvebu_armada-37xx/board.c +++ b/board/Marvell/mvebu_armada-37xx/board.c @@ -3,7 +3,7 @@ * Copyright (C) 2016 Stefan Roese */ -#include +#include #include #include #include diff --git a/board/Marvell/mvebu_armada-8k/board.c b/board/Marvell/mvebu_armada-8k/board.c index 6d704211742..a8899af6e5a 100644 --- a/board/Marvell/mvebu_armada-8k/board.c +++ b/board/Marvell/mvebu_armada-8k/board.c @@ -3,7 +3,7 @@ * Copyright (C) 2016 Stefan Roese */ -#include +#include #include #include #include diff --git a/board/Marvell/octeontx2/soc-utils.c b/board/Marvell/octeontx2/soc-utils.c index 64eb95f3b40..43a19a90717 100644 --- a/board/Marvell/octeontx2/soc-utils.c +++ b/board/Marvell/octeontx2/soc-utils.c @@ -5,6 +5,7 @@ * https://spdx.org/licenses */ +#include #include #include #include diff --git a/board/Marvell/openrd/openrd.c b/board/Marvell/openrd/openrd.c index dda56a582b3..581e2e084d6 100644 --- a/board/Marvell/openrd/openrd.c +++ b/board/Marvell/openrd/openrd.c @@ -10,6 +10,7 @@ * Written-by: Prafulla Wadaskar */ +#include #include #include #include diff --git a/board/Marvell/sheevaplug/sheevaplug.c b/board/Marvell/sheevaplug/sheevaplug.c index 23e761d5feb..26ee39ef77f 100644 --- a/board/Marvell/sheevaplug/sheevaplug.c +++ b/board/Marvell/sheevaplug/sheevaplug.c @@ -6,6 +6,7 @@ * Written-by: Prafulla Wadaskar */ +#include #include #include #include diff --git a/board/Seagate/dockstar/dockstar.c b/board/Seagate/dockstar/dockstar.c index e6ec00a9c6c..d72e3ef24ee 100644 --- a/board/Seagate/dockstar/dockstar.c +++ b/board/Seagate/dockstar/dockstar.c @@ -9,6 +9,7 @@ * Marvell Semiconductor */ +#include #include #include #include diff --git a/board/Seagate/goflexhome/goflexhome.c b/board/Seagate/goflexhome/goflexhome.c index b2d0ad8c3f2..caea89c10e0 100644 --- a/board/Seagate/goflexhome/goflexhome.c +++ b/board/Seagate/goflexhome/goflexhome.c @@ -12,6 +12,7 @@ * Marvell Semiconductor */ +#include #include #include #include diff --git a/board/Seagate/nas220/nas220.c b/board/Seagate/nas220/nas220.c index fa7553250d1..cd2bbdad1cd 100644 --- a/board/Seagate/nas220/nas220.c +++ b/board/Seagate/nas220/nas220.c @@ -8,6 +8,7 @@ * Marvell Semiconductor */ +#include #include #include #include diff --git a/board/Synology/ds109/ds109.c b/board/Synology/ds109/ds109.c index 4f397578182..5c3f46e23f4 100644 --- a/board/Synology/ds109/ds109.c +++ b/board/Synology/ds109/ds109.c @@ -5,7 +5,7 @@ * Luka Perkov */ -#include +#include #include #include #include diff --git a/board/Synology/ds414/cmd_syno.c b/board/Synology/ds414/cmd_syno.c index 29ea35e5e91..a62658a2eb6 100644 --- a/board/Synology/ds414/cmd_syno.c +++ b/board/Synology/ds414/cmd_syno.c @@ -5,6 +5,7 @@ * Copyright (C) 2015 Phil Sutter */ +#include #include #include #include diff --git a/board/Synology/ds414/ds414.c b/board/Synology/ds414/ds414.c index 8db810ad3eb..abe6f9eb5e2 100644 --- a/board/Synology/ds414/ds414.c +++ b/board/Synology/ds414/ds414.c @@ -4,6 +4,7 @@ * Copyright (C) 2015 Phil Sutter */ +#include #include #include #include diff --git a/board/advantech/imx8mp_rsb3720a1/imx8mp_rsb3720a1.c b/board/advantech/imx8mp_rsb3720a1/imx8mp_rsb3720a1.c index 070933fb54b..d87fe3606f6 100644 --- a/board/advantech/imx8mp_rsb3720a1/imx8mp_rsb3720a1.c +++ b/board/advantech/imx8mp_rsb3720a1/imx8mp_rsb3720a1.c @@ -4,6 +4,7 @@ * Copyright 2022 Linaro */ +#include #include #include #include diff --git a/board/advantech/imx8mp_rsb3720a1/spl.c b/board/advantech/imx8mp_rsb3720a1/spl.c index 1f7c1f25adc..f4257bc993d 100644 --- a/board/advantech/imx8mp_rsb3720a1/spl.c +++ b/board/advantech/imx8mp_rsb3720a1/spl.c @@ -4,7 +4,7 @@ * Copyright 2022 Linaro */ -#include +#include #include #include #include diff --git a/board/advantech/imx8qm_dmsse20_a1/imx8qm_dmsse20_a1.c b/board/advantech/imx8qm_dmsse20_a1/imx8qm_dmsse20_a1.c index 50b35db5f6c..56b7bdb57c9 100644 --- a/board/advantech/imx8qm_dmsse20_a1/imx8qm_dmsse20_a1.c +++ b/board/advantech/imx8qm_dmsse20_a1/imx8qm_dmsse20_a1.c @@ -4,6 +4,7 @@ * Copyright 2019-2023 Kococonnector GmbH */ +#include #include #include #include diff --git a/board/advantech/imx8qm_dmsse20_a1/spl.c b/board/advantech/imx8qm_dmsse20_a1/spl.c index 93cf0744002..e8959ede51d 100644 --- a/board/advantech/imx8qm_dmsse20_a1/spl.c +++ b/board/advantech/imx8qm_dmsse20_a1/spl.c @@ -3,7 +3,7 @@ * Copyright 2017-2018 NXP * Copyright 2019-2023 Kococonnector GmbH */ -#include +#include #include #include #include diff --git a/board/advantech/imx8qm_rom7720_a1/imx8qm_rom7720_a1.c b/board/advantech/imx8qm_rom7720_a1/imx8qm_rom7720_a1.c index 3def182f296..7f766a688bb 100644 --- a/board/advantech/imx8qm_rom7720_a1/imx8qm_rom7720_a1.c +++ b/board/advantech/imx8qm_rom7720_a1/imx8qm_rom7720_a1.c @@ -4,6 +4,7 @@ * Copyright (C) 2019 Oliver Graute */ +#include #include #include #include diff --git a/board/advantech/imx8qm_rom7720_a1/spl.c b/board/advantech/imx8qm_rom7720_a1/spl.c index 5863e335a8b..d32400101fc 100644 --- a/board/advantech/imx8qm_rom7720_a1/spl.c +++ b/board/advantech/imx8qm_rom7720_a1/spl.c @@ -2,7 +2,7 @@ /* * Copyright 2017-2018 NXP */ -#include +#include #include #include #include diff --git a/board/advantech/som-db5800-som-6867/som-db5800-som-6867.c b/board/advantech/som-db5800-som-6867/som-db5800-som-6867.c index 9bbd5fd291a..8499fc541fa 100644 --- a/board/advantech/som-db5800-som-6867/som-db5800-som-6867.c +++ b/board/advantech/som-db5800-som-6867/som-db5800-som-6867.c @@ -4,6 +4,7 @@ * Copyright (C) 2016 George McCollister */ +#include #include #include diff --git a/board/alliedtelesis/SBx81LIFKW/sbx81lifkw.c b/board/alliedtelesis/SBx81LIFKW/sbx81lifkw.c index 5e6d6c6234f..e0a7f3fa89f 100644 --- a/board/alliedtelesis/SBx81LIFKW/sbx81lifkw.c +++ b/board/alliedtelesis/SBx81LIFKW/sbx81lifkw.c @@ -4,6 +4,7 @@ * Allied Telesis */ +#include #include #include #include diff --git a/board/alliedtelesis/SBx81LIFXCAT/sbx81lifxcat.c b/board/alliedtelesis/SBx81LIFXCAT/sbx81lifxcat.c index f30821c1796..52b8eba92fc 100644 --- a/board/alliedtelesis/SBx81LIFXCAT/sbx81lifxcat.c +++ b/board/alliedtelesis/SBx81LIFXCAT/sbx81lifxcat.c @@ -4,6 +4,7 @@ * Allied Telesis */ +#include #include #include #include diff --git a/board/alliedtelesis/common/gpio_hog.c b/board/alliedtelesis/common/gpio_hog.c index 7da70fb4f7d..4aecf7e2cef 100644 --- a/board/alliedtelesis/common/gpio_hog.c +++ b/board/alliedtelesis/common/gpio_hog.c @@ -3,6 +3,7 @@ * Copyright (C) 2018 Allied Telesis Labs */ +#include #include #include #include diff --git a/board/alliedtelesis/x240/x240.c b/board/alliedtelesis/x240/x240.c index c1b7cc3b613..0c4f8e03b85 100644 --- a/board/alliedtelesis/x240/x240.c +++ b/board/alliedtelesis/x240/x240.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ -#include +#include #include DECLARE_GLOBAL_DATA_PTR; diff --git a/board/alliedtelesis/x530/x530.c b/board/alliedtelesis/x530/x530.c index 65e6d48db0a..80ad62c2c66 100644 --- a/board/alliedtelesis/x530/x530.c +++ b/board/alliedtelesis/x530/x530.c @@ -3,7 +3,7 @@ * Copyright (C) 2017 Allied Telesis Labs */ -#include +#include #include #include #include diff --git a/board/amarula/vyasa-rk3288/vyasa-rk3288.c b/board/amarula/vyasa-rk3288/vyasa-rk3288.c index b220256c67f..92e0698c534 100644 --- a/board/amarula/vyasa-rk3288/vyasa-rk3288.c +++ b/board/amarula/vyasa-rk3288/vyasa-rk3288.c @@ -3,6 +3,7 @@ * Copyright (C) 2017 Amarula Solutions */ +#include #include #ifndef CONFIG_TPL_BUILD diff --git a/board/amlogic/beelink-s922x/beelink-s922x.c b/board/amlogic/beelink-s922x/beelink-s922x.c index ccb2f7d1bb1..c2776310a3d 100644 --- a/board/amlogic/beelink-s922x/beelink-s922x.c +++ b/board/amlogic/beelink-s922x/beelink-s922x.c @@ -4,6 +4,7 @@ * Author: Neil Armstrong */ +#include #include #include #include diff --git a/board/amlogic/jethub-j100/jethub-j100.c b/board/amlogic/jethub-j100/jethub-j100.c index b770a1f8c53..010fc0df7d1 100644 --- a/board/amlogic/jethub-j100/jethub-j100.c +++ b/board/amlogic/jethub-j100/jethub-j100.c @@ -4,6 +4,7 @@ * Author: Vyacheslav Bocharov */ +#include #include #include #include diff --git a/board/amlogic/jethub-j80/jethub-j80.c b/board/amlogic/jethub-j80/jethub-j80.c index 07a08dcd170..0b781666e98 100644 --- a/board/amlogic/jethub-j80/jethub-j80.c +++ b/board/amlogic/jethub-j80/jethub-j80.c @@ -6,6 +6,7 @@ * */ +#include #include #include #include diff --git a/board/amlogic/odroid-go-ultra/odroid-go-ultra.c b/board/amlogic/odroid-go-ultra/odroid-go-ultra.c index 8f3f2045d74..bbd23e20fcd 100644 --- a/board/amlogic/odroid-go-ultra/odroid-go-ultra.c +++ b/board/amlogic/odroid-go-ultra/odroid-go-ultra.c @@ -3,7 +3,7 @@ * Copyright (C) 2023 Neil Armstrong */ -#include +#include #include #include diff --git a/board/amlogic/odroid-n2/odroid-n2.c b/board/amlogic/odroid-n2/odroid-n2.c index ae953d0e4ba..a4bcc62174a 100644 --- a/board/amlogic/odroid-n2/odroid-n2.c +++ b/board/amlogic/odroid-n2/odroid-n2.c @@ -4,6 +4,7 @@ * Author: Neil Armstrong */ +#include #include #include #include diff --git a/board/amlogic/p200/p200.c b/board/amlogic/p200/p200.c index 3bede46b324..754242e4a9f 100644 --- a/board/amlogic/p200/p200.c +++ b/board/amlogic/p200/p200.c @@ -3,6 +3,7 @@ * (C) Copyright 2016 Beniamino Galvani */ +#include #include #include #include diff --git a/board/amlogic/p201/p201.c b/board/amlogic/p201/p201.c index d44ebae07dd..769e2735d27 100644 --- a/board/amlogic/p201/p201.c +++ b/board/amlogic/p201/p201.c @@ -3,6 +3,7 @@ * (C) Copyright 2016 Beniamino Galvani */ +#include #include #include #include diff --git a/board/amlogic/p212/p212.c b/board/amlogic/p212/p212.c index ae9834c0bf8..f6e60ae3af1 100644 --- a/board/amlogic/p212/p212.c +++ b/board/amlogic/p212/p212.c @@ -4,6 +4,7 @@ * Author: Neil Armstrong */ +#include #include #include #include diff --git a/board/amlogic/q200/q200.c b/board/amlogic/q200/q200.c index 0c0afccb38c..47f1566a9d3 100644 --- a/board/amlogic/q200/q200.c +++ b/board/amlogic/q200/q200.c @@ -4,6 +4,7 @@ * Author: Neil Armstrong */ +#include #include #include #include diff --git a/board/amlogic/s400/s400.c b/board/amlogic/s400/s400.c index 96244c9ccb1..06a9044fd80 100644 --- a/board/amlogic/s400/s400.c +++ b/board/amlogic/s400/s400.c @@ -4,6 +4,7 @@ * Author: Neil Armstrong */ +#include #include #include #include diff --git a/board/amlogic/sei510/sei510.c b/board/amlogic/sei510/sei510.c index 1a978d1290a..bb188c21f75 100644 --- a/board/amlogic/sei510/sei510.c +++ b/board/amlogic/sei510/sei510.c @@ -4,6 +4,7 @@ * Author: Neil Armstrong */ +#include #include #include #include diff --git a/board/amlogic/sei610/sei610.c b/board/amlogic/sei610/sei610.c index 8a096b15bfb..6490bac9eb5 100644 --- a/board/amlogic/sei610/sei610.c +++ b/board/amlogic/sei610/sei610.c @@ -4,6 +4,7 @@ * Author: Neil Armstrong */ +#include #include #include #include diff --git a/board/amlogic/u200/u200.c b/board/amlogic/u200/u200.c index 96244c9ccb1..06a9044fd80 100644 --- a/board/amlogic/u200/u200.c +++ b/board/amlogic/u200/u200.c @@ -4,6 +4,7 @@ * Author: Neil Armstrong */ +#include #include #include #include diff --git a/board/amlogic/vim3/vim3.c b/board/amlogic/vim3/vim3.c index bbc2d826e05..a4850364f41 100644 --- a/board/amlogic/vim3/vim3.c +++ b/board/amlogic/vim3/vim3.c @@ -4,6 +4,7 @@ * Author: Neil Armstrong */ +#include #include #include #include diff --git a/board/amlogic/w400/w400.c b/board/amlogic/w400/w400.c index b84366aaeb1..4199198496b 100644 --- a/board/amlogic/w400/w400.c +++ b/board/amlogic/w400/w400.c @@ -4,6 +4,7 @@ * Author: Neil Armstrong */ +#include #include #include #include diff --git a/board/aristainetos/aristainetos.c b/board/aristainetos/aristainetos.c index 8cfac9fbb34..17f37badd74 100644 --- a/board/aristainetos/aristainetos.c +++ b/board/aristainetos/aristainetos.c @@ -9,6 +9,7 @@ * Author: Fabio Estevam */ +#include #include #include #include diff --git a/board/armadeus/opos6uldev/board.c b/board/armadeus/opos6uldev/board.c index 5b25545cdb8..365fdca1b76 100644 --- a/board/armadeus/opos6uldev/board.c +++ b/board/armadeus/opos6uldev/board.c @@ -3,6 +3,7 @@ * Copyright (C) 2018 Armadeus Systems */ +#include #include #include #include diff --git a/board/armltd/corstone1000/corstone1000.c b/board/armltd/corstone1000/corstone1000.c index 3ad77f51949..01c80aaf9d7 100644 --- a/board/armltd/corstone1000/corstone1000.c +++ b/board/armltd/corstone1000/corstone1000.c @@ -6,6 +6,7 @@ */ #include +#include #include #include #include diff --git a/board/armltd/integrator/integrator.c b/board/armltd/integrator/integrator.c index eaf87e3bfe3..ad02cf16da5 100644 --- a/board/armltd/integrator/integrator.c +++ b/board/armltd/integrator/integrator.c @@ -16,7 +16,7 @@ * Philippe Robin, */ -#include +#include #include #include #include diff --git a/board/armltd/integrator/timer.c b/board/armltd/integrator/timer.c index f4101b649e3..9db5135a8ff 100644 --- a/board/armltd/integrator/timer.c +++ b/board/armltd/integrator/timer.c @@ -16,7 +16,7 @@ * Philippe Robin, */ -#include +#include #include #include #include diff --git a/board/armltd/total_compute/total_compute.c b/board/armltd/total_compute/total_compute.c index e1b4f49d044..53941b5f5f2 100644 --- a/board/armltd/total_compute/total_compute.c +++ b/board/armltd/total_compute/total_compute.c @@ -4,7 +4,7 @@ * Usama Arif */ -#include +#include #include #include #include diff --git a/board/armltd/vexpress/vexpress_common.c b/board/armltd/vexpress/vexpress_common.c index 6c374e25e32..763131c217e 100644 --- a/board/armltd/vexpress/vexpress_common.c +++ b/board/armltd/vexpress/vexpress_common.c @@ -15,7 +15,7 @@ * ARM Ltd. * Philippe Robin, */ -#include +#include #include #include #include diff --git a/board/armltd/vexpress64/pcie.c b/board/armltd/vexpress64/pcie.c index 1045c905f73..e553da86e0e 100644 --- a/board/armltd/vexpress64/pcie.c +++ b/board/armltd/vexpress64/pcie.c @@ -5,6 +5,7 @@ * Author: Liviu Dudau */ +#include #include #include #include diff --git a/board/armltd/vexpress64/vexpress64.c b/board/armltd/vexpress64/vexpress64.c index 0119f54f0df..ee65a596838 100644 --- a/board/armltd/vexpress64/vexpress64.c +++ b/board/armltd/vexpress64/vexpress64.c @@ -4,7 +4,7 @@ * David Feng * Sharma Bhupesh */ -#include +#include #include #include #include diff --git a/board/astro/mcf5373l/fpga.c b/board/astro/mcf5373l/fpga.c index 6e505c630d1..f85737432b3 100644 --- a/board/astro/mcf5373l/fpga.c +++ b/board/astro/mcf5373l/fpga.c @@ -13,6 +13,7 @@ /* Altera/Xilinx FPGA configuration support for the ASTRO "URMEL" board */ +#include #include #include #include diff --git a/board/astro/mcf5373l/mcf5373l.c b/board/astro/mcf5373l/mcf5373l.c index 43fcbc65513..43563c41279 100644 --- a/board/astro/mcf5373l/mcf5373l.c +++ b/board/astro/mcf5373l/mcf5373l.c @@ -5,10 +5,9 @@ * modified by Wolfgang Wegner for ASTRO 5373l */ -#include +#include #include #include -#include #include #include #include diff --git a/board/atmel/at91sam9260ek/at91sam9260ek.c b/board/atmel/at91sam9260ek/at91sam9260ek.c index 48aec652c4a..b8e02f45903 100644 --- a/board/atmel/at91sam9260ek/at91sam9260ek.c +++ b/board/atmel/at91sam9260ek/at91sam9260ek.c @@ -5,7 +5,7 @@ * Lead Tech Design */ -#include +#include #include #include #include diff --git a/board/atmel/at91sam9261ek/at91sam9261ek.c b/board/atmel/at91sam9261ek/at91sam9261ek.c index 5d7a18379fa..eab3a130819 100644 --- a/board/atmel/at91sam9261ek/at91sam9261ek.c +++ b/board/atmel/at91sam9261ek/at91sam9261ek.c @@ -5,7 +5,7 @@ * Lead Tech Design */ -#include +#include #include #include #include diff --git a/board/atmel/at91sam9263ek/at91sam9263ek.c b/board/atmel/at91sam9263ek/at91sam9263ek.c index 2b0b01798ea..15f20b62f67 100644 --- a/board/atmel/at91sam9263ek/at91sam9263ek.c +++ b/board/atmel/at91sam9263ek/at91sam9263ek.c @@ -5,7 +5,7 @@ * Lead Tech Design */ -#include +#include #include #include #include diff --git a/board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c b/board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c index 3bd94d0889d..f53c1cf612d 100644 --- a/board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c +++ b/board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c @@ -5,7 +5,7 @@ * Lead Tech Design */ -#include +#include #include #include #include diff --git a/board/atmel/at91sam9n12ek/at91sam9n12ek.c b/board/atmel/at91sam9n12ek/at91sam9n12ek.c index afc0c0520e1..a3e294c88fc 100644 --- a/board/atmel/at91sam9n12ek/at91sam9n12ek.c +++ b/board/atmel/at91sam9n12ek/at91sam9n12ek.c @@ -4,7 +4,7 @@ * Josh Wu */ -#include +#include #include #include #include diff --git a/board/atmel/at91sam9rlek/at91sam9rlek.c b/board/atmel/at91sam9rlek/at91sam9rlek.c index 214e917381e..11725f778b7 100644 --- a/board/atmel/at91sam9rlek/at91sam9rlek.c +++ b/board/atmel/at91sam9rlek/at91sam9rlek.c @@ -5,7 +5,7 @@ * Lead Tech Design */ -#include +#include #include #include #include diff --git a/board/atmel/at91sam9x5ek/at91sam9x5ek.c b/board/atmel/at91sam9x5ek/at91sam9x5ek.c index e5688c6cf13..ab666b6be34 100644 --- a/board/atmel/at91sam9x5ek/at91sam9x5ek.c +++ b/board/atmel/at91sam9x5ek/at91sam9x5ek.c @@ -3,7 +3,7 @@ * Copyright (C) 2012 Atmel Corporation */ -#include +#include #include #include #include diff --git a/board/atmel/common/board.c b/board/atmel/common/board.c index 55afd43d4f3..c93c0e52e30 100644 --- a/board/atmel/common/board.c +++ b/board/atmel/common/board.c @@ -4,6 +4,7 @@ * Wenyou Yang */ +#include #include #include #include diff --git a/board/atmel/common/mac-spi-nor.c b/board/atmel/common/mac-spi-nor.c index 628f7958129..ced27b65e63 100644 --- a/board/atmel/common/mac-spi-nor.c +++ b/board/atmel/common/mac-spi-nor.c @@ -5,6 +5,7 @@ * Author: Tudor Ambarus */ +#include #include #include #include diff --git a/board/atmel/common/mac_eeprom.c b/board/atmel/common/mac_eeprom.c index 97edb7a549d..4606008c697 100644 --- a/board/atmel/common/mac_eeprom.c +++ b/board/atmel/common/mac_eeprom.c @@ -4,7 +4,9 @@ * Wenyou Yang */ +#include #include +#include #include #include #include diff --git a/board/atmel/common/video_display.c b/board/atmel/common/video_display.c index 77188820581..a5049f4aad4 100644 --- a/board/atmel/common/video_display.c +++ b/board/atmel/common/video_display.c @@ -4,6 +4,7 @@ * Wenyou Yang */ +#include #include #include #include diff --git a/board/atmel/sam9x60_curiosity/sam9x60_curiosity.c b/board/atmel/sam9x60_curiosity/sam9x60_curiosity.c index e75043ec00f..f53d359404e 100644 --- a/board/atmel/sam9x60_curiosity/sam9x60_curiosity.c +++ b/board/atmel/sam9x60_curiosity/sam9x60_curiosity.c @@ -5,6 +5,7 @@ * Author: Durai Manickam KR */ +#include #include #include #include diff --git a/board/atmel/sam9x60ek/sam9x60ek.c b/board/atmel/sam9x60ek/sam9x60ek.c index 2e5073f02b3..3fbfca4acc9 100644 --- a/board/atmel/sam9x60ek/sam9x60ek.c +++ b/board/atmel/sam9x60ek/sam9x60ek.c @@ -5,7 +5,7 @@ * Author: Sandeep Sheriker M */ -#include +#include #include #include #include diff --git a/board/atmel/sama5d27_som1_ek/sama5d27_som1_ek.c b/board/atmel/sama5d27_som1_ek/sama5d27_som1_ek.c index 36995a927cf..329eac7223a 100644 --- a/board/atmel/sama5d27_som1_ek/sama5d27_som1_ek.c +++ b/board/atmel/sama5d27_som1_ek/sama5d27_som1_ek.c @@ -4,6 +4,7 @@ * Wenyou.Yang */ +#include #include #include #include diff --git a/board/atmel/sama5d27_wlsom1_ek/sama5d27_wlsom1_ek.c b/board/atmel/sama5d27_wlsom1_ek/sama5d27_wlsom1_ek.c index c775d593e58..6e41017af17 100644 --- a/board/atmel/sama5d27_wlsom1_ek/sama5d27_wlsom1_ek.c +++ b/board/atmel/sama5d27_wlsom1_ek/sama5d27_wlsom1_ek.c @@ -5,7 +5,7 @@ * Author: Nicolas Ferre */ -#include +#include #include #include #include diff --git a/board/atmel/sama5d29_curiosity/sama5d29_curiosity.c b/board/atmel/sama5d29_curiosity/sama5d29_curiosity.c index 8759ff6f01a..d0679317fb2 100644 --- a/board/atmel/sama5d29_curiosity/sama5d29_curiosity.c +++ b/board/atmel/sama5d29_curiosity/sama5d29_curiosity.c @@ -6,6 +6,7 @@ * */ +#include #include #include #include diff --git a/board/atmel/sama5d2_icp/sama5d2_icp.c b/board/atmel/sama5d2_icp/sama5d2_icp.c index 986da01639f..fabe492715a 100644 --- a/board/atmel/sama5d2_icp/sama5d2_icp.c +++ b/board/atmel/sama5d2_icp/sama5d2_icp.c @@ -4,7 +4,7 @@ * Eugen Hristev */ -#include +#include #include #include #include diff --git a/board/atmel/sama5d2_ptc_ek/sama5d2_ptc_ek.c b/board/atmel/sama5d2_ptc_ek/sama5d2_ptc_ek.c index 438829df82d..854715ea226 100644 --- a/board/atmel/sama5d2_ptc_ek/sama5d2_ptc_ek.c +++ b/board/atmel/sama5d2_ptc_ek/sama5d2_ptc_ek.c @@ -4,7 +4,7 @@ * Wenyou Yang */ -#include +#include #include #include #include diff --git a/board/atmel/sama5d2_xplained/sama5d2_xplained.c b/board/atmel/sama5d2_xplained/sama5d2_xplained.c index c8a8eb49826..aa522075691 100644 --- a/board/atmel/sama5d2_xplained/sama5d2_xplained.c +++ b/board/atmel/sama5d2_xplained/sama5d2_xplained.c @@ -4,6 +4,7 @@ * Wenyou.Yang */ +#include #include #include #include diff --git a/board/atmel/sama5d3_xplained/sama5d3_xplained.c b/board/atmel/sama5d3_xplained/sama5d3_xplained.c index 54cc3c4d900..ce73a801e50 100644 --- a/board/atmel/sama5d3_xplained/sama5d3_xplained.c +++ b/board/atmel/sama5d3_xplained/sama5d3_xplained.c @@ -4,7 +4,7 @@ * Bo Shen */ -#include +#include #include #include #include diff --git a/board/atmel/sama5d3xek/sama5d3xek.c b/board/atmel/sama5d3xek/sama5d3xek.c index f2e1242fcb0..660a6b9d583 100644 --- a/board/atmel/sama5d3xek/sama5d3xek.c +++ b/board/atmel/sama5d3xek/sama5d3xek.c @@ -4,7 +4,7 @@ * Bo Shen */ -#include +#include #include #include #include diff --git a/board/atmel/sama5d4_xplained/sama5d4_xplained.c b/board/atmel/sama5d4_xplained/sama5d4_xplained.c index 09ca16ca88c..780aba15ab1 100644 --- a/board/atmel/sama5d4_xplained/sama5d4_xplained.c +++ b/board/atmel/sama5d4_xplained/sama5d4_xplained.c @@ -4,7 +4,7 @@ * Bo Shen */ -#include +#include #include #include #include diff --git a/board/atmel/sama5d4ek/sama5d4ek.c b/board/atmel/sama5d4ek/sama5d4ek.c index 1f8b85f0614..2226906a3b3 100644 --- a/board/atmel/sama5d4ek/sama5d4ek.c +++ b/board/atmel/sama5d4ek/sama5d4ek.c @@ -4,7 +4,7 @@ * Bo Shen */ -#include +#include #include #include #include diff --git a/board/atmel/sama7g54_curiosity/sama7g54_curiosity.c b/board/atmel/sama7g54_curiosity/sama7g54_curiosity.c index b05c9754c96..33cd0903d25 100644 --- a/board/atmel/sama7g54_curiosity/sama7g54_curiosity.c +++ b/board/atmel/sama7g54_curiosity/sama7g54_curiosity.c @@ -6,6 +6,7 @@ * */ +#include #include #include #include diff --git a/board/atmel/sama7g5ek/sama7g5ek.c b/board/atmel/sama7g5ek/sama7g5ek.c index c07115a2119..295fd079dcf 100644 --- a/board/atmel/sama7g5ek/sama7g5ek.c +++ b/board/atmel/sama7g5ek/sama7g5ek.c @@ -4,7 +4,7 @@ * Eugen Hristev */ -#include +#include #include #include #include diff --git a/board/avionic-design/common/tamonten-ng.c b/board/avionic-design/common/tamonten-ng.c index e35bda81468..29bde60228f 100644 --- a/board/avionic-design/common/tamonten-ng.c +++ b/board/avionic-design/common/tamonten-ng.c @@ -4,6 +4,7 @@ * Avionic Design GmbH */ +#include #include #include #include diff --git a/board/avionic-design/common/tamonten.c b/board/avionic-design/common/tamonten.c index 4d7477237d4..988f057a281 100644 --- a/board/avionic-design/common/tamonten.c +++ b/board/avionic-design/common/tamonten.c @@ -6,6 +6,7 @@ * Avionic Design GmbH */ +#include #include #include #include diff --git a/board/avionic-design/tec-ng/tec-ng-spl.c b/board/avionic-design/tec-ng/tec-ng-spl.c index 25049452495..6e544641833 100644 --- a/board/avionic-design/tec-ng/tec-ng-spl.c +++ b/board/avionic-design/tec-ng/tec-ng-spl.c @@ -7,6 +7,7 @@ * Svyatoslav Ryhel */ +#include #include #include diff --git a/board/beacon/beacon-rzg2m/beacon-rzg2m.c b/board/beacon/beacon-rzg2m/beacon-rzg2m.c index 099053235de..99fe1edfb33 100644 --- a/board/beacon/beacon-rzg2m/beacon-rzg2m.c +++ b/board/beacon/beacon-rzg2m/beacon-rzg2m.c @@ -3,6 +3,7 @@ * Copyright 2020 Compass Electronics Group, LLC */ +#include #include #include diff --git a/board/beacon/imx8mm/lpddr4_timing.c b/board/beacon/imx8mm/lpddr4_timing.c index c1498dd5eaf..8e48b9d81b7 100644 --- a/board/beacon/imx8mm/lpddr4_timing.c +++ b/board/beacon/imx8mm/lpddr4_timing.c @@ -4,6 +4,7 @@ */ #include +#include #include #include diff --git a/board/beacon/imx8mm/spl.c b/board/beacon/imx8mm/spl.c index 12013aa5a4d..1632238bf5d 100644 --- a/board/beacon/imx8mm/spl.c +++ b/board/beacon/imx8mm/spl.c @@ -1,5 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ +#include #include #include #include diff --git a/board/beacon/imx8mn/spl.c b/board/beacon/imx8mn/spl.c index f03841e5a01..b4d46f11f98 100644 --- a/board/beacon/imx8mn/spl.c +++ b/board/beacon/imx8mn/spl.c @@ -3,6 +3,7 @@ * Copyright 2020 Compass Electronics Group, LLC */ +#include #include #include #include diff --git a/board/beacon/imx8mp/imx8mp_beacon.c b/board/beacon/imx8mp/imx8mp_beacon.c index dd74e7c0f75..8963a51fbba 100644 --- a/board/beacon/imx8mp/imx8mp_beacon.c +++ b/board/beacon/imx8mp/imx8mp_beacon.c @@ -1,6 +1,7 @@ // SPDX-License-Identifier: GPL-2.0+ /* Copyright 2023 Logic PD, Inc dba Beacon EmbeddedWorks */ +#include #include #include #include diff --git a/board/beacon/imx8mp/spl.c b/board/beacon/imx8mp/spl.c index 30d577f7e0e..591e8ca9ab5 100644 --- a/board/beacon/imx8mp/spl.c +++ b/board/beacon/imx8mp/spl.c @@ -4,6 +4,7 @@ * */ +#include #include #include #include diff --git a/board/beagle/beagle/beagle.c b/board/beagle/beagle/beagle.c index ac2f89cf213..847d596646e 100644 --- a/board/beagle/beagle/beagle.c +++ b/board/beagle/beagle/beagle.c @@ -12,7 +12,7 @@ * Syed Mohammed Khasim * */ -#include +#include #include #include #include diff --git a/board/beagle/beagle/led.c b/board/beagle/beagle/led.c index efbd7c1e0e3..e21c0169db7 100644 --- a/board/beagle/beagle/led.c +++ b/board/beagle/beagle/led.c @@ -3,6 +3,7 @@ * Copyright (c) 2010 Texas Instruments, Inc. * Jason Kridner */ +#include #include #include #include diff --git a/board/beckhoff/mx53cx9020/mx53cx9020.c b/board/beckhoff/mx53cx9020/mx53cx9020.c index 3a766728a6f..e7b131836b6 100644 --- a/board/beckhoff/mx53cx9020/mx53cx9020.c +++ b/board/beckhoff/mx53cx9020/mx53cx9020.c @@ -7,6 +7,7 @@ * Copyright (C) 2011 Freescale Semiconductor, Inc. */ +#include #include #include #include diff --git a/board/beckhoff/mx53cx9020/mx53cx9020_video.c b/board/beckhoff/mx53cx9020/mx53cx9020_video.c index fd28a70f4d7..bf472902562 100644 --- a/board/beckhoff/mx53cx9020/mx53cx9020_video.c +++ b/board/beckhoff/mx53cx9020/mx53cx9020_video.c @@ -7,6 +7,7 @@ * Copyright (C) 2012 Freescale Semiconductor, Inc. */ +#include #include #include #include diff --git a/board/bluewater/gurnard/gurnard.c b/board/bluewater/gurnard/gurnard.c index 3275803226a..9b42299b080 100644 --- a/board/bluewater/gurnard/gurnard.c +++ b/board/bluewater/gurnard/gurnard.c @@ -7,7 +7,7 @@ * Author: Ryan Mallon */ -#include +#include #include #include #include diff --git a/board/bosch/acc/acc.c b/board/bosch/acc/acc.c index a1a00e7ffc4..65c2f356713 100644 --- a/board/bosch/acc/acc.c +++ b/board/bosch/acc/acc.c @@ -5,7 +5,7 @@ * Copyright (c) 2022 DENX Software Engineering GmbH, Philip Oberfichtner */ -#include +#include #include #include #include diff --git a/board/bosch/guardian/board.c b/board/bosch/guardian/board.c index 41d7567ad21..ee9e6d632ed 100644 --- a/board/bosch/guardian/board.c +++ b/board/bosch/guardian/board.c @@ -8,7 +8,7 @@ * Copyright (C) 2018 Robert Bosch Power Tools GmbH */ -#include +#include #include #include #include diff --git a/board/bosch/guardian/mux.c b/board/bosch/guardian/mux.c index eab3398c4ae..53850ffb8f7 100644 --- a/board/bosch/guardian/mux.c +++ b/board/bosch/guardian/mux.c @@ -6,6 +6,7 @@ * Copyright (C) 2018 Robert Bosch Power Tools GmbH */ +#include #include #include #include diff --git a/board/bosch/shc/board.c b/board/bosch/shc/board.c index ab688745938..aebdfd4dfec 100644 --- a/board/bosch/shc/board.c +++ b/board/bosch/shc/board.c @@ -11,7 +11,7 @@ * Copyright (C) 2011, Texas Instruments, Incorporated - https://www.ti.com/ */ -#include +#include #include #include #include diff --git a/board/bosch/shc/mux.c b/board/bosch/shc/mux.c index a2a8947a3bd..f19d1866c72 100644 --- a/board/bosch/shc/mux.c +++ b/board/bosch/shc/mux.c @@ -9,6 +9,7 @@ * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/ */ +#include #include #include #include diff --git a/board/boundary/nitrogen6x/nitrogen6x.c b/board/boundary/nitrogen6x/nitrogen6x.c index 2b0cb2361c4..382c01ddf4e 100644 --- a/board/boundary/nitrogen6x/nitrogen6x.c +++ b/board/boundary/nitrogen6x/nitrogen6x.c @@ -4,6 +4,7 @@ * Copyright (C) 2013, Boundary Devices */ +#include #include #include #include diff --git a/board/broadcom/bcmbca/board.c b/board/broadcom/bcmbca/board.c index a6ced92565f..bcecb4d7839 100644 --- a/board/broadcom/bcmbca/board.c +++ b/board/broadcom/bcmbca/board.c @@ -3,6 +3,7 @@ * (C) Copyright 2022 Broadcom Ltd. */ +#include #include int board_init(void) diff --git a/board/broadcom/bcmns/ns.c b/board/broadcom/bcmns/ns.c index 45cc62936ce..1249e45af03 100644 --- a/board/broadcom/bcmns/ns.c +++ b/board/broadcom/bcmns/ns.c @@ -4,6 +4,7 @@ * Copyright (C) 2023 Linus Walleij */ +#include #include #include #include diff --git a/board/broadcom/bcmns3/ns3.c b/board/broadcom/bcmns3/ns3.c index bb2f1e4f62a..7ae6742c4be 100644 --- a/board/broadcom/bcmns3/ns3.c +++ b/board/broadcom/bcmns3/ns3.c @@ -4,8 +4,8 @@ * */ +#include #include -#include #include #include #include diff --git a/board/broadcom/bcmstb/bcmstb.c b/board/broadcom/bcmstb/bcmstb.c index bc05aecc446..aead6f099e8 100644 --- a/board/broadcom/bcmstb/bcmstb.c +++ b/board/broadcom/bcmstb/bcmstb.c @@ -12,6 +12,7 @@ #include #include #include +#include #include #include #include diff --git a/board/bsh/imx6ulz_smm_m2/imx6ulz_smm_m2.c b/board/bsh/imx6ulz_smm_m2/imx6ulz_smm_m2.c index c03e390762a..c82eabbfbea 100644 --- a/board/bsh/imx6ulz_smm_m2/imx6ulz_smm_m2.c +++ b/board/bsh/imx6ulz_smm_m2/imx6ulz_smm_m2.c @@ -14,6 +14,7 @@ #include #include #include +#include #include #include diff --git a/board/bsh/imx6ulz_smm_m2/spl.c b/board/bsh/imx6ulz_smm_m2/spl.c index 724841b5745..5b4812e129e 100644 --- a/board/bsh/imx6ulz_smm_m2/spl.c +++ b/board/bsh/imx6ulz_smm_m2/spl.c @@ -1,5 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ +#include #include #include #include diff --git a/board/bsh/imx8mn_smm_s2/imx8mn_smm_s2.c b/board/bsh/imx8mn_smm_s2/imx8mn_smm_s2.c index c9989687399..0ebf208be82 100644 --- a/board/bsh/imx8mn_smm_s2/imx8mn_smm_s2.c +++ b/board/bsh/imx8mn_smm_s2/imx8mn_smm_s2.c @@ -3,6 +3,7 @@ * Copyright 2021 Collabora Ltd. */ +#include #include #include diff --git a/board/bticino/mamoj/mamoj.c b/board/bticino/mamoj/mamoj.c index 71497b8ab1e..c9da42b43bf 100644 --- a/board/bticino/mamoj/mamoj.c +++ b/board/bticino/mamoj/mamoj.c @@ -5,6 +5,7 @@ * Copyright (C) 2018 Jagan Teki */ +#include #include #include #include diff --git a/board/bticino/mamoj/spl.c b/board/bticino/mamoj/spl.c index 59b7c24ccc9..883b7f4133b 100644 --- a/board/bticino/mamoj/spl.c +++ b/board/bticino/mamoj/spl.c @@ -5,6 +5,7 @@ * Copyright (C) 2018 Jagan Teki */ +#include #include #include #include diff --git a/board/buffalo/lsxl/lsxl.c b/board/buffalo/lsxl/lsxl.c index 1e501a09813..6a866b5470d 100644 --- a/board/buffalo/lsxl/lsxl.c +++ b/board/buffalo/lsxl/lsxl.c @@ -7,6 +7,7 @@ * Marvell Semiconductor */ +#include #include #include #include diff --git a/board/cadence/xtfpga/xtfpga.c b/board/cadence/xtfpga/xtfpga.c index 5110fed3119..8e4081b4c6d 100644 --- a/board/cadence/xtfpga/xtfpga.c +++ b/board/cadence/xtfpga/xtfpga.c @@ -4,7 +4,7 @@ * (C) Copyright 2014 - 2016 Cadence Design Systems Inc. */ -#include +#include #include #include #include diff --git a/board/calao/usb_a9263/usb_a9263.c b/board/calao/usb_a9263/usb_a9263.c index 8e39a157ea3..3d31776d484 100644 --- a/board/calao/usb_a9263/usb_a9263.c +++ b/board/calao/usb_a9263/usb_a9263.c @@ -7,7 +7,7 @@ * Mateusz Kulikowski */ -#include +#include #include #include #include diff --git a/board/cavium/thunderx/atf.c b/board/cavium/thunderx/atf.c index ce7afb78ed5..37340fe9700 100644 --- a/board/cavium/thunderx/atf.c +++ b/board/cavium/thunderx/atf.c @@ -3,9 +3,8 @@ * (C) Copyright 2014, Cavium Inc. **/ -#include +#include #include -#include #include #include #include diff --git a/board/cavium/thunderx/thunderx.c b/board/cavium/thunderx/thunderx.c index b1a805c1360..ab20825ed36 100644 --- a/board/cavium/thunderx/thunderx.c +++ b/board/cavium/thunderx/thunderx.c @@ -3,7 +3,7 @@ * (C) Copyright 2014, Cavium Inc. **/ -#include +#include #include #include #include diff --git a/board/cei/cei-tk1-som/cei-tk1-som.c b/board/cei/cei-tk1-som/cei-tk1-som.c index 15b200454da..95ee7bbfe29 100644 --- a/board/cei/cei-tk1-som/cei-tk1-som.c +++ b/board/cei/cei-tk1-som/cei-tk1-som.c @@ -4,7 +4,7 @@ * NVIDIA Corporation */ -#include +#include #include #include diff --git a/board/chipspark/popmetal_rk3288/popmetal-rk3288.c b/board/chipspark/popmetal_rk3288/popmetal-rk3288.c index dd7551170d2..e6909b3b1c5 100644 --- a/board/chipspark/popmetal_rk3288/popmetal-rk3288.c +++ b/board/chipspark/popmetal_rk3288/popmetal-rk3288.c @@ -3,6 +3,7 @@ * (C) Copyright 2016 Rockchip Electronics Co., Ltd */ +#include #include #include diff --git a/board/cloos/imx8mm_phg/imx8mm_phg.c b/board/cloos/imx8mm_phg/imx8mm_phg.c index 091c9a59a52..bc4e984d505 100644 --- a/board/cloos/imx8mm_phg/imx8mm_phg.c +++ b/board/cloos/imx8mm_phg/imx8mm_phg.c @@ -3,6 +3,7 @@ * Copyright 2018 NXP */ +#include #include #include #include diff --git a/board/cloos/imx8mm_phg/spl.c b/board/cloos/imx8mm_phg/spl.c index b8892ed2fcc..0c3a0135a86 100644 --- a/board/cloos/imx8mm_phg/spl.c +++ b/board/cloos/imx8mm_phg/spl.c @@ -3,6 +3,7 @@ * Copyright 2019 NXP */ +#include #include #include #include diff --git a/board/cloudengines/pogo_e02/pogo_e02.c b/board/cloudengines/pogo_e02/pogo_e02.c index 48eee67129f..59e1218b411 100644 --- a/board/cloudengines/pogo_e02/pogo_e02.c +++ b/board/cloudengines/pogo_e02/pogo_e02.c @@ -10,6 +10,7 @@ * Written-by: Prafulla Wadaskar */ +#include #include #include #include diff --git a/board/cloudengines/pogo_v4/pogo_v4.c b/board/cloudengines/pogo_v4/pogo_v4.c index c8ad563f721..61ce0d59c77 100644 --- a/board/cloudengines/pogo_v4/pogo_v4.c +++ b/board/cloudengines/pogo_v4/pogo_v4.c @@ -11,6 +11,7 @@ * Written-by: Prafulla Wadaskar */ +#include #include #include #include diff --git a/board/cobra5272/cobra5272.c b/board/cobra5272/cobra5272.c index 774aa82b57f..69a9df94231 100644 --- a/board/cobra5272/cobra5272.c +++ b/board/cobra5272/cobra5272.c @@ -4,7 +4,7 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ -#include +#include #include #include #include diff --git a/board/cobra5272/flash.c b/board/cobra5272/flash.c index 157b71da85e..8416af163ad 100644 --- a/board/cobra5272/flash.c +++ b/board/cobra5272/flash.c @@ -4,17 +4,13 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ -#include +#include #include #include #include #include -#include -#include #include -#include #include -#include #define PHYS_FLASH_1 CFG_SYS_FLASH_BASE #define FLASH_BANK_SIZE 0x200000 diff --git a/board/compulab/cl-som-imx7/cl-som-imx7.c b/board/compulab/cl-som-imx7/cl-som-imx7.c index 7853c4d024a..af19a658b54 100644 --- a/board/compulab/cl-som-imx7/cl-som-imx7.c +++ b/board/compulab/cl-som-imx7/cl-som-imx7.c @@ -7,7 +7,7 @@ * Author: Uri Mashiach */ -#include +#include #include #include #include diff --git a/board/compulab/cl-som-imx7/common.c b/board/compulab/cl-som-imx7/common.c index ae8e8346620..40ba0f7a960 100644 --- a/board/compulab/cl-som-imx7/common.c +++ b/board/compulab/cl-som-imx7/common.c @@ -7,6 +7,7 @@ * Author: Uri Mashiach */ +#include #include #include #include "common.h" diff --git a/board/compulab/cl-som-imx7/mux.c b/board/compulab/cl-som-imx7/mux.c index 25123ee145a..18f16a48738 100644 --- a/board/compulab/cl-som-imx7/mux.c +++ b/board/compulab/cl-som-imx7/mux.c @@ -7,7 +7,7 @@ * Author: Uri Mashiach */ -#include +#include #include #include diff --git a/board/compulab/cl-som-imx7/spl.c b/board/compulab/cl-som-imx7/spl.c index 9b6bbb974da..98c3b831f1e 100644 --- a/board/compulab/cl-som-imx7/spl.c +++ b/board/compulab/cl-som-imx7/spl.c @@ -7,6 +7,7 @@ * Author: Uri Mashiach */ +#include #include #include #include diff --git a/board/compulab/cm_fx6/cm_fx6.c b/board/compulab/cm_fx6/cm_fx6.c index 4a6cc3e5630..7bce09e432c 100644 --- a/board/compulab/cm_fx6/cm_fx6.c +++ b/board/compulab/cm_fx6/cm_fx6.c @@ -7,7 +7,7 @@ * Author: Nikita Kiryanov */ -#include +#include #include #include #include diff --git a/board/compulab/cm_fx6/common.c b/board/compulab/cm_fx6/common.c index a71861b1731..ed8c7a3bf5f 100644 --- a/board/compulab/cm_fx6/common.c +++ b/board/compulab/cm_fx6/common.c @@ -7,6 +7,7 @@ * Author: Nikita Kiryanov */ +#include #include #include #include diff --git a/board/compulab/cm_fx6/spl.c b/board/compulab/cm_fx6/spl.c index b11bf2d28c6..079f196200e 100644 --- a/board/compulab/cm_fx6/spl.c +++ b/board/compulab/cm_fx6/spl.c @@ -7,6 +7,7 @@ * Author: Nikita Kiryanov */ +#include #include #include #include diff --git a/board/compulab/cm_t43/cm_t43.c b/board/compulab/cm_t43/cm_t43.c index 181581926c3..5df378a62e3 100644 --- a/board/compulab/cm_t43/cm_t43.c +++ b/board/compulab/cm_t43/cm_t43.c @@ -3,7 +3,7 @@ * Copyright (C) 2015 Compulab, Ltd. */ -#include +#include #include #include #include diff --git a/board/compulab/cm_t43/mux.c b/board/compulab/cm_t43/mux.c index f10910565d5..778ea05e84c 100644 --- a/board/compulab/cm_t43/mux.c +++ b/board/compulab/cm_t43/mux.c @@ -3,6 +3,7 @@ * Copyright (C) 2015 Compulab, Ltd. */ +#include #include #include #include "board.h" diff --git a/board/compulab/cm_t43/spl.c b/board/compulab/cm_t43/spl.c index 212bfeb5c30..a6223a477fe 100644 --- a/board/compulab/cm_t43/spl.c +++ b/board/compulab/cm_t43/spl.c @@ -3,7 +3,7 @@ * Copyright (C) 2016 Compulab, Ltd. */ -#include +#include #include #include #include diff --git a/board/compulab/common/common.c b/board/compulab/common/common.c index 6ffebe6bdb4..528c97df19a 100644 --- a/board/compulab/common/common.c +++ b/board/compulab/common/common.c @@ -5,6 +5,7 @@ * Authors: Igor Grinberg */ +#include #include #include #include diff --git a/board/compulab/common/eeprom.c b/board/compulab/common/eeprom.c index efdaf342d5c..c4b257f851d 100644 --- a/board/compulab/common/eeprom.c +++ b/board/compulab/common/eeprom.c @@ -6,13 +6,13 @@ * Igor Grinberg */ +#include +#include #include -#include #include #include #include #include -#include #include "eeprom.h" #define EEPROM_LAYOUT_VER_OFFSET 44 diff --git a/board/compulab/common/omap3_smc911x.c b/board/compulab/common/omap3_smc911x.c index 411fc4943ba..f0d365272c1 100644 --- a/board/compulab/common/omap3_smc911x.c +++ b/board/compulab/common/omap3_smc911x.c @@ -5,6 +5,7 @@ * Authors: Igor Grinberg */ +#include #include #include diff --git a/board/compulab/imx8mm-cl-iot-gate/ddr/ddr.c b/board/compulab/imx8mm-cl-iot-gate/ddr/ddr.c index 99d3bf3af3b..b230478b611 100644 --- a/board/compulab/imx8mm-cl-iot-gate/ddr/ddr.c +++ b/board/compulab/imx8mm-cl-iot-gate/ddr/ddr.c @@ -5,6 +5,7 @@ * */ +#include #include #include #include diff --git a/board/compulab/imx8mm-cl-iot-gate/ddr/lpddr4_timing_01061010.1_2.c b/board/compulab/imx8mm-cl-iot-gate/ddr/lpddr4_timing_01061010.1_2.c index efcc95c739f..9019a1f2035 100644 --- a/board/compulab/imx8mm-cl-iot-gate/ddr/lpddr4_timing_01061010.1_2.c +++ b/board/compulab/imx8mm-cl-iot-gate/ddr/lpddr4_timing_01061010.1_2.c @@ -7,6 +7,7 @@ */ #include +#include #include #include diff --git a/board/compulab/imx8mm-cl-iot-gate/ddr/lpddr4_timing_01061010.c b/board/compulab/imx8mm-cl-iot-gate/ddr/lpddr4_timing_01061010.c index 67f59ed9407..5141c04f12d 100644 --- a/board/compulab/imx8mm-cl-iot-gate/ddr/lpddr4_timing_01061010.c +++ b/board/compulab/imx8mm-cl-iot-gate/ddr/lpddr4_timing_01061010.c @@ -7,6 +7,7 @@ */ #include +#include #include #include diff --git a/board/compulab/imx8mm-cl-iot-gate/ddr/lpddr4_timing_ff000110.c b/board/compulab/imx8mm-cl-iot-gate/ddr/lpddr4_timing_ff000110.c index 273ee89c0bc..2334722497d 100644 --- a/board/compulab/imx8mm-cl-iot-gate/ddr/lpddr4_timing_ff000110.c +++ b/board/compulab/imx8mm-cl-iot-gate/ddr/lpddr4_timing_ff000110.c @@ -7,6 +7,7 @@ */ #include +#include #include #include diff --git a/board/compulab/imx8mm-cl-iot-gate/ddr/lpddr4_timing_ff020008.c b/board/compulab/imx8mm-cl-iot-gate/ddr/lpddr4_timing_ff020008.c index 1243800b324..e65445e0155 100644 --- a/board/compulab/imx8mm-cl-iot-gate/ddr/lpddr4_timing_ff020008.c +++ b/board/compulab/imx8mm-cl-iot-gate/ddr/lpddr4_timing_ff020008.c @@ -7,6 +7,7 @@ */ #include +#include #include #include diff --git a/board/compulab/imx8mm-cl-iot-gate/eeprom_spl.c b/board/compulab/imx8mm-cl-iot-gate/eeprom_spl.c index 1256848f9a9..90cc33a6e46 100644 --- a/board/compulab/imx8mm-cl-iot-gate/eeprom_spl.c +++ b/board/compulab/imx8mm-cl-iot-gate/eeprom_spl.c @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0+ /* (C) Copyright 2019 CompuLab, Ltd. */ -#include +#include #include #include #include diff --git a/board/compulab/imx8mm-cl-iot-gate/imx8mm-cl-iot-gate.c b/board/compulab/imx8mm-cl-iot-gate/imx8mm-cl-iot-gate.c index ba158734142..af070ec315c 100644 --- a/board/compulab/imx8mm-cl-iot-gate/imx8mm-cl-iot-gate.c +++ b/board/compulab/imx8mm-cl-iot-gate/imx8mm-cl-iot-gate.c @@ -4,6 +4,7 @@ * Copyright 2020 Linaro */ +#include #include #include #include diff --git a/board/compulab/imx8mm-cl-iot-gate/spl.c b/board/compulab/imx8mm-cl-iot-gate/spl.c index 6d9af2538b6..19c1acd8a52 100644 --- a/board/compulab/imx8mm-cl-iot-gate/spl.c +++ b/board/compulab/imx8mm-cl-iot-gate/spl.c @@ -4,6 +4,7 @@ * Copyright 2020 Linaro */ +#include #include #include #include diff --git a/board/compulab/trimslice/trimslice.c b/board/compulab/trimslice/trimslice.c index af05c0c0f05..21ff0cda7f7 100644 --- a/board/compulab/trimslice/trimslice.c +++ b/board/compulab/trimslice/trimslice.c @@ -4,6 +4,7 @@ * NVIDIA Corporation */ +#include #include #include #include diff --git a/board/conclusive/kstr-sama5d27/kstr-sama5d27.c b/board/conclusive/kstr-sama5d27/kstr-sama5d27.c index 64282ae9dc7..1b765b11374 100644 --- a/board/conclusive/kstr-sama5d27/kstr-sama5d27.c +++ b/board/conclusive/kstr-sama5d27/kstr-sama5d27.c @@ -4,7 +4,7 @@ * Copyright (C) 2021-2023 Conclusive Engineering Sp. z o. o. */ -#include +#include #include #include #include diff --git a/board/congatec/cgtqmx8/cgtqmx8.c b/board/congatec/cgtqmx8/cgtqmx8.c index 99c33a1943e..d8e5b1d6963 100644 --- a/board/congatec/cgtqmx8/cgtqmx8.c +++ b/board/congatec/cgtqmx8/cgtqmx8.c @@ -3,7 +3,7 @@ * Copyright 2018 congatec AG * Copyright (C) 2019 Oliver Graute */ -#include +#include #include #include #include diff --git a/board/congatec/cgtqmx8/spl.c b/board/congatec/cgtqmx8/spl.c index 242e794981b..b432ce27459 100644 --- a/board/congatec/cgtqmx8/spl.c +++ b/board/congatec/cgtqmx8/spl.c @@ -4,6 +4,7 @@ * */ +#include #include #include #include diff --git a/board/congatec/common/mmc.c b/board/congatec/common/mmc.c index 74a189ab4d7..bb7a3d4a9aa 100644 --- a/board/congatec/common/mmc.c +++ b/board/congatec/common/mmc.c @@ -4,8 +4,7 @@ * Copyright 2018 NXP * */ - -#include +#include #include #include #include diff --git a/board/congatec/conga-qeval20-qa3-e3845/conga-qeval20-qa3.c b/board/congatec/conga-qeval20-qa3-e3845/conga-qeval20-qa3.c index 4197e88fb6f..315b6dc5429 100644 --- a/board/congatec/conga-qeval20-qa3-e3845/conga-qeval20-qa3.c +++ b/board/congatec/conga-qeval20-qa3-e3845/conga-qeval20-qa3.c @@ -3,6 +3,7 @@ * Copyright (C) 2016 Stefan Roese */ +#include #include #include #include diff --git a/board/coreboot/coreboot/coreboot.c b/board/coreboot/coreboot/coreboot.c index f2ca1076768..e58dce37477 100644 --- a/board/coreboot/coreboot/coreboot.c +++ b/board/coreboot/coreboot/coreboot.c @@ -3,6 +3,7 @@ * Copyright (C) 2018, Bin Meng */ +#include #include #include #include diff --git a/board/cortina/presidio-asic/presidio.c b/board/cortina/presidio-asic/presidio.c index c07e0eae4e9..fdfa3affc3b 100644 --- a/board/cortina/presidio-asic/presidio.c +++ b/board/cortina/presidio-asic/presidio.c @@ -3,7 +3,7 @@ * (C) Copyright 2020 - Cortina Access Inc. * */ -#include +#include #include #include #include diff --git a/board/cssi/cmpcpro/cmpcpro.c b/board/cssi/cmpcpro/cmpcpro.c index ec13d9a7ed7..ef304124564 100644 --- a/board/cssi/cmpcpro/cmpcpro.c +++ b/board/cssi/cmpcpro/cmpcpro.c @@ -7,6 +7,7 @@ #include #include #include +#include #include #include #include diff --git a/board/d-link/dns325/dns325.c b/board/d-link/dns325/dns325.c index 3bbde9808d2..8ebfe4c6018 100644 --- a/board/d-link/dns325/dns325.c +++ b/board/d-link/dns325/dns325.c @@ -9,6 +9,7 @@ * Written-by: Prafulla Wadaskar */ +#include #include #include #include diff --git a/board/data_modul/common/common.c b/board/data_modul/common/common.c index b4d74a8fd8b..4ece82c7303 100644 --- a/board/data_modul/common/common.c +++ b/board/data_modul/common/common.c @@ -3,6 +3,7 @@ * Copyright 2022 Marek Vasut */ +#include #include #include #include diff --git a/board/data_modul/imx8mm_edm_sbc/imx8mm_data_modul_edm_sbc.c b/board/data_modul/imx8mm_edm_sbc/imx8mm_data_modul_edm_sbc.c index 339702e8392..bfb2bddc1d1 100644 --- a/board/data_modul/imx8mm_edm_sbc/imx8mm_data_modul_edm_sbc.c +++ b/board/data_modul/imx8mm_edm_sbc/imx8mm_data_modul_edm_sbc.c @@ -3,6 +3,7 @@ * Copyright 2022 Marek Vasut */ +#include #include #include #include diff --git a/board/data_modul/imx8mm_edm_sbc/spl.c b/board/data_modul/imx8mm_edm_sbc/spl.c index 17aafd719c9..4a9c62fb86f 100644 --- a/board/data_modul/imx8mm_edm_sbc/spl.c +++ b/board/data_modul/imx8mm_edm_sbc/spl.c @@ -3,6 +3,7 @@ * Copyright 2022 Marek Vasut */ +#include #include #include #include diff --git a/board/data_modul/imx8mp_edm_sbc/imx8mp_data_modul_edm_sbc.c b/board/data_modul/imx8mp_edm_sbc/imx8mp_data_modul_edm_sbc.c index 138acd36ad2..f0f373aa280 100644 --- a/board/data_modul/imx8mp_edm_sbc/imx8mp_data_modul_edm_sbc.c +++ b/board/data_modul/imx8mp_edm_sbc/imx8mp_data_modul_edm_sbc.c @@ -3,6 +3,7 @@ * Copyright 2022 Marek Vasut */ +#include #include #include #include diff --git a/board/data_modul/imx8mp_edm_sbc/spl.c b/board/data_modul/imx8mp_edm_sbc/spl.c index c1935898533..cc2d253e391 100644 --- a/board/data_modul/imx8mp_edm_sbc/spl.c +++ b/board/data_modul/imx8mp_edm_sbc/spl.c @@ -3,6 +3,7 @@ * Copyright 2022 Marek Vasut */ +#include #include #include #include diff --git a/board/davinci/da8xxevm/da850evm.c b/board/davinci/da8xxevm/da850evm.c index 0011c828523..05053a87a5a 100644 --- a/board/davinci/da8xxevm/da850evm.c +++ b/board/davinci/da8xxevm/da850evm.c @@ -8,7 +8,7 @@ * Copyright (C) 2007 Sergey Kubushyn */ -#include +#include #include #include #include diff --git a/board/davinci/da8xxevm/omapl138_lcdk.c b/board/davinci/da8xxevm/omapl138_lcdk.c index 607e05ad9ae..9738e2bd9c7 100644 --- a/board/davinci/da8xxevm/omapl138_lcdk.c +++ b/board/davinci/da8xxevm/omapl138_lcdk.c @@ -8,7 +8,7 @@ * Copyright (C) 2007 Sergey Kubushyn */ -#include +#include #include #include #include diff --git a/board/dfi/dfi-bt700/dfi-bt700.c b/board/dfi/dfi-bt700/dfi-bt700.c index 907cc985d7a..87506a77a17 100644 --- a/board/dfi/dfi-bt700/dfi-bt700.c +++ b/board/dfi/dfi-bt700/dfi-bt700.c @@ -3,6 +3,7 @@ * Copyright (C) 2016 Stefan Roese */ +#include #include #include #include diff --git a/board/dhelectronics/common/dh_common.c b/board/dhelectronics/common/dh_common.c index 32c50b4f0f5..34094a020b0 100644 --- a/board/dhelectronics/common/dh_common.c +++ b/board/dhelectronics/common/dh_common.c @@ -4,6 +4,7 @@ * Copyright 2022 DENX Software Engineering GmbH, Philip Oberfichtner */ +#include #include #include #include diff --git a/board/dhelectronics/common/dh_imx.c b/board/dhelectronics/common/dh_imx.c index 3d6487dd0d8..7f451bad59c 100644 --- a/board/dhelectronics/common/dh_imx.c +++ b/board/dhelectronics/common/dh_imx.c @@ -4,9 +4,9 @@ * Copyright 2022 DENX Software Engineering GmbH, Philip Oberfichtner */ -#include #include #include +#include #include #include "dh_imx.h" diff --git a/board/dhelectronics/dh_imx6/dh_imx6.c b/board/dhelectronics/dh_imx6/dh_imx6.c index c8dd30dfeaf..0676587c38a 100644 --- a/board/dhelectronics/dh_imx6/dh_imx6.c +++ b/board/dhelectronics/dh_imx6/dh_imx6.c @@ -5,7 +5,9 @@ * Copyright (C) 2017 Marek Vasut */ +#include #include +#include #include #include #include diff --git a/board/dhelectronics/dh_imx6/dh_imx6_spl.c b/board/dhelectronics/dh_imx6/dh_imx6_spl.c index 3a5495ea18e..e6d5657c62d 100644 --- a/board/dhelectronics/dh_imx6/dh_imx6_spl.c +++ b/board/dhelectronics/dh_imx6/dh_imx6_spl.c @@ -5,6 +5,7 @@ * Copyright (C) 2017 Marek Vasut */ +#include #include #include #include diff --git a/board/dhelectronics/dh_imx8mp/common.c b/board/dhelectronics/dh_imx8mp/common.c index f6db9f67804..44456da681c 100644 --- a/board/dhelectronics/dh_imx8mp/common.c +++ b/board/dhelectronics/dh_imx8mp/common.c @@ -3,6 +3,7 @@ * Copyright 2022 Marek Vasut */ +#include #include #include diff --git a/board/dhelectronics/dh_imx8mp/imx8mp_dhcom_pdk2.c b/board/dhelectronics/dh_imx8mp/imx8mp_dhcom_pdk2.c index c635735d89c..ff2c0e87215 100644 --- a/board/dhelectronics/dh_imx8mp/imx8mp_dhcom_pdk2.c +++ b/board/dhelectronics/dh_imx8mp/imx8mp_dhcom_pdk2.c @@ -3,6 +3,7 @@ * Copyright 2022 Marek Vasut */ +#include #include #include #include diff --git a/board/dhelectronics/dh_imx8mp/spl.c b/board/dhelectronics/dh_imx8mp/spl.c index 714f846521e..7d228da8e5b 100644 --- a/board/dhelectronics/dh_imx8mp/spl.c +++ b/board/dhelectronics/dh_imx8mp/spl.c @@ -3,6 +3,7 @@ * Copyright 2022 Marek Vasut */ +#include #include #include #include diff --git a/board/dhelectronics/dh_stm32mp1/board.c b/board/dhelectronics/dh_stm32mp1/board.c index 20c9d70737e..22af423536d 100644 --- a/board/dhelectronics/dh_stm32mp1/board.c +++ b/board/dhelectronics/dh_stm32mp1/board.c @@ -3,6 +3,7 @@ * Copyright (C) 2018, STMicroelectronics - All Rights Reserved */ +#include #include #include #include diff --git a/board/ea/ea-lpc3250devkitv2/ea-lpc3250devkitv2.c b/board/ea/ea-lpc3250devkitv2/ea-lpc3250devkitv2.c index 222e5facf43..2b03e4891d9 100644 --- a/board/ea/ea-lpc3250devkitv2/ea-lpc3250devkitv2.c +++ b/board/ea/ea-lpc3250devkitv2/ea-lpc3250devkitv2.c @@ -5,7 +5,7 @@ */ #include -#include +#include #include #include diff --git a/board/ea/mx7ulp_com/mx7ulp_com.c b/board/ea/mx7ulp_com/mx7ulp_com.c index 8f78937e097..cd9591a9e32 100644 --- a/board/ea/mx7ulp_com/mx7ulp_com.c +++ b/board/ea/mx7ulp_com/mx7ulp_com.c @@ -3,6 +3,7 @@ * Copyright (C) 2016 Freescale Semiconductor, Inc. */ +#include #include #include #include diff --git a/board/eets/pdu001/board.c b/board/eets/pdu001/board.c index 2ad256f8635..3a52e4ae675 100644 --- a/board/eets/pdu001/board.c +++ b/board/eets/pdu001/board.c @@ -9,7 +9,7 @@ * Copyright (C) 2011, Texas Instruments, Incorporated - https://www.ti.com/ */ -#include +#include #include #include #include diff --git a/board/eets/pdu001/mux.c b/board/eets/pdu001/mux.c index f306a134031..c97927e5cfe 100644 --- a/board/eets/pdu001/mux.c +++ b/board/eets/pdu001/mux.c @@ -7,7 +7,7 @@ * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/ */ -#include +#include #include #include #include diff --git a/board/efi/efi-x86_payload/payload.c b/board/efi/efi-x86_payload/payload.c index d7d1e53e911..5d4492cdc77 100644 --- a/board/efi/efi-x86_payload/payload.c +++ b/board/efi/efi-x86_payload/payload.c @@ -3,6 +3,7 @@ * Copyright (C) 2018, Bin Meng */ +#include #include #include diff --git a/board/egnite/ethernut5/ethernut5.c b/board/egnite/ethernut5/ethernut5.c index 64e341c3779..9953df017e1 100644 --- a/board/egnite/ethernut5/ethernut5.c +++ b/board/egnite/ethernut5/ethernut5.c @@ -52,7 +52,7 @@ * http://www.ethernut.de/ */ -#include +#include #include #include #include diff --git a/board/egnite/ethernut5/ethernut5_pwrman.c b/board/egnite/ethernut5/ethernut5_pwrman.c index 42e1914a875..81f1abf2fad 100644 --- a/board/egnite/ethernut5/ethernut5_pwrman.c +++ b/board/egnite/ethernut5/ethernut5_pwrman.c @@ -31,8 +31,8 @@ * For additional information visit the project home page at * http://www.ethernut.de/ */ +#include #include -#include #include #include #include diff --git a/board/elgin/elgin_rv1108/elgin_rv1108.c b/board/elgin/elgin_rv1108/elgin_rv1108.c index 9fea4f86d5a..10398e7f712 100644 --- a/board/elgin/elgin_rv1108/elgin_rv1108.c +++ b/board/elgin/elgin_rv1108/elgin_rv1108.c @@ -4,6 +4,7 @@ * Authors: Andy Yan */ +#include #include #include #include diff --git a/board/embest/mx6boards/mx6boards.c b/board/embest/mx6boards/mx6boards.c index 896350140d6..a3c23bdfb64 100644 --- a/board/embest/mx6boards/mx6boards.c +++ b/board/embest/mx6boards/mx6boards.c @@ -12,6 +12,7 @@ * Copyright (C) 2013 Jon Nettleton . */ +#include #include #include #include diff --git a/board/emulation/common/qemu_dfu.c b/board/emulation/common/qemu_dfu.c index 393fcaeb742..7e7d84f6c00 100644 --- a/board/emulation/common/qemu_dfu.c +++ b/board/emulation/common/qemu_dfu.c @@ -3,6 +3,7 @@ * Copyright (c) 2020 Linaro Limited */ +#include #include #include #include diff --git a/board/emulation/common/qemu_mtdparts.c b/board/emulation/common/qemu_mtdparts.c index c1501276789..60212e97acf 100644 --- a/board/emulation/common/qemu_mtdparts.c +++ b/board/emulation/common/qemu_mtdparts.c @@ -3,6 +3,7 @@ * Copyright (c) 2020 Linaro Limited */ +#include #include #include diff --git a/board/emulation/qemu-arm/qemu-arm.c b/board/emulation/qemu-arm/qemu-arm.c index 6095cb02b23..ecfd19f1a7e 100644 --- a/board/emulation/qemu-arm/qemu-arm.c +++ b/board/emulation/qemu-arm/qemu-arm.c @@ -3,7 +3,7 @@ * Copyright (c) 2017 Tuomas Tynkkynen */ -#include +#include #include #include #include diff --git a/board/emulation/qemu-ppce500/qemu-ppce500.c b/board/emulation/qemu-ppce500/qemu-ppce500.c index 58e5d5eb942..221361691c1 100644 --- a/board/emulation/qemu-ppce500/qemu-ppce500.c +++ b/board/emulation/qemu-ppce500/qemu-ppce500.c @@ -4,7 +4,7 @@ * Copyright (C) 2021, Bin Meng */ -#include +#include #include #include #include diff --git a/board/emulation/qemu-riscv/qemu-riscv.c b/board/emulation/qemu-riscv/qemu-riscv.c index e5193e31e37..173245b40e3 100644 --- a/board/emulation/qemu-riscv/qemu-riscv.c +++ b/board/emulation/qemu-riscv/qemu-riscv.c @@ -3,6 +3,7 @@ * Copyright (C) 2018, Bin Meng */ +#include #include #include #include diff --git a/board/engicam/common/board.c b/board/engicam/common/board.c index 8e0477c7a6e..df9149e0d6d 100644 --- a/board/engicam/common/board.c +++ b/board/engicam/common/board.c @@ -5,6 +5,7 @@ * Author: Jagan Teki */ +#include #include #include #include diff --git a/board/engicam/common/spl.c b/board/engicam/common/spl.c index 8bc80ee6baa..f1ccdc33436 100644 --- a/board/engicam/common/spl.c +++ b/board/engicam/common/spl.c @@ -5,6 +5,7 @@ * Author: Jagan Teki */ +#include #include #include #include diff --git a/board/engicam/imx6q/imx6q.c b/board/engicam/imx6q/imx6q.c index d799fe6526a..e6c888fcfde 100644 --- a/board/engicam/imx6q/imx6q.c +++ b/board/engicam/imx6q/imx6q.c @@ -5,6 +5,7 @@ * Author: Jagan Teki */ +#include #include #include diff --git a/board/engicam/imx6ul/imx6ul.c b/board/engicam/imx6ul/imx6ul.c index 24d654445db..412d6c302e8 100644 --- a/board/engicam/imx6ul/imx6ul.c +++ b/board/engicam/imx6ul/imx6ul.c @@ -5,6 +5,7 @@ * Author: Jagan Teki */ +#include #include #include diff --git a/board/engicam/imx8mm/icore_mx8mm.c b/board/engicam/imx8mm/icore_mx8mm.c index 236337546ae..320388faae3 100644 --- a/board/engicam/imx8mm/icore_mx8mm.c +++ b/board/engicam/imx8mm/icore_mx8mm.c @@ -5,6 +5,7 @@ * Author: Jagan Teki */ +#include #include #include diff --git a/board/engicam/imx8mm/lpddr4_timing.c b/board/engicam/imx8mm/lpddr4_timing.c index fcd45c158f2..821212740bc 100644 --- a/board/engicam/imx8mm/lpddr4_timing.c +++ b/board/engicam/imx8mm/lpddr4_timing.c @@ -6,6 +6,7 @@ * Align with uboot-imx_v2018.03_4.14.78_1.0.0_ga */ +#include #include #include diff --git a/board/engicam/imx8mm/spl.c b/board/engicam/imx8mm/spl.c index d51ae241e85..af9044a3c2b 100644 --- a/board/engicam/imx8mm/spl.c +++ b/board/engicam/imx8mm/spl.c @@ -5,6 +5,7 @@ * Author: Jagan Teki */ +#include #include #include #include diff --git a/board/engicam/imx8mp/icore_mx8mp.c b/board/engicam/imx8mp/icore_mx8mp.c index e2ed70caa43..5f820cc8dd7 100644 --- a/board/engicam/imx8mp/icore_mx8mp.c +++ b/board/engicam/imx8mp/icore_mx8mp.c @@ -8,6 +8,7 @@ * Jagan Teki */ +#include #include #include #include diff --git a/board/engicam/imx8mp/spl.c b/board/engicam/imx8mp/spl.c index cd31aa6041d..36b83aace39 100644 --- a/board/engicam/imx8mp/spl.c +++ b/board/engicam/imx8mp/spl.c @@ -8,6 +8,7 @@ * Jagan Teki */ +#include #include #include #include diff --git a/board/engicam/stm32mp1/spl.c b/board/engicam/stm32mp1/spl.c index bb2bd446aa8..2b7779cc01d 100644 --- a/board/engicam/stm32mp1/spl.c +++ b/board/engicam/stm32mp1/spl.c @@ -5,7 +5,7 @@ * Copyright (C) 2020 Amarula Solutions(India) */ -#include +#include /* board early initialisation in board_f: need to use global variable */ static u32 opp_voltage_mv __section(".data"); diff --git a/board/engicam/stm32mp1/stm32mp1.c b/board/engicam/stm32mp1/stm32mp1.c index bc2af66d8e9..5223e9bae8d 100644 --- a/board/engicam/stm32mp1/stm32mp1.c +++ b/board/engicam/stm32mp1/stm32mp1.c @@ -6,6 +6,7 @@ * Author: Jagan Teki */ +#include #include #include #include diff --git a/board/esd/meesc/meesc.c b/board/esd/meesc/meesc.c index dce69abdfd1..9e362104224 100644 --- a/board/esd/meesc/meesc.c +++ b/board/esd/meesc/meesc.c @@ -9,7 +9,7 @@ * esd electronic system design gmbh */ -#include +#include #include #include #include diff --git a/board/firefly/firefly-rk3288/firefly-rk3288.c b/board/firefly/firefly-rk3288/firefly-rk3288.c index 8e67ab4b132..95d8b00924d 100644 --- a/board/firefly/firefly-rk3288/firefly-rk3288.c +++ b/board/firefly/firefly-rk3288/firefly-rk3288.c @@ -3,6 +3,7 @@ * (C) Copyright 2015 Google, Inc */ +#include #include #include #include diff --git a/board/firefly/firefly-rk3308/roc_cc_rk3308.c b/board/firefly/firefly-rk3308/roc_cc_rk3308.c index 404bdc632bb..af00250e118 100644 --- a/board/firefly/firefly-rk3308/roc_cc_rk3308.c +++ b/board/firefly/firefly-rk3308/roc_cc_rk3308.c @@ -3,6 +3,7 @@ * (C) Copyright 2019 Rockchip Electronics Co., Ltd */ +#include #include #include #include diff --git a/board/firefly/roc-pc-rk3399/roc-pc-rk3399.c b/board/firefly/roc-pc-rk3399/roc-pc-rk3399.c index a149e4fe822..590519b32af 100644 --- a/board/firefly/roc-pc-rk3399/roc-pc-rk3399.c +++ b/board/firefly/roc-pc-rk3399/roc-pc-rk3399.c @@ -3,6 +3,7 @@ * (C) Copyright 2016 Rockchip Electronics Co., Ltd */ +#include #include #include #include diff --git a/board/freescale/common/cadmus.c b/board/freescale/common/cadmus.c index 6f66ed6851d..e7e07fff86c 100644 --- a/board/freescale/common/cadmus.c +++ b/board/freescale/common/cadmus.c @@ -4,9 +4,8 @@ */ -#include +#include #include -#include /* * CADMUS Board System Registers diff --git a/board/freescale/common/cds_pci_ft.c b/board/freescale/common/cds_pci_ft.c index 56b01e3f51f..dc2d62850d1 100644 --- a/board/freescale/common/cds_pci_ft.c +++ b/board/freescale/common/cds_pci_ft.c @@ -3,6 +3,7 @@ * Copyright 2004 Freescale Semiconductor. */ +#include #include #include #include "cadmus.h" diff --git a/board/freescale/common/cds_via.c b/board/freescale/common/cds_via.c index 6fc3a21780f..6184472b165 100644 --- a/board/freescale/common/cds_via.c +++ b/board/freescale/common/cds_via.c @@ -3,6 +3,7 @@ * Copyright 2006 Freescale Semiconductor. */ +#include #include /* Config the VIA chip */ diff --git a/board/freescale/common/cmd_esbc_validate.c b/board/freescale/common/cmd_esbc_validate.c index d4192e5ab52..6c096266b48 100644 --- a/board/freescale/common/cmd_esbc_validate.c +++ b/board/freescale/common/cmd_esbc_validate.c @@ -3,10 +3,10 @@ * Copyright 2015 Freescale Semiconductor, Inc. */ +#include #include #include #include -#include int do_esbc_halt(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) diff --git a/board/freescale/common/emc2305.c b/board/freescale/common/emc2305.c index 50252bb5007..9a75c5a09dd 100644 --- a/board/freescale/common/emc2305.c +++ b/board/freescale/common/emc2305.c @@ -4,6 +4,7 @@ * */ +#include #include #include #include diff --git a/board/freescale/common/fman.c b/board/freescale/common/fman.c index 650ecc7b440..358303108d8 100644 --- a/board/freescale/common/fman.c +++ b/board/freescale/common/fman.c @@ -3,6 +3,7 @@ * Copyright 2011-2015 Freescale Semiconductor, Inc. */ +#include #include #include #include diff --git a/board/freescale/common/fsl_chain_of_trust.c b/board/freescale/common/fsl_chain_of_trust.c index 27a33924c84..87ed814d6a2 100644 --- a/board/freescale/common/fsl_chain_of_trust.c +++ b/board/freescale/common/fsl_chain_of_trust.c @@ -4,7 +4,7 @@ * Copyright 2022 NXP */ -#include +#include #include #include #include diff --git a/board/freescale/common/fsl_validate.c b/board/freescale/common/fsl_validate.c index e03434dcdfe..bfe6357b0d6 100644 --- a/board/freescale/common/fsl_validate.c +++ b/board/freescale/common/fsl_validate.c @@ -4,7 +4,7 @@ * Copyright 2021-2022 NXP */ -#include +#include #include #include #include diff --git a/board/freescale/common/i2c_common.c b/board/freescale/common/i2c_common.c index 20705ecc8e4..119ed3c6171 100644 --- a/board/freescale/common/i2c_common.c +++ b/board/freescale/common/i2c_common.c @@ -5,7 +5,7 @@ * Copyright 2021 Microsoft Corporation */ -#include +#include #include #include "i2c_common.h" diff --git a/board/freescale/common/i2c_mux.c b/board/freescale/common/i2c_mux.c index 89151ccaf06..d40b34f1039 100644 --- a/board/freescale/common/i2c_mux.c +++ b/board/freescale/common/i2c_mux.c @@ -5,9 +5,8 @@ * Copyright 2021 Microsoft Corporation */ -#include +#include #include -#include #include "i2c_common.h" #include "i2c_mux.h" diff --git a/board/freescale/common/ics307_clk.c b/board/freescale/common/ics307_clk.c index af30faa0c5f..5f95571d24c 100644 --- a/board/freescale/common/ics307_clk.c +++ b/board/freescale/common/ics307_clk.c @@ -3,7 +3,7 @@ * Copyright 2010-2011 Freescale Semiconductor, Inc. */ -#include +#include #include #include #include diff --git a/board/freescale/common/ls102xa_stream_id.c b/board/freescale/common/ls102xa_stream_id.c index bf76274c43c..f754cf42fd3 100644 --- a/board/freescale/common/ls102xa_stream_id.c +++ b/board/freescale/common/ls102xa_stream_id.c @@ -3,7 +3,7 @@ * Copyright 2014 Freescale Semiconductor */ -#include +#include #include #include diff --git a/board/freescale/common/mc34vr500.c b/board/freescale/common/mc34vr500.c index cf14b29a3ec..d6b4c65a3c0 100644 --- a/board/freescale/common/mc34vr500.c +++ b/board/freescale/common/mc34vr500.c @@ -4,6 +4,7 @@ * Hou Zhiqiang */ +#include #include #include #include diff --git a/board/freescale/common/mmc.c b/board/freescale/common/mmc.c index 00e4f3675fe..8cd5079f962 100644 --- a/board/freescale/common/mmc.c +++ b/board/freescale/common/mmc.c @@ -4,8 +4,8 @@ * Copyright 2018-2022 NXP */ +#include #include -#include #include #include #include diff --git a/board/freescale/common/ngpixis.c b/board/freescale/common/ngpixis.c index 74c345807e6..7be1ccee638 100644 --- a/board/freescale/common/ngpixis.c +++ b/board/freescale/common/ngpixis.c @@ -29,6 +29,7 @@ * boot from the alternate bank. */ +#include #include #include diff --git a/board/freescale/common/ns_access.c b/board/freescale/common/ns_access.c index c46e87f4cce..a95d15c1ef3 100644 --- a/board/freescale/common/ns_access.c +++ b/board/freescale/common/ns_access.c @@ -3,7 +3,7 @@ * Copyright 2014 Freescale Semiconductor */ -#include +#include #include #include #include diff --git a/board/freescale/common/p_corenet/law.c b/board/freescale/common/p_corenet/law.c index 83818d6d847..1a1e9343d23 100644 --- a/board/freescale/common/p_corenet/law.c +++ b/board/freescale/common/p_corenet/law.c @@ -6,7 +6,7 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ -#include +#include #include #include diff --git a/board/freescale/common/p_corenet/tlb.c b/board/freescale/common/p_corenet/tlb.c index cebdedfa4a7..1a2d9cbfc0c 100644 --- a/board/freescale/common/p_corenet/tlb.c +++ b/board/freescale/common/p_corenet/tlb.c @@ -6,9 +6,8 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ -#include +#include #include -#include struct fsl_e_tlb_entry tlb_table[] = { /* TLB 0 - for temp stack in cache */ diff --git a/board/freescale/common/pfuze.c b/board/freescale/common/pfuze.c index 0d7a94fd232..a9288820b2e 100644 --- a/board/freescale/common/pfuze.c +++ b/board/freescale/common/pfuze.c @@ -3,6 +3,7 @@ * Copyright 2014 Freescale Semiconductor, Inc. */ +#include #include #include #include diff --git a/board/freescale/common/qixis.c b/board/freescale/common/qixis.c index 6400ac05245..da2c1de078b 100644 --- a/board/freescale/common/qixis.c +++ b/board/freescale/common/qixis.c @@ -7,7 +7,7 @@ * This file provides support for the QIXIS of some Freescale reference boards. */ -#include +#include #include #include #include diff --git a/board/freescale/common/sdhc_boot.c b/board/freescale/common/sdhc_boot.c index 5ee730cefd0..a1c7a94a90e 100644 --- a/board/freescale/common/sdhc_boot.c +++ b/board/freescale/common/sdhc_boot.c @@ -3,6 +3,7 @@ * Copyright 2011 Freescale Semiconductor, Inc. */ +#include #include #include diff --git a/board/freescale/common/sys_eeprom.c b/board/freescale/common/sys_eeprom.c index ec3c9e37222..64139d4659f 100644 --- a/board/freescale/common/sys_eeprom.c +++ b/board/freescale/common/sys_eeprom.c @@ -6,6 +6,7 @@ * Timur Tabi (timur@freescale.com) */ +#include #include #include #include diff --git a/board/freescale/common/vid.c b/board/freescale/common/vid.c index 84cb43fad56..fc5d400cfe1 100644 --- a/board/freescale/common/vid.c +++ b/board/freescale/common/vid.c @@ -5,13 +5,12 @@ * Copyright 2020 Stephen Carlson */ -#include +#include #include #include #include #include #include -#include #include #ifdef CONFIG_FSL_LSCH2 #include diff --git a/board/freescale/imx8mm_evk/imx8mm_evk.c b/board/freescale/imx8mm_evk/imx8mm_evk.c index 4c4436af3b1..e0975fcda70 100644 --- a/board/freescale/imx8mm_evk/imx8mm_evk.c +++ b/board/freescale/imx8mm_evk/imx8mm_evk.c @@ -3,6 +3,7 @@ * Copyright 2018 NXP */ +#include #include #include #include diff --git a/board/freescale/imx8mm_evk/spl.c b/board/freescale/imx8mm_evk/spl.c index cd251d274ff..35437811d9d 100644 --- a/board/freescale/imx8mm_evk/spl.c +++ b/board/freescale/imx8mm_evk/spl.c @@ -3,6 +3,7 @@ * Copyright 2019, 2021 NXP */ +#include #include #include #include diff --git a/board/freescale/imx8mn_evk/imx8mn_evk.c b/board/freescale/imx8mn_evk/imx8mn_evk.c index 6b6fb0a7dd2..e35d505aea9 100644 --- a/board/freescale/imx8mn_evk/imx8mn_evk.c +++ b/board/freescale/imx8mn_evk/imx8mn_evk.c @@ -3,6 +3,7 @@ * Copyright 2019 NXP */ +#include #include #include #include diff --git a/board/freescale/imx8mn_evk/spl.c b/board/freescale/imx8mn_evk/spl.c index 231b9289eea..dd54fa9b608 100644 --- a/board/freescale/imx8mn_evk/spl.c +++ b/board/freescale/imx8mn_evk/spl.c @@ -4,6 +4,7 @@ * */ +#include #include #include #include diff --git a/board/freescale/imx8mp_evk/spl.c b/board/freescale/imx8mp_evk/spl.c index 12da1b2abfb..9dd2cbc799c 100644 --- a/board/freescale/imx8mp_evk/spl.c +++ b/board/freescale/imx8mp_evk/spl.c @@ -4,6 +4,7 @@ * */ +#include #include #include #include diff --git a/board/freescale/imx8mq_evk/imx8mq_evk.c b/board/freescale/imx8mq_evk/imx8mq_evk.c index ab920a4539c..e577e4d9cca 100644 --- a/board/freescale/imx8mq_evk/imx8mq_evk.c +++ b/board/freescale/imx8mq_evk/imx8mq_evk.c @@ -3,6 +3,7 @@ * Copyright 2018 NXP */ +#include #include #include #include diff --git a/board/freescale/imx8mq_evk/lpddr4_timing.c b/board/freescale/imx8mq_evk/lpddr4_timing.c index e9559e3d843..46bc7f8591c 100644 --- a/board/freescale/imx8mq_evk/lpddr4_timing.c +++ b/board/freescale/imx8mq_evk/lpddr4_timing.c @@ -4,6 +4,7 @@ */ #include +#include #include #include diff --git a/board/freescale/imx8mq_evk/lpddr4_timing_b0.c b/board/freescale/imx8mq_evk/lpddr4_timing_b0.c index 5d8f2803be6..ec68edaf690 100644 --- a/board/freescale/imx8mq_evk/lpddr4_timing_b0.c +++ b/board/freescale/imx8mq_evk/lpddr4_timing_b0.c @@ -4,6 +4,7 @@ */ #include +#include #include #include diff --git a/board/freescale/imx8mq_evk/spl.c b/board/freescale/imx8mq_evk/spl.c index a346305c863..818cdd615eb 100644 --- a/board/freescale/imx8mq_evk/spl.c +++ b/board/freescale/imx8mq_evk/spl.c @@ -4,7 +4,7 @@ * */ -#include +#include #include #include #include diff --git a/board/freescale/imx8qm_mek/imx8qm_mek.c b/board/freescale/imx8qm_mek/imx8qm_mek.c index 72527f774ca..2b209c8886f 100644 --- a/board/freescale/imx8qm_mek/imx8qm_mek.c +++ b/board/freescale/imx8qm_mek/imx8qm_mek.c @@ -3,6 +3,7 @@ * Copyright 2018 NXP */ +#include #include #include #include diff --git a/board/freescale/imx8qm_mek/spl.c b/board/freescale/imx8qm_mek/spl.c index ad786833309..17fd437116d 100644 --- a/board/freescale/imx8qm_mek/spl.c +++ b/board/freescale/imx8qm_mek/spl.c @@ -4,6 +4,7 @@ * */ +#include #include #include #include diff --git a/board/freescale/imx8qxp_mek/imx8qxp_mek.c b/board/freescale/imx8qxp_mek/imx8qxp_mek.c index adb9556a021..833bee55462 100644 --- a/board/freescale/imx8qxp_mek/imx8qxp_mek.c +++ b/board/freescale/imx8qxp_mek/imx8qxp_mek.c @@ -3,6 +3,7 @@ * Copyright 2018 NXP */ +#include #include #include #include diff --git a/board/freescale/imx8qxp_mek/spl.c b/board/freescale/imx8qxp_mek/spl.c index 05e3c0a2ff2..462c43ceebc 100644 --- a/board/freescale/imx8qxp_mek/spl.c +++ b/board/freescale/imx8qxp_mek/spl.c @@ -4,6 +4,7 @@ * */ +#include #include #include #include diff --git a/board/freescale/imx8ulp_evk/imx8ulp_evk.c b/board/freescale/imx8ulp_evk/imx8ulp_evk.c index 0af61067263..dd04d5925a0 100644 --- a/board/freescale/imx8ulp_evk/imx8ulp_evk.c +++ b/board/freescale/imx8ulp_evk/imx8ulp_evk.c @@ -3,6 +3,7 @@ * Copyright 2020 NXP */ +#include #include #include #include diff --git a/board/freescale/imx8ulp_evk/spl.c b/board/freescale/imx8ulp_evk/spl.c index d123b21b722..c49b5be4762 100644 --- a/board/freescale/imx8ulp_evk/spl.c +++ b/board/freescale/imx8ulp_evk/spl.c @@ -3,6 +3,7 @@ * Copyright 2021 NXP */ +#include #include #include #include diff --git a/board/freescale/imx93_evk/imx93_evk.c b/board/freescale/imx93_evk/imx93_evk.c index 341831a7d30..c54dc9d05c5 100644 --- a/board/freescale/imx93_evk/imx93_evk.c +++ b/board/freescale/imx93_evk/imx93_evk.c @@ -3,6 +3,7 @@ * Copyright 2022 NXP */ +#include #include #include #include diff --git a/board/freescale/imx93_evk/spl.c b/board/freescale/imx93_evk/spl.c index e5807134bb2..6d5e110b277 100644 --- a/board/freescale/imx93_evk/spl.c +++ b/board/freescale/imx93_evk/spl.c @@ -3,6 +3,7 @@ * Copyright 2022 NXP */ +#include #include #include #include diff --git a/board/freescale/imxrt1020-evk/imxrt1020-evk.c b/board/freescale/imxrt1020-evk/imxrt1020-evk.c index 42a0a67ae93..785da604b96 100644 --- a/board/freescale/imxrt1020-evk/imxrt1020-evk.c +++ b/board/freescale/imxrt1020-evk/imxrt1020-evk.c @@ -4,6 +4,7 @@ * Author(s): Giulio Benetti */ +#include #include #include #include diff --git a/board/freescale/imxrt1050-evk/imxrt1050-evk.c b/board/freescale/imxrt1050-evk/imxrt1050-evk.c index 46a644908e9..4cc3defc882 100644 --- a/board/freescale/imxrt1050-evk/imxrt1050-evk.c +++ b/board/freescale/imxrt1050-evk/imxrt1050-evk.c @@ -4,6 +4,7 @@ * Author(s): Giulio Benetti */ +#include #include #include #include diff --git a/board/freescale/imxrt1170-evk/imxrt1170-evk.c b/board/freescale/imxrt1170-evk/imxrt1170-evk.c index e10b8830ec6..4b82ee5e9ce 100644 --- a/board/freescale/imxrt1170-evk/imxrt1170-evk.c +++ b/board/freescale/imxrt1170-evk/imxrt1170-evk.c @@ -4,6 +4,7 @@ * Author(s): Giulio Benetti */ +#include #include #include #include diff --git a/board/freescale/ls1012afrdm/eth.c b/board/freescale/ls1012afrdm/eth.c index c431e5e611b..d2df9351eac 100644 --- a/board/freescale/ls1012afrdm/eth.c +++ b/board/freescale/ls1012afrdm/eth.c @@ -4,6 +4,7 @@ * Copyright 2017 NXP */ +#include #include #include #include diff --git a/board/freescale/ls1012afrdm/ls1012afrdm.c b/board/freescale/ls1012afrdm/ls1012afrdm.c index dae2cf097bc..271072bf7a1 100644 --- a/board/freescale/ls1012afrdm/ls1012afrdm.c +++ b/board/freescale/ls1012afrdm/ls1012afrdm.c @@ -3,7 +3,7 @@ * Copyright 2017-2018, 2021 NXP */ -#include +#include #include #include #include diff --git a/board/freescale/ls1012aqds/eth.c b/board/freescale/ls1012aqds/eth.c index d5e87c5393b..38267acedde 100644 --- a/board/freescale/ls1012aqds/eth.c +++ b/board/freescale/ls1012aqds/eth.c @@ -4,7 +4,7 @@ * Copyright 2017 NXP */ -#include +#include #include #include #include diff --git a/board/freescale/ls1012aqds/ls1012aqds.c b/board/freescale/ls1012aqds/ls1012aqds.c index 7d56eb0117d..a5ea8d634ed 100644 --- a/board/freescale/ls1012aqds/ls1012aqds.c +++ b/board/freescale/ls1012aqds/ls1012aqds.c @@ -4,7 +4,7 @@ * Copyright 2021 NXP */ -#include +#include #include #include #include diff --git a/board/freescale/ls1012ardb/eth.c b/board/freescale/ls1012ardb/eth.c index 71cb2988a56..5c661274987 100644 --- a/board/freescale/ls1012ardb/eth.c +++ b/board/freescale/ls1012ardb/eth.c @@ -4,7 +4,7 @@ * Copyright 2017 NXP */ -#include +#include #include #include #include diff --git a/board/freescale/ls1012ardb/ls1012ardb.c b/board/freescale/ls1012ardb/ls1012ardb.c index 7f8001b4981..18f92089cae 100644 --- a/board/freescale/ls1012ardb/ls1012ardb.c +++ b/board/freescale/ls1012ardb/ls1012ardb.c @@ -4,7 +4,7 @@ * Copyright 2021 NXP */ -#include +#include #include #include #include diff --git a/board/freescale/ls1021aiot/ls1021aiot.c b/board/freescale/ls1021aiot/ls1021aiot.c index 7abc4126933..d6f22bd6a2a 100644 --- a/board/freescale/ls1021aiot/ls1021aiot.c +++ b/board/freescale/ls1021aiot/ls1021aiot.c @@ -4,7 +4,7 @@ * Copyright 2021 NXP */ -#include +#include #include #include #include diff --git a/board/freescale/ls1021aqds/ddr.c b/board/freescale/ls1021aqds/ddr.c index 5b0f23688f0..4e70acc5a0c 100644 --- a/board/freescale/ls1021aqds/ddr.c +++ b/board/freescale/ls1021aqds/ddr.c @@ -3,7 +3,7 @@ * Copyright 2014 Freescale Semiconductor, Inc. */ -#include +#include #include #include #include diff --git a/board/freescale/ls1028a/ddr.c b/board/freescale/ls1028a/ddr.c index c406f2436d1..3e976da6b30 100644 --- a/board/freescale/ls1028a/ddr.c +++ b/board/freescale/ls1028a/ddr.c @@ -3,6 +3,7 @@ * Copyright 2019 NXP */ +#include #include #include #include diff --git a/board/freescale/ls1028a/ls1028a.c b/board/freescale/ls1028a/ls1028a.c index e01b5a8c2eb..7f181ab3dfb 100644 --- a/board/freescale/ls1028a/ls1028a.c +++ b/board/freescale/ls1028a/ls1028a.c @@ -3,7 +3,7 @@ * Copyright 2019-2022 NXP */ -#include +#include #include #include #include diff --git a/board/freescale/ls1043aqds/ddr.c b/board/freescale/ls1043aqds/ddr.c index 2a9717df616..23947bdb84c 100644 --- a/board/freescale/ls1043aqds/ddr.c +++ b/board/freescale/ls1043aqds/ddr.c @@ -3,6 +3,7 @@ * Copyright 2015 Freescale Semiconductor, Inc. */ +#include #include #include #ifdef CONFIG_FSL_DEEP_SLEEP diff --git a/board/freescale/ls1043aqds/eth.c b/board/freescale/ls1043aqds/eth.c index 5a8ca27b327..cd1f83e3d06 100644 --- a/board/freescale/ls1043aqds/eth.c +++ b/board/freescale/ls1043aqds/eth.c @@ -4,7 +4,7 @@ * Copyright 2019 NXP */ -#include +#include #include #include #include diff --git a/board/freescale/ls1043aqds/ls1043aqds.c b/board/freescale/ls1043aqds/ls1043aqds.c index fdf011efc5b..b87da41e408 100644 --- a/board/freescale/ls1043aqds/ls1043aqds.c +++ b/board/freescale/ls1043aqds/ls1043aqds.c @@ -4,7 +4,7 @@ * Copyright 2019-2020 NXP */ -#include +#include #include #include #include diff --git a/board/freescale/ls1043ardb/cpld.c b/board/freescale/ls1043ardb/cpld.c index bda2f3ac3a6..9db3aa58605 100644 --- a/board/freescale/ls1043ardb/cpld.c +++ b/board/freescale/ls1043ardb/cpld.c @@ -5,7 +5,7 @@ * Freescale LS1043ARDB board-specific CPLD controlling supports. */ -#include +#include #include #include #include "cpld.h" diff --git a/board/freescale/ls1043ardb/ddr.c b/board/freescale/ls1043ardb/ddr.c index 187925e981a..4d2fce38412 100644 --- a/board/freescale/ls1043ardb/ddr.c +++ b/board/freescale/ls1043ardb/ddr.c @@ -3,6 +3,7 @@ * Copyright 2015 Freescale Semiconductor, Inc. */ +#include #include #include #include diff --git a/board/freescale/ls1043ardb/eth.c b/board/freescale/ls1043ardb/eth.c index cacc49c0584..cc95214c4e3 100644 --- a/board/freescale/ls1043ardb/eth.c +++ b/board/freescale/ls1043ardb/eth.c @@ -2,7 +2,7 @@ /* * Copyright 2015 Freescale Semiconductor, Inc. */ -#include +#include #include #include #include diff --git a/board/freescale/ls1046afrwy/ddr.c b/board/freescale/ls1046afrwy/ddr.c index b08caee1d97..256397b52b6 100644 --- a/board/freescale/ls1046afrwy/ddr.c +++ b/board/freescale/ls1046afrwy/ddr.c @@ -3,6 +3,7 @@ * Copyright 2019 NXP */ +#include #include #include diff --git a/board/freescale/ls1046afrwy/eth.c b/board/freescale/ls1046afrwy/eth.c index 8efc7f68424..d1a2bfe1885 100644 --- a/board/freescale/ls1046afrwy/eth.c +++ b/board/freescale/ls1046afrwy/eth.c @@ -2,7 +2,7 @@ /* * Copyright 2019 NXP */ -#include +#include #include #include #include diff --git a/board/freescale/ls1046afrwy/ls1046afrwy.c b/board/freescale/ls1046afrwy/ls1046afrwy.c index 8889c24f1f0..899c22a367e 100644 --- a/board/freescale/ls1046afrwy/ls1046afrwy.c +++ b/board/freescale/ls1046afrwy/ls1046afrwy.c @@ -3,7 +3,7 @@ * Copyright 2019, 2021 NXP */ -#include +#include #include #include #include diff --git a/board/freescale/ls1046aqds/ddr.c b/board/freescale/ls1046aqds/ddr.c index ac1b6049721..9a96de27178 100644 --- a/board/freescale/ls1046aqds/ddr.c +++ b/board/freescale/ls1046aqds/ddr.c @@ -3,6 +3,7 @@ * Copyright 2016 Freescale Semiconductor, Inc. */ +#include #include #include #ifdef CONFIG_FSL_DEEP_SLEEP diff --git a/board/freescale/ls1046aqds/eth.c b/board/freescale/ls1046aqds/eth.c index cd3500c2e96..bbf8b8c2bee 100644 --- a/board/freescale/ls1046aqds/eth.c +++ b/board/freescale/ls1046aqds/eth.c @@ -4,7 +4,7 @@ * Copyright 2018-2020 NXP */ -#include +#include #include #include #include diff --git a/board/freescale/ls1046aqds/ls1046aqds.c b/board/freescale/ls1046aqds/ls1046aqds.c index a83b2170651..2faac54a0e2 100644 --- a/board/freescale/ls1046aqds/ls1046aqds.c +++ b/board/freescale/ls1046aqds/ls1046aqds.c @@ -4,7 +4,7 @@ * Copyright 2019-2021 NXP */ -#include +#include #include #include #include diff --git a/board/freescale/ls1046ardb/cpld.c b/board/freescale/ls1046ardb/cpld.c index 7f8ca2e857f..ee19d4ff8aa 100644 --- a/board/freescale/ls1046ardb/cpld.c +++ b/board/freescale/ls1046ardb/cpld.c @@ -5,7 +5,7 @@ * Freescale LS1046ARDB board-specific CPLD controlling supports. */ -#include +#include #include #include #include "cpld.h" diff --git a/board/freescale/ls1046ardb/ddr.c b/board/freescale/ls1046ardb/ddr.c index 68353022e7d..befb556bd30 100644 --- a/board/freescale/ls1046ardb/ddr.c +++ b/board/freescale/ls1046ardb/ddr.c @@ -3,6 +3,7 @@ * Copyright 2016 Freescale Semiconductor, Inc. */ +#include #include #include #include diff --git a/board/freescale/ls1046ardb/eth.c b/board/freescale/ls1046ardb/eth.c index fee8e0e21d4..bbc22a3cdf4 100644 --- a/board/freescale/ls1046ardb/eth.c +++ b/board/freescale/ls1046ardb/eth.c @@ -2,7 +2,7 @@ /* * Copyright 2016 Freescale Semiconductor, Inc. */ -#include +#include #include #include #include diff --git a/board/freescale/ls1046ardb/ls1046ardb.c b/board/freescale/ls1046ardb/ls1046ardb.c index 0492f0a8c0a..26e69db55f7 100644 --- a/board/freescale/ls1046ardb/ls1046ardb.c +++ b/board/freescale/ls1046ardb/ls1046ardb.c @@ -4,7 +4,7 @@ * Copyright 2021 NXP */ -#include +#include #include #include #include diff --git a/board/freescale/ls1088a/ddr.c b/board/freescale/ls1088a/ddr.c index d2e239c4d61..9e0941cc9d6 100644 --- a/board/freescale/ls1088a/ddr.c +++ b/board/freescale/ls1088a/ddr.c @@ -3,6 +3,7 @@ * Copyright 2017 NXP */ +#include #include #include #include diff --git a/board/freescale/ls1088a/ls1088a.c b/board/freescale/ls1088a/ls1088a.c index 58951f2bb2a..98a91c48adb 100644 --- a/board/freescale/ls1088a/ls1088a.c +++ b/board/freescale/ls1088a/ls1088a.c @@ -2,7 +2,7 @@ /* * Copyright 2017-2022 NXP */ -#include +#include #include #include #include diff --git a/board/freescale/ls2080aqds/ddr.c b/board/freescale/ls2080aqds/ddr.c index 2986ffb7a82..2767d058cc9 100644 --- a/board/freescale/ls2080aqds/ddr.c +++ b/board/freescale/ls2080aqds/ddr.c @@ -3,6 +3,7 @@ * Copyright 2015 Freescale Semiconductor, Inc. */ +#include #include #include #include diff --git a/board/freescale/ls2080aqds/ls2080aqds.c b/board/freescale/ls2080aqds/ls2080aqds.c index 4c8d0706688..5c94c83121b 100644 --- a/board/freescale/ls2080aqds/ls2080aqds.c +++ b/board/freescale/ls2080aqds/ls2080aqds.c @@ -3,7 +3,7 @@ * Copyright 2015 Freescale Semiconductor * Copyright 2021 NXP */ -#include +#include #include #include #include diff --git a/board/freescale/ls2080ardb/ddr.c b/board/freescale/ls2080ardb/ddr.c index ec34b42e619..07fa8473332 100644 --- a/board/freescale/ls2080ardb/ddr.c +++ b/board/freescale/ls2080ardb/ddr.c @@ -3,6 +3,7 @@ * Copyright 2015 Freescale Semiconductor, Inc. */ +#include #include #include #include diff --git a/board/freescale/ls2080ardb/ls2080ardb.c b/board/freescale/ls2080ardb/ls2080ardb.c index 6f824f57c47..5c30de83d84 100644 --- a/board/freescale/ls2080ardb/ls2080ardb.c +++ b/board/freescale/ls2080ardb/ls2080ardb.c @@ -3,7 +3,7 @@ * Copyright 2015 Freescale Semiconductor * Copyright 2017, 2021 NXP */ -#include +#include #include #include #include diff --git a/board/freescale/lx2160a/ddr.c b/board/freescale/lx2160a/ddr.c index 637e43a22be..7ab7a9e6ca8 100644 --- a/board/freescale/lx2160a/ddr.c +++ b/board/freescale/lx2160a/ddr.c @@ -3,6 +3,7 @@ * Copyright 2018 NXP */ +#include #include #include #include diff --git a/board/freescale/lx2160a/eth_lx2160ardb.c b/board/freescale/lx2160a/eth_lx2160ardb.c index 90e7c9100e1..c5dfefe1f34 100644 --- a/board/freescale/lx2160a/eth_lx2160ardb.c +++ b/board/freescale/lx2160a/eth_lx2160ardb.c @@ -4,6 +4,7 @@ * */ +#include #include #include #include diff --git a/board/freescale/lx2160a/lx2160a.c b/board/freescale/lx2160a/lx2160a.c index 3aa984dab8e..b3187a14214 100644 --- a/board/freescale/lx2160a/lx2160a.c +++ b/board/freescale/lx2160a/lx2160a.c @@ -3,7 +3,7 @@ * Copyright 2018-2021 NXP */ -#include +#include #include #include #include diff --git a/board/freescale/m5208evbe/m5208evbe.c b/board/freescale/m5208evbe/m5208evbe.c index b202b8094d9..6125c9e13aa 100644 --- a/board/freescale/m5208evbe/m5208evbe.c +++ b/board/freescale/m5208evbe/m5208evbe.c @@ -8,6 +8,7 @@ */ #include +#include #include #include #include diff --git a/board/freescale/m5235evb/m5235evb.c b/board/freescale/m5235evb/m5235evb.c index 65cde56fb2d..44161a0b0a1 100644 --- a/board/freescale/m5235evb/m5235evb.c +++ b/board/freescale/m5235evb/m5235evb.c @@ -8,6 +8,7 @@ */ #include +#include #include #include #include diff --git a/board/freescale/m5249evb/m5249evb.c b/board/freescale/m5249evb/m5249evb.c index 717dc087e02..d67db24d588 100644 --- a/board/freescale/m5249evb/m5249evb.c +++ b/board/freescale/m5249evb/m5249evb.c @@ -4,7 +4,7 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ -#include +#include #include #include #include diff --git a/board/freescale/m5253demo/flash.c b/board/freescale/m5253demo/flash.c index 334518a4bc9..eeb9cfd3125 100644 --- a/board/freescale/m5253demo/flash.c +++ b/board/freescale/m5253demo/flash.c @@ -7,11 +7,10 @@ * TsiChung Liew (Tsi-Chung.Liew@freescale.com) */ -#include +#include #include #include #include -#include #include diff --git a/board/freescale/m5253demo/m5253demo.c b/board/freescale/m5253demo/m5253demo.c index d0b01f81745..c1cff52fb3d 100644 --- a/board/freescale/m5253demo/m5253demo.c +++ b/board/freescale/m5253demo/m5253demo.c @@ -7,7 +7,7 @@ * Hayden Fraser (Hayden.Fraser@freescale.com) */ -#include +#include #include #include #include diff --git a/board/freescale/m5272c3/m5272c3.c b/board/freescale/m5272c3/m5272c3.c index d1286badc61..3c20a23385c 100644 --- a/board/freescale/m5272c3/m5272c3.c +++ b/board/freescale/m5272c3/m5272c3.c @@ -6,7 +6,7 @@ * Copyright (C) 2012 Freescale Semiconductor, Inc. All Rights Reserved. */ -#include +#include #include #include #include diff --git a/board/freescale/m5275evb/m5275evb.c b/board/freescale/m5275evb/m5275evb.c index e1d94fc9a3e..00fa35ca5f7 100644 --- a/board/freescale/m5275evb/m5275evb.c +++ b/board/freescale/m5275evb/m5275evb.c @@ -8,7 +8,7 @@ * Copyright (C) 2012 Freescale Semiconductor, Inc. All Rights Reserved. */ -#include +#include #include #include #include diff --git a/board/freescale/m5282evb/m5282evb.c b/board/freescale/m5282evb/m5282evb.c index 81da6e2abd4..53e0f202101 100644 --- a/board/freescale/m5282evb/m5282evb.c +++ b/board/freescale/m5282evb/m5282evb.c @@ -4,7 +4,7 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ -#include +#include #include #include #include diff --git a/board/freescale/m53017evb/m53017evb.c b/board/freescale/m53017evb/m53017evb.c index 196d56dc17d..76ebc0ab8dc 100644 --- a/board/freescale/m53017evb/m53017evb.c +++ b/board/freescale/m53017evb/m53017evb.c @@ -8,6 +8,7 @@ */ #include +#include #include #include #include diff --git a/board/freescale/m5329evb/m5329evb.c b/board/freescale/m5329evb/m5329evb.c index 26d5f3bf58c..b278dbfb485 100644 --- a/board/freescale/m5329evb/m5329evb.c +++ b/board/freescale/m5329evb/m5329evb.c @@ -8,6 +8,7 @@ */ #include +#include #include #include #include diff --git a/board/freescale/m5329evb/nand.c b/board/freescale/m5329evb/nand.c index a250d61ef36..d921eef8b67 100644 --- a/board/freescale/m5329evb/nand.c +++ b/board/freescale/m5329evb/nand.c @@ -8,6 +8,7 @@ */ #include +#include #include #include diff --git a/board/freescale/m5373evb/m5373evb.c b/board/freescale/m5373evb/m5373evb.c index d6fdf41bab4..0e9eec316c2 100644 --- a/board/freescale/m5373evb/m5373evb.c +++ b/board/freescale/m5373evb/m5373evb.c @@ -8,6 +8,7 @@ */ #include +#include #include #include #include diff --git a/board/freescale/m5373evb/nand.c b/board/freescale/m5373evb/nand.c index e7c08d22e6b..6d825a66e33 100644 --- a/board/freescale/m5373evb/nand.c +++ b/board/freescale/m5373evb/nand.c @@ -8,6 +8,7 @@ */ #include +#include #include #include diff --git a/board/freescale/mpc837xerdb/mpc837xerdb.c b/board/freescale/mpc837xerdb/mpc837xerdb.c index 55299745a3c..97884a39796 100644 --- a/board/freescale/mpc837xerdb/mpc837xerdb.c +++ b/board/freescale/mpc837xerdb/mpc837xerdb.c @@ -5,7 +5,7 @@ * Joe D'Abbraccio */ -#include +#include #include #include #include diff --git a/board/freescale/mpc8548cds/ddr.c b/board/freescale/mpc8548cds/ddr.c index 14202cd5a78..b6c1847b141 100644 --- a/board/freescale/mpc8548cds/ddr.c +++ b/board/freescale/mpc8548cds/ddr.c @@ -3,6 +3,7 @@ * Copyright 2008 Freescale Semiconductor, Inc. */ +#include #include #include diff --git a/board/freescale/mpc8548cds/law.c b/board/freescale/mpc8548cds/law.c index 2334870fda0..7b6ef5b11c9 100644 --- a/board/freescale/mpc8548cds/law.c +++ b/board/freescale/mpc8548cds/law.c @@ -6,7 +6,7 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ -#include +#include #include #include diff --git a/board/freescale/mpc8548cds/mpc8548cds.c b/board/freescale/mpc8548cds/mpc8548cds.c index 7810010fd04..ec6e3a2d0ab 100644 --- a/board/freescale/mpc8548cds/mpc8548cds.c +++ b/board/freescale/mpc8548cds/mpc8548cds.c @@ -5,7 +5,7 @@ * (C) Copyright 2002 Scott McNutt */ -#include +#include #include #include #include diff --git a/board/freescale/mpc8548cds/tlb.c b/board/freescale/mpc8548cds/tlb.c index 0b2afa8054d..994a32dd92a 100644 --- a/board/freescale/mpc8548cds/tlb.c +++ b/board/freescale/mpc8548cds/tlb.c @@ -6,9 +6,8 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ -#include +#include #include -#include struct fsl_e_tlb_entry tlb_table[] = { /* TLB 0 - for temp stack in cache */ diff --git a/board/freescale/mx23evk/mx23evk.c b/board/freescale/mx23evk/mx23evk.c index fbc8fbdbf59..df4fb391255 100644 --- a/board/freescale/mx23evk/mx23evk.c +++ b/board/freescale/mx23evk/mx23evk.c @@ -11,6 +11,7 @@ * on behalf of DENX Software Engineering GmbH */ +#include #include #include #include diff --git a/board/freescale/mx23evk/spl_boot.c b/board/freescale/mx23evk/spl_boot.c index a4c39a35221..14e9b4a8634 100644 --- a/board/freescale/mx23evk/spl_boot.c +++ b/board/freescale/mx23evk/spl_boot.c @@ -6,6 +6,7 @@ * on behalf of DENX Software Engineering GmbH */ +#include #include #include #include diff --git a/board/freescale/mx28evk/iomux.c b/board/freescale/mx28evk/iomux.c index b84b045bd1f..cc0c8588544 100644 --- a/board/freescale/mx28evk/iomux.c +++ b/board/freescale/mx28evk/iomux.c @@ -6,6 +6,7 @@ * on behalf of DENX Software Engineering GmbH */ +#include #include #include #include diff --git a/board/freescale/mx28evk/mx28evk.c b/board/freescale/mx28evk/mx28evk.c index ada572912da..88c3bf36089 100644 --- a/board/freescale/mx28evk/mx28evk.c +++ b/board/freescale/mx28evk/mx28evk.c @@ -11,6 +11,7 @@ * on behalf of DENX Software Engineering GmbH */ +#include #include #include #include diff --git a/board/freescale/mx51evk/mx51evk.c b/board/freescale/mx51evk/mx51evk.c index 69456842302..95edb359944 100644 --- a/board/freescale/mx51evk/mx51evk.c +++ b/board/freescale/mx51evk/mx51evk.c @@ -3,7 +3,7 @@ * (C) Copyright 2009 Freescale Semiconductor, Inc. */ -#include +#include #include #include #include diff --git a/board/freescale/mx53loco/mx53loco.c b/board/freescale/mx53loco/mx53loco.c index 2d8f5da9906..d418cd8f4c0 100644 --- a/board/freescale/mx53loco/mx53loco.c +++ b/board/freescale/mx53loco/mx53loco.c @@ -4,7 +4,7 @@ * Jason Liu */ -#include +#include #include #include #include diff --git a/board/freescale/mx6memcal/mx6memcal.c b/board/freescale/mx6memcal/mx6memcal.c index 17095c34e92..0dfd7dec9ef 100644 --- a/board/freescale/mx6memcal/mx6memcal.c +++ b/board/freescale/mx6memcal/mx6memcal.c @@ -7,6 +7,7 @@ * Author: Eric Nelson */ +#include #include #include #include diff --git a/board/freescale/mx6memcal/spl.c b/board/freescale/mx6memcal/spl.c index bc9c4259f07..61d0ca3408f 100644 --- a/board/freescale/mx6memcal/spl.c +++ b/board/freescale/mx6memcal/spl.c @@ -4,6 +4,7 @@ * Author: Eric Nelson */ +#include #include #include #include diff --git a/board/freescale/mx6sabreauto/mx6sabreauto.c b/board/freescale/mx6sabreauto/mx6sabreauto.c index e782543c0fa..77e92006131 100644 --- a/board/freescale/mx6sabreauto/mx6sabreauto.c +++ b/board/freescale/mx6sabreauto/mx6sabreauto.c @@ -5,6 +5,7 @@ * Author: Fabio Estevam */ +#include #include #include #include diff --git a/board/freescale/mx6slevk/mx6slevk.c b/board/freescale/mx6slevk/mx6slevk.c index d37d8a4136f..e9ac57118b0 100644 --- a/board/freescale/mx6slevk/mx6slevk.c +++ b/board/freescale/mx6slevk/mx6slevk.c @@ -21,6 +21,7 @@ #include #include #include +#include #include #include #include diff --git a/board/freescale/mx6sllevk/mx6sllevk.c b/board/freescale/mx6sllevk/mx6sllevk.c index 7114444fc3e..10a00095aff 100644 --- a/board/freescale/mx6sllevk/mx6sllevk.c +++ b/board/freescale/mx6sllevk/mx6sllevk.c @@ -15,6 +15,7 @@ #include #include #include +#include #include #include #include diff --git a/board/freescale/mx6sxsabreauto/mx6sxsabreauto.c b/board/freescale/mx6sxsabreauto/mx6sxsabreauto.c index 6176f738238..84cc51e9cac 100644 --- a/board/freescale/mx6sxsabreauto/mx6sxsabreauto.c +++ b/board/freescale/mx6sxsabreauto/mx6sxsabreauto.c @@ -20,7 +20,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/board/freescale/mx6sxsabresd/mx6sxsabresd.c b/board/freescale/mx6sxsabresd/mx6sxsabresd.c index e3353feec68..e7958df4024 100644 --- a/board/freescale/mx6sxsabresd/mx6sxsabresd.c +++ b/board/freescale/mx6sxsabresd/mx6sxsabresd.c @@ -21,6 +21,7 @@ #include #include #include +#include #include #include #include diff --git a/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c b/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c index 6b0665a1067..534b16cec7a 100644 --- a/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c +++ b/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c @@ -19,7 +19,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/board/freescale/mx6ullevk/mx6ullevk.c b/board/freescale/mx6ullevk/mx6ullevk.c index 189eddefea3..de45f8b1d24 100644 --- a/board/freescale/mx6ullevk/mx6ullevk.c +++ b/board/freescale/mx6ullevk/mx6ullevk.c @@ -15,7 +15,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/board/freescale/mx7dsabresd/mx7dsabresd.c b/board/freescale/mx7dsabresd/mx7dsabresd.c index 3db167c0dad..4fe23b51cd1 100644 --- a/board/freescale/mx7dsabresd/mx7dsabresd.c +++ b/board/freescale/mx7dsabresd/mx7dsabresd.c @@ -15,6 +15,7 @@ #include #include #include +#include #include #include #include diff --git a/board/freescale/mx7ulp_evk/mx7ulp_evk.c b/board/freescale/mx7ulp_evk/mx7ulp_evk.c index af68e57854e..01e32136532 100644 --- a/board/freescale/mx7ulp_evk/mx7ulp_evk.c +++ b/board/freescale/mx7ulp_evk/mx7ulp_evk.c @@ -3,6 +3,7 @@ * Copyright (C) 2016 Freescale Semiconductor, Inc. */ +#include #include #include #include diff --git a/board/freescale/p1010rdb/ddr.c b/board/freescale/p1010rdb/ddr.c index 43a0936bc9a..b423ec8e218 100644 --- a/board/freescale/p1010rdb/ddr.c +++ b/board/freescale/p1010rdb/ddr.c @@ -3,6 +3,7 @@ * Copyright 2010-2011 Freescale Semiconductor, Inc. */ +#include #include #include #include diff --git a/board/freescale/p1010rdb/law.c b/board/freescale/p1010rdb/law.c index a7d80f28521..13fc2fa2e38 100644 --- a/board/freescale/p1010rdb/law.c +++ b/board/freescale/p1010rdb/law.c @@ -3,7 +3,7 @@ * Copyright 2010-2011 Freescale Semiconductor, Inc. */ -#include +#include #include #include diff --git a/board/freescale/p1010rdb/p1010rdb.c b/board/freescale/p1010rdb/p1010rdb.c index ab0031440ae..d32274b2481 100644 --- a/board/freescale/p1010rdb/p1010rdb.c +++ b/board/freescale/p1010rdb/p1010rdb.c @@ -4,7 +4,7 @@ * Copyright 2020 NXP */ -#include +#include #include #include #include diff --git a/board/freescale/p1010rdb/spl.c b/board/freescale/p1010rdb/spl.c index fc26cef2cc8..e450f626e0a 100644 --- a/board/freescale/p1010rdb/spl.c +++ b/board/freescale/p1010rdb/spl.c @@ -2,7 +2,7 @@ /* Copyright 2013 Freescale Semiconductor, Inc. */ -#include +#include #include #include #include diff --git a/board/freescale/p1010rdb/spl_minimal.c b/board/freescale/p1010rdb/spl_minimal.c index 8cd79c6fb5f..8f0dec4c0ab 100644 --- a/board/freescale/p1010rdb/spl_minimal.c +++ b/board/freescale/p1010rdb/spl_minimal.c @@ -2,7 +2,7 @@ /* * Copyright 2011 Freescale Semiconductor, Inc. */ -#include +#include #include #include #include diff --git a/board/freescale/p1010rdb/tlb.c b/board/freescale/p1010rdb/tlb.c index 44acebaa2bb..265cde81a3c 100644 --- a/board/freescale/p1010rdb/tlb.c +++ b/board/freescale/p1010rdb/tlb.c @@ -3,9 +3,8 @@ * Copyright 2010-2011 Freescale Semiconductor, Inc. */ -#include +#include #include -#include struct fsl_e_tlb_entry tlb_table[] = { /* TLB 0 - for temp stack in cache */ diff --git a/board/freescale/p1_p2_rdb_pc/ddr.c b/board/freescale/p1_p2_rdb_pc/ddr.c index 8622a5a610a..5f16779abaa 100644 --- a/board/freescale/p1_p2_rdb_pc/ddr.c +++ b/board/freescale/p1_p2_rdb_pc/ddr.c @@ -3,12 +3,11 @@ * Copyright 2010-2011 Freescale Semiconductor, Inc. */ -#include +#include #include -#include #include #include -#include +#include #include #include #include diff --git a/board/freescale/p1_p2_rdb_pc/law.c b/board/freescale/p1_p2_rdb_pc/law.c index 49594070b83..6085984eab4 100644 --- a/board/freescale/p1_p2_rdb_pc/law.c +++ b/board/freescale/p1_p2_rdb_pc/law.c @@ -3,7 +3,7 @@ * Copyright 2010-2011 Freescale Semiconductor, Inc. */ -#include +#include #include #include diff --git a/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c b/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c index 399ff720722..602b7f0156b 100644 --- a/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c +++ b/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c @@ -4,7 +4,7 @@ * Copyright 2020 NXP */ -#include +#include #include #include #include diff --git a/board/freescale/p1_p2_rdb_pc/spl.c b/board/freescale/p1_p2_rdb_pc/spl.c index b07f481fbf9..6c3f82849e3 100644 --- a/board/freescale/p1_p2_rdb_pc/spl.c +++ b/board/freescale/p1_p2_rdb_pc/spl.c @@ -3,7 +3,7 @@ * Copyright 2013 Freescale Semiconductor, Inc. */ -#include +#include #include #include #include diff --git a/board/freescale/p1_p2_rdb_pc/spl_minimal.c b/board/freescale/p1_p2_rdb_pc/spl_minimal.c index 511bcf5506b..f9e0b5b25ab 100644 --- a/board/freescale/p1_p2_rdb_pc/spl_minimal.c +++ b/board/freescale/p1_p2_rdb_pc/spl_minimal.c @@ -3,7 +3,7 @@ * Copyright 2011 Freescale Semiconductor, Inc. */ -#include +#include #include #include #include diff --git a/board/freescale/p1_p2_rdb_pc/tlb.c b/board/freescale/p1_p2_rdb_pc/tlb.c index ae0b7adbe54..94773969e9d 100644 --- a/board/freescale/p1_p2_rdb_pc/tlb.c +++ b/board/freescale/p1_p2_rdb_pc/tlb.c @@ -3,9 +3,8 @@ * Copyright 2010-2011 Freescale Semiconductor, Inc. */ -#include +#include #include -#include struct fsl_e_tlb_entry tlb_table[] = { /* TLB 0 - for temp stack in cache */ diff --git a/board/freescale/p2041rdb/cpld.c b/board/freescale/p2041rdb/cpld.c index 915a8b994d5..a1908b8a571 100644 --- a/board/freescale/p2041rdb/cpld.c +++ b/board/freescale/p2041rdb/cpld.c @@ -11,6 +11,7 @@ * CPLD_BASE - The virtual address of the base of the CPLD register map */ +#include #include #include diff --git a/board/freescale/p2041rdb/ddr.c b/board/freescale/p2041rdb/ddr.c index b8b765a85ef..910058cefe1 100644 --- a/board/freescale/p2041rdb/ddr.c +++ b/board/freescale/p2041rdb/ddr.c @@ -3,6 +3,7 @@ * Copyright 2011 Freescale Semiconductor, Inc. */ +#include #include #include #include diff --git a/board/freescale/p2041rdb/eth.c b/board/freescale/p2041rdb/eth.c index 65850866777..c0d05539c5c 100644 --- a/board/freescale/p2041rdb/eth.c +++ b/board/freescale/p2041rdb/eth.c @@ -12,7 +12,7 @@ * and serdes protocol selection. */ -#include +#include #include #include #include diff --git a/board/freescale/p2041rdb/p2041rdb.c b/board/freescale/p2041rdb/p2041rdb.c index d5b71f78430..575259b19c0 100644 --- a/board/freescale/p2041rdb/p2041rdb.c +++ b/board/freescale/p2041rdb/p2041rdb.c @@ -3,7 +3,7 @@ * Copyright 2011,2012 Freescale Semiconductor, Inc. */ -#include +#include #include #include #include diff --git a/board/freescale/t102xrdb/cpld.c b/board/freescale/t102xrdb/cpld.c index cc933ccd544..17a6226cafc 100644 --- a/board/freescale/t102xrdb/cpld.c +++ b/board/freescale/t102xrdb/cpld.c @@ -7,7 +7,7 @@ * The following macros need to be defined: */ -#include +#include #include #include #include "cpld.h" diff --git a/board/freescale/t102xrdb/ddr.c b/board/freescale/t102xrdb/ddr.c index f8d504fb3c7..1b417398992 100644 --- a/board/freescale/t102xrdb/ddr.c +++ b/board/freescale/t102xrdb/ddr.c @@ -3,7 +3,7 @@ * Copyright 2014 Freescale Semiconductor, Inc. */ -#include +#include #include #include #include diff --git a/board/freescale/t102xrdb/eth_t102xrdb.c b/board/freescale/t102xrdb/eth_t102xrdb.c index 7185a0abd52..ad78f72f98c 100644 --- a/board/freescale/t102xrdb/eth_t102xrdb.c +++ b/board/freescale/t102xrdb/eth_t102xrdb.c @@ -5,7 +5,7 @@ * Shengzhou Liu */ -#include +#include #include #include #include diff --git a/board/freescale/t102xrdb/law.c b/board/freescale/t102xrdb/law.c index 81caa961897..d636bef325f 100644 --- a/board/freescale/t102xrdb/law.c +++ b/board/freescale/t102xrdb/law.c @@ -3,7 +3,7 @@ * Copyright 2014 Freescale Semiconductor, Inc. */ -#include +#include #include #include diff --git a/board/freescale/t102xrdb/spl.c b/board/freescale/t102xrdb/spl.c index de6cdda194e..9faf259af74 100644 --- a/board/freescale/t102xrdb/spl.c +++ b/board/freescale/t102xrdb/spl.c @@ -2,7 +2,7 @@ /* Copyright 2014 Freescale Semiconductor, Inc. */ -#include +#include #include #include #include diff --git a/board/freescale/t102xrdb/t102xrdb.c b/board/freescale/t102xrdb/t102xrdb.c index 0a29e27b42c..73f9d3ac72e 100644 --- a/board/freescale/t102xrdb/t102xrdb.c +++ b/board/freescale/t102xrdb/t102xrdb.c @@ -4,7 +4,7 @@ * Copyright 2020-2023 NXP */ -#include +#include #include #include #include diff --git a/board/freescale/t102xrdb/tlb.c b/board/freescale/t102xrdb/tlb.c index 008bd6e72b7..2519a9e4dbe 100644 --- a/board/freescale/t102xrdb/tlb.c +++ b/board/freescale/t102xrdb/tlb.c @@ -3,9 +3,8 @@ * Copyright 2014 Freescale Semiconductor, Inc. */ -#include +#include #include -#include struct fsl_e_tlb_entry tlb_table[] = { /* TLB 0 - for temp stack in cache */ diff --git a/board/freescale/t104xrdb/cpld.c b/board/freescale/t104xrdb/cpld.c index c2d526ae15a..9ac57bbd830 100644 --- a/board/freescale/t104xrdb/cpld.c +++ b/board/freescale/t104xrdb/cpld.c @@ -10,7 +10,7 @@ * CFG_SYS_CPLD_BASE-The virtual address of the base of the CPLD register map */ -#include +#include #include #include diff --git a/board/freescale/t104xrdb/ddr.c b/board/freescale/t104xrdb/ddr.c index bab684860da..02ddb661415 100644 --- a/board/freescale/t104xrdb/ddr.c +++ b/board/freescale/t104xrdb/ddr.c @@ -4,7 +4,7 @@ * Copyright 2021 NXP */ -#include +#include #include #include #include diff --git a/board/freescale/t104xrdb/eth.c b/board/freescale/t104xrdb/eth.c index d5c084e319d..5eca9386f6e 100644 --- a/board/freescale/t104xrdb/eth.c +++ b/board/freescale/t104xrdb/eth.c @@ -3,7 +3,7 @@ * Copyright 2014 Freescale Semiconductor, Inc. */ -#include +#include #include #include #include diff --git a/board/freescale/t104xrdb/law.c b/board/freescale/t104xrdb/law.c index d34641c2397..a0d6eb5b270 100644 --- a/board/freescale/t104xrdb/law.c +++ b/board/freescale/t104xrdb/law.c @@ -3,7 +3,7 @@ * Copyright 2013 Freescale Semiconductor, Inc. */ -#include +#include #include #include diff --git a/board/freescale/t104xrdb/spl.c b/board/freescale/t104xrdb/spl.c index e02a1f95d4c..dd8283f3c60 100644 --- a/board/freescale/t104xrdb/spl.c +++ b/board/freescale/t104xrdb/spl.c @@ -2,7 +2,7 @@ /* Copyright 2013 Freescale Semiconductor, Inc. */ -#include +#include #include #include #include diff --git a/board/freescale/t104xrdb/t104xrdb.c b/board/freescale/t104xrdb/t104xrdb.c index ef4dfef4965..b3080492716 100644 --- a/board/freescale/t104xrdb/t104xrdb.c +++ b/board/freescale/t104xrdb/t104xrdb.c @@ -4,7 +4,7 @@ * Copyright 2023 NXP */ -#include +#include #include #include #include diff --git a/board/freescale/t104xrdb/tlb.c b/board/freescale/t104xrdb/tlb.c index 24bc83f756b..10be580b813 100644 --- a/board/freescale/t104xrdb/tlb.c +++ b/board/freescale/t104xrdb/tlb.c @@ -3,9 +3,8 @@ * Copyright 2013 Freescale Semiconductor, Inc. */ -#include +#include #include -#include struct fsl_e_tlb_entry tlb_table[] = { /* TLB 0 - for temp stack in cache */ diff --git a/board/freescale/t208xqds/ddr.c b/board/freescale/t208xqds/ddr.c index 9076fbba10a..56471b3988b 100644 --- a/board/freescale/t208xqds/ddr.c +++ b/board/freescale/t208xqds/ddr.c @@ -3,6 +3,7 @@ * Copyright 2013 Freescale Semiconductor, Inc. */ +#include #include #include #include diff --git a/board/freescale/t208xqds/eth_t208xqds.c b/board/freescale/t208xqds/eth_t208xqds.c index 9f299227e29..569b193eab7 100644 --- a/board/freescale/t208xqds/eth_t208xqds.c +++ b/board/freescale/t208xqds/eth_t208xqds.c @@ -6,7 +6,7 @@ * Shengzhou Liu */ -#include +#include #include #include #include diff --git a/board/freescale/t208xqds/law.c b/board/freescale/t208xqds/law.c index 287f4650e05..3cdd4937684 100644 --- a/board/freescale/t208xqds/law.c +++ b/board/freescale/t208xqds/law.c @@ -6,7 +6,7 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ -#include +#include #include #include diff --git a/board/freescale/t208xqds/spl.c b/board/freescale/t208xqds/spl.c index 44ad4e68d9f..8866be54a66 100644 --- a/board/freescale/t208xqds/spl.c +++ b/board/freescale/t208xqds/spl.c @@ -2,7 +2,7 @@ /* Copyright 2013 Freescale Semiconductor, Inc. */ -#include +#include #include #include #include diff --git a/board/freescale/t208xqds/t208xqds.c b/board/freescale/t208xqds/t208xqds.c index 5e71da0e163..8be55e52e5f 100644 --- a/board/freescale/t208xqds/t208xqds.c +++ b/board/freescale/t208xqds/t208xqds.c @@ -4,7 +4,7 @@ * Copyright 2020 NXP */ -#include +#include #include #include #include diff --git a/board/freescale/t208xqds/tlb.c b/board/freescale/t208xqds/tlb.c index f99d51c8cd7..3d220afc16e 100644 --- a/board/freescale/t208xqds/tlb.c +++ b/board/freescale/t208xqds/tlb.c @@ -6,9 +6,8 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ -#include +#include #include -#include struct fsl_e_tlb_entry tlb_table[] = { /* TLB 0 - for temp stack in cache */ diff --git a/board/freescale/t208xrdb/cpld.c b/board/freescale/t208xrdb/cpld.c index d2226af6278..933fa0decc3 100644 --- a/board/freescale/t208xrdb/cpld.c +++ b/board/freescale/t208xrdb/cpld.c @@ -5,9 +5,8 @@ * Freescale T2080RDB board-specific CPLD controlling supports. */ -#include +#include #include -#include #include "cpld.h" u8 cpld_read(unsigned int reg) diff --git a/board/freescale/t208xrdb/ddr.c b/board/freescale/t208xrdb/ddr.c index fe98f62668a..1fbab36e1a2 100644 --- a/board/freescale/t208xrdb/ddr.c +++ b/board/freescale/t208xrdb/ddr.c @@ -3,6 +3,7 @@ * Copyright 2014 Freescale Semiconductor, Inc. */ +#include #include #include #include diff --git a/board/freescale/t208xrdb/eth_t208xrdb.c b/board/freescale/t208xrdb/eth_t208xrdb.c index 5223eccb280..e4592eac153 100644 --- a/board/freescale/t208xrdb/eth_t208xrdb.c +++ b/board/freescale/t208xrdb/eth_t208xrdb.c @@ -6,6 +6,7 @@ * Shengzhou Liu */ +#include #include #include #include diff --git a/board/freescale/t208xrdb/law.c b/board/freescale/t208xrdb/law.c index e1f570a8935..53a13694506 100644 --- a/board/freescale/t208xrdb/law.c +++ b/board/freescale/t208xrdb/law.c @@ -6,7 +6,7 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ -#include +#include #include #include diff --git a/board/freescale/t208xrdb/spl.c b/board/freescale/t208xrdb/spl.c index df3b9c6fe40..130cb8847c0 100644 --- a/board/freescale/t208xrdb/spl.c +++ b/board/freescale/t208xrdb/spl.c @@ -2,7 +2,7 @@ /* Copyright 2013 Freescale Semiconductor, Inc. */ -#include +#include #include #include #include diff --git a/board/freescale/t208xrdb/t208xrdb.c b/board/freescale/t208xrdb/t208xrdb.c index d93edf007ad..e33e5d082d8 100644 --- a/board/freescale/t208xrdb/t208xrdb.c +++ b/board/freescale/t208xrdb/t208xrdb.c @@ -4,7 +4,7 @@ * Copyright 2021-2023 NXP */ -#include +#include #include #include #include diff --git a/board/freescale/t208xrdb/tlb.c b/board/freescale/t208xrdb/tlb.c index df5831541f3..688a208c621 100644 --- a/board/freescale/t208xrdb/tlb.c +++ b/board/freescale/t208xrdb/tlb.c @@ -6,9 +6,8 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ -#include +#include #include -#include struct fsl_e_tlb_entry tlb_table[] = { /* TLB 0 - for temp stack in cache */ diff --git a/board/freescale/t4rdb/cpld.c b/board/freescale/t4rdb/cpld.c index cd14d5895f5..8b1012086ec 100644 --- a/board/freescale/t4rdb/cpld.c +++ b/board/freescale/t4rdb/cpld.c @@ -14,7 +14,7 @@ * */ -#include +#include #include #include diff --git a/board/freescale/t4rdb/ddr.c b/board/freescale/t4rdb/ddr.c index 5b60b50c672..57cbde154f0 100644 --- a/board/freescale/t4rdb/ddr.c +++ b/board/freescale/t4rdb/ddr.c @@ -3,6 +3,7 @@ * Copyright 2014 Freescale Semiconductor, Inc. */ +#include #include #include #include diff --git a/board/freescale/t4rdb/eth.c b/board/freescale/t4rdb/eth.c index e7646365d7d..2e52543847b 100644 --- a/board/freescale/t4rdb/eth.c +++ b/board/freescale/t4rdb/eth.c @@ -5,7 +5,7 @@ * Chunhe Lan */ -#include +#include #include #include #include diff --git a/board/freescale/t4rdb/law.c b/board/freescale/t4rdb/law.c index c43ac0f30d7..43eeb884e2f 100644 --- a/board/freescale/t4rdb/law.c +++ b/board/freescale/t4rdb/law.c @@ -3,7 +3,7 @@ * Copyright 2014 Freescale Semiconductor, Inc. */ -#include +#include #include #include diff --git a/board/freescale/t4rdb/spl.c b/board/freescale/t4rdb/spl.c index 9d2472dec25..779457d2964 100644 --- a/board/freescale/t4rdb/spl.c +++ b/board/freescale/t4rdb/spl.c @@ -5,7 +5,7 @@ * Author: Chunhe Lan */ -#include +#include #include #include #include diff --git a/board/freescale/t4rdb/t4240rdb.c b/board/freescale/t4rdb/t4240rdb.c index 5cacfd27380..ab717769ed5 100644 --- a/board/freescale/t4rdb/t4240rdb.c +++ b/board/freescale/t4rdb/t4240rdb.c @@ -4,7 +4,7 @@ * Copyright 2023 NXP */ -#include +#include #include #include #include diff --git a/board/freescale/t4rdb/tlb.c b/board/freescale/t4rdb/tlb.c index 1fb9d41d52b..f5af893c2d9 100644 --- a/board/freescale/t4rdb/tlb.c +++ b/board/freescale/t4rdb/tlb.c @@ -3,9 +3,8 @@ * Copyright 2014 Freescale Semiconductor, Inc. */ -#include +#include #include -#include struct fsl_e_tlb_entry tlb_table[] = { /* TLB 0 - for temp stack in cache */ diff --git a/board/freescale/vf610twr/vf610twr.c b/board/freescale/vf610twr/vf610twr.c index 80a798af9cb..98cb0140ad0 100644 --- a/board/freescale/vf610twr/vf610twr.c +++ b/board/freescale/vf610twr/vf610twr.c @@ -3,6 +3,7 @@ * Copyright 2013 Freescale Semiconductor, Inc. */ +#include #include #include #include diff --git a/board/friendlyarm/nanopi2/board.c b/board/friendlyarm/nanopi2/board.c index c8cbc5a15fa..393c5a447d6 100644 --- a/board/friendlyarm/nanopi2/board.c +++ b/board/friendlyarm/nanopi2/board.c @@ -5,6 +5,7 @@ */ #include +#include #include #include #include diff --git a/board/friendlyarm/nanopi2/hwrev.c b/board/friendlyarm/nanopi2/hwrev.c index cd9c2414a32..585e08c944f 100644 --- a/board/friendlyarm/nanopi2/hwrev.c +++ b/board/friendlyarm/nanopi2/hwrev.c @@ -5,6 +5,7 @@ */ #include +#include #include #include diff --git a/board/friendlyarm/nanopi2/lcds.c b/board/friendlyarm/nanopi2/lcds.c index b37367300cf..7303e53af92 100644 --- a/board/friendlyarm/nanopi2/lcds.c +++ b/board/friendlyarm/nanopi2/lcds.c @@ -4,6 +4,7 @@ */ #include +#include #include #include #include diff --git a/board/friendlyarm/nanopi2/onewire.c b/board/friendlyarm/nanopi2/onewire.c index 31cc871330c..4f0b1e33c2d 100644 --- a/board/friendlyarm/nanopi2/onewire.c +++ b/board/friendlyarm/nanopi2/onewire.c @@ -5,6 +5,7 @@ */ #include +#include #include #include #include diff --git a/board/gardena/smart-gateway-at91sam/board.c b/board/gardena/smart-gateway-at91sam/board.c index 2b5b2844fbd..d9dfb256b32 100644 --- a/board/gardena/smart-gateway-at91sam/board.c +++ b/board/gardena/smart-gateway-at91sam/board.c @@ -4,7 +4,7 @@ * Copyright (C) 2019 Stefan Roese */ -#include +#include #include #include #include diff --git a/board/gardena/smart-gateway-at91sam/spl.c b/board/gardena/smart-gateway-at91sam/spl.c index fb3ec48f9c5..2807c4e3114 100644 --- a/board/gardena/smart-gateway-at91sam/spl.c +++ b/board/gardena/smart-gateway-at91sam/spl.c @@ -4,7 +4,7 @@ * Copyright (C) 2019 Stefan Roese */ -#include +#include #include #include #include diff --git a/board/gardena/smart-gateway-mt7688/board.c b/board/gardena/smart-gateway-mt7688/board.c index c6b14bed41f..0cfde91c94c 100644 --- a/board/gardena/smart-gateway-mt7688/board.c +++ b/board/gardena/smart-gateway-mt7688/board.c @@ -3,6 +3,7 @@ * Copyright (C) 2018 Stefan Roese */ +#include #include #include #include diff --git a/board/gateworks/gw_ventana/common.c b/board/gateworks/gw_ventana/common.c index 891d1b5ddca..74328b2e1b3 100644 --- a/board/gateworks/gw_ventana/common.c +++ b/board/gateworks/gw_ventana/common.c @@ -5,6 +5,7 @@ * Author: Tim Harvey */ +#include #include #include #include diff --git a/board/gateworks/gw_ventana/eeprom.c b/board/gateworks/gw_ventana/eeprom.c index b37f1972249..e622a9ba9e4 100644 --- a/board/gateworks/gw_ventana/eeprom.c +++ b/board/gateworks/gw_ventana/eeprom.c @@ -5,6 +5,7 @@ */ #include +#include #include #include #include diff --git a/board/gateworks/gw_ventana/gw_ventana.c b/board/gateworks/gw_ventana/gw_ventana.c index 21a908c20dd..683def7e9f7 100644 --- a/board/gateworks/gw_ventana/gw_ventana.c +++ b/board/gateworks/gw_ventana/gw_ventana.c @@ -6,6 +6,7 @@ */ #include +#include #include #include #include diff --git a/board/gateworks/gw_ventana/gw_ventana_spl.c b/board/gateworks/gw_ventana/gw_ventana_spl.c index 3de4727b2ed..2f046c9c0b3 100644 --- a/board/gateworks/gw_ventana/gw_ventana_spl.c +++ b/board/gateworks/gw_ventana/gw_ventana_spl.c @@ -4,7 +4,7 @@ * Author: Tim Harvey */ -#include +#include #include #include #include diff --git a/board/gateworks/venice/eeprom.c b/board/gateworks/venice/eeprom.c index afaabf34879..241be4ee630 100644 --- a/board/gateworks/venice/eeprom.c +++ b/board/gateworks/venice/eeprom.c @@ -3,6 +3,7 @@ * Copyright 2021 Gateworks Corporation */ +#include #include #include #include diff --git a/board/gateworks/venice/lpddr4_timing_imx8mm.c b/board/gateworks/venice/lpddr4_timing_imx8mm.c index 3f2c090a94f..78b431dc284 100644 --- a/board/gateworks/venice/lpddr4_timing_imx8mm.c +++ b/board/gateworks/venice/lpddr4_timing_imx8mm.c @@ -6,6 +6,7 @@ */ #include +#include #include #include diff --git a/board/gateworks/venice/spl.c b/board/gateworks/venice/spl.c index f10d310a46d..b0a315ba953 100644 --- a/board/gateworks/venice/spl.c +++ b/board/gateworks/venice/spl.c @@ -3,6 +3,7 @@ * Copyright 2021 Gateworks Corporation */ +#include #include #include #include diff --git a/board/gdsys/a38x/controlcenterdc.c b/board/gdsys/a38x/controlcenterdc.c index 4abb3e45128..0f620c2d917 100644 --- a/board/gdsys/a38x/controlcenterdc.c +++ b/board/gdsys/a38x/controlcenterdc.c @@ -4,7 +4,7 @@ * Copyright (C) 2016 Mario Six */ -#include +#include #include #include #include diff --git a/board/gdsys/a38x/dt_helpers.c b/board/gdsys/a38x/dt_helpers.c index a12e115c72c..61d30c2e637 100644 --- a/board/gdsys/a38x/dt_helpers.c +++ b/board/gdsys/a38x/dt_helpers.c @@ -4,6 +4,7 @@ * Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc */ +#include #include #include #include diff --git a/board/gdsys/a38x/hre.c b/board/gdsys/a38x/hre.c index f303793b63b..d16233ed78e 100644 --- a/board/gdsys/a38x/hre.c +++ b/board/gdsys/a38x/hre.c @@ -4,6 +4,7 @@ * Reinhard Pfau, Guntermann & Drunck GmbH, reinhard.pfau@gdsys.cc */ +#include #include #include #include diff --git a/board/gdsys/a38x/hydra.c b/board/gdsys/a38x/hydra.c index 970d508ff32..495a9769188 100644 --- a/board/gdsys/a38x/hydra.c +++ b/board/gdsys/a38x/hydra.c @@ -1,8 +1,8 @@ +#include #include #include /* ctrlc */ #include #include -#include #include "hydra.h" diff --git a/board/gdsys/a38x/ihs_phys.c b/board/gdsys/a38x/ihs_phys.c index 690a29690b9..60a5c37aeff 100644 --- a/board/gdsys/a38x/ihs_phys.c +++ b/board/gdsys/a38x/ihs_phys.c @@ -1,3 +1,4 @@ +#include #include #include #include diff --git a/board/gdsys/a38x/keyprogram.c b/board/gdsys/a38x/keyprogram.c index 15c36e22684..7020fae1894 100644 --- a/board/gdsys/a38x/keyprogram.c +++ b/board/gdsys/a38x/keyprogram.c @@ -4,6 +4,7 @@ * Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc */ +#include #include #include #include diff --git a/board/gdsys/common/cmd_ioloop.c b/board/gdsys/common/cmd_ioloop.c index fb6313f0197..1412421a021 100644 --- a/board/gdsys/common/cmd_ioloop.c +++ b/board/gdsys/common/cmd_ioloop.c @@ -4,6 +4,7 @@ * Dirk Eibach, Guntermann & Drunck GmbH, dirk.eibach@gdsys.cc */ +#include #include #include #include diff --git a/board/gdsys/common/dp501.c b/board/gdsys/common/dp501.c index 7698e76b524..9ca69ebcbbe 100644 --- a/board/gdsys/common/dp501.c +++ b/board/gdsys/common/dp501.c @@ -8,6 +8,7 @@ #ifdef CONFIG_GDSYS_LEGACY_DRIVERS +#include #include #include #include diff --git a/board/gdsys/common/ihs_mdio.c b/board/gdsys/common/ihs_mdio.c index a814566beaf..5f1215e9e8a 100644 --- a/board/gdsys/common/ihs_mdio.c +++ b/board/gdsys/common/ihs_mdio.c @@ -4,6 +4,7 @@ * Dirk Eibach, Guntermann & Drunck GmbH, dirk.eibach@gdsys.cc */ +#include #include #include diff --git a/board/gdsys/common/ioep-fpga.c b/board/gdsys/common/ioep-fpga.c index f01b48b5c8e..7292d7ab5a4 100644 --- a/board/gdsys/common/ioep-fpga.c +++ b/board/gdsys/common/ioep-fpga.c @@ -6,6 +6,7 @@ #ifdef CONFIG_GDSYS_LEGACY_DRIVERS +#include #include #include diff --git a/board/gdsys/common/osd.c b/board/gdsys/common/osd.c index bd9c5ca9969..dc548efbc7a 100644 --- a/board/gdsys/common/osd.c +++ b/board/gdsys/common/osd.c @@ -6,6 +6,7 @@ #ifdef CONFIG_GDSYS_LEGACY_DRIVERS +#include #include #include #include diff --git a/board/gdsys/common/osd_cmd.c b/board/gdsys/common/osd_cmd.c index 39e64f5f2eb..6a9c0b4c24f 100644 --- a/board/gdsys/common/osd_cmd.c +++ b/board/gdsys/common/osd_cmd.c @@ -9,6 +9,7 @@ * Dirk Eibach, Guntermann & Drunck GmbH, eibach@gdsys.de */ +#include #include #include #include diff --git a/board/gdsys/mpc8308/gazerbeam.c b/board/gdsys/mpc8308/gazerbeam.c index 05e4d84460a..cc608c4ac43 100644 --- a/board/gdsys/mpc8308/gazerbeam.c +++ b/board/gdsys/mpc8308/gazerbeam.c @@ -5,6 +5,7 @@ * SPDX-License-Identifier: GPL-2.0+ */ +#include #include #include #include diff --git a/board/gdsys/mpc8308/mpc8308.c b/board/gdsys/mpc8308/mpc8308.c index 42c45ecedce..0f90f8ad327 100644 --- a/board/gdsys/mpc8308/mpc8308.c +++ b/board/gdsys/mpc8308/mpc8308.c @@ -4,6 +4,7 @@ * Dirk Eibach, Guntermann & Drunck GmbH, dirk.eibach@gdsys.cc */ +#include #include #include #include diff --git a/board/gdsys/mpc8308/sdram.c b/board/gdsys/mpc8308/sdram.c index 2933de0f304..4fac146353d 100644 --- a/board/gdsys/mpc8308/sdram.c +++ b/board/gdsys/mpc8308/sdram.c @@ -13,7 +13,7 @@ #ifndef CONFIG_MPC83XX_SDRAM -#include +#include #include #include #include diff --git a/board/ge/b1x5v2/b1x5v2.c b/board/ge/b1x5v2/b1x5v2.c index 031773bc5ef..a2cbd1512e9 100644 --- a/board/ge/b1x5v2/b1x5v2.c +++ b/board/ge/b1x5v2/b1x5v2.c @@ -17,6 +17,7 @@ #include #include #include +#include #include #include #include diff --git a/board/ge/common/ge_rtc.c b/board/ge/common/ge_rtc.c index 5c62ecca8c8..6437afc7bd0 100644 --- a/board/ge/common/ge_rtc.c +++ b/board/ge/common/ge_rtc.c @@ -3,6 +3,7 @@ * Copyright 2017 General Electric Company */ +#include #include #include #include diff --git a/board/ge/common/vpd_reader.h b/board/ge/common/vpd_reader.h index d32c18da351..0c51dc57e90 100644 --- a/board/ge/common/vpd_reader.h +++ b/board/ge/common/vpd_reader.h @@ -3,7 +3,7 @@ * Copyright 2016 General Electric Company */ -#include +#include "common.h" struct vpd_cache; diff --git a/board/ge/mx53ppd/mx53ppd.c b/board/ge/mx53ppd/mx53ppd.c index 9396d43f8ad..cc462d53da6 100644 --- a/board/ge/mx53ppd/mx53ppd.c +++ b/board/ge/mx53ppd/mx53ppd.c @@ -8,6 +8,7 @@ * Jason Liu */ +#include #include #include #include diff --git a/board/ge/mx53ppd/mx53ppd_video.c b/board/ge/mx53ppd/mx53ppd_video.c index eb4dd758b3b..4e2c6ebde73 100644 --- a/board/ge/mx53ppd/mx53ppd_video.c +++ b/board/ge/mx53ppd/mx53ppd_video.c @@ -8,6 +8,7 @@ * Fabio Estevam */ +#include #include #include #include diff --git a/board/google/chromebook_coral/coral.c b/board/google/chromebook_coral/coral.c index 7b2724c01d0..9d9168d608a 100644 --- a/board/google/chromebook_coral/coral.c +++ b/board/google/chromebook_coral/coral.c @@ -5,6 +5,7 @@ #define LOG_CATEGORY UCLASS_SYSINFO +#include #include #include #include diff --git a/board/google/imx8mq_phanbell/imx8mq_phanbell.c b/board/google/imx8mq_phanbell/imx8mq_phanbell.c index 9544d6dd19a..d0a740dd3f4 100644 --- a/board/google/imx8mq_phanbell/imx8mq_phanbell.c +++ b/board/google/imx8mq_phanbell/imx8mq_phanbell.c @@ -3,6 +3,7 @@ * Copyright 2020 NXP */ +#include #include #include #include diff --git a/board/google/imx8mq_phanbell/spl.c b/board/google/imx8mq_phanbell/spl.c index cfba9300dcb..83de5bfd75f 100644 --- a/board/google/imx8mq_phanbell/spl.c +++ b/board/google/imx8mq_phanbell/spl.c @@ -4,7 +4,7 @@ * */ -#include +#include #include #include #include diff --git a/board/google/veyron/veyron.c b/board/google/veyron/veyron.c index 53c3435c92f..32dbcdc4d10 100644 --- a/board/google/veyron/veyron.c +++ b/board/google/veyron/veyron.c @@ -4,6 +4,7 @@ */ #include +#include #include #include #include diff --git a/board/grinn/chiliboard/board.c b/board/grinn/chiliboard/board.c index 8313b37655f..64b32ca96df 100644 --- a/board/grinn/chiliboard/board.c +++ b/board/grinn/chiliboard/board.c @@ -4,7 +4,7 @@ * Copyright (C) 2017, Grinn - http://grinn-global.com/ */ -#include +#include #include #include #include diff --git a/board/grinn/liteboard/board.c b/board/grinn/liteboard/board.c index 07bb5b7d797..cf1d7cee925 100644 --- a/board/grinn/liteboard/board.c +++ b/board/grinn/liteboard/board.c @@ -4,6 +4,7 @@ * Copyright (C) 2016 Grinn */ +#include #include #include #include diff --git a/board/highbank/ahci.c b/board/highbank/ahci.c index 899c502dfbc..9c057278ace 100644 --- a/board/highbank/ahci.c +++ b/board/highbank/ahci.c @@ -3,6 +3,7 @@ * Copyright 2012 Calxeda, Inc. */ +#include #include #include #include diff --git a/board/highbank/hb_sregs.c b/board/highbank/hb_sregs.c index 94052f7a3f9..d9dd2c2bf67 100644 --- a/board/highbank/hb_sregs.c +++ b/board/highbank/hb_sregs.c @@ -10,6 +10,7 @@ * Copyright (C) 2019 Arm Ltd. */ +#include #include #include diff --git a/board/highbank/highbank.c b/board/highbank/highbank.c index f3df83ed6c9..7f67d1e4530 100644 --- a/board/highbank/highbank.c +++ b/board/highbank/highbank.c @@ -3,6 +3,7 @@ * Copyright 2010-2011 Calxeda, Inc. */ +#include #include #include #include diff --git a/board/hisilicon/hikey/hikey.c b/board/hisilicon/hikey/hikey.c index 95a831efcaf..c9a2d60ee56 100644 --- a/board/hisilicon/hikey/hikey.c +++ b/board/hisilicon/hikey/hikey.c @@ -3,6 +3,7 @@ * (C) Copyright 2015 Linaro * Peter Griffin */ +#include #include #include #include diff --git a/board/hisilicon/hikey960/hikey960.c b/board/hisilicon/hikey960/hikey960.c index 5029f4edb2a..f41fabbad09 100644 --- a/board/hisilicon/hikey960/hikey960.c +++ b/board/hisilicon/hikey960/hikey960.c @@ -4,6 +4,7 @@ * Author: Manivannan Sadhasivam */ +#include #include #include #include diff --git a/board/hisilicon/poplar/poplar.c b/board/hisilicon/poplar/poplar.c index c3ea080ff75..b89e7e86976 100644 --- a/board/hisilicon/poplar/poplar.c +++ b/board/hisilicon/poplar/poplar.c @@ -4,6 +4,7 @@ * Jorge Ramirez-Ortiz */ +#include #include #include #include diff --git a/board/hoperun/hihope-rzg2/hihope-rzg2.c b/board/hoperun/hihope-rzg2/hihope-rzg2.c index 0966e257464..68d3d300dc4 100644 --- a/board/hoperun/hihope-rzg2/hihope-rzg2.c +++ b/board/hoperun/hihope-rzg2/hihope-rzg2.c @@ -6,6 +6,7 @@ * Copyright (C) 2021 Renesas Electronics Corporation */ +#include #include #include #include diff --git a/board/imgtec/boston/checkboard.c b/board/imgtec/boston/checkboard.c index b0f7d3243c5..c246a7b9d45 100644 --- a/board/imgtec/boston/checkboard.c +++ b/board/imgtec/boston/checkboard.c @@ -3,6 +3,7 @@ * Copyright (C) 2016 Imagination Technologies */ +#include #include #include diff --git a/board/imgtec/boston/ddr.c b/board/imgtec/boston/ddr.c index 55356d1175d..cecf454011c 100644 --- a/board/imgtec/boston/ddr.c +++ b/board/imgtec/boston/ddr.c @@ -3,7 +3,7 @@ * Copyright (C) 2016 Imagination Technologies */ -#include +#include #include #include diff --git a/board/imgtec/boston/dt.c b/board/imgtec/boston/dt.c index 874a21cec61..bf772ff5dec 100644 --- a/board/imgtec/boston/dt.c +++ b/board/imgtec/boston/dt.c @@ -3,6 +3,7 @@ * Copyright (C) 2016 Imagination Technologies */ +#include #include #include diff --git a/board/imgtec/ci20/ci20.c b/board/imgtec/ci20/ci20.c index 4e268381d3c..89f5e7ad792 100644 --- a/board/imgtec/ci20/ci20.c +++ b/board/imgtec/ci20/ci20.c @@ -6,6 +6,7 @@ * Author: Paul Burton */ +#include #include #include #include diff --git a/board/imgtec/malta/superio.c b/board/imgtec/malta/superio.c index edd5c203b16..aba11e25be3 100644 --- a/board/imgtec/malta/superio.c +++ b/board/imgtec/malta/superio.c @@ -6,6 +6,7 @@ * Setup code for the FDC37M817 super I/O controller */ +#include #include #define SIO_CONF_PORT 0x3f0 diff --git a/board/imgtec/xilfpga/xilfpga.c b/board/imgtec/xilfpga/xilfpga.c index e50ee8efe55..71226927211 100644 --- a/board/imgtec/xilfpga/xilfpga.c +++ b/board/imgtec/xilfpga/xilfpga.c @@ -8,7 +8,7 @@ * */ -#include +#include #include #include diff --git a/board/intel/cherryhill/cherryhill.c b/board/intel/cherryhill/cherryhill.c index b4378afee15..c037d5b14cd 100644 --- a/board/intel/cherryhill/cherryhill.c +++ b/board/intel/cherryhill/cherryhill.c @@ -3,6 +3,7 @@ * Copyright (C) 2017, Bin Meng */ +#include #include #include diff --git a/board/intel/cougarcanyon2/cougarcanyon2.c b/board/intel/cougarcanyon2/cougarcanyon2.c index e5cda068e17..7f61ef8b366 100644 --- a/board/intel/cougarcanyon2/cougarcanyon2.c +++ b/board/intel/cougarcanyon2/cougarcanyon2.c @@ -3,6 +3,7 @@ * Copyright (C) 2016, Bin Meng */ +#include #include #include #include diff --git a/board/intel/crownbay/crownbay.c b/board/intel/crownbay/crownbay.c index 036beb1146d..55095deeadd 100644 --- a/board/intel/crownbay/crownbay.c +++ b/board/intel/crownbay/crownbay.c @@ -3,6 +3,7 @@ * Copyright (C) 2014, Bin Meng */ +#include #include #include #include diff --git a/board/intel/edison/edison.c b/board/intel/edison/edison.c index 911ffda2fc7..11e7f74e47c 100644 --- a/board/intel/edison/edison.c +++ b/board/intel/edison/edison.c @@ -2,6 +2,7 @@ /* * Copyright (c) 2017 Intel Corporation */ +#include #include #include #include diff --git a/board/intel/galileo/galileo.c b/board/intel/galileo/galileo.c index 19e5d0952fb..341b627a65f 100644 --- a/board/intel/galileo/galileo.c +++ b/board/intel/galileo/galileo.c @@ -3,6 +3,7 @@ * Copyright (C) 2015, Bin Meng */ +#include #include #include #include diff --git a/board/intel/minnowmax/minnowmax.c b/board/intel/minnowmax/minnowmax.c index cdc2e0b75d8..b02e3f0d4e5 100644 --- a/board/intel/minnowmax/minnowmax.c +++ b/board/intel/minnowmax/minnowmax.c @@ -3,6 +3,7 @@ * Copyright (C) 2015, Google, Inc */ +#include #include #include #include diff --git a/board/intel/slimbootloader/slimbootloader.c b/board/intel/slimbootloader/slimbootloader.c index f92c0b5112f..b20ddf0c682 100644 --- a/board/intel/slimbootloader/slimbootloader.c +++ b/board/intel/slimbootloader/slimbootloader.c @@ -3,6 +3,7 @@ * Copyright (C) 2019 Intel Corporation */ +#include #include int board_early_init_r(void) diff --git a/board/inversepath/usbarmory/usbarmory.c b/board/inversepath/usbarmory/usbarmory.c index fbed8abcecf..f3a0de3967b 100644 --- a/board/inversepath/usbarmory/usbarmory.c +++ b/board/inversepath/usbarmory/usbarmory.c @@ -7,7 +7,7 @@ * Andrej Rosano */ -#include +#include #include #include #include diff --git a/board/iomega/iconnect/iconnect.c b/board/iomega/iconnect/iconnect.c index 00b08987e9e..03871602001 100644 --- a/board/iomega/iconnect/iconnect.c +++ b/board/iomega/iconnect/iconnect.c @@ -6,6 +6,7 @@ * Luka Perkov */ +#include #include #include #include diff --git a/board/isee/igep003x/board.c b/board/isee/igep003x/board.c index 7cd26ce3c34..7dbb0800892 100644 --- a/board/isee/igep003x/board.c +++ b/board/isee/igep003x/board.c @@ -5,7 +5,7 @@ * Copyright (C) 2013-2017, ISEE 2007 SL - http://www.isee.biz/ */ -#include +#include #include #include #include diff --git a/board/isee/igep003x/mux.c b/board/isee/igep003x/mux.c index 1a40c007762..550e3b3197d 100644 --- a/board/isee/igep003x/mux.c +++ b/board/isee/igep003x/mux.c @@ -11,6 +11,7 @@ * GNU General Public License for more details. */ +#include #include #include #include diff --git a/board/isee/igep00x0/common.c b/board/isee/igep00x0/common.c index 2584d2e5ddf..3fdf83e845c 100644 --- a/board/isee/igep00x0/common.c +++ b/board/isee/igep00x0/common.c @@ -1,5 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ +#include #include #include #include diff --git a/board/isee/igep00x0/igep00x0.c b/board/isee/igep00x0/igep00x0.c index 8a3f290f678..0f0a9c592fc 100644 --- a/board/isee/igep00x0/igep00x0.c +++ b/board/isee/igep00x0/igep00x0.c @@ -3,7 +3,7 @@ * (C) Copyright 2010 * ISEE 2007 SL, */ -#include +#include #include #include #include diff --git a/board/k+p/kp_imx53/kp_id_rev.c b/board/k+p/kp_imx53/kp_id_rev.c index cbfe94e25a2..9f93cf008ce 100644 --- a/board/k+p/kp_imx53/kp_id_rev.c +++ b/board/k+p/kp_imx53/kp_id_rev.c @@ -9,11 +9,11 @@ * Daniel Gericke */ +#include #include #include #include "kp_id_rev.h" #include -#include static int eeprom_has_been_read; static struct id_eeprom eeprom; diff --git a/board/k+p/kp_imx53/kp_imx53.c b/board/k+p/kp_imx53/kp_imx53.c index efb7b49cbe0..7c3a695cb25 100644 --- a/board/k+p/kp_imx53/kp_imx53.c +++ b/board/k+p/kp_imx53/kp_imx53.c @@ -4,6 +4,7 @@ * Lukasz Majewski, DENX Software Engineering, lukma@denx.de */ +#include #include #include #include diff --git a/board/k+p/kp_imx6q_tpc/kp_imx6q_tpc.c b/board/k+p/kp_imx6q_tpc/kp_imx6q_tpc.c index e0895194300..e6877e4c070 100644 --- a/board/k+p/kp_imx6q_tpc/kp_imx6q_tpc.c +++ b/board/k+p/kp_imx6q_tpc/kp_imx6q_tpc.c @@ -5,6 +5,7 @@ * Copyright (C) 2018 Lukasz Majewski */ +#include #include #include #include diff --git a/board/k+p/kp_imx6q_tpc/kp_imx6q_tpc_spl.c b/board/k+p/kp_imx6q_tpc/kp_imx6q_tpc_spl.c index 6a5e252751d..54902437940 100644 --- a/board/k+p/kp_imx6q_tpc/kp_imx6q_tpc_spl.c +++ b/board/k+p/kp_imx6q_tpc/kp_imx6q_tpc_spl.c @@ -5,6 +5,7 @@ * Copyright (C) 2018 Lukasz Majewski */ +#include #include #include #include diff --git a/board/keymile/common/common.c b/board/keymile/common/common.c index 9358c25dcb0..991022ac833 100644 --- a/board/keymile/common/common.c +++ b/board/keymile/common/common.c @@ -7,7 +7,7 @@ * Holger Brunck, Keymile GmbH Hannover, holger.brunck@keymile.com */ -#include +#include #include #include #include diff --git a/board/keymile/common/ivm.c b/board/keymile/common/ivm.c index f01fe44303c..67db0c50f47 100644 --- a/board/keymile/common/ivm.c +++ b/board/keymile/common/ivm.c @@ -4,11 +4,10 @@ * Holger Brunck, Keymile GmbH Hannover, holger.brunck@keymile.com */ +#include #include #include #include -#include -#include #include "common.h" #define MAC_STR_SZ 20 diff --git a/board/keymile/common/qrio.c b/board/keymile/common/qrio.c index c8299483299..b433f69675a 100644 --- a/board/keymile/common/qrio.c +++ b/board/keymile/common/qrio.c @@ -4,7 +4,7 @@ * Valentin Longchamp */ -#include +#include #include #include diff --git a/board/keymile/km83xx/km83xx.c b/board/keymile/km83xx/km83xx.c index 40718aa58a7..acd13105dd5 100644 --- a/board/keymile/km83xx/km83xx.c +++ b/board/keymile/km83xx/km83xx.c @@ -13,7 +13,7 @@ * Heiko Schocher, DENX Software Engineering, hs@denx.de. */ -#include +#include #include #include #include diff --git a/board/keymile/kmcent2/tlb.c b/board/keymile/kmcent2/tlb.c index 77e11e9bc1e..41b24e39433 100644 --- a/board/keymile/kmcent2/tlb.c +++ b/board/keymile/kmcent2/tlb.c @@ -7,7 +7,7 @@ */ #include -#include +#include struct fsl_e_tlb_entry tlb_table[] = { /* TLB 0 - for temp stack in cache */ diff --git a/board/keymile/pg-wcom-ls102xa/ddr.c b/board/keymile/pg-wcom-ls102xa/ddr.c index 51938a1b4d8..556d39d4d4e 100644 --- a/board/keymile/pg-wcom-ls102xa/ddr.c +++ b/board/keymile/pg-wcom-ls102xa/ddr.c @@ -4,7 +4,7 @@ * Copyright 2020 Hitachi Power Grids. All rights reserved. */ -#include +#include #include #include #include diff --git a/board/keymile/secu1/socfpga.c b/board/keymile/secu1/socfpga.c index 1a626c52068..6a4cb21786a 100644 --- a/board/keymile/secu1/socfpga.c +++ b/board/keymile/secu1/socfpga.c @@ -2,6 +2,7 @@ /* * Copyright (C) 2017-2020 Hitachi Power Grids */ +#include #include #include diff --git a/board/kobol/helios4/helios4.c b/board/kobol/helios4/helios4.c index 4c8407bb676..9c5b687b3e8 100644 --- a/board/kobol/helios4/helios4.c +++ b/board/kobol/helios4/helios4.c @@ -4,7 +4,7 @@ * based on board/solidrun/clearfog/clearfog.c */ -#include +#include #include #include #include diff --git a/board/kontron/pitx_imx8m/pitx_imx8m.c b/board/kontron/pitx_imx8m/pitx_imx8m.c index a908aee9ecc..4548e7c1dff 100644 --- a/board/kontron/pitx_imx8m/pitx_imx8m.c +++ b/board/kontron/pitx_imx8m/pitx_imx8m.c @@ -1,6 +1,7 @@ // SPDX-License-Identifier: GPL-2.0+ #include "pitx_misc.h" +#include #include #include #include diff --git a/board/kontron/pitx_imx8m/spl.c b/board/kontron/pitx_imx8m/spl.c index 475e52f6231..a247803a4b4 100644 --- a/board/kontron/pitx_imx8m/spl.c +++ b/board/kontron/pitx_imx8m/spl.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ -#include +#include #include #include #include diff --git a/board/kontron/sl-mx8mm/lpddr4_timing.c b/board/kontron/sl-mx8mm/lpddr4_timing.c index 851aeef8f8c..74b79c7a009 100644 --- a/board/kontron/sl-mx8mm/lpddr4_timing.c +++ b/board/kontron/sl-mx8mm/lpddr4_timing.c @@ -4,6 +4,7 @@ */ #include +#include #include #include diff --git a/board/kontron/sl28/cmds.c b/board/kontron/sl28/cmds.c index 7851361c48c..08a22b5d01e 100644 --- a/board/kontron/sl28/cmds.c +++ b/board/kontron/sl28/cmds.c @@ -5,11 +5,10 @@ * Copyright (c) 2020 Kontron Europe GmbH */ +#include #include #include -#include #include -#include #define CPLD_I2C_ADDR 0x4a #define REG_UFM_CTRL 0x02 diff --git a/board/kontron/sl28/common.c b/board/kontron/sl28/common.c index d8d0172a21b..331de29baee 100644 --- a/board/kontron/sl28/common.c +++ b/board/kontron/sl28/common.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ -#include +#include #include #include diff --git a/board/kontron/sl28/ddr.c b/board/kontron/sl28/ddr.c index 9b881fdc265..315d9f99c71 100644 --- a/board/kontron/sl28/ddr.c +++ b/board/kontron/sl28/ddr.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ -#include +#include #include #include #include diff --git a/board/kontron/sl28/sl28.c b/board/kontron/sl28/sl28.c index adfec8ba237..4ab221c12bf 100644 --- a/board/kontron/sl28/sl28.c +++ b/board/kontron/sl28/sl28.c @@ -1,5 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ +#include #include #include #include diff --git a/board/kontron/sl28/spl.c b/board/kontron/sl28/spl.c index 45a4fc65120..80acde74956 100644 --- a/board/kontron/sl28/spl.c +++ b/board/kontron/sl28/spl.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ -#include +#include #include #include #include diff --git a/board/kontron/sl28/spl_atf.c b/board/kontron/sl28/spl_atf.c index 0710316a48b..a9cd6850e98 100644 --- a/board/kontron/sl28/spl_atf.c +++ b/board/kontron/sl28/spl_atf.c @@ -5,7 +5,7 @@ * Copyright (c) 2020 Michael Walle */ -#include +#include #include #include #include diff --git a/board/kosagi/novena/novena.c b/board/kosagi/novena/novena.c index 3220727f236..f009a8afd48 100644 --- a/board/kosagi/novena/novena.c +++ b/board/kosagi/novena/novena.c @@ -5,6 +5,7 @@ * Copyright (C) 2014 Marek Vasut */ +#include #include #include #include diff --git a/board/kosagi/novena/novena_spl.c b/board/kosagi/novena/novena_spl.c index 008418b0184..24c0fb22268 100644 --- a/board/kosagi/novena/novena_spl.c +++ b/board/kosagi/novena/novena_spl.c @@ -5,7 +5,7 @@ * Copyright (C) 2014 Marek Vasut */ -#include +#include #include #include #include diff --git a/board/kosagi/novena/video.c b/board/kosagi/novena/video.c index be5a737a31d..a96a877f5f2 100644 --- a/board/kosagi/novena/video.c +++ b/board/kosagi/novena/video.c @@ -9,6 +9,7 @@ * Copyright (C) 2014 Marek Vasut */ +#include #include #include #include diff --git a/board/l+g/vinco/vinco.c b/board/l+g/vinco/vinco.c index 066d315baa2..b3c176dd59a 100644 --- a/board/l+g/vinco/vinco.c +++ b/board/l+g/vinco/vinco.c @@ -9,7 +9,7 @@ * Gregory CLEMENT */ -#include +#include #include #include #include diff --git a/board/lego/ev3/legoev3.c b/board/lego/ev3/legoev3.c index 1a153668a43..43afe593c78 100644 --- a/board/lego/ev3/legoev3.c +++ b/board/lego/ev3/legoev3.c @@ -12,7 +12,7 @@ * Copyright (C) 2007 Sergey Kubushyn */ -#include +#include #include #include #include diff --git a/board/lg/sniper/sniper.c b/board/lg/sniper/sniper.c index 88d5d088143..86032d7fcdf 100644 --- a/board/lg/sniper/sniper.c +++ b/board/lg/sniper/sniper.c @@ -6,6 +6,7 @@ */ #include +#include #include #include #include diff --git a/board/liebherr/display5/display5.c b/board/liebherr/display5/display5.c index a0bbd03e8d1..e3a59dbec00 100644 --- a/board/liebherr/display5/display5.c +++ b/board/liebherr/display5/display5.c @@ -4,6 +4,7 @@ * Lukasz Majewski, DENX Software Engineering, lukma@denx.de */ +#include #include #include #include diff --git a/board/liebherr/display5/spl.c b/board/liebherr/display5/spl.c index 819d3acbe56..97928e92215 100644 --- a/board/liebherr/display5/spl.c +++ b/board/liebherr/display5/spl.c @@ -4,6 +4,7 @@ * Lukasz Majewski, DENX Software Engineering, lukma@denx.de */ +#include #include #include #include diff --git a/board/liebherr/mccmon6/mccmon6.c b/board/liebherr/mccmon6/mccmon6.c index fef915b2aca..1b49526fba4 100644 --- a/board/liebherr/mccmon6/mccmon6.c +++ b/board/liebherr/mccmon6/mccmon6.c @@ -4,6 +4,7 @@ * Lukasz Majewski, DENX Software Engineering, lukma@denx.de */ +#include #include #include #include diff --git a/board/liebherr/xea/spl_xea.c b/board/liebherr/xea/spl_xea.c index 88c157eca45..6cf8f8390e8 100644 --- a/board/liebherr/xea/spl_xea.c +++ b/board/liebherr/xea/spl_xea.c @@ -12,6 +12,7 @@ * on behalf of DENX Software Engineering GmbH */ +#include #include #include #include diff --git a/board/liebherr/xea/xea.c b/board/liebherr/xea/xea.c index 9ade3563b25..0a6fd7f1437 100644 --- a/board/liebherr/xea/xea.c +++ b/board/liebherr/xea/xea.c @@ -13,6 +13,7 @@ * */ +#include #include #include #include diff --git a/board/logicpd/am3517evm/am3517evm.c b/board/logicpd/am3517evm/am3517evm.c index e6ca31016b7..e69a73f2af6 100644 --- a/board/logicpd/am3517evm/am3517evm.c +++ b/board/logicpd/am3517evm/am3517evm.c @@ -10,6 +10,7 @@ * Texas Instruments Incorporated - https://www.ti.com/ */ +#include #include #include #include diff --git a/board/logicpd/imx6/imx6logic.c b/board/logicpd/imx6/imx6logic.c index 589136fd64a..0d53548dcb4 100644 --- a/board/logicpd/imx6/imx6logic.c +++ b/board/logicpd/imx6/imx6logic.c @@ -8,6 +8,7 @@ * and updates by Jagan Teki */ +#include #include #include #include diff --git a/board/logicpd/omap3som/omap3logic.c b/board/logicpd/omap3som/omap3logic.c index a9fe61918b6..86992829caf 100644 --- a/board/logicpd/omap3som/omap3logic.c +++ b/board/logicpd/omap3som/omap3logic.c @@ -10,7 +10,7 @@ * Richard Woodruff * Syed Mohammed Khasim */ -#include +#include #include #include #include diff --git a/board/maxbcm/maxbcm.c b/board/maxbcm/maxbcm.c index e011520f2ec..aad3dc86429 100644 --- a/board/maxbcm/maxbcm.c +++ b/board/maxbcm/maxbcm.c @@ -3,6 +3,7 @@ * Copyright (C) 2014 Stefan Roese */ +#include #include #include #include diff --git a/board/mediatek/mt7622/mt7622_rfb.c b/board/mediatek/mt7622/mt7622_rfb.c index e7f492a13bc..2cc73bc35dc 100644 --- a/board/mediatek/mt7622/mt7622_rfb.c +++ b/board/mediatek/mt7622/mt7622_rfb.c @@ -4,6 +4,7 @@ * Author: Sam Shih */ +#include #include #include #include diff --git a/board/mediatek/mt7623/mt7623_rfb.c b/board/mediatek/mt7623/mt7623_rfb.c index c78eaa07243..ec10f77c51e 100644 --- a/board/mediatek/mt7623/mt7623_rfb.c +++ b/board/mediatek/mt7623/mt7623_rfb.c @@ -3,7 +3,7 @@ * Copyright (C) 2018 MediaTek Inc. */ -#include +#include #include #include diff --git a/board/mediatek/mt7629/mt7629_rfb.c b/board/mediatek/mt7629/mt7629_rfb.c index 02719181624..55f7696c510 100644 --- a/board/mediatek/mt7629/mt7629_rfb.c +++ b/board/mediatek/mt7629/mt7629_rfb.c @@ -3,7 +3,7 @@ * Copyright (C) 2018 MediaTek Inc. */ -#include +#include #include DECLARE_GLOBAL_DATA_PTR; diff --git a/board/mediatek/mt8183/mt8183_pumpkin.c b/board/mediatek/mt8183/mt8183_pumpkin.c index 1b8736966f6..db613ebdc4f 100644 --- a/board/mediatek/mt8183/mt8183_pumpkin.c +++ b/board/mediatek/mt8183/mt8183_pumpkin.c @@ -4,6 +4,7 @@ * Author: Fabien Parent */ +#include #include #include diff --git a/board/mediatek/mt8512/mt8512.c b/board/mediatek/mt8512/mt8512.c index d2f557ffee5..ac3adb80122 100644 --- a/board/mediatek/mt8512/mt8512.c +++ b/board/mediatek/mt8512/mt8512.c @@ -3,6 +3,7 @@ * Copyright (C) 2019 MediaTek Inc. */ +#include #include #include #include diff --git a/board/mediatek/mt8516/mt8516_pumpkin.c b/board/mediatek/mt8516/mt8516_pumpkin.c index 930bfec3483..42f3863b92c 100644 --- a/board/mediatek/mt8516/mt8516_pumpkin.c +++ b/board/mediatek/mt8516/mt8516_pumpkin.c @@ -3,6 +3,7 @@ * Copyright (C) 2019 BayLibre SAS */ +#include #include #include diff --git a/board/mediatek/mt8518/mt8518_ap1.c b/board/mediatek/mt8518/mt8518_ap1.c index 745cfda2ddf..e03da63b1d9 100644 --- a/board/mediatek/mt8518/mt8518_ap1.c +++ b/board/mediatek/mt8518/mt8518_ap1.c @@ -3,7 +3,7 @@ * Copyright (C) 2019 MediaTek Inc. */ -#include +#include #include #include #include diff --git a/board/menlo/m53menlo/m53menlo.c b/board/menlo/m53menlo/m53menlo.c index 79351f47273..b8dffb0e485 100644 --- a/board/menlo/m53menlo/m53menlo.c +++ b/board/menlo/m53menlo/m53menlo.c @@ -6,6 +6,7 @@ * Copyright (C) 2014-2017 Olaf Mandel */ +#include #include #include #include diff --git a/board/menlo/mx8menlo/mx8menlo.c b/board/menlo/mx8menlo/mx8menlo.c index f47b45c1d56..18f5fd5c5ee 100644 --- a/board/menlo/mx8menlo/mx8menlo.c +++ b/board/menlo/mx8menlo/mx8menlo.c @@ -3,6 +3,7 @@ * Copyright 2021-2022 Marek Vasut */ +#include #include #include #include diff --git a/board/microchip/mpfs_icicle/mpfs_icicle.c b/board/microchip/mpfs_icicle/mpfs_icicle.c index 7beac33cfbd..0f5f82924e7 100644 --- a/board/microchip/mpfs_icicle/mpfs_icicle.c +++ b/board/microchip/mpfs_icicle/mpfs_icicle.c @@ -4,6 +4,7 @@ * Padmarao Begari */ +#include #include #include #include diff --git a/board/microchip/pic32mzda/pic32mzda.c b/board/microchip/pic32mzda/pic32mzda.c index 848a1aee400..3c2203d2202 100644 --- a/board/microchip/pic32mzda/pic32mzda.c +++ b/board/microchip/pic32mzda/pic32mzda.c @@ -7,6 +7,7 @@ * */ +#include #include #include #include diff --git a/board/mikrotik/crs3xx-98dx3236/crs3xx-98dx3236.c b/board/mikrotik/crs3xx-98dx3236/crs3xx-98dx3236.c index ae1c586277f..315169ba661 100644 --- a/board/mikrotik/crs3xx-98dx3236/crs3xx-98dx3236.c +++ b/board/mikrotik/crs3xx-98dx3236/crs3xx-98dx3236.c @@ -3,6 +3,7 @@ * Copyright (C) 2015 Stefan Roese */ +#include #include #include #include diff --git a/board/mntre/imx8mq_reform2/imx8mq_reform2.c b/board/mntre/imx8mq_reform2/imx8mq_reform2.c index ebc490e24b1..be5c5060a2a 100644 --- a/board/mntre/imx8mq_reform2/imx8mq_reform2.c +++ b/board/mntre/imx8mq_reform2/imx8mq_reform2.c @@ -4,6 +4,7 @@ * Copyright (C) 2018, Boundary Devices */ +#include #include #include #include diff --git a/board/mntre/imx8mq_reform2/spl.c b/board/mntre/imx8mq_reform2/spl.c index 48a783593b6..5120c628b91 100644 --- a/board/mntre/imx8mq_reform2/spl.c +++ b/board/mntre/imx8mq_reform2/spl.c @@ -5,7 +5,7 @@ * SPDX-License-Identifier: GPL-2.0+ */ -#include +#include #include #include #include diff --git a/board/msc/sm2s_imx8mp/sm2s_imx8mp.c b/board/msc/sm2s_imx8mp/sm2s_imx8mp.c index b1ce014bd55..6ccbf02db06 100644 --- a/board/msc/sm2s_imx8mp/sm2s_imx8mp.c +++ b/board/msc/sm2s_imx8mp/sm2s_imx8mp.c @@ -7,6 +7,7 @@ * Copyright 2021 Collabora Ltd. */ +#include #include #include #include diff --git a/board/msc/sm2s_imx8mp/spl.c b/board/msc/sm2s_imx8mp/spl.c index b1b5561838d..ed7a1b7d3d0 100644 --- a/board/msc/sm2s_imx8mp/spl.c +++ b/board/msc/sm2s_imx8mp/spl.c @@ -7,7 +7,7 @@ * Copyright 2021 Collabora Ltd. */ -#include +#include #include #include #include diff --git a/board/mscc/common/spi.c b/board/mscc/common/spi.c index cb43ad6811e..45b9649336d 100644 --- a/board/mscc/common/spi.c +++ b/board/mscc/common/spi.c @@ -3,6 +3,7 @@ * Copyright (c) 2018 Microsemi Coprporation */ +#include #include #include #include diff --git a/board/mscc/jr2/jr2.c b/board/mscc/jr2/jr2.c index acaeb468022..84b95be648d 100644 --- a/board/mscc/jr2/jr2.c +++ b/board/mscc/jr2/jr2.c @@ -3,7 +3,7 @@ * Copyright (c) 2018 Microsemi Corporation */ -#include +#include #include #include #include diff --git a/board/mscc/luton/luton.c b/board/mscc/luton/luton.c index f9ea26ebc5c..48170b3aa12 100644 --- a/board/mscc/luton/luton.c +++ b/board/mscc/luton/luton.c @@ -3,7 +3,7 @@ * Copyright (c) 2018 Microsemi Corporation */ -#include +#include #include #include #include diff --git a/board/mscc/ocelot/ocelot.c b/board/mscc/ocelot/ocelot.c index 4cec25b3976..d69db04de66 100644 --- a/board/mscc/ocelot/ocelot.c +++ b/board/mscc/ocelot/ocelot.c @@ -3,7 +3,7 @@ * Copyright (c) 2018 Microsemi Corporation */ -#include +#include #include #include #include diff --git a/board/mscc/serval/serval.c b/board/mscc/serval/serval.c index 951c24dd286..99d5f5be657 100644 --- a/board/mscc/serval/serval.c +++ b/board/mscc/serval/serval.c @@ -3,7 +3,7 @@ * Copyright (c) 2018 Microsemi Corporation */ -#include +#include #include #include #include diff --git a/board/mscc/servalt/servalt.c b/board/mscc/servalt/servalt.c index 9055b73ada2..49993168c23 100644 --- a/board/mscc/servalt/servalt.c +++ b/board/mscc/servalt/servalt.c @@ -3,7 +3,7 @@ * Copyright (c) 2018 Microsemi Corporation */ -#include +#include #include #include #include diff --git a/board/myir/mys_6ulx/spl.c b/board/myir/mys_6ulx/spl.c index 4414487eff2..3cf14e2bc66 100644 --- a/board/myir/mys_6ulx/spl.c +++ b/board/myir/mys_6ulx/spl.c @@ -4,7 +4,7 @@ * Author: Parthiban Nallathambi */ -#include +#include #include #include #include diff --git a/board/netgear/dgnd3700v2/dgnd3700v2.c b/board/netgear/dgnd3700v2/dgnd3700v2.c index 9cf3a2fe60a..cfc3529c348 100644 --- a/board/netgear/dgnd3700v2/dgnd3700v2.c +++ b/board/netgear/dgnd3700v2/dgnd3700v2.c @@ -3,6 +3,7 @@ * Copyright (C) 2018 Álvaro Fernández Rojas */ +#include #include #include #include diff --git a/board/novtech/meerkat96/meerkat96.c b/board/novtech/meerkat96/meerkat96.c index ca3b0698f5a..1edebe5db9b 100644 --- a/board/novtech/meerkat96/meerkat96.c +++ b/board/novtech/meerkat96/meerkat96.c @@ -12,6 +12,7 @@ #include #include #include +#include #include DECLARE_GLOBAL_DATA_PTR; diff --git a/board/nuvoton/arbel_evb/arbel_evb.c b/board/nuvoton/arbel_evb/arbel_evb.c index 1f519219e7e..53c931c3c24 100644 --- a/board/nuvoton/arbel_evb/arbel_evb.c +++ b/board/nuvoton/arbel_evb/arbel_evb.c @@ -3,6 +3,7 @@ * Copyright (c) 2022 Nuvoton Technology Corp. */ +#include #include #include #include diff --git a/board/nuvoton/poleg_evb/poleg_evb.c b/board/nuvoton/poleg_evb/poleg_evb.c index 3c4e5aaf294..e69bca95031 100644 --- a/board/nuvoton/poleg_evb/poleg_evb.c +++ b/board/nuvoton/poleg_evb/poleg_evb.c @@ -4,6 +4,7 @@ * Copyright (c) 2021 Nuvoton Technology Corp. */ +#include #include #include #include diff --git a/board/nvidia/beaver/beaver-spl.c b/board/nvidia/beaver/beaver-spl.c index c6956ff9f58..b5d0c14854d 100644 --- a/board/nvidia/beaver/beaver-spl.c +++ b/board/nvidia/beaver/beaver-spl.c @@ -7,6 +7,7 @@ * Svyatoslav Ryhel */ +#include #include #include diff --git a/board/nvidia/cardhu/cardhu-spl.c b/board/nvidia/cardhu/cardhu-spl.c index 80912a65a19..de2fa300f1c 100644 --- a/board/nvidia/cardhu/cardhu-spl.c +++ b/board/nvidia/cardhu/cardhu-spl.c @@ -7,6 +7,7 @@ * Svyatoslav Ryhel */ +#include #include #include diff --git a/board/nvidia/cardhu/cardhu.c b/board/nvidia/cardhu/cardhu.c index ab0dc61ebe5..6848e340046 100644 --- a/board/nvidia/cardhu/cardhu.c +++ b/board/nvidia/cardhu/cardhu.c @@ -4,6 +4,7 @@ * NVIDIA Corporation */ +#include #include #include #include diff --git a/board/nvidia/dalmore/dalmore.c b/board/nvidia/dalmore/dalmore.c index c00c6343eaa..72511e401e3 100644 --- a/board/nvidia/dalmore/dalmore.c +++ b/board/nvidia/dalmore/dalmore.c @@ -3,6 +3,7 @@ * Copyright (c) 2010-2013, NVIDIA CORPORATION. All rights reserved. */ +#include #include #include #include diff --git a/board/nvidia/harmony/harmony.c b/board/nvidia/harmony/harmony.c index da14e09c40c..52236792e24 100644 --- a/board/nvidia/harmony/harmony.c +++ b/board/nvidia/harmony/harmony.c @@ -4,6 +4,7 @@ * NVIDIA Corporation */ +#include #include #include #include diff --git a/board/nvidia/jetson-tk1/jetson-tk1.c b/board/nvidia/jetson-tk1/jetson-tk1.c index da6edb42c1e..7f3cdd70fe7 100644 --- a/board/nvidia/jetson-tk1/jetson-tk1.c +++ b/board/nvidia/jetson-tk1/jetson-tk1.c @@ -4,6 +4,7 @@ * NVIDIA Corporation */ +#include #include #include #include diff --git a/board/nvidia/nyan-big/nyan-big.c b/board/nvidia/nyan-big/nyan-big.c index e15f31dcfd7..06a36f8ed38 100644 --- a/board/nvidia/nyan-big/nyan-big.c +++ b/board/nvidia/nyan-big/nyan-big.c @@ -4,6 +4,7 @@ * NVIDIA Corporation */ +#include #include #include #include diff --git a/board/nvidia/p2371-0000/p2371-0000.c b/board/nvidia/p2371-0000/p2371-0000.c index edf2b1adb7c..b819b049f4b 100644 --- a/board/nvidia/p2371-0000/p2371-0000.c +++ b/board/nvidia/p2371-0000/p2371-0000.c @@ -4,6 +4,7 @@ * NVIDIA Corporation */ +#include #include #include #include diff --git a/board/nvidia/p2371-2180/p2371-2180.c b/board/nvidia/p2371-2180/p2371-2180.c index 5f203d8ffaa..816c7bec6ae 100644 --- a/board/nvidia/p2371-2180/p2371-2180.c +++ b/board/nvidia/p2371-2180/p2371-2180.c @@ -4,6 +4,7 @@ * NVIDIA Corporation */ +#include #include #include #include diff --git a/board/nvidia/p2571/p2571.c b/board/nvidia/p2571/p2571.c index 4056f986483..a4c4259eeae 100644 --- a/board/nvidia/p2571/p2571.c +++ b/board/nvidia/p2571/p2571.c @@ -4,6 +4,7 @@ * NVIDIA Corporation */ +#include #include #include #include diff --git a/board/nvidia/p2771-0000/p2771-0000.c b/board/nvidia/p2771-0000/p2771-0000.c index 12eaa7a1e53..5ff89c45423 100644 --- a/board/nvidia/p2771-0000/p2771-0000.c +++ b/board/nvidia/p2771-0000/p2771-0000.c @@ -3,6 +3,7 @@ * Copyright (c) 2016, NVIDIA CORPORATION */ +#include #include #include #include diff --git a/board/nvidia/p3450-0000/p3450-0000.c b/board/nvidia/p3450-0000/p3450-0000.c index 530c438a2e3..fb1a224daa7 100644 --- a/board/nvidia/p3450-0000/p3450-0000.c +++ b/board/nvidia/p3450-0000/p3450-0000.c @@ -5,6 +5,7 @@ * */ +#include #include #include #include diff --git a/board/nvidia/seaboard/seaboard.c b/board/nvidia/seaboard/seaboard.c index a646dcc96b5..829751112f1 100644 --- a/board/nvidia/seaboard/seaboard.c +++ b/board/nvidia/seaboard/seaboard.c @@ -4,6 +4,7 @@ * NVIDIA Corporation */ +#include #include #include #include diff --git a/board/nvidia/venice2/as3722_init.c b/board/nvidia/venice2/as3722_init.c index b89e03703b2..395bdd99c78 100644 --- a/board/nvidia/venice2/as3722_init.c +++ b/board/nvidia/venice2/as3722_init.c @@ -4,6 +4,7 @@ * NVIDIA Corporation */ +#include #include #include #include diff --git a/board/nvidia/venice2/venice2.c b/board/nvidia/venice2/venice2.c index fa10cda4870..d89bbe5ecce 100644 --- a/board/nvidia/venice2/venice2.c +++ b/board/nvidia/venice2/venice2.c @@ -4,7 +4,7 @@ * NVIDIA Corporation */ -#include +#include #include #include #include "pinmux-config-venice2.h" diff --git a/board/olimex/mx23_olinuxino/mx23_olinuxino.c b/board/olimex/mx23_olinuxino/mx23_olinuxino.c index b2bb6678c23..bdd5fcd76ae 100644 --- a/board/olimex/mx23_olinuxino/mx23_olinuxino.c +++ b/board/olimex/mx23_olinuxino/mx23_olinuxino.c @@ -5,6 +5,7 @@ * Copyright (C) 2013 Marek Vasut */ +#include #include #include #include diff --git a/board/olimex/mx23_olinuxino/spl_boot.c b/board/olimex/mx23_olinuxino/spl_boot.c index eb85ce9643d..248176c23cd 100644 --- a/board/olimex/mx23_olinuxino/spl_boot.c +++ b/board/olimex/mx23_olinuxino/spl_boot.c @@ -5,6 +5,7 @@ * Copyright (C) 2013 Marek Vasut */ +#include #include #include #include diff --git a/board/openpiton/riscv64/openpiton-riscv64.c b/board/openpiton/riscv64/openpiton-riscv64.c index 4c957e88992..f2282d15488 100644 --- a/board/openpiton/riscv64/openpiton-riscv64.c +++ b/board/openpiton/riscv64/openpiton-riscv64.c @@ -8,6 +8,7 @@ * Pragnesh Patel * Tianrui Wei */ +#include #include #include #include diff --git a/board/out4/o4-imx6ull-nano/o4-imx6ull-nano.c b/board/out4/o4-imx6ull-nano/o4-imx6ull-nano.c index 10469aecd0b..edb200e9e55 100644 --- a/board/out4/o4-imx6ull-nano/o4-imx6ull-nano.c +++ b/board/out4/o4-imx6ull-nano/o4-imx6ull-nano.c @@ -5,6 +5,7 @@ #include #include #include +#include #include DECLARE_GLOBAL_DATA_PTR; diff --git a/board/phytec/common/Makefile b/board/phytec/common/Makefile index c34fc503059..3feb00fd1ec 100644 --- a/board/phytec/common/Makefile +++ b/board/phytec/common/Makefile @@ -5,8 +5,6 @@ ifdef CONFIG_SPL_BUILD # necessary to create built-in.o obj- := __dummy__.o -else -obj-$(CONFIG_ARCH_K3) += k3/ endif obj-y += phytec_som_detection.o diff --git a/board/phytec/common/imx8m_som_detection.c b/board/phytec/common/imx8m_som_detection.c index bfd60ffb777..ee34a5b9579 100644 --- a/board/phytec/common/imx8m_som_detection.c +++ b/board/phytec/common/imx8m_som_detection.c @@ -4,6 +4,7 @@ * Author: Teresa Remmet */ +#include #include #include #include diff --git a/board/phytec/common/k3/Makefile b/board/phytec/common/k3/Makefile deleted file mode 100644 index bcca1a9f846..00000000000 --- a/board/phytec/common/k3/Makefile +++ /dev/null @@ -1,2 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0+ -obj-y += board.o diff --git a/board/phytec/common/k3/board.c b/board/phytec/common/k3/board.c deleted file mode 100644 index 9cb168c36cb..00000000000 --- a/board/phytec/common/k3/board.c +++ /dev/null @@ -1,73 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * Copyright (C) 2024 PHYTEC Messtechnik GmbH - * Author: Wadim Egorov - */ - -#include -#include -#include - -#if IS_ENABLED(CONFIG_ENV_IS_IN_FAT) || IS_ENABLED(CONFIG_ENV_IS_IN_MMC) -int mmc_get_env_dev(void) -{ - u32 boot_device = get_boot_device(); - - switch (boot_device) { - case BOOT_DEVICE_MMC1: - return 0; - case BOOT_DEVICE_MMC2: - return 1; - }; - - return CONFIG_SYS_MMC_ENV_DEV; -} -#endif - -enum env_location env_get_location(enum env_operation op, int prio) -{ - u32 boot_device = get_boot_device(); - - if (prio) - return ENVL_UNKNOWN; - - switch (boot_device) { - case BOOT_DEVICE_MMC1: - case BOOT_DEVICE_MMC2: - if (CONFIG_IS_ENABLED(ENV_IS_IN_FAT)) - return ENVL_FAT; - if (CONFIG_IS_ENABLED(ENV_IS_IN_MMC)) - return ENVL_MMC; - case BOOT_DEVICE_SPI: - if (CONFIG_IS_ENABLED(ENV_IS_IN_SPI_FLASH)) - return ENVL_SPI_FLASH; - default: - return ENVL_NOWHERE; - }; -} - -#if IS_ENABLED(CONFIG_BOARD_LATE_INIT) -int board_late_init(void) -{ - u32 boot_device = get_boot_device(); - - switch (boot_device) { - case BOOT_DEVICE_MMC1: - env_set_ulong("mmcdev", 0); - env_set("boot", "mmc"); - break; - case BOOT_DEVICE_MMC2: - env_set_ulong("mmcdev", 1); - env_set("boot", "mmc"); - break; - case BOOT_DEVICE_SPI: - env_set("boot", "spi"); - break; - case BOOT_DEVICE_ETHERNET: - env_set("boot", "net"); - break; - }; - - return 0; -} -#endif diff --git a/board/phytec/common/phytec_som_detection.c b/board/phytec/common/phytec_som_detection.c index b14bb3dbb7f..78c173df20d 100644 --- a/board/phytec/common/phytec_som_detection.c +++ b/board/phytec/common/phytec_som_detection.c @@ -4,6 +4,7 @@ * Author: Teresa Remmet */ +#include #include #include #include diff --git a/board/phytec/pcl063/spl.c b/board/phytec/pcl063/spl.c index b98c46dbcbd..b6d459fdfce 100644 --- a/board/phytec/pcl063/spl.c +++ b/board/phytec/pcl063/spl.c @@ -6,7 +6,7 @@ * Copyright (C) 2015-2016 Stefan Roese */ -#include +#include #include #include #include diff --git a/board/phytec/pcm052/pcm052.c b/board/phytec/pcm052/pcm052.c index 20f2aac332d..0f7235979b0 100644 --- a/board/phytec/pcm052/pcm052.c +++ b/board/phytec/pcm052/pcm052.c @@ -6,6 +6,7 @@ * Copyright 2013 Freescale Semiconductor, Inc. */ +#include #include #include #include diff --git a/board/phytec/pcm058/pcm058.c b/board/phytec/pcm058/pcm058.c index ecc5b75d8d4..b37c6fe218d 100644 --- a/board/phytec/pcm058/pcm058.c +++ b/board/phytec/pcm058/pcm058.c @@ -9,6 +9,7 @@ * Both NAND and eMMC cannot be set because they share the * same pins (SD4) */ +#include #include #include #include diff --git a/board/phytec/phycore_am335x_r2/board.c b/board/phytec/phycore_am335x_r2/board.c index 2022525651d..5700effbd3f 100644 --- a/board/phytec/phycore_am335x_r2/board.c +++ b/board/phytec/phycore_am335x_r2/board.c @@ -10,7 +10,7 @@ * Copyright (C) 2019 DENX Software Engineering GmbH */ -#include +#include #include #include #include diff --git a/board/phytec/phycore_am335x_r2/mux.c b/board/phytec/phycore_am335x_r2/mux.c index bb1c48da0fe..7091c985ba1 100644 --- a/board/phytec/phycore_am335x_r2/mux.c +++ b/board/phytec/phycore_am335x_r2/mux.c @@ -6,6 +6,7 @@ * Copyright (C) 2019 DENX Software Engineering GmbH */ +#include #include #include #include diff --git a/board/phytec/phycore_am62x/phycore-am62x.c b/board/phytec/phycore_am62x/phycore-am62x.c index a082b886bda..618b4c370d1 100644 --- a/board/phytec/phycore_am62x/phycore-am62x.c +++ b/board/phytec/phycore_am62x/phycore-am62x.c @@ -5,8 +5,11 @@ */ #include +#include +#include #include #include +#include DECLARE_GLOBAL_DATA_PTR; @@ -54,3 +57,67 @@ void spl_board_init(void) MCU_CTRL_DEVICE_CLKOUT_32K_CTRL); } #endif + +#if IS_ENABLED(CONFIG_ENV_IS_IN_FAT) || IS_ENABLED(CONFIG_ENV_IS_IN_MMC) +int mmc_get_env_dev(void) +{ + u32 boot_device = get_boot_device(); + + switch (boot_device) { + case BOOT_DEVICE_MMC1: + return 0; + case BOOT_DEVICE_MMC2: + return 1; + }; + + return CONFIG_SYS_MMC_ENV_DEV; +} +#endif + +enum env_location env_get_location(enum env_operation op, int prio) +{ + u32 boot_device = get_boot_device(); + + if (prio) + return ENVL_UNKNOWN; + + switch (boot_device) { + case BOOT_DEVICE_MMC1: + case BOOT_DEVICE_MMC2: + if (CONFIG_IS_ENABLED(ENV_IS_IN_FAT)) + return ENVL_FAT; + if (CONFIG_IS_ENABLED(ENV_IS_IN_MMC)) + return ENVL_MMC; + case BOOT_DEVICE_SPI: + if (CONFIG_IS_ENABLED(ENV_IS_IN_SPI_FLASH)) + return ENVL_SPI_FLASH; + default: + return ENVL_NOWHERE; + }; +} + +#if IS_ENABLED(CONFIG_BOARD_LATE_INIT) +int board_late_init(void) +{ + u32 boot_device = get_boot_device(); + + switch (boot_device) { + case BOOT_DEVICE_MMC1: + env_set_ulong("mmcdev", 0); + env_set("boot", "mmc"); + break; + case BOOT_DEVICE_MMC2: + env_set_ulong("mmcdev", 1); + env_set("boot", "mmc"); + break; + case BOOT_DEVICE_SPI: + env_set("boot", "spi"); + break; + case BOOT_DEVICE_ETHERNET: + env_set("boot", "net"); + break; + }; + + return 0; +} +#endif diff --git a/board/phytec/phycore_imx8mm/phycore-imx8mm.c b/board/phytec/phycore_imx8mm/phycore-imx8mm.c index 06cffbca3a6..ef647291690 100644 --- a/board/phytec/phycore_imx8mm/phycore-imx8mm.c +++ b/board/phytec/phycore_imx8mm/phycore-imx8mm.c @@ -4,6 +4,7 @@ * Author: Teresa Remmet */ +#include #include #include #include diff --git a/board/phytec/phycore_imx8mm/spl.c b/board/phytec/phycore_imx8mm/spl.c index 8d858590a39..690a51f7a72 100644 --- a/board/phytec/phycore_imx8mm/spl.c +++ b/board/phytec/phycore_imx8mm/spl.c @@ -4,6 +4,7 @@ * Author: Teresa Remmet */ +#include #include #include #include diff --git a/board/phytec/phycore_imx8mp/phycore-imx8mp.c b/board/phytec/phycore_imx8mp/phycore-imx8mp.c index 35683591433..dbdd6bb7937 100644 --- a/board/phytec/phycore_imx8mp/phycore-imx8mp.c +++ b/board/phytec/phycore_imx8mp/phycore-imx8mp.c @@ -4,6 +4,7 @@ * Author: Teresa Remmet */ +#include #include #include #include diff --git a/board/phytec/phycore_imx8mp/spl.c b/board/phytec/phycore_imx8mp/spl.c index 352f803e454..df158024654 100644 --- a/board/phytec/phycore_imx8mp/spl.c +++ b/board/phytec/phycore_imx8mp/spl.c @@ -4,6 +4,7 @@ * Author: Teresa Remmet */ +#include #include #include #include diff --git a/board/phytec/phycore_rk3288/phycore-rk3288.c b/board/phytec/phycore_rk3288/phycore-rk3288.c index a970634b4c3..3f49f39e3d5 100644 --- a/board/phytec/phycore_rk3288/phycore-rk3288.c +++ b/board/phytec/phycore_rk3288/phycore-rk3288.c @@ -4,11 +4,13 @@ * Author: Wadim Egorov */ +#include #include #include #include #include #include +#include #include #include #include diff --git a/board/phytium/durian/durian.c b/board/phytium/durian/durian.c index 01e210fcdd1..0a4048d4982 100644 --- a/board/phytium/durian/durian.c +++ b/board/phytium/durian/durian.c @@ -5,6 +5,7 @@ * liuhao */ +#include #include #include #include diff --git a/board/phytium/pe2201/pe2201.c b/board/phytium/pe2201/pe2201.c index fbbf6789b50..0e837b0f50f 100644 --- a/board/phytium/pe2201/pe2201.c +++ b/board/phytium/pe2201/pe2201.c @@ -12,6 +12,7 @@ #include #include #include +#include #include "cpu.h" DECLARE_GLOBAL_DATA_PTR; diff --git a/board/phytium/pomelo/pomelo.c b/board/phytium/pomelo/pomelo.c index 0ea335e7486..960e491c768 100644 --- a/board/phytium/pomelo/pomelo.c +++ b/board/phytium/pomelo/pomelo.c @@ -14,6 +14,7 @@ #include #include #include +#include #include "cpu.h" DECLARE_GLOBAL_DATA_PTR; diff --git a/board/polyhex/imx8mp_debix_model_a/imx8mp_debix_model_a.c b/board/polyhex/imx8mp_debix_model_a/imx8mp_debix_model_a.c index 112770ba493..14b94c9e33c 100644 --- a/board/polyhex/imx8mp_debix_model_a/imx8mp_debix_model_a.c +++ b/board/polyhex/imx8mp_debix_model_a/imx8mp_debix_model_a.c @@ -11,6 +11,7 @@ #include #include #include +#include #include #include #include diff --git a/board/polyhex/imx8mp_debix_model_a/spl.c b/board/polyhex/imx8mp_debix_model_a/spl.c index 6cbd1815cad..eb904e116b1 100644 --- a/board/polyhex/imx8mp_debix_model_a/spl.c +++ b/board/polyhex/imx8mp_debix_model_a/spl.c @@ -11,6 +11,7 @@ #include #include #include +#include #include #include #include diff --git a/board/purism/librem5/librem5.c b/board/purism/librem5/librem5.c index a3c421572af..d0249e71f09 100644 --- a/board/purism/librem5/librem5.c +++ b/board/purism/librem5/librem5.c @@ -4,6 +4,7 @@ * Copyright 2021 Purism */ +#include #include #include #include diff --git a/board/purism/librem5/lpddr4_timing.c b/board/purism/librem5/lpddr4_timing.c index e9559e3d843..46bc7f8591c 100644 --- a/board/purism/librem5/lpddr4_timing.c +++ b/board/purism/librem5/lpddr4_timing.c @@ -4,6 +4,7 @@ */ #include +#include #include #include diff --git a/board/purism/librem5/lpddr4_timing_b0.c b/board/purism/librem5/lpddr4_timing_b0.c index 5d8f2803be6..ec68edaf690 100644 --- a/board/purism/librem5/lpddr4_timing_b0.c +++ b/board/purism/librem5/lpddr4_timing_b0.c @@ -4,6 +4,7 @@ */ #include +#include #include #include diff --git a/board/purism/librem5/spl.c b/board/purism/librem5/spl.c index ed57554a2bc..9aadc553302 100644 --- a/board/purism/librem5/spl.c +++ b/board/purism/librem5/spl.c @@ -4,7 +4,7 @@ * Copyright 2021 Purism */ -#include +#include #include #include #include diff --git a/board/qca/ap121/ap121.c b/board/qca/ap121/ap121.c index 6bb12602193..60a2e19143d 100644 --- a/board/qca/ap121/ap121.c +++ b/board/qca/ap121/ap121.c @@ -3,6 +3,7 @@ * Copyright (C) 2015-2016 Wills Wang */ +#include #include #include #include diff --git a/board/qca/ap143/ap143.c b/board/qca/ap143/ap143.c index b88de9c4ec8..ac65054136c 100644 --- a/board/qca/ap143/ap143.c +++ b/board/qca/ap143/ap143.c @@ -3,6 +3,7 @@ * Copyright (C) 2015-2016 Wills Wang */ +#include #include #include #include diff --git a/board/qca/ap152/ap152.c b/board/qca/ap152/ap152.c index 53587288c93..82458c3af42 100644 --- a/board/qca/ap152/ap152.c +++ b/board/qca/ap152/ap152.c @@ -3,6 +3,7 @@ * Copyright (C) 2018 Rosy Song */ +#include #include #include #include diff --git a/board/qualcomm/dragonboard410c/dragonboard410c.c b/board/qualcomm/dragonboard410c/dragonboard410c.c index bd2e213b3bc..fbbfc0e65e2 100644 --- a/board/qualcomm/dragonboard410c/dragonboard410c.c +++ b/board/qualcomm/dragonboard410c/dragonboard410c.c @@ -6,6 +6,7 @@ */ #include +#include #include #include #include diff --git a/board/qualcomm/dragonboard820c/dragonboard820c.c b/board/qualcomm/dragonboard820c/dragonboard820c.c index d3333a59db0..ac7de711c58 100644 --- a/board/qualcomm/dragonboard820c/dragonboard820c.c +++ b/board/qualcomm/dragonboard820c/dragonboard820c.c @@ -13,6 +13,7 @@ #include #include #include +#include #include #include #include diff --git a/board/raidsonic/ib62x0/ib62x0.c b/board/raidsonic/ib62x0/ib62x0.c index 8d1d549a217..f9bc07649e0 100644 --- a/board/raidsonic/ib62x0/ib62x0.c +++ b/board/raidsonic/ib62x0/ib62x0.c @@ -6,6 +6,7 @@ * Simon Baatz */ +#include #include #include #include diff --git a/board/raspberrypi/rpi/rpi.c b/board/raspberrypi/rpi/rpi.c index d996eb0cf69..2851ebc9853 100644 --- a/board/raspberrypi/rpi/rpi.c +++ b/board/raspberrypi/rpi/rpi.c @@ -3,6 +3,7 @@ * (C) Copyright 2012-2016 Stephen Warren */ +#include #include #include #include diff --git a/board/renesas/falcon/falcon.c b/board/renesas/falcon/falcon.c index c88257d9677..27fccacf6f8 100644 --- a/board/renesas/falcon/falcon.c +++ b/board/renesas/falcon/falcon.c @@ -14,6 +14,7 @@ #include #include #include +#include DECLARE_GLOBAL_DATA_PTR; diff --git a/board/renesas/grpeach/grpeach.c b/board/renesas/grpeach/grpeach.c index 88f65c3b6a0..c475c3f50ab 100644 --- a/board/renesas/grpeach/grpeach.c +++ b/board/renesas/grpeach/grpeach.c @@ -10,6 +10,7 @@ #include #include #include +#include #define RZA1_WDT_BASE 0xfcfe0000 #define WTCSR 0x00 diff --git a/board/rockchip/evb_rk3036/evb_rk3036.c b/board/rockchip/evb_rk3036/evb_rk3036.c index a0805030ea4..8c606463e45 100644 --- a/board/rockchip/evb_rk3036/evb_rk3036.c +++ b/board/rockchip/evb_rk3036/evb_rk3036.c @@ -3,6 +3,7 @@ * (C) Copyright 2015 Rockchip Electronics Co., Ltd */ +#include #include #include #include diff --git a/board/rockchip/evb_rk3308/evb_rk3308.c b/board/rockchip/evb_rk3308/evb_rk3308.c index c895da934a9..e0c96fd70a2 100644 --- a/board/rockchip/evb_rk3308/evb_rk3308.c +++ b/board/rockchip/evb_rk3308/evb_rk3308.c @@ -3,6 +3,7 @@ * (C) Copyright 2018 Rockchip Electronics Co., Ltd */ +#include #include #include diff --git a/board/rockchip/evb_rv1108/evb_rv1108.c b/board/rockchip/evb_rv1108/evb_rv1108.c index 48b9d8f80c4..0d7a486bed7 100644 --- a/board/rockchip/evb_rv1108/evb_rv1108.c +++ b/board/rockchip/evb_rv1108/evb_rv1108.c @@ -4,6 +4,7 @@ * Authors: Andy Yan */ +#include #include #include #include diff --git a/board/rockchip/kylin_rk3036/kylin_rk3036.c b/board/rockchip/kylin_rk3036/kylin_rk3036.c index c452b131208..0ca91cdeb01 100644 --- a/board/rockchip/kylin_rk3036/kylin_rk3036.c +++ b/board/rockchip/kylin_rk3036/kylin_rk3036.c @@ -3,6 +3,7 @@ * (C) Copyright 2015 Rockchip Electronics Co., Ltd */ +#include #include #include #include diff --git a/board/rockchip/tinker_rk3288/tinker-rk3288.c b/board/rockchip/tinker_rk3288/tinker-rk3288.c index e966e9f201a..eff3a00c30a 100644 --- a/board/rockchip/tinker_rk3288/tinker-rk3288.c +++ b/board/rockchip/tinker_rk3288/tinker-rk3288.c @@ -3,7 +3,9 @@ * (C) Copyright 2016 Rockchip Electronics Co., Ltd */ +#include #include +#include #include #include #include diff --git a/board/ronetix/imx7-cm/imx7-cm.c b/board/ronetix/imx7-cm/imx7-cm.c index a1f3f3cd797..c23097f0476 100644 --- a/board/ronetix/imx7-cm/imx7-cm.c +++ b/board/ronetix/imx7-cm/imx7-cm.c @@ -15,6 +15,7 @@ #include #include #include +#include #include #include #include diff --git a/board/ronetix/imx7-cm/spl.c b/board/ronetix/imx7-cm/spl.c index 136de3cf3ef..b94cfd6ffc6 100644 --- a/board/ronetix/imx7-cm/spl.c +++ b/board/ronetix/imx7-cm/spl.c @@ -5,6 +5,7 @@ * Author: Ilko Iliev */ +#include #include #include #include diff --git a/board/ronetix/imx8mq-cm/imx8mq_cm.c b/board/ronetix/imx8mq-cm/imx8mq_cm.c index fbee2c39771..9805a3a7da8 100644 --- a/board/ronetix/imx8mq-cm/imx8mq_cm.c +++ b/board/ronetix/imx8mq-cm/imx8mq_cm.c @@ -3,6 +3,7 @@ * Copyright 2018 NXP */ +#include #include #include #include diff --git a/board/ronetix/imx8mq-cm/lpddr4_timing.c b/board/ronetix/imx8mq-cm/lpddr4_timing.c index a7ad9375ce3..685600ee62f 100644 --- a/board/ronetix/imx8mq-cm/lpddr4_timing.c +++ b/board/ronetix/imx8mq-cm/lpddr4_timing.c @@ -4,6 +4,7 @@ */ #include +#include #include #include diff --git a/board/ronetix/imx8mq-cm/spl.c b/board/ronetix/imx8mq-cm/spl.c index ee0ad20ced4..1c675bcab25 100644 --- a/board/ronetix/imx8mq-cm/spl.c +++ b/board/ronetix/imx8mq-cm/spl.c @@ -4,7 +4,7 @@ * */ -#include +#include #include #include #include diff --git a/board/ronetix/pm9261/pm9261.c b/board/ronetix/pm9261/pm9261.c index ee578749bce..07febe69dc7 100644 --- a/board/ronetix/pm9261/pm9261.c +++ b/board/ronetix/pm9261/pm9261.c @@ -7,7 +7,7 @@ * Copyright (C) 2009 Jean-Christopher PLAGNIOL-VILLARD */ -#include +#include #include #include #include diff --git a/board/ronetix/pm9263/pm9263.c b/board/ronetix/pm9263/pm9263.c index 1de1bd68701..76f62ddde91 100644 --- a/board/ronetix/pm9263/pm9263.c +++ b/board/ronetix/pm9263/pm9263.c @@ -7,7 +7,7 @@ * Copyright (C) 2009 Jean-Christophe PLAGNIOL-VILLARD */ -#include +#include #include #include #include diff --git a/board/ronetix/pm9g45/pm9g45.c b/board/ronetix/pm9g45/pm9g45.c index 5d5edd9f253..aa5c80ac641 100644 --- a/board/ronetix/pm9g45/pm9g45.c +++ b/board/ronetix/pm9g45/pm9g45.c @@ -10,7 +10,7 @@ * Lead Tech Design */ -#include +#include #include #include #include diff --git a/board/samsung/arndale/arndale.c b/board/samsung/arndale/arndale.c index e70b4a82687..3ebf600e1d7 100644 --- a/board/samsung/arndale/arndale.c +++ b/board/samsung/arndale/arndale.c @@ -3,7 +3,7 @@ * Copyright (C) 2013 Samsung Electronics */ -#include +#include #include #include #include diff --git a/board/samsung/arndale/arndale_spl.c b/board/samsung/arndale/arndale_spl.c index c40ca7fa749..6ad0273e049 100644 --- a/board/samsung/arndale/arndale_spl.c +++ b/board/samsung/arndale/arndale_spl.c @@ -3,6 +3,7 @@ * Copyright (c) 2012 The Chromium OS Authors. */ +#include #include #define SIGNATURE 0xdeadbeef diff --git a/board/samsung/common/board.c b/board/samsung/common/board.c index eed1c2450fa..5a71982775d 100644 --- a/board/samsung/common/board.c +++ b/board/samsung/common/board.c @@ -4,7 +4,7 @@ * Rajeshwari Shinde */ -#include +#include #include #include #include diff --git a/board/samsung/common/exynos5-dt-types.c b/board/samsung/common/exynos5-dt-types.c index 8328bf427cc..9294d36ba35 100644 --- a/board/samsung/common/exynos5-dt-types.c +++ b/board/samsung/common/exynos5-dt-types.c @@ -4,7 +4,7 @@ * Przemyslaw Marczak */ -#include +#include #include #include #include diff --git a/board/samsung/common/exynos5-dt.c b/board/samsung/common/exynos5-dt.c index 56862bcb34d..b3e87c93751 100644 --- a/board/samsung/common/exynos5-dt.c +++ b/board/samsung/common/exynos5-dt.c @@ -3,7 +3,7 @@ * Copyright (C) 2012 Samsung Electronics */ -#include +#include #include #include #include diff --git a/board/samsung/common/gadget.c b/board/samsung/common/gadget.c index c1b4342f4e2..9487f9ec4e0 100644 --- a/board/samsung/common/gadget.c +++ b/board/samsung/common/gadget.c @@ -4,7 +4,7 @@ * Lukasz Majewski */ -#include +#include #include #define EXYNOS_G_DNL_THOR_VENDOR_NUM 0x04E8 diff --git a/board/samsung/common/misc.c b/board/samsung/common/misc.c index c134a9d70e2..cc114aaaa6d 100644 --- a/board/samsung/common/misc.c +++ b/board/samsung/common/misc.c @@ -4,7 +4,7 @@ * Przemyslaw Marczak */ -#include +#include #include #include #include diff --git a/board/samsung/common/sromc.c b/board/samsung/common/sromc.c index 689ac8f8c6f..76e37dfe262 100644 --- a/board/samsung/common/sromc.c +++ b/board/samsung/common/sromc.c @@ -5,6 +5,7 @@ #define LOG_CATEGORY UCLASS_ETH +#include #include #include #include diff --git a/board/samsung/goni/goni.c b/board/samsung/goni/goni.c index a1047f3fd2a..c8f5a153bb4 100644 --- a/board/samsung/goni/goni.c +++ b/board/samsung/goni/goni.c @@ -5,6 +5,7 @@ * Kyungmin Park */ +#include #include #include #include diff --git a/board/samsung/goni/onenand.c b/board/samsung/goni/onenand.c index 6c7a03624b0..c67c107b16c 100644 --- a/board/samsung/goni/onenand.c +++ b/board/samsung/goni/onenand.c @@ -4,7 +4,7 @@ * Kyungmin Park */ -#include +#include #include #include #include diff --git a/board/samsung/odroid/odroid.c b/board/samsung/odroid/odroid.c index 84d6d919f07..99e5613ced9 100644 --- a/board/samsung/odroid/odroid.c +++ b/board/samsung/odroid/odroid.c @@ -4,7 +4,7 @@ * Przemyslaw Marczak */ -#include +#include #include #include #include diff --git a/board/samsung/origen/origen.c b/board/samsung/origen/origen.c index c474a7e54fa..ddf6a2b72fa 100644 --- a/board/samsung/origen/origen.c +++ b/board/samsung/origen/origen.c @@ -3,6 +3,7 @@ * Copyright (C) 2011 Samsung Electronics */ +#include #include #include #include diff --git a/board/samsung/smdk5250/smdk5250_spl.c b/board/samsung/smdk5250/smdk5250_spl.c index 1c78cb6dda4..b0ef34dd6aa 100644 --- a/board/samsung/smdk5250/smdk5250_spl.c +++ b/board/samsung/smdk5250/smdk5250_spl.c @@ -3,6 +3,7 @@ * Copyright (c) 2012 The Chromium OS Authors. */ +#include #include #include #include diff --git a/board/samsung/smdk5420/smdk5420_spl.c b/board/samsung/smdk5420/smdk5420_spl.c index ccf8b257ec2..84126f5608c 100644 --- a/board/samsung/smdk5420/smdk5420_spl.c +++ b/board/samsung/smdk5420/smdk5420_spl.c @@ -3,6 +3,7 @@ * Copyright (C) 2013 The Chromium OS Authors. */ +#include #include #include #include diff --git a/board/samsung/smdkc100/onenand.c b/board/samsung/smdkc100/onenand.c index 86ec550aaca..04dc04a1a4a 100644 --- a/board/samsung/smdkc100/onenand.c +++ b/board/samsung/smdkc100/onenand.c @@ -4,6 +4,7 @@ * Kyungmin Park */ +#include #include #include #include diff --git a/board/samsung/smdkc100/smdkc100.c b/board/samsung/smdkc100/smdkc100.c index 7d0b0fcb0ae..4f46911b0b4 100644 --- a/board/samsung/smdkc100/smdkc100.c +++ b/board/samsung/smdkc100/smdkc100.c @@ -5,7 +5,7 @@ * Kyungmin Park */ -#include +#include #include #include #include diff --git a/board/samsung/smdkv310/smdkv310.c b/board/samsung/smdkv310/smdkv310.c index 5a4874b29cd..47483a26a62 100644 --- a/board/samsung/smdkv310/smdkv310.c +++ b/board/samsung/smdkv310/smdkv310.c @@ -3,7 +3,7 @@ * Copyright (C) 2011 Samsung Electronics */ -#include +#include #include #include #include diff --git a/board/samsung/trats/trats.c b/board/samsung/trats/trats.c index 6efc6f3831d..6a3e5b29b98 100644 --- a/board/samsung/trats/trats.c +++ b/board/samsung/trats/trats.c @@ -6,6 +6,7 @@ * Donghwa Lee */ +#include #include #include #include diff --git a/board/samsung/trats2/trats2.c b/board/samsung/trats2/trats2.c index 612575a5094..81ccc124c80 100644 --- a/board/samsung/trats2/trats2.c +++ b/board/samsung/trats2/trats2.c @@ -5,6 +5,7 @@ * Piotr Wilczek */ +#include #include #include #include diff --git a/board/samsung/universal_c210/onenand.c b/board/samsung/universal_c210/onenand.c index ba56e86df46..265a2cde4b4 100644 --- a/board/samsung/universal_c210/onenand.c +++ b/board/samsung/universal_c210/onenand.c @@ -4,7 +4,7 @@ * Kyungmin Park */ -#include +#include #include #include #include diff --git a/board/samsung/universal_c210/universal.c b/board/samsung/universal_c210/universal.c index 6bed724153e..2d61dff89c2 100644 --- a/board/samsung/universal_c210/universal.c +++ b/board/samsung/universal_c210/universal.c @@ -5,6 +5,7 @@ * Kyungmin Park */ +#include #include #include #include diff --git a/board/schneider/rzn1-snarc/rzn1.c b/board/schneider/rzn1-snarc/rzn1.c index e1d5b5b0497..09241c3a954 100644 --- a/board/schneider/rzn1-snarc/rzn1.c +++ b/board/schneider/rzn1-snarc/rzn1.c @@ -1,5 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ +#include #include #include #include diff --git a/board/seeed/linkit-smart-7688/board.c b/board/seeed/linkit-smart-7688/board.c index 91fa08fd9ec..bf7c69ea838 100644 --- a/board/seeed/linkit-smart-7688/board.c +++ b/board/seeed/linkit-smart-7688/board.c @@ -3,6 +3,7 @@ * Copyright (C) 2018 Stefan Roese */ +#include #include #include #include diff --git a/board/seeed/npi_imx6ull/spl.c b/board/seeed/npi_imx6ull/spl.c index 2312d8fac69..b29da2c1fc1 100644 --- a/board/seeed/npi_imx6ull/spl.c +++ b/board/seeed/npi_imx6ull/spl.c @@ -4,7 +4,7 @@ * Author: Navin Sankar Velliangiri */ -#include +#include #include #include #include diff --git a/board/siemens/capricorn/board.c b/board/siemens/capricorn/board.c index 53dac8bfe1b..b1d7e3b1c05 100644 --- a/board/siemens/capricorn/board.c +++ b/board/siemens/capricorn/board.c @@ -5,6 +5,7 @@ * Copyright 2019 Siemens AG * */ +#include #include #include #include diff --git a/board/siemens/capricorn/spl.c b/board/siemens/capricorn/spl.c index 696b5ebd340..e160c611a96 100644 --- a/board/siemens/capricorn/spl.c +++ b/board/siemens/capricorn/spl.c @@ -5,6 +5,7 @@ * Copyright 2019 Siemens AG * */ +#include #include #include #include diff --git a/board/siemens/corvus/board.c b/board/siemens/corvus/board.c index 7d73d1f2b36..569b86db00a 100644 --- a/board/siemens/corvus/board.c +++ b/board/siemens/corvus/board.c @@ -10,7 +10,7 @@ * Lead Tech Design */ -#include +#include #include #include #include diff --git a/board/siemens/iot2050/board.c b/board/siemens/iot2050/board.c index ed292c364a5..0b0686e2628 100644 --- a/board/siemens/iot2050/board.c +++ b/board/siemens/iot2050/board.c @@ -8,7 +8,7 @@ * Jan Kiszka */ -#include +#include #include #include #include diff --git a/board/siemens/smartweb/smartweb.c b/board/siemens/smartweb/smartweb.c index 946fbc3f229..15044c7d0ed 100644 --- a/board/siemens/smartweb/smartweb.c +++ b/board/siemens/smartweb/smartweb.c @@ -15,7 +15,7 @@ * DENX Software Engineering GmbH */ -#include +#include #include #include #include diff --git a/board/siemens/taurus/taurus.c b/board/siemens/taurus/taurus.c index bda12a97708..ad44a7c0d28 100644 --- a/board/siemens/taurus/taurus.c +++ b/board/siemens/taurus/taurus.c @@ -12,7 +12,7 @@ */ #include -#include +#include #include #include #include diff --git a/board/silinux/ek874/ek874.c b/board/silinux/ek874/ek874.c index a3fe6f96d09..6dc804a0c06 100644 --- a/board/silinux/ek874/ek874.c +++ b/board/silinux/ek874/ek874.c @@ -6,8 +6,8 @@ * Copyright (C) 2021 Renesas Electronics Corporation */ +#include #include -#include #include #define RST_BASE 0xE6160000 diff --git a/board/sipeed/maix/maix.c b/board/sipeed/maix/maix.c index 08077a1f9e1..06653b5a876 100644 --- a/board/sipeed/maix/maix.c +++ b/board/sipeed/maix/maix.c @@ -3,7 +3,7 @@ * Copyright (C) 2019-20 Sean Anderson */ -#include +#include #include #include #include diff --git a/board/skyworth/hc2910-2aghd05/hc2910-2aghd05.c b/board/skyworth/hc2910-2aghd05/hc2910-2aghd05.c index 22be10d70a7..abad5efdafb 100644 --- a/board/skyworth/hc2910-2aghd05/hc2910-2aghd05.c +++ b/board/skyworth/hc2910-2aghd05/hc2910-2aghd05.c @@ -3,6 +3,7 @@ * Board init file for Skyworth HC2910 2AGHD05 */ +#include #include #include #include diff --git a/board/socionext/developerbox/developerbox.c b/board/socionext/developerbox/developerbox.c index 556a9ed527e..062e4a7b79f 100644 --- a/board/socionext/developerbox/developerbox.c +++ b/board/socionext/developerbox/developerbox.c @@ -9,7 +9,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/board/socrates/ddr.c b/board/socrates/ddr.c index bf4894eff67..3a94f7beccd 100644 --- a/board/socrates/ddr.c +++ b/board/socrates/ddr.c @@ -3,6 +3,7 @@ * Copyright 2008 Freescale Semiconductor, Inc. */ +#include #include #include diff --git a/board/socrates/law.c b/board/socrates/law.c index 446fdbcaba3..e4427ecff1b 100644 --- a/board/socrates/law.c +++ b/board/socrates/law.c @@ -9,7 +9,7 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ -#include +#include #include #include diff --git a/board/socrates/nand.c b/board/socrates/nand.c index 517a4a0af6a..b1e38c511e5 100644 --- a/board/socrates/nand.c +++ b/board/socrates/nand.c @@ -4,7 +4,7 @@ * Sergei Poselenov, Emcraft Systems, sposelenov@emcraft.com. */ -#include +#include #if defined(CFG_SYS_NAND_BASE) #include diff --git a/board/socrates/sdram.c b/board/socrates/sdram.c index d0415d26ce7..61402a554b7 100644 --- a/board/socrates/sdram.c +++ b/board/socrates/sdram.c @@ -4,7 +4,7 @@ * Sergei Poselenov, Emcraft Systems, sposelenov@emcraft.com. */ -#include +#include #include #include #include diff --git a/board/socrates/socrates.c b/board/socrates/socrates.c index 6e6e276cc74..1d63c81a9c8 100644 --- a/board/socrates/socrates.c +++ b/board/socrates/socrates.c @@ -10,7 +10,7 @@ * (C) Copyright 2002 Scott McNutt */ -#include +#include #include #include #include diff --git a/board/socrates/tlb.c b/board/socrates/tlb.c index 0cc675781d1..631f6c34075 100644 --- a/board/socrates/tlb.c +++ b/board/socrates/tlb.c @@ -9,9 +9,8 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ -#include +#include #include -#include struct fsl_e_tlb_entry tlb_table[] = { /* TLB 0 - for temp stack in cache */ diff --git a/board/softing/vining_2000/vining_2000.c b/board/softing/vining_2000/vining_2000.c index a0dbf97524b..4483bd7f7a3 100644 --- a/board/softing/vining_2000/vining_2000.c +++ b/board/softing/vining_2000/vining_2000.c @@ -24,7 +24,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/board/softing/vining_fpga/socfpga.c b/board/softing/vining_fpga/socfpga.c index 2483fbcf263..b3f9550742e 100644 --- a/board/softing/vining_fpga/socfpga.c +++ b/board/softing/vining_fpga/socfpga.c @@ -3,7 +3,7 @@ * Copyright (C) 2012 Altera Corporation */ -#include +#include #include #include #include diff --git a/board/solidrun/clearfog/clearfog.c b/board/solidrun/clearfog/clearfog.c index 2dbd071abd9..6977db0a9e2 100644 --- a/board/solidrun/clearfog/clearfog.c +++ b/board/solidrun/clearfog/clearfog.c @@ -3,7 +3,7 @@ * Copyright (C) 2015 Stefan Roese */ -#include +#include #include #include #include diff --git a/board/solidrun/common/tlv_data.c b/board/solidrun/common/tlv_data.c index b8086605c3a..cf5824886c3 100644 --- a/board/solidrun/common/tlv_data.c +++ b/board/solidrun/common/tlv_data.c @@ -3,9 +3,9 @@ * Copyright 2020 SolidRun */ +#include #include #include -#include #include "tlv_data.h" #define SR_TLV_CODE_RAM_SIZE 0x81 diff --git a/board/solidrun/mx6cuboxi/mx6cuboxi.c b/board/solidrun/mx6cuboxi/mx6cuboxi.c index 3406ba8616e..7f4811d8879 100644 --- a/board/solidrun/mx6cuboxi/mx6cuboxi.c +++ b/board/solidrun/mx6cuboxi/mx6cuboxi.c @@ -15,7 +15,7 @@ * Ported to SolidRun microSOM by Rabeeh Khoury */ -#include +#include #include #include #include diff --git a/board/somlabs/visionsom-6ull/visionsom-6ull.c b/board/somlabs/visionsom-6ull/visionsom-6ull.c index 0ecb5c3b493..38d14f6bc26 100644 --- a/board/somlabs/visionsom-6ull/visionsom-6ull.c +++ b/board/somlabs/visionsom-6ull/visionsom-6ull.c @@ -17,6 +17,7 @@ #include #include #include +#include #include #include #include diff --git a/board/sr1500/socfpga.c b/board/sr1500/socfpga.c index 5603ef24da8..d9125a76bf7 100644 --- a/board/sr1500/socfpga.c +++ b/board/sr1500/socfpga.c @@ -3,6 +3,7 @@ * Copyright (C) 2015 Stefan Roese */ +#include #include #include #include diff --git a/board/st/common/cmd_stboard.c b/board/st/common/cmd_stboard.c index 50da063051b..c8c0bad5da1 100644 --- a/board/st/common/cmd_stboard.c +++ b/board/st/common/cmd_stboard.c @@ -30,6 +30,7 @@ */ #ifndef CONFIG_SPL_BUILD +#include #include #include #include diff --git a/board/st/common/stm32mp_dfu.c b/board/st/common/stm32mp_dfu.c index 1db8e45480e..77edb86e78c 100644 --- a/board/st/common/stm32mp_dfu.c +++ b/board/st/common/stm32mp_dfu.c @@ -3,6 +3,7 @@ * Copyright (C) 2020, STMicroelectronics - All Rights Reserved */ +#include #include #include #include diff --git a/board/st/common/stm32mp_dfu_virt.c b/board/st/common/stm32mp_dfu_virt.c index 4049d72bf9d..f0f99605796 100644 --- a/board/st/common/stm32mp_dfu_virt.c +++ b/board/st/common/stm32mp_dfu_virt.c @@ -3,6 +3,7 @@ * Copyright (C) 2023, STMicroelectronics - All Rights Reserved */ +#include #include #include #include diff --git a/board/st/common/stpmic1.c b/board/st/common/stpmic1.c index 45c2bb5bcea..969ad484864 100644 --- a/board/st/common/stpmic1.c +++ b/board/st/common/stpmic1.c @@ -5,6 +5,7 @@ #define LOG_CATEGORY LOGC_BOARD +#include #include #include #include diff --git a/board/st/common/stusb160x.c b/board/st/common/stusb160x.c index e1ad8b00717..f0385e5e383 100644 --- a/board/st/common/stusb160x.c +++ b/board/st/common/stusb160x.c @@ -8,6 +8,7 @@ #define LOG_CATEGORY UCLASS_I2C_GENERIC +#include #include #include diff --git a/board/st/stih410-b2260/board.c b/board/st/stih410-b2260/board.c index a912712c9dd..82817571ae3 100644 --- a/board/st/stih410-b2260/board.c +++ b/board/st/stih410-b2260/board.c @@ -4,6 +4,7 @@ * Author(s): Patrice Chotard, for STMicroelectronics. */ +#include #include #include #include diff --git a/board/st/stm32f429-discovery/led.c b/board/st/stm32f429-discovery/led.c index 4b8038341b9..8dda6a97bd1 100644 --- a/board/st/stm32f429-discovery/led.c +++ b/board/st/stm32f429-discovery/led.c @@ -4,6 +4,7 @@ * Kamil Lulko, */ +#include #include #include diff --git a/board/st/stm32f429-discovery/stm32f429-discovery.c b/board/st/stm32f429-discovery/stm32f429-discovery.c index 22d751b44d3..55e464cc7cf 100644 --- a/board/st/stm32f429-discovery/stm32f429-discovery.c +++ b/board/st/stm32f429-discovery/stm32f429-discovery.c @@ -10,6 +10,7 @@ * Kamil Lulko, */ +#include #include #include #include diff --git a/board/st/stm32f429-evaluation/stm32f429-evaluation.c b/board/st/stm32f429-evaluation/stm32f429-evaluation.c index db59ebb838e..25472f041fe 100644 --- a/board/st/stm32f429-evaluation/stm32f429-evaluation.c +++ b/board/st/stm32f429-evaluation/stm32f429-evaluation.c @@ -4,6 +4,7 @@ * Author(s): Patrice Chotard, for STMicroelectronics. */ +#include #include #include #include diff --git a/board/st/stm32f469-discovery/stm32f469-discovery.c b/board/st/stm32f469-discovery/stm32f469-discovery.c index 134d207d95d..9ed6c1e6768 100644 --- a/board/st/stm32f469-discovery/stm32f469-discovery.c +++ b/board/st/stm32f469-discovery/stm32f469-discovery.c @@ -4,6 +4,7 @@ * Author(s): Patrice CHOTARD, for STMicroelectronics. */ +#include #include #include #include diff --git a/board/st/stm32f746-disco/stm32f746-disco.c b/board/st/stm32f746-disco/stm32f746-disco.c index 6d86e4fe7aa..0f966600843 100644 --- a/board/st/stm32f746-disco/stm32f746-disco.c +++ b/board/st/stm32f746-disco/stm32f746-disco.c @@ -4,7 +4,7 @@ * Author(s): Vikas Manocha, for STMicroelectronics. */ -#include +#include #include #include #include diff --git a/board/st/stm32h743-disco/stm32h743-disco.c b/board/st/stm32h743-disco/stm32h743-disco.c index 35ef9ff9e28..4ca5e847212 100644 --- a/board/st/stm32h743-disco/stm32h743-disco.c +++ b/board/st/stm32h743-disco/stm32h743-disco.c @@ -4,6 +4,7 @@ * Author(s): Patrice Chotard, for STMicroelectronics. */ +#include #include #include #include diff --git a/board/st/stm32h743-eval/stm32h743-eval.c b/board/st/stm32h743-eval/stm32h743-eval.c index 35ef9ff9e28..4ca5e847212 100644 --- a/board/st/stm32h743-eval/stm32h743-eval.c +++ b/board/st/stm32h743-eval/stm32h743-eval.c @@ -4,6 +4,7 @@ * Author(s): Patrice Chotard, for STMicroelectronics. */ +#include #include #include #include diff --git a/board/st/stm32h750-art-pi/stm32h750-art-pi.c b/board/st/stm32h750-art-pi/stm32h750-art-pi.c index 75aa4d139fb..0d39ce849a6 100644 --- a/board/st/stm32h750-art-pi/stm32h750-art-pi.c +++ b/board/st/stm32h750-art-pi/stm32h750-art-pi.c @@ -4,6 +4,7 @@ * Author(s): Dillon Min */ +#include #include #include #include diff --git a/board/st/stm32mp1/spl.c b/board/st/stm32mp1/spl.c index d63dffd97e8..8b4a529f759 100644 --- a/board/st/stm32mp1/spl.c +++ b/board/st/stm32mp1/spl.c @@ -4,6 +4,7 @@ */ #include +#include #include #include #include diff --git a/board/st/stm32mp1/stm32mp1.c b/board/st/stm32mp1/stm32mp1.c index 97532a8156f..db15d78237e 100644 --- a/board/st/stm32mp1/stm32mp1.c +++ b/board/st/stm32mp1/stm32mp1.c @@ -5,6 +5,7 @@ #define LOG_CATEGORY LOGC_BOARD +#include #include #include #include diff --git a/board/ste/stemmy/stemmy.c b/board/ste/stemmy/stemmy.c index 826c002907d..060d562cbc9 100644 --- a/board/ste/stemmy/stemmy.c +++ b/board/ste/stemmy/stemmy.c @@ -2,12 +2,12 @@ /* * Copyright (C) 2019 Stephan Gerhold */ +#include #include #include #include #include #include -#include #include #include #include diff --git a/board/storopack/smegw01/smegw01.c b/board/storopack/smegw01/smegw01.c index 910feeda31f..345191b31c2 100644 --- a/board/storopack/smegw01/smegw01.c +++ b/board/storopack/smegw01/smegw01.c @@ -12,6 +12,7 @@ #include #include #include +#include #include #include #include diff --git a/board/sunxi/board.c b/board/sunxi/board.c index ed86f1df5dc..1313b01dcea 100644 --- a/board/sunxi/board.c +++ b/board/sunxi/board.c @@ -10,6 +10,7 @@ * Some board init for the Allwinner A10-evb board. */ +#include #include #include #include diff --git a/board/sunxi/chip.c b/board/sunxi/chip.c index 270af2506d2..eeee6319e79 100644 --- a/board/sunxi/chip.c +++ b/board/sunxi/chip.c @@ -5,6 +5,7 @@ * Based on initial code from Maxime Ripard */ +#include #include #include #include diff --git a/board/sunxi/dram_sun4i_auto.c b/board/sunxi/dram_sun4i_auto.c index 4b78919a5ba..547d1c0cb4d 100644 --- a/board/sunxi/dram_sun4i_auto.c +++ b/board/sunxi/dram_sun4i_auto.c @@ -1,3 +1,4 @@ +#include #include #include diff --git a/board/sunxi/dram_sun5i_auto.c b/board/sunxi/dram_sun5i_auto.c index 8976e3b16d6..517506ccc4f 100644 --- a/board/sunxi/dram_sun5i_auto.c +++ b/board/sunxi/dram_sun5i_auto.c @@ -1,5 +1,6 @@ /* DRAM parameters for auto dram configuration on sun5i and sun7i */ +#include #include #include diff --git a/board/sunxi/gmac.c b/board/sunxi/gmac.c index 710e821e3fc..2a885305ebe 100644 --- a/board/sunxi/gmac.c +++ b/board/sunxi/gmac.c @@ -1,3 +1,4 @@ +#include #include #include #include diff --git a/board/sysam/amcore/amcore.c b/board/sysam/amcore/amcore.c index d5aa1f0776f..086421d9265 100644 --- a/board/sysam/amcore/amcore.c +++ b/board/sysam/amcore/amcore.c @@ -7,7 +7,7 @@ * This file copies memory testdram() from sandburst/common/sb_common.c */ -#include +#include #include #include #include diff --git a/board/sysam/stmark2/stmark2.c b/board/sysam/stmark2/stmark2.c index 7818f2671d5..475e3edfa62 100644 --- a/board/sysam/stmark2/stmark2.c +++ b/board/sysam/stmark2/stmark2.c @@ -5,7 +5,7 @@ * (C) Copyright 2017 Angelo Dureghello */ -#include +#include #include #include #include diff --git a/board/tcl/sl50/board.c b/board/tcl/sl50/board.c index 2e54ede62d6..3f7d42f3eb8 100644 --- a/board/tcl/sl50/board.c +++ b/board/tcl/sl50/board.c @@ -7,7 +7,7 @@ * Copyright (C) 2011, Texas Instruments, Incorporated - https://www.ti.com/ */ -#include +#include #include #include #include diff --git a/board/tcl/sl50/mux.c b/board/tcl/sl50/mux.c index 6d89c4a3998..ab9088145ab 100644 --- a/board/tcl/sl50/mux.c +++ b/board/tcl/sl50/mux.c @@ -5,6 +5,7 @@ * Copyright (C) 2011, Texas Instruments, Incorporated - https://www.ti.com/ */ +#include #include #include #include diff --git a/board/technexion/pico-imx6/pico-imx6.c b/board/technexion/pico-imx6/pico-imx6.c index 03170b148c5..6b9c4f4373c 100644 --- a/board/technexion/pico-imx6/pico-imx6.c +++ b/board/technexion/pico-imx6/pico-imx6.c @@ -6,6 +6,7 @@ * Author: Fabio Estevam */ +#include #include #include #include diff --git a/board/technexion/pico-imx6/spl.c b/board/technexion/pico-imx6/spl.c index 50f51774264..3b36bb8df13 100644 --- a/board/technexion/pico-imx6/spl.c +++ b/board/technexion/pico-imx6/spl.c @@ -6,6 +6,7 @@ * Fabio Estevam */ +#include #include #include #include diff --git a/board/technexion/pico-imx6ul/pico-imx6ul.c b/board/technexion/pico-imx6ul/pico-imx6ul.c index 10dcf8077e2..682c88dee78 100644 --- a/board/technexion/pico-imx6ul/pico-imx6ul.c +++ b/board/technexion/pico-imx6ul/pico-imx6ul.c @@ -17,6 +17,7 @@ #include #include #include +#include #include #include #include diff --git a/board/technexion/pico-imx6ul/spl.c b/board/technexion/pico-imx6ul/spl.c index 67484e62dad..ff56fd88d68 100644 --- a/board/technexion/pico-imx6ul/spl.c +++ b/board/technexion/pico-imx6ul/spl.c @@ -1,5 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ +#include #include #include #include diff --git a/board/technexion/pico-imx7d/pico-imx7d.c b/board/technexion/pico-imx7d/pico-imx7d.c index d0f739c624a..b12941ccf82 100644 --- a/board/technexion/pico-imx7d/pico-imx7d.c +++ b/board/technexion/pico-imx7d/pico-imx7d.c @@ -15,6 +15,7 @@ #include #include #include +#include #include #include #include diff --git a/board/technexion/pico-imx7d/spl.c b/board/technexion/pico-imx7d/spl.c index 8f219f76c60..0192eafbaa1 100644 --- a/board/technexion/pico-imx7d/spl.c +++ b/board/technexion/pico-imx7d/spl.c @@ -5,7 +5,7 @@ * Author: Richard Hu */ -#include +#include #include #include #include diff --git a/board/technexion/pico-imx8mq/lpddr4_timing_1gb.c b/board/technexion/pico-imx8mq/lpddr4_timing_1gb.c index cd8ba59f645..97b9ee27527 100644 --- a/board/technexion/pico-imx8mq/lpddr4_timing_1gb.c +++ b/board/technexion/pico-imx8mq/lpddr4_timing_1gb.c @@ -7,6 +7,7 @@ */ #include +#include #include #include diff --git a/board/technexion/pico-imx8mq/lpddr4_timing_2gb.c b/board/technexion/pico-imx8mq/lpddr4_timing_2gb.c index 3f66238a504..1572a50a05f 100644 --- a/board/technexion/pico-imx8mq/lpddr4_timing_2gb.c +++ b/board/technexion/pico-imx8mq/lpddr4_timing_2gb.c @@ -7,6 +7,7 @@ */ #include +#include #include #include diff --git a/board/technexion/pico-imx8mq/lpddr4_timing_3gb.c b/board/technexion/pico-imx8mq/lpddr4_timing_3gb.c index 2f037abc97d..3fc60a3eeb9 100644 --- a/board/technexion/pico-imx8mq/lpddr4_timing_3gb.c +++ b/board/technexion/pico-imx8mq/lpddr4_timing_3gb.c @@ -7,6 +7,7 @@ */ #include +#include #include #include diff --git a/board/technexion/pico-imx8mq/lpddr4_timing_4gb.c b/board/technexion/pico-imx8mq/lpddr4_timing_4gb.c index 336ac4c2f54..93b34235162 100644 --- a/board/technexion/pico-imx8mq/lpddr4_timing_4gb.c +++ b/board/technexion/pico-imx8mq/lpddr4_timing_4gb.c @@ -7,6 +7,7 @@ */ #include +#include #include #include diff --git a/board/technexion/pico-imx8mq/pico-imx8mq.c b/board/technexion/pico-imx8mq/pico-imx8mq.c index 1659db112fa..2be3206f78a 100644 --- a/board/technexion/pico-imx8mq/pico-imx8mq.c +++ b/board/technexion/pico-imx8mq/pico-imx8mq.c @@ -3,6 +3,7 @@ * Copyright 2018 NXP */ +#include #include #include #include diff --git a/board/technexion/pico-imx8mq/spl.c b/board/technexion/pico-imx8mq/spl.c index c9d68b402ae..1a9c7996cb2 100644 --- a/board/technexion/pico-imx8mq/spl.c +++ b/board/technexion/pico-imx8mq/spl.c @@ -3,6 +3,7 @@ * Copyright 2018 NXP */ +#include #include #include #include diff --git a/board/terasic/de1-soc/socfpga.c b/board/terasic/de1-soc/socfpga.c index 8d17f44fd37..22fbee40aba 100644 --- a/board/terasic/de1-soc/socfpga.c +++ b/board/terasic/de1-soc/socfpga.c @@ -2,6 +2,7 @@ /* * Copyright (C) 2012 Altera Corporation */ +#include #include void board_boot_order(u32 *spl_boot_list) diff --git a/board/thead/th1520_lpi4a/board.c b/board/thead/th1520_lpi4a/board.c index bb83e7561f4..16c3e456b3e 100644 --- a/board/thead/th1520_lpi4a/board.c +++ b/board/thead/th1520_lpi4a/board.c @@ -4,6 +4,7 @@ * */ +#include #include int board_init(void) diff --git a/board/theadorable/fpga.c b/board/theadorable/fpga.c index 56d3647227b..bc8379cccf6 100644 --- a/board/theadorable/fpga.c +++ b/board/theadorable/fpga.c @@ -3,10 +3,10 @@ * Copyright (C) 2016 Stefan Roese */ +#include #include #include #include -#include #include #include #include diff --git a/board/theadorable/theadorable.c b/board/theadorable/theadorable.c index cca5c3d33b5..144f122bb20 100644 --- a/board/theadorable/theadorable.c +++ b/board/theadorable/theadorable.c @@ -3,6 +3,7 @@ * Copyright (C) 2015-2019 Stefan Roese */ +#include #include #include #include diff --git a/board/ti/am335x/board.c b/board/ti/am335x/board.c index 34f4a919656..34f987c2b72 100644 --- a/board/ti/am335x/board.c +++ b/board/ti/am335x/board.c @@ -7,7 +7,7 @@ * Copyright (C) 2011, Texas Instruments, Incorporated - https://www.ti.com/ */ -#include +#include #include #include #include diff --git a/board/ti/am335x/board.h b/board/ti/am335x/board.h index b0a3842423f..1284c160d81 100644 --- a/board/ti/am335x/board.h +++ b/board/ti/am335x/board.h @@ -10,8 +10,6 @@ #ifndef _BOARD_H_ #define _BOARD_H_ -#include - /** * AM335X (EMIF_4D) EMIF REG_COS_COUNT_1, REG_COS_COUNT_2, and * REG_PR_OLD_COUNT values to avoid LCDC DMA FIFO underflows and Frame diff --git a/board/ti/am335x/mux.c b/board/ti/am335x/mux.c index 960de15398f..0bad154f86e 100644 --- a/board/ti/am335x/mux.c +++ b/board/ti/am335x/mux.c @@ -13,7 +13,7 @@ * GNU General Public License for more details. */ -#include +#include #include #include #include diff --git a/board/ti/am43xx/board.c b/board/ti/am43xx/board.c index 40b7fcfc387..a4679a2e294 100644 --- a/board/ti/am43xx/board.c +++ b/board/ti/am43xx/board.c @@ -7,7 +7,8 @@ * Copyright (C) 2013, Texas Instruments, Incorporated - https://www.ti.com/ */ -#include +#include +#include #include #include #include diff --git a/board/ti/am43xx/board.h b/board/ti/am43xx/board.h index b1025bdda1e..37a169aaf75 100644 --- a/board/ti/am43xx/board.h +++ b/board/ti/am43xx/board.h @@ -11,7 +11,6 @@ #ifndef _BOARD_H_ #define _BOARD_H_ -#include #include #define DEV_ATTR_MAX_OFFSET 5 diff --git a/board/ti/am43xx/mux.c b/board/ti/am43xx/mux.c index 2fcccbd1f04..463f1cc7178 100644 --- a/board/ti/am43xx/mux.c +++ b/board/ti/am43xx/mux.c @@ -5,6 +5,7 @@ * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/ */ +#include #include #include #include "../common/board_detect.h" diff --git a/board/ti/am57xx/board.c b/board/ti/am57xx/board.c index 48668884bdd..b004a89bb32 100644 --- a/board/ti/am57xx/board.c +++ b/board/ti/am57xx/board.c @@ -7,7 +7,7 @@ * Based on board/ti/dra7xx/evm.c */ -#include +#include #include #include #include diff --git a/board/ti/common/board_detect.c b/board/ti/common/board_detect.c index ea21d48bbc0..38e23ccbb67 100644 --- a/board/ti/common/board_detect.c +++ b/board/ti/common/board_detect.c @@ -7,9 +7,10 @@ * Steve Kipisz */ +#include +#include #include #include -#include #include #include #include diff --git a/board/ti/common/cape_detect.c b/board/ti/common/cape_detect.c index da805befabc..2e6105cfbf1 100644 --- a/board/ti/common/cape_detect.c +++ b/board/ti/common/cape_detect.c @@ -4,11 +4,10 @@ * Köry Maincent, Bootlin, */ -#include +#include #include #include #include -#include #include "cape_detect.h" diff --git a/board/ti/dra7xx/evm.c b/board/ti/dra7xx/evm.c index 2b1db2541b0..a8a216d034a 100644 --- a/board/ti/dra7xx/evm.c +++ b/board/ti/dra7xx/evm.c @@ -9,7 +9,7 @@ * Aneesh V * Steve Sakoman */ -#include +#include #include #include #include diff --git a/board/ti/ks2_evm/board.c b/board/ti/ks2_evm/board.c index c6735d37dda..5dcda12105b 100644 --- a/board/ti/ks2_evm/board.c +++ b/board/ti/ks2_evm/board.c @@ -6,7 +6,7 @@ * Texas Instruments Incorporated, */ -#include +#include #include #include "board.h" #include diff --git a/board/ti/ks2_evm/board_k2e.c b/board/ti/ks2_evm/board_k2e.c index 4385be4221b..39abb24e156 100644 --- a/board/ti/ks2_evm/board_k2e.c +++ b/board/ti/ks2_evm/board_k2e.c @@ -6,6 +6,7 @@ * Texas Instruments Incorporated, */ +#include #include #include #include diff --git a/board/ti/ks2_evm/board_k2g.c b/board/ti/ks2_evm/board_k2g.c index d07b77d23e2..5229afad63b 100644 --- a/board/ti/ks2_evm/board_k2g.c +++ b/board/ti/ks2_evm/board_k2g.c @@ -5,7 +5,8 @@ * (C) Copyright 2015 * Texas Instruments Incorporated, */ -#include +#include +#include #include #include #include diff --git a/board/ti/ks2_evm/board_k2hk.c b/board/ti/ks2_evm/board_k2hk.c index 2b5d2d75664..12c4649c3c4 100644 --- a/board/ti/ks2_evm/board_k2hk.c +++ b/board/ti/ks2_evm/board_k2hk.c @@ -6,6 +6,7 @@ * Texas Instruments Incorporated, */ +#include #include #include #include diff --git a/board/ti/ks2_evm/board_k2l.c b/board/ti/ks2_evm/board_k2l.c index 1971bc94f7d..f759ee36466 100644 --- a/board/ti/ks2_evm/board_k2l.c +++ b/board/ti/ks2_evm/board_k2l.c @@ -6,6 +6,7 @@ * Texas Instruments Incorporated, */ +#include #include #include #include diff --git a/board/ti/ks2_evm/ddr3_cfg.c b/board/ti/ks2_evm/ddr3_cfg.c index fe350fee795..0ade75263f8 100644 --- a/board/ti/ks2_evm/ddr3_cfg.c +++ b/board/ti/ks2_evm/ddr3_cfg.c @@ -6,6 +6,7 @@ * Texas Instruments Incorporated, */ +#include #include #include "ddr3_cfg.h" diff --git a/board/ti/ks2_evm/ddr3_k2e.c b/board/ti/ks2_evm/ddr3_k2e.c index 28305326e6a..95fe3a9021e 100644 --- a/board/ti/ks2_evm/ddr3_k2e.c +++ b/board/ti/ks2_evm/ddr3_k2e.c @@ -6,6 +6,7 @@ * Texas Instruments Incorporated, */ +#include #include "ddr3_cfg.h" #include diff --git a/board/ti/ks2_evm/ddr3_k2g.c b/board/ti/ks2_evm/ddr3_k2g.c index ef39e078152..3000d7245eb 100644 --- a/board/ti/ks2_evm/ddr3_k2g.c +++ b/board/ti/ks2_evm/ddr3_k2g.c @@ -6,6 +6,7 @@ * Texas Instruments Incorporated, */ +#include #include "ddr3_cfg.h" #include #include diff --git a/board/ti/ks2_evm/ddr3_k2hk.c b/board/ti/ks2_evm/ddr3_k2hk.c index 05c050cee44..198c5da0e62 100644 --- a/board/ti/ks2_evm/ddr3_k2hk.c +++ b/board/ti/ks2_evm/ddr3_k2hk.c @@ -6,6 +6,7 @@ * Texas Instruments Incorporated, */ +#include #include "ddr3_cfg.h" #include #include diff --git a/board/ti/ks2_evm/ddr3_k2l.c b/board/ti/ks2_evm/ddr3_k2l.c index aa6d45f0f8a..805bf81f6bd 100644 --- a/board/ti/ks2_evm/ddr3_k2l.c +++ b/board/ti/ks2_evm/ddr3_k2l.c @@ -6,6 +6,7 @@ * Texas Instruments Incorporated, */ +#include #include "ddr3_cfg.h" #include diff --git a/board/ti/omap3evm/evm.c b/board/ti/omap3evm/evm.c index 4eb08add256..a4d6a0138d9 100644 --- a/board/ti/omap3evm/evm.c +++ b/board/ti/omap3evm/evm.c @@ -10,7 +10,7 @@ * Richard Woodruff * Syed Mohammed Khasim */ -#include +#include #include #include #include diff --git a/board/ti/panda/panda.c b/board/ti/panda/panda.c index e47d3a952d5..22093186019 100644 --- a/board/ti/panda/panda.c +++ b/board/ti/panda/panda.c @@ -4,6 +4,7 @@ * Texas Instruments Incorporated, * Steve Sakoman */ +#include #include #include #include diff --git a/board/ti/sdp4430/cmd_bat.c b/board/ti/sdp4430/cmd_bat.c index 6bf44d92655..6c1e6ca393c 100644 --- a/board/ti/sdp4430/cmd_bat.c +++ b/board/ti/sdp4430/cmd_bat.c @@ -3,6 +3,7 @@ * Copyright (C) 2010 Texas Instruments */ +#include #include #ifdef CONFIG_CMD_BAT diff --git a/board/ti/sdp4430/sdp.c b/board/ti/sdp4430/sdp.c index 1a71390f543..2c9ae794fd4 100644 --- a/board/ti/sdp4430/sdp.c +++ b/board/ti/sdp4430/sdp.c @@ -5,6 +5,7 @@ * Aneesh V * Steve Sakoman */ +#include #include #include #include diff --git a/board/timll/devkit3250/devkit3250.c b/board/timll/devkit3250/devkit3250.c index f0c0f03deeb..efef855b3d0 100644 --- a/board/timll/devkit3250/devkit3250.c +++ b/board/timll/devkit3250/devkit3250.c @@ -5,7 +5,7 @@ * Copyright (C) 2011-2015 Vladimir Zapolskiy */ -#include +#include #include #include #include diff --git a/board/timll/devkit3250/devkit3250_spl.c b/board/timll/devkit3250/devkit3250_spl.c index 07a367c3ad1..12e8ae9c39c 100644 --- a/board/timll/devkit3250/devkit3250_spl.c +++ b/board/timll/devkit3250/devkit3250_spl.c @@ -5,6 +5,7 @@ * (C) Copyright 2015 Vladimir Zapolskiy */ +#include #include #include #include diff --git a/board/timll/devkit8000/devkit8000.c b/board/timll/devkit8000/devkit8000.c index ad404f7e9c4..06009d8ad54 100644 --- a/board/timll/devkit8000/devkit8000.c +++ b/board/timll/devkit8000/devkit8000.c @@ -15,7 +15,7 @@ * Syed Mohammed Khasim * */ -#include +#include #include #include #include diff --git a/board/toradex/apalis-imx8/apalis-imx8.c b/board/toradex/apalis-imx8/apalis-imx8.c index 72d67d90d41..0f993e644d7 100644 --- a/board/toradex/apalis-imx8/apalis-imx8.c +++ b/board/toradex/apalis-imx8/apalis-imx8.c @@ -3,6 +3,7 @@ * Copyright 2019 Toradex */ +#include #include #include #include diff --git a/board/toradex/apalis-tk1/apalis-tk1.c b/board/toradex/apalis-tk1/apalis-tk1.c index 4557ed1f1f2..ee87d9f4145 100644 --- a/board/toradex/apalis-tk1/apalis-tk1.c +++ b/board/toradex/apalis-tk1/apalis-tk1.c @@ -3,6 +3,7 @@ * Copyright (c) 2016-2018 Toradex, Inc. */ +#include #include #include #include diff --git a/board/toradex/apalis-tk1/as3722_init.c b/board/toradex/apalis-tk1/as3722_init.c index 8971f7aa16a..e9bd1028bed 100644 --- a/board/toradex/apalis-tk1/as3722_init.c +++ b/board/toradex/apalis-tk1/as3722_init.c @@ -3,6 +3,7 @@ * Copyright (c) 2012-2016 Toradex, Inc. */ +#include #include #include #include diff --git a/board/toradex/apalis_imx6/apalis_imx6.c b/board/toradex/apalis_imx6/apalis_imx6.c index 2dcc042ab26..0da245374a0 100644 --- a/board/toradex/apalis_imx6/apalis_imx6.c +++ b/board/toradex/apalis_imx6/apalis_imx6.c @@ -6,7 +6,7 @@ * copied from nitrogen6x */ -#include +#include #include #include #include diff --git a/board/toradex/apalis_imx6/do_fuse.c b/board/toradex/apalis_imx6/do_fuse.c index b404b01e032..6991b1bc136 100644 --- a/board/toradex/apalis_imx6/do_fuse.c +++ b/board/toradex/apalis_imx6/do_fuse.c @@ -7,6 +7,7 @@ * Helpers for i.MX OTP fusing during module production */ +#include #ifndef CONFIG_SPL_BUILD #include #include diff --git a/board/toradex/apalis_imx6/pf0100.c b/board/toradex/apalis_imx6/pf0100.c index 157aaec6fe0..c89052ff5da 100644 --- a/board/toradex/apalis_imx6/pf0100.c +++ b/board/toradex/apalis_imx6/pf0100.c @@ -7,6 +7,7 @@ * Helpers for Freescale PMIC PF0100 */ +#include #include #include #include diff --git a/board/toradex/apalis_t30/apalis_t30-spl.c b/board/toradex/apalis_t30/apalis_t30-spl.c index 25049452495..6e544641833 100644 --- a/board/toradex/apalis_t30/apalis_t30-spl.c +++ b/board/toradex/apalis_t30/apalis_t30-spl.c @@ -7,6 +7,7 @@ * Svyatoslav Ryhel */ +#include #include #include diff --git a/board/toradex/apalis_t30/apalis_t30.c b/board/toradex/apalis_t30/apalis_t30.c index 02e8f8eb1fe..b10beb44796 100644 --- a/board/toradex/apalis_t30/apalis_t30.c +++ b/board/toradex/apalis_t30/apalis_t30.c @@ -4,6 +4,7 @@ * Marcel Ziswiler */ +#include #include #include #include diff --git a/board/toradex/colibri-imx6ull/colibri-imx6ull.c b/board/toradex/colibri-imx6ull/colibri-imx6ull.c index 7bfe200d6e4..9b9fb342c9d 100644 --- a/board/toradex/colibri-imx6ull/colibri-imx6ull.c +++ b/board/toradex/colibri-imx6ull/colibri-imx6ull.c @@ -2,7 +2,7 @@ /* * Copyright (C) 2018-2019 Toradex AG */ -#include +#include #include #include #include diff --git a/board/toradex/colibri-imx8x/colibri-imx8x.c b/board/toradex/colibri-imx8x/colibri-imx8x.c index 2a71e7b92de..35657852595 100644 --- a/board/toradex/colibri-imx8x/colibri-imx8x.c +++ b/board/toradex/colibri-imx8x/colibri-imx8x.c @@ -3,6 +3,7 @@ * Copyright 2019 Toradex */ +#include #include #include #include diff --git a/board/toradex/colibri_imx6/colibri_imx6.c b/board/toradex/colibri_imx6/colibri_imx6.c index 34e82c2b078..ce19a9c7975 100644 --- a/board/toradex/colibri_imx6/colibri_imx6.c +++ b/board/toradex/colibri_imx6/colibri_imx6.c @@ -6,7 +6,7 @@ * copied from nitrogen6x */ -#include +#include #include #include #include diff --git a/board/toradex/colibri_imx6/do_fuse.c b/board/toradex/colibri_imx6/do_fuse.c index b404b01e032..6991b1bc136 100644 --- a/board/toradex/colibri_imx6/do_fuse.c +++ b/board/toradex/colibri_imx6/do_fuse.c @@ -7,6 +7,7 @@ * Helpers for i.MX OTP fusing during module production */ +#include #ifndef CONFIG_SPL_BUILD #include #include diff --git a/board/toradex/colibri_imx6/pf0100.c b/board/toradex/colibri_imx6/pf0100.c index 58b7bc3bb9a..8f08d8c7337 100644 --- a/board/toradex/colibri_imx6/pf0100.c +++ b/board/toradex/colibri_imx6/pf0100.c @@ -7,6 +7,7 @@ * Helpers for Freescale PMIC PF0100 */ +#include #include #include #include diff --git a/board/toradex/colibri_imx7/colibri_imx7.c b/board/toradex/colibri_imx7/colibri_imx7.c index e966ffbf781..c37c5e0af6d 100644 --- a/board/toradex/colibri_imx7/colibri_imx7.c +++ b/board/toradex/colibri_imx7/colibri_imx7.c @@ -3,6 +3,7 @@ * Copyright (C) 2016-2018 Toradex AG */ +#include #include #include #include diff --git a/board/toradex/colibri_t20/colibri_t20.c b/board/toradex/colibri_t20/colibri_t20.c index 6425fa881ea..97e33d00f0d 100644 --- a/board/toradex/colibri_t20/colibri_t20.c +++ b/board/toradex/colibri_t20/colibri_t20.c @@ -3,6 +3,7 @@ * Copyright (C) 2012 Lucas Stach */ +#include #include #include #include diff --git a/board/toradex/colibri_t30/colibri_t30-spl.c b/board/toradex/colibri_t30/colibri_t30-spl.c index 25049452495..6e544641833 100644 --- a/board/toradex/colibri_t30/colibri_t30-spl.c +++ b/board/toradex/colibri_t30/colibri_t30-spl.c @@ -7,6 +7,7 @@ * Svyatoslav Ryhel */ +#include #include #include diff --git a/board/toradex/colibri_t30/colibri_t30.c b/board/toradex/colibri_t30/colibri_t30.c index 342673ac506..0da247de98f 100644 --- a/board/toradex/colibri_t30/colibri_t30.c +++ b/board/toradex/colibri_t30/colibri_t30.c @@ -4,6 +4,7 @@ * Stefan Agner */ +#include #include #include #include diff --git a/board/toradex/colibri_vf/colibri_vf.c b/board/toradex/colibri_vf/colibri_vf.c index 87f82396d63..35920008805 100644 --- a/board/toradex/colibri_vf/colibri_vf.c +++ b/board/toradex/colibri_vf/colibri_vf.c @@ -6,6 +6,7 @@ * Copyright 2013 Freescale Semiconductor, Inc. */ +#include #include #include diff --git a/board/toradex/common/tdx-cfg-block.c b/board/toradex/common/tdx-cfg-block.c index 2225cefec16..dcf00d2b632 100644 --- a/board/toradex/common/tdx-cfg-block.c +++ b/board/toradex/common/tdx-cfg-block.c @@ -3,7 +3,7 @@ * Copyright (c) 2016-2020 Toradex */ -#include +#include #include #include "tdx-cfg-block.h" #include "tdx-eeprom.h" diff --git a/board/toradex/common/tdx-common.c b/board/toradex/common/tdx-common.c index a6b45cdab81..9f09788137d 100644 --- a/board/toradex/common/tdx-common.c +++ b/board/toradex/common/tdx-common.c @@ -4,7 +4,7 @@ */ #include -#include +#include #include #include #include diff --git a/board/toradex/verdin-imx8mm/spl.c b/board/toradex/verdin-imx8mm/spl.c index 1020078afea..afa3686083a 100644 --- a/board/toradex/verdin-imx8mm/spl.c +++ b/board/toradex/verdin-imx8mm/spl.c @@ -3,6 +3,7 @@ * Copyright 2020 Toradex */ +#include #include #include #include diff --git a/board/toradex/verdin-imx8mm/verdin-imx8mm.c b/board/toradex/verdin-imx8mm/verdin-imx8mm.c index 020ee677480..55c02653da6 100644 --- a/board/toradex/verdin-imx8mm/verdin-imx8mm.c +++ b/board/toradex/verdin-imx8mm/verdin-imx8mm.c @@ -3,7 +3,7 @@ * Copyright 2020-2021 Toradex */ -#include +#include #include #include #include diff --git a/board/toradex/verdin-imx8mp/spl.c b/board/toradex/verdin-imx8mp/spl.c index 8628112a782..73729a42b45 100644 --- a/board/toradex/verdin-imx8mp/spl.c +++ b/board/toradex/verdin-imx8mp/spl.c @@ -3,6 +3,7 @@ * Copyright 2022 Toradex */ +#include #include #include #include diff --git a/board/toradex/verdin-imx8mp/verdin-imx8mp.c b/board/toradex/verdin-imx8mp/verdin-imx8mp.c index e57ec3b6896..e16a771e3ec 100644 --- a/board/toradex/verdin-imx8mp/verdin-imx8mp.c +++ b/board/toradex/verdin-imx8mp/verdin-imx8mp.c @@ -3,7 +3,7 @@ * Copyright 2022 Toradex */ -#include +#include #include #include #include diff --git a/board/tplink/wdr4300/wdr4300.c b/board/tplink/wdr4300/wdr4300.c index 3ae0dc4ecd7..f2de039b6b4 100644 --- a/board/tplink/wdr4300/wdr4300.c +++ b/board/tplink/wdr4300/wdr4300.c @@ -3,6 +3,7 @@ * Copyright (C) 2016 Marek Vasut */ +#include #include #include #include diff --git a/board/tq/tqma6/tqma6.c b/board/tq/tqma6/tqma6.c index 92142c10ae5..1c2228c77ad 100644 --- a/board/tq/tqma6/tqma6.c +++ b/board/tq/tqma6/tqma6.c @@ -21,6 +21,7 @@ #include #include #include +#include #include #include #include diff --git a/board/tq/tqma6/tqma6_mba6.c b/board/tq/tqma6/tqma6_mba6.c index 877539e359e..52851dd5b55 100644 --- a/board/tq/tqma6/tqma6_mba6.c +++ b/board/tq/tqma6/tqma6_mba6.c @@ -20,6 +20,7 @@ #include #include +#include #include #include #include diff --git a/board/tq/tqma6/tqma6_wru4.c b/board/tq/tqma6/tqma6_wru4.c index 21c710188e0..5d239913fc5 100644 --- a/board/tq/tqma6/tqma6_wru4.c +++ b/board/tq/tqma6/tqma6_wru4.c @@ -23,6 +23,7 @@ #include #include +#include #include #include #include diff --git a/board/traverse/common/ten64_controller.c b/board/traverse/common/ten64_controller.c index 63b72c4df7b..d6ef8a8d0df 100644 --- a/board/traverse/common/ten64_controller.c +++ b/board/traverse/common/ten64_controller.c @@ -5,6 +5,7 @@ * */ +#include #include #include #include diff --git a/board/traverse/ten64/eth_ten64.c b/board/traverse/ten64/eth_ten64.c index c5f7acecc14..3f96e572b75 100644 --- a/board/traverse/ten64/eth_ten64.c +++ b/board/traverse/ten64/eth_ten64.c @@ -3,6 +3,7 @@ * Copyright 2017 NXP * Copyright 2019-2021 Traverse Technologies Australia */ +#include #include #include #include diff --git a/board/traverse/ten64/ten64.c b/board/traverse/ten64/ten64.c index d41bd2e9dee..6ff5312d6d7 100644 --- a/board/traverse/ten64/ten64.c +++ b/board/traverse/ten64/ten64.c @@ -4,7 +4,7 @@ * Copyright 2017-2018 NXP * Copyright 2019-2021 Traverse Technologies */ -#include +#include #include #include #include diff --git a/board/udoo/neo/neo.c b/board/udoo/neo/neo.c index b435b721e53..d99d93b44ae 100644 --- a/board/udoo/neo/neo.c +++ b/board/udoo/neo/neo.c @@ -29,6 +29,7 @@ #include #include #include +#include #include #include #include diff --git a/board/udoo/udoo_spl.c b/board/udoo/udoo_spl.c index 6c477530055..647380e1db6 100644 --- a/board/udoo/udoo_spl.c +++ b/board/udoo/udoo_spl.c @@ -6,6 +6,7 @@ * Based on board/wandboard/spl.c */ +#include #include #include #include diff --git a/board/variscite/dart_6ul/spl.c b/board/variscite/dart_6ul/spl.c index 6d17563d32c..1dff69c8277 100644 --- a/board/variscite/dart_6ul/spl.c +++ b/board/variscite/dart_6ul/spl.c @@ -4,7 +4,7 @@ * Copyright (C) 2019 Parthiban Nallathambi */ -#include +#include #include #include #include diff --git a/board/variscite/imx8mn_var_som/imx8mn_var_som.c b/board/variscite/imx8mn_var_som/imx8mn_var_som.c index 532d8d60a76..994fd4f7058 100644 --- a/board/variscite/imx8mn_var_som/imx8mn_var_som.c +++ b/board/variscite/imx8mn_var_som/imx8mn_var_som.c @@ -5,6 +5,7 @@ * Copyright 2023 DimOnOff Inc. */ +#include #include #include #include diff --git a/board/vscom/baltos/board.c b/board/vscom/baltos/board.c index 2c91e9fac43..bc7dc5888f2 100644 --- a/board/vscom/baltos/board.c +++ b/board/vscom/baltos/board.c @@ -7,7 +7,7 @@ * Copyright (C) 2011, Texas Instruments, Incorporated - https://www.ti.com/ */ -#include +#include #include #include #include diff --git a/board/vscom/baltos/mux.c b/board/vscom/baltos/mux.c index 77b142f08f0..7b99cf0e182 100644 --- a/board/vscom/baltos/mux.c +++ b/board/vscom/baltos/mux.c @@ -13,6 +13,7 @@ * GNU General Public License for more details. */ +#include #include #include #include diff --git a/board/wandboard/spl.c b/board/wandboard/spl.c index 9ce2785a4f0..717e02a039b 100644 --- a/board/wandboard/spl.c +++ b/board/wandboard/spl.c @@ -5,7 +5,7 @@ * Richard Hu */ -#include +#include #include #include #include diff --git a/board/wandboard/wandboard.c b/board/wandboard/wandboard.c index a48ef33ffde..8be62c86695 100644 --- a/board/wandboard/wandboard.c +++ b/board/wandboard/wandboard.c @@ -6,6 +6,7 @@ * Author: Fabio Estevam */ +#include #include #include #include diff --git a/board/warp7/warp7.c b/board/warp7/warp7.c index 4cd3ff0051b..ead52d5a490 100644 --- a/board/warp7/warp7.c +++ b/board/warp7/warp7.c @@ -15,6 +15,7 @@ #include #include #include +#include #include #include #include diff --git a/board/work-microwave/work_92105/work_92105.c b/board/work-microwave/work_92105/work_92105.c index 9a236880e3c..c8e791a4da8 100644 --- a/board/work-microwave/work_92105/work_92105.c +++ b/board/work-microwave/work_92105/work_92105.c @@ -6,7 +6,7 @@ * Written-by: Albert ARIBAUD */ -#include +#include #include #include #include diff --git a/board/work-microwave/work_92105/work_92105_display.c b/board/work-microwave/work_92105/work_92105_display.c index d4ab2299895..64dd5d4072a 100644 --- a/board/work-microwave/work_92105/work_92105_display.c +++ b/board/work-microwave/work_92105/work_92105_display.c @@ -10,6 +10,7 @@ * MAX518 I2C DACs and native LPC32xx GPO 15. */ +#include #include #include #include diff --git a/board/work-microwave/work_92105/work_92105_spl.c b/board/work-microwave/work_92105/work_92105_spl.c index 3f91221ce8b..d9401145f27 100644 --- a/board/work-microwave/work_92105/work_92105_spl.c +++ b/board/work-microwave/work_92105/work_92105_spl.c @@ -6,6 +6,7 @@ * Written-by: Albert ARIBAUD */ +#include #include #include #include diff --git a/board/xen/xenguest_arm64/xenguest_arm64.c b/board/xen/xenguest_arm64/xenguest_arm64.c index 4c3b9c9e278..1d2946f4fde 100644 --- a/board/xen/xenguest_arm64/xenguest_arm64.c +++ b/board/xen/xenguest_arm64/xenguest_arm64.c @@ -7,6 +7,7 @@ * (C) 2020 EPAM Systems Inc */ +#include #include #include #include diff --git a/board/xilinx/common/board.c b/board/xilinx/common/board.c index 30a81376ac4..b47d2d23f91 100644 --- a/board/xilinx/common/board.c +++ b/board/xilinx/common/board.c @@ -6,6 +6,7 @@ * Michal Simek */ +#include #include #include #include diff --git a/board/xilinx/common/cpu-info.c b/board/xilinx/common/cpu-info.c index 765bb24d937..bfe7f5b7e38 100644 --- a/board/xilinx/common/cpu-info.c +++ b/board/xilinx/common/cpu-info.c @@ -4,6 +4,7 @@ * Michal Simek */ +#include #include #include diff --git a/board/xilinx/common/fru.c b/board/xilinx/common/fru.c index 8cf307e33f2..12b21317496 100644 --- a/board/xilinx/common/fru.c +++ b/board/xilinx/common/fru.c @@ -3,6 +3,7 @@ * (C) Copyright 2019 - 2020 Xilinx, Inc. */ +#include #include #include #include diff --git a/board/xilinx/common/fru_ops.c b/board/xilinx/common/fru_ops.c index 610293bccf7..167252c240c 100644 --- a/board/xilinx/common/fru_ops.c +++ b/board/xilinx/common/fru_ops.c @@ -4,13 +4,13 @@ * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc. */ +#include #include #include #include #include #include #include -#include #include #include diff --git a/board/xilinx/versal-net/board.c b/board/xilinx/versal-net/board.c index 88e10fa7a7f..da03024e162 100644 --- a/board/xilinx/versal-net/board.c +++ b/board/xilinx/versal-net/board.c @@ -6,6 +6,7 @@ * Michal Simek */ +#include #include #include #include diff --git a/board/xilinx/versal-net/cmds.c b/board/xilinx/versal-net/cmds.c index 4d52084846b..b18a71fe52c 100644 --- a/board/xilinx/versal-net/cmds.c +++ b/board/xilinx/versal-net/cmds.c @@ -7,10 +7,10 @@ #include #include +#include #include #include #include -#include #include /** diff --git a/board/xilinx/versal/board.c b/board/xilinx/versal/board.c index 77ba783501e..4f6d56119db 100644 --- a/board/xilinx/versal/board.c +++ b/board/xilinx/versal/board.c @@ -5,6 +5,7 @@ */ #include +#include #include #include #include diff --git a/board/xilinx/versal/cmds.c b/board/xilinx/versal/cmds.c index c78793573e8..2a74e49aede 100644 --- a/board/xilinx/versal/cmds.c +++ b/board/xilinx/versal/cmds.c @@ -6,10 +6,10 @@ #include #include +#include #include #include #include -#include #include static int do_versal_load_pdi(struct cmd_tbl *cmdtp, int flag, int argc, diff --git a/board/xilinx/zynq/board.c b/board/xilinx/zynq/board.c index b9a91110ff7..6c365910011 100644 --- a/board/xilinx/zynq/board.c +++ b/board/xilinx/zynq/board.c @@ -4,7 +4,7 @@ * (C) Copyright 2013 - 2018 Xilinx, Inc. */ -#include +#include #include #include #include diff --git a/board/xilinx/zynq/bootimg.c b/board/xilinx/zynq/bootimg.c index 79bec3a4cfb..2f55078dd76 100644 --- a/board/xilinx/zynq/bootimg.c +++ b/board/xilinx/zynq/bootimg.c @@ -3,6 +3,7 @@ * Copyright (C) 2018 Xilinx, Inc. */ +#include #include #include #include diff --git a/board/xilinx/zynq/cmds.c b/board/xilinx/zynq/cmds.c index 05ecb75406b..d7c7b2f2295 100644 --- a/board/xilinx/zynq/cmds.c +++ b/board/xilinx/zynq/cmds.c @@ -3,6 +3,7 @@ * Copyright (C) 2018 Xilinx, Inc. */ +#include #include #include #include diff --git a/board/xilinx/zynqmp/cmds.c b/board/xilinx/zynqmp/cmds.c index bf39c5472ea..9524688f27d 100644 --- a/board/xilinx/zynqmp/cmds.c +++ b/board/xilinx/zynqmp/cmds.c @@ -4,14 +4,13 @@ * Siva Durga Prasad Paladugu > */ +#include #include #include #include #include #include -#include #include -#include #include #include #include diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c index c4050af2a5a..f370fb7347a 100644 --- a/board/xilinx/zynqmp/zynqmp.c +++ b/board/xilinx/zynqmp/zynqmp.c @@ -4,7 +4,7 @@ * Michal Simek */ -#include +#include #include #include #include diff --git a/board/xilinx/zynqmp_r5/board.c b/board/xilinx/zynqmp_r5/board.c index 0c62b0013c4..5c5a2e93863 100644 --- a/board/xilinx/zynqmp_r5/board.c +++ b/board/xilinx/zynqmp_r5/board.c @@ -3,9 +3,9 @@ * (C) Copyright 2018 Xilinx, Inc. (Michal Simek) */ +#include #include #include -#include int board_init(void) { diff --git a/board/zyxel/nsa310s/nsa310s.c b/board/zyxel/nsa310s/nsa310s.c index d018b573824..b3ea6608914 100644 --- a/board/zyxel/nsa310s/nsa310s.c +++ b/board/zyxel/nsa310s/nsa310s.c @@ -4,6 +4,7 @@ * Copyright (C) 2015 Gerald Kerma */ +#include #include #include #include diff --git a/board/zyxel/nsa325/nsa325.c b/board/zyxel/nsa325/nsa325.c index 38340b33c8b..f5f63ee5d3b 100644 --- a/board/zyxel/nsa325/nsa325.c +++ b/board/zyxel/nsa325/nsa325.c @@ -14,6 +14,7 @@ * Marvell Semiconductor */ +#include #include #include #include diff --git a/boot/android_ab.c b/boot/android_ab.c index 143f373aae9..1e5aa81b750 100644 --- a/boot/android_ab.c +++ b/boot/android_ab.c @@ -2,6 +2,7 @@ /* * Copyright (C) 2017 The Android Open Source Project */ +#include #include #include #include diff --git a/boot/boot_fit.c b/boot/boot_fit.c index 4dcaf95c6ae..9d394126563 100644 --- a/boot/boot_fit.c +++ b/boot/boot_fit.c @@ -7,6 +7,7 @@ */ #include +#include #include #include #include diff --git a/boot/bootdev-uclass.c b/boot/bootdev-uclass.c index 7c7bba088c9..46815ea2fdb 100644 --- a/boot/bootdev-uclass.c +++ b/boot/bootdev-uclass.c @@ -6,6 +6,7 @@ #define LOG_CATEGORY UCLASS_BOOTSTD +#include #include #include #include diff --git a/boot/bootflow.c b/boot/bootflow.c index 9aa3179c388..68bf99329ab 100644 --- a/boot/bootflow.c +++ b/boot/bootflow.c @@ -6,6 +6,7 @@ #define LOG_CATEGORY UCLASS_BOOTSTD +#include #include #include #include diff --git a/boot/bootflow_menu.c b/boot/bootflow_menu.c index 143ef841332..16f9cd8f8ca 100644 --- a/boot/bootflow_menu.c +++ b/boot/bootflow_menu.c @@ -8,6 +8,7 @@ #define LOG_CATEGORY UCLASS_BOOTSTD +#include #include #include #include diff --git a/boot/bootm.c b/boot/bootm.c index 6fa8edab021..032f5a4a160 100644 --- a/boot/bootm.c +++ b/boot/bootm.c @@ -5,6 +5,7 @@ */ #ifndef USE_HOSTCC +#include #include #include #include diff --git a/boot/bootm_os.c b/boot/bootm_os.c index 15297ddb530..ccde72d22c1 100644 --- a/boot/bootm_os.c +++ b/boot/bootm_os.c @@ -4,6 +4,7 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ +#include #include #include #include diff --git a/boot/bootmeth-uclass.c b/boot/bootmeth-uclass.c index c0abadef97c..1d157d54dbd 100644 --- a/boot/bootmeth-uclass.c +++ b/boot/bootmeth-uclass.c @@ -6,6 +6,7 @@ #define LOG_CATEGORY UCLASS_BOOTSTD +#include #include #include #include diff --git a/boot/bootmeth_cros.c b/boot/bootmeth_cros.c index 645b8bed102..f015f2e1c75 100644 --- a/boot/bootmeth_cros.c +++ b/boot/bootmeth_cros.c @@ -8,6 +8,7 @@ #define LOG_CATEGORY UCLASS_BOOTSTD +#include #include #include #include diff --git a/boot/bootmeth_efi.c b/boot/bootmeth_efi.c index c7035c0d0c4..aebc5207fc0 100644 --- a/boot/bootmeth_efi.c +++ b/boot/bootmeth_efi.c @@ -8,6 +8,7 @@ #define LOG_CATEGORY UCLASS_BOOTSTD +#include #include #include #include diff --git a/boot/bootmeth_efi_mgr.c b/boot/bootmeth_efi_mgr.c index 23ae1e610ac..b7d429f2c3d 100644 --- a/boot/bootmeth_efi_mgr.c +++ b/boot/bootmeth_efi_mgr.c @@ -8,6 +8,7 @@ #define LOG_CATEGORY UCLASS_BOOTSTD +#include #include #include #include diff --git a/boot/bootmeth_extlinux.c b/boot/bootmeth_extlinux.c index 9b55686948f..ae0ad1d53e3 100644 --- a/boot/bootmeth_extlinux.c +++ b/boot/bootmeth_extlinux.c @@ -8,6 +8,7 @@ #define LOG_CATEGORY UCLASS_BOOTSTD +#include #include #include #include diff --git a/boot/bootmeth_pxe.c b/boot/bootmeth_pxe.c index 03d2589c264..70f693aa239 100644 --- a/boot/bootmeth_pxe.c +++ b/boot/bootmeth_pxe.c @@ -8,6 +8,7 @@ #define LOG_CATEGORY UCLASS_BOOTSTD +#include #include #include #include diff --git a/boot/bootmeth_qfw.c b/boot/bootmeth_qfw.c index dfaa944594e..8ebbc3ebcd5 100644 --- a/boot/bootmeth_qfw.c +++ b/boot/bootmeth_qfw.c @@ -8,6 +8,7 @@ #define LOG_CATEGORY UCLASS_BOOTSTD +#include #include #include #include diff --git a/boot/bootmeth_sandbox.c b/boot/bootmeth_sandbox.c index 0bc8f688e30..aabc57e635a 100644 --- a/boot/bootmeth_sandbox.c +++ b/boot/bootmeth_sandbox.c @@ -8,6 +8,7 @@ #define LOG_CATEGORY UCLASS_BOOTSTD +#include #include #include #include diff --git a/boot/bootmeth_script.c b/boot/bootmeth_script.c index 0e05d28d4d9..06340e43d2d 100644 --- a/boot/bootmeth_script.c +++ b/boot/bootmeth_script.c @@ -8,6 +8,7 @@ #define LOG_CATEGORY UCLASS_BOOTSTD +#include #include #include #include diff --git a/boot/bootretry.c b/boot/bootretry.c index 587b2de7d6b..8d850df9d48 100644 --- a/boot/bootretry.c +++ b/boot/bootretry.c @@ -4,13 +4,12 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ -#include +#include #include #include #include #include #include -#include #include static uint64_t endtime; /* must be set, default is instant timeout */ diff --git a/boot/bootstd-uclass.c b/boot/bootstd-uclass.c index 5de8efce19a..81555d341e3 100644 --- a/boot/bootstd-uclass.c +++ b/boot/bootstd-uclass.c @@ -6,6 +6,7 @@ * Written by Simon Glass */ +#include #include #include #include diff --git a/boot/cedit.c b/boot/cedit.c index c29a2be14ce..8c654dba6dc 100644 --- a/boot/cedit.c +++ b/boot/cedit.c @@ -8,6 +8,7 @@ #define LOG_CATEGORY LOGC_EXPO +#include #include #include #include diff --git a/boot/common_fit.c b/boot/common_fit.c index a2f9b8d83c3..cde2dc45e90 100644 --- a/boot/common_fit.c +++ b/boot/common_fit.c @@ -4,6 +4,7 @@ * Written by Simon Glass */ +#include #include #include #include diff --git a/boot/expo.c b/boot/expo.c index ed01483f1d3..cadb6a0ad6e 100644 --- a/boot/expo.c +++ b/boot/expo.c @@ -8,6 +8,7 @@ #define LOG_CATEGORY LOGC_EXPO +#include #include #include #include diff --git a/boot/expo_build.c b/boot/expo_build.c index a4df798adeb..04d88a2c308 100644 --- a/boot/expo_build.c +++ b/boot/expo_build.c @@ -8,6 +8,7 @@ #define LOG_CATEGORY LOGC_EXPO +#include #include #include #include diff --git a/boot/fdt_simplefb.c b/boot/fdt_simplefb.c index 53415548459..837920bd3a3 100644 --- a/boot/fdt_simplefb.c +++ b/boot/fdt_simplefb.c @@ -6,6 +6,7 @@ * Stephen Warren */ +#include #include #include #include diff --git a/boot/fdt_support.c b/boot/fdt_support.c index 874ca4d6f5a..2bd80a9dfb1 100644 --- a/boot/fdt_support.c +++ b/boot/fdt_support.c @@ -6,6 +6,7 @@ * Copyright 2010-2011 Freescale Semiconductor, Inc. */ +#include #include #include #include diff --git a/boot/image-android-dt.c b/boot/image-android-dt.c index 3b25018c2e7..fb014190d44 100644 --- a/boot/image-android-dt.c +++ b/boot/image-android-dt.c @@ -6,6 +6,7 @@ #include #include +#include #include #include diff --git a/boot/image-android.c b/boot/image-android.c index ddd8ffd5e54..88e40bc7ec6 100644 --- a/boot/image-android.c +++ b/boot/image-android.c @@ -3,6 +3,7 @@ * Copyright (c) 2011 Sebastian Andrzej Siewior */ +#include #include #include #include diff --git a/boot/image-board.c b/boot/image-board.c index b7884b8c5dc..09b6e4e0bdc 100644 --- a/boot/image-board.c +++ b/boot/image-board.c @@ -8,7 +8,7 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ -#include +#include #include #include #include diff --git a/boot/image-cipher.c b/boot/image-cipher.c index 9d389f26cea..b9061489396 100644 --- a/boot/image-cipher.c +++ b/boot/image-cipher.c @@ -7,6 +7,7 @@ #include "mkimage.h" #include #else +#include #include #include DECLARE_GLOBAL_DATA_PTR; diff --git a/boot/image-fdt.c b/boot/image-fdt.c index 56dd7687f51..f09716cba30 100644 --- a/boot/image-fdt.c +++ b/boot/image-fdt.c @@ -8,6 +8,7 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ +#include #include #include #include diff --git a/boot/image-fit-sig.c b/boot/image-fit-sig.c index fe328df4a85..12369896fe3 100644 --- a/boot/image-fit-sig.c +++ b/boot/image-fit-sig.c @@ -7,6 +7,7 @@ #include "mkimage.h" #include #else +#include #include #include #include diff --git a/boot/image-fit.c b/boot/image-fit.c index fb03cab831b..89e377563ce 100644 --- a/boot/image-fit.c +++ b/boot/image-fit.c @@ -19,6 +19,7 @@ #else #include #include +#include #include #include #include diff --git a/boot/image-pre-load.c b/boot/image-pre-load.c index cc19017404c..b504ab42a54 100644 --- a/boot/image-pre-load.c +++ b/boot/image-pre-load.c @@ -3,6 +3,7 @@ * Copyright (C) 2021 Philippe Reynes */ +#include #include DECLARE_GLOBAL_DATA_PTR; #include diff --git a/boot/image-sig.c b/boot/image-sig.c index 6bc74866eae..0421a61b040 100644 --- a/boot/image-sig.c +++ b/boot/image-sig.c @@ -3,6 +3,7 @@ * Copyright (c) 2013, Google Inc. */ +#include #include #include #include diff --git a/boot/image.c b/boot/image.c index eb12e4be04a..073931cd7a3 100644 --- a/boot/image.c +++ b/boot/image.c @@ -7,6 +7,7 @@ */ #ifndef USE_HOSTCC +#include #include #include #include diff --git a/boot/pxe_utils.c b/boot/pxe_utils.c index 4b22bb6f525..5c1c962ff4c 100644 --- a/boot/pxe_utils.c +++ b/boot/pxe_utils.c @@ -4,6 +4,7 @@ * Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved. */ +#include #include #include #include diff --git a/boot/scene.c b/boot/scene.c index ac976aa26bb..d4dfb49ada1 100644 --- a/boot/scene.c +++ b/boot/scene.c @@ -8,6 +8,7 @@ #define LOG_CATEGORY LOGC_EXPO +#include #include #include #include diff --git a/boot/scene_menu.c b/boot/scene_menu.c index 80bd7457cb1..63994165efb 100644 --- a/boot/scene_menu.c +++ b/boot/scene_menu.c @@ -8,6 +8,7 @@ #define LOG_CATEGORY LOGC_EXPO +#include #include #include #include diff --git a/boot/scene_textline.c b/boot/scene_textline.c index bba8663b98d..6ea072a1c26 100644 --- a/boot/scene_textline.c +++ b/boot/scene_textline.c @@ -8,12 +8,10 @@ #define LOG_CATEGORY LOGC_EXPO +#include #include #include -#include #include -#include -#include #include "scene_internal.h" int scene_textline(struct scene *scn, const char *name, uint id, uint max_chars, diff --git a/boot/vbe.c b/boot/vbe.c index 00673de7ee2..52b32830037 100644 --- a/boot/vbe.c +++ b/boot/vbe.c @@ -6,6 +6,7 @@ * Written by Simon Glass */ +#include #include #include #include diff --git a/boot/vbe_request.c b/boot/vbe_request.c index a1350c1a706..0293ac6c869 100644 --- a/boot/vbe_request.c +++ b/boot/vbe_request.c @@ -8,6 +8,7 @@ #define LOG_CATEGORY LOGC_BOOT +#include #include #include #include diff --git a/boot/vbe_simple.c b/boot/vbe_simple.c index 189e86d2a22..12682abd399 100644 --- a/boot/vbe_simple.c +++ b/boot/vbe_simple.c @@ -8,6 +8,7 @@ #define LOG_CATEGORY LOGC_BOOT +#include #include #include #include diff --git a/boot/vbe_simple_fw.c b/boot/vbe_simple_fw.c index 4d6da9490a7..d59a704ddba 100644 --- a/boot/vbe_simple_fw.c +++ b/boot/vbe_simple_fw.c @@ -8,6 +8,7 @@ #define LOG_CATEGORY LOGC_BOOT +#include #include #include #include diff --git a/boot/vbe_simple_os.c b/boot/vbe_simple_os.c index b4126d8d2d0..84626cdeaf2 100644 --- a/boot/vbe_simple_os.c +++ b/boot/vbe_simple_os.c @@ -8,6 +8,7 @@ #define LOG_CATEGORY LOGC_BOOT +#include #include #include #include diff --git a/cmd/2048.c b/cmd/2048.c index 42cd171b0e4..fa60aa94aad 100644 --- a/cmd/2048.c +++ b/cmd/2048.c @@ -3,10 +3,10 @@ /* Console version of the game "2048" for GNU/Linux */ +#include #include #include #include -#include #include #define SIZE 4 diff --git a/cmd/Kconfig b/cmd/Kconfig index c06fec35275..b026439c773 100644 --- a/cmd/Kconfig +++ b/cmd/Kconfig @@ -539,7 +539,6 @@ config CMD_IMI config CMD_IMLS bool "imls" - depends on MTD_NOR_FLASH || FLASH_CFI_DRIVER help List all images found in flash @@ -832,7 +831,7 @@ config SYS_EEPROM_SIZE config SYS_EEPROM_PAGE_WRITE_BITS int "Number of bits used to address bytes in a single page" - depends on CMD_EEPROM || ENV_IS_IN_EEPROM + depends on CMD_EEPROM default 8 help The EEPROM page size is 2^SYS_EEPROM_PAGE_WRITE_BITS. @@ -1024,8 +1023,8 @@ config CMD_ARMFFA - Displaying the arm_ffa device info config CMD_ARMFLASH + #depends on FLASH_CFI_DRIVER bool "armflash" - depends on FLASH_CFI_DRIVER help ARM Ltd reference designs flash partition access @@ -1168,7 +1167,6 @@ config CMD_FPGA_LOAD_SECURE config CMD_FPGAD bool "fpgad - dump FPGA registers" - depends on GDSYS_LEGACY_DRIVERS help (legacy, needs conversion to driver model) Provides a way to dump FPGA registers by calling the board-specific @@ -1604,7 +1602,6 @@ config CMD_TEMPERATURE config CMD_TSI148 bool "tsi148 - Command to access tsi148 device" - depends on DM_PCI_COMPAT help This provides various sub-commands to initialise and configure the Turndra tsi148 device. See the command help for full details. @@ -1618,7 +1615,6 @@ config CMD_UFS config CMD_UNIVERSE bool "universe - Command to set up the Turndra Universe controller" - depends on DM_PCI_COMPAT help This allows setting up the VMEbus provided by this controller. See the command help for full details. diff --git a/cmd/ab_select.c b/cmd/ab_select.c index faeb83816e5..bfb67b8236b 100644 --- a/cmd/ab_select.c +++ b/cmd/ab_select.c @@ -3,6 +3,7 @@ * Copyright (C) 2017 The Android Open Source Project */ +#include #include #include #include diff --git a/cmd/abootimg.c b/cmd/abootimg.c index 88c77d99929..2653b555b10 100644 --- a/cmd/abootimg.c +++ b/cmd/abootimg.c @@ -5,6 +5,7 @@ */ #include +#include #include #include #include diff --git a/cmd/acpi.c b/cmd/acpi.c index 094d9d4e858..928e5dc525e 100644 --- a/cmd/acpi.c +++ b/cmd/acpi.c @@ -3,6 +3,7 @@ * Copyright 2019 Google LLC * Written by Simon Glass */ +#include #include #include #include @@ -10,7 +11,6 @@ #include #include #include -#include #include DECLARE_GLOBAL_DATA_PTR; diff --git a/cmd/adc.c b/cmd/adc.c index f87f9785a11..4cb18b66d4a 100644 --- a/cmd/adc.c +++ b/cmd/adc.c @@ -3,6 +3,7 @@ * Copyright (C) 2018 BayLibre, SAS * Author: Neil Armstrong */ +#include #include #include #include diff --git a/cmd/addrmap.c b/cmd/addrmap.c index f7e4d9206de..bd23549f3a5 100644 --- a/cmd/addrmap.c +++ b/cmd/addrmap.c @@ -3,6 +3,7 @@ * Copyright (C) 2021, Bin Meng */ +#include #include #include diff --git a/cmd/adtimg.c b/cmd/adtimg.c index 53f33764fbe..f4b5cbf35b9 100644 --- a/cmd/adtimg.c +++ b/cmd/adtimg.c @@ -7,8 +7,8 @@ #include #include -#include #include +#include #define OPT_INDEX "--index" diff --git a/cmd/aes.c b/cmd/aes.c index 87ad1ab82b9..1264675aa01 100644 --- a/cmd/aes.c +++ b/cmd/aes.c @@ -5,13 +5,13 @@ * Command for en/de-crypting block of memory with AES-[128/192/256]-CBC cipher. */ +#include #include #include #include #include #include #include -#include u32 aes_get_key_len(char *command) { diff --git a/cmd/arm/exception64.c b/cmd/arm/exception64.c index 73d6c20ccac..589a23115b0 100644 --- a/cmd/arm/exception64.c +++ b/cmd/arm/exception64.c @@ -5,6 +5,7 @@ * Copyright (c) 2018, Heinrich Schuchardt */ +#include #include #include diff --git a/cmd/armffa.c b/cmd/armffa.c index 181e31bc49a..9585150b962 100644 --- a/cmd/armffa.c +++ b/cmd/armffa.c @@ -5,6 +5,7 @@ * Authors: * Abdellatif El Khlifi */ +#include #include #include #include diff --git a/cmd/armflash.c b/cmd/armflash.c index e292cf85c45..fdaea5ad811 100644 --- a/cmd/armflash.c +++ b/cmd/armflash.c @@ -5,10 +5,10 @@ * * Support for ARM Flash Partitions */ +#include #include #include #include -#include #include #define MAX_REGIONS 4 diff --git a/cmd/axi.c b/cmd/axi.c index 3dbea0499de..5620891db28 100644 --- a/cmd/axi.c +++ b/cmd/axi.c @@ -9,6 +9,7 @@ * SPDX-License-Identifier: GPL-2.0+ */ +#include #include #include #include diff --git a/cmd/bcb.c b/cmd/bcb.c index fe6d6cb2c38..f3b92564d10 100644 --- a/cmd/bcb.c +++ b/cmd/bcb.c @@ -8,12 +8,12 @@ #include #include #include +#include #include #include #include #include #include -#include #include enum bcb_cmd { diff --git a/cmd/bdinfo.c b/cmd/bdinfo.c index 437ac4e8630..79106caeec2 100644 --- a/cmd/bdinfo.c +++ b/cmd/bdinfo.c @@ -6,6 +6,7 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ +#include #include #include #include diff --git a/cmd/bind.c b/cmd/bind.c index 3a59eefd5c5..be0d4d2a711 100644 --- a/cmd/bind.c +++ b/cmd/bind.c @@ -3,6 +3,7 @@ * Copyright (c) 2018 JJ Hiblot */ +#include #include #include #include diff --git a/cmd/binop.c b/cmd/binop.c index 10d91b5dbf2..592e9146901 100644 --- a/cmd/binop.c +++ b/cmd/binop.c @@ -1,11 +1,11 @@ // SPDX-License-Identifier: GPL-2.0+ +#include #include #include #include #include #include -#include #include enum { diff --git a/cmd/blk_common.c b/cmd/blk_common.c index 4c05a4e0610..02ac92837b6 100644 --- a/cmd/blk_common.c +++ b/cmd/blk_common.c @@ -8,10 +8,10 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ +#include #include #include #include -#include int blk_common_cmd(int argc, char *const argv[], enum uclass_id uclass_id, int *cur_devnump) diff --git a/cmd/blkcache.c b/cmd/blkcache.c index dbd03df14dc..1456654df6f 100644 --- a/cmd/blkcache.c +++ b/cmd/blkcache.c @@ -6,9 +6,9 @@ */ #include #include +#include #include #include -#include static int blkc_show(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) diff --git a/cmd/blkmap.c b/cmd/blkmap.c index 164f80f1387..ef74ebc0036 100644 --- a/cmd/blkmap.c +++ b/cmd/blkmap.c @@ -6,6 +6,7 @@ #include #include +#include #include #include #include diff --git a/cmd/blob.c b/cmd/blob.c index a3c1dc49224..7c77c410d52 100644 --- a/cmd/blob.c +++ b/cmd/blob.c @@ -4,9 +4,9 @@ * Command for encapsulating/decapsulating blob of memory. */ +#include #include #include -#include #include #include #if defined(CONFIG_ARCH_MX6) || defined(CONFIG_ARCH_MX7) || \ diff --git a/cmd/bloblist.c b/cmd/bloblist.c index 333ae558142..26548ecf847 100644 --- a/cmd/bloblist.c +++ b/cmd/bloblist.c @@ -6,6 +6,7 @@ * Written by Simon Glass */ +#include #include #include #include diff --git a/cmd/bmp.c b/cmd/bmp.c index 3b618448624..8f43a40dafd 100644 --- a/cmd/bmp.c +++ b/cmd/bmp.c @@ -8,6 +8,7 @@ * BMP handling routines */ +#include #include #include #include diff --git a/cmd/boot.c b/cmd/boot.c index 23496cafdf5..14839c1cedc 100644 --- a/cmd/boot.c +++ b/cmd/boot.c @@ -7,9 +7,9 @@ /* * Misc boot support */ +#include #include #include -#include #ifdef CONFIG_CMD_GO diff --git a/cmd/bootcount.c b/cmd/bootcount.c index 5e3b66e676b..30ce5dba30d 100644 --- a/cmd/bootcount.c +++ b/cmd/bootcount.c @@ -1,5 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ +#include #include #include diff --git a/cmd/bootdev.c b/cmd/bootdev.c index fa7285ba25e..471189cda48 100644 --- a/cmd/bootdev.c +++ b/cmd/bootdev.c @@ -6,6 +6,7 @@ * Written by Simon Glass */ +#include #include #include #include diff --git a/cmd/bootflow.c b/cmd/bootflow.c index 1588f277a4a..be5d7d8e743 100644 --- a/cmd/bootflow.c +++ b/cmd/bootflow.c @@ -6,6 +6,7 @@ * Written by Simon Glass */ +#include #include #include #include diff --git a/cmd/booti.c b/cmd/booti.c index 62b19e83436..b9637b3ec3d 100644 --- a/cmd/booti.c +++ b/cmd/booti.c @@ -4,6 +4,7 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ +#include #include #include #include diff --git a/cmd/bootm.c b/cmd/bootm.c index 545b0c3d823..9737a2d28c0 100644 --- a/cmd/bootm.c +++ b/cmd/bootm.c @@ -7,6 +7,7 @@ /* * Boot support */ +#include #include #include #include diff --git a/cmd/bootmenu.c b/cmd/bootmenu.c index 977a04b7d76..78184fccab2 100644 --- a/cmd/bootmenu.c +++ b/cmd/bootmenu.c @@ -5,6 +5,7 @@ #include #include +#include #include #include #include diff --git a/cmd/bootmeth.c b/cmd/bootmeth.c index ebf8b7e2530..f5b01343c48 100644 --- a/cmd/bootmeth.c +++ b/cmd/bootmeth.c @@ -6,6 +6,7 @@ * Written by Simon Glass */ +#include #include #include #include diff --git a/cmd/bootstage.c b/cmd/bootstage.c index 5246924f39a..77a4bc66ff4 100644 --- a/cmd/bootstage.c +++ b/cmd/bootstage.c @@ -3,9 +3,9 @@ * Copyright (c) 2012, Google Inc. All rights reserved. */ +#include #include #include -#include static int do_bootstage_report(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) diff --git a/cmd/bootz.c b/cmd/bootz.c index 55837a7599b..b6bb4aae72d 100644 --- a/cmd/bootz.c +++ b/cmd/bootz.c @@ -4,6 +4,7 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ +#include #include #include #include diff --git a/cmd/broadcom/chimp_boot.c b/cmd/broadcom/chimp_boot.c index ae0a81179d0..16f2b612c4d 100644 --- a/cmd/broadcom/chimp_boot.c +++ b/cmd/broadcom/chimp_boot.c @@ -3,6 +3,7 @@ * Copyright 2020 Broadcom */ +#include #include #include diff --git a/cmd/broadcom/chimp_handshake.c b/cmd/broadcom/chimp_handshake.c index e2742671963..a90a73a6d74 100644 --- a/cmd/broadcom/chimp_handshake.c +++ b/cmd/broadcom/chimp_handshake.c @@ -3,6 +3,7 @@ * Copyright 2020 Broadcom */ +#include #include #include diff --git a/cmd/broadcom/nitro_image_load.c b/cmd/broadcom/nitro_image_load.c index 289b184e9af..93b5cb4cebe 100644 --- a/cmd/broadcom/nitro_image_load.c +++ b/cmd/broadcom/nitro_image_load.c @@ -3,8 +3,8 @@ * Copyright 2020 Broadcom */ +#include #include -#include #define FW_IMAGE_SIG 0xff123456 #define CFG_IMAGE_SIG 0xcf54321a diff --git a/cmd/btrfs.c b/cmd/btrfs.c index 69d1b1f830d..2843835d08b 100644 --- a/cmd/btrfs.c +++ b/cmd/btrfs.c @@ -3,6 +3,7 @@ * 2017 by Marek Behún */ +#include #include #include #include diff --git a/cmd/button.c b/cmd/button.c index 3e6db3f5b8e..1b45d0a2a03 100644 --- a/cmd/button.c +++ b/cmd/button.c @@ -5,6 +5,7 @@ * Based on led.c */ +#include #include #include #include diff --git a/cmd/cache.c b/cmd/cache.c index 0254ff17f9b..b68d45b98bf 100644 --- a/cmd/cache.c +++ b/cmd/cache.c @@ -7,6 +7,7 @@ /* * Cache support: switch on or off, get status */ +#include #include #include #include diff --git a/cmd/cat.c b/cmd/cat.c index 6828b7b364e..18aa6ca7aa6 100644 --- a/cmd/cat.c +++ b/cmd/cat.c @@ -4,6 +4,7 @@ * Roger Knecht */ +#include #include #include #include diff --git a/cmd/cbfs.c b/cmd/cbfs.c index c1035461df1..3cfc9eb2727 100644 --- a/cmd/cbfs.c +++ b/cmd/cbfs.c @@ -6,10 +6,10 @@ /* * CBFS commands */ +#include #include #include #include -#include static int do_cbfs_init(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) diff --git a/cmd/cedit.c b/cmd/cedit.c index fec67a8e334..6352e6369d1 100644 --- a/cmd/cedit.c +++ b/cmd/cedit.c @@ -6,6 +6,7 @@ * Written by Simon Glass */ +#include #include #include #include diff --git a/cmd/clk.c b/cmd/clk.c index 6fda6efb1ce..7bbcbfeda33 100644 --- a/cmd/clk.c +++ b/cmd/clk.c @@ -2,6 +2,7 @@ /* * Copyright (C) 2013 Xilinx, Inc. */ +#include #include #include #if defined(CONFIG_DM) && defined(CONFIG_CLK) diff --git a/cmd/clone.c b/cmd/clone.c index 1f3cff1836d..a9062077571 100644 --- a/cmd/clone.c +++ b/cmd/clone.c @@ -4,11 +4,11 @@ * */ +#include #include #include #include #include -#include #include #define BUFSIZE (1 * 1024 * 1024) diff --git a/cmd/cls.c b/cmd/cls.c index 4bee8a18305..80d0558d467 100644 --- a/cmd/cls.c +++ b/cmd/cls.c @@ -5,6 +5,7 @@ * * cls - clear screen command */ +#include #include #include #include diff --git a/cmd/config.c b/cmd/config.c index f0d2033c61f..cf30841a359 100644 --- a/cmd/config.c +++ b/cmd/config.c @@ -3,6 +3,7 @@ * Copyright (C) 2017 Masahiro Yamada */ +#include #include #include #include diff --git a/cmd/conitrace.c b/cmd/conitrace.c index 6cc113328eb..9a1bc351848 100644 --- a/cmd/conitrace.c +++ b/cmd/conitrace.c @@ -5,6 +5,7 @@ * * Copyright (c) 2018, Heinrich Schuchardt */ +#include #include #include diff --git a/cmd/console.c b/cmd/console.c index 12fc92061a1..58c2cf1c894 100644 --- a/cmd/console.c +++ b/cmd/console.c @@ -7,6 +7,7 @@ /* * Boot support */ +#include #include #include #include diff --git a/cmd/cpu.c b/cmd/cpu.c index 9e323069b9e..245a82fa3eb 100644 --- a/cmd/cpu.c +++ b/cmd/cpu.c @@ -5,6 +5,7 @@ * Copyright (c) 2017 Álvaro Fernández Rojas */ +#include #include #include #include diff --git a/cmd/cramfs.c b/cmd/cramfs.c index b57e2815926..57e2afa2472 100644 --- a/cmd/cramfs.c +++ b/cmd/cramfs.c @@ -10,6 +10,7 @@ /* * CRAMFS support */ +#include #include #include #include diff --git a/cmd/cros_ec.c b/cmd/cros_ec.c index 7b60e415b6c..90921cecf60 100644 --- a/cmd/cros_ec.c +++ b/cmd/cros_ec.c @@ -6,6 +6,7 @@ * Copyright (c) 2016 National Instruments Corp */ +#include #include #include #include diff --git a/cmd/cyclic.c b/cmd/cyclic.c index 40e966de9aa..ad7fc3b975e 100644 --- a/cmd/cyclic.c +++ b/cmd/cyclic.c @@ -8,12 +8,11 @@ * Copyright (C) 2022 Stefan Roese */ +#include #include #include #include #include -#include -#include #include struct cyclic_demo_info { diff --git a/cmd/date.c b/cmd/date.c index 755adec1e71..4f98b470ca2 100644 --- a/cmd/date.c +++ b/cmd/date.c @@ -7,6 +7,7 @@ /* * RTC, Date & Time support: get and set date & time */ +#include #include #include #include diff --git a/cmd/demo.c b/cmd/demo.c index 5c422ac165b..ebd5a241c36 100644 --- a/cmd/demo.c +++ b/cmd/demo.c @@ -6,6 +6,7 @@ * Pavel Herrmann */ +#include #include #include #include diff --git a/cmd/dfu.c b/cmd/dfu.c index 46f0190588e..d7bfb535dc6 100644 --- a/cmd/dfu.c +++ b/cmd/dfu.c @@ -10,6 +10,7 @@ * Lukasz Majewski */ +#include #include #include #include diff --git a/cmd/diag.c b/cmd/diag.c index c6da5aae3fc..f51536dbfaa 100644 --- a/cmd/diag.c +++ b/cmd/diag.c @@ -7,6 +7,7 @@ /* * Diagnostics support */ +#include #include #include diff --git a/cmd/disk.c b/cmd/disk.c index 2efc3ca4b1a..92eaa02f4a1 100644 --- a/cmd/disk.c +++ b/cmd/disk.c @@ -3,6 +3,7 @@ * (C) Copyright 2000-2011 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ +#include #include #include #include diff --git a/cmd/dm.c b/cmd/dm.c index ec9cfd85376..fb605c2da1a 100644 --- a/cmd/dm.c +++ b/cmd/dm.c @@ -6,6 +6,7 @@ * Marek Vasut */ +#include #include #include #include diff --git a/cmd/echo.c b/cmd/echo.c index 973213a03a6..fda844ee9d3 100644 --- a/cmd/echo.c +++ b/cmd/echo.c @@ -4,6 +4,7 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ +#include #include static int do_echo(struct cmd_tbl *cmdtp, int flag, int argc, diff --git a/cmd/eeprom.c b/cmd/eeprom.c index 26f3750a80a..322765ad02a 100644 --- a/cmd/eeprom.c +++ b/cmd/eeprom.c @@ -19,12 +19,12 @@ * */ +#include #include #include #include #include #include -#include #include #ifndef I2C_RXTX_LEN diff --git a/cmd/efi.c b/cmd/efi.c index 6bed2d743ba..6cd5361aca5 100644 --- a/cmd/efi.c +++ b/cmd/efi.c @@ -4,6 +4,7 @@ * Written by Simon Glass */ +#include #include #include #include diff --git a/cmd/efi_common.c b/cmd/efi_common.c index c46764e6eea..1aa2351fcdf 100644 --- a/cmd/efi_common.c +++ b/cmd/efi_common.c @@ -6,6 +6,7 @@ * Written by Simon Glass */ +#include #include #include #include diff --git a/cmd/eficonfig.c b/cmd/eficonfig.c index 4164cb4f9b8..0ba92c60e03 100644 --- a/cmd/eficonfig.c +++ b/cmd/eficonfig.c @@ -7,6 +7,7 @@ #include #include +#include #include #include #include diff --git a/cmd/eficonfig_sbkey.c b/cmd/eficonfig_sbkey.c index b3325a540f9..caca27495e0 100644 --- a/cmd/eficonfig_sbkey.c +++ b/cmd/eficonfig_sbkey.c @@ -6,6 +6,7 @@ */ #include +#include #include #include #include diff --git a/cmd/efidebug.c b/cmd/efidebug.c index e978e74aad9..c2c525f2351 100644 --- a/cmd/efidebug.c +++ b/cmd/efidebug.c @@ -6,6 +6,7 @@ */ #include +#include #include #include #include diff --git a/cmd/elf.c b/cmd/elf.c index a02361f9f51..df4354d3742 100644 --- a/cmd/elf.c +++ b/cmd/elf.c @@ -4,6 +4,7 @@ * All rights reserved. */ +#include #include #include #include diff --git a/cmd/ethsw.c b/cmd/ethsw.c index 4bf49ac598f..f8b8a798bf6 100644 --- a/cmd/ethsw.c +++ b/cmd/ethsw.c @@ -5,13 +5,13 @@ * Ethernet Switch commands */ +#include #include #include #include #include #include #include -#include static const char *ethsw_name; diff --git a/cmd/event.c b/cmd/event.c index 00c828757ca..f6cdb55fc91 100644 --- a/cmd/event.c +++ b/cmd/event.c @@ -6,6 +6,7 @@ * Written by Simon Glass */ +#include #include #include diff --git a/cmd/exit.c b/cmd/exit.c index d125ec1e31f..7bf241ec732 100644 --- a/cmd/exit.c +++ b/cmd/exit.c @@ -4,8 +4,8 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ +#include #include -#include static int do_exit(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) diff --git a/cmd/ext2.c b/cmd/ext2.c index 45c8b353b58..a0ce0cf5796 100644 --- a/cmd/ext2.c +++ b/cmd/ext2.c @@ -19,6 +19,7 @@ /* * Ext2fs support */ +#include #include #include diff --git a/cmd/ext4.c b/cmd/ext4.c index 40d1fe30d5e..4791b69fd96 100644 --- a/cmd/ext4.c +++ b/cmd/ext4.c @@ -25,6 +25,7 @@ * file in uboot. Added ext4fs ls load and write support. */ +#include #include #include #include diff --git a/cmd/extension_board.c b/cmd/extension_board.c index f43bf680858..2b672d888c6 100644 --- a/cmd/extension_board.c +++ b/cmd/extension_board.c @@ -4,6 +4,7 @@ * Köry Maincent, Bootlin, */ +#include #include #include #include diff --git a/cmd/fastboot.c b/cmd/fastboot.c index d4cfc0c7a28..c3c19231c98 100644 --- a/cmd/fastboot.c +++ b/cmd/fastboot.c @@ -6,6 +6,7 @@ * (C) Copyright 2014 Linaro, Ltd. * Rob Herring */ +#include #include #include #include diff --git a/cmd/fat.c b/cmd/fat.c index ad0e5ed7d60..69ce1fa5300 100644 --- a/cmd/fat.c +++ b/cmd/fat.c @@ -7,6 +7,7 @@ /* * Boot support */ +#include #include #include #include diff --git a/cmd/fdt.c b/cmd/fdt.c index d16b141ce32..331564c13be 100644 --- a/cmd/fdt.c +++ b/cmd/fdt.c @@ -7,6 +7,7 @@ * Matthew McClintock */ +#include #include #include #include diff --git a/cmd/flash.c b/cmd/flash.c index de0e04f09cf..f4f85ecc7a8 100644 --- a/cmd/flash.c +++ b/cmd/flash.c @@ -7,9 +7,9 @@ /* * FLASH support */ +#include #include #include -#include #include #if defined(CONFIG_CMD_MTDPARTS) diff --git a/cmd/font.c b/cmd/font.c index ebde094b0a5..cb39c88063f 100644 --- a/cmd/font.c +++ b/cmd/font.c @@ -6,6 +6,7 @@ * Written by Simon Glass */ +#include #include #include #include diff --git a/cmd/fpga.c b/cmd/fpga.c index 93f14098ccb..8c64e957db0 100644 --- a/cmd/fpga.c +++ b/cmd/fpga.c @@ -7,6 +7,7 @@ /* * FPGA support */ +#include #include #include #include diff --git a/cmd/fpgad.c b/cmd/fpgad.c index b4bfaa12165..dfc6220b5e0 100644 --- a/cmd/fpgad.c +++ b/cmd/fpgad.c @@ -8,10 +8,10 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ +#include #include #include #include -#include #include diff --git a/cmd/fs.c b/cmd/fs.c index 3d7e06d6f1e..46cb43dcdb5 100644 --- a/cmd/fs.c +++ b/cmd/fs.c @@ -5,6 +5,7 @@ * Inspired by cmd_ext_common.c, cmd_fat.c. */ +#include #include #include diff --git a/cmd/fs_uuid.c b/cmd/fs_uuid.c index 5f7770d09ac..5dc94aa6408 100644 --- a/cmd/fs_uuid.c +++ b/cmd/fs_uuid.c @@ -5,6 +5,7 @@ * Copyright (C) 2014, Bachmann electronic GmbH */ +#include #include #include diff --git a/cmd/fuse.c b/cmd/fuse.c index 598ef496a43..f884c894fb0 100644 --- a/cmd/fuse.c +++ b/cmd/fuse.c @@ -8,11 +8,11 @@ * Martha Marx */ +#include #include #include #include #include -#include #include static int strtou32(const char *str, unsigned int base, u32 *result) diff --git a/cmd/gettime.c b/cmd/gettime.c index fc307efce8c..2e74e02b499 100644 --- a/cmd/gettime.c +++ b/cmd/gettime.c @@ -11,8 +11,8 @@ /* * Get Timer overflows after 2^32 / CONFIG_SYS_HZ (32Khz) = 131072 sec */ +#include #include -#include static int do_gettime(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) diff --git a/cmd/gpio.c b/cmd/gpio.c index 7a43dc6ab18..dab6f7097ae 100644 --- a/cmd/gpio.c +++ b/cmd/gpio.c @@ -6,6 +6,7 @@ * Licensed under the GPL-2 or later. */ +#include #include #include #include diff --git a/cmd/gpt.c b/cmd/gpt.c index 36b112d5978..7aaf1889a5a 100644 --- a/cmd/gpt.c +++ b/cmd/gpt.c @@ -10,6 +10,7 @@ * author: Piotr Wilczek */ +#include #include #include #include diff --git a/cmd/hash.c b/cmd/hash.c index 60d482b7f87..5534a735fa7 100644 --- a/cmd/hash.c +++ b/cmd/hash.c @@ -9,6 +9,7 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ +#include #include #include #include diff --git a/cmd/help.c b/cmd/help.c index 56579e28d31..9f8393eefd8 100644 --- a/cmd/help.c +++ b/cmd/help.c @@ -4,6 +4,7 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ +#include #include static int do_help(struct cmd_tbl *cmdtp, int flag, int argc, diff --git a/cmd/history.c b/cmd/history.c index 8972986ca9d..b6bf4670b1c 100644 --- a/cmd/history.c +++ b/cmd/history.c @@ -4,6 +4,7 @@ * Written by Simon Glass */ +#include #include #include diff --git a/cmd/host.c b/cmd/host.c index e03576b4d2d..c33c2a9787e 100644 --- a/cmd/host.c +++ b/cmd/host.c @@ -3,6 +3,7 @@ * Copyright (c) 2012, Google Inc. */ +#include #include #include #include diff --git a/cmd/i2c.c b/cmd/i2c.c index 7dac0a9fb6c..80831561c67 100644 --- a/cmd/i2c.c +++ b/cmd/i2c.c @@ -64,6 +64,7 @@ * Adapted from cmd_mem.c which is copyright Wolfgang Denk (wd@denx.de). */ +#include #include #include #include diff --git a/cmd/ide.c b/cmd/ide.c index 036489fda97..ddc87d3a0bb 100644 --- a/cmd/ide.c +++ b/cmd/ide.c @@ -8,6 +8,7 @@ * IDE support */ +#include #include #include #include diff --git a/cmd/ini.c b/cmd/ini.c index 96399017691..35de2373e60 100644 --- a/cmd/ini.c +++ b/cmd/ini.c @@ -11,9 +11,9 @@ * http://code.google.com/p/inih/ */ +#include #include #include -#include #include #include diff --git a/cmd/io.c b/cmd/io.c index 617373d3cb7..2de1111998f 100644 --- a/cmd/io.c +++ b/cmd/io.c @@ -7,9 +7,9 @@ * IO space access commands. */ +#include #include #include -#include #include /* Display values from last command */ diff --git a/cmd/iotrace.c b/cmd/iotrace.c index 0a041ed8652..f28359e2875 100644 --- a/cmd/iotrace.c +++ b/cmd/iotrace.c @@ -3,9 +3,9 @@ * Copyright (c) 2014 Google, Inc */ +#include #include #include -#include static void do_print_stats(void) { diff --git a/cmd/irq.c b/cmd/irq.c index 655aba576a8..1d3e28cb3ce 100644 --- a/cmd/irq.c +++ b/cmd/irq.c @@ -3,6 +3,7 @@ * Copyright 2008 Freescale Semiconductor, Inc. */ +#include #include #include #include diff --git a/cmd/itest.c b/cmd/itest.c index b79512a505d..74414cbdc4c 100644 --- a/cmd/itest.c +++ b/cmd/itest.c @@ -11,11 +11,11 @@ * A few parts were lifted from bash 'test' command */ +#include #include #include #include #include -#include #include diff --git a/cmd/jffs2.c b/cmd/jffs2.c index 89d336f5958..e00fcc20226 100644 --- a/cmd/jffs2.c +++ b/cmd/jffs2.c @@ -70,6 +70,7 @@ /* * JFFS2/CRAMFS support */ +#include #include #include #if defined(CONFIG_CMD_FLASH) diff --git a/cmd/kaslrseed.c b/cmd/kaslrseed.c index e0d3c7fe748..9acb8e16386 100644 --- a/cmd/kaslrseed.c +++ b/cmd/kaslrseed.c @@ -6,6 +6,7 @@ * Copyright (c) 2021, Chris Morgan */ +#include #include #include #include diff --git a/cmd/led.c b/cmd/led.c index 4256b3429c2..48a02baf509 100644 --- a/cmd/led.c +++ b/cmd/led.c @@ -4,6 +4,7 @@ * Written by Simon Glass */ +#include #include #include #include diff --git a/cmd/legacy-mtd-utils.c b/cmd/legacy-mtd-utils.c index 1a5271000bf..5903a90fe53 100644 --- a/cmd/legacy-mtd-utils.c +++ b/cmd/legacy-mtd-utils.c @@ -1,5 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ +#include #include #include #include diff --git a/cmd/legacy_led.c b/cmd/legacy_led.c index 50de7e89d8f..5256255f052 100644 --- a/cmd/legacy_led.c +++ b/cmd/legacy_led.c @@ -9,9 +9,10 @@ * Ulf Samuelsson */ +#include +#include #include #include -#include struct led_tbl_s { char *string; /* String for use in the command */ diff --git a/cmd/license.c b/cmd/license.c index 161663ff29c..15411b5a92d 100644 --- a/cmd/license.c +++ b/cmd/license.c @@ -4,6 +4,7 @@ * Author: Harald Welte */ +#include #include #include #include diff --git a/cmd/load.c b/cmd/load.c index ace1c52f90a..540361b43f0 100644 --- a/cmd/load.c +++ b/cmd/load.c @@ -7,6 +7,7 @@ /* * Serial up- and download support */ +#include #include #include #include diff --git a/cmd/log.c b/cmd/log.c index 519ec76f3b5..c9a23e4ae0d 100644 --- a/cmd/log.c +++ b/cmd/log.c @@ -4,6 +4,7 @@ * Written by Simon Glass */ +#include #include #include #include diff --git a/cmd/lsblk.c b/cmd/lsblk.c index 7c00bfdc7a0..d214dafc3be 100644 --- a/cmd/lsblk.c +++ b/cmd/lsblk.c @@ -4,6 +4,7 @@ * Niel Fourie, DENX Software Engineering, lusus@denx.de. */ +#include #include #include #include diff --git a/cmd/lzmadec.c b/cmd/lzmadec.c index c40b96941b4..81924da4618 100644 --- a/cmd/lzmadec.c +++ b/cmd/lzmadec.c @@ -9,10 +9,10 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ +#include #include #include #include -#include #include #include diff --git a/cmd/mbr.c b/cmd/mbr.c index 7e1f92a13bb..ec99b662834 100644 --- a/cmd/mbr.c +++ b/cmd/mbr.c @@ -8,11 +8,11 @@ * based on the gpt command. */ +#include #include #include #include #include -#include /** * extract_val() - Extract a value from the key=value pair list diff --git a/cmd/mdio.c b/cmd/mdio.c index c0a87087d31..3c74326161e 100644 --- a/cmd/mdio.c +++ b/cmd/mdio.c @@ -8,6 +8,7 @@ * MDIO Commands */ +#include #include #include #include diff --git a/cmd/mem.c b/cmd/mem.c index 4989d27f2ab..768057e4d3f 100644 --- a/cmd/mem.c +++ b/cmd/mem.c @@ -10,6 +10,7 @@ * Copied from FADS ROM, Dan Malek (dmalek@jlc.net) */ +#include #include #include #include @@ -23,7 +24,6 @@ #include #include #include -#include #include #include #include diff --git a/cmd/meson/sm.c b/cmd/meson/sm.c index b69f8123ee2..de9a242e17f 100644 --- a/cmd/meson/sm.c +++ b/cmd/meson/sm.c @@ -9,11 +9,11 @@ */ #include +#include #include #include #include #include -#include static int do_sm_serial(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) diff --git a/cmd/mii.c b/cmd/mii.c index ce372489692..fab420ee29e 100644 --- a/cmd/mii.c +++ b/cmd/mii.c @@ -8,6 +8,7 @@ * MII Utilities */ +#include #include #include #include diff --git a/cmd/misc.c b/cmd/misc.c index 792d9723c75..ec32b41ed1e 100644 --- a/cmd/misc.c +++ b/cmd/misc.c @@ -8,6 +8,7 @@ * A command interface to access misc devices with MISC uclass driver APIs. */ +#include #include #include #include diff --git a/cmd/mmc.c b/cmd/mmc.c index 7244a90f4dc..2d5430a5307 100644 --- a/cmd/mmc.c +++ b/cmd/mmc.c @@ -4,6 +4,7 @@ * Kyle Harris, kharris@nexus-tech.net */ +#include #include #include #include @@ -13,7 +14,6 @@ #include #include #include -#include static int curr_device = -1; diff --git a/cmd/mp.c b/cmd/mp.c index b9b5e016246..1b4373f2587 100644 --- a/cmd/mp.c +++ b/cmd/mp.c @@ -3,9 +3,9 @@ * Copyright 2008-2009 Freescale Semiconductor, Inc. */ +#include #include #include -#include static int cpu_status_all(void) { diff --git a/cmd/mtd.c b/cmd/mtd.c index 795aaa2b37d..9189f45cabd 100644 --- a/cmd/mtd.c +++ b/cmd/mtd.c @@ -9,6 +9,7 @@ */ #include +#include #include #if CONFIG_IS_ENABLED(CMD_MTD_OTP) #include diff --git a/cmd/mtdparts.c b/cmd/mtdparts.c index f57d84dbb3a..b31db73ebfc 100644 --- a/cmd/mtdparts.c +++ b/cmd/mtdparts.c @@ -70,6 +70,7 @@ * */ +#include #include #include #include diff --git a/cmd/mux.c b/cmd/mux.c index 2f6c08b8b07..388fb0878a8 100644 --- a/cmd/mux.c +++ b/cmd/mux.c @@ -6,6 +6,7 @@ * Author: Pratyush Yadav */ +#include #include #include #include diff --git a/cmd/mvebu/bubt.c b/cmd/mvebu/bubt.c index e3f21dd0d81..744b1c20aa8 100644 --- a/cmd/mvebu/bubt.c +++ b/cmd/mvebu/bubt.c @@ -5,6 +5,7 @@ */ #include +#include #include #include #include diff --git a/cmd/mvebu/comphy_rx_training.c b/cmd/mvebu/comphy_rx_training.c index 5653877cd4a..4ee8f54ea9c 100644 --- a/cmd/mvebu/comphy_rx_training.c +++ b/cmd/mvebu/comphy_rx_training.c @@ -5,6 +5,7 @@ * SPDX-License-Identifier: GPL-2.0 */ +#include #include #include #include diff --git a/cmd/nand.c b/cmd/nand.c index 5a328e0acdd..fe834c4ac5c 100644 --- a/cmd/nand.c +++ b/cmd/nand.c @@ -23,6 +23,7 @@ * only */ +#include #include #include #include diff --git a/cmd/net.c b/cmd/net.c index b206ff58e68..d407d8320a3 100644 --- a/cmd/net.c +++ b/cmd/net.c @@ -9,6 +9,7 @@ /* * Boot support */ +#include #include #include #include diff --git a/cmd/nvedit.c b/cmd/nvedit.c index 98a687bcabb..e77338f8139 100644 --- a/cmd/nvedit.c +++ b/cmd/nvedit.c @@ -23,7 +23,7 @@ * environment. After that, we use a hash table. */ -#include +#include #include #include #include diff --git a/cmd/nvedit_efi.c b/cmd/nvedit_efi.c index 64ae2ad2ce2..7a30b5cc8f8 100644 --- a/cmd/nvedit_efi.c +++ b/cmd/nvedit_efi.c @@ -6,6 +6,7 @@ */ #include +#include #include #include #include diff --git a/cmd/nvme.c b/cmd/nvme.c index f2c9acba5c3..09d5f438fb1 100644 --- a/cmd/nvme.c +++ b/cmd/nvme.c @@ -4,6 +4,7 @@ * Copyright (C) 2017 Bin Meng */ +#include #include #include #include diff --git a/cmd/onenand.c b/cmd/onenand.c index 6e808ce3fce..fad781583a3 100644 --- a/cmd/onenand.c +++ b/cmd/onenand.c @@ -9,6 +9,7 @@ * published by the Free Software Foundation. */ +#include #include #include #include diff --git a/cmd/optee_rpmb.c b/cmd/optee_rpmb.c index b155278ee2a..b3cafd92410 100644 --- a/cmd/optee_rpmb.c +++ b/cmd/optee_rpmb.c @@ -4,6 +4,7 @@ */ #include +#include #include #include #include diff --git a/cmd/osd.c b/cmd/osd.c index 5671338d9e7..210bc5d4c23 100644 --- a/cmd/osd.c +++ b/cmd/osd.c @@ -9,6 +9,7 @@ * Dirk Eibach, Guntermann & Drunck GmbH, eibach@gdsys.de */ +#include #include #include #include diff --git a/cmd/panic.c b/cmd/panic.c index 7c0affa5eb5..f13b3f094fa 100644 --- a/cmd/panic.c +++ b/cmd/panic.c @@ -3,7 +3,7 @@ * Copyright (c) 2020 Theobroma Systems Design und Consulting GmbH */ -#include +#include #include static int do_panic(struct cmd_tbl *cmdtp, int flag, int argc, diff --git a/cmd/part.c b/cmd/part.c index d140a1eddb9..c75f85acd52 100644 --- a/cmd/part.c +++ b/cmd/part.c @@ -15,6 +15,7 @@ * Pavel Bartusek */ +#include #include #include #include diff --git a/cmd/pcap.c b/cmd/pcap.c index 8d610966c13..a0149203fad 100644 --- a/cmd/pcap.c +++ b/cmd/pcap.c @@ -4,8 +4,8 @@ * Ramon Fried */ +#include #include -#include #include #include diff --git a/cmd/pci.c b/cmd/pci.c index 3c0aed50cae..d89e71c16a0 100644 --- a/cmd/pci.c +++ b/cmd/pci.c @@ -12,6 +12,7 @@ * PCI routines */ +#include #include #include #include diff --git a/cmd/pci_mps.c b/cmd/pci_mps.c index 19e71db8cbd..98161da93a0 100644 --- a/cmd/pci_mps.c +++ b/cmd/pci_mps.c @@ -6,6 +6,7 @@ * PCI Express Maximum Packet Size (MPS) configuration */ +#include #include #include #include diff --git a/cmd/pinmux.c b/cmd/pinmux.c index 01f3e4af6ce..105f01eaaff 100644 --- a/cmd/pinmux.c +++ b/cmd/pinmux.c @@ -3,6 +3,7 @@ * Copyright (C) 2018, STMicroelectronics - All Rights Reserved */ +#include #include #include #include diff --git a/cmd/pmc.c b/cmd/pmc.c index 1a3416fb2a9..9a3ba2bffc5 100644 --- a/cmd/pmc.c +++ b/cmd/pmc.c @@ -5,6 +5,7 @@ * Copyright 2019 Google LLC */ +#include #include #include #include diff --git a/cmd/pmic.c b/cmd/pmic.c index 3ad1b8aa375..c9e9730adf9 100644 --- a/cmd/pmic.c +++ b/cmd/pmic.c @@ -3,6 +3,7 @@ * Copyright (C) 2014-2015 Samsung Electronics * Przemyslaw Marczak */ +#include #include #include #include diff --git a/cmd/printf.c b/cmd/printf.c index a1727ac15a2..0c6887e0d6e 100644 --- a/cmd/printf.c +++ b/cmd/printf.c @@ -84,12 +84,12 @@ * We try to be compatible. */ +#include #include #include #include #include #include -#include #define WANT_HEX_ESCAPES 0 #define PRINT_CONVERSION_ERROR 1 diff --git a/cmd/pvblock.c b/cmd/pvblock.c index 3a83ac9cd92..1b604c37373 100644 --- a/cmd/pvblock.c +++ b/cmd/pvblock.c @@ -6,6 +6,7 @@ */ #include +#include #include /* Current I/O Device */ diff --git a/cmd/pxe.c b/cmd/pxe.c index ae02c28c075..21134eb7a30 100644 --- a/cmd/pxe.c +++ b/cmd/pxe.c @@ -4,12 +4,12 @@ * Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved. */ +#include #include #include #include #include #include -#include #include "pxe_utils.h" diff --git a/cmd/qfw.c b/cmd/qfw.c index 1b108118658..1b8c775ebf5 100644 --- a/cmd/qfw.c +++ b/cmd/qfw.c @@ -3,6 +3,7 @@ * (C) Copyright 2015 Miao Yan */ +#include #include #include #include diff --git a/cmd/read.c b/cmd/read.c index af54bd17654..1218e7acfd0 100644 --- a/cmd/read.c +++ b/cmd/read.c @@ -8,10 +8,10 @@ * Software Foundation. */ +#include #include #include #include -#include static int do_rw(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) diff --git a/cmd/reginfo.c b/cmd/reginfo.c index 53b8bc41bfe..c8a04b1754e 100644 --- a/cmd/reginfo.c +++ b/cmd/reginfo.c @@ -4,6 +4,7 @@ * Subodh Nijsure, SkyStream Networks, snijsure@skystream.com */ +#include #include #include diff --git a/cmd/regulator.c b/cmd/regulator.c index da298090bb7..635a9add585 100644 --- a/cmd/regulator.c +++ b/cmd/regulator.c @@ -3,6 +3,7 @@ * Copyright (C) 2014-2015 Samsung Electronics * Przemyslaw Marczak */ +#include #include #include #include diff --git a/cmd/remoteproc.c b/cmd/remoteproc.c index 3c5b6a05b1a..ea8724a187d 100644 --- a/cmd/remoteproc.c +++ b/cmd/remoteproc.c @@ -3,6 +3,7 @@ * (C) Copyright 2015 * Texas Instruments Incorporated - https://www.ti.com/ */ +#include #include #include #include diff --git a/cmd/riscv/sbi.c b/cmd/riscv/sbi.c index a231604e492..2d8ee7e5bbb 100644 --- a/cmd/riscv/sbi.c +++ b/cmd/riscv/sbi.c @@ -5,6 +5,7 @@ * Copyright (c) 2020, Heinrich Schuchardt */ +#include #include #include diff --git a/cmd/rkmtd.c b/cmd/rkmtd.c index a870c119110..5b80427cb94 100644 --- a/cmd/rkmtd.c +++ b/cmd/rkmtd.c @@ -8,6 +8,7 @@ * Copyright (C) 2023 Johan Jonker */ +#include #include #include #include diff --git a/cmd/rng.c b/cmd/rng.c index 2fb7202303a..e5ab8681122 100644 --- a/cmd/rng.c +++ b/cmd/rng.c @@ -4,6 +4,7 @@ * * Copyright (c) 2019, Heinrich Schuchardt */ +#include #include #include #include diff --git a/cmd/rockusb.c b/cmd/rockusb.c index 48497aa8764..07088564a10 100644 --- a/cmd/rockusb.c +++ b/cmd/rockusb.c @@ -3,6 +3,7 @@ * Copyright (C) 2017 Eddie Cai */ +#include #include #include #include diff --git a/cmd/rtc.c b/cmd/rtc.c index a931fd9d54f..a344cfa76b1 100644 --- a/cmd/rtc.c +++ b/cmd/rtc.c @@ -1,5 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ +#include #include #include #include diff --git a/cmd/sata.c b/cmd/sata.c index 8b923f9378b..9c9fe111d12 100644 --- a/cmd/sata.c +++ b/cmd/sata.c @@ -9,6 +9,7 @@ * Dave Liu */ +#include #include #include #include diff --git a/cmd/sb.c b/cmd/sb.c index 1aa5921f03e..0d55818e3c6 100644 --- a/cmd/sb.c +++ b/cmd/sb.c @@ -4,6 +4,7 @@ * Written by Simon Glass */ +#include #include #include #include diff --git a/cmd/scp03.c b/cmd/scp03.c index 9c749d19af8..2b8d5aecf34 100644 --- a/cmd/scp03.c +++ b/cmd/scp03.c @@ -4,6 +4,7 @@ * */ +#include #include #include #include diff --git a/cmd/scsi.c b/cmd/scsi.c index c286bdc0726..c501d7f456d 100644 --- a/cmd/scsi.c +++ b/cmd/scsi.c @@ -7,6 +7,7 @@ /* * SCSI support. */ +#include #include #include #include diff --git a/cmd/seama.c b/cmd/seama.c index 3c8e8199234..3aafb43c48a 100644 --- a/cmd/seama.c +++ b/cmd/seama.c @@ -4,6 +4,7 @@ * Support for the "SEAttle iMAge" SEAMA NAND image format */ +#include #include #include diff --git a/cmd/setexpr.c b/cmd/setexpr.c index e111b8ba98a..ab76824a32b 100644 --- a/cmd/setexpr.c +++ b/cmd/setexpr.c @@ -8,6 +8,7 @@ * This file provides a shell like 'expr' function to return. */ +#include #include #include #include @@ -15,8 +16,6 @@ #include #include #include -#include -#include #include #include "printf.h" diff --git a/cmd/sf.c b/cmd/sf.c index f43a2e08b31..e3866899f6c 100644 --- a/cmd/sf.c +++ b/cmd/sf.c @@ -5,6 +5,7 @@ * Copyright (C) 2008 Atmel Corporation */ +#include #include #include #include @@ -13,7 +14,6 @@ #include #include #include -#include #include #include #include diff --git a/cmd/sha1sum.c b/cmd/sha1sum.c index 52aa26c78d2..bcc665a5a6c 100644 --- a/cmd/sha1sum.c +++ b/cmd/sha1sum.c @@ -7,6 +7,7 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ +#include #include #include #include diff --git a/cmd/sleep.c b/cmd/sleep.c index 7616fed7556..c741b4aa029 100644 --- a/cmd/sleep.c +++ b/cmd/sleep.c @@ -4,10 +4,9 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ +#include #include #include -#include -#include #include static int do_sleep(struct cmd_tbl *cmdtp, int flag, int argc, diff --git a/cmd/smccc.c b/cmd/smccc.c index 3a4d885e37e..fb80431ad1d 100644 --- a/cmd/smccc.c +++ b/cmd/smccc.c @@ -4,8 +4,8 @@ * Michalis Pappas */ #include +#include #include -#include #include #include #include diff --git a/cmd/sound.c b/cmd/sound.c index 08bf74112f1..0b7f9599716 100644 --- a/cmd/sound.c +++ b/cmd/sound.c @@ -4,6 +4,7 @@ * Rajeshwari Shinde */ +#include #include #include #include diff --git a/cmd/source.c b/cmd/source.c index c9b5f8e400a..0ba9736b1ab 100644 --- a/cmd/source.c +++ b/cmd/source.c @@ -14,6 +14,7 @@ /* #define DEBUG */ +#include #include #include #include diff --git a/cmd/spi.c b/cmd/spi.c index ea30c854c21..f30018f33be 100644 --- a/cmd/spi.c +++ b/cmd/spi.c @@ -8,6 +8,7 @@ * SPI Read/Write Utilities */ +#include #include #include #include diff --git a/cmd/spl.c b/cmd/spl.c index d1f47c7316b..8a2ded72be9 100644 --- a/cmd/spl.c +++ b/cmd/spl.c @@ -4,6 +4,7 @@ * Corscience GmbH & Co. KG - Simon Schwarz */ +#include #include #include #include diff --git a/cmd/stackprot_test.c b/cmd/stackprot_test.c index e7ff4a06158..f3470288fac 100644 --- a/cmd/stackprot_test.c +++ b/cmd/stackprot_test.c @@ -3,6 +3,7 @@ * Copyright 2021 Broadcom */ +#include #include static int do_test_stackprot_fail(struct cmd_tbl *cmdtp, int flag, int argc, diff --git a/cmd/strings.c b/cmd/strings.c index 5bcb0f2b567..bf348afce81 100644 --- a/cmd/strings.c +++ b/cmd/strings.c @@ -7,8 +7,8 @@ */ #include +#include #include -#include static char *start_addr, *last_addr; diff --git a/cmd/sysboot.c b/cmd/sysboot.c index 0ea08fd7b53..d14c570d96a 100644 --- a/cmd/sysboot.c +++ b/cmd/sysboot.c @@ -1,10 +1,10 @@ // SPDX-License-Identifier: GPL-2.0+ +#include #include #include #include #include -#include /** * struct sysboot_info - useful information for sysboot helpers diff --git a/cmd/temperature.c b/cmd/temperature.c index 41e422fc937..420965de143 100644 --- a/cmd/temperature.c +++ b/cmd/temperature.c @@ -5,6 +5,7 @@ * Written by Robert Marko */ +#include #include #include #include diff --git a/cmd/terminal.c b/cmd/terminal.c index 369a755e0f5..9e32a4191e1 100644 --- a/cmd/terminal.c +++ b/cmd/terminal.c @@ -7,6 +7,7 @@ /* * Boot support */ +#include #include #include #include diff --git a/cmd/test.c b/cmd/test.c index b4c3eabf9f6..fa7c48fb9f1 100644 --- a/cmd/test.c +++ b/cmd/test.c @@ -4,10 +4,10 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ +#include #include #include #include -#include #define OP_INVALID 0 #define OP_NOT 1 diff --git a/cmd/thordown.c b/cmd/thordown.c index 70061bf8d4c..48e22b31d02 100644 --- a/cmd/thordown.c +++ b/cmd/thordown.c @@ -6,6 +6,7 @@ * All rights reserved. */ +#include #include #include #include diff --git a/cmd/ti/ddr3.c b/cmd/ti/ddr3.c index 70ce53d01e8..bbd406fc66e 100644 --- a/cmd/ti/ddr3.c +++ b/cmd/ti/ddr3.c @@ -12,6 +12,7 @@ #include #include #include +#include #include #include diff --git a/cmd/ti/pd.c b/cmd/ti/pd.c index 305023af1e7..a0492a5fdee 100644 --- a/cmd/ti/pd.c +++ b/cmd/ti/pd.c @@ -5,6 +5,7 @@ * Copyright (C) 2020 Texas Instruments Incorporated, */ +#include #include #include #include diff --git a/cmd/time.c b/cmd/time.c index eee6084e968..db8c1892df4 100644 --- a/cmd/time.c +++ b/cmd/time.c @@ -3,6 +3,7 @@ * Copyright (c) 2011 The Chromium OS Authors. */ +#include #include static void report_time(ulong cycles) diff --git a/cmd/timer.c b/cmd/timer.c index 04fcd84ac6a..551be5dd54e 100644 --- a/cmd/timer.c +++ b/cmd/timer.c @@ -4,8 +4,8 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ +#include #include -#include static int do_timer(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) diff --git a/cmd/tlv_eeprom.c b/cmd/tlv_eeprom.c index 0aec7521770..57cfd355df1 100644 --- a/cmd/tlv_eeprom.c +++ b/cmd/tlv_eeprom.c @@ -9,6 +9,7 @@ * Copyright (C) 2014,2016 david_yang */ +#include #include #include #include diff --git a/cmd/tpm-common.c b/cmd/tpm-common.c index 1cd57f901b6..a7dc23d85d5 100644 --- a/cmd/tpm-common.c +++ b/cmd/tpm-common.c @@ -3,6 +3,7 @@ * Copyright (c) 2013 The Chromium OS Authors. */ +#include #include #include #include diff --git a/cmd/tpm-v1.c b/cmd/tpm-v1.c index 6e019d1c729..1b1efcd204d 100644 --- a/cmd/tpm-v1.c +++ b/cmd/tpm-v1.c @@ -3,10 +3,10 @@ * Copyright (c) 2013 The Chromium OS Authors. */ +#include #include #include #include -#include #include #include #include diff --git a/cmd/tpm-v2.c b/cmd/tpm-v2.c index 99c540b26de..7e479b9dfe3 100644 --- a/cmd/tpm-v2.c +++ b/cmd/tpm-v2.c @@ -4,6 +4,7 @@ * Author: Miquel Raynal */ +#include #include #include #include diff --git a/cmd/tpm_test.c b/cmd/tpm_test.c index 9c8b1c74384..c7fa6e775f5 100644 --- a/cmd/tpm_test.c +++ b/cmd/tpm_test.c @@ -3,10 +3,10 @@ * Copyright (c) 2015 Google, Inc */ +#include #include #include #include -#include #include #include #include "tpm-user-utils.h" diff --git a/cmd/trace.c b/cmd/trace.c index 937e6a682ad..2e3ee1d3ba2 100644 --- a/cmd/trace.c +++ b/cmd/trace.c @@ -3,11 +3,11 @@ * Copyright (c) 2011 The Chromium OS Authors. */ +#include #include #include #include #include -#include #include static int get_args(int argc, char *const argv[], char **buff, diff --git a/cmd/tsi148.c b/cmd/tsi148.c index 113b4e67330..0d849d9979e 100644 --- a/cmd/tsi148.c +++ b/cmd/tsi148.c @@ -7,10 +7,10 @@ * (C) Copyright 2003 Stefan Roese, stefan.roese@esd-electronics.com */ +#include #include #include #include -#include #include #include diff --git a/cmd/ubi.c b/cmd/ubi.c index 8c1b5df0572..0a6a80bdd10 100644 --- a/cmd/ubi.c +++ b/cmd/ubi.c @@ -11,6 +11,7 @@ * published by the Free Software Foundation. */ +#include #include #include #include diff --git a/cmd/ubifs.c b/cmd/ubifs.c index 8fd39032ecc..2a035bc7ae6 100644 --- a/cmd/ubifs.c +++ b/cmd/ubifs.c @@ -11,11 +11,11 @@ #undef DEBUG +#include #include #include #include #include -#include static int ubifs_initialized; static int ubifs_mounted; diff --git a/cmd/ufs.c b/cmd/ufs.c index 6e21fbb1685..536bd85b75d 100644 --- a/cmd/ufs.c +++ b/cmd/ufs.c @@ -5,9 +5,9 @@ * Copyright (C) 2019 Texas Instruments Incorporated - https://www.ti.com * */ +#include #include #include -#include static int do_ufs(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) { diff --git a/cmd/universe.c b/cmd/universe.c index d1a712829d0..fb3a32d4d5a 100644 --- a/cmd/universe.c +++ b/cmd/universe.c @@ -3,9 +3,9 @@ * (C) Copyright 2003 Stefan Roese, stefan.roese@esd-electronics.com */ +#include #include #include -#include #include #include diff --git a/cmd/unlz4.c b/cmd/unlz4.c index fc5200117ad..5f20838e899 100644 --- a/cmd/unlz4.c +++ b/cmd/unlz4.c @@ -4,9 +4,9 @@ * FUJITSU COMPUTERTECHNOLOGIES LIMITED. All rights reserved. */ +#include #include #include -#include #include static int do_unlz4(struct cmd_tbl *cmdtp, int flag, int argc, diff --git a/cmd/unzip.c b/cmd/unzip.c index e7a3f9808b2..bc6cee06043 100644 --- a/cmd/unzip.c +++ b/cmd/unzip.c @@ -4,12 +4,12 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ +#include #include #include #include #include #include -#include static int do_unzip(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) diff --git a/cmd/usb.c b/cmd/usb.c index 3a3764a5b86..23253f22231 100644 --- a/cmd/usb.c +++ b/cmd/usb.c @@ -10,6 +10,7 @@ * project. */ +#include #include #include #include diff --git a/cmd/usb_gadget_sdp.c b/cmd/usb_gadget_sdp.c index 39259a3b092..cbdda733533 100644 --- a/cmd/usb_gadget_sdp.c +++ b/cmd/usb_gadget_sdp.c @@ -6,6 +6,7 @@ * Author: Stefan Agner */ +#include #include #include #include diff --git a/cmd/usb_mass_storage.c b/cmd/usb_mass_storage.c index 47e8b70cd10..751701fe73a 100644 --- a/cmd/usb_mass_storage.c +++ b/cmd/usb_mass_storage.c @@ -6,6 +6,7 @@ * Copyright (c) 2015, NVIDIA CORPORATION. All rights reserved. */ +#include #include #include #include diff --git a/cmd/vbe.c b/cmd/vbe.c index 423d9e5f8f0..0e84b0e97aa 100644 --- a/cmd/vbe.c +++ b/cmd/vbe.c @@ -6,6 +6,7 @@ * Written by Simon Glass */ +#include #include #include #include diff --git a/cmd/version.c b/cmd/version.c index 53db1a0b6bd..d99a44f19fb 100644 --- a/cmd/version.c +++ b/cmd/version.c @@ -4,6 +4,7 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ +#include #include #include #include diff --git a/cmd/video.c b/cmd/video.c index 91bd6de14dc..942f81c1633 100644 --- a/cmd/video.c +++ b/cmd/video.c @@ -6,6 +6,7 @@ * Written by Simon Glass */ +#include #include #include #include diff --git a/cmd/virtio.c b/cmd/virtio.c index a42a563ab72..019e317e755 100644 --- a/cmd/virtio.c +++ b/cmd/virtio.c @@ -4,6 +4,7 @@ * Copyright (C) 2018, Bin Meng */ +#include #include #include #include diff --git a/cmd/w1.c b/cmd/w1.c index e462e786a96..3209e65f377 100644 --- a/cmd/w1.c +++ b/cmd/w1.c @@ -4,6 +4,7 @@ * Microchip Technology, Inc. * Eugen Hristev */ +#include #include #include #include diff --git a/cmd/wdt.c b/cmd/wdt.c index c7a06cca181..b9fdf7ad155 100644 --- a/cmd/wdt.c +++ b/cmd/wdt.c @@ -5,6 +5,7 @@ * Copyright (c) 2019 Michael Walle */ +#include #include #include #include diff --git a/cmd/wol.c b/cmd/wol.c index 45d4ae3f719..f0d63432272 100644 --- a/cmd/wol.c +++ b/cmd/wol.c @@ -7,9 +7,9 @@ /* * Wake-on-LAN support */ +#include #include #include -#include #if defined(CONFIG_CMD_WOL) void wol_set_timeout(ulong); diff --git a/cmd/x86/cbsysinfo.c b/cmd/x86/cbsysinfo.c index 7ca2e13ae2f..84822a3e321 100644 --- a/cmd/x86/cbsysinfo.c +++ b/cmd/x86/cbsysinfo.c @@ -4,6 +4,7 @@ * Written by Simon Glass */ +#include #include #include #include diff --git a/cmd/x86/fsp.c b/cmd/x86/fsp.c index 2620ab8ee02..82e4415b16e 100644 --- a/cmd/x86/fsp.c +++ b/cmd/x86/fsp.c @@ -3,6 +3,7 @@ * Copyright (C) 2014-2015, Bin Meng */ +#include #include #include #include diff --git a/cmd/x86/hob.c b/cmd/x86/hob.c index 2dd30808bd1..04d092dbe7e 100644 --- a/cmd/x86/hob.c +++ b/cmd/x86/hob.c @@ -3,6 +3,7 @@ * Copyright (C) 2014-2015, Bin Meng */ +#include #include #include #include diff --git a/cmd/x86/mtrr.c b/cmd/x86/mtrr.c index b2afb598c73..6ad7a123a44 100644 --- a/cmd/x86/mtrr.c +++ b/cmd/x86/mtrr.c @@ -3,9 +3,9 @@ * (C) Copyright 2014 Google, Inc */ +#include #include #include -#include #include #include #include diff --git a/cmd/ximg.c b/cmd/ximg.c index 1467484df8d..0e7eead8d19 100644 --- a/cmd/ximg.c +++ b/cmd/ximg.c @@ -11,6 +11,7 @@ /* * Multi Image extract */ +#include #include #include #include diff --git a/cmd/xxd.c b/cmd/xxd.c index 8ae05f910cb..446ac1915ef 100644 --- a/cmd/xxd.c +++ b/cmd/xxd.c @@ -4,6 +4,7 @@ * Roger Knecht */ +#include #include #include #include diff --git a/cmd/yaffs2.c b/cmd/yaffs2.c index d0724d9bea8..27fbd1be8f7 100644 --- a/cmd/yaffs2.c +++ b/cmd/yaffs2.c @@ -13,6 +13,7 @@ * ... */ +#include #include #include diff --git a/cmd/zfs.c b/cmd/zfs.c index 2f831532c2e..6ef1b56ab10 100644 --- a/cmd/zfs.c +++ b/cmd/zfs.c @@ -8,6 +8,7 @@ * made from existing GRUB Sources by Sun, GNU and others. */ +#include #include #include #include diff --git a/cmd/zip.c b/cmd/zip.c index 2d255428822..08afd62b973 100644 --- a/cmd/zip.c +++ b/cmd/zip.c @@ -4,10 +4,10 @@ * Lei Wen , Marvell Inc. */ +#include #include #include #include -#include static int do_zip(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) { diff --git a/common/autoboot.c b/common/autoboot.c index 898a57bc92b..6f0aeae6bf3 100644 --- a/common/autoboot.c +++ b/common/autoboot.c @@ -4,14 +4,13 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ -#include +#include #include #include #include #include #include #include -#include #include #include #include diff --git a/common/bloblist.c b/common/bloblist.c index 11d6422b695..ad06d7a1795 100644 --- a/common/bloblist.c +++ b/common/bloblist.c @@ -6,6 +6,7 @@ #define LOG_CATEGORY LOGC_BLOBLIST +#include #include #include #include diff --git a/common/board_f.c b/common/board_f.c index 212ffb3090b..039d6d712d0 100644 --- a/common/board_f.c +++ b/common/board_f.c @@ -9,7 +9,7 @@ * Marius Groeger */ -#include +#include #include #include #include diff --git a/common/board_info.c b/common/board_info.c index 33c260b404e..f4c385add90 100644 --- a/common/board_info.c +++ b/common/board_info.c @@ -1,5 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ +#include #include #include #include diff --git a/common/board_r.c b/common/board_r.c index c823cd262f1..da0b80f24ff 100644 --- a/common/board_r.c +++ b/common/board_r.c @@ -9,7 +9,7 @@ * Marius Groeger */ -#include +#include #include #include #include diff --git a/common/bootstage.c b/common/bootstage.c index fb6befcbc4a..0e6d80718fd 100644 --- a/common/bootstage.c +++ b/common/bootstage.c @@ -11,6 +11,7 @@ #define LOG_CATEGORY LOGC_BOOT +#include #include #include #include diff --git a/common/bouncebuf.c b/common/bouncebuf.c index b2f87e4d939..934b83f7ec3 100644 --- a/common/bouncebuf.c +++ b/common/bouncebuf.c @@ -5,6 +5,7 @@ * Copyright (C) 2012 Marek Vasut */ +#include #include #include #include diff --git a/common/cli.c b/common/cli.c index 4694a35cd0e..1c33daf1149 100644 --- a/common/cli.c +++ b/common/cli.c @@ -10,6 +10,7 @@ #define pr_fmt(fmt) "cli: %s: " fmt, __func__ +#include #include #include #include diff --git a/common/cli_getch.c b/common/cli_getch.c index a5ed6eb6fcf..0ee79087774 100644 --- a/common/cli_getch.c +++ b/common/cli_getch.c @@ -6,10 +6,8 @@ * Copyright 2022 Google LLC */ +#include #include -#include -#include -#include /** * enum cli_esc_state_t - indicates what to do with an escape character diff --git a/common/cli_hush.c b/common/cli_hush.c index 96a98209b9d..9cda97f30e3 100644 --- a/common/cli_hush.c +++ b/common/cli_hush.c @@ -75,6 +75,7 @@ #define __U_BOOT__ #ifdef __U_BOOT__ +#include /* readline */ #include #include /* malloc, free, realloc*/ #include /* isalpha, isdigit */ diff --git a/common/cli_readline.c b/common/cli_readline.c index 4cb82b40149..cf4339d0e50 100644 --- a/common/cli_readline.c +++ b/common/cli_readline.c @@ -8,6 +8,7 @@ * JinHua Luo, GuangDong Linux Center, */ +#include #include #include #include @@ -15,7 +16,6 @@ #include #include #include -#include #include DECLARE_GLOBAL_DATA_PTR; diff --git a/common/cli_simple.c b/common/cli_simple.c index 266c444334e..f89ba92d1b0 100644 --- a/common/cli_simple.c +++ b/common/cli_simple.c @@ -8,6 +8,7 @@ * JinHua Luo, GuangDong Linux Center, */ +#include #include #include #include diff --git a/common/command.c b/common/command.c index 3f691399cbe..af8ffdba8f8 100644 --- a/common/command.c +++ b/common/command.c @@ -8,7 +8,7 @@ * Command Processor Table */ -#include +#include #include #include #include @@ -16,7 +16,6 @@ #include #include #include -#include #include #include diff --git a/common/console.c b/common/console.c index 63f78004fdb..aa3053bc441 100644 --- a/common/console.c +++ b/common/console.c @@ -4,6 +4,7 @@ * Paolo Scaffardi, AIRVENT SAM s.p.a - RIMINI(ITALY), arsenio@tin.it */ +#include #include #include #include diff --git a/common/cros_ec.c b/common/cros_ec.c index 9ccc8fa16cd..249d1f19411 100644 --- a/common/cros_ec.c +++ b/common/cros_ec.c @@ -8,6 +8,7 @@ * Software Foundation. */ +#include #include #include #include diff --git a/common/ddr_spd.c b/common/ddr_spd.c index 2f6eb99bf0c..58dc9b3781b 100644 --- a/common/ddr_spd.c +++ b/common/ddr_spd.c @@ -3,8 +3,8 @@ * Copyright 2008-2014 Freescale Semiconductor, Inc. */ +#include #include -#include /* used for ddr1 and ddr2 spd */ static int diff --git a/common/dfu.c b/common/dfu.c index 1af8194139c..0d154e8d4c4 100644 --- a/common/dfu.c +++ b/common/dfu.c @@ -10,6 +10,7 @@ * Lukasz Majewski */ +#include #include #include #include diff --git a/common/dlmalloc.c b/common/dlmalloc.c index 9549c59f358..a0616217d49 100644 --- a/common/dlmalloc.c +++ b/common/dlmalloc.c @@ -12,6 +12,7 @@ #define DEBUG #endif +#include #include #include diff --git a/common/edid.c b/common/edid.c index 865ba9daa78..556c4e3434b 100644 --- a/common/edid.c +++ b/common/edid.c @@ -9,6 +9,7 @@ * Copyright (C) Nalin Dahyabhai */ +#include #include #include #include diff --git a/common/eeprom/eeprom_field.c b/common/eeprom/eeprom_field.c index 3bacb1ae7eb..f56eebe679f 100644 --- a/common/eeprom/eeprom_field.c +++ b/common/eeprom/eeprom_field.c @@ -6,8 +6,7 @@ * Igor Grinberg */ -#include -#include +#include #include #include diff --git a/common/eeprom/eeprom_layout.c b/common/eeprom/eeprom_layout.c index 1a425c1754d..5a9be1da061 100644 --- a/common/eeprom/eeprom_layout.c +++ b/common/eeprom/eeprom_layout.c @@ -6,8 +6,8 @@ * Igor Grinberg */ +#include #include -#include #include #include diff --git a/common/event.c b/common/event.c index dda569d4478..16c2ba6cc92 100644 --- a/common/event.c +++ b/common/event.c @@ -9,13 +9,13 @@ #define LOG_CATEGORY LOGC_EVENT +#include #include #include #include #include #include #include -#include #include #include diff --git a/common/exports.c b/common/exports.c index 48b084c3861..20d8b759bc2 100644 --- a/common/exports.c +++ b/common/exports.c @@ -1,3 +1,4 @@ +#include #include #include #include diff --git a/common/flash.c b/common/flash.c index 24ddc8bee72..848f44e59df 100644 --- a/common/flash.c +++ b/common/flash.c @@ -6,10 +6,10 @@ /* #define DEBUG */ +#include #include #include #include -#include #include diff --git a/common/hash.c b/common/hash.c index ac63803fed9..3d6b84de473 100644 --- a/common/hash.c +++ b/common/hash.c @@ -10,6 +10,7 @@ */ #ifndef USE_HOSTCC +#include #include #include #include diff --git a/common/hwconfig.c b/common/hwconfig.c index afaa6cb37ab..cac0b6348f4 100644 --- a/common/hwconfig.c +++ b/common/hwconfig.c @@ -10,6 +10,7 @@ #ifndef HWCONFIG_TEST #include +#include #include #include #include diff --git a/common/init/board_init.c b/common/init/board_init.c index a06ec1caa2c..ed2365daa35 100644 --- a/common/init/board_init.c +++ b/common/init/board_init.c @@ -6,7 +6,7 @@ * Written by Simon Glass */ -#include +#include #include #include #include diff --git a/common/init/handoff.c b/common/init/handoff.c index a7cd065fb38..d0be1bb17a2 100644 --- a/common/init/handoff.c +++ b/common/init/handoff.c @@ -5,6 +5,7 @@ * Copyright 2018 Google, Inc */ +#include #include #include diff --git a/common/iomux.c b/common/iomux.c index 1224c15eb71..c428f7110a7 100644 --- a/common/iomux.c +++ b/common/iomux.c @@ -4,6 +4,7 @@ * Gary Jennejohn, DENX Software Engineering GmbH, garyj@denx.de. */ +#include #include #include #include diff --git a/common/iotrace.c b/common/iotrace.c index a0a5613bd9b..63d0cca3a00 100644 --- a/common/iotrace.c +++ b/common/iotrace.c @@ -5,6 +5,7 @@ #define IOTRACE_IMPL +#include #include #include #include diff --git a/common/kallsyms.c b/common/kallsyms.c index 49b3897078a..13344e634b9 100644 --- a/common/kallsyms.c +++ b/common/kallsyms.c @@ -5,6 +5,7 @@ * Licensed under the GPL-2 or later. */ +#include /* We need the weak marking as this symbol is provided specially */ extern const char system_map[] __attribute__((weak)); diff --git a/common/kgdb.c b/common/kgdb.c index 01a09f17628..29b09fcfe56 100644 --- a/common/kgdb.c +++ b/common/kgdb.c @@ -87,6 +87,7 @@ * ****************************************************************************/ +#include #include #include diff --git a/common/kgdb_stubs.c b/common/kgdb_stubs.c index 256d88697d7..66aed7cea1c 100644 --- a/common/kgdb_stubs.c +++ b/common/kgdb_stubs.c @@ -7,6 +7,7 @@ * Licensed under the GPL-2 or later. */ +#include #include #include #include diff --git a/common/log.c b/common/log.c index dfee250b158..42d35f04b68 100644 --- a/common/log.c +++ b/common/log.c @@ -6,6 +6,7 @@ * Written by Simon Glass */ +#include #include #include #include diff --git a/common/log_console.c b/common/log_console.c index c27101b8fe2..bb091ce21a4 100644 --- a/common/log_console.c +++ b/common/log_console.c @@ -6,6 +6,7 @@ * Written by Simon Glass */ +#include #include #include diff --git a/common/log_syslog.c b/common/log_syslog.c index d01bb749c22..53c4def5d1c 100644 --- a/common/log_syslog.c +++ b/common/log_syslog.c @@ -5,6 +5,7 @@ * Copyright (c) 2020, Heinrich Schuchardt */ +#include #include #include #include diff --git a/common/main.c b/common/main.c index b0b6e74f5d3..82d3aafa53c 100644 --- a/common/main.c +++ b/common/main.c @@ -6,6 +6,7 @@ /* #define DEBUG */ +#include #include #include #include diff --git a/common/malloc_simple.c b/common/malloc_simple.c index 4e6d7952b3c..0a004d40e1e 100644 --- a/common/malloc_simple.c +++ b/common/malloc_simple.c @@ -7,6 +7,7 @@ #define LOG_CATEGORY LOGC_ALLOC +#include #include #include #include diff --git a/common/memsize.c b/common/memsize.c index 86109579c95..d646df8b04c 100644 --- a/common/memsize.c +++ b/common/memsize.c @@ -4,7 +4,7 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ -#include +#include #include #include #include diff --git a/common/menu.c b/common/menu.c index e48424995b6..b55cf7b9996 100644 --- a/common/menu.c +++ b/common/menu.c @@ -5,6 +5,7 @@ */ #include +#include #include #include #include diff --git a/common/miiphyutil.c b/common/miiphyutil.c index 9b8744e5d8b..194c84e7e89 100644 --- a/common/miiphyutil.c +++ b/common/miiphyutil.c @@ -9,6 +9,7 @@ * channel. */ +#include #include #include #include diff --git a/common/s_record.c b/common/s_record.c index 486dd93abd4..2b7651fcffc 100644 --- a/common/s_record.c +++ b/common/s_record.c @@ -4,6 +4,7 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ +#include #include static int hex1_bin (char c); diff --git a/common/scp03.c b/common/scp03.c index 54b1bd54b60..09ef7b5ba3d 100644 --- a/common/scp03.c +++ b/common/scp03.c @@ -4,11 +4,10 @@ * */ +#include #include #include #include -#include -#include static int scp03_enable(bool provision) { diff --git a/common/spl/spl.c b/common/spl/spl.c index 9a879e9fb10..e06bc75d36b 100644 --- a/common/spl/spl.c +++ b/common/spl/spl.c @@ -6,7 +6,7 @@ * Aneesh V */ -#include +#include #include #include #include @@ -23,6 +23,7 @@ #include #include #include +#include #include #include #include diff --git a/common/spl/spl_atf.c b/common/spl/spl_atf.c index 0b1c981a105..3bdd013a35f 100644 --- a/common/spl/spl_atf.c +++ b/common/spl/spl_atf.c @@ -9,6 +9,7 @@ * Copyright (C) 2017 Theobroma Systems Design und Consulting GmbH */ +#include #include #include #include diff --git a/common/spl/spl_blk_fs.c b/common/spl/spl_blk_fs.c index bc551c5c074..04eac6f306b 100644 --- a/common/spl/spl_blk_fs.c +++ b/common/spl/spl_blk_fs.c @@ -5,6 +5,7 @@ * */ +#include #include #include #include diff --git a/common/spl/spl_bootrom.c b/common/spl/spl_bootrom.c index e172a2d7b83..0eefd39a519 100644 --- a/common/spl/spl_bootrom.c +++ b/common/spl/spl_bootrom.c @@ -3,6 +3,7 @@ * Copyright (C) 2017 Theobroma Systems Design und Consulting GmH */ +#include #include __weak int board_return_to_bootrom(struct spl_image_info *spl_image, diff --git a/common/spl/spl_dfu.c b/common/spl/spl_dfu.c index e9f381c392c..8a779da8fa1 100644 --- a/common/spl/spl_dfu.c +++ b/common/spl/spl_dfu.c @@ -5,6 +5,7 @@ * * Ravi B */ +#include #include #include #include diff --git a/common/spl/spl_ext.c b/common/spl/spl_ext.c index 76f49a5a8a6..2be6f04b02c 100644 --- a/common/spl/spl_ext.c +++ b/common/spl/spl_ext.c @@ -1,9 +1,11 @@ // SPDX-License-Identifier: GPL-2.0+ +#include #include #include #include #include +#include #include #include #include diff --git a/common/spl/spl_fat.c b/common/spl/spl_fat.c index bd8aab253a9..a52f9e178e6 100644 --- a/common/spl/spl_fat.c +++ b/common/spl/spl_fat.c @@ -8,10 +8,12 @@ * FAT Image Functions copied from spl_mmc.c */ +#include #include #include #include #include +#include #include #include #include diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c index 988125be008..e5195d460c4 100644 --- a/common/spl/spl_fit.c +++ b/common/spl/spl_fit.c @@ -4,6 +4,7 @@ * Written by Simon Glass */ +#include #include #include #include diff --git a/common/spl/spl_imx_container.c b/common/spl/spl_imx_container.c index 2c31777fcd3..b4ea9241d68 100644 --- a/common/spl/spl_imx_container.c +++ b/common/spl/spl_imx_container.c @@ -4,6 +4,7 @@ */ #define LOG_CATEGORY LOGC_ARCH +#include #include #include #include diff --git a/common/spl/spl_legacy.c b/common/spl/spl_legacy.c index a77893455f2..08687ca8f6c 100644 --- a/common/spl/spl_legacy.c +++ b/common/spl/spl_legacy.c @@ -3,6 +3,7 @@ * Copyright (C) 2020 Stefan Roese */ +#include #include #include #include diff --git a/common/spl/spl_mmc.c b/common/spl/spl_mmc.c index ccab0be4be2..3d032bb27ce 100644 --- a/common/spl/spl_mmc.c +++ b/common/spl/spl_mmc.c @@ -5,6 +5,7 @@ * * Aneesh V */ +#include #include #include #include @@ -12,6 +13,7 @@ #include #include #include +#include #include #include #include diff --git a/common/spl/spl_nand.c b/common/spl/spl_nand.c index 5631fa6d563..3b0a1524238 100644 --- a/common/spl/spl_nand.c +++ b/common/spl/spl_nand.c @@ -3,6 +3,7 @@ * Copyright (C) 2011 * Corscience GmbH & Co. KG - Simon Schwarz */ +#include #include #include #include diff --git a/common/spl/spl_net.c b/common/spl/spl_net.c index be7278bb933..898f9df705a 100644 --- a/common/spl/spl_net.c +++ b/common/spl/spl_net.c @@ -6,6 +6,7 @@ * (C) Copyright 2012 * Ilya Yanok */ +#include #include #include #include diff --git a/common/spl/spl_nor.c b/common/spl/spl_nor.c index ed76b5e1293..70745114efe 100644 --- a/common/spl/spl_nor.c +++ b/common/spl/spl_nor.c @@ -3,7 +3,7 @@ * Copyright (C) 2012 Stefan Roese */ -#include +#include #include #include #include diff --git a/common/spl/spl_nvme.c b/common/spl/spl_nvme.c index 0e15a3c7545..c8774d67ecf 100644 --- a/common/spl/spl_nvme.c +++ b/common/spl/spl_nvme.c @@ -5,6 +5,7 @@ * */ +#include #include #include diff --git a/common/spl/spl_onenand.c b/common/spl/spl_onenand.c index f6f65286c21..53a8c6de89e 100644 --- a/common/spl/spl_onenand.c +++ b/common/spl/spl_onenand.c @@ -7,6 +7,7 @@ * Copyright (C) 2011 * Corscience GmbH & Co. KG - Simon Schwarz */ +#include #include #include #include diff --git a/common/spl/spl_opensbi.c b/common/spl/spl_opensbi.c index 5a26d7c31a4..ec62aab929b 100644 --- a/common/spl/spl_opensbi.c +++ b/common/spl/spl_opensbi.c @@ -5,6 +5,7 @@ * * Based on common/spl/spl_atf.c */ +#include #include #include #include diff --git a/common/spl/spl_ram.c b/common/spl/spl_ram.c index 5a23841f698..8aeda237be1 100644 --- a/common/spl/spl_ram.c +++ b/common/spl/spl_ram.c @@ -9,6 +9,7 @@ * Michal Simek * Stefan Agner */ +#include #include #include #include diff --git a/common/spl/spl_sata.c b/common/spl/spl_sata.c index 67fc620d9be..32746ce9f3c 100644 --- a/common/spl/spl_sata.c +++ b/common/spl/spl_sata.c @@ -8,7 +8,9 @@ * Derived work from spl_usb.c */ +#include #include +#include #include #include #include diff --git a/common/spl/spl_sdp.c b/common/spl/spl_sdp.c index 9ca80bd534f..9143c27bbf1 100644 --- a/common/spl/spl_sdp.c +++ b/common/spl/spl_sdp.c @@ -4,6 +4,7 @@ * Author: Stefan Agner */ +#include #include #include #include diff --git a/common/spl/spl_semihosting.c b/common/spl/spl_semihosting.c index 2047248f39b..941fa911040 100644 --- a/common/spl/spl_semihosting.c +++ b/common/spl/spl_semihosting.c @@ -3,6 +3,7 @@ * Copyright (C) 2022 Sean Anderson */ +#include #include #include #include diff --git a/common/spl/spl_spi.c b/common/spl/spl_spi.c index 8ab4803f7c4..89de73c726c 100644 --- a/common/spl/spl_spi.c +++ b/common/spl/spl_spi.c @@ -8,7 +8,7 @@ * Heiko Schocher, DENX Software Engineering, hs@denx.de. */ -#include +#include #include #include #include diff --git a/common/spl/spl_ubi.c b/common/spl/spl_ubi.c index a8d3f43b452..d7ab9efd110 100644 --- a/common/spl/spl_ubi.c +++ b/common/spl/spl_ubi.c @@ -4,6 +4,7 @@ * Ladislav Michl */ +#include #include #include #include diff --git a/common/spl/spl_usb.c b/common/spl/spl_usb.c index 932da56ab6d..479e2dc1826 100644 --- a/common/spl/spl_usb.c +++ b/common/spl/spl_usb.c @@ -8,8 +8,10 @@ * Derived work from spl_mmc.c */ +#include #include #include +#include #include #include #include diff --git a/common/spl/spl_xip.c b/common/spl/spl_xip.c index 1465c3e46b9..959915ffa61 100644 --- a/common/spl/spl_xip.c +++ b/common/spl/spl_xip.c @@ -4,7 +4,7 @@ * Author(s): Vikas Manocha, for STMicroelectronics. */ -#include +#include #include #include #include diff --git a/common/spl/spl_ymodem.c b/common/spl/spl_ymodem.c index 4c7222af612..1faaa2c938d 100644 --- a/common/spl/spl_ymodem.c +++ b/common/spl/spl_ymodem.c @@ -8,11 +8,13 @@ * * Matt Porter */ +#include #include #include #include #include #include +#include #include #define BUF_SIZE 1024 diff --git a/common/splash.c b/common/splash.c index c5591293634..6820db683bd 100644 --- a/common/splash.c +++ b/common/splash.c @@ -20,12 +20,11 @@ * */ +#include #include #include #include #include -#include -#include static struct splash_location default_splash_locations[] = { { diff --git a/common/splash_source.c b/common/splash_source.c index 5b271160449..2ce0768833d 100644 --- a/common/splash_source.c +++ b/common/splash_source.c @@ -5,6 +5,7 @@ * Authors: Igor Grinberg */ +#include #include #include #include diff --git a/common/stackprot.c b/common/stackprot.c index 4e3297b7d00..6495951a773 100644 --- a/common/stackprot.c +++ b/common/stackprot.c @@ -3,6 +3,7 @@ * Copyright 2021 Broadcom */ +#include #include DECLARE_GLOBAL_DATA_PTR; diff --git a/common/stdio.c b/common/stdio.c index a61220ce4b9..e3354f092dc 100644 --- a/common/stdio.c +++ b/common/stdio.c @@ -9,6 +9,7 @@ */ #include +#include #include #include #include diff --git a/common/update.c b/common/update.c index eb0b60a2ce4..ec302ca68fb 100644 --- a/common/update.c +++ b/common/update.c @@ -6,6 +6,7 @@ * Bartlomiej Sieka */ +#include #include #include #include diff --git a/common/usb.c b/common/usb.c index 84b10f5c7d8..99e6b857c74 100644 --- a/common/usb.c +++ b/common/usb.c @@ -25,6 +25,7 @@ * * For each transfer (except "Interrupt") we wait for completion. */ +#include #include #include #include diff --git a/common/usb_hub.c b/common/usb_hub.c index 807f490bb60..2e054eb9353 100644 --- a/common/usb_hub.c +++ b/common/usb_hub.c @@ -21,6 +21,7 @@ * Probes device for being a hub and configurate it */ +#include #include #include #include @@ -28,7 +29,6 @@ #include #include #include -#include #include #include #include diff --git a/common/usb_kbd.c b/common/usb_kbd.c index f3b4a3c94e6..820f591fc5b 100644 --- a/common/usb_kbd.c +++ b/common/usb_kbd.c @@ -6,6 +6,7 @@ * Part of this source has been derived from the Linux USB * project. */ +#include #include #include #include @@ -14,7 +15,6 @@ #include #include #include -#include #include #include #ifdef CONFIG_SANDBOX diff --git a/common/usb_onboard_hub.c b/common/usb_onboard_hub.c index 68a04ac0412..89e18a2ddad 100644 --- a/common/usb_onboard_hub.c +++ b/common/usb_onboard_hub.c @@ -7,6 +7,7 @@ * Mostly inspired by Linux kernel v6.1 onboard_usb_hub driver */ +#include #include #include #include diff --git a/common/usb_storage.c b/common/usb_storage.c index a79ed2e23a4..774d5bdf54b 100644 --- a/common/usb_storage.c +++ b/common/usb_storage.c @@ -32,6 +32,7 @@ */ +#include #include #include #include diff --git a/common/xyzModem.c b/common/xyzModem.c index 9feb240de28..fb319f71190 100644 --- a/common/xyzModem.c +++ b/common/xyzModem.c @@ -21,13 +21,12 @@ * *========================================================================== */ +#include #include #include -#include #include #include #include -#include /* Assumption - run xyzModem protocol over the console port */ diff --git a/configs/phycore_am64x_a53_defconfig b/configs/phycore_am64x_a53_defconfig index 76bb0e53e51..9b52f8ad064 100644 --- a/configs/phycore_am64x_a53_defconfig +++ b/configs/phycore_am64x_a53_defconfig @@ -38,7 +38,6 @@ CONFIG_SPL_LOAD_FIT_ADDRESS=0x81000000 CONFIG_BOOTSTD_FULL=y CONFIG_BOOTCOMMAND="run mmcboot; bootflow scan -lb" CONFIG_DEFAULT_FDT_FILE="oftree" -CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x180000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y diff --git a/disk/disk-uclass.c b/disk/disk-uclass.c index ee3cc4407d7..efe4bf1f949 100644 --- a/disk/disk-uclass.c +++ b/disk/disk-uclass.c @@ -8,6 +8,7 @@ #define LOG_CATEGORY UCLASS_PARTITION +#include #include #include #include diff --git a/disk/part.c b/disk/part.c index bc932526f90..2bee6695828 100644 --- a/disk/part.c +++ b/disk/part.c @@ -4,6 +4,7 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ +#include #include #include #include diff --git a/disk/part_amiga.c b/disk/part_amiga.c index 9b0f2fe7498..65e30fea558 100644 --- a/disk/part_amiga.c +++ b/disk/part_amiga.c @@ -4,12 +4,12 @@ * Hans-Joerg Frieden, Hyperion Entertainment * Hans-JoergF@hyperion-entertainment.com */ +#include #include #include #include #include "part_amiga.h" #include -#include #undef AMIGA_DEBUG diff --git a/disk/part_dos.c b/disk/part_dos.c index e6b5295e0ec..567ead7511d 100644 --- a/disk/part_dos.c +++ b/disk/part_dos.c @@ -13,11 +13,11 @@ * http://developer.apple.com/techpubs/mac/Devices/Devices-126.html#MARKER-14-92 */ +#include #include #include #include #include -#include #include #include #include "part_dos.h" diff --git a/disk/part_efi.c b/disk/part_efi.c index b1a03bd165e..4ce9243ef25 100644 --- a/disk/part_efi.c +++ b/disk/part_efi.c @@ -12,6 +12,7 @@ #define LOG_CATEGORY LOGC_FS +#include #include #include #include diff --git a/disk/part_iso.c b/disk/part_iso.c index 6e05b2feffb..6ac6d95be92 100644 --- a/disk/part_iso.c +++ b/disk/part_iso.c @@ -4,6 +4,7 @@ * Denis Peter, MPL AG Switzerland, d.peter@mpl.ch. */ +#include #include #include #include diff --git a/disk/part_mac.c b/disk/part_mac.c index 81a65823be9..db5e203be59 100644 --- a/disk/part_mac.c +++ b/disk/part_mac.c @@ -12,6 +12,7 @@ * http://developer.apple.com/techpubs/mac/Devices/Devices-126.html#MARKER-14-92 */ +#include #include #include #include diff --git a/doc/develop/codingstyle.rst b/doc/develop/codingstyle.rst index fa3cd6aec82..f6248cdcb1e 100644 --- a/doc/develop/codingstyle.rst +++ b/doc/develop/codingstyle.rst @@ -110,8 +110,9 @@ Include files You should follow this ordering in U-Boot. In all cases, they should be listed in alphabetical order. First comes headers which are located directly in our -top-level include diretory. Second are headers within subdirectories, Finally -directory-local includes should be listed. See this example: +top-level include diretory. This excludes the common.h header file which is to +be removed. Second are headers within subdirectories, Finally directory-local +includes should be listed. See this example: .. code-block:: C @@ -128,6 +129,9 @@ For files that need to be compiled for the host (e.g. tools), you need to use ``#ifndef USE_HOSTCC`` to avoid including U-Boot specific include files. See common/image.c for an example. +If you encounter code which still uses a patch to remove that and +replace it with any required include files directly is much appreciated. + If your file uses driver model, include in the C file. Do not include dm.h in a header file. Try to use forward declarations (e.g. ``struct udevice``) instead. diff --git a/doc/develop/tests_writing.rst b/doc/develop/tests_writing.rst index 44b544fa78b..bb1145da268 100644 --- a/doc/develop/tests_writing.rst +++ b/doc/develop/tests_writing.rst @@ -281,6 +281,7 @@ new one of those, you should add a new suite. Create a new file in test/ or a subdirectory and define a macro to register the suite. For example:: + #include #include #include #include diff --git a/drivers/adc/adc-uclass.c b/drivers/adc/adc-uclass.c index 16600be821c..1b35bf22014 100644 --- a/drivers/adc/adc-uclass.c +++ b/drivers/adc/adc-uclass.c @@ -6,6 +6,7 @@ #define LOG_CATEGORY UCLASS_ADC +#include #include #include #include diff --git a/drivers/adc/exynos-adc.c b/drivers/adc/exynos-adc.c index ecc564cd219..2bda733af90 100644 --- a/drivers/adc/exynos-adc.c +++ b/drivers/adc/exynos-adc.c @@ -3,6 +3,7 @@ * Copyright (C) 2015 Samsung Electronics * Przemyslaw Marczak */ +#include #include #include #include diff --git a/drivers/adc/imx93-adc.c b/drivers/adc/imx93-adc.c index f593fb6447b..41d04e0426c 100644 --- a/drivers/adc/imx93-adc.c +++ b/drivers/adc/imx93-adc.c @@ -6,6 +6,7 @@ * Originally based on NXP linux-imx kernel v5.15 drivers/iio/adc/imx93_adc.c */ +#include #include #include #include diff --git a/drivers/adc/meson-saradc.c b/drivers/adc/meson-saradc.c index 60e348968fb..c15c7fea47f 100644 --- a/drivers/adc/meson-saradc.c +++ b/drivers/adc/meson-saradc.c @@ -7,6 +7,7 @@ * Amlogic Meson Successive Approximation Register (SAR) A/D Converter */ +#include #include #include #include diff --git a/drivers/adc/rockchip-saradc.c b/drivers/adc/rockchip-saradc.c index f6832ab3073..10ded1b088f 100644 --- a/drivers/adc/rockchip-saradc.c +++ b/drivers/adc/rockchip-saradc.c @@ -5,6 +5,7 @@ * Rockchip SARADC driver for U-Boot */ +#include #include #include #include diff --git a/drivers/adc/sandbox.c b/drivers/adc/sandbox.c index 24d4af63bd9..43cad34ffeb 100644 --- a/drivers/adc/sandbox.c +++ b/drivers/adc/sandbox.c @@ -3,6 +3,7 @@ * Copyright (C) 2015 Samsung Electronics * Przemyslaw Marczak */ +#include #include #include #include diff --git a/drivers/adc/stm32-adc-core.c b/drivers/adc/stm32-adc-core.c index af340b8b273..6c176961f17 100644 --- a/drivers/adc/stm32-adc-core.c +++ b/drivers/adc/stm32-adc-core.c @@ -6,6 +6,7 @@ * Originally based on the Linux kernel v4.18 drivers/iio/adc/stm32-adc-core.c. */ +#include #include #include #include diff --git a/drivers/adc/stm32-adc.c b/drivers/adc/stm32-adc.c index d50f00f1233..1fba707c6f7 100644 --- a/drivers/adc/stm32-adc.c +++ b/drivers/adc/stm32-adc.c @@ -6,6 +6,7 @@ * Originally based on the Linux kernel v4.18 drivers/iio/adc/stm32-adc.c. */ +#include #include #include #include diff --git a/drivers/ata/ahci-pci.c b/drivers/ata/ahci-pci.c index f2102aaa635..5356b9d83d3 100644 --- a/drivers/ata/ahci-pci.c +++ b/drivers/ata/ahci-pci.c @@ -3,6 +3,7 @@ * Copyright (C) 2017, Bin Meng */ +#include #include #include #include diff --git a/drivers/ata/ahci-uclass.c b/drivers/ata/ahci-uclass.c index 7affb3f1ec7..d398b50b9a1 100644 --- a/drivers/ata/ahci-uclass.c +++ b/drivers/ata/ahci-uclass.c @@ -6,6 +6,7 @@ #define LOG_CATEGORY UCLASS_AHCI +#include #include #include diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c index ac869296d52..04ddc339464 100644 --- a/drivers/ata/ahci.c +++ b/drivers/ata/ahci.c @@ -8,10 +8,10 @@ * * This driver provides a SCSI interface to SATA. */ +#include #include #include #include -#include #include #include diff --git a/drivers/ata/ahci_mvebu.c b/drivers/ata/ahci_mvebu.c index f6e2d6bee45..f05150d61dd 100644 --- a/drivers/ata/ahci_mvebu.c +++ b/drivers/ata/ahci_mvebu.c @@ -3,6 +3,7 @@ * Copyright (C) 2016 Stefan Roese */ +#include #include #include #include diff --git a/drivers/ata/ahci_sunxi.c b/drivers/ata/ahci_sunxi.c index 6cf5cee055e..9064774e661 100644 --- a/drivers/ata/ahci_sunxi.c +++ b/drivers/ata/ahci_sunxi.c @@ -1,3 +1,4 @@ +#include #include #include #include diff --git a/drivers/ata/dwc_ahci.c b/drivers/ata/dwc_ahci.c index b480cde4465..15fd3e365b2 100644 --- a/drivers/ata/dwc_ahci.c +++ b/drivers/ata/dwc_ahci.c @@ -8,6 +8,7 @@ * Author: Mugunthan V N */ +#include #include #include #include diff --git a/drivers/ata/dwc_ahsata.c b/drivers/ata/dwc_ahsata.c index a29d641343e..b4d4e39c9b3 100644 --- a/drivers/ata/dwc_ahsata.c +++ b/drivers/ata/dwc_ahsata.c @@ -4,6 +4,7 @@ * Terry Lv */ +#include #include #include #include diff --git a/drivers/ata/fsl_sata.c b/drivers/ata/fsl_sata.c index 4990148388b..969bc191f8e 100644 --- a/drivers/ata/fsl_sata.c +++ b/drivers/ata/fsl_sata.c @@ -5,6 +5,7 @@ * Author: Dave Liu */ +#include #include #include #include diff --git a/drivers/ata/libata.c b/drivers/ata/libata.c index ef659cb1728..47e2c5c1cc4 100644 --- a/drivers/ata/libata.c +++ b/drivers/ata/libata.c @@ -5,9 +5,9 @@ * port from the libata of linux kernel */ +#include #include #include -#include u64 ata_id_n_sectors(u16 *id) { diff --git a/drivers/ata/mtk_ahci.c b/drivers/ata/mtk_ahci.c index 53aabee0a5e..2c5227df306 100644 --- a/drivers/ata/mtk_ahci.c +++ b/drivers/ata/mtk_ahci.c @@ -8,6 +8,7 @@ * Author: Frank Wunderlich */ +#include #include #include #include diff --git a/drivers/ata/sata.c b/drivers/ata/sata.c index 84437d3d346..784d9bbeacb 100644 --- a/drivers/ata/sata.c +++ b/drivers/ata/sata.c @@ -9,6 +9,7 @@ * Dave Liu */ +#include #include #include #include diff --git a/drivers/ata/sata_bootdev.c b/drivers/ata/sata_bootdev.c index a5ca6f6fd5b..f638493ce04 100644 --- a/drivers/ata/sata_bootdev.c +++ b/drivers/ata/sata_bootdev.c @@ -5,6 +5,7 @@ * Copyright 2023 Tony Dinh */ +#include #include #include #include diff --git a/drivers/ata/sata_ceva.c b/drivers/ata/sata_ceva.c index a81b3165992..7769d4f99ef 100644 --- a/drivers/ata/sata_ceva.c +++ b/drivers/ata/sata_ceva.c @@ -3,6 +3,7 @@ * (C) Copyright 2015 - 2016 Xilinx, Inc. * Michal Simek */ +#include #include #include #include diff --git a/drivers/ata/sata_mv.c b/drivers/ata/sata_mv.c index ac78760a33e..94d7369351a 100644 --- a/drivers/ata/sata_mv.c +++ b/drivers/ata/sata_mv.c @@ -31,6 +31,7 @@ * No port multiplier support */ +#include #include #include #include @@ -45,7 +46,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/ata/sata_sil.c b/drivers/ata/sata_sil.c index 5b80f6249d7..43a91a79120 100644 --- a/drivers/ata/sata_sil.c +++ b/drivers/ata/sata_sil.c @@ -5,6 +5,7 @@ * Author: Tang Yuantian */ +#include #include #include #include diff --git a/drivers/axi/axi-emul-uclass.c b/drivers/axi/axi-emul-uclass.c index bea0b040738..e6f3ef07200 100644 --- a/drivers/axi/axi-emul-uclass.c +++ b/drivers/axi/axi-emul-uclass.c @@ -6,6 +6,7 @@ #define LOG_CATEGORY UCLASS_AXI_EMUL +#include #include #include #include diff --git a/drivers/axi/axi-uclass.c b/drivers/axi/axi-uclass.c index fa2475cbaf4..41551ae85c9 100644 --- a/drivers/axi/axi-uclass.c +++ b/drivers/axi/axi-uclass.c @@ -6,6 +6,7 @@ #define LOG_CATEGORY UCLASS_AXI +#include #include #include diff --git a/drivers/axi/axi_sandbox.c b/drivers/axi/axi_sandbox.c index 6f698a405f9..b91c91f6b3b 100644 --- a/drivers/axi/axi_sandbox.c +++ b/drivers/axi/axi_sandbox.c @@ -4,6 +4,7 @@ * Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc */ +#include #include #include #include diff --git a/drivers/axi/ihs_axi.c b/drivers/axi/ihs_axi.c index a37dd1e1786..a7e9761fbfc 100644 --- a/drivers/axi/ihs_axi.c +++ b/drivers/axi/ihs_axi.c @@ -7,6 +7,7 @@ * Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc */ +#include #include #include #include diff --git a/drivers/axi/sandbox_store.c b/drivers/axi/sandbox_store.c index b9413c758f7..ef349a50b79 100644 --- a/drivers/axi/sandbox_store.c +++ b/drivers/axi/sandbox_store.c @@ -4,6 +4,7 @@ * Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc */ +#include #include #include #include diff --git a/drivers/bios_emulator/atibios.c b/drivers/bios_emulator/atibios.c index d544ffb5ffb..7ebead6bfad 100644 --- a/drivers/bios_emulator/atibios.c +++ b/drivers/bios_emulator/atibios.c @@ -45,6 +45,7 @@ * Jason ported this file to u-boot to run the ATI video card * BIOS in u-boot. ****************************************************************************/ +#include #include #include #include diff --git a/drivers/bios_emulator/besys.c b/drivers/bios_emulator/besys.c index 690fb5a4d7b..02c4286a854 100644 --- a/drivers/bios_emulator/besys.c +++ b/drivers/bios_emulator/besys.c @@ -48,6 +48,7 @@ ****************************************************************************/ #define __io +#include #include #include "biosemui.h" diff --git a/drivers/bios_emulator/bios.c b/drivers/bios_emulator/bios.c index 7f883daf8f0..9596a1fdd3e 100644 --- a/drivers/bios_emulator/bios.c +++ b/drivers/bios_emulator/bios.c @@ -42,6 +42,7 @@ ****************************************************************************/ #define __io +#include #include #include "biosemui.h" diff --git a/drivers/bios_emulator/biosemu.c b/drivers/bios_emulator/biosemu.c index ba4328474ce..82befbae66f 100644 --- a/drivers/bios_emulator/biosemu.c +++ b/drivers/bios_emulator/biosemu.c @@ -46,6 +46,7 @@ ****************************************************************************/ #include +#include #include "biosemui.h" BE_sysEnv _BE_env = {{0}}; diff --git a/drivers/bios_emulator/x86emu/debug.c b/drivers/bios_emulator/x86emu/debug.c index b426dc3bc45..95f3cc09aad 100644 --- a/drivers/bios_emulator/x86emu/debug.c +++ b/drivers/bios_emulator/x86emu/debug.c @@ -38,6 +38,7 @@ ****************************************************************************/ #include +#include #include #include #include "x86emu/x86emui.h" diff --git a/drivers/bios_emulator/x86emu/decode.c b/drivers/bios_emulator/x86emu/decode.c index 7e188d58a52..e2028eaf083 100644 --- a/drivers/bios_emulator/x86emu/decode.c +++ b/drivers/bios_emulator/x86emu/decode.c @@ -36,6 +36,7 @@ * instruction decoding and accessess of immediate data via IP. etc. * ****************************************************************************/ +#include #include #include "x86emu/x86emui.h" diff --git a/drivers/bios_emulator/x86emu/ops.c b/drivers/bios_emulator/x86emu/ops.c index 57422ec3d47..8c1a146165c 100644 --- a/drivers/bios_emulator/x86emu/ops.c +++ b/drivers/bios_emulator/x86emu/ops.c @@ -72,6 +72,7 @@ * ****************************************************************************/ +#include #include #include "x86emu/x86emui.h" diff --git a/drivers/bios_emulator/x86emu/ops2.c b/drivers/bios_emulator/x86emu/ops2.c index 32fecb34791..6cd1ac39825 100644 --- a/drivers/bios_emulator/x86emu/ops2.c +++ b/drivers/bios_emulator/x86emu/ops2.c @@ -41,6 +41,7 @@ * ****************************************************************************/ +#include #include #include #include "x86emu/x86emui.h" diff --git a/drivers/bios_emulator/x86emu/prim_ops.c b/drivers/bios_emulator/x86emu/prim_ops.c index b3cccb17f20..5f6c795fb7f 100644 --- a/drivers/bios_emulator/x86emu/prim_ops.c +++ b/drivers/bios_emulator/x86emu/prim_ops.c @@ -97,6 +97,7 @@ * ****************************************************************************/ +#include #define PRIM_OPS_NO_REDEFINE_ASM #include "x86emu/x86emui.h" diff --git a/drivers/bios_emulator/x86emu/sys.c b/drivers/bios_emulator/x86emu/sys.c index 483ecd52efe..f96652415cd 100644 --- a/drivers/bios_emulator/x86emu/sys.c +++ b/drivers/bios_emulator/x86emu/sys.c @@ -39,6 +39,7 @@ * ****************************************************************************/ +#include #include #include "x86emu/x86emui.h" diff --git a/drivers/block/blk-uclass.c b/drivers/block/blk-uclass.c index 512c952f4d7..77066da352a 100644 --- a/drivers/block/blk-uclass.c +++ b/drivers/block/blk-uclass.c @@ -6,6 +6,7 @@ #define LOG_CATEGORY UCLASS_BLK +#include #include #include #include diff --git a/drivers/block/blk_legacy.c b/drivers/block/blk_legacy.c index f36932183d1..5bf1d047152 100644 --- a/drivers/block/blk_legacy.c +++ b/drivers/block/blk_legacy.c @@ -4,6 +4,7 @@ * Written by Simon Glass */ +#include #include #include #include diff --git a/drivers/block/blkcache.c b/drivers/block/blkcache.c index 0e69160249c..26bcbea4353 100644 --- a/drivers/block/blkcache.c +++ b/drivers/block/blkcache.c @@ -4,6 +4,7 @@ * Author: Eric Nelson * */ +#include #include #include #include diff --git a/drivers/block/blkmap.c b/drivers/block/blkmap.c index 34eed1380dc..21201409ed4 100644 --- a/drivers/block/blkmap.c +++ b/drivers/block/blkmap.c @@ -4,6 +4,7 @@ * Author: Tobias Waldekranz */ +#include #include #include #include diff --git a/drivers/block/efi-media-uclass.c b/drivers/block/efi-media-uclass.c index dc5e4f59b7f..e012f6f2f4c 100644 --- a/drivers/block/efi-media-uclass.c +++ b/drivers/block/efi-media-uclass.c @@ -5,6 +5,7 @@ * Copyright 2021 Google LLC */ +#include #include UCLASS_DRIVER(efi_media) = { diff --git a/drivers/block/efi_blk.c b/drivers/block/efi_blk.c index 9766cd6f832..917a19f6025 100644 --- a/drivers/block/efi_blk.c +++ b/drivers/block/efi_blk.c @@ -8,6 +8,7 @@ * Copyright 2021 Google LLC */ +#include #include #include #include diff --git a/drivers/block/host-uclass.c b/drivers/block/host-uclass.c index cf42bd1e07a..b3647e3ce33 100644 --- a/drivers/block/host-uclass.c +++ b/drivers/block/host-uclass.c @@ -9,6 +9,7 @@ #define LOG_CATEGORY UCLASS_HOST +#include #include #include #include diff --git a/drivers/block/host_dev.c b/drivers/block/host_dev.c index b3ff3cd1fab..52313435a0c 100644 --- a/drivers/block/host_dev.c +++ b/drivers/block/host_dev.c @@ -9,6 +9,7 @@ #define LOG_CATEGORY UCLASS_HOST +#include #include #include #include diff --git a/drivers/block/ide.c b/drivers/block/ide.c index b16623d7a3a..c698f9cbd55 100644 --- a/drivers/block/ide.c +++ b/drivers/block/ide.c @@ -6,6 +6,7 @@ #define LOG_CATEGORY UCLASS_IDE +#include #include #include #include diff --git a/drivers/block/sandbox.c b/drivers/block/sandbox.c index ec34f1ad8c2..be4e02cb601 100644 --- a/drivers/block/sandbox.c +++ b/drivers/block/sandbox.c @@ -3,6 +3,7 @@ * Copyright (C) 2013 Henrik Nordstrom */ +#include #include #include #include diff --git a/drivers/block/sb_efi_media.c b/drivers/block/sb_efi_media.c index 3255db06496..52af155a600 100644 --- a/drivers/block/sb_efi_media.c +++ b/drivers/block/sb_efi_media.c @@ -5,6 +5,7 @@ * Copyright 2021 Google LLC */ +#include #include static const struct udevice_id sandbox_efi_media_ids[] = { diff --git a/drivers/bootcount/bootcount-uclass.c b/drivers/bootcount/bootcount-uclass.c index 0178c1818e5..5a369c82f1c 100644 --- a/drivers/bootcount/bootcount-uclass.c +++ b/drivers/bootcount/bootcount-uclass.c @@ -5,6 +5,7 @@ #define LOG_CATEGORY UCLASS_BOOTCOUNT +#include #include #include #include diff --git a/drivers/bootcount/bootcount_at91.c b/drivers/bootcount/bootcount_at91.c index 1a06db1fb74..c4ab5ceafab 100644 --- a/drivers/bootcount/bootcount_at91.c +++ b/drivers/bootcount/bootcount_at91.c @@ -1,5 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ +#include #include #include #include diff --git a/drivers/bootcount/bootcount_env.c b/drivers/bootcount/bootcount_env.c index 960cd71b9d5..b75c9002b2c 100644 --- a/drivers/bootcount/bootcount_env.c +++ b/drivers/bootcount/bootcount_env.c @@ -4,6 +4,7 @@ * Heiko Schocher, DENX Software Engineering, hs@denx.de. */ +#include #include void bootcount_store(ulong a) diff --git a/drivers/bootcount/bootcount_ram.c b/drivers/bootcount/bootcount_ram.c index 33e157b865a..8cc30cf40ef 100644 --- a/drivers/bootcount/bootcount_ram.c +++ b/drivers/bootcount/bootcount_ram.c @@ -4,6 +4,7 @@ * Heiko Schocher, DENX Software Engineering, hs@denx.de. */ +#include #include #include #include diff --git a/drivers/bootcount/bootcount_syscon.c b/drivers/bootcount/bootcount_syscon.c index 5dbc13cd545..f80d87071d9 100644 --- a/drivers/bootcount/bootcount_syscon.c +++ b/drivers/bootcount/bootcount_syscon.c @@ -3,6 +3,7 @@ * Copyright (c) Vaisala Oyj. All rights reserved. */ +#include #include #include #include diff --git a/drivers/bootcount/i2c-eeprom.c b/drivers/bootcount/i2c-eeprom.c index 12c430465c9..709be094b11 100644 --- a/drivers/bootcount/i2c-eeprom.c +++ b/drivers/bootcount/i2c-eeprom.c @@ -4,6 +4,7 @@ * (C) Copyright 2019 GE */ +#include #include #include #include diff --git a/drivers/bootcount/pmic_pfuze100.c b/drivers/bootcount/pmic_pfuze100.c index 8c529f5592b..df046f1b0ab 100644 --- a/drivers/bootcount/pmic_pfuze100.c +++ b/drivers/bootcount/pmic_pfuze100.c @@ -8,6 +8,7 @@ * This works only, if the PMIC is not connected to a battery. */ +#include #include #include #include diff --git a/drivers/bootcount/rtc.c b/drivers/bootcount/rtc.c index b131946aa9d..483caaa80df 100644 --- a/drivers/bootcount/rtc.c +++ b/drivers/bootcount/rtc.c @@ -3,6 +3,7 @@ * (C) Copyright 2018 Theobroma Systems Design und Consulting GmbH */ +#include #include #include #include diff --git a/drivers/bootcount/spi-flash.c b/drivers/bootcount/spi-flash.c index 155d0323ee7..03050e66613 100644 --- a/drivers/bootcount/spi-flash.c +++ b/drivers/bootcount/spi-flash.c @@ -4,6 +4,7 @@ * (C) Copyright 2019 GE */ +#include #include #include #include diff --git a/drivers/bus/ti-pwmss.c b/drivers/bus/ti-pwmss.c index d1f6f3bab00..265b4cf83b5 100644 --- a/drivers/bus/ti-pwmss.c +++ b/drivers/bus/ti-pwmss.c @@ -5,6 +5,7 @@ * Copyright (C) 2020 Dario Binacchi */ +#include #include static const struct udevice_id ti_pwmss_ids[] = { diff --git a/drivers/bus/ti-sysc.c b/drivers/bus/ti-sysc.c index 5f9f0a0d0b7..778c0654f6a 100644 --- a/drivers/bus/ti-sysc.c +++ b/drivers/bus/ti-sysc.c @@ -5,6 +5,7 @@ * Copyright (C) 2020 Dario Binacchi */ +#include #include #include #include diff --git a/drivers/button/button-adc.c b/drivers/button/button-adc.c index da7ddf2a857..9c24c960e6f 100644 --- a/drivers/button/button-adc.c +++ b/drivers/button/button-adc.c @@ -5,6 +5,7 @@ * Author: Marek Szyprowski */ +#include #include #include #include diff --git a/drivers/button/button-gpio.c b/drivers/button/button-gpio.c index 43b82d98aeb..7b5b3affe2d 100644 --- a/drivers/button/button-gpio.c +++ b/drivers/button/button-gpio.c @@ -3,6 +3,7 @@ * Copyright (C) 2020 Philippe Reynes */ +#include #include #include #include diff --git a/drivers/button/button-uclass.c b/drivers/button/button-uclass.c index cda243389df..032191d61ab 100644 --- a/drivers/button/button-uclass.c +++ b/drivers/button/button-uclass.c @@ -7,6 +7,7 @@ #define LOG_CATEGORY UCLASS_BUTTON +#include #include #include #include diff --git a/drivers/cache/cache-andes-l2.c b/drivers/cache/cache-andes-l2.c index 7de8f16852d..45d29f2fbd9 100644 --- a/drivers/cache/cache-andes-l2.c +++ b/drivers/cache/cache-andes-l2.c @@ -4,6 +4,7 @@ * Rick Chen, Andes Technology Corporation */ +#include #include #include #include diff --git a/drivers/cache/cache-l2x0.c b/drivers/cache/cache-l2x0.c index c7bdd9d064a..560f4c94f1e 100644 --- a/drivers/cache/cache-l2x0.c +++ b/drivers/cache/cache-l2x0.c @@ -2,6 +2,7 @@ /* * Copyright (C) 2019 Intel Corporation */ +#include #include #include diff --git a/drivers/cache/cache-sifive-ccache.c b/drivers/cache/cache-sifive-ccache.c index cc00b80f60b..521df40466f 100644 --- a/drivers/cache/cache-sifive-ccache.c +++ b/drivers/cache/cache-sifive-ccache.c @@ -3,6 +3,7 @@ * Copyright (C) 2021 SiFive */ +#include #include #include #include diff --git a/drivers/cache/cache-uclass.c b/drivers/cache/cache-uclass.c index 300e7bc86e1..0c13dbdb75c 100644 --- a/drivers/cache/cache-uclass.c +++ b/drivers/cache/cache-uclass.c @@ -5,6 +5,7 @@ #define LOG_CATEGORY UCLASS_CACHE +#include #include #include diff --git a/drivers/cache/sandbox_cache.c b/drivers/cache/sandbox_cache.c index 2e20b83ab80..955dfc8a0f8 100644 --- a/drivers/cache/sandbox_cache.c +++ b/drivers/cache/sandbox_cache.c @@ -3,6 +3,7 @@ * Copyright (C) 2019 Intel Corporation */ +#include #include #include #include diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig index 9acbc47fe8e..bda6873be33 100644 --- a/drivers/clk/Kconfig +++ b/drivers/clk/Kconfig @@ -246,7 +246,6 @@ config CLK_ZYNQMP This clock driver adds support for clock realted settings for ZynqMP platform. -source "drivers/clk/adi/Kconfig" source "drivers/clk/analogbits/Kconfig" source "drivers/clk/at91/Kconfig" source "drivers/clk/exynos/Kconfig" diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile index 847b9b29110..638ad04baeb 100644 --- a/drivers/clk/Makefile +++ b/drivers/clk/Makefile @@ -12,7 +12,6 @@ obj-$(CONFIG_$(SPL_TPL_)CLK_CCF) += clk-fixed-factor.o obj-$(CONFIG_$(SPL_TPL_)CLK_COMPOSITE_CCF) += clk-composite.o obj-$(CONFIG_$(SPL_TPL_)CLK_GPIO) += clk-gpio.o -obj-y += adi/ obj-y += analogbits/ obj-y += imx/ obj-$(CONFIG_CLK_JH7110) += starfive/ diff --git a/drivers/clk/adi/Kconfig b/drivers/clk/adi/Kconfig deleted file mode 100644 index 5745bedf88c..00000000000 --- a/drivers/clk/adi/Kconfig +++ /dev/null @@ -1,83 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0-or-later -# -# (C) Copyright 2022 - Analog Devices, Inc. -# -# Written and/or maintained by Timesys Corporation -# -# Contact: Nathan Barrett-Morrison -# Contact: Greg Malysa -# - -config COMMON_CLK_ADI_SHARED - bool "Enable shared ADI clock framework code" - help - Required for shared code between SoC clock drivers. Automatically - selected by an appropriate SoC-specific clock driver version. - -config COMMON_CLK_ADI_SC598 - bool "Clock driver for ADI SC598 SoCs" - select DM - select CLK - select CLK_CCF - select OF_CONTROL - select CMD_CLK - select SPL_DM if SPL - select SPL_CLK if SPL - select SPL_CLK_CCF if SPL - select SPL_OF_CONTROL if SPL - select COMMON_CLK_ADI_SHARED - depends on SC59X_64 - help - This driver supports the system clocks on Analog Devices SC598-series - SoCs. It includes CGU and CDU clocks and supports gating unused clocks. - Modifying PLL configuration is not supported; that must be done prior - to booting the kernel. Clock dividers after the PLLs may be configured. - -config COMMON_CLK_ADI_SC594 - bool "Clock driver for ADI SC594 SoCs" - select DM - select CLK - select CLK_CCF - select OF_CONTROL - select CMD_CLK - select SPL_DM if SPL - select SPL_CLK if SPL - select SPL_CLK_CCF if SPL - select SPL_OF_CONTROL if SPL - select COMMON_CLK_ADI_SHARED - depends on SC59X - help - This driver supports the system clocks on Analog Devices SC594-series - SoCs. It includes CGU and CDU clocks and supports gating unused clocks. - Modifying PLL configuration is not supported; that must be done prior - to booting the kernel. Clock dividers after the PLLs may be configured. - -config COMMON_CLK_ADI_SC58X - bool "Clock driver for ADI SC58X SoCs" - select DM - select CLK - select CLK_CCF - select OF_CONTROL - select CMD_CLK - select COMMON_CLK_ADI_SHARED - depends on SC58X - help - This driver supports the system clocks on Analog Devices SC58x-series - SoCs. It includes CGU and CDU clocks and supports gating unused clocks. - Modifying PLL configuration is not supported; that must be done prior - to booting the kernel. Clock dividers after the PLLs may be configured. - -config COMMON_CLK_ADI_SC57X - bool "Clock driver for ADI SC57X SoCs" - select DM - select CLK - select CLK_CCF - select OF_CONTROL - select CMD_CLK - select COMMON_CLK_ADI_SHARED - depends on SC57X - help - This driver supports the system clocks on Analog Devices SC57x-series - SoCs. It includes CGU and CDU clocks and supports gating unused clocks. - Modifying PLL configuration is not supported; that must be done prior - to booting the kernel. Clock dividers after the PLLs may be configured. diff --git a/drivers/clk/adi/Makefile b/drivers/clk/adi/Makefile deleted file mode 100644 index f3f1fd92e5f..00000000000 --- a/drivers/clk/adi/Makefile +++ /dev/null @@ -1,16 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0-or-later -# -# (C) Copyright 2022 - Analog Devices, Inc. -# -# Written and/or maintained by Timesys Corporation -# -# Contact: Nathan Barrett-Morrison -# Contact: Greg Malysa -# - -obj-$(CONFIG_COMMON_CLK_ADI_SHARED) += clk-shared.o clk-adi-pll.o - -obj-$(CONFIG_COMMON_CLK_ADI_SC594) += clk-adi-sc594.o -obj-$(CONFIG_COMMON_CLK_ADI_SC598) += clk-adi-sc598.o -obj-$(CONFIG_COMMON_CLK_ADI_SC58X) += clk-adi-sc58x.o -obj-$(CONFIG_COMMON_CLK_ADI_SC57X) += clk-adi-sc57x.o diff --git a/drivers/clk/adi/clk-adi-pll.c b/drivers/clk/adi/clk-adi-pll.c deleted file mode 100644 index 372baa9c11b..00000000000 --- a/drivers/clk/adi/clk-adi-pll.c +++ /dev/null @@ -1,93 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * (C) Copyright 2022 - Analog Devices, Inc. - * - * Written and/or maintained by Timesys Corporation - * - * Author: Greg Malysa - * - * Ported from Linux: Nathan Barrett-Morrison - */ - -#include -#include -#include -#include -#include -#include -#include - -#include "clk.h" - -#define ADI_CLK_PLL_GENERIC "adi_clk_pll_generic" - -struct clk_sc5xx_cgu_pll { - struct clk clk; - void __iomem *base; - u32 mask; - u32 max; - u32 m_offset; - u8 shift; - bool half_m; -}; - -#define to_clk_sc5xx_cgu_pll(_clk) container_of(_clk, struct clk_sc5xx_cgu_pll, clk) - -static unsigned long sc5xx_cgu_pll_get_rate(struct clk *clk) -{ - struct clk_sc5xx_cgu_pll *pll = to_clk_sc5xx_cgu_pll(dev_get_clk_ptr(clk->dev)); - unsigned long parent_rate = clk_get_parent_rate(clk); - - u32 reg = readl(pll->base); - u32 m = ((reg & pll->mask) >> pll->shift) + pll->m_offset; - - if (m == 0) - m = pll->max; - - if (pll->half_m) - return parent_rate * m * 2; - return parent_rate * m; -} - -static const struct clk_ops clk_sc5xx_cgu_pll_ops = { - .get_rate = sc5xx_cgu_pll_get_rate, -}; - -struct clk *sc5xx_cgu_pll(const char *name, const char *parent_name, - void __iomem *base, u8 shift, u8 width, u32 m_offset, - bool half_m) -{ - struct clk_sc5xx_cgu_pll *pll; - struct clk *clk; - int ret; - char *drv_name = ADI_CLK_PLL_GENERIC; - - pll = kzalloc(sizeof(*pll), GFP_KERNEL); - if (!pll) - return ERR_PTR(-ENOMEM); - - pll->base = base; - pll->shift = shift; - pll->mask = GENMASK(width - 1, 0) << shift; - pll->max = pll->mask + 1; - pll->m_offset = m_offset; - pll->half_m = half_m; - - clk = &pll->clk; - - ret = clk_register(clk, drv_name, name, parent_name); - if (ret) { - pr_err("Failed to register %s in %s: %d\n", name, __func__, ret); - kfree(pll); - return ERR_PTR(ret); - } - - return clk; -} - -U_BOOT_DRIVER(clk_adi_pll_generic) = { - .name = ADI_CLK_PLL_GENERIC, - .id = UCLASS_CLK, - .ops = &clk_sc5xx_cgu_pll_ops, - .flags = DM_FLAG_PRE_RELOC, -}; diff --git a/drivers/clk/adi/clk-adi-sc57x.c b/drivers/clk/adi/clk-adi-sc57x.c deleted file mode 100644 index b17563f0444..00000000000 --- a/drivers/clk/adi/clk-adi-sc57x.c +++ /dev/null @@ -1,206 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * (C) Copyright 2022 - Analog Devices, Inc. - * - * Written and/or maintained by Timesys Corporation - * - * Author: Greg Malysa - * - * Ported from Linux: Nathan Barrett-Morrison - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include "clk.h" - -static const char * const cgu1_in_sels[] = {"sys_clkin0", "sys_clkin1"}; -static const char * const sharc0_sels[] = {"cclk0_0", "sysclk_0", "dummy", "dummy"}; -static const char * const sharc1_sels[] = {"cclk0_0", "sysclk_0", "dummy", "dummy"}; -static const char * const arm_sels[] = {"cclk1_0", "sysclk_0", "dummy", "dummy"}; -static const char * const cdu_ddr_sels[] = {"dclk_0", "dclk_1", "dummy", "dummy"}; -static const char * const can_sels[] = {"oclk_0", "oclk_1", "dclk_1", "oclk_0_half"}; -static const char * const spdif_sels[] = {"oclk_0", "oclk_1", "dclk_1", "dclk_0"}; -static const char * const gige_sels[] = {"sclk1_0", "sclk1_1", "cclk0_1", "oclk_0"}; -static const char * const sdio_sels[] = {"oclk_0_half", "cclk1_1_half", "cclk1_1", - "dclk_1"}; - -static int sc57x_clock_probe(struct udevice *dev) -{ - void __iomem *cgu0; - void __iomem *cgu1; - void __iomem *cdu; - int ret; - struct resource res; - - struct clk *clks[ADSP_SC57X_CLK_END]; - struct clk dummy, clkin0, clkin1; - - ret = dev_read_resource_byname(dev, "cgu0", &res); - if (ret) - return ret; - cgu0 = devm_ioremap(dev, res.start, resource_size(&res)); - - ret = dev_read_resource_byname(dev, "cgu1", &res); - if (ret) - return ret; - cgu1 = devm_ioremap(dev, res.start, resource_size(&res)); - - ret = dev_read_resource_byname(dev, "cdu", &res); - if (ret) - return ret; - cdu = devm_ioremap(dev, res.start, resource_size(&res)); - - // Input clock configuration - clk_get_by_name(dev, "dummy", &dummy); - clk_get_by_name(dev, "sys_clkin0", &clkin0); - clk_get_by_name(dev, "sys_clkin1", &clkin1); - - clks[ADSP_SC57X_CLK_DUMMY] = &dummy; - clks[ADSP_SC57X_CLK_SYS_CLKIN0] = &clkin0; - clks[ADSP_SC57X_CLK_SYS_CLKIN1] = &clkin1; - - clks[ADSP_SC57X_CLK_CGU1_IN] = clk_register_mux(NULL, "cgu1_in_sel", cgu1_in_sels, - 2, CLK_SET_RATE_PARENT, - cdu + CDU_CLKINSEL, 0, 1, 0); - - // CGU configuration and internal clocks - clks[ADSP_SC57X_CLK_CGU0_PLL_IN] = clk_register_divider(NULL, "cgu0_df", - "sys_clkin0", - CLK_SET_RATE_PARENT, - cgu0 + CGU_CTL, 0, 1, 0); - clks[ADSP_SC57X_CLK_CGU1_PLL_IN] = clk_register_divider(NULL, "cgu1_df", - "cgu1_in_sel", - CLK_SET_RATE_PARENT, - cgu1 + CGU_CTL, 0, 1, 0); - - // VCO output == PLL output - clks[ADSP_SC57X_CLK_CGU0_PLLCLK] = sc5xx_cgu_pll("cgu0_pllclk", "cgu0_df", - cgu0 + CGU_CTL, CGU_MSEL_SHIFT, - CGU_MSEL_WIDTH, 0, false); - clks[ADSP_SC57X_CLK_CGU1_PLLCLK] = sc5xx_cgu_pll("cgu1_pllclk", "cgu1_df", - cgu1 + CGU_CTL, CGU_MSEL_SHIFT, - CGU_MSEL_WIDTH, 0, false); - - // Dividers from pll output - clks[ADSP_SC57X_CLK_CGU0_CDIV] = cgu_divider("cgu0_cdiv", "cgu0_pllclk", - cgu0 + CGU_DIV, 0, 5, 0); - clks[ADSP_SC57X_CLK_CGU0_SYSCLK] = cgu_divider("sysclk_0", "cgu0_pllclk", - cgu0 + CGU_DIV, 8, 5, 0); - clks[ADSP_SC57X_CLK_CGU0_DDIV] = cgu_divider("cgu0_ddiv", "cgu0_pllclk", - cgu0 + CGU_DIV, 16, 5, 0); - clks[ADSP_SC57X_CLK_CGU0_ODIV] = cgu_divider("cgu0_odiv", "cgu0_pllclk", - cgu0 + CGU_DIV, 22, 7, 0); - clks[ADSP_SC57X_CLK_CGU0_S0SELDIV] = cgu_divider("cgu0_s0seldiv", "sysclk_0", - cgu0 + CGU_DIV, 5, 3, 0); - clks[ADSP_SC57X_CLK_CGU0_S1SELDIV] = cgu_divider("cgu0_s1seldiv", "sysclk_0", - cgu0 + CGU_DIV, 13, 3, 0); - - clks[ADSP_SC57X_CLK_CGU1_CDIV] = cgu_divider("cgu1_cdiv", "cgu1_pllclk", - cgu1 + CGU_DIV, 0, 5, 0); - clks[ADSP_SC57X_CLK_CGU1_SYSCLK] = cgu_divider("sysclk_1", "cgu1_pllclk", - cgu1 + CGU_DIV, 8, 5, 0); - clks[ADSP_SC57X_CLK_CGU1_DDIV] = cgu_divider("cgu1_ddiv", "cgu1_pllclk", - cgu1 + CGU_DIV, 16, 5, 0); - clks[ADSP_SC57X_CLK_CGU1_ODIV] = cgu_divider("cgu1_odiv", "cgu1_pllclk", - cgu1 + CGU_DIV, 22, 7, 0); - clks[ADSP_SC57X_CLK_CGU1_S0SELDIV] = cgu_divider("cgu1_s0seldiv", - "sysclk_1", cgu1 + CGU_DIV, 5, - 3, 0); - clks[ADSP_SC57X_CLK_CGU1_S1SELDIV] = cgu_divider("cgu1_s1seldiv", - "sysclk_1", cgu1 + CGU_DIV, 13, - 3, 0); - - // Gates to enable CGU outputs - clks[ADSP_SC57X_CLK_CGU0_CCLK0] = cgu_gate("cclk0_0", "cgu0_cdiv", - cgu0 + CGU_CCBF_DIS, 0); - clks[ADSP_SC57X_CLK_CGU0_CCLK1] = cgu_gate("cclk1_0", "cgu0_cdiv", - cgu1 + CGU_CCBF_DIS, 1); - clks[ADSP_SC57X_CLK_CGU0_OCLK] = cgu_gate("oclk_0", "cgu0_odiv", - cgu0 + CGU_SCBF_DIS, 3); - clks[ADSP_SC57X_CLK_CGU0_DCLK] = cgu_gate("dclk_0", "cgu0_ddiv", - cgu0 + CGU_SCBF_DIS, 2); - clks[ADSP_SC57X_CLK_CGU0_SCLK1] = cgu_gate("sclk1_0", "cgu0_s1seldiv", - cgu0 + CGU_SCBF_DIS, 1); - clks[ADSP_SC57X_CLK_CGU0_SCLK0] = cgu_gate("sclk0_0", "cgu0_s0seldiv", - cgu0 + CGU_SCBF_DIS, 0); - - clks[ADSP_SC57X_CLK_CGU1_CCLK0] = cgu_gate("cclk0_1", "cgu1_cdiv", - cgu1 + CGU_CCBF_DIS, 0); - clks[ADSP_SC57X_CLK_CGU1_CCLK1] = cgu_gate("cclk1_1", "cgu1_cdiv", - cgu1 + CGU_CCBF_DIS, 1); - clks[ADSP_SC57X_CLK_CGU1_OCLK] = cgu_gate("oclk_1", "cgu1_odiv", - cgu1 + CGU_SCBF_DIS, 3); - clks[ADSP_SC57X_CLK_CGU1_DCLK] = cgu_gate("dclk_1", "cgu1_ddiv", - cgu1 + CGU_SCBF_DIS, 2); - clks[ADSP_SC57X_CLK_CGU1_SCLK1] = cgu_gate("sclk1_1", "cgu1_s1seldiv", - cgu1 + CGU_SCBF_DIS, 1); - clks[ADSP_SC57X_CLK_CGU1_SCLK0] = cgu_gate("sclk0_1", "cgu1_s0seldiv", - cgu1 + CGU_SCBF_DIS, 0); - - // Extra half rate clocks generated in the CDU - clks[ADSP_SC57X_CLK_OCLK0_HALF] = clk_register_fixed_factor(NULL, "oclk_0_half", - "oclk_0", - CLK_SET_RATE_PARENT, - 1, 2); - clks[ADSP_SC57X_CLK_CCLK1_1_HALF] = clk_register_fixed_factor(NULL, - "cclk1_1_half", - "cclk1_1", - CLK_SET_RATE_PARENT, - 1, 2); - - // CDU output muxes - clks[ADSP_SC57X_CLK_SHARC0_SEL] = cdu_mux("sharc0_sel", cdu + CDU_CFG0, - sharc0_sels); - clks[ADSP_SC57X_CLK_SHARC1_SEL] = cdu_mux("sharc1_sel", cdu + CDU_CFG1, - sharc1_sels); - clks[ADSP_SC57X_CLK_ARM_SEL] = cdu_mux("arm_sel", cdu + CDU_CFG2, arm_sels); - clks[ADSP_SC57X_CLK_CDU_DDR_SEL] = cdu_mux("cdu_ddr_sel", cdu + CDU_CFG3, - cdu_ddr_sels); - clks[ADSP_SC57X_CLK_CAN_SEL] = cdu_mux("can_sel", cdu + CDU_CFG4, can_sels); - clks[ADSP_SC57X_CLK_SPDIF_SEL] = cdu_mux("spdif_sel", cdu + CDU_CFG5, spdif_sels); - clks[ADSP_SC57X_CLK_GIGE_SEL] = cdu_mux("gige_sel", cdu + CDU_CFG7, gige_sels); - clks[ADSP_SC57X_CLK_SDIO_SEL] = cdu_mux("sdio_sel", cdu + CDU_CFG9, sdio_sels); - - // CDU output enable gates - clks[ADSP_SC57X_CLK_SHARC0] = cdu_gate("sharc0", "sharc0_sel", cdu + CDU_CFG0, - CLK_IS_CRITICAL); - clks[ADSP_SC57X_CLK_SHARC1] = cdu_gate("sharc1", "sharc1_sel", cdu + CDU_CFG1, - CLK_IS_CRITICAL); - clks[ADSP_SC57X_CLK_ARM] = cdu_gate("arm", "arm_sel", cdu + CDU_CFG2, - CLK_IS_CRITICAL); - clks[ADSP_SC57X_CLK_CDU_DDR] = cdu_gate("cdu_ddr", "cdu_ddr_sel", cdu + CDU_CFG3, - CLK_IS_CRITICAL); - clks[ADSP_SC57X_CLK_CAN] = cdu_gate("can", "can_sel", cdu + CDU_CFG4, 0); - clks[ADSP_SC57X_CLK_SPDIF] = cdu_gate("spdif", "spdif_sel", cdu + CDU_CFG5, 0); - clks[ADSP_SC57X_CLK_GIGE] = cdu_gate("gige", "gige_sel", cdu + CDU_CFG7, 0); - clks[ADSP_SC57X_CLK_SDIO] = cdu_gate("sdio", "sdio_sel", cdu + CDU_CFG9, 0); - - ret = cdu_check_clocks(clks, ARRAY_SIZE(clks)); - if (ret) - pr_err("CDU error detected\n"); - - return ret; -} - -static const struct udevice_id adi_sc57x_clk_ids[] = { - { .compatible = "adi,sc57x-clocks" }, - { }, -}; - -U_BOOT_DRIVER(adi_sc57x_clk) = { - .name = "clk_adi_sc57x", - .id = UCLASS_CLK, - .of_match = adi_sc57x_clk_ids, - .ops = &adi_clk_ops, - .probe = sc57x_clock_probe, - .flags = DM_FLAG_PRE_RELOC, -}; diff --git a/drivers/clk/adi/clk-adi-sc58x.c b/drivers/clk/adi/clk-adi-sc58x.c deleted file mode 100644 index 05a0feddec7..00000000000 --- a/drivers/clk/adi/clk-adi-sc58x.c +++ /dev/null @@ -1,222 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * (C) Copyright 2022 - Analog Devices, Inc. - * - * Written and/or maintained by Timesys Corporation - * - * Author: Greg Malysa - * - * Ported from Linux: Nathan Barrett-Morrison - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include "clk.h" - -static const char * const cgu1_in_sels[] = {"sys_clkin0", "sys_clkin1"}; -static const char * const sharc0_sels[] = {"cclk0_0", "sysclk_0", "dummy", "dummy"}; -static const char * const sharc1_sels[] = {"cclk0_0", "sysclk_0", "dummy", "dummy"}; -static const char * const arm_sels[] = {"cclk1_0", "sysclk_0", "dummy", "dummy"}; -static const char * const cdu_ddr_sels[] = {"dclk_0", "dclk_1", "dummy", "dummy"}; -static const char * const can_sels[] = {"oclk_0", "oclk_1", "dclk_1", "dummy"}; -static const char * const spdif_sels[] = {"oclk_0", "oclk_1", "dclk_1", "dclk_0"}; -static const char * const reserved_sels[] = {"sclk0_0", "oclk_0", "dummy", "dummy"}; -static const char * const gige_sels[] = {"sclk0_0", "sclk1_1", "cclk0_1", "oclk_0"}; -static const char * const lp_sels[] = {"sclk0_0", "sclk0_1", "cclk1_1", "dclk_1"}; -static const char * const sdio_sels[] = {"oclk_0_half", "cclk1_1_half", "cclk1_1", - "dclk_1"}; - -static int sc58x_clock_probe(struct udevice *dev) -{ - void __iomem *cgu0; - void __iomem *cgu1; - void __iomem *cdu; - int ret; - struct resource res; - - struct clk *clks[ADSP_SC58X_CLK_END]; - struct clk dummy, clkin0, clkin1; - - ret = dev_read_resource_byname(dev, "cgu0", &res); - if (ret) - return ret; - cgu0 = devm_ioremap(dev, res.start, resource_size(&res)); - - ret = dev_read_resource_byname(dev, "cgu1", &res); - if (ret) - return ret; - cgu1 = devm_ioremap(dev, res.start, resource_size(&res)); - - ret = dev_read_resource_byname(dev, "cdu", &res); - if (ret) - return ret; - cdu = devm_ioremap(dev, res.start, resource_size(&res)); - - // Input clock configuration - clk_get_by_name(dev, "dummy", &dummy); - clk_get_by_name(dev, "sys_clkin0", &clkin0); - clk_get_by_name(dev, "sys_clkin1", &clkin1); - - clks[ADSP_SC58X_CLK_DUMMY] = &dummy; - clks[ADSP_SC58X_CLK_SYS_CLKIN0] = &clkin0; - clks[ADSP_SC58X_CLK_SYS_CLKIN1] = &clkin1; - - clks[ADSP_SC58X_CLK_CGU1_IN] = clk_register_mux(NULL, "cgu1_in_sel", cgu1_in_sels, - 2, CLK_SET_RATE_PARENT, - cdu + CDU_CLKINSEL, 0, 1, 0); - - // CGU configuration and internal clocks - clks[ADSP_SC58X_CLK_CGU0_PLL_IN] = clk_register_divider(NULL, "cgu0_df", - "sys_clkin0", - CLK_SET_RATE_PARENT, - cgu0 + CGU_CTL, 0, 1, 0); - clks[ADSP_SC58X_CLK_CGU1_PLL_IN] = clk_register_divider(NULL, "cgu1_df", - "cgu1_in_sel", - CLK_SET_RATE_PARENT, - cgu1 + CGU_CTL, 0, 1, 0); - - // VCO output inside PLL - clks[ADSP_SC58X_CLK_CGU0_VCO_OUT] = sc5xx_cgu_pll("cgu0_vco", "cgu0_df", - cgu0 + CGU_CTL, CGU_MSEL_SHIFT, - CGU_MSEL_WIDTH, 0, false); - clks[ADSP_SC58X_CLK_CGU1_VCO_OUT] = sc5xx_cgu_pll("cgu1_vco", "cgu1_df", - cgu1 + CGU_CTL, CGU_MSEL_SHIFT, - CGU_MSEL_WIDTH, 0, false); - - // Final PLL output - clks[ADSP_SC58X_CLK_CGU0_PLLCLK] = clk_register_fixed_factor(NULL, "cgu0_pllclk", - "cgu0_vco", - CLK_SET_RATE_PARENT, - 1, 1); - clks[ADSP_SC58X_CLK_CGU1_PLLCLK] = clk_register_fixed_factor(NULL, "cgu1_pllclk", - "cgu1_vco", - CLK_SET_RATE_PARENT, - 1, 1); - - // Dividers from pll output - clks[ADSP_SC58X_CLK_CGU0_CDIV] = cgu_divider("cgu0_cdiv", "cgu0_pllclk", - cgu0 + CGU_DIV, 0, 5, 0); - clks[ADSP_SC58X_CLK_CGU0_SYSCLK] = cgu_divider("sysclk_0", "cgu0_pllclk", - cgu0 + CGU_DIV, 8, 5, 0); - clks[ADSP_SC58X_CLK_CGU0_DDIV] = cgu_divider("cgu0_ddiv", "cgu0_pllclk", - cgu0 + CGU_DIV, 16, 5, 0); - clks[ADSP_SC58X_CLK_CGU0_ODIV] = cgu_divider("cgu0_odiv", "cgu0_pllclk", - cgu0 + CGU_DIV, 22, 7, 0); - clks[ADSP_SC58X_CLK_CGU0_S0SELDIV] = cgu_divider("cgu0_s0seldiv", "sysclk_0", - cgu0 + CGU_DIV, 5, 3, 0); - clks[ADSP_SC58X_CLK_CGU0_S1SELDIV] = cgu_divider("cgu0_s1seldiv", "sysclk_0", - cgu0 + CGU_DIV, 13, 3, 0); - - clks[ADSP_SC58X_CLK_CGU1_CDIV] = cgu_divider("cgu1_cdiv", "cgu1_pllclk", - cgu1 + CGU_DIV, 0, 5, 0); - clks[ADSP_SC58X_CLK_CGU1_SYSCLK] = cgu_divider("sysclk_1", "cgu1_pllclk", - cgu1 + CGU_DIV, 8, 5, 0); - clks[ADSP_SC58X_CLK_CGU1_DDIV] = cgu_divider("cgu1_ddiv", "cgu1_pllclk", - cgu1 + CGU_DIV, 16, 5, 0); - clks[ADSP_SC58X_CLK_CGU1_ODIV] = cgu_divider("cgu1_odiv", "cgu1_pllclk", - cgu1 + CGU_DIV, 22, 7, 0); - clks[ADSP_SC58X_CLK_CGU1_S0SELDIV] = cgu_divider("cgu1_s0seldiv", "sysclk_1", - cgu1 + CGU_DIV, 5, 3, 0); - clks[ADSP_SC58X_CLK_CGU1_S1SELDIV] = cgu_divider("cgu1_s1seldiv", "sysclk_1", - cgu1 + CGU_DIV, 13, 3, 0); - - // Gates to enable CGU outputs - clks[ADSP_SC58X_CLK_CGU0_CCLK0] = cgu_gate("cclk0_0", "cgu0_cdiv", - cgu0 + CGU_CCBF_DIS, 0); - clks[ADSP_SC58X_CLK_CGU0_CCLK1] = cgu_gate("cclk1_0", "cgu0_cdiv", - cgu1 + CGU_CCBF_DIS, 1); - clks[ADSP_SC58X_CLK_CGU0_OCLK] = cgu_gate("oclk_0", "cgu0_odiv", - cgu0 + CGU_SCBF_DIS, 3); - clks[ADSP_SC58X_CLK_CGU0_DCLK] = cgu_gate("dclk_0", "cgu0_ddiv", - cgu0 + CGU_SCBF_DIS, 2); - clks[ADSP_SC58X_CLK_CGU0_SCLK1] = cgu_gate("sclk1_0", "cgu0_s1seldiv", - cgu0 + CGU_SCBF_DIS, 1); - clks[ADSP_SC58X_CLK_CGU0_SCLK0] = cgu_gate("sclk0_0", "cgu0_s0seldiv", - cgu0 + CGU_SCBF_DIS, 0); - - clks[ADSP_SC58X_CLK_CGU1_CCLK0] = cgu_gate("cclk0_1", "cgu1_cdiv", - cgu1 + CGU_CCBF_DIS, 0); - clks[ADSP_SC58X_CLK_CGU1_CCLK1] = cgu_gate("cclk1_1", "cgu1_cdiv", - cgu1 + CGU_CCBF_DIS, 1); - clks[ADSP_SC58X_CLK_CGU1_OCLK] = cgu_gate("oclk_1", "cgu1_odiv", - cgu1 + CGU_SCBF_DIS, 3); - clks[ADSP_SC58X_CLK_CGU1_DCLK] = cgu_gate("dclk_1", "cgu1_ddiv", - cgu1 + CGU_SCBF_DIS, 2); - clks[ADSP_SC58X_CLK_CGU1_SCLK1] = cgu_gate("sclk1_1", "cgu1_s1seldiv", - cgu1 + CGU_SCBF_DIS, 1); - clks[ADSP_SC58X_CLK_CGU1_SCLK0] = cgu_gate("sclk0_1", "cgu1_s0seldiv", - cgu1 + CGU_SCBF_DIS, 0); - - // Extra half rate clocks generated in the CDU - clks[ADSP_SC58X_CLK_OCLK0_HALF] = clk_register_fixed_factor(NULL, "oclk_0_half", - "oclk_0", - CLK_SET_RATE_PARENT, - 1, 2); - clks[ADSP_SC58X_CLK_CCLK1_1_HALF] = clk_register_fixed_factor(NULL, - "cclk1_1_half", - "cclk1_1", - CLK_SET_RATE_PARENT, - 1, 2); - - // CDU output muxes - clks[ADSP_SC58X_CLK_SHARC0_SEL] = cdu_mux("sharc0_sel", cdu + CDU_CFG0, - sharc0_sels); - clks[ADSP_SC58X_CLK_SHARC1_SEL] = cdu_mux("sharc1_sel", cdu + CDU_CFG1, - sharc1_sels); - clks[ADSP_SC58X_CLK_ARM_SEL] = cdu_mux("arm_sel", cdu + CDU_CFG2, arm_sels); - clks[ADSP_SC58X_CLK_CDU_DDR_SEL] = cdu_mux("cdu_ddr_sel", cdu + CDU_CFG3, - cdu_ddr_sels); - clks[ADSP_SC58X_CLK_CAN_SEL] = cdu_mux("can_sel", cdu + CDU_CFG4, can_sels); - clks[ADSP_SC58X_CLK_SPDIF_SEL] = cdu_mux("spdif_sel", cdu + CDU_CFG5, spdif_sels); - clks[ADSP_SC58X_CLK_RESERVED_SEL] = cdu_mux("reserved_sel", cdu + CDU_CFG6, - reserved_sels); - clks[ADSP_SC58X_CLK_GIGE_SEL] = cdu_mux("gige_sel", cdu + CDU_CFG7, gige_sels); - clks[ADSP_SC58X_CLK_LP_SEL] = cdu_mux("lp_sel", cdu + CDU_CFG8, lp_sels); - clks[ADSP_SC58X_CLK_SDIO_SEL] = cdu_mux("sdio_sel", cdu + CDU_CFG9, sdio_sels); - - // CDU output enable gates - clks[ADSP_SC58X_CLK_SHARC0] = cdu_gate("sharc0", "sharc0_sel", cdu + CDU_CFG0, - CLK_IS_CRITICAL); - clks[ADSP_SC58X_CLK_SHARC1] = cdu_gate("sharc1", "sharc1_sel", cdu + CDU_CFG1, - CLK_IS_CRITICAL); - clks[ADSP_SC58X_CLK_ARM] = cdu_gate("arm", "arm_sel", cdu + CDU_CFG2, - CLK_IS_CRITICAL); - clks[ADSP_SC58X_CLK_CDU_DDR] = cdu_gate("cdu_ddr", "cdu_ddr_sel", cdu + CDU_CFG3, - CLK_IS_CRITICAL); - clks[ADSP_SC58X_CLK_CAN] = cdu_gate("can", "can_sel", cdu + CDU_CFG4, 0); - clks[ADSP_SC58X_CLK_SPDIF] = cdu_gate("spdif", "spdif_sel", cdu + CDU_CFG5, 0); - clks[ADSP_SC58X_CLK_RESERVED] = cdu_gate("reserved", "reserved_sel", - cdu + CDU_CFG6, 0); - clks[ADSP_SC58X_CLK_GIGE] = cdu_gate("gige", "gige_sel", cdu + CDU_CFG7, 0); - clks[ADSP_SC58X_CLK_LP] = cdu_gate("lp", "lp_sel", cdu + CDU_CFG8, 0); - clks[ADSP_SC58X_CLK_SDIO] = cdu_gate("sdio", "sdio_sel", cdu + CDU_CFG9, 0); - - ret = cdu_check_clocks(clks, ARRAY_SIZE(clks)); - if (ret) - pr_err("CDU error detected\n"); - - return ret; -} - -static const struct udevice_id adi_sc58x_clk_ids[] = { - { .compatible = "adi,sc58x-clocks" }, - { }, -}; - -U_BOOT_DRIVER(adi_sc58x_clk) = { - .name = "clk_adi_sc58x", - .id = UCLASS_CLK, - .of_match = adi_sc58x_clk_ids, - .ops = &adi_clk_ops, - .probe = sc58x_clock_probe, - .flags = DM_FLAG_PRE_RELOC, -}; diff --git a/drivers/clk/adi/clk-adi-sc594.c b/drivers/clk/adi/clk-adi-sc594.c deleted file mode 100644 index c80bbf9728d..00000000000 --- a/drivers/clk/adi/clk-adi-sc594.c +++ /dev/null @@ -1,231 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * (C) Copyright 2022 - Analog Devices, Inc. - * - * Written and/or maintained by Timesys Corporation - * - * Author: Greg Malysa - * - * Ported from Linux: Nathan Barrett-Morrison - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include "clk.h" - -static const char * const cgu1_in_sels[] = {"sys_clkin0", "sys_clkin1"}; -static const char * const cgu0_s1sels[] = {"cgu0_s1seldiv", "cgu0_s1selexdiv"}; -static const char * const cgu1_s1sels[] = {"cgu1_s1seldiv", "cgu1_s1selexdiv"}; -static const char * const sharc0_sels[] = {"cclk0_0", "dummy", "dummy", "dummy"}; -static const char * const sharc1_sels[] = {"cclk0_0", "dummy", "dummy", "dummy"}; -static const char * const arm_sels[] = {"cclk1_0", "dummy", "dummy", "dummy"}; -static const char * const cdu_ddr_sels[] = {"dclk_0", "dclk_1", "dummy", "dummy"}; -static const char * const can_sels[] = {"oclk_0", "oclk_1", "dummy", "dummy"}; -static const char * const spdif_sels[] = {"sclk1_0", "dummy", "dummy", "dummy"}; -static const char * const spi_sels[] = {"sclk0_0", "oclk_0", "dummy", "dummy"}; -static const char * const gige_sels[] = {"sclk0_0", "sclk0_1", "cclk0_1", "dummy"}; -static const char * const lp_sels[] = {"oclk_0", "sclk0_0", "cclk0_1", "dummy"}; -static const char * const lpddr_sels[] = {"oclk_0", "dclk_0", "sysclkin_1", "dummy"}; -static const char * const ospi_sels[] = {"sysclk_0", "sclk0_0", "sclk1_1", "dummy"}; -static const char * const trace_sels[] = {"sclk0_0", "dummy", "dummy", "dummy"}; - -static int sc594_clock_probe(struct udevice *dev) -{ - void __iomem *cgu0; - void __iomem *cgu1; - void __iomem *cdu; - int ret; - struct resource res; - - struct clk *clks[ADSP_SC594_CLK_END]; - struct clk dummy, clkin0, clkin1; - - ret = dev_read_resource_byname(dev, "cgu0", &res); - if (ret) - return ret; - cgu0 = devm_ioremap(dev, res.start, resource_size(&res)); - - ret = dev_read_resource_byname(dev, "cgu1", &res); - if (ret) - return ret; - cgu1 = devm_ioremap(dev, res.start, resource_size(&res)); - - ret = dev_read_resource_byname(dev, "cdu", &res); - if (ret) - return ret; - cdu = devm_ioremap(dev, res.start, resource_size(&res)); - - // Input clock configuration - clk_get_by_name(dev, "dummy", &dummy); - clk_get_by_name(dev, "sys_clkin0", &clkin0); - clk_get_by_name(dev, "sys_clkin1", &clkin1); - - clks[ADSP_SC594_CLK_DUMMY] = &dummy; - clks[ADSP_SC594_CLK_SYS_CLKIN0] = &clkin0; - clks[ADSP_SC594_CLK_SYS_CLKIN1] = &clkin1; - clks[ADSP_SC594_CLK_CGU1_IN] = clk_register_mux(NULL, "cgu1_in_sel", cgu1_in_sels, - 2, CLK_SET_RATE_PARENT, - cdu + CDU_CLKINSEL, 0, 1, 0); - - // CGU configuration and internal clocks - clks[ADSP_SC594_CLK_CGU0_PLL_IN] = clk_register_divider(NULL, "cgu0_df", - "sys_clkin0", - CLK_SET_RATE_PARENT, - cgu0 + CGU_CTL, 0, 1, 0); - clks[ADSP_SC594_CLK_CGU1_PLL_IN] = clk_register_divider(NULL, "cgu1_df", - "cgu1_in_sel", - CLK_SET_RATE_PARENT, - cgu1 + CGU_CTL, 0, 1, 0); - - // VCO output inside PLL - clks[ADSP_SC594_CLK_CGU0_VCO_OUT] = sc5xx_cgu_pll("cgu0_vco", "cgu0_df", - cgu0 + CGU_CTL, CGU_MSEL_SHIFT, - CGU_MSEL_WIDTH, 0, false); - clks[ADSP_SC594_CLK_CGU1_VCO_OUT] = sc5xx_cgu_pll("cgu1_vco", "cgu1_df", - cgu1 + CGU_CTL, CGU_MSEL_SHIFT, - CGU_MSEL_WIDTH, 0, false); - - // Final PLL output - clks[ADSP_SC594_CLK_CGU0_PLLCLK] = clk_register_fixed_factor(NULL, "cgu0_pllclk", - "cgu0_vco", - CLK_SET_RATE_PARENT, - 1, 1); - clks[ADSP_SC594_CLK_CGU1_PLLCLK] = clk_register_fixed_factor(NULL, "cgu1_pllclk", - "cgu1_vco", - CLK_SET_RATE_PARENT, - 1, 1); - - // Dividers from pll output - clks[ADSP_SC594_CLK_CGU0_CDIV] = cgu_divider("cgu0_cdiv", "cgu0_pllclk", - cgu0 + CGU_DIV, 0, 5, 0); - clks[ADSP_SC594_CLK_CGU0_SYSCLK] = cgu_divider("sysclk_0", "cgu0_pllclk", - cgu0 + CGU_DIV, 8, 5, 0); - clks[ADSP_SC594_CLK_CGU0_DDIV] = cgu_divider("cgu0_ddiv", "cgu0_pllclk", - cgu0 + CGU_DIV, 16, 5, 0); - clks[ADSP_SC594_CLK_CGU0_ODIV] = cgu_divider("cgu0_odiv", "cgu0_pllclk", - cgu0 + CGU_DIV, 22, 7, 0); - clks[ADSP_SC594_CLK_CGU0_S0SELDIV] = cgu_divider("cgu0_s0seldiv", "sysclk_0", - cgu0 + CGU_DIV, 5, 3, 0); - clks[ADSP_SC594_CLK_CGU0_S1SELDIV] = cgu_divider("cgu0_s1seldiv", "sysclk_0", - cgu0 + CGU_DIV, 13, 3, 0); - clks[ADSP_SC594_CLK_CGU0_S1SELEXDIV] = cgu_divider("cgu0_s1selexdiv", - "cgu0_pllclk", - cgu0 + CGU_DIVEX, 16, 8, 0); - clks[ADSP_SC594_CLK_CGU0_S1SEL] = clk_register_mux(NULL, "cgu0_sclk1sel", - cgu0_s1sels, 2, - CLK_SET_RATE_PARENT, - cgu0 + CGU_CTL, 17, 1, 0); - - clks[ADSP_SC594_CLK_CGU1_CDIV] = cgu_divider("cgu1_cdiv", "cgu1_pllclk", - cgu1 + CGU_DIV, 0, 5, 0); - clks[ADSP_SC594_CLK_CGU1_SYSCLK] = cgu_divider("sysclk_1", "cgu1_pllclk", - cgu1 + CGU_DIV, 8, 5, 0); - clks[ADSP_SC594_CLK_CGU1_DDIV] = cgu_divider("cgu1_ddiv", "cgu1_pllclk", - cgu1 + CGU_DIV, 16, 5, 0); - clks[ADSP_SC594_CLK_CGU1_ODIV] = cgu_divider("cgu1_odiv", "cgu1_pllclk", - cgu1 + CGU_DIV, 22, 7, 0); - clks[ADSP_SC594_CLK_CGU1_S0SELDIV] = cgu_divider("cgu1_s0seldiv", "sysclk_1", - cgu1 + CGU_DIV, 5, 3, 0); - clks[ADSP_SC594_CLK_CGU1_S1SELDIV] = cgu_divider("cgu1_s1seldiv", "sysclk_1", - cgu1 + CGU_DIV, 13, 3, 0); - clks[ADSP_SC594_CLK_CGU1_S1SELEXDIV] = cgu_divider("cgu1_s1selexdiv", - "cgu1_pllclk", - cgu1 + CGU_DIVEX, 16, 8, 0); - clks[ADSP_SC594_CLK_CGU1_S1SEL] = clk_register_mux(NULL, "cgu1_sclk1sel", - cgu1_s1sels, 2, - CLK_SET_RATE_PARENT, - cgu1 + CGU_CTL, 17, 1, 0); - - // Gates to enable CGU outputs - clks[ADSP_SC594_CLK_CGU0_CCLK0] = cgu_gate("cclk0_0", "cgu0_cdiv", - cgu0 + CGU_CCBF_DIS, 0); - clks[ADSP_SC594_CLK_CGU0_CCLK1] = cgu_gate("cclk1_0", "cgu0_cdiv", - cgu1 + CGU_CCBF_DIS, 1); - clks[ADSP_SC594_CLK_CGU0_OCLK] = cgu_gate("oclk_0", "cgu0_odiv", - cgu0 + CGU_SCBF_DIS, 3); - clks[ADSP_SC594_CLK_CGU0_DCLK] = cgu_gate("dclk_0", "cgu0_ddiv", - cgu0 + CGU_SCBF_DIS, 2); - clks[ADSP_SC594_CLK_CGU0_SCLK1] = cgu_gate("sclk1_0", "cgu0_sclk1sel", - cgu0 + CGU_SCBF_DIS, 1); - clks[ADSP_SC594_CLK_CGU0_SCLK0] = cgu_gate("sclk0_0", "cgu0_s0seldiv", - cgu0 + CGU_SCBF_DIS, 0); - - clks[ADSP_SC594_CLK_CGU1_CCLK0] = cgu_gate("cclk0_1", "cgu1_cdiv", - cgu1 + CGU_CCBF_DIS, 0); - clks[ADSP_SC594_CLK_CGU1_CCLK1] = cgu_gate("cclk1_1", "cgu1_cdiv", - cgu1 + CGU_CCBF_DIS, 1); - clks[ADSP_SC594_CLK_CGU1_OCLK] = cgu_gate("oclk_1", "cgu1_odiv", - cgu1 + CGU_SCBF_DIS, 3); - clks[ADSP_SC594_CLK_CGU1_DCLK] = cgu_gate("dclk_1", "cgu1_ddiv", - cgu1 + CGU_SCBF_DIS, 2); - clks[ADSP_SC594_CLK_CGU1_SCLK1] = cgu_gate("sclk1_1", "cgu1_sclk1sel", - cgu1 + CGU_SCBF_DIS, 1); - clks[ADSP_SC594_CLK_CGU1_SCLK0] = cgu_gate("sclk0_1", "cgu1_s0seldiv", - cgu1 + CGU_SCBF_DIS, 0); - - // CDU output muxes - clks[ADSP_SC594_CLK_SHARC0_SEL] = cdu_mux("sharc0_sel", cdu + CDU_CFG0, - sharc0_sels); - clks[ADSP_SC594_CLK_SHARC1_SEL] = cdu_mux("sharc1_sel", cdu + CDU_CFG1, - sharc1_sels); - clks[ADSP_SC594_CLK_ARM_SEL] = cdu_mux("arm_sel", cdu + CDU_CFG2, arm_sels); - clks[ADSP_SC594_CLK_CDU_DDR_SEL] = cdu_mux("cdu_ddr_sel", cdu + CDU_CFG3, - cdu_ddr_sels); - clks[ADSP_SC594_CLK_CAN_SEL] = cdu_mux("can_sel", cdu + CDU_CFG4, can_sels); - clks[ADSP_SC594_CLK_SPDIF_SEL] = cdu_mux("spdif_sel", cdu + CDU_CFG5, spdif_sels); - clks[ADSP_SC594_CLK_RESERVED_SEL] = cdu_mux("spi_sel", cdu + CDU_CFG6, spi_sels); - clks[ADSP_SC594_CLK_GIGE_SEL] = cdu_mux("gige_sel", cdu + CDU_CFG7, gige_sels); - clks[ADSP_SC594_CLK_LP_SEL] = cdu_mux("lp_sel", cdu + CDU_CFG8, lp_sels); - clks[ADSP_SC594_CLK_LPDDR_SEL] = cdu_mux("lpddr_sel", cdu + CDU_CFG9, lpddr_sels); - clks[ADSP_SC594_CLK_OSPI_SEL] = cdu_mux("ospi_sel", cdu + CDU_CFG10, - ospi_sels); - clks[ADSP_SC594_CLK_TRACE_SEL] = cdu_mux("trace_sel", cdu + CDU_CFG12, - trace_sels); - - // CDU output enable gates - clks[ADSP_SC594_CLK_SHARC0] = cdu_gate("sharc0", "sharc0_sel", - cdu + CDU_CFG0, CLK_IS_CRITICAL); - clks[ADSP_SC594_CLK_SHARC1] = cdu_gate("sharc1", "sharc1_sel", - cdu + CDU_CFG1, CLK_IS_CRITICAL); - clks[ADSP_SC594_CLK_ARM] = cdu_gate("arm", "arm_sel", cdu + CDU_CFG2, - CLK_IS_CRITICAL); - clks[ADSP_SC594_CLK_CDU_DDR] = cdu_gate("cdu_ddr", "cdu_ddr_sel", - cdu + CDU_CFG3, CLK_IS_CRITICAL); - clks[ADSP_SC594_CLK_CAN] = cdu_gate("can", "can_sel", cdu + CDU_CFG4, 0); - clks[ADSP_SC594_CLK_SPDIF] = cdu_gate("spdif", "spdif_sel", cdu + CDU_CFG5, 0); - clks[ADSP_SC594_CLK_SPI] = cdu_gate("spi", "spi_sel", cdu + CDU_CFG6, 0); - clks[ADSP_SC594_CLK_GIGE] = cdu_gate("gige", "gige_sel", cdu + CDU_CFG7, 0); - clks[ADSP_SC594_CLK_LP] = cdu_gate("lp", "lp_sel", cdu + CDU_CFG8, 0); - clks[ADSP_SC594_CLK_LPDDR] = cdu_gate("lpddr", "lpddr_sel", cdu + CDU_CFG9, 0); - clks[ADSP_SC594_CLK_OSPI] = cdu_gate("ospi", "ospi_sel", cdu + CDU_CFG10, 0); - clks[ADSP_SC594_CLK_TRACE] = cdu_gate("trace", "trace_sel", cdu + CDU_CFG12, 0); - - ret = cdu_check_clocks(clks, ARRAY_SIZE(clks)); - if (ret) - pr_err("CDU error detected\n"); - - return ret; -} - -static const struct udevice_id adi_sc594_clk_ids[] = { - { .compatible = "adi,sc594-clocks" }, - { }, -}; - -U_BOOT_DRIVER(adi_sc594_clk) = { - .name = "clk_adi_sc594", - .id = UCLASS_CLK, - .of_match = adi_sc594_clk_ids, - .ops = &adi_clk_ops, - .probe = sc594_clock_probe, - .flags = DM_FLAG_PRE_RELOC, -}; diff --git a/drivers/clk/adi/clk-adi-sc598.c b/drivers/clk/adi/clk-adi-sc598.c deleted file mode 100644 index d4a16ac9603..00000000000 --- a/drivers/clk/adi/clk-adi-sc598.c +++ /dev/null @@ -1,308 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * (C) Copyright 2022 - Analog Devices, Inc. - * - * Written and/or maintained by Timesys Corporation - * - * Author: Greg Malysa - * - * Ported from Linux: Nathan Barrett-Morrison - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include "clk.h" - -static const char * const cgu1_in_sels[] = {"sys_clkin0", "sys_clkin1"}; -static const char * const cgu0_s1sels[] = {"cgu0_s1seldiv", "cgu0_s1selexdiv"}; -static const char * const cgu1_s0sels[] = {"cgu1_s0seldiv", "cgu1_s0selexdiv"}; -static const char * const cgu1_s1sels[] = {"cgu1_s1seldiv", "cgu1_s1selexdiv"}; -static const char * const sharc0_sels[] = {"cclk0_0", "dummy", "dummy", "dummy"}; -static const char * const sharc1_sels[] = {"cclk0_0", "dummy", "dummy", "dummy"}; -static const char * const arm_sels[] = {"dummy", "dummy", "cclk2_0", "cclk2_1"}; -static const char * const cdu_ddr_sels[] = {"dclk_0", "dclk_1", "dummy", "dummy"}; -static const char * const can_sels[] = {"dummy", "oclk_1", "dummy", "dummy"}; -static const char * const spdif_sels[] = {"sclk1_0", "dummy", "dummy", "dummy"}; -static const char * const spi_sels[] = {"sclk0_0", "oclk_0", "dummy", "dummy"}; -static const char * const gige_sels[] = {"sclk0_0", "sclk0_1", "dummy", "dummy"}; -static const char * const lp_sels[] = {"oclk_0", "sclk0_0", "cclk0_1", "dummy"}; -static const char * const lp_ddr_sels[] = {"oclk_0", "dclk_0", "sysclk_1", "dummy"}; -static const char * const ospi_refclk_sels[] = {"sysclk_0", "sclk0_0", "sclk1_1", - "dummy"}; -static const char * const trace_sels[] = {"sclk0_0", "dummy", "dummy", "dummy"}; -static const char * const emmc_sels[] = {"oclk_0", "sclk0_1", "dclk_0_half", - "dclk_1_half"}; -static const char * const emmc_timer_sels[] = {"dummy", "sclk1_1_half", "dummy", - "dummy"}; -static const char * const ddr_sels[] = {"cdu_ddr", "3pll_ddiv"}; - -static int sc598_clock_probe(struct udevice *dev) -{ - void __iomem *cgu0; - void __iomem *cgu1; - void __iomem *cdu; - void __iomem *pll3; - int ret; - struct resource res; - - struct clk *clks[ADSP_SC598_CLK_END]; - struct clk dummy, clkin0, clkin1; - - ret = dev_read_resource_byname(dev, "cgu0", &res); - if (ret) - return ret; - cgu0 = devm_ioremap(dev, res.start, resource_size(&res)); - - ret = dev_read_resource_byname(dev, "cgu1", &res); - if (ret) - return ret; - cgu1 = devm_ioremap(dev, res.start, resource_size(&res)); - - ret = dev_read_resource_byname(dev, "cdu", &res); - if (ret) - return ret; - cdu = devm_ioremap(dev, res.start, resource_size(&res)); - - ret = dev_read_resource_byname(dev, "pll3", &res); - if (ret) - return ret; - pll3 = devm_ioremap(dev, res.start, resource_size(&res)); - - // We only access this one register for pll3 - pll3 = pll3 + PLL3_OFFSET; - - // Input clock configuration - clk_get_by_name(dev, "dummy", &dummy); - clk_get_by_name(dev, "sys_clkin0", &clkin0); - clk_get_by_name(dev, "sys_clkin1", &clkin1); - - clks[ADSP_SC598_CLK_DUMMY] = &dummy; - clks[ADSP_SC598_CLK_SYS_CLKIN0] = &clkin0; - clks[ADSP_SC598_CLK_SYS_CLKIN1] = &clkin1; - - clks[ADSP_SC598_CLK_CGU1_IN] = clk_register_mux(NULL, "cgu1_in_sel", cgu1_in_sels, - 2, CLK_SET_RATE_PARENT, - cdu + CDU_CLKINSEL, 0, 1, 0); - - // 3rd pll reuses cgu1 clk in selection, feeds directly into 3pll df - // changing the cgu1 in sel mux will affect 3pll so reuse the same clocks - - // CGU configuration and internal clocks - clks[ADSP_SC598_CLK_CGU0_PLL_IN] = clk_register_divider(NULL, "cgu0_df", - "sys_clkin0", - CLK_SET_RATE_PARENT, - cgu0 + CGU_CTL, 0, 1, 0); - clks[ADSP_SC598_CLK_CGU1_PLL_IN] = clk_register_divider(NULL, "cgu1_df", - "cgu1_in_sel", - CLK_SET_RATE_PARENT, - cgu1 + CGU_CTL, 0, 1, 0); - clks[ADSP_SC598_CLK_3PLL_PLL_IN] = clk_register_divider(NULL, "3pll_df", - "cgu1_in_sel", - CLK_SET_RATE_PARENT, - pll3, 3, 1, 0); - - // VCO output inside PLL - clks[ADSP_SC598_CLK_CGU0_VCO_OUT] = sc5xx_cgu_pll("cgu0_vco", "cgu0_df", - cgu0 + CGU_CTL, CGU_MSEL_SHIFT, - CGU_MSEL_WIDTH, 0, true); - clks[ADSP_SC598_CLK_CGU1_VCO_OUT] = sc5xx_cgu_pll("cgu1_vco", "cgu1_df", - cgu1 + CGU_CTL, CGU_MSEL_SHIFT, - CGU_MSEL_WIDTH, 0, true); - clks[ADSP_SC598_CLK_3PLL_VCO_OUT] = sc5xx_cgu_pll("3pll_vco", "3pll_df", - pll3, PLL3_MSEL_SHIFT, - PLL3_MSEL_WIDTH, 1, true); - - // Final PLL output - clks[ADSP_SC598_CLK_CGU0_PLLCLK] = clk_register_fixed_factor(NULL, "cgu0_pllclk", - "cgu0_vco", - CLK_SET_RATE_PARENT, - 1, 2); - clks[ADSP_SC598_CLK_CGU1_PLLCLK] = clk_register_fixed_factor(NULL, "cgu1_pllclk", - "cgu1_vco", - CLK_SET_RATE_PARENT, - 1, 2); - clks[ADSP_SC598_CLK_3PLL_PLLCLK] = clk_register_fixed_factor(NULL, "3pll_pllclk", - "3pll_vco", - CLK_SET_RATE_PARENT, - 1, 2); - - // Dividers from pll output - clks[ADSP_SC598_CLK_CGU0_CDIV] = cgu_divider("cgu0_cdiv", "cgu0_pllclk", - cgu0 + CGU_DIV, 0, 5, 0); - clks[ADSP_SC598_CLK_CGU0_SYSCLK] = cgu_divider("sysclk_0", "cgu0_pllclk", - cgu0 + CGU_DIV, 8, 5, 0); - clks[ADSP_SC598_CLK_CGU0_DDIV] = cgu_divider("cgu0_ddiv", "cgu0_pllclk", - cgu0 + CGU_DIV, 16, 5, 0); - clks[ADSP_SC598_CLK_CGU0_ODIV] = cgu_divider("cgu0_odiv", "cgu0_pllclk", - cgu0 + CGU_DIV, 22, 7, 0); - clks[ADSP_SC598_CLK_CGU0_S0SELDIV] = cgu_divider("cgu0_s0seldiv", "sysclk_0", - cgu0 + CGU_DIV, 5, 3, 0); - clks[ADSP_SC598_CLK_CGU0_S1SELDIV] = cgu_divider("cgu0_s1seldiv", "sysclk_0", - cgu0 + CGU_DIV, 13, 3, 0); - clks[ADSP_SC598_CLK_CGU0_S1SELEXDIV] = cgu_divider("cgu0_s1selexdiv", - "cgu0_pllclk", - cgu0 + CGU_DIVEX, 16, 8, 0); - clks[ADSP_SC598_CLK_CGU0_S1SEL] = clk_register_mux(NULL, "cgu0_sclk1sel", - cgu0_s1sels, 2, - CLK_SET_RATE_PARENT, - cgu0 + CGU_CTL, 17, 1, 0); - clks[ADSP_SC598_CLK_CGU0_CCLK2] = clk_register_fixed_factor(NULL, "cclk2_0", - "cgu0_vco", - CLK_SET_RATE_PARENT, - 1, 3); - - clks[ADSP_SC598_CLK_CGU1_CDIV] = cgu_divider("cgu1_cdiv", "cgu1_pllclk", - cgu1 + CGU_DIV, 0, 5, 0); - clks[ADSP_SC598_CLK_CGU1_SYSCLK] = cgu_divider("sysclk_1", "cgu1_pllclk", - cgu1 + CGU_DIV, 8, 5, 0); - clks[ADSP_SC598_CLK_CGU1_DDIV] = cgu_divider("cgu1_ddiv", "cgu1_pllclk", - cgu1 + CGU_DIV, 16, 5, 0); - clks[ADSP_SC598_CLK_CGU1_ODIV] = cgu_divider("cgu1_odiv", "cgu1_pllclk", - cgu1 + CGU_DIV, 22, 7, 0); - clks[ADSP_SC598_CLK_CGU1_S0SELDIV] = cgu_divider("cgu1_s0seldiv", "sysclk_1", - cgu1 + CGU_DIV, 5, 3, 0); - clks[ADSP_SC598_CLK_CGU1_S1SELDIV] = cgu_divider("cgu1_s1seldiv", "sysclk_1", - cgu1 + CGU_DIV, 13, 3, 0); - clks[ADSP_SC598_CLK_CGU1_S0SELEXDIV] = cgu_divider("cgu1_s0selexdiv", - "cgu1_pllclk", - cgu1 + CGU_DIVEX, 0, 8, 0); - clks[ADSP_SC598_CLK_CGU1_S1SELEXDIV] = cgu_divider("cgu1_s1selexdiv", - "cgu1_pllclk", - cgu1 + CGU_DIVEX, 16, 8, 0); - clks[ADSP_SC598_CLK_CGU1_S0SEL] = clk_register_mux(NULL, "cgu1_sclk0sel", - cgu1_s0sels, 2, - CLK_SET_RATE_PARENT, - cgu1 + CGU_CTL, 16, 1, 0); - clks[ADSP_SC598_CLK_CGU1_S1SEL] = clk_register_mux(NULL, "cgu1_sclk1sel", - cgu1_s1sels, 2, - CLK_SET_RATE_PARENT, - cgu1 + CGU_CTL, 17, 1, 0); - clks[ADSP_SC598_CLK_CGU1_CCLK2] = clk_register_fixed_factor(NULL, "cclk2_1", - "cgu1_vco", - CLK_SET_RATE_PARENT, - 1, 3); - - clks[ADSP_SC598_CLK_3PLL_DDIV] = clk_register_divider(NULL, "3pll_ddiv", - "3pll_pllclk", - CLK_SET_RATE_PARENT, pll3, - 12, 5, 0); - - // Gates to enable CGU outputs - clks[ADSP_SC598_CLK_CGU0_CCLK0] = cgu_gate("cclk0_0", "cgu0_cdiv", - cgu0 + CGU_CCBF_DIS, 0); - clks[ADSP_SC598_CLK_CGU0_OCLK] = cgu_gate("oclk_0", "cgu0_odiv", - cgu0 + CGU_SCBF_DIS, 3); - clks[ADSP_SC598_CLK_CGU0_DCLK] = cgu_gate("dclk_0", "cgu0_ddiv", - cgu0 + CGU_SCBF_DIS, 2); - clks[ADSP_SC598_CLK_CGU0_SCLK1] = cgu_gate("sclk1_0", "cgu0_sclk1sel", - cgu0 + CGU_SCBF_DIS, 1); - clks[ADSP_SC598_CLK_CGU0_SCLK0] = cgu_gate("sclk0_0", "cgu0_s0seldiv", - cgu0 + CGU_SCBF_DIS, 0); - - clks[ADSP_SC598_CLK_CGU1_CCLK0] = cgu_gate("cclk0_1", "cgu1_cdiv", - cgu1 + CGU_CCBF_DIS, 0); - clks[ADSP_SC598_CLK_CGU1_OCLK] = cgu_gate("oclk_1", "cgu1_odiv", - cgu1 + CGU_SCBF_DIS, 3); - clks[ADSP_SC598_CLK_CGU1_DCLK] = cgu_gate("dclk_1", "cgu1_ddiv", - cgu1 + CGU_SCBF_DIS, 2); - clks[ADSP_SC598_CLK_CGU1_SCLK1] = cgu_gate("sclk1_1", "cgu1_sclk1sel", - cgu1 + CGU_SCBF_DIS, 1); - clks[ADSP_SC598_CLK_CGU1_SCLK0] = cgu_gate("sclk0_1", "cgu1_sclk0sel", - cgu1 + CGU_SCBF_DIS, 0); - - // Extra half rate clocks generated in the CDU - clks[ADSP_SC598_CLK_DCLK0_HALF] = clk_register_fixed_factor(NULL, "dclk_0_half", - "dclk_0", - CLK_SET_RATE_PARENT, - 1, 2); - clks[ADSP_SC598_CLK_DCLK1_HALF] = clk_register_fixed_factor(NULL, "dclk_1_half", - "dclk_1", - CLK_SET_RATE_PARENT, - 1, 2); - clks[ADSP_SC598_CLK_CGU1_SCLK1_HALF] = clk_register_fixed_factor(NULL, - "sclk1_1_half", - "sclk1_1", - CLK_SET_RATE_PARENT, - 1, 2); - - // CDU output muxes - clks[ADSP_SC598_CLK_SHARC0_SEL] = cdu_mux("sharc0_sel", cdu + CDU_CFG0, - sharc0_sels); - clks[ADSP_SC598_CLK_SHARC1_SEL] = cdu_mux("sharc1_sel", cdu + CDU_CFG1, - sharc1_sels); - clks[ADSP_SC598_CLK_ARM_SEL] = cdu_mux("arm_sel", cdu + CDU_CFG2, arm_sels); - clks[ADSP_SC598_CLK_CDU_DDR_SEL] = cdu_mux("cdu_ddr_sel", cdu + CDU_CFG3, - cdu_ddr_sels); - clks[ADSP_SC598_CLK_CAN_SEL] = cdu_mux("can_sel", cdu + CDU_CFG4, can_sels); - clks[ADSP_SC598_CLK_SPDIF_SEL] = cdu_mux("spdif_sel", cdu + CDU_CFG5, spdif_sels); - clks[ADSP_SC598_CLK_SPI_SEL] = cdu_mux("spi_sel", cdu + CDU_CFG6, spi_sels); - clks[ADSP_SC598_CLK_GIGE_SEL] = cdu_mux("gige_sel", cdu + CDU_CFG7, gige_sels); - clks[ADSP_SC598_CLK_LP_SEL] = cdu_mux("lp_sel", cdu + CDU_CFG8, lp_sels); - clks[ADSP_SC598_CLK_LP_DDR_SEL] = cdu_mux("lp_ddr_sel", cdu + CDU_CFG9, - lp_ddr_sels); - clks[ADSP_SC598_CLK_OSPI_REFCLK_SEL] = cdu_mux("ospi_refclk_sel", cdu + CDU_CFG10, - ospi_refclk_sels); - clks[ADSP_SC598_CLK_TRACE_SEL] = cdu_mux("trace_sel", cdu + CDU_CFG12, - trace_sels); - clks[ADSP_SC598_CLK_EMMC_SEL] = cdu_mux("emmc_sel", cdu + CDU_CFG13, emmc_sels); - clks[ADSP_SC598_CLK_EMMC_TIMER_QMC_SEL] = cdu_mux("emmc_timer_qmc_sel", - cdu + CDU_CFG14, - emmc_timer_sels); - - // CDU output enable gates - clks[ADSP_SC598_CLK_SHARC0] = cdu_gate("sharc0", "sharc0_sel", cdu + CDU_CFG0, - CLK_IS_CRITICAL); - clks[ADSP_SC598_CLK_SHARC1] = cdu_gate("sharc1", "sharc1_sel", cdu + CDU_CFG1, - CLK_IS_CRITICAL); - clks[ADSP_SC598_CLK_ARM] = cdu_gate("arm", "arm_sel", cdu + CDU_CFG2, - CLK_IS_CRITICAL); - clks[ADSP_SC598_CLK_CDU_DDR] = cdu_gate("cdu_ddr", "cdu_ddr_sel", cdu + CDU_CFG3, - 0); - clks[ADSP_SC598_CLK_CAN] = cdu_gate("can", "can_sel", cdu + CDU_CFG4, 0); - clks[ADSP_SC598_CLK_SPDIF] = cdu_gate("spdif", "spdif_sel", cdu + CDU_CFG5, 0); - clks[ADSP_SC598_CLK_SPI] = cdu_gate("spi", "spi_sel", cdu + CDU_CFG6, 0); - clks[ADSP_SC598_CLK_GIGE] = cdu_gate("gige", "gige_sel", cdu + CDU_CFG7, 0); - clks[ADSP_SC598_CLK_LP] = cdu_gate("lp", "lp_sel", cdu + CDU_CFG8, 0); - clks[ADSP_SC598_CLK_LP_DDR] = cdu_gate("lp_ddr", "lp_ddr_sel", cdu + CDU_CFG9, 0); - clks[ADSP_SC598_CLK_OSPI_REFCLK] = cdu_gate("ospi_refclk", "ospi_refclk_sel", - cdu + CDU_CFG10, 0); - clks[ADSP_SC598_CLK_TRACE] = cdu_gate("trace", "trace_sel", cdu + CDU_CFG12, 0); - clks[ADSP_SC598_CLK_EMMC] = cdu_gate("emmc", "emmc_sel", cdu + CDU_CFG13, 0); - clks[ADSP_SC598_CLK_EMMC_TIMER_QMC] = cdu_gate("emmc_timer_qmc", - "emmc_timer_qmc_sel", - cdu + CDU_CFG14, 0); - - // Dedicated DDR output mux - clks[ADSP_SC598_CLK_DDR] = clk_register_mux(NULL, "ddr", ddr_sels, 2, - CLK_SET_RATE_PARENT | CLK_IS_CRITICAL, - pll3, 11, 1, 0); - - ret = cdu_check_clocks(clks, ARRAY_SIZE(clks)); - if (ret) - pr_err("CDU error detected\n"); - - return ret; -} - -static const struct udevice_id adi_sc598_clk_ids[] = { - { .compatible = "adi,sc598-clocks" }, - { }, -}; - -U_BOOT_DRIVER(adi_sc598_clk) = { - .name = "clk_adi_sc598", - .id = UCLASS_CLK, - .of_match = adi_sc598_clk_ids, - .ops = &adi_clk_ops, - .probe = sc598_clock_probe, - .flags = DM_FLAG_PRE_RELOC, -}; diff --git a/drivers/clk/adi/clk-shared.c b/drivers/clk/adi/clk-shared.c deleted file mode 100644 index dcadcafa9d2..00000000000 --- a/drivers/clk/adi/clk-shared.c +++ /dev/null @@ -1,48 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * (C) Copyright 2022 - Analog Devices, Inc. - * - * Written and/or maintained by Timesys Corporation - * - * Author: Greg Malysa - */ - -#include "clk.h" - -static ulong adi_get_rate(struct clk *clk) -{ - struct clk *c; - int ret; - - ret = clk_get_by_id(clk->id, &c); - if (ret) - return ret; - - return clk_get_rate(c); -} - -static ulong adi_set_rate(struct clk *clk, ulong rate) -{ - //Not yet implemented - return 0; -} - -static int adi_enable(struct clk *clk) -{ - //Not yet implemented - return 0; -} - -static int adi_disable(struct clk *clk) -{ - //Not yet implemented - return 0; -} - -const struct clk_ops adi_clk_ops = { - .set_rate = adi_set_rate, - .get_rate = adi_get_rate, - .enable = adi_enable, - .disable = adi_disable, -}; - diff --git a/drivers/clk/adi/clk.h b/drivers/clk/adi/clk.h deleted file mode 100644 index f230205c311..00000000000 --- a/drivers/clk/adi/clk.h +++ /dev/null @@ -1,123 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later */ -/* - * (C) Copyright 2022 - Analog Devices, Inc. - * - * Written and/or maintained by Timesys Corporation - * - * Author: Greg Malysa - * - * Ported from Linux: Nathan Barrett-Morrison - */ - -#ifndef CLK_ADI_CLK_H -#define CLK_ADI_CLK_H - -#include -#include -#include - -#define CGU_CTL 0x00 -#define CGU_PLLCTL 0x04 -#define CGU_STAT 0x08 -#define CGU_DIV 0x0C -#define CGU_CLKOUTSEL 0x10 -#define CGU_OSCWDCTL 0x14 -#define CGU_TSCTL 0x18 -#define CGU_TSVALUE0 0x1C -#define CGU_TSVALUE1 0x20 -#define CGU_TSCOUNT0 0x24 -#define CGU_TSCOUNT1 0x28 -#define CGU_CCBF_DIS 0x2C -#define CGU_CCBF_STAT 0x30 -#define CGU_SCBF_DIS 0x38 -#define CGU_SCBF_STAT 0x3C -#define CGU_DIVEX 0x40 -#define CGU_REVID 0x48 - -#define CDU_CFG0 0x00 -#define CDU_CFG1 0x04 -#define CDU_CFG2 0x08 -#define CDU_CFG3 0x0C -#define CDU_CFG4 0x10 -#define CDU_CFG5 0x14 -#define CDU_CFG6 0x18 -#define CDU_CFG7 0x1C -#define CDU_CFG8 0x20 -#define CDU_CFG9 0x24 -#define CDU_CFG10 0x28 -#define CDU_CFG11 0x2C -#define CDU_CFG12 0x30 -#define CDU_CFG13 0x34 -#define CDU_CFG14 0x38 - -#define PLL3_OFFSET 0x2c - -#define CDU_CLKINSEL 0x44 - -#define CGU_MSEL_SHIFT 8 -#define CGU_MSEL_WIDTH 7 - -#define PLL3_MSEL_SHIFT 4 -#define PLL3_MSEL_WIDTH 7 - -#define CDU_MUX_SIZE 4 -#define CDU_MUX_SHIFT 1 -#define CDU_MUX_WIDTH 2 -#define CDU_EN_BIT 0 - -extern const struct clk_ops adi_clk_ops; - -struct clk *sc5xx_cgu_pll(const char *name, const char *parent_name, - void __iomem *base, u8 shift, u8 width, u32 m_offset, bool half_m); - -/** - * All CDU clock muxes are the same size - */ -static inline struct clk *cdu_mux(const char *name, void __iomem *reg, - const char * const *parents) -{ - return clk_register_mux(NULL, name, parents, CDU_MUX_SIZE, - CLK_SET_RATE_PARENT, reg, CDU_MUX_SHIFT, CDU_MUX_WIDTH, 0); -} - -static inline struct clk *cgu_divider(const char *name, const char *parent, - void __iomem *reg, u8 shift, u8 width, u8 extra_flags) -{ - return clk_register_divider(NULL, name, parent, CLK_SET_RATE_PARENT, - reg, shift, width, CLK_DIVIDER_MAX_AT_ZERO | extra_flags); -} - -static inline struct clk *cdu_gate(const char *name, const char *parent, - void __iomem *reg, u32 flags) -{ - return clk_register_gate(NULL, name, parent, CLK_SET_RATE_PARENT | flags, - reg, CDU_EN_BIT, 0, NULL); -} - -static inline struct clk *cgu_gate(const char *name, const char *parent, - void __iomem *reg, u8 bit) -{ - return clk_register_gate(NULL, name, parent, CLK_SET_RATE_PARENT, reg, bit, - CLK_GATE_SET_TO_DISABLE, NULL); -} - -static inline int cdu_check_clocks(struct clk *clks[], size_t count) -{ - size_t i; - - for (i = 0; i < count; ++i) { - if (clks[i]) { - if (IS_ERR(clks[i])) { - pr_err("Clock %zu failed to register: %ld\n", i, PTR_ERR(clks[i])); - return PTR_ERR(clks[i]); - } - clks[i]->id = i; - } else { - pr_err("ADI Clock framework: Null pointer detected on clock %zu\n", i); - } - } - - return 0; -} - -#endif diff --git a/drivers/clk/altera/clk-agilex.c b/drivers/clk/altera/clk-agilex.c index bdc7be0fb5d..cca6d674122 100644 --- a/drivers/clk/altera/clk-agilex.c +++ b/drivers/clk/altera/clk-agilex.c @@ -3,6 +3,7 @@ * Copyright (C) 2019 Intel Corporation */ +#include #include #include #include diff --git a/drivers/clk/altera/clk-agilex5.c b/drivers/clk/altera/clk-agilex5.c index 72b923465df..92f2abdaf93 100644 --- a/drivers/clk/altera/clk-agilex5.c +++ b/drivers/clk/altera/clk-agilex5.c @@ -15,6 +15,7 @@ #include #include #include +#include #include #include #include diff --git a/drivers/clk/altera/clk-arria10.c b/drivers/clk/altera/clk-arria10.c index 1840f73beee..578597a16e8 100644 --- a/drivers/clk/altera/clk-arria10.c +++ b/drivers/clk/altera/clk-arria10.c @@ -3,6 +3,7 @@ * Copyright (C) 2018 Marek Vasut */ +#include #include #include #include diff --git a/drivers/clk/altera/clk-mem-n5x.c b/drivers/clk/altera/clk-mem-n5x.c index b75f52d203b..9bbe2cd0ca7 100644 --- a/drivers/clk/altera/clk-mem-n5x.c +++ b/drivers/clk/altera/clk-mem-n5x.c @@ -3,6 +3,7 @@ * Copyright (C) 2020-2022 Intel Corporation */ +#include #include #include #include diff --git a/drivers/clk/altera/clk-n5x.c b/drivers/clk/altera/clk-n5x.c index 3e256101a94..3fa19e05c47 100644 --- a/drivers/clk/altera/clk-n5x.c +++ b/drivers/clk/altera/clk-n5x.c @@ -3,6 +3,7 @@ * Copyright (C) 2020-2022 Intel Corporation */ +#include #include #include #include diff --git a/drivers/clk/aspeed/clk_ast2500.c b/drivers/clk/aspeed/clk_ast2500.c index a330dcda4dc..dc446ce9fb7 100644 --- a/drivers/clk/aspeed/clk_ast2500.c +++ b/drivers/clk/aspeed/clk_ast2500.c @@ -3,6 +3,7 @@ * (C) Copyright 2016 Google, Inc */ +#include #include #include #include diff --git a/drivers/clk/aspeed/clk_ast2600.c b/drivers/clk/aspeed/clk_ast2600.c index 535010b7941..a15909329bb 100644 --- a/drivers/clk/aspeed/clk_ast2600.c +++ b/drivers/clk/aspeed/clk_ast2600.c @@ -3,6 +3,7 @@ * Copyright (C) ASPEED Technology Inc. */ +#include #include #include #include diff --git a/drivers/clk/at91/clk-generic.c b/drivers/clk/at91/clk-generic.c index c410cd2b505..87738b7b5bf 100644 --- a/drivers/clk/at91/clk-generic.c +++ b/drivers/clk/at91/clk-generic.c @@ -8,6 +8,7 @@ * * Based on drivers/clk/at91/clk-generated.c from Linux. */ +#include #include #include #include diff --git a/drivers/clk/at91/clk-main.c b/drivers/clk/at91/clk-main.c index 09daae97676..025c7a7aa26 100644 --- a/drivers/clk/at91/clk-main.c +++ b/drivers/clk/at91/clk-main.c @@ -10,6 +10,7 @@ */ #include +#include #include #include #include diff --git a/drivers/clk/at91/clk-master.c b/drivers/clk/at91/clk-master.c index d28775d64d3..aec0bca7b3c 100644 --- a/drivers/clk/at91/clk-master.c +++ b/drivers/clk/at91/clk-master.c @@ -11,6 +11,7 @@ #include #include +#include #include #include #include diff --git a/drivers/clk/at91/clk-peripheral.c b/drivers/clk/at91/clk-peripheral.c index 08d7e7dddc9..52cbc520cef 100644 --- a/drivers/clk/at91/clk-peripheral.c +++ b/drivers/clk/at91/clk-peripheral.c @@ -8,6 +8,7 @@ * * Based on drivers/clk/at91/clk-peripheral.c from Linux. */ +#include #include #include #include diff --git a/drivers/clk/at91/clk-programmable.c b/drivers/clk/at91/clk-programmable.c index d0b14656c4d..868de4b1774 100644 --- a/drivers/clk/at91/clk-programmable.c +++ b/drivers/clk/at91/clk-programmable.c @@ -8,6 +8,7 @@ * * Based on drivers/clk/at91/clk-programmable.c from Linux. */ +#include #include #include #include diff --git a/drivers/clk/at91/clk-sam9x60-pll.c b/drivers/clk/at91/clk-sam9x60-pll.c index a30035eb8ce..383f79cfbaf 100644 --- a/drivers/clk/at91/clk-sam9x60-pll.c +++ b/drivers/clk/at91/clk-sam9x60-pll.c @@ -11,6 +11,7 @@ */ #include +#include #include #include #include diff --git a/drivers/clk/at91/clk-system.c b/drivers/clk/at91/clk-system.c index 3545b0b24bd..82f79e74a19 100644 --- a/drivers/clk/at91/clk-system.c +++ b/drivers/clk/at91/clk-system.c @@ -9,6 +9,7 @@ * Based on drivers/clk/at91/clk-system.c from Linux. */ #include +#include #include #include #include diff --git a/drivers/clk/at91/clk-utmi.c b/drivers/clk/at91/clk-utmi.c index 84784ae41ce..7c8bcfb51db 100644 --- a/drivers/clk/at91/clk-utmi.c +++ b/drivers/clk/at91/clk-utmi.c @@ -9,6 +9,7 @@ * Based on drivers/clk/at91/clk-utmi.c from Linux. */ #include +#include #include #include #include diff --git a/drivers/clk/at91/compat.c b/drivers/clk/at91/compat.c index 1d738f160b6..ee67093c607 100644 --- a/drivers/clk/at91/compat.c +++ b/drivers/clk/at91/compat.c @@ -6,7 +6,7 @@ * * Author: Claudiu Beznea */ -#include +#include #include #include #include diff --git a/drivers/clk/at91/pmc.c b/drivers/clk/at91/pmc.c index aa4bc8fa47a..87d2069d89c 100644 --- a/drivers/clk/at91/pmc.c +++ b/drivers/clk/at91/pmc.c @@ -4,6 +4,7 @@ * Wenyou.Yang */ +#include #include #include #include diff --git a/drivers/clk/at91/sam9x60.c b/drivers/clk/at91/sam9x60.c index b7d64bdbb3d..d858c860f69 100644 --- a/drivers/clk/at91/sam9x60.c +++ b/drivers/clk/at91/sam9x60.c @@ -7,6 +7,7 @@ * Based on sam9x60.c on Linux. */ +#include #include #include #include diff --git a/drivers/clk/at91/sama7g5.c b/drivers/clk/at91/sama7g5.c index 63b2c647467..3e62fb1f58d 100644 --- a/drivers/clk/at91/sama7g5.c +++ b/drivers/clk/at91/sama7g5.c @@ -9,6 +9,7 @@ * Based on drivers/clk/at91/sama7g5.c from Linux. */ +#include #include #include #include diff --git a/drivers/clk/at91/sckc.c b/drivers/clk/at91/sckc.c index 6d6f12578db..43136ab2e34 100644 --- a/drivers/clk/at91/sckc.c +++ b/drivers/clk/at91/sckc.c @@ -7,6 +7,7 @@ * Author: Claudiu Beznea */ +#include #include #include #include diff --git a/drivers/clk/clk-cdce9xx.c b/drivers/clk/clk-cdce9xx.c index e5f74e714d5..b8700f517fc 100644 --- a/drivers/clk/clk-cdce9xx.c +++ b/drivers/clk/clk-cdce9xx.c @@ -8,6 +8,7 @@ * Based on Linux kernel clk-cdce925.c. */ +#include #include #include #include diff --git a/drivers/clk/clk-composite.c b/drivers/clk/clk-composite.c index 199ca6eaa37..d2e5a1ae401 100644 --- a/drivers/clk/clk-composite.c +++ b/drivers/clk/clk-composite.c @@ -6,6 +6,7 @@ #define LOG_CATEGORY UCLASS_CLK +#include #include #include #include diff --git a/drivers/clk/clk-divider.c b/drivers/clk/clk-divider.c index aa210e3d15f..2ad682b8fe2 100644 --- a/drivers/clk/clk-divider.c +++ b/drivers/clk/clk-divider.c @@ -11,6 +11,7 @@ #define LOG_CATEGORY UCLASS_CLK +#include #include #include #include diff --git a/drivers/clk/clk-fixed-factor.c b/drivers/clk/clk-fixed-factor.c index 068798cf9b0..2a446788e19 100644 --- a/drivers/clk/clk-fixed-factor.c +++ b/drivers/clk/clk-fixed-factor.c @@ -8,6 +8,7 @@ #define LOG_CATEGORY UCLASS_CLK +#include #include #include #include diff --git a/drivers/clk/clk-gate.c b/drivers/clk/clk-gate.c index bf1c6a93b46..cfd90b717e7 100644 --- a/drivers/clk/clk-gate.c +++ b/drivers/clk/clk-gate.c @@ -9,6 +9,7 @@ #define LOG_CATEGORY UCLASS_CLK +#include #include #include #include diff --git a/drivers/clk/clk-hsdk-cgu.c b/drivers/clk/clk-hsdk-cgu.c index 53655059279..85074f1b86e 100644 --- a/drivers/clk/clk-hsdk-cgu.c +++ b/drivers/clk/clk-hsdk-cgu.c @@ -9,6 +9,7 @@ * warranty of any kind, whether express or implied. */ +#include #include #include #include diff --git a/drivers/clk/clk-mux.c b/drivers/clk/clk-mux.c index 39e01c3fbc6..f410518461e 100644 --- a/drivers/clk/clk-mux.c +++ b/drivers/clk/clk-mux.c @@ -23,6 +23,7 @@ #define LOG_CATEGORY UCLASS_CLK +#include #include #include #include diff --git a/drivers/clk/clk-uclass.c b/drivers/clk/clk-uclass.c index 4c832f1a530..ed6e60bc484 100644 --- a/drivers/clk/clk-uclass.c +++ b/drivers/clk/clk-uclass.c @@ -8,6 +8,7 @@ #define LOG_CATEGORY UCLASS_CLK +#include #include #include #include diff --git a/drivers/clk/clk-xlnx-clock-wizard.c b/drivers/clk/clk-xlnx-clock-wizard.c index 4a3f50c638b..a10a843f11f 100644 --- a/drivers/clk/clk-xlnx-clock-wizard.c +++ b/drivers/clk/clk-xlnx-clock-wizard.c @@ -7,6 +7,7 @@ * Author: Zhengxun Li */ +#include #include #include #include diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c index b8c2e8d531b..6ede1b4d4dc 100644 --- a/drivers/clk/clk.c +++ b/drivers/clk/clk.c @@ -6,6 +6,7 @@ #define LOG_CATEGORY UCLASS_CLK +#include #include #include #include diff --git a/drivers/clk/clk_bcm6345.c b/drivers/clk/clk_bcm6345.c index 0b41872b719..8c22ed2f43d 100644 --- a/drivers/clk/clk_bcm6345.c +++ b/drivers/clk/clk_bcm6345.c @@ -6,6 +6,7 @@ * Copyright (C) 2008 Maxime Bizon */ +#include #include #include #include diff --git a/drivers/clk/clk_boston.c b/drivers/clk/clk_boston.c index 030ff7cc58e..4bcf9117551 100644 --- a/drivers/clk/clk_boston.c +++ b/drivers/clk/clk_boston.c @@ -3,6 +3,7 @@ * Copyright (C) 2016 Imagination Technologies */ +#include #include #include #include diff --git a/drivers/clk/clk_fixed_factor.c b/drivers/clk/clk_fixed_factor.c index 1d740cf49f6..6c1139e5c51 100644 --- a/drivers/clk/clk_fixed_factor.c +++ b/drivers/clk/clk_fixed_factor.c @@ -7,6 +7,7 @@ #define LOG_CATEGORY UCLASS_CLK +#include #include #include #include diff --git a/drivers/clk/clk_fixed_rate.c b/drivers/clk/clk_fixed_rate.c index d1da05cc18a..b5e78c70559 100644 --- a/drivers/clk/clk_fixed_rate.c +++ b/drivers/clk/clk_fixed_rate.c @@ -5,6 +5,7 @@ #define LOG_CATEGORY UCLASS_CLK +#include #include #include #include diff --git a/drivers/clk/clk_k210.c b/drivers/clk/clk_k210.c index d1a6cde8f0f..7432ae8f064 100644 --- a/drivers/clk/clk_k210.c +++ b/drivers/clk/clk_k210.c @@ -4,6 +4,7 @@ */ #define LOG_CATEGORY UCLASS_CLK +#include #include #include #include diff --git a/drivers/clk/clk_pic32.c b/drivers/clk/clk_pic32.c index 885aa834516..a77d0e7419c 100644 --- a/drivers/clk/clk_pic32.c +++ b/drivers/clk/clk_pic32.c @@ -4,6 +4,7 @@ * */ +#include #include #include #include diff --git a/drivers/clk/clk_sandbox.c b/drivers/clk/clk_sandbox.c index 8dd77f18d90..73d943f9e09 100644 --- a/drivers/clk/clk_sandbox.c +++ b/drivers/clk/clk_sandbox.c @@ -3,6 +3,7 @@ * (C) Copyright 2015 Google, Inc */ +#include #include #include #include diff --git a/drivers/clk/clk_sandbox_ccf.c b/drivers/clk/clk_sandbox_ccf.c index f96a15c30b3..38184e27aa4 100644 --- a/drivers/clk/clk_sandbox_ccf.c +++ b/drivers/clk/clk_sandbox_ccf.c @@ -6,6 +6,7 @@ * Common Clock Framework [CCF] driver for Sandbox */ +#include #include #include #include diff --git a/drivers/clk/clk_sandbox_test.c b/drivers/clk/clk_sandbox_test.c index 87350212775..c224dc1d2cb 100644 --- a/drivers/clk/clk_sandbox_test.c +++ b/drivers/clk/clk_sandbox_test.c @@ -3,6 +3,7 @@ * Copyright (c) 2016, NVIDIA CORPORATION. */ +#include #include #include #include diff --git a/drivers/clk/clk_scmi.c b/drivers/clk/clk_scmi.c index e42d2032d45..34a49363a51 100644 --- a/drivers/clk/clk_scmi.c +++ b/drivers/clk/clk_scmi.c @@ -5,6 +5,7 @@ #define LOG_CATEGORY UCLASS_CLK +#include #include #include #include diff --git a/drivers/clk/clk_versaclock.c b/drivers/clk/clk_versaclock.c index 9ccaf13d242..bbe72256032 100644 --- a/drivers/clk/clk_versaclock.c +++ b/drivers/clk/clk_versaclock.c @@ -5,6 +5,7 @@ * Derived from code Copyright (C) 2017 Marek Vasut */ +#include #include #include #include diff --git a/drivers/clk/clk_versal.c b/drivers/clk/clk_versal.c index 35ee56d0693..42ab032bf7e 100644 --- a/drivers/clk/clk_versal.c +++ b/drivers/clk/clk_versal.c @@ -4,6 +4,7 @@ * Siva Durga Prasad Paladugu > */ +#include #include #include #include diff --git a/drivers/clk/clk_vexpress_osc.c b/drivers/clk/clk_vexpress_osc.c index 2e0e7bbe68f..3b1e0208d47 100644 --- a/drivers/clk/clk_vexpress_osc.c +++ b/drivers/clk/clk_vexpress_osc.c @@ -5,6 +5,7 @@ * */ #define DEBUG +#include #include #include #include diff --git a/drivers/clk/clk_zynq.c b/drivers/clk/clk_zynq.c index b62b4646f4e..e3cefe2e0c7 100644 --- a/drivers/clk/clk_zynq.c +++ b/drivers/clk/clk_zynq.c @@ -7,6 +7,7 @@ * Copyright (C) 2013 Xilinx, Inc. All rights reserved. */ +#include #include #include #include diff --git a/drivers/clk/clk_zynqmp.c b/drivers/clk/clk_zynqmp.c index 59999266148..e23f7da3f92 100644 --- a/drivers/clk/clk_zynqmp.c +++ b/drivers/clk/clk_zynqmp.c @@ -5,6 +5,7 @@ * Copyright (C) 2016 Xilinx, Inc. */ +#include #include #include #include diff --git a/drivers/clk/exynos/clk-exynos7420.c b/drivers/clk/exynos/clk-exynos7420.c index 3aa751bf4e4..9caa932e12f 100644 --- a/drivers/clk/exynos/clk-exynos7420.c +++ b/drivers/clk/exynos/clk-exynos7420.c @@ -5,6 +5,7 @@ * Thomas Abraham */ +#include #include #include #include diff --git a/drivers/clk/ics8n3qv01.c b/drivers/clk/ics8n3qv01.c index 9c61a84ea61..33fb6ed0c7a 100644 --- a/drivers/clk/ics8n3qv01.c +++ b/drivers/clk/ics8n3qv01.c @@ -9,6 +9,7 @@ * Dirk Eibach, Guntermann & Drunck GmbH, eibach@gdsys.de */ +#include #include #include #include diff --git a/drivers/clk/imx/clk-composite-8m.c b/drivers/clk/imx/clk-composite-8m.c index 45f1bcaea28..494156751da 100644 --- a/drivers/clk/imx/clk-composite-8m.c +++ b/drivers/clk/imx/clk-composite-8m.c @@ -3,6 +3,7 @@ * Copyright 2019 NXP */ +#include #include #include #include diff --git a/drivers/clk/imx/clk-composite-93.c b/drivers/clk/imx/clk-composite-93.c index 2cf20be2cca..6d71c0c03ff 100644 --- a/drivers/clk/imx/clk-composite-93.c +++ b/drivers/clk/imx/clk-composite-93.c @@ -4,6 +4,7 @@ * * Peng Fan */ +#include #include #include #include diff --git a/drivers/clk/imx/clk-fracn-gppll.c b/drivers/clk/imx/clk-fracn-gppll.c index 8f42a5cb1b7..9228f279e27 100644 --- a/drivers/clk/imx/clk-fracn-gppll.c +++ b/drivers/clk/imx/clk-fracn-gppll.c @@ -3,6 +3,7 @@ * Copyright 2021 NXP */ +#include #include #include #include diff --git a/drivers/clk/imx/clk-gate-93.c b/drivers/clk/imx/clk-gate-93.c index d7f2640fbb7..bc857413713 100644 --- a/drivers/clk/imx/clk-gate-93.c +++ b/drivers/clk/imx/clk-gate-93.c @@ -5,6 +5,7 @@ * Peng Fan */ +#include #include #include #include diff --git a/drivers/clk/imx/clk-gate2.c b/drivers/clk/imx/clk-gate2.c index 65fa6b5b139..da272302377 100644 --- a/drivers/clk/imx/clk-gate2.c +++ b/drivers/clk/imx/clk-gate2.c @@ -14,6 +14,7 @@ * */ +#include #include #include #include diff --git a/drivers/clk/imx/clk-imx6q.c b/drivers/clk/imx/clk-imx6q.c index ba9923d8f6f..67825af89b8 100644 --- a/drivers/clk/imx/clk-imx6q.c +++ b/drivers/clk/imx/clk-imx6q.c @@ -4,6 +4,7 @@ * Lukasz Majewski, DENX Software Engineering, lukma@denx.de */ +#include #include #include #include diff --git a/drivers/clk/imx/clk-imx8.c b/drivers/clk/imx/clk-imx8.c index 96cf5fece75..d39b87b2e24 100644 --- a/drivers/clk/imx/clk-imx8.c +++ b/drivers/clk/imx/clk-imx8.c @@ -4,6 +4,7 @@ * Peng Fan */ +#include #include #include #include diff --git a/drivers/clk/imx/clk-imx8mm.c b/drivers/clk/imx/clk-imx8mm.c index 70e2e53bdea..1a00dd1d287 100644 --- a/drivers/clk/imx/clk-imx8mm.c +++ b/drivers/clk/imx/clk-imx8mm.c @@ -4,6 +4,7 @@ * Peng Fan */ +#include #include #include #include diff --git a/drivers/clk/imx/clk-imx8mn.c b/drivers/clk/imx/clk-imx8mn.c index ed9e16d7c18..457acb8a401 100644 --- a/drivers/clk/imx/clk-imx8mn.c +++ b/drivers/clk/imx/clk-imx8mn.c @@ -4,6 +4,7 @@ * Peng Fan */ +#include #include #include #include diff --git a/drivers/clk/imx/clk-imx8mp.c b/drivers/clk/imx/clk-imx8mp.c index 1f498b6ba4e..7dfc829df2c 100644 --- a/drivers/clk/imx/clk-imx8mp.c +++ b/drivers/clk/imx/clk-imx8mp.c @@ -4,6 +4,7 @@ * Peng Fan */ +#include #include #include #include diff --git a/drivers/clk/imx/clk-imx8mq.c b/drivers/clk/imx/clk-imx8mq.c index ed4acd79ef7..cf197df96db 100644 --- a/drivers/clk/imx/clk-imx8mq.c +++ b/drivers/clk/imx/clk-imx8mq.c @@ -5,6 +5,7 @@ * Peng Fan */ +#include #include #include #include diff --git a/drivers/clk/imx/clk-imx8qm.c b/drivers/clk/imx/clk-imx8qm.c index 62fed7e3e32..01e33de9d63 100644 --- a/drivers/clk/imx/clk-imx8qm.c +++ b/drivers/clk/imx/clk-imx8qm.c @@ -4,6 +4,7 @@ * Peng Fan */ +#include #include #include #include diff --git a/drivers/clk/imx/clk-imx8qxp.c b/drivers/clk/imx/clk-imx8qxp.c index 18bdc08971b..d900d4cd528 100644 --- a/drivers/clk/imx/clk-imx8qxp.c +++ b/drivers/clk/imx/clk-imx8qxp.c @@ -4,6 +4,7 @@ * Peng Fan */ +#include #include #include #include diff --git a/drivers/clk/imx/clk-imx93.c b/drivers/clk/imx/clk-imx93.c index ede36c412bf..f0cb797d975 100644 --- a/drivers/clk/imx/clk-imx93.c +++ b/drivers/clk/imx/clk-imx93.c @@ -3,6 +3,7 @@ * Copyright 2021 NXP. */ +#include #include #include #include diff --git a/drivers/clk/imx/clk-imxrt1020.c b/drivers/clk/imx/clk-imxrt1020.c index c80b02975aa..dc91ac5adbf 100644 --- a/drivers/clk/imx/clk-imxrt1020.c +++ b/drivers/clk/imx/clk-imxrt1020.c @@ -4,6 +4,7 @@ * Author(s): Giulio Benetti */ +#include #include #include #include diff --git a/drivers/clk/imx/clk-imxrt1050.c b/drivers/clk/imx/clk-imxrt1050.c index 754f3948427..d40635d17a4 100644 --- a/drivers/clk/imx/clk-imxrt1050.c +++ b/drivers/clk/imx/clk-imxrt1050.c @@ -4,6 +4,7 @@ * Author(s): Giulio Benetti */ +#include #include #include #include diff --git a/drivers/clk/imx/clk-imxrt1170.c b/drivers/clk/imx/clk-imxrt1170.c index 20b9dc31500..077dd1bf02d 100644 --- a/drivers/clk/imx/clk-imxrt1170.c +++ b/drivers/clk/imx/clk-imxrt1170.c @@ -4,6 +4,7 @@ * Author(s): Jesse Taube */ +#include #include #include #include diff --git a/drivers/clk/imx/clk-pfd.c b/drivers/clk/imx/clk-pfd.c index 378cdff072f..b8be3167c4c 100644 --- a/drivers/clk/imx/clk-pfd.c +++ b/drivers/clk/imx/clk-pfd.c @@ -14,6 +14,7 @@ * http://www.gnu.org/copyleft/gpl.html */ +#include #include #include #include diff --git a/drivers/clk/imx/clk-pll14xx.c b/drivers/clk/imx/clk-pll14xx.c index 3911e033905..1cb685ee9ab 100644 --- a/drivers/clk/imx/clk-pll14xx.c +++ b/drivers/clk/imx/clk-pll14xx.c @@ -5,6 +5,7 @@ * Peng Fan */ +#include #include #include #include diff --git a/drivers/clk/imx/clk-pllv3.c b/drivers/clk/imx/clk-pllv3.c index c6692f2f9f5..fad306aeed2 100644 --- a/drivers/clk/imx/clk-pllv3.c +++ b/drivers/clk/imx/clk-pllv3.c @@ -4,6 +4,7 @@ * Lukasz Majewski, DENX Software Engineering, lukma@denx.de */ +#include #include #include #include diff --git a/drivers/clk/intel/clk_intel.c b/drivers/clk/intel/clk_intel.c index a677a7caac7..46ccbb1d834 100644 --- a/drivers/clk/intel/clk_intel.c +++ b/drivers/clk/intel/clk_intel.c @@ -4,6 +4,7 @@ * Written by Simon Glass */ +#include #include #include #include diff --git a/drivers/clk/mediatek/clk-mt7622.c b/drivers/clk/mediatek/clk-mt7622.c index 2beb63030f2..259ea335959 100644 --- a/drivers/clk/mediatek/clk-mt7622.c +++ b/drivers/clk/mediatek/clk-mt7622.c @@ -6,6 +6,7 @@ * Author: Ryder Lee */ +#include #include #include #include diff --git a/drivers/clk/mediatek/clk-mt7623.c b/drivers/clk/mediatek/clk-mt7623.c index 5072c9983c1..0c7411ee814 100644 --- a/drivers/clk/mediatek/clk-mt7623.c +++ b/drivers/clk/mediatek/clk-mt7623.c @@ -6,6 +6,7 @@ * Author: Ryder Lee */ +#include #include #include #include diff --git a/drivers/clk/mediatek/clk-mt7629.c b/drivers/clk/mediatek/clk-mt7629.c index 0c796a1788a..31b6fa02251 100644 --- a/drivers/clk/mediatek/clk-mt7629.c +++ b/drivers/clk/mediatek/clk-mt7629.c @@ -6,6 +6,7 @@ * Author: Ryder Lee */ +#include #include #include #include diff --git a/drivers/clk/mediatek/clk-mt8183.c b/drivers/clk/mediatek/clk-mt8183.c index 9612a62e56a..17e653a1f00 100644 --- a/drivers/clk/mediatek/clk-mt8183.c +++ b/drivers/clk/mediatek/clk-mt8183.c @@ -8,6 +8,7 @@ * Author: Weiyi Lu */ +#include #include #include #include diff --git a/drivers/clk/mediatek/clk-mt8512.c b/drivers/clk/mediatek/clk-mt8512.c index ab270673442..193e069cb05 100644 --- a/drivers/clk/mediatek/clk-mt8512.c +++ b/drivers/clk/mediatek/clk-mt8512.c @@ -6,6 +6,7 @@ * Author: Chen Zhong */ +#include #include #include #include diff --git a/drivers/clk/mediatek/clk-mt8516.c b/drivers/clk/mediatek/clk-mt8516.c index 623f88499f1..29f70620e09 100644 --- a/drivers/clk/mediatek/clk-mt8516.c +++ b/drivers/clk/mediatek/clk-mt8516.c @@ -6,6 +6,7 @@ * Author: Fabien Parent */ +#include #include #include #include diff --git a/drivers/clk/mediatek/clk-mt8518.c b/drivers/clk/mediatek/clk-mt8518.c index ba8cc584d46..23865148372 100644 --- a/drivers/clk/mediatek/clk-mt8518.c +++ b/drivers/clk/mediatek/clk-mt8518.c @@ -6,6 +6,7 @@ * Author: Chen Zhong */ +#include #include #include #include diff --git a/drivers/clk/mediatek/clk-mtk.c b/drivers/clk/mediatek/clk-mtk.c index d2c45be30de..4303300d3a8 100644 --- a/drivers/clk/mediatek/clk-mtk.c +++ b/drivers/clk/mediatek/clk-mtk.c @@ -6,6 +6,7 @@ * Author: Ryder Lee */ +#include #include #include #include diff --git a/drivers/clk/meson/a1.c b/drivers/clk/meson/a1.c index a1b8d791491..5220a337a8b 100644 --- a/drivers/clk/meson/a1.c +++ b/drivers/clk/meson/a1.c @@ -4,6 +4,7 @@ * Author: Igor Prusov */ +#include #include #include #include diff --git a/drivers/clk/meson/axg-ao.c b/drivers/clk/meson/axg-ao.c index 6ccf52127b0..311ffc1cca9 100644 --- a/drivers/clk/meson/axg-ao.c +++ b/drivers/clk/meson/axg-ao.c @@ -1,5 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ +#include #include #include #include diff --git a/drivers/clk/meson/axg.c b/drivers/clk/meson/axg.c index c421a622a58..d6da59d269b 100644 --- a/drivers/clk/meson/axg.c +++ b/drivers/clk/meson/axg.c @@ -5,6 +5,7 @@ * Author: Neil Armstrong */ +#include #include #include #include diff --git a/drivers/clk/meson/g12a-ao.c b/drivers/clk/meson/g12a-ao.c index 61d489c6e1c..1a855a68966 100644 --- a/drivers/clk/meson/g12a-ao.c +++ b/drivers/clk/meson/g12a-ao.c @@ -1,5 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ +#include #include #include #include diff --git a/drivers/clk/meson/g12a.c b/drivers/clk/meson/g12a.c index 5d7faaa3eab..e4fed8ddfb2 100644 --- a/drivers/clk/meson/g12a.c +++ b/drivers/clk/meson/g12a.c @@ -5,6 +5,7 @@ * Author: Neil Armstrong */ +#include #include #include #include diff --git a/drivers/clk/meson/gxbb.c b/drivers/clk/meson/gxbb.c index 72ad4fd0e85..e379540deee 100644 --- a/drivers/clk/meson/gxbb.c +++ b/drivers/clk/meson/gxbb.c @@ -5,6 +5,7 @@ * Author: Neil Armstrong */ +#include #include #include #include diff --git a/drivers/clk/microchip/mpfs_clk.c b/drivers/clk/microchip/mpfs_clk.c index 0a82777ff74..08f8bfcecbe 100644 --- a/drivers/clk/microchip/mpfs_clk.c +++ b/drivers/clk/microchip/mpfs_clk.c @@ -3,6 +3,7 @@ * Copyright (C) 2020 Microchip Technology Inc. * Padmarao Begari */ +#include #include #include #include diff --git a/drivers/clk/microchip/mpfs_clk_cfg.c b/drivers/clk/microchip/mpfs_clk_cfg.c index 5e8fb995289..5739fd66e8d 100644 --- a/drivers/clk/microchip/mpfs_clk_cfg.c +++ b/drivers/clk/microchip/mpfs_clk_cfg.c @@ -3,6 +3,7 @@ * Copyright (C) 2020 Microchip Technology Inc. * Padmarao Begari */ +#include #include #include #include diff --git a/drivers/clk/microchip/mpfs_clk_msspll.c b/drivers/clk/microchip/mpfs_clk_msspll.c index d0e7b1ff844..f37c0d86047 100644 --- a/drivers/clk/microchip/mpfs_clk_msspll.c +++ b/drivers/clk/microchip/mpfs_clk_msspll.c @@ -2,6 +2,7 @@ /* * Copyright (C) 2022 Microchip Technology Inc. */ +#include #include #include #include diff --git a/drivers/clk/microchip/mpfs_clk_periph.c b/drivers/clk/microchip/mpfs_clk_periph.c index 41c6df4fb97..ddeccb91457 100644 --- a/drivers/clk/microchip/mpfs_clk_periph.c +++ b/drivers/clk/microchip/mpfs_clk_periph.c @@ -3,6 +3,7 @@ * Copyright (C) 2020 Microchip Technology Inc. * Padmarao Begari */ +#include #include #include #include diff --git a/drivers/clk/mpc83xx_clk.c b/drivers/clk/mpc83xx_clk.c index a29ad0d7a68..cc734450ef0 100644 --- a/drivers/clk/mpc83xx_clk.c +++ b/drivers/clk/mpc83xx_clk.c @@ -4,6 +4,7 @@ * Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc */ +#include #include #include #include diff --git a/drivers/clk/mtmips/clk-mt7628.c b/drivers/clk/mtmips/clk-mt7628.c index 2e263fb2cd2..4d3ac847d1d 100644 --- a/drivers/clk/mtmips/clk-mt7628.c +++ b/drivers/clk/mtmips/clk-mt7628.c @@ -5,6 +5,7 @@ * Author: Weijie Gao */ +#include #include #include #include diff --git a/drivers/clk/mvebu/armada-37xx-periph.c b/drivers/clk/mvebu/armada-37xx-periph.c index 30330393f76..f5c9bd735c1 100644 --- a/drivers/clk/mvebu/armada-37xx-periph.c +++ b/drivers/clk/mvebu/armada-37xx-periph.c @@ -8,6 +8,7 @@ * Gregory CLEMENT */ +#include #include #include #include diff --git a/drivers/clk/mvebu/armada-37xx-tbg.c b/drivers/clk/mvebu/armada-37xx-tbg.c index c1bab84c070..846a73cd6b3 100644 --- a/drivers/clk/mvebu/armada-37xx-tbg.c +++ b/drivers/clk/mvebu/armada-37xx-tbg.c @@ -8,6 +8,7 @@ * Gregory CLEMENT */ +#include #include #include #include diff --git a/drivers/clk/owl/clk_owl.c b/drivers/clk/owl/clk_owl.c index 513112c1146..678fdd5a454 100644 --- a/drivers/clk/owl/clk_owl.c +++ b/drivers/clk/owl/clk_owl.c @@ -6,6 +6,7 @@ * Copyright (C) 2018 Manivannan Sadhasivam */ +#include #include #include "clk_owl.h" #include diff --git a/drivers/clk/qcom/clock-apq8016.c b/drivers/clk/qcom/clock-apq8016.c index 41fe4d896a7..d3b63b9c1ac 100644 --- a/drivers/clk/qcom/clock-apq8016.c +++ b/drivers/clk/qcom/clock-apq8016.c @@ -7,6 +7,7 @@ * Based on Little Kernel driver, simplified */ +#include #include #include #include diff --git a/drivers/clk/qcom/clock-apq8096.c b/drivers/clk/qcom/clock-apq8096.c index c77d69128b0..479f9771a46 100644 --- a/drivers/clk/qcom/clock-apq8096.c +++ b/drivers/clk/qcom/clock-apq8096.c @@ -7,6 +7,7 @@ * Based on Little Kernel driver, simplified */ +#include #include #include #include diff --git a/drivers/clk/qcom/clock-ipq4019.c b/drivers/clk/qcom/clock-ipq4019.c index 0e6d93b3d7c..72f235eab21 100644 --- a/drivers/clk/qcom/clock-ipq4019.c +++ b/drivers/clk/qcom/clock-ipq4019.c @@ -9,6 +9,7 @@ */ #include +#include #include #include #include diff --git a/drivers/clk/qcom/clock-qcom.c b/drivers/clk/qcom/clock-qcom.c index 3a9cf2a231f..05e5ab7d094 100644 --- a/drivers/clk/qcom/clock-qcom.c +++ b/drivers/clk/qcom/clock-qcom.c @@ -12,6 +12,7 @@ * Based on Little Kernel driver, simplified */ +#include #include #include #include diff --git a/drivers/clk/qcom/clock-qcs404.c b/drivers/clk/qcom/clock-qcs404.c index 70a1f648e58..8a897a52bc0 100644 --- a/drivers/clk/qcom/clock-qcs404.c +++ b/drivers/clk/qcom/clock-qcs404.c @@ -5,6 +5,7 @@ * (C) Copyright 2022 Sumit Garg */ +#include #include #include #include diff --git a/drivers/clk/qcom/clock-sdm845.c b/drivers/clk/qcom/clock-sdm845.c index f41f8c9e8de..782df7da844 100644 --- a/drivers/clk/qcom/clock-sdm845.c +++ b/drivers/clk/qcom/clock-sdm845.c @@ -8,6 +8,7 @@ * Based on Little Kernel driver, simplified */ +#include #include #include #include diff --git a/drivers/clk/rockchip/clk_pll.c b/drivers/clk/rockchip/clk_pll.c index 44c6f14618d..66f8bb16695 100644 --- a/drivers/clk/rockchip/clk_pll.c +++ b/drivers/clk/rockchip/clk_pll.c @@ -2,6 +2,7 @@ /* * (C) Copyright 2018-2019 Rockchip Electronics Co., Ltd */ + #include #include #include #include diff --git a/drivers/clk/rockchip/clk_px30.c b/drivers/clk/rockchip/clk_px30.c index d7825c66493..2875c152b20 100644 --- a/drivers/clk/rockchip/clk_px30.c +++ b/drivers/clk/rockchip/clk_px30.c @@ -3,6 +3,7 @@ * (C) Copyright 2017 Rockchip Electronics Co., Ltd */ +#include #include #include #include diff --git a/drivers/clk/rockchip/clk_rk3036.c b/drivers/clk/rockchip/clk_rk3036.c index 274428f2b4b..6238b14c29e 100644 --- a/drivers/clk/rockchip/clk_rk3036.c +++ b/drivers/clk/rockchip/clk_rk3036.c @@ -3,6 +3,7 @@ * (C) Copyright 2015 Google, Inc */ +#include #include #include #include diff --git a/drivers/clk/rockchip/clk_rk3066.c b/drivers/clk/rockchip/clk_rk3066.c index f7dea7859f7..f83335df6db 100644 --- a/drivers/clk/rockchip/clk_rk3066.c +++ b/drivers/clk/rockchip/clk_rk3066.c @@ -5,6 +5,7 @@ */ #include +#include #include #include #include diff --git a/drivers/clk/rockchip/clk_rk3128.c b/drivers/clk/rockchip/clk_rk3128.c index a07285593b5..182754e7052 100644 --- a/drivers/clk/rockchip/clk_rk3128.c +++ b/drivers/clk/rockchip/clk_rk3128.c @@ -3,6 +3,7 @@ * (C) Copyright 2017 Rockchip Electronics Co., Ltd */ +#include #include #include #include diff --git a/drivers/clk/rockchip/clk_rk3188.c b/drivers/clk/rockchip/clk_rk3188.c index f569a100f22..f98b46a0f73 100644 --- a/drivers/clk/rockchip/clk_rk3188.c +++ b/drivers/clk/rockchip/clk_rk3188.c @@ -4,6 +4,7 @@ * (C) Copyright 2016 Heiko Stuebner */ +#include #include #include #include diff --git a/drivers/clk/rockchip/clk_rk322x.c b/drivers/clk/rockchip/clk_rk322x.c index 9b71fd863ba..9371c4f63a4 100644 --- a/drivers/clk/rockchip/clk_rk322x.c +++ b/drivers/clk/rockchip/clk_rk322x.c @@ -3,6 +3,7 @@ * (C) Copyright 2017 Rockchip Electronics Co., Ltd */ +#include #include #include #include diff --git a/drivers/clk/rockchip/clk_rk3288.c b/drivers/clk/rockchip/clk_rk3288.c index 432a79291c8..0b7eefad15f 100644 --- a/drivers/clk/rockchip/clk_rk3288.c +++ b/drivers/clk/rockchip/clk_rk3288.c @@ -3,6 +3,7 @@ * (C) Copyright 2015 Google, Inc */ +#include #include #include #include diff --git a/drivers/clk/rockchip/clk_rk3308.c b/drivers/clk/rockchip/clk_rk3308.c index e73bb6790af..861648321d4 100644 --- a/drivers/clk/rockchip/clk_rk3308.c +++ b/drivers/clk/rockchip/clk_rk3308.c @@ -2,6 +2,7 @@ /* * (C) Copyright 2017-2019 Rockchip Electronics Co., Ltd */ +#include #include #include #include diff --git a/drivers/clk/rockchip/clk_rk3328.c b/drivers/clk/rockchip/clk_rk3328.c index a4f6dd5a0f5..314b903eaa0 100644 --- a/drivers/clk/rockchip/clk_rk3328.c +++ b/drivers/clk/rockchip/clk_rk3328.c @@ -3,6 +3,7 @@ * (C) Copyright 2017 Rockchip Electronics Co., Ltd */ +#include #include #include #include diff --git a/drivers/clk/rockchip/clk_rk3368.c b/drivers/clk/rockchip/clk_rk3368.c index d8943980521..1c5dfaa3800 100644 --- a/drivers/clk/rockchip/clk_rk3368.c +++ b/drivers/clk/rockchip/clk_rk3368.c @@ -5,6 +5,7 @@ * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH */ +#include #include #include #include diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c index 24cefebd1b2..67b2c05ec9e 100644 --- a/drivers/clk/rockchip/clk_rk3399.c +++ b/drivers/clk/rockchip/clk_rk3399.c @@ -4,6 +4,7 @@ * (C) 2017 Theobroma Systems Design und Consulting GmbH */ +#include #include #include #include diff --git a/drivers/clk/rockchip/clk_rk3568.c b/drivers/clk/rockchip/clk_rk3568.c index 35563509d61..24eeca8bf26 100644 --- a/drivers/clk/rockchip/clk_rk3568.c +++ b/drivers/clk/rockchip/clk_rk3568.c @@ -4,6 +4,7 @@ * Author: Elaine Zhang */ +#include #include #include #include diff --git a/drivers/clk/rockchip/clk_rk3588.c b/drivers/clk/rockchip/clk_rk3588.c index ceae08a19aa..4c611a39049 100644 --- a/drivers/clk/rockchip/clk_rk3588.c +++ b/drivers/clk/rockchip/clk_rk3588.c @@ -4,6 +4,7 @@ * Author: Elaine Zhang */ +#include #include #include #include diff --git a/drivers/clk/rockchip/clk_rv1108.c b/drivers/clk/rockchip/clk_rv1108.c index 75202a66aa6..fc442f7eebe 100644 --- a/drivers/clk/rockchip/clk_rv1108.c +++ b/drivers/clk/rockchip/clk_rv1108.c @@ -4,6 +4,7 @@ * Author: Andy Yan */ +#include #include #include #include diff --git a/drivers/clk/rockchip/clk_rv1126.c b/drivers/clk/rockchip/clk_rv1126.c index aeeea956914..cfdfcbdb0f4 100644 --- a/drivers/clk/rockchip/clk_rv1126.c +++ b/drivers/clk/rockchip/clk_rv1126.c @@ -5,6 +5,7 @@ * Author: Finley Xiao */ +#include #include #include #include diff --git a/drivers/clk/sifive/sifive-prci.c b/drivers/clk/sifive/sifive-prci.c index 5ea86062800..c8fb6002907 100644 --- a/drivers/clk/sifive/sifive-prci.c +++ b/drivers/clk/sifive/sifive-prci.c @@ -22,6 +22,7 @@ * https://github.com/riscv/riscv-linux/commit/999529edf517ed75b56659d456d221b2ee56bb60 */ +#include #include #include #include diff --git a/drivers/clk/starfive/clk-jh7110-pll.c b/drivers/clk/starfive/clk-jh7110-pll.c index 581035842fc..1568a1f4cd9 100644 --- a/drivers/clk/starfive/clk-jh7110-pll.c +++ b/drivers/clk/starfive/clk-jh7110-pll.c @@ -6,6 +6,7 @@ * Xingyu Wu */ +#include #include #include #include diff --git a/drivers/clk/starfive/clk-jh7110.c b/drivers/clk/starfive/clk-jh7110.c index 191da75d7ba..a38694809a0 100644 --- a/drivers/clk/starfive/clk-jh7110.c +++ b/drivers/clk/starfive/clk-jh7110.c @@ -6,6 +6,7 @@ * Xingyu Wu */ +#include #include #include #include diff --git a/drivers/clk/stm32/clk-stm32-core.c b/drivers/clk/stm32/clk-stm32-core.c index cad07cc952e..37e996e78f9 100644 --- a/drivers/clk/stm32/clk-stm32-core.c +++ b/drivers/clk/stm32/clk-stm32-core.c @@ -6,6 +6,7 @@ #define LOG_CATEGORY UCLASS_CLK +#include #include #include #include diff --git a/drivers/clk/stm32/clk-stm32f.c b/drivers/clk/stm32/clk-stm32f.c index fceb3c44b94..d68c75ed201 100644 --- a/drivers/clk/stm32/clk-stm32f.c +++ b/drivers/clk/stm32/clk-stm32f.c @@ -6,6 +6,7 @@ #define LOG_CATEGORY UCLASS_CLK +#include #include #include #include diff --git a/drivers/clk/stm32/clk-stm32h7.c b/drivers/clk/stm32/clk-stm32h7.c index a554eda504d..d440c28eb48 100644 --- a/drivers/clk/stm32/clk-stm32h7.c +++ b/drivers/clk/stm32/clk-stm32h7.c @@ -6,6 +6,7 @@ #define LOG_CATEGORY UCLASS_CLK +#include #include #include #include diff --git a/drivers/clk/stm32/clk-stm32mp1.c b/drivers/clk/stm32/clk-stm32mp1.c index 204ac170531..6f000c8e444 100644 --- a/drivers/clk/stm32/clk-stm32mp1.c +++ b/drivers/clk/stm32/clk-stm32mp1.c @@ -5,6 +5,7 @@ #define LOG_CATEGORY UCLASS_CLK +#include #include #include #include diff --git a/drivers/clk/stm32/clk-stm32mp13.c b/drivers/clk/stm32/clk-stm32mp13.c index 362dba10252..5174ae53a1a 100644 --- a/drivers/clk/stm32/clk-stm32mp13.c +++ b/drivers/clk/stm32/clk-stm32mp13.c @@ -7,6 +7,7 @@ #define LOG_CATEGORY UCLASS_CLK #include +#include #include #include #include diff --git a/drivers/clk/sunxi/clk_a10.c b/drivers/clk/sunxi/clk_a10.c index 19fe248044b..f27306fe33b 100644 --- a/drivers/clk/sunxi/clk_a10.c +++ b/drivers/clk/sunxi/clk_a10.c @@ -4,6 +4,7 @@ * Author: Jagan Teki */ +#include #include #include #include diff --git a/drivers/clk/sunxi/clk_a10s.c b/drivers/clk/sunxi/clk_a10s.c index f771369c942..16ac589bb2b 100644 --- a/drivers/clk/sunxi/clk_a10s.c +++ b/drivers/clk/sunxi/clk_a10s.c @@ -4,6 +4,7 @@ * Author: Jagan Teki */ +#include #include #include #include diff --git a/drivers/clk/sunxi/clk_a23.c b/drivers/clk/sunxi/clk_a23.c index fdee4347e99..45d5ba75bf5 100644 --- a/drivers/clk/sunxi/clk_a23.c +++ b/drivers/clk/sunxi/clk_a23.c @@ -4,6 +4,7 @@ * Author: Jagan Teki */ +#include #include #include #include diff --git a/drivers/clk/sunxi/clk_a31.c b/drivers/clk/sunxi/clk_a31.c index 04f76a7c2a3..6ca800050ed 100644 --- a/drivers/clk/sunxi/clk_a31.c +++ b/drivers/clk/sunxi/clk_a31.c @@ -4,6 +4,7 @@ * Author: Jagan Teki */ +#include #include #include #include diff --git a/drivers/clk/sunxi/clk_a64.c b/drivers/clk/sunxi/clk_a64.c index f1b01d25ddd..fd26cd4f5d6 100644 --- a/drivers/clk/sunxi/clk_a64.c +++ b/drivers/clk/sunxi/clk_a64.c @@ -4,6 +4,7 @@ * Author: Jagan Teki */ +#include #include #include #include diff --git a/drivers/clk/sunxi/clk_a80.c b/drivers/clk/sunxi/clk_a80.c index 6751af8a803..c5834f44103 100644 --- a/drivers/clk/sunxi/clk_a80.c +++ b/drivers/clk/sunxi/clk_a80.c @@ -4,6 +4,7 @@ * Author: Jagan Teki */ +#include #include #include #include diff --git a/drivers/clk/sunxi/clk_a83t.c b/drivers/clk/sunxi/clk_a83t.c index d8621a3e64c..760d98cd620 100644 --- a/drivers/clk/sunxi/clk_a83t.c +++ b/drivers/clk/sunxi/clk_a83t.c @@ -4,6 +4,7 @@ * Author: Jagan Teki */ +#include #include #include #include diff --git a/drivers/clk/sunxi/clk_d1.c b/drivers/clk/sunxi/clk_d1.c index b990a118594..9dae761de83 100644 --- a/drivers/clk/sunxi/clk_d1.c +++ b/drivers/clk/sunxi/clk_d1.c @@ -3,6 +3,7 @@ * Copyright (C) 2021 Samuel Holland */ +#include #include #include #include diff --git a/drivers/clk/sunxi/clk_f1c100s.c b/drivers/clk/sunxi/clk_f1c100s.c index e2295699201..7b4c3ce5176 100644 --- a/drivers/clk/sunxi/clk_f1c100s.c +++ b/drivers/clk/sunxi/clk_f1c100s.c @@ -3,6 +3,7 @@ * Copyright (C) 2019 George Hilliard . */ +#include #include #include #include diff --git a/drivers/clk/sunxi/clk_h3.c b/drivers/clk/sunxi/clk_h3.c index ce55caeb157..32bc95fccca 100644 --- a/drivers/clk/sunxi/clk_h3.c +++ b/drivers/clk/sunxi/clk_h3.c @@ -4,6 +4,7 @@ * Author: Jagan Teki */ +#include #include #include #include diff --git a/drivers/clk/sunxi/clk_h6.c b/drivers/clk/sunxi/clk_h6.c index 1b7bd9dea2f..071fd581003 100644 --- a/drivers/clk/sunxi/clk_h6.c +++ b/drivers/clk/sunxi/clk_h6.c @@ -4,6 +4,7 @@ * Author: Jagan Teki */ +#include #include #include #include diff --git a/drivers/clk/sunxi/clk_h616.c b/drivers/clk/sunxi/clk_h616.c index b1e999e18c1..113dcff2851 100644 --- a/drivers/clk/sunxi/clk_h616.c +++ b/drivers/clk/sunxi/clk_h616.c @@ -3,6 +3,7 @@ * Copyright (C) 2021 Jernej Skrabec */ +#include #include #include #include diff --git a/drivers/clk/sunxi/clk_r40.c b/drivers/clk/sunxi/clk_r40.c index 721debdae23..0fef6f3566d 100644 --- a/drivers/clk/sunxi/clk_r40.c +++ b/drivers/clk/sunxi/clk_r40.c @@ -4,6 +4,7 @@ * Author: Jagan Teki */ +#include #include #include #include diff --git a/drivers/clk/sunxi/clk_sunxi.c b/drivers/clk/sunxi/clk_sunxi.c index 2ef4f45dacf..1782cffc404 100644 --- a/drivers/clk/sunxi/clk_sunxi.c +++ b/drivers/clk/sunxi/clk_sunxi.c @@ -4,6 +4,7 @@ * Author: Jagan Teki */ +#include #include #include #include diff --git a/drivers/clk/sunxi/clk_v3s.c b/drivers/clk/sunxi/clk_v3s.c index 85410e282e8..6524c13540e 100644 --- a/drivers/clk/sunxi/clk_v3s.c +++ b/drivers/clk/sunxi/clk_v3s.c @@ -4,6 +4,7 @@ * Author: Jagan Teki */ +#include #include #include #include diff --git a/drivers/clk/tegra/tegra-car-clk.c b/drivers/clk/tegra/tegra-car-clk.c index 1d61f8dc378..c5214b9b3e2 100644 --- a/drivers/clk/tegra/tegra-car-clk.c +++ b/drivers/clk/tegra/tegra-car-clk.c @@ -3,6 +3,7 @@ * Copyright (c) 2016, NVIDIA CORPORATION. */ +#include #include #include #include diff --git a/drivers/clk/tegra/tegra186-clk.c b/drivers/clk/tegra/tegra186-clk.c index ec52326c3b3..5a98a3f3f0e 100644 --- a/drivers/clk/tegra/tegra186-clk.c +++ b/drivers/clk/tegra/tegra186-clk.c @@ -3,6 +3,7 @@ * Copyright (c) 2016, NVIDIA CORPORATION. */ +#include #include #include #include diff --git a/drivers/clk/ti/clk-am3-dpll-x2.c b/drivers/clk/ti/clk-am3-dpll-x2.c index 1b0b9818cdd..3cf279d6a3a 100644 --- a/drivers/clk/ti/clk-am3-dpll-x2.c +++ b/drivers/clk/ti/clk-am3-dpll-x2.c @@ -7,6 +7,7 @@ * Loosely based on Linux kernel drivers/clk/ti/dpll.c */ +#include #include #include #include diff --git a/drivers/clk/ti/clk-am3-dpll.c b/drivers/clk/ti/clk-am3-dpll.c index 21ec01f8dd9..398a011a5ce 100644 --- a/drivers/clk/ti/clk-am3-dpll.c +++ b/drivers/clk/ti/clk-am3-dpll.c @@ -7,6 +7,7 @@ * Loosely based on Linux kernel drivers/clk/ti/dpll.c */ +#include #include #include #include diff --git a/drivers/clk/ti/clk-ctrl.c b/drivers/clk/ti/clk-ctrl.c index c5c97dc35c4..8926e57ebc8 100644 --- a/drivers/clk/ti/clk-ctrl.c +++ b/drivers/clk/ti/clk-ctrl.c @@ -5,6 +5,7 @@ * Copyright (C) 2020 Dario Binacchi */ +#include #include #include #include diff --git a/drivers/clk/ti/clk-divider.c b/drivers/clk/ti/clk-divider.c index 40a742d7fdc..15941f17811 100644 --- a/drivers/clk/ti/clk-divider.c +++ b/drivers/clk/ti/clk-divider.c @@ -7,6 +7,7 @@ * Loosely based on Linux kernel drivers/clk/ti/divider.c */ +#include #include #include #include diff --git a/drivers/clk/ti/clk-gate.c b/drivers/clk/ti/clk-gate.c index 873ceb8a2ab..eb15f6243f2 100644 --- a/drivers/clk/ti/clk-gate.c +++ b/drivers/clk/ti/clk-gate.c @@ -7,6 +7,7 @@ * Loosely based on Linux kernel drivers/clk/ti/gate.c */ +#include #include #include #include diff --git a/drivers/clk/ti/clk-k3-pll.c b/drivers/clk/ti/clk-k3-pll.c index b3a1b4cedb7..8323e6e6919 100644 --- a/drivers/clk/ti/clk-k3-pll.c +++ b/drivers/clk/ti/clk-k3-pll.c @@ -6,6 +6,7 @@ * Tero Kristo */ +#include #include #include #include diff --git a/drivers/clk/ti/clk-k3.c b/drivers/clk/ti/clk-k3.c index 41e5022ea0c..7aa162c2f70 100644 --- a/drivers/clk/ti/clk-k3.c +++ b/drivers/clk/ti/clk-k3.c @@ -6,6 +6,7 @@ * Tero Kristo */ +#include #include #include #include diff --git a/drivers/clk/ti/clk-mux.c b/drivers/clk/ti/clk-mux.c index db539341431..215241b1613 100644 --- a/drivers/clk/ti/clk-mux.c +++ b/drivers/clk/ti/clk-mux.c @@ -7,6 +7,7 @@ * Based on Linux kernel drivers/clk/ti/mux.c */ +#include #include #include #include diff --git a/drivers/clk/ti/clk-sci.c b/drivers/clk/ti/clk-sci.c index e374bd3bcc2..9e5760d3354 100644 --- a/drivers/clk/ti/clk-sci.c +++ b/drivers/clk/ti/clk-sci.c @@ -8,6 +8,7 @@ * Loosely based on Linux kernel sci-clk.c... */ +#include #include #include #include diff --git a/drivers/clk/ti/clk.c b/drivers/clk/ti/clk.c index 28cd1512881..6e5cc90f0f8 100644 --- a/drivers/clk/ti/clk.c +++ b/drivers/clk/ti/clk.c @@ -5,6 +5,7 @@ * Copyright (C) 2020 Dario Binacchi */ +#include #include #include #include diff --git a/drivers/clk/ti/omap4-cm.c b/drivers/clk/ti/omap4-cm.c index a30ce9d09d2..3cdc9b28887 100644 --- a/drivers/clk/ti/omap4-cm.c +++ b/drivers/clk/ti/omap4-cm.c @@ -5,6 +5,7 @@ * Copyright (C) 2020 Dario Binacchi */ +#include #include #include diff --git a/drivers/clk/uniphier/clk-uniphier-core.c b/drivers/clk/uniphier/clk-uniphier-core.c index 33369c93916..c31e59641d9 100644 --- a/drivers/clk/uniphier/clk-uniphier-core.c +++ b/drivers/clk/uniphier/clk-uniphier-core.c @@ -4,6 +4,7 @@ * Author: Masahiro Yamada */ +#include #include #include #include diff --git a/drivers/core/acpi.c b/drivers/core/acpi.c index 9f784228921..0ebd288ab42 100644 --- a/drivers/core/acpi.c +++ b/drivers/core/acpi.c @@ -8,6 +8,7 @@ #define LOG_CATEOGRY LOGC_ACPI +#include #include #include #include diff --git a/drivers/core/device-remove.c b/drivers/core/device-remove.c index 437080ed778..a86b9325dd8 100644 --- a/drivers/core/device-remove.c +++ b/drivers/core/device-remove.c @@ -10,6 +10,7 @@ #define LOG_CATEGORY LOGC_DM +#include #include #include #include diff --git a/drivers/core/device.c b/drivers/core/device.c index 18e2bd02dd5..bf7f261cbce 100644 --- a/drivers/core/device.c +++ b/drivers/core/device.c @@ -8,8 +8,8 @@ * Pavel Herrmann */ +#include #include -#include #include #include #include diff --git a/drivers/core/devres.c b/drivers/core/devres.c index 8df08b91021..78914bdf7f2 100644 --- a/drivers/core/devres.c +++ b/drivers/core/devres.c @@ -9,6 +9,7 @@ #define LOG_CATEGORY LOGC_DEVRES +#include #include #include #include diff --git a/drivers/core/dump.c b/drivers/core/dump.c index 5ec30d5b3c1..841124830ee 100644 --- a/drivers/core/dump.c +++ b/drivers/core/dump.c @@ -3,6 +3,7 @@ * Copyright (c) 2015 Google, Inc */ +#include #include #include #include diff --git a/drivers/core/fdtaddr.c b/drivers/core/fdtaddr.c index 6be8ea0c0a9..5f27d251148 100644 --- a/drivers/core/fdtaddr.c +++ b/drivers/core/fdtaddr.c @@ -8,6 +8,7 @@ * Pavel Herrmann */ +#include #include #include #include diff --git a/drivers/core/lists.c b/drivers/core/lists.c index 2839a9b7371..8034a8f48d9 100644 --- a/drivers/core/lists.c +++ b/drivers/core/lists.c @@ -8,6 +8,7 @@ #define LOG_CATEGORY LOGC_DM +#include #include #include #include diff --git a/drivers/core/of_access.c b/drivers/core/of_access.c index 41f2e09b9c2..c8db743f529 100644 --- a/drivers/core/of_access.c +++ b/drivers/core/of_access.c @@ -19,6 +19,7 @@ * Linux version. */ +#include #include #include #include diff --git a/drivers/core/of_addr.c b/drivers/core/of_addr.c index d7913ab3d2f..b3b3d7ccdd5 100644 --- a/drivers/core/of_addr.c +++ b/drivers/core/of_addr.c @@ -6,6 +6,7 @@ * Copyright (c) 2017 Google, Inc */ +#include #include #include #include diff --git a/drivers/core/of_extra.c b/drivers/core/of_extra.c index a3ebe9e9c24..59ce9174ad0 100644 --- a/drivers/core/of_extra.c +++ b/drivers/core/of_extra.c @@ -4,6 +4,7 @@ * Written by Simon Glass */ +#include #include #include #include diff --git a/drivers/core/ofnode.c b/drivers/core/ofnode.c index 9a5eaaa4d13..21a233f90f0 100644 --- a/drivers/core/ofnode.c +++ b/drivers/core/ofnode.c @@ -6,6 +6,7 @@ #define LOG_CATEGORY LOGC_DT +#include #include #include #include diff --git a/drivers/core/read.c b/drivers/core/read.c index 55c19f335ae..1a4a95cddea 100644 --- a/drivers/core/read.c +++ b/drivers/core/read.c @@ -4,6 +4,7 @@ * Written by Simon Glass */ +#include #include #include #include diff --git a/drivers/core/read_extra.c b/drivers/core/read_extra.c index 5a0153a4661..51383488278 100644 --- a/drivers/core/read_extra.c +++ b/drivers/core/read_extra.c @@ -4,6 +4,7 @@ * Written by Simon Glass */ +#include #include #include #include diff --git a/drivers/core/regmap.c b/drivers/core/regmap.c index 7ff7834bdf0..dd32328098c 100644 --- a/drivers/core/regmap.c +++ b/drivers/core/regmap.c @@ -6,6 +6,7 @@ #define LOG_CATEGORY LOGC_DM +#include #include #include #include diff --git a/drivers/core/root.c b/drivers/core/root.c index 4bfd08f4813..d4ae652bcfb 100644 --- a/drivers/core/root.c +++ b/drivers/core/root.c @@ -8,6 +8,7 @@ #define LOG_CATEGORY UCLASS_ROOT +#include #include #include #include diff --git a/drivers/core/simple-bus.c b/drivers/core/simple-bus.c index f402bb5d674..6022e7514e0 100644 --- a/drivers/core/simple-bus.c +++ b/drivers/core/simple-bus.c @@ -5,6 +5,7 @@ #define LOG_CATEGORY UCLASS_SIMPLE_BUS +#include #include #include #include diff --git a/drivers/core/simple-pm-bus.c b/drivers/core/simple-pm-bus.c index f38372ec60b..1bb0d86e289 100644 --- a/drivers/core/simple-pm-bus.c +++ b/drivers/core/simple-pm-bus.c @@ -3,6 +3,7 @@ * Copyright (C) 2020 Sean Anderson */ +#include #include #include diff --git a/drivers/core/syscon-uclass.c b/drivers/core/syscon-uclass.c index f0e69d7216b..a47b8bd3c01 100644 --- a/drivers/core/syscon-uclass.c +++ b/drivers/core/syscon-uclass.c @@ -6,6 +6,7 @@ #define LOG_CATEGORY UCLASS_SYSCON +#include #include #include #include diff --git a/drivers/core/uclass.c b/drivers/core/uclass.c index 762536eebc6..e46d5717aa6 100644 --- a/drivers/core/uclass.c +++ b/drivers/core/uclass.c @@ -8,6 +8,7 @@ #define LOG_CATEGORY LOGC_DM +#include #include #include #include diff --git a/drivers/core/util.c b/drivers/core/util.c index 108a3bc4dac..81497df85ff 100644 --- a/drivers/core/util.c +++ b/drivers/core/util.c @@ -3,6 +3,7 @@ * Copyright (c) 2013 Google, Inc */ +#include #include #include #include diff --git a/drivers/cpu/at91_cpu.c b/drivers/cpu/at91_cpu.c index b45cc6ca1a9..34a3f61c7e9 100644 --- a/drivers/cpu/at91_cpu.c +++ b/drivers/cpu/at91_cpu.c @@ -5,6 +5,7 @@ * Author: Claudiu Beznea */ +#include #include #include #include diff --git a/drivers/cpu/bmips_cpu.c b/drivers/cpu/bmips_cpu.c index db624ee47fb..3dd04fa8858 100644 --- a/drivers/cpu/bmips_cpu.c +++ b/drivers/cpu/bmips_cpu.c @@ -7,6 +7,7 @@ * Copyright (C) 2009 Florian Fainelli */ +#include #include #include #include diff --git a/drivers/cpu/cpu-uclass.c b/drivers/cpu/cpu-uclass.c index 16f8f2e5219..9772578968b 100644 --- a/drivers/cpu/cpu-uclass.c +++ b/drivers/cpu/cpu-uclass.c @@ -6,6 +6,7 @@ #define LOG_CATEGORY UCLASS_CPU +#include #include #include #include diff --git a/drivers/cpu/cpu_sandbox.c b/drivers/cpu/cpu_sandbox.c index e65e1bdc51b..2e871fe313c 100644 --- a/drivers/cpu/cpu_sandbox.c +++ b/drivers/cpu/cpu_sandbox.c @@ -4,6 +4,7 @@ * Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc */ +#include #include #include diff --git a/drivers/cpu/imx8_cpu.c b/drivers/cpu/imx8_cpu.c index 4781a565547..98ff95f5ff5 100644 --- a/drivers/cpu/imx8_cpu.c +++ b/drivers/cpu/imx8_cpu.c @@ -3,6 +3,7 @@ * Copyright 2019 NXP */ +#include #include #include #include diff --git a/drivers/cpu/microblaze_cpu.c b/drivers/cpu/microblaze_cpu.c index 4e24ada4002..a229f6913b0 100644 --- a/drivers/cpu/microblaze_cpu.c +++ b/drivers/cpu/microblaze_cpu.c @@ -2,6 +2,7 @@ /* * Copyright (C) 2022, Ovidiu Panait */ +#include #include #include #include diff --git a/drivers/cpu/mpc83xx_cpu.c b/drivers/cpu/mpc83xx_cpu.c index 9a7b5fd7c42..e451c11116a 100644 --- a/drivers/cpu/mpc83xx_cpu.c +++ b/drivers/cpu/mpc83xx_cpu.c @@ -4,6 +4,7 @@ * Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc */ +#include #include #include #include diff --git a/drivers/cpu/riscv_cpu.c b/drivers/cpu/riscv_cpu.c index 4fff4658b5f..d39a943cb84 100644 --- a/drivers/cpu/riscv_cpu.c +++ b/drivers/cpu/riscv_cpu.c @@ -5,6 +5,7 @@ */ #include +#include #include #include #include diff --git a/drivers/crypto/ace_sha.c b/drivers/crypto/ace_sha.c index 0e43e82fc5f..261d3efe84e 100644 --- a/drivers/crypto/ace_sha.c +++ b/drivers/crypto/ace_sha.c @@ -3,12 +3,10 @@ * Advanced Crypto Engine - SHA Firmware * Copyright (c) 2012 Samsung Electronics */ - -#include +#include #include "ace_sha.h" #include #include -#include #ifdef CONFIG_SHA_HW_ACCEL #include diff --git a/drivers/crypto/ace_sha.h b/drivers/crypto/ace_sha.h index efc791a4def..ad9e81a586c 100644 --- a/drivers/crypto/ace_sha.h +++ b/drivers/crypto/ace_sha.h @@ -8,8 +8,6 @@ #ifndef __ACE_SHA_H #define __ACE_SHA_H -#include - struct exynos_ace_sfr { unsigned int fc_intstat; /* base + 0 */ unsigned int fc_intenset; diff --git a/drivers/crypto/aspeed/aspeed_acry.c b/drivers/crypto/aspeed/aspeed_acry.c index e3f81ebd5c7..47a007f633a 100644 --- a/drivers/crypto/aspeed/aspeed_acry.c +++ b/drivers/crypto/aspeed/aspeed_acry.c @@ -3,6 +3,7 @@ * Copyright 2021 ASPEED Technology Inc. */ #include +#include #include #include #include diff --git a/drivers/crypto/aspeed/aspeed_hace.c b/drivers/crypto/aspeed/aspeed_hace.c index 17cc30a7b54..6b6c8fa6588 100644 --- a/drivers/crypto/aspeed/aspeed_hace.c +++ b/drivers/crypto/aspeed/aspeed_hace.c @@ -3,6 +3,7 @@ * Copyright 2021 ASPEED Technology Inc. */ #include +#include #include #include #include diff --git a/drivers/crypto/fsl/dcp_rng.c b/drivers/crypto/fsl/dcp_rng.c index 6b19c171fcd..31706960157 100644 --- a/drivers/crypto/fsl/dcp_rng.c +++ b/drivers/crypto/fsl/dcp_rng.c @@ -7,6 +7,7 @@ * Based on RNGC driver in drivers/char/hw_random/imx-rngc.c in Linux */ +#include #include #include #include diff --git a/drivers/crypto/fsl/error.c b/drivers/crypto/fsl/error.c index 7b232d94c2a..c76574919c7 100644 --- a/drivers/crypto/fsl/error.c +++ b/drivers/crypto/fsl/error.c @@ -7,9 +7,9 @@ * Derived from error.c file in linux drivers/crypto/caam */ +#include #include #include -#include #include "desc.h" #include "jr.h" diff --git a/drivers/crypto/fsl/fsl_blob.c b/drivers/crypto/fsl/fsl_blob.c index 0ecd6befd25..9b6e4bca062 100644 --- a/drivers/crypto/fsl/fsl_blob.c +++ b/drivers/crypto/fsl/fsl_blob.c @@ -4,6 +4,7 @@ * */ +#include #include #include #include diff --git a/drivers/crypto/fsl/fsl_hash.c b/drivers/crypto/fsl/fsl_hash.c index 79b32e2627c..f22f24b6077 100644 --- a/drivers/crypto/fsl/fsl_hash.c +++ b/drivers/crypto/fsl/fsl_hash.c @@ -4,6 +4,7 @@ * Copyright 2021 NXP */ +#include #include #include #include diff --git a/drivers/crypto/fsl/fsl_mfgprot.c b/drivers/crypto/fsl/fsl_mfgprot.c index 7c22f8e012b..29af79f577d 100644 --- a/drivers/crypto/fsl/fsl_mfgprot.c +++ b/drivers/crypto/fsl/fsl_mfgprot.c @@ -4,6 +4,7 @@ * Copyright 2017 NXP */ +#include #include #include #include diff --git a/drivers/crypto/fsl/fsl_rsa.c b/drivers/crypto/fsl/fsl_rsa.c index 125a72ae6d3..335b7fe25ac 100644 --- a/drivers/crypto/fsl/fsl_rsa.c +++ b/drivers/crypto/fsl/fsl_rsa.c @@ -5,6 +5,7 @@ */ #include +#include #include #include #include diff --git a/drivers/crypto/fsl/jobdesc.c b/drivers/crypto/fsl/jobdesc.c index 55191736931..d32c1fe5c31 100644 --- a/drivers/crypto/fsl/jobdesc.c +++ b/drivers/crypto/fsl/jobdesc.c @@ -8,7 +8,7 @@ * */ -#include +#include #include #include #include "desc_constr.h" diff --git a/drivers/crypto/fsl/jr.c b/drivers/crypto/fsl/jr.c index 27e24808946..8ae5c434bdb 100644 --- a/drivers/crypto/fsl/jr.c +++ b/drivers/crypto/fsl/jr.c @@ -6,7 +6,7 @@ * Based on CAAM driver in drivers/crypto/caam in Linux */ -#include +#include #include #include #include diff --git a/drivers/crypto/fsl/rng.c b/drivers/crypto/fsl/rng.c index 786a710f5fb..06364948052 100644 --- a/drivers/crypto/fsl/rng.c +++ b/drivers/crypto/fsl/rng.c @@ -7,6 +7,7 @@ */ #include +#include #include #include #include diff --git a/drivers/crypto/fsl/sec.c b/drivers/crypto/fsl/sec.c index e9c39ddcfd9..9de30a6112f 100644 --- a/drivers/crypto/fsl/sec.c +++ b/drivers/crypto/fsl/sec.c @@ -3,7 +3,7 @@ * Copyright 2014 Freescale Semiconductor, Inc. */ -#include +#include #include #include #if CONFIG_SYS_FSL_SEC_COMPAT == 2 || CONFIG_SYS_FSL_SEC_COMPAT >= 4 diff --git a/drivers/crypto/hash/hash-uclass.c b/drivers/crypto/hash/hash-uclass.c index 5d9f1e0d59b..446eb9e56a4 100644 --- a/drivers/crypto/hash/hash-uclass.c +++ b/drivers/crypto/hash/hash-uclass.c @@ -6,6 +6,7 @@ #define LOG_CATEGORY UCLASS_HASH +#include #include #include #include diff --git a/drivers/crypto/hash/hash_sw.c b/drivers/crypto/hash/hash_sw.c index ffd4ab149ff..d8065d68ea4 100644 --- a/drivers/crypto/hash/hash_sw.c +++ b/drivers/crypto/hash/hash_sw.c @@ -4,6 +4,7 @@ * Author: ChiaWei Wang */ #include +#include #include #include #include diff --git a/drivers/crypto/nuvoton/npcm_aes.c b/drivers/crypto/nuvoton/npcm_aes.c index 8d3a30ea918..6493ea108ec 100644 --- a/drivers/crypto/nuvoton/npcm_aes.c +++ b/drivers/crypto/nuvoton/npcm_aes.c @@ -3,13 +3,13 @@ * Copyright (c) 2021 Nuvoton Technology Corp. */ +#include #include #include #include #include #include #include -#include #define ONE_SECOND 0xC00000 diff --git a/drivers/crypto/nuvoton/npcm_sha.c b/drivers/crypto/nuvoton/npcm_sha.c index f06be86ca59..7ebdfa16f4f 100644 --- a/drivers/crypto/nuvoton/npcm_sha.c +++ b/drivers/crypto/nuvoton/npcm_sha.c @@ -3,6 +3,7 @@ * Copyright (c) 2022 Nuvoton Technology Corp. */ +#include #include #include #include diff --git a/drivers/crypto/rsa_mod_exp/mod_exp_sw.c b/drivers/crypto/rsa_mod_exp/mod_exp_sw.c index 4f59adc09c9..7bed444c3fb 100644 --- a/drivers/crypto/rsa_mod_exp/mod_exp_sw.c +++ b/drivers/crypto/rsa_mod_exp/mod_exp_sw.c @@ -5,6 +5,7 @@ */ #include +#include #include #include #include diff --git a/drivers/crypto/rsa_mod_exp/mod_exp_uclass.c b/drivers/crypto/rsa_mod_exp/mod_exp_uclass.c index 107500dd6e0..057cc74b10b 100644 --- a/drivers/crypto/rsa_mod_exp/mod_exp_uclass.c +++ b/drivers/crypto/rsa_mod_exp/mod_exp_uclass.c @@ -6,6 +6,7 @@ #define LOG_CATEGORY UCLASS_MOD_EXP +#include #include #include #include diff --git a/drivers/ddr/altera/sdram_agilex.c b/drivers/ddr/altera/sdram_agilex.c index 7f2cccb6af2..65ecdd022c4 100644 --- a/drivers/ddr/altera/sdram_agilex.c +++ b/drivers/ddr/altera/sdram_agilex.c @@ -4,6 +4,7 @@ * */ +#include #include #include #include diff --git a/drivers/ddr/altera/sdram_arria10.c b/drivers/ddr/altera/sdram_arria10.c index bd2af94bb0d..8ef5fa4c481 100644 --- a/drivers/ddr/altera/sdram_arria10.c +++ b/drivers/ddr/altera/sdram_arria10.c @@ -3,6 +3,7 @@ * Copyright (C) 2017 Intel Corporation */ +#include #include #include #include diff --git a/drivers/ddr/altera/sdram_gen5.c b/drivers/ddr/altera/sdram_gen5.c index 46c53e7c7a3..34d2a2789cc 100644 --- a/drivers/ddr/altera/sdram_gen5.c +++ b/drivers/ddr/altera/sdram_gen5.c @@ -2,6 +2,7 @@ /* * Copyright Altera Corporation (C) 2014-2015 */ +#include #include #include #include diff --git a/drivers/ddr/altera/sdram_n5x.c b/drivers/ddr/altera/sdram_n5x.c index db09986f64b..d9039443b91 100644 --- a/drivers/ddr/altera/sdram_n5x.c +++ b/drivers/ddr/altera/sdram_n5x.c @@ -4,6 +4,7 @@ * */ +#include #include #include #include diff --git a/drivers/ddr/altera/sdram_s10.c b/drivers/ddr/altera/sdram_s10.c index 4ac4c79e0ac..4d36fb45332 100644 --- a/drivers/ddr/altera/sdram_s10.c +++ b/drivers/ddr/altera/sdram_s10.c @@ -4,6 +4,7 @@ * */ +#include #include #include #include diff --git a/drivers/ddr/altera/sdram_soc64.c b/drivers/ddr/altera/sdram_soc64.c index 9e57c2ecfa4..4716abfc9a8 100644 --- a/drivers/ddr/altera/sdram_soc64.c +++ b/drivers/ddr/altera/sdram_soc64.c @@ -4,6 +4,7 @@ * */ +#include #include #include #include diff --git a/drivers/ddr/altera/sequencer.c b/drivers/ddr/altera/sequencer.c index 7636e71a0a6..e402f2929ab 100644 --- a/drivers/ddr/altera/sequencer.c +++ b/drivers/ddr/altera/sequencer.c @@ -3,8 +3,8 @@ * Copyright Altera Corporation (C) 2012-2015 */ +#include #include -#include #include #include #include diff --git a/drivers/ddr/altera/sequencer.h b/drivers/ddr/altera/sequencer.h index 618ba00da64..c72a683ffef 100644 --- a/drivers/ddr/altera/sequencer.h +++ b/drivers/ddr/altera/sequencer.h @@ -6,8 +6,6 @@ #ifndef _SEQUENCER_H_ #define _SEQUENCER_H_ -#include - #define RW_MGR_NUM_DM_PER_WRITE_GROUP (seq->rwcfg->mem_data_mask_width \ / seq->rwcfg->mem_if_write_dqs_width) #define RW_MGR_NUM_TRUE_DM_PER_WRITE_GROUP ( \ diff --git a/drivers/ddr/fsl/arm_ddr_gen3.c b/drivers/ddr/fsl/arm_ddr_gen3.c index 9f9aea804d9..9dada5e1175 100644 --- a/drivers/ddr/fsl/arm_ddr_gen3.c +++ b/drivers/ddr/fsl/arm_ddr_gen3.c @@ -5,7 +5,7 @@ * Derived from mpc85xx_ddr_gen3.c, removed all workarounds */ -#include +#include #include #include #include diff --git a/drivers/ddr/fsl/ctrl_regs.c b/drivers/ddr/fsl/ctrl_regs.c index 9a25192c079..8f8c2c864c3 100644 --- a/drivers/ddr/fsl/ctrl_regs.c +++ b/drivers/ddr/fsl/ctrl_regs.c @@ -10,13 +10,12 @@ * Author: James Yang [at freescale.com] */ -#include +#include #include #include #include #include #include -#include #include #include #if defined(CONFIG_FSL_LSCH2) || defined(CONFIG_FSL_LSCH3) || \ diff --git a/drivers/ddr/fsl/ddr1_dimm_params.c b/drivers/ddr/fsl/ddr1_dimm_params.c index cc87a95214d..e5481eaa0dd 100644 --- a/drivers/ddr/fsl/ddr1_dimm_params.c +++ b/drivers/ddr/fsl/ddr1_dimm_params.c @@ -3,6 +3,7 @@ * Copyright 2008 Freescale Semiconductor, Inc. */ +#include #include #include #include diff --git a/drivers/ddr/fsl/ddr2_dimm_params.c b/drivers/ddr/fsl/ddr2_dimm_params.c index 5674685a191..3b78118a9d8 100644 --- a/drivers/ddr/fsl/ddr2_dimm_params.c +++ b/drivers/ddr/fsl/ddr2_dimm_params.c @@ -3,9 +3,9 @@ * Copyright 2008 Freescale Semiconductor, Inc. */ +#include #include #include -#include #include #include diff --git a/drivers/ddr/fsl/ddr3_dimm_params.c b/drivers/ddr/fsl/ddr3_dimm_params.c index c30ecdaafaf..1f8db90c45b 100644 --- a/drivers/ddr/fsl/ddr3_dimm_params.c +++ b/drivers/ddr/fsl/ddr3_dimm_params.c @@ -8,7 +8,7 @@ * JEDEC standard No.21-C 4_01_02_11R18.pdf */ -#include +#include #include #include diff --git a/drivers/ddr/fsl/ddr4_dimm_params.c b/drivers/ddr/fsl/ddr4_dimm_params.c index 75e3bfe08be..ea791622628 100644 --- a/drivers/ddr/fsl/ddr4_dimm_params.c +++ b/drivers/ddr/fsl/ddr4_dimm_params.c @@ -10,10 +10,10 @@ * */ +#include #include #include #include -#include #include diff --git a/drivers/ddr/fsl/fsl_ddr_gen4.c b/drivers/ddr/fsl/fsl_ddr_gen4.c index 31c58d9a8e3..f8d1468a26f 100644 --- a/drivers/ddr/fsl/fsl_ddr_gen4.c +++ b/drivers/ddr/fsl/fsl_ddr_gen4.c @@ -4,7 +4,7 @@ * Copyright 2021 NXP */ -#include +#include #include #include #include diff --git a/drivers/ddr/fsl/fsl_mmdc.c b/drivers/ddr/fsl/fsl_mmdc.c index 7812b1b01ca..28f2219b2a4 100644 --- a/drivers/ddr/fsl/fsl_mmdc.c +++ b/drivers/ddr/fsl/fsl_mmdc.c @@ -7,7 +7,7 @@ * Generic driver for Freescale MMDC(Multi Mode DDR Controller). */ -#include +#include #include #include #include diff --git a/drivers/ddr/fsl/interactive.c b/drivers/ddr/fsl/interactive.c index 94a5e447d56..eb2f06e8300 100644 --- a/drivers/ddr/fsl/interactive.c +++ b/drivers/ddr/fsl/interactive.c @@ -11,11 +11,11 @@ * York Sun [at freescale.com] */ +#include #include #include #include #include -#include #include #include #include diff --git a/drivers/ddr/fsl/lc_common_dimm_params.c b/drivers/ddr/fsl/lc_common_dimm_params.c index aaf9800b372..5e4ad56f071 100644 --- a/drivers/ddr/fsl/lc_common_dimm_params.c +++ b/drivers/ddr/fsl/lc_common_dimm_params.c @@ -4,6 +4,7 @@ * Copyright 2017-2021 NXP Semiconductor */ +#include #include #include #include diff --git a/drivers/ddr/fsl/main.c b/drivers/ddr/fsl/main.c index 31091bb4495..cd332718b64 100644 --- a/drivers/ddr/fsl/main.c +++ b/drivers/ddr/fsl/main.c @@ -10,7 +10,7 @@ * Author: James Yang [at freescale.com] */ -#include +#include #include #include #include diff --git a/drivers/ddr/fsl/mpc85xx_ddr_gen1.c b/drivers/ddr/fsl/mpc85xx_ddr_gen1.c index a8520754006..16186bdbae7 100644 --- a/drivers/ddr/fsl/mpc85xx_ddr_gen1.c +++ b/drivers/ddr/fsl/mpc85xx_ddr_gen1.c @@ -3,7 +3,7 @@ * Copyright 2008 Freescale Semiconductor, Inc. */ -#include +#include #include #include #include diff --git a/drivers/ddr/fsl/mpc85xx_ddr_gen2.c b/drivers/ddr/fsl/mpc85xx_ddr_gen2.c index 00b4b376dd4..b830e7cbd14 100644 --- a/drivers/ddr/fsl/mpc85xx_ddr_gen2.c +++ b/drivers/ddr/fsl/mpc85xx_ddr_gen2.c @@ -3,9 +3,9 @@ * Copyright 2008-2011 Freescale Semiconductor, Inc. */ -#include +#include #include -#include +#include #include #include diff --git a/drivers/ddr/fsl/mpc85xx_ddr_gen3.c b/drivers/ddr/fsl/mpc85xx_ddr_gen3.c index b0a61fa2b41..1c4a1cae4df 100644 --- a/drivers/ddr/fsl/mpc85xx_ddr_gen3.c +++ b/drivers/ddr/fsl/mpc85xx_ddr_gen3.c @@ -3,10 +3,9 @@ * Copyright 2008-2020 Freescale Semiconductor, Inc. */ -#include +#include #include #include -#include #include #include #include diff --git a/drivers/ddr/fsl/options.c b/drivers/ddr/fsl/options.c index 852a5d0eca4..7cff8234584 100644 --- a/drivers/ddr/fsl/options.c +++ b/drivers/ddr/fsl/options.c @@ -4,19 +4,16 @@ * Copyright 2017-2018 NXP Semiconductor */ -#include +#include #include #include #include #include -#include #include #if defined(CONFIG_FSL_LSCH2) || defined(CONFIG_FSL_LSCH3) || \ defined(CONFIG_ARM) #include -#else -#include #endif /* diff --git a/drivers/ddr/fsl/util.c b/drivers/ddr/fsl/util.c index 0a73170e418..60051392e71 100644 --- a/drivers/ddr/fsl/util.c +++ b/drivers/ddr/fsl/util.c @@ -4,10 +4,9 @@ * Copyright 2021 NXP */ -#include +#include #ifdef CONFIG_PPC #include -#include #endif #include #include diff --git a/drivers/ddr/imx/imx8m/ddr_init.c b/drivers/ddr/imx/imx8m/ddr_init.c index e9209ce8b61..52a4aa63230 100644 --- a/drivers/ddr/imx/imx8m/ddr_init.c +++ b/drivers/ddr/imx/imx8m/ddr_init.c @@ -3,6 +3,7 @@ * Copyright 2018-2019 NXP */ +#include #include #include #include diff --git a/drivers/ddr/imx/imx8ulp/ddr_init.c b/drivers/ddr/imx/imx8ulp/ddr_init.c index 172e260a55d..c362a2da338 100644 --- a/drivers/ddr/imx/imx8ulp/ddr_init.c +++ b/drivers/ddr/imx/imx8ulp/ddr_init.c @@ -2,6 +2,7 @@ /* * Copyright 2021 NXP */ +#include #include #include #include diff --git a/drivers/ddr/imx/imx9/ddr_init.c b/drivers/ddr/imx/imx9/ddr_init.c index 5b0ad773875..7a333880e6b 100644 --- a/drivers/ddr/imx/imx9/ddr_init.c +++ b/drivers/ddr/imx/imx9/ddr_init.c @@ -3,6 +3,7 @@ * Copyright 2022 NXP */ +#include #include #include #include @@ -10,7 +11,6 @@ #include #include #include -#include static unsigned int g_cdd_rr_max[4]; static unsigned int g_cdd_rw_max[4]; diff --git a/drivers/ddr/imx/phy/ddrphy_train.c b/drivers/ddr/imx/phy/ddrphy_train.c index ccc10df1845..cd905f952c6 100644 --- a/drivers/ddr/imx/phy/ddrphy_train.c +++ b/drivers/ddr/imx/phy/ddrphy_train.c @@ -3,6 +3,7 @@ * Copyright 2018 NXP */ +#include #include #include #include diff --git a/drivers/ddr/imx/phy/ddrphy_utils.c b/drivers/ddr/imx/phy/ddrphy_utils.c index cf5bdad7abe..45e1a70dbd4 100644 --- a/drivers/ddr/imx/phy/ddrphy_utils.c +++ b/drivers/ddr/imx/phy/ddrphy_utils.c @@ -3,6 +3,7 @@ * Copyright 2018 NXP */ +#include #include #include #include diff --git a/drivers/ddr/imx/phy/helper.c b/drivers/ddr/imx/phy/helper.c index c1fc800f191..b9b2403012d 100644 --- a/drivers/ddr/imx/phy/helper.c +++ b/drivers/ddr/imx/phy/helper.c @@ -3,6 +3,7 @@ * Copyright 2018 NXP */ +#include #include #include #include diff --git a/drivers/ddr/marvell/axp/ddr3_dfs.c b/drivers/ddr/marvell/axp/ddr3_dfs.c index 985835ec923..2a4596680b1 100644 --- a/drivers/ddr/marvell/axp/ddr3_dfs.c +++ b/drivers/ddr/marvell/axp/ddr3_dfs.c @@ -3,6 +3,7 @@ * Copyright (C) Marvell International Ltd. and its affiliates */ +#include #include #include #include diff --git a/drivers/ddr/marvell/axp/ddr3_dqs.c b/drivers/ddr/marvell/axp/ddr3_dqs.c index bda0d7ec473..0db94212b90 100644 --- a/drivers/ddr/marvell/axp/ddr3_dqs.c +++ b/drivers/ddr/marvell/axp/ddr3_dqs.c @@ -3,6 +3,7 @@ * Copyright (C) Marvell International Ltd. and its affiliates */ +#include #include #include #include diff --git a/drivers/ddr/marvell/axp/ddr3_hw_training.c b/drivers/ddr/marvell/axp/ddr3_hw_training.c index bb3e1be1f4c..35d98faf58f 100644 --- a/drivers/ddr/marvell/axp/ddr3_hw_training.c +++ b/drivers/ddr/marvell/axp/ddr3_hw_training.c @@ -3,6 +3,7 @@ * Copyright (C) Marvell International Ltd. and its affiliates */ +#include #include #include #include diff --git a/drivers/ddr/marvell/axp/ddr3_init.c b/drivers/ddr/marvell/axp/ddr3_init.c index 23c6d119f61..a9dcb74cecb 100644 --- a/drivers/ddr/marvell/axp/ddr3_init.c +++ b/drivers/ddr/marvell/axp/ddr3_init.c @@ -3,6 +3,7 @@ * Copyright (C) Marvell International Ltd. and its affiliates */ +#include #include #include #include diff --git a/drivers/ddr/marvell/axp/ddr3_pbs.c b/drivers/ddr/marvell/axp/ddr3_pbs.c index 2322900185d..069a42fbf5e 100644 --- a/drivers/ddr/marvell/axp/ddr3_pbs.c +++ b/drivers/ddr/marvell/axp/ddr3_pbs.c @@ -3,6 +3,7 @@ * Copyright (C) Marvell International Ltd. and its affiliates */ +#include #include #include #include diff --git a/drivers/ddr/marvell/axp/ddr3_read_leveling.c b/drivers/ddr/marvell/axp/ddr3_read_leveling.c index db7003f72ca..30a5c354885 100644 --- a/drivers/ddr/marvell/axp/ddr3_read_leveling.c +++ b/drivers/ddr/marvell/axp/ddr3_read_leveling.c @@ -3,6 +3,7 @@ * Copyright (C) Marvell International Ltd. and its affiliates */ +#include #include #include #include diff --git a/drivers/ddr/marvell/axp/ddr3_sdram.c b/drivers/ddr/marvell/axp/ddr3_sdram.c index f8fee2623d0..0b150b20f3a 100644 --- a/drivers/ddr/marvell/axp/ddr3_sdram.c +++ b/drivers/ddr/marvell/axp/ddr3_sdram.c @@ -3,6 +3,7 @@ * Copyright (C) Marvell International Ltd. and its affiliates */ +#include #include #include #include diff --git a/drivers/ddr/marvell/axp/ddr3_spd.c b/drivers/ddr/marvell/axp/ddr3_spd.c index c169a8ea16b..4763403c127 100644 --- a/drivers/ddr/marvell/axp/ddr3_spd.c +++ b/drivers/ddr/marvell/axp/ddr3_spd.c @@ -3,6 +3,7 @@ * Copyright (C) Marvell International Ltd. and its affiliates */ +#include #include #include #include diff --git a/drivers/ddr/marvell/axp/ddr3_write_leveling.c b/drivers/ddr/marvell/axp/ddr3_write_leveling.c index ea7bac56d0e..d4add447774 100644 --- a/drivers/ddr/marvell/axp/ddr3_write_leveling.c +++ b/drivers/ddr/marvell/axp/ddr3_write_leveling.c @@ -3,6 +3,7 @@ * Copyright (C) Marvell International Ltd. and its affiliates */ +#include #include #include #include diff --git a/drivers/ddr/marvell/axp/xor.c b/drivers/ddr/marvell/axp/xor.c index 6ecacfeb933..76aea96682c 100644 --- a/drivers/ddr/marvell/axp/xor.c +++ b/drivers/ddr/marvell/axp/xor.c @@ -3,6 +3,7 @@ * Copyright (C) Marvell International Ltd. and its affiliates */ +#include #include #include #include diff --git a/drivers/ddr/microchip/ddr2.c b/drivers/ddr/microchip/ddr2.c index bfba5d245c6..149b6071cfd 100644 --- a/drivers/ddr/microchip/ddr2.c +++ b/drivers/ddr/microchip/ddr2.c @@ -3,6 +3,7 @@ * (c) 2015 Paul Thacker * */ +#include #include #include #include diff --git a/drivers/demo/demo-pdata.c b/drivers/demo/demo-pdata.c index 73711991626..818f77503a3 100644 --- a/drivers/demo/demo-pdata.c +++ b/drivers/demo/demo-pdata.c @@ -3,6 +3,7 @@ * Copyright (c) 2013 Google, Inc */ +#include #include #include diff --git a/drivers/demo/demo-shape.c b/drivers/demo/demo-shape.c index 3ccd5bced95..b6b29bcb31b 100644 --- a/drivers/demo/demo-shape.c +++ b/drivers/demo/demo-shape.c @@ -3,6 +3,7 @@ * Copyright (c) 2013 Google, Inc */ +#include #include #include #include diff --git a/drivers/demo/demo-simple.c b/drivers/demo/demo-simple.c index 944d5897222..28b271f7791 100644 --- a/drivers/demo/demo-simple.c +++ b/drivers/demo/demo-simple.c @@ -6,6 +6,7 @@ * Pavel Herrmann */ +#include #include #include #include diff --git a/drivers/demo/demo-uclass.c b/drivers/demo/demo-uclass.c index d7b1305dc65..09f9a47d4de 100644 --- a/drivers/demo/demo-uclass.c +++ b/drivers/demo/demo-uclass.c @@ -6,6 +6,7 @@ * Pavel Herrmann */ +#include #include #include #include diff --git a/drivers/dfu/dfu.c b/drivers/dfu/dfu.c index 540d48fab77..2adf26e2fe2 100644 --- a/drivers/dfu/dfu.c +++ b/drivers/dfu/dfu.c @@ -6,6 +6,7 @@ * author: Lukasz Majewski */ +#include #include #include #include diff --git a/drivers/dfu/dfu_alt.c b/drivers/dfu/dfu_alt.c index e9132936a90..ece3d2236f3 100644 --- a/drivers/dfu/dfu_alt.c +++ b/drivers/dfu/dfu_alt.c @@ -4,6 +4,7 @@ * Lukasz Majewski */ +#include #include #include #include diff --git a/drivers/dfu/dfu_mmc.c b/drivers/dfu/dfu_mmc.c index cfa6334e439..12c54e90ef7 100644 --- a/drivers/dfu/dfu_mmc.c +++ b/drivers/dfu/dfu_mmc.c @@ -6,6 +6,7 @@ * author: Lukasz Majewski */ +#include #include #include #include diff --git a/drivers/dfu/dfu_mtd.c b/drivers/dfu/dfu_mtd.c index c36ac09189f..485586989c8 100644 --- a/drivers/dfu/dfu_mtd.c +++ b/drivers/dfu/dfu_mtd.c @@ -7,6 +7,7 @@ * Based on dfu_nand.c */ +#include #include #include #include diff --git a/drivers/dfu/dfu_nand.c b/drivers/dfu/dfu_nand.c index 940cfefc986..08e8cf5cdb3 100644 --- a/drivers/dfu/dfu_nand.c +++ b/drivers/dfu/dfu_nand.c @@ -9,6 +9,7 @@ * author: Lukasz Majewski */ +#include #include #include #include diff --git a/drivers/dfu/dfu_ram.c b/drivers/dfu/dfu_ram.c index 043acbf022f..c4f4bd2e482 100644 --- a/drivers/dfu/dfu_ram.c +++ b/drivers/dfu/dfu_ram.c @@ -8,6 +8,7 @@ * author: Lukasz Majewski */ +#include #include #include #include diff --git a/drivers/dfu/dfu_sf.c b/drivers/dfu/dfu_sf.c index 7c1c0f9e2dc..2dae1593706 100644 --- a/drivers/dfu/dfu_sf.c +++ b/drivers/dfu/dfu_sf.c @@ -3,6 +3,7 @@ * Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved. */ +#include #include #include #include diff --git a/drivers/dfu/dfu_virt.c b/drivers/dfu/dfu_virt.c index 2c31445af12..29f7a08f672 100644 --- a/drivers/dfu/dfu_virt.c +++ b/drivers/dfu/dfu_virt.c @@ -2,6 +2,7 @@ /* * Copyright (C) 2019, STMicroelectronics - All Rights Reserved */ +#include #include #include #include diff --git a/drivers/dma/apbh_dma.c b/drivers/dma/apbh_dma.c index 331815c469f..da988f6bb66 100644 --- a/drivers/dma/apbh_dma.c +++ b/drivers/dma/apbh_dma.c @@ -15,6 +15,7 @@ #include #include +#include #include #include #include diff --git a/drivers/dma/bcm6348-iudma.c b/drivers/dma/bcm6348-iudma.c index fd3a353d548..33c7b981415 100644 --- a/drivers/dma/bcm6348-iudma.c +++ b/drivers/dma/bcm6348-iudma.c @@ -15,6 +15,7 @@ * Copyright (C) 2010 Broadcom Corporation */ +#include #include #include #include diff --git a/drivers/dma/dma-uclass.c b/drivers/dma/dma-uclass.c index 2c76ba3fe32..0c1d88e10c6 100644 --- a/drivers/dma/dma-uclass.c +++ b/drivers/dma/dma-uclass.c @@ -11,6 +11,7 @@ #define LOG_CATEGORY UCLASS_DMA +#include #include #include #include diff --git a/drivers/dma/fsl_dma.c b/drivers/dma/fsl_dma.c index 0cd9bcb5110..700df2236bd 100644 --- a/drivers/dma/fsl_dma.c +++ b/drivers/dma/fsl_dma.c @@ -9,6 +9,7 @@ */ #include +#include #include #include diff --git a/drivers/dma/keystone_nav.c b/drivers/dma/keystone_nav.c index c84db454bfd..9a5ba79f3fe 100644 --- a/drivers/dma/keystone_nav.c +++ b/drivers/dma/keystone_nav.c @@ -5,10 +5,10 @@ * (C) Copyright 2012-2014 * Texas Instruments Incorporated, */ +#include #include #include #include -#include struct qm_config qm_memmap = { .stat_cfg = KS2_QM_QUEUE_STATUS_BASE, diff --git a/drivers/dma/lpc32xx_dma.c b/drivers/dma/lpc32xx_dma.c index f15b67546a9..0efdfd028cf 100644 --- a/drivers/dma/lpc32xx_dma.c +++ b/drivers/dma/lpc32xx_dma.c @@ -7,9 +7,9 @@ * Copyright (c) 2015 Tyco Fire Protection Products. */ +#include #include #include -#include #include #include #include diff --git a/drivers/dma/sandbox-dma-test.c b/drivers/dma/sandbox-dma-test.c index 0290b93340f..a19e5e37fb9 100644 --- a/drivers/dma/sandbox-dma-test.c +++ b/drivers/dma/sandbox-dma-test.c @@ -7,6 +7,7 @@ * Author: Grygorii Strashko */ +#include #include #include #include diff --git a/drivers/dma/ti-edma3.c b/drivers/dma/ti-edma3.c index d64059f39ab..31ffff07f5b 100644 --- a/drivers/dma/ti-edma3.c +++ b/drivers/dma/ti-edma3.c @@ -10,6 +10,7 @@ #include #include +#include #include #include #include diff --git a/drivers/dma/ti/k3-udma.c b/drivers/dma/ti/k3-udma.c index 8e11d817a5b..ef3074aa13f 100644 --- a/drivers/dma/ti/k3-udma.c +++ b/drivers/dma/ti/k3-udma.c @@ -5,6 +5,7 @@ */ #define pr_fmt(fmt) "udma: " fmt +#include #include #include #include diff --git a/drivers/dma/xilinx_dpdma.c b/drivers/dma/xilinx_dpdma.c index 1d615ec2838..d4ee21dfc07 100644 --- a/drivers/dma/xilinx_dpdma.c +++ b/drivers/dma/xilinx_dpdma.c @@ -3,6 +3,7 @@ * Copyright (C) 2021 Xilinx Inc. */ +#include #include #include #include diff --git a/drivers/extcon/extcon-max14526.c b/drivers/extcon/extcon-max14526.c index 2d2166bde68..a33b5ef919c 100644 --- a/drivers/extcon/extcon-max14526.c +++ b/drivers/extcon/extcon-max14526.c @@ -3,6 +3,7 @@ * Copyright (c) 2022 Svyatoslav Ryhel */ +#include #include #include #include diff --git a/drivers/extcon/extcon-uclass.c b/drivers/extcon/extcon-uclass.c index 1a592873882..9dd22b57626 100644 --- a/drivers/extcon/extcon-uclass.c +++ b/drivers/extcon/extcon-uclass.c @@ -5,6 +5,7 @@ #define LOG_CATEGORY UCLASS_EXTCON +#include #include #include diff --git a/drivers/fastboot/fb_command.c b/drivers/fastboot/fb_command.c index e4484d65aca..01443c5d39e 100644 --- a/drivers/fastboot/fb_command.c +++ b/drivers/fastboot/fb_command.c @@ -3,6 +3,7 @@ * Copyright (C) 2016 The Android Open Source Project */ +#include #include #include #include @@ -12,7 +13,6 @@ #include #include #include -#include #include /** diff --git a/drivers/fastboot/fb_common.c b/drivers/fastboot/fb_common.c index 12ffb463deb..3576b067729 100644 --- a/drivers/fastboot/fb_common.c +++ b/drivers/fastboot/fb_common.c @@ -11,11 +11,11 @@ */ #include +#include #include #include #include #include -#include /** * fastboot_buf_addr - base address of the fastboot download buffer diff --git a/drivers/fastboot/fb_getvar.c b/drivers/fastboot/fb_getvar.c index 93cbd598e02..f65519c57b4 100644 --- a/drivers/fastboot/fb_getvar.c +++ b/drivers/fastboot/fb_getvar.c @@ -3,6 +3,7 @@ * Copyright (C) 2016 The Android Open Source Project */ +#include #include #include #include @@ -11,7 +12,6 @@ #include #include #include -#include #include static void getvar_version(char *var_parameter, char *response); diff --git a/drivers/fastboot/fb_mmc.c b/drivers/fastboot/fb_mmc.c index f11eb66761b..060918e4910 100644 --- a/drivers/fastboot/fb_mmc.c +++ b/drivers/fastboot/fb_mmc.c @@ -4,6 +4,7 @@ */ #include +#include #include #include #include diff --git a/drivers/fastboot/fb_nand.c b/drivers/fastboot/fb_nand.c index afc64fd5280..bbe26ddcc9b 100644 --- a/drivers/fastboot/fb_nand.c +++ b/drivers/fastboot/fb_nand.c @@ -5,6 +5,7 @@ */ #include +#include #include #include diff --git a/drivers/firmware/arm-ffa/arm-ffa-uclass.c b/drivers/firmware/arm-ffa/arm-ffa-uclass.c index e0767fc7551..f1e91d151ea 100644 --- a/drivers/firmware/arm-ffa/arm-ffa-uclass.c +++ b/drivers/firmware/arm-ffa/arm-ffa-uclass.c @@ -5,6 +5,7 @@ * Authors: * Abdellatif El Khlifi */ +#include #include #include #include diff --git a/drivers/firmware/arm-ffa/arm-ffa.c b/drivers/firmware/arm-ffa/arm-ffa.c index 94e6105cb38..ee0bf9a55b4 100644 --- a/drivers/firmware/arm-ffa/arm-ffa.c +++ b/drivers/firmware/arm-ffa/arm-ffa.c @@ -6,6 +6,7 @@ * Abdellatif El Khlifi */ +#include #include #include #include diff --git a/drivers/firmware/arm-ffa/ffa-emul-uclass.c b/drivers/firmware/arm-ffa/ffa-emul-uclass.c index 1521d9b66ac..4bf9f6041fe 100644 --- a/drivers/firmware/arm-ffa/ffa-emul-uclass.c +++ b/drivers/firmware/arm-ffa/ffa-emul-uclass.c @@ -5,6 +5,7 @@ * Authors: * Abdellatif El Khlifi */ +#include #include #include #include diff --git a/drivers/firmware/arm-ffa/sandbox_ffa.c b/drivers/firmware/arm-ffa/sandbox_ffa.c index 44b32a829dd..11142429c09 100644 --- a/drivers/firmware/arm-ffa/sandbox_ffa.c +++ b/drivers/firmware/arm-ffa/sandbox_ffa.c @@ -5,6 +5,7 @@ * Authors: * Abdellatif El Khlifi */ +#include #include #include #include diff --git a/drivers/firmware/firmware-sandbox.c b/drivers/firmware/firmware-sandbox.c index 226b5cfc191..d970d75f781 100644 --- a/drivers/firmware/firmware-sandbox.c +++ b/drivers/firmware/firmware-sandbox.c @@ -5,6 +5,7 @@ * Copyright (C) 2018 Xilinx, Inc. */ +#include #include static const struct udevice_id generic_sandbox_firmware_ids[] = { diff --git a/drivers/firmware/firmware-uclass.c b/drivers/firmware/firmware-uclass.c index 84caf25548b..e83a147a000 100644 --- a/drivers/firmware/firmware-uclass.c +++ b/drivers/firmware/firmware-uclass.c @@ -2,6 +2,7 @@ #define LOG_CATEGORY UCLASS_FIRMWARE +#include #include /* Firmware access is platform-dependent. No generic code in uclass */ diff --git a/drivers/firmware/firmware-zynqmp.c b/drivers/firmware/firmware-zynqmp.c index f99507d86c6..dfad798a2e7 100644 --- a/drivers/firmware/firmware-zynqmp.c +++ b/drivers/firmware/firmware-zynqmp.c @@ -5,6 +5,7 @@ * Copyright (C) 2018-2019 Xilinx, Inc. */ +#include #include #include #include diff --git a/drivers/firmware/psci.c b/drivers/firmware/psci.c index c32c3f5c6a5..03544d76ed4 100644 --- a/drivers/firmware/psci.c +++ b/drivers/firmware/psci.c @@ -6,6 +6,7 @@ * Copyright (C) 2015 ARM Limited */ +#include #include #include #include diff --git a/drivers/firmware/scmi/base.c b/drivers/firmware/scmi/base.c index f4e3974ff5b..1d41a8a98fc 100644 --- a/drivers/firmware/scmi/base.c +++ b/drivers/firmware/scmi/base.c @@ -6,6 +6,7 @@ * author: AKASHI Takahiro */ +#include #include #include #include diff --git a/drivers/firmware/scmi/mailbox_agent.c b/drivers/firmware/scmi/mailbox_agent.c index 6d4497f4b92..7ad3e8da9f0 100644 --- a/drivers/firmware/scmi/mailbox_agent.c +++ b/drivers/firmware/scmi/mailbox_agent.c @@ -5,6 +5,7 @@ #define LOG_CATEGORY UCLASS_SCMI_AGENT +#include #include #include #include diff --git a/drivers/firmware/scmi/optee_agent.c b/drivers/firmware/scmi/optee_agent.c index 631625d715b..48dbb88a3fb 100644 --- a/drivers/firmware/scmi/optee_agent.c +++ b/drivers/firmware/scmi/optee_agent.c @@ -5,6 +5,7 @@ #define LOG_CATEGORY UCLASS_SCMI_AGENT +#include #include #include #include diff --git a/drivers/firmware/scmi/sandbox-scmi_agent.c b/drivers/firmware/scmi/sandbox-scmi_agent.c index 19be280ec44..cc9011c7312 100644 --- a/drivers/firmware/scmi/sandbox-scmi_agent.c +++ b/drivers/firmware/scmi/sandbox-scmi_agent.c @@ -5,6 +5,7 @@ #define LOG_CATEGORY UCLASS_SCMI_AGENT +#include #include #include #include diff --git a/drivers/firmware/scmi/sandbox-scmi_devices.c b/drivers/firmware/scmi/sandbox-scmi_devices.c index 96c2922b067..603e2bb40af 100644 --- a/drivers/firmware/scmi/sandbox-scmi_devices.c +++ b/drivers/firmware/scmi/sandbox-scmi_devices.c @@ -5,6 +5,7 @@ #define LOG_CATEGORY UCLASS_MISC +#include #include #include #include diff --git a/drivers/firmware/scmi/scmi_agent-uclass.c b/drivers/firmware/scmi/scmi_agent-uclass.c index 8c907c3b032..0f1003e167e 100644 --- a/drivers/firmware/scmi/scmi_agent-uclass.c +++ b/drivers/firmware/scmi/scmi_agent-uclass.c @@ -5,6 +5,7 @@ #define LOG_CATEGORY UCLASS_SCMI_AGENT +#include #include #include #include diff --git a/drivers/firmware/scmi/smccc_agent.c b/drivers/firmware/scmi/smccc_agent.c index ac35d07ebaf..972c6addde2 100644 --- a/drivers/firmware/scmi/smccc_agent.c +++ b/drivers/firmware/scmi/smccc_agent.c @@ -5,6 +5,7 @@ #define LOG_CATEGORY UCLASS_SCMI_AGENT +#include #include #include #include diff --git a/drivers/firmware/scmi/smt.c b/drivers/firmware/scmi/smt.c index 67d2f450024..509ed618a99 100644 --- a/drivers/firmware/scmi/smt.c +++ b/drivers/firmware/scmi/smt.c @@ -6,6 +6,7 @@ #define LOG_CATEGORY UCLASS_SCMI_AGENT +#include #include #include #include diff --git a/drivers/firmware/ti_sci.c b/drivers/firmware/ti_sci.c index 8ce0f46e70c..6c581b9df9c 100644 --- a/drivers/firmware/ti_sci.c +++ b/drivers/firmware/ti_sci.c @@ -7,6 +7,7 @@ * Lokesh Vutla */ +#include #include #include #include diff --git a/drivers/fpga/ACEX1K.c b/drivers/fpga/ACEX1K.c index cb7877a8afe..4c00cdf0b57 100644 --- a/drivers/fpga/ACEX1K.c +++ b/drivers/fpga/ACEX1K.c @@ -9,7 +9,7 @@ #define LOG_CATEGORY UCLASS_FPGA -#include /* core U-Boot definitions */ +#include /* core U-Boot definitions */ #include #include #include /* ACEX device family */ diff --git a/drivers/fpga/altera.c b/drivers/fpga/altera.c index ae06f0123a0..6a4f0cb9bc0 100644 --- a/drivers/fpga/altera.c +++ b/drivers/fpga/altera.c @@ -12,6 +12,7 @@ /* * Altera FPGA support */ +#include #include #include #include diff --git a/drivers/fpga/cyclon2.c b/drivers/fpga/cyclon2.c index 7e78d6e2d6c..6e8a313db35 100644 --- a/drivers/fpga/cyclon2.c +++ b/drivers/fpga/cyclon2.c @@ -7,9 +7,8 @@ #define LOG_CATEGORY UCLASS_FPGA -#include /* core U-Boot definitions */ +#include /* core U-Boot definitions */ #include -#include #include #include /* ACEX device family */ #include diff --git a/drivers/fpga/fpga.c b/drivers/fpga/fpga.c index 38ba6c21ea2..81e6d8ffc0b 100644 --- a/drivers/fpga/fpga.c +++ b/drivers/fpga/fpga.c @@ -5,6 +5,7 @@ */ /* Generic FPGA support */ +#include /* core U-Boot definitions */ #include #include #include /* xilinx specific definitions */ diff --git a/drivers/fpga/intel_sdm_mb.c b/drivers/fpga/intel_sdm_mb.c index 45caef4f5c1..903d143a361 100644 --- a/drivers/fpga/intel_sdm_mb.c +++ b/drivers/fpga/intel_sdm_mb.c @@ -3,16 +3,14 @@ * Copyright (C) 2018 Intel Corporation */ +#include #include #include -#include #include #include #include #include -#include #include -#include #define RECONFIG_STATUS_POLL_RESP_TIMEOUT_MS 60000 #define RECONFIG_STATUS_INTERVAL_DELAY_US 1000000 diff --git a/drivers/fpga/ivm_core.c b/drivers/fpga/ivm_core.c index b9cecdd8720..adc60919f3b 100644 --- a/drivers/fpga/ivm_core.c +++ b/drivers/fpga/ivm_core.c @@ -29,6 +29,7 @@ * the ispVMLCOUNT function */ +#include #include #include #include diff --git a/drivers/fpga/lattice.c b/drivers/fpga/lattice.c index 036580cad70..e292d991cd1 100644 --- a/drivers/fpga/lattice.c +++ b/drivers/fpga/lattice.c @@ -10,6 +10,7 @@ * Copyright 2009 Lattice Semiconductor Corp. */ +#include #include #include #include diff --git a/drivers/fpga/socfpga.c b/drivers/fpga/socfpga.c index bb98c0e2bcf..d73414d5ac5 100644 --- a/drivers/fpga/socfpga.c +++ b/drivers/fpga/socfpga.c @@ -4,7 +4,7 @@ * All rights reserved. */ -#include +#include #include #include #include diff --git a/drivers/fpga/socfpga_arria10.c b/drivers/fpga/socfpga_arria10.c index e9822b2bb0e..96b195063e0 100644 --- a/drivers/fpga/socfpga_arria10.c +++ b/drivers/fpga/socfpga_arria10.c @@ -13,6 +13,7 @@ #include #include #include +#include #include #include #include diff --git a/drivers/fpga/socfpga_gen5.c b/drivers/fpga/socfpga_gen5.c index 9473f057328..d73474f29ee 100644 --- a/drivers/fpga/socfpga_gen5.c +++ b/drivers/fpga/socfpga_gen5.c @@ -4,7 +4,7 @@ * All rights reserved. */ -#include +#include #include #include #include diff --git a/drivers/fpga/spartan2.c b/drivers/fpga/spartan2.c index 9cd6cb7f0fb..6eef87b78e1 100644 --- a/drivers/fpga/spartan2.c +++ b/drivers/fpga/spartan2.c @@ -6,7 +6,7 @@ #define LOG_CATEGORY UCLASS_FPGA -#include /* core U-Boot definitions */ +#include /* core U-Boot definitions */ #include #include /* Spartan-II device family */ diff --git a/drivers/fpga/spartan3.c b/drivers/fpga/spartan3.c index b4d87d47d93..e892fa571f1 100644 --- a/drivers/fpga/spartan3.c +++ b/drivers/fpga/spartan3.c @@ -11,9 +11,8 @@ #define LOG_CATEGORY UCLASS_FPGA -#include /* core U-Boot definitions */ +#include /* core U-Boot definitions */ #include -#include #include /* Spartan-II device family */ /* Note: The assumption is that we cannot possibly run fast enough to diff --git a/drivers/fpga/stratixII.c b/drivers/fpga/stratixII.c index 73fecd9dca5..b450a81072e 100644 --- a/drivers/fpga/stratixII.c +++ b/drivers/fpga/stratixII.c @@ -4,6 +4,7 @@ * Eran Liberty, Extricom , eran.liberty@gmail.com */ +#include /* core U-Boot definitions */ #include #include diff --git a/drivers/fpga/stratixv.c b/drivers/fpga/stratixv.c index 372f16d92d1..abae3b5b751 100644 --- a/drivers/fpga/stratixv.c +++ b/drivers/fpga/stratixv.c @@ -3,6 +3,7 @@ * Copyright (C) 2016 Stefan Roese */ +#include #include #include #include diff --git a/drivers/fpga/versalpl.c b/drivers/fpga/versalpl.c index 1957e8dcaca..be58db54275 100644 --- a/drivers/fpga/versalpl.c +++ b/drivers/fpga/versalpl.c @@ -4,6 +4,7 @@ * Siva Durga Prasad Paladugu > */ +#include #include #include #include diff --git a/drivers/fpga/virtex2.c b/drivers/fpga/virtex2.c index 8e2c12bb58b..3ded27f9b3f 100644 --- a/drivers/fpga/virtex2.c +++ b/drivers/fpga/virtex2.c @@ -14,7 +14,7 @@ #define LOG_CATEGORY UCLASS_FPGA -#include +#include #include #include #include diff --git a/drivers/fpga/xilinx.c b/drivers/fpga/xilinx.c index c46513226d9..8170c3368ef 100644 --- a/drivers/fpga/xilinx.c +++ b/drivers/fpga/xilinx.c @@ -11,13 +11,13 @@ * Xilinx FPGA support */ +#include #include #include #include #include #include #include -#include /* Local Static Functions */ static int xilinx_validate(xilinx_desc *desc, char *fn); diff --git a/drivers/fpga/zynqmppl.c b/drivers/fpga/zynqmppl.c index 2b62bbbe3cf..2656f5fc5ec 100644 --- a/drivers/fpga/zynqmppl.c +++ b/drivers/fpga/zynqmppl.c @@ -6,6 +6,7 @@ */ #include +#include #include #include #include diff --git a/drivers/fpga/zynqpl.c b/drivers/fpga/zynqpl.c index 57467b4d975..a2e3b305fa4 100644 --- a/drivers/fpga/zynqpl.c +++ b/drivers/fpga/zynqpl.c @@ -6,11 +6,10 @@ * Joe Hershberger */ -#include +#include #include #include #include -#include #include #include #include diff --git a/drivers/fuzz/fuzzing_engine-uclass.c b/drivers/fuzz/fuzzing_engine-uclass.c index 08ce3ed2ec1..b16f1c4cfb7 100644 --- a/drivers/fuzz/fuzzing_engine-uclass.c +++ b/drivers/fuzz/fuzzing_engine-uclass.c @@ -6,6 +6,7 @@ #define LOG_CATEGORY UCLASS_FUZZING_ENGINE +#include #include #include diff --git a/drivers/fuzz/sandbox_fuzzing_engine.c b/drivers/fuzz/sandbox_fuzzing_engine.c index 677402470ed..ebb938e5ba8 100644 --- a/drivers/fuzz/sandbox_fuzzing_engine.c +++ b/drivers/fuzz/sandbox_fuzzing_engine.c @@ -4,6 +4,7 @@ * Written by Andrew Scull */ +#include #include #include #include diff --git a/drivers/fwu-mdata/fwu-mdata-uclass.c b/drivers/fwu-mdata/fwu-mdata-uclass.c index bab7a7e80d1..0a8edaaa418 100644 --- a/drivers/fwu-mdata/fwu-mdata-uclass.c +++ b/drivers/fwu-mdata/fwu-mdata-uclass.c @@ -5,6 +5,7 @@ #define LOG_CATEGORY UCLASS_FWU_MDATA +#include #include #include #include diff --git a/drivers/gpio/74x164_gpio.c b/drivers/gpio/74x164_gpio.c index 331428ccdb9..7a7cfe86114 100644 --- a/drivers/gpio/74x164_gpio.c +++ b/drivers/gpio/74x164_gpio.c @@ -8,6 +8,7 @@ * */ +#include #include #include #include diff --git a/drivers/gpio/altera_pio.c b/drivers/gpio/altera_pio.c index 7ba1595e4ae..edc5a8093b0 100644 --- a/drivers/gpio/altera_pio.c +++ b/drivers/gpio/altera_pio.c @@ -4,6 +4,7 @@ * Copyright (C) 2011 Missing Link Electronics * Joachim Foerster */ +#include #include #include #include diff --git a/drivers/gpio/at91_gpio.c b/drivers/gpio/at91_gpio.c index 50a69815907..f80f4afd24f 100644 --- a/drivers/gpio/at91_gpio.c +++ b/drivers/gpio/at91_gpio.c @@ -8,6 +8,7 @@ */ #include +#include #include #include #include diff --git a/drivers/gpio/atmel_pio4.c b/drivers/gpio/atmel_pio4.c index 65d064b46df..be1dd752bf7 100644 --- a/drivers/gpio/atmel_pio4.c +++ b/drivers/gpio/atmel_pio4.c @@ -5,6 +5,7 @@ * Copyright (C) 2015 Atmel Corporation * Wenyou.Yang */ +#include #include #include #include diff --git a/drivers/gpio/axp_gpio.c b/drivers/gpio/axp_gpio.c index 6e632c8fc73..af6631697f5 100644 --- a/drivers/gpio/axp_gpio.c +++ b/drivers/gpio/axp_gpio.c @@ -5,6 +5,7 @@ * X-Powers AXP Power Management ICs gpio driver */ +#include #include #include #include diff --git a/drivers/gpio/bcm2835_gpio.c b/drivers/gpio/bcm2835_gpio.c index ccf84fdae11..704a6fa7121 100644 --- a/drivers/gpio/bcm2835_gpio.c +++ b/drivers/gpio/bcm2835_gpio.c @@ -4,6 +4,7 @@ * */ +#include #include #include #include diff --git a/drivers/gpio/bcm6345_gpio.c b/drivers/gpio/bcm6345_gpio.c index e76c84e806a..e031f71a784 100644 --- a/drivers/gpio/bcm6345_gpio.c +++ b/drivers/gpio/bcm6345_gpio.c @@ -7,6 +7,7 @@ * Copyright (C) 2008-2011 Florian Fainelli */ +#include #include #include #include diff --git a/drivers/gpio/cortina_gpio.c b/drivers/gpio/cortina_gpio.c index e0ea14cce69..72ef523be96 100644 --- a/drivers/gpio/cortina_gpio.c +++ b/drivers/gpio/cortina_gpio.c @@ -5,6 +5,7 @@ * GPIO Driver for Cortina Access CAxxxx Line of SoCs */ +#include #include #include #include diff --git a/drivers/gpio/da8xx_gpio.c b/drivers/gpio/da8xx_gpio.c index 1ccb9e69f15..b310f2dbf65 100644 --- a/drivers/gpio/da8xx_gpio.c +++ b/drivers/gpio/da8xx_gpio.c @@ -6,6 +6,7 @@ * Laurence Withers */ +#include #include #include #include diff --git a/drivers/gpio/ftgpio010.c b/drivers/gpio/ftgpio010.c index 4cb550a540c..6c091d4fd87 100644 --- a/drivers/gpio/ftgpio010.c +++ b/drivers/gpio/ftgpio010.c @@ -3,6 +3,7 @@ * Faraday Technology's FTGPIO010 controller. */ +#include #include #include #include diff --git a/drivers/gpio/gpio-aspeed.c b/drivers/gpio/gpio-aspeed.c index c5608f4a9df..1c3d18796b3 100644 --- a/drivers/gpio/gpio-aspeed.c +++ b/drivers/gpio/gpio-aspeed.c @@ -6,6 +6,7 @@ * * Implementation extracted from the Linux kernel and adapted for u-boot. */ +#include #include #include diff --git a/drivers/gpio/gpio-fxl6408.c b/drivers/gpio/gpio-fxl6408.c index c8d2dff5f7b..ca7aa14eeb2 100644 --- a/drivers/gpio/gpio-fxl6408.c +++ b/drivers/gpio/gpio-fxl6408.c @@ -37,6 +37,7 @@ #include #include +#include #include #include #include diff --git a/drivers/gpio/gpio-rcar.c b/drivers/gpio/gpio-rcar.c index d1a39938809..70778501232 100644 --- a/drivers/gpio/gpio-rcar.c +++ b/drivers/gpio/gpio-rcar.c @@ -3,6 +3,7 @@ * Copyright (C) 2017 Marek Vasut */ +#include #include #include #include diff --git a/drivers/gpio/gpio-rza1.c b/drivers/gpio/gpio-rza1.c index 8c3fe61b25f..f14be871e8d 100644 --- a/drivers/gpio/gpio-rza1.c +++ b/drivers/gpio/gpio-rza1.c @@ -3,6 +3,7 @@ * Copyright (C) 2019 Marek Vasut */ +#include #include #include #include diff --git a/drivers/gpio/gpio-uclass.c b/drivers/gpio/gpio-uclass.c index 92ce68dd4a1..4234cd912c9 100644 --- a/drivers/gpio/gpio-uclass.c +++ b/drivers/gpio/gpio-uclass.c @@ -5,6 +5,7 @@ #define LOG_CATEGORY UCLASS_GPIO +#include #include #include #include diff --git a/drivers/gpio/gpio-uniphier.c b/drivers/gpio/gpio-uniphier.c index 033fb4b60ee..61c705b5ac5 100644 --- a/drivers/gpio/gpio-uniphier.c +++ b/drivers/gpio/gpio-uniphier.c @@ -4,6 +4,7 @@ * Author: Masahiro Yamada */ +#include #include #include #include diff --git a/drivers/gpio/gpio_slg7xl45106.c b/drivers/gpio/gpio_slg7xl45106.c index a7c9ff53af7..4ad06c18b4b 100644 --- a/drivers/gpio/gpio_slg7xl45106.c +++ b/drivers/gpio/gpio_slg7xl45106.c @@ -5,6 +5,7 @@ * Copyright (C) 2021 Xilinx, Inc. */ +#include #include #include #include diff --git a/drivers/gpio/hi6220_gpio.c b/drivers/gpio/hi6220_gpio.c index 7ceb5f424c9..e287c31b93f 100644 --- a/drivers/gpio/hi6220_gpio.c +++ b/drivers/gpio/hi6220_gpio.c @@ -4,6 +4,7 @@ * Peter Griffin */ +#include #include #include #include diff --git a/drivers/gpio/hsdk-creg-gpio.c b/drivers/gpio/hsdk-creg-gpio.c index 734b31d3dc1..66f8441840b 100644 --- a/drivers/gpio/hsdk-creg-gpio.c +++ b/drivers/gpio/hsdk-creg-gpio.c @@ -12,6 +12,7 @@ #include #include #include +#include #include #include #include diff --git a/drivers/gpio/imx_rgpio2p.c b/drivers/gpio/imx_rgpio2p.c index fc1d418315c..3227a8d5b57 100644 --- a/drivers/gpio/imx_rgpio2p.c +++ b/drivers/gpio/imx_rgpio2p.c @@ -5,6 +5,7 @@ * RGPIO2P driver for the Freescale i.MX7ULP. */ +#include #include #include #include diff --git a/drivers/gpio/intel_broadwell_gpio.c b/drivers/gpio/intel_broadwell_gpio.c index 53ed0a3eed0..20af35de2cf 100644 --- a/drivers/gpio/intel_broadwell_gpio.c +++ b/drivers/gpio/intel_broadwell_gpio.c @@ -3,6 +3,7 @@ * Copyright (c) 2012 The Chromium OS Authors. */ +#include #include #include #include diff --git a/drivers/gpio/intel_gpio.c b/drivers/gpio/intel_gpio.c index 0ab6e8a90bc..4a3ec6d6350 100644 --- a/drivers/gpio/intel_gpio.c +++ b/drivers/gpio/intel_gpio.c @@ -5,6 +5,7 @@ #define LOG_CATEGORY UCLASS_GPIO +#include #include #include #include diff --git a/drivers/gpio/intel_ich6_gpio.c b/drivers/gpio/intel_ich6_gpio.c index 096bc3b05bb..2ed0d0bea9a 100644 --- a/drivers/gpio/intel_ich6_gpio.c +++ b/drivers/gpio/intel_ich6_gpio.c @@ -28,6 +28,7 @@ #define LOG_CATEGORY UCLASS_GPIO +#include #include #include #include diff --git a/drivers/gpio/iproc_gpio.c b/drivers/gpio/iproc_gpio.c index 8688f12e43c..7187d3257b9 100644 --- a/drivers/gpio/iproc_gpio.c +++ b/drivers/gpio/iproc_gpio.c @@ -3,6 +3,7 @@ * Copyright (C) 2020 Broadcom */ +#include #include #include #include diff --git a/drivers/gpio/kw_gpio.c b/drivers/gpio/kw_gpio.c index e183f5594b5..a15769793f1 100644 --- a/drivers/gpio/kw_gpio.c +++ b/drivers/gpio/kw_gpio.c @@ -12,6 +12,7 @@ * Dieter Kiermaier dk-arm-linux@gmx.de */ +#include #include #include #include diff --git a/drivers/gpio/lpc32xx_gpio.c b/drivers/gpio/lpc32xx_gpio.c index 2b537e007ba..de66c765d11 100644 --- a/drivers/gpio/lpc32xx_gpio.c +++ b/drivers/gpio/lpc32xx_gpio.c @@ -6,6 +6,7 @@ * Written-by: Albert ARIBAUD */ +#include #include #include #include diff --git a/drivers/gpio/max7320_gpio.c b/drivers/gpio/max7320_gpio.c index f733cc924e5..647aed907b4 100644 --- a/drivers/gpio/max7320_gpio.c +++ b/drivers/gpio/max7320_gpio.c @@ -7,6 +7,7 @@ * */ +#include #include #include #include diff --git a/drivers/gpio/mcp230xx_gpio.c b/drivers/gpio/mcp230xx_gpio.c index 42e7fe9d474..df99fde5660 100644 --- a/drivers/gpio/mcp230xx_gpio.c +++ b/drivers/gpio/mcp230xx_gpio.c @@ -7,6 +7,7 @@ #define LOG_CATEGORY UCLASS_GPIO +#include #include #include #include diff --git a/drivers/gpio/mpc83xx_spisel_boot.c b/drivers/gpio/mpc83xx_spisel_boot.c index 2be8c73ae3d..fd26a36a0f9 100644 --- a/drivers/gpio/mpc83xx_spisel_boot.c +++ b/drivers/gpio/mpc83xx_spisel_boot.c @@ -5,6 +5,7 @@ * GPIO driver to set/clear SPISEL_BOOT pin on mpc83xx. */ +#include #include #include #include diff --git a/drivers/gpio/mpc8xx_gpio.c b/drivers/gpio/mpc8xx_gpio.c index e2b12f8b56c..2f653465331 100644 --- a/drivers/gpio/mpc8xx_gpio.c +++ b/drivers/gpio/mpc8xx_gpio.c @@ -10,6 +10,7 @@ * Copyright 2010 eXMeritus, A Boeing Company */ +#include #include #include #include diff --git a/drivers/gpio/mpc8xxx_gpio.c b/drivers/gpio/mpc8xxx_gpio.c index e9bd38f162c..f7ffd8926ad 100644 --- a/drivers/gpio/mpc8xxx_gpio.c +++ b/drivers/gpio/mpc8xxx_gpio.c @@ -9,6 +9,7 @@ * Copyright 2020-2021 NXP */ +#include #include #include #include diff --git a/drivers/gpio/mscc_sgpio.c b/drivers/gpio/mscc_sgpio.c index 5a40304f1f9..c97e44005ee 100644 --- a/drivers/gpio/mscc_sgpio.c +++ b/drivers/gpio/mscc_sgpio.c @@ -7,6 +7,7 @@ * Copyright (c) 2018 Microsemi Corporation */ +#include #include #include #include diff --git a/drivers/gpio/msm_gpio.c b/drivers/gpio/msm_gpio.c index 2fb266f1285..f5d9ab54e81 100644 --- a/drivers/gpio/msm_gpio.c +++ b/drivers/gpio/msm_gpio.c @@ -5,6 +5,7 @@ * (C) Copyright 2015 Mateusz Kulikowski */ +#include #include #include #include diff --git a/drivers/gpio/mt7621_gpio.c b/drivers/gpio/mt7621_gpio.c index 63a202310a5..43bb4df4da7 100644 --- a/drivers/gpio/mt7621_gpio.c +++ b/drivers/gpio/mt7621_gpio.c @@ -7,6 +7,7 @@ * Copyright (C) 2013 John Crispin */ +#include #include #include #include diff --git a/drivers/gpio/mvebu_gpio.c b/drivers/gpio/mvebu_gpio.c index 0d82380dde4..f706a6dfa4f 100644 --- a/drivers/gpio/mvebu_gpio.c +++ b/drivers/gpio/mvebu_gpio.c @@ -3,6 +3,7 @@ * Copyright (C) 2016 Stefan Roese */ +#include #include #include #include diff --git a/drivers/gpio/mxc_gpio.c b/drivers/gpio/mxc_gpio.c index cac6b32b279..1dec4e35e0a 100644 --- a/drivers/gpio/mxc_gpio.c +++ b/drivers/gpio/mxc_gpio.c @@ -6,6 +6,7 @@ * Copyright (C) 2011 * Stefano Babic, DENX Software Engineering, */ +#include #include #include #include diff --git a/drivers/gpio/mxs_gpio.c b/drivers/gpio/mxs_gpio.c index 80910c9ec4c..1356f89ac2f 100644 --- a/drivers/gpio/mxs_gpio.c +++ b/drivers/gpio/mxs_gpio.c @@ -6,6 +6,7 @@ * on behalf of DENX Software Engineering GmbH */ +#include #include #include #include diff --git a/drivers/gpio/nmk_gpio.c b/drivers/gpio/nmk_gpio.c index c2716e71763..e1bb41b196c 100644 --- a/drivers/gpio/nmk_gpio.c +++ b/drivers/gpio/nmk_gpio.c @@ -1,6 +1,7 @@ // SPDX-License-Identifier: GPL-2.0+ /* Copyright (C) 2019 Stephan Gerhold */ +#include #include #include #include diff --git a/drivers/gpio/npcm_gpio.c b/drivers/gpio/npcm_gpio.c index da3b3ffbc92..98e5dc79c1c 100644 --- a/drivers/gpio/npcm_gpio.c +++ b/drivers/gpio/npcm_gpio.c @@ -3,6 +3,7 @@ * Copyright (c) 2022 Nuvoton Technology Corp. */ +#include #include #include #include diff --git a/drivers/gpio/nx_gpio.c b/drivers/gpio/nx_gpio.c index 741b2ff7f17..e2565d70953 100644 --- a/drivers/gpio/nx_gpio.c +++ b/drivers/gpio/nx_gpio.c @@ -4,6 +4,7 @@ * DeokJin, Lee */ +#include #include #include #include diff --git a/drivers/gpio/omap_gpio.c b/drivers/gpio/omap_gpio.c index 1aceafcdf58..50c4f75ddf5 100644 --- a/drivers/gpio/omap_gpio.c +++ b/drivers/gpio/omap_gpio.c @@ -17,6 +17,7 @@ * Copyright (C) 2003-2005 Nokia Corporation * Written by Juha Yrjölä */ +#include #include #include #include diff --git a/drivers/gpio/pca953x.c b/drivers/gpio/pca953x.c index fc4dcf9f986..b5ed35256ee 100644 --- a/drivers/gpio/pca953x.c +++ b/drivers/gpio/pca953x.c @@ -8,11 +8,10 @@ * pca9539, etc) */ -#include +#include #include #include #include -#include /* Default to an address that hopefully won't corrupt other i2c devices */ #ifndef CFG_SYS_I2C_PCA953X_ADDR diff --git a/drivers/gpio/pca953x_gpio.c b/drivers/gpio/pca953x_gpio.c index 80ebaadb3e4..b0c66d18317 100644 --- a/drivers/gpio/pca953x_gpio.c +++ b/drivers/gpio/pca953x_gpio.c @@ -18,6 +18,7 @@ * 2. Support Polarity Inversion */ +#include #include #include #include diff --git a/drivers/gpio/pcf8575_gpio.c b/drivers/gpio/pcf8575_gpio.c index 10ae86ec5d4..f38e215c4d6 100644 --- a/drivers/gpio/pcf8575_gpio.c +++ b/drivers/gpio/pcf8575_gpio.c @@ -17,6 +17,7 @@ * */ +#include #include #include #include diff --git a/drivers/gpio/pic32_gpio.c b/drivers/gpio/pic32_gpio.c index d8edfefb2d7..975a2af3ccb 100644 --- a/drivers/gpio/pic32_gpio.c +++ b/drivers/gpio/pic32_gpio.c @@ -4,6 +4,7 @@ * Purna Chandra Mandal */ +#include #include #include #include diff --git a/drivers/gpio/qcom_pmic_gpio.c b/drivers/gpio/qcom_pmic_gpio.c index 80fee841ee3..0dd3434e9e0 100644 --- a/drivers/gpio/qcom_pmic_gpio.c +++ b/drivers/gpio/qcom_pmic_gpio.c @@ -5,6 +5,7 @@ * (C) Copyright 2015 Mateusz Kulikowski */ +#include #include #include #include diff --git a/drivers/gpio/qe_gpio.c b/drivers/gpio/qe_gpio.c index ac6e68299e0..16e8d1eae6e 100644 --- a/drivers/gpio/qe_gpio.c +++ b/drivers/gpio/qe_gpio.c @@ -4,6 +4,7 @@ * Christophe Leroy */ +#include #include #include #include diff --git a/drivers/gpio/rk_gpio.c b/drivers/gpio/rk_gpio.c index 24ba12dd820..2e901ac5c73 100644 --- a/drivers/gpio/rk_gpio.c +++ b/drivers/gpio/rk_gpio.c @@ -6,6 +6,7 @@ * Peter, Software Engineering, . */ +#include #include #include #include diff --git a/drivers/gpio/s5p_gpio.c b/drivers/gpio/s5p_gpio.c index 83e65aa4aec..06ed585f3d6 100644 --- a/drivers/gpio/s5p_gpio.c +++ b/drivers/gpio/s5p_gpio.c @@ -4,6 +4,7 @@ * Minkyu Kang */ +#include #include #include #include diff --git a/drivers/gpio/sandbox.c b/drivers/gpio/sandbox.c index f5be2781443..305f9a6ff62 100644 --- a/drivers/gpio/sandbox.c +++ b/drivers/gpio/sandbox.c @@ -3,6 +3,7 @@ * Copyright (c) 2011 The Chromium OS Authors. */ +#include #include #include #include diff --git a/drivers/gpio/sandbox_test.c b/drivers/gpio/sandbox_test.c index 4699a976252..c76e1997419 100644 --- a/drivers/gpio/sandbox_test.c +++ b/drivers/gpio/sandbox_test.c @@ -5,6 +5,7 @@ * Copyright 2021 Google LLC */ +#include #include #include diff --git a/drivers/gpio/sh_pfc.c b/drivers/gpio/sh_pfc.c index 9f6051c1c4d..2495d6c1c15 100644 --- a/drivers/gpio/sh_pfc.c +++ b/drivers/gpio/sh_pfc.c @@ -9,6 +9,7 @@ * for more details. */ +#include #include #include #include diff --git a/drivers/gpio/sifive-gpio.c b/drivers/gpio/sifive-gpio.c index 90f59120ecd..151f484e8fd 100644 --- a/drivers/gpio/sifive-gpio.c +++ b/drivers/gpio/sifive-gpio.c @@ -5,6 +5,7 @@ * Copyright (C) 2019 SiFive, Inc. */ +#include #include #include #include diff --git a/drivers/gpio/sl28cpld-gpio.c b/drivers/gpio/sl28cpld-gpio.c index e85f9260ec3..700fc3df298 100644 --- a/drivers/gpio/sl28cpld-gpio.c +++ b/drivers/gpio/sl28cpld-gpio.c @@ -5,6 +5,7 @@ * Copyright (c) 2021 Michael Walle */ +#include #include #include #include diff --git a/drivers/gpio/stm32_gpio.c b/drivers/gpio/stm32_gpio.c index b8eb55465d3..7a2ca91c769 100644 --- a/drivers/gpio/stm32_gpio.c +++ b/drivers/gpio/stm32_gpio.c @@ -6,6 +6,7 @@ #define LOG_CATEGORY UCLASS_GPIO +#include #include #include #include diff --git a/drivers/gpio/sunxi_gpio.c b/drivers/gpio/sunxi_gpio.c index 5e86474d3db..e4463a223f7 100644 --- a/drivers/gpio/sunxi_gpio.c +++ b/drivers/gpio/sunxi_gpio.c @@ -9,6 +9,7 @@ * Tom Cubie */ +#include #include #include #include diff --git a/drivers/gpio/tca642x.c b/drivers/gpio/tca642x.c index 1d45b500746..b07496e6e49 100644 --- a/drivers/gpio/tca642x.c +++ b/drivers/gpio/tca642x.c @@ -20,7 +20,7 @@ * MA 02111-1307 USA */ -#include +#include #include #include #include diff --git a/drivers/gpio/tegra186_gpio.c b/drivers/gpio/tegra186_gpio.c index 01b8245c8d5..94a20d143e1 100644 --- a/drivers/gpio/tegra186_gpio.c +++ b/drivers/gpio/tegra186_gpio.c @@ -4,6 +4,7 @@ * (based on tegra_gpio.c) */ +#include #include #include #include diff --git a/drivers/gpio/tegra_gpio.c b/drivers/gpio/tegra_gpio.c index 0c40d36c41e..55105f2802c 100644 --- a/drivers/gpio/tegra_gpio.c +++ b/drivers/gpio/tegra_gpio.c @@ -10,6 +10,7 @@ * Tom Warren (twarren@nvidia.com) */ +#include #include #include #include diff --git a/drivers/gpio/vybrid_gpio.c b/drivers/gpio/vybrid_gpio.c index 5b4bba96da7..339392dcd35 100644 --- a/drivers/gpio/vybrid_gpio.c +++ b/drivers/gpio/vybrid_gpio.c @@ -4,6 +4,7 @@ * Bhuvanchandra DV, Toradex, Inc. */ +#include #include #include #include diff --git a/drivers/gpio/xilinx_gpio.c b/drivers/gpio/xilinx_gpio.c index c0a92378b03..fa8d630b465 100644 --- a/drivers/gpio/xilinx_gpio.c +++ b/drivers/gpio/xilinx_gpio.c @@ -3,6 +3,7 @@ * Copyright (c) 2013 - 2018 Xilinx, Michal Simek */ +#include #include #include #include diff --git a/drivers/gpio/zynq_gpio.c b/drivers/gpio/zynq_gpio.c index 7db58c70663..71a56127c0a 100644 --- a/drivers/gpio/zynq_gpio.c +++ b/drivers/gpio/zynq_gpio.c @@ -8,6 +8,7 @@ * Copyright (C) 2009 - 2014 Xilinx, Inc. */ +#include #include #include #include diff --git a/drivers/gpio/zynqmp_gpio_modepin.c b/drivers/gpio/zynqmp_gpio_modepin.c index 8aaffaf37b3..e9565ff5430 100644 --- a/drivers/gpio/zynqmp_gpio_modepin.c +++ b/drivers/gpio/zynqmp_gpio_modepin.c @@ -5,6 +5,7 @@ * Copyright (C) 2021 Xilinx, Inc. */ +#include #include #include #include diff --git a/drivers/hwspinlock/hwspinlock-uclass.c b/drivers/hwspinlock/hwspinlock-uclass.c index ea93efc97df..e9a4d7f9fbb 100644 --- a/drivers/hwspinlock/hwspinlock-uclass.c +++ b/drivers/hwspinlock/hwspinlock-uclass.c @@ -5,6 +5,7 @@ #define LOG_CATEGORY UCLASS_HWSPINLOCK +#include #include #include #include diff --git a/drivers/hwspinlock/sandbox_hwspinlock.c b/drivers/hwspinlock/sandbox_hwspinlock.c index fcda55517e1..be920f5f99d 100644 --- a/drivers/hwspinlock/sandbox_hwspinlock.c +++ b/drivers/hwspinlock/sandbox_hwspinlock.c @@ -3,6 +3,7 @@ * Copyright (C) 2018, STMicroelectronics - All Rights Reserved */ +#include #include #include #include diff --git a/drivers/hwspinlock/stm32_hwspinlock.c b/drivers/hwspinlock/stm32_hwspinlock.c index 5273b9bfed8..346b138e98f 100644 --- a/drivers/hwspinlock/stm32_hwspinlock.c +++ b/drivers/hwspinlock/stm32_hwspinlock.c @@ -5,6 +5,7 @@ #define LOG_CATEGORY UCLASS_HWSPINLOCK +#include #include #include #include diff --git a/drivers/i2c/acpi_i2c.c b/drivers/i2c/acpi_i2c.c index 82cb5db5cc8..142f41178c1 100644 --- a/drivers/i2c/acpi_i2c.c +++ b/drivers/i2c/acpi_i2c.c @@ -3,6 +3,7 @@ * Copyright 2019 Google LLC */ +#include #include #include #include diff --git a/drivers/i2c/ast2600_i2c.c b/drivers/i2c/ast2600_i2c.c index 9d1d70670b9..e566b01feac 100644 --- a/drivers/i2c/ast2600_i2c.c +++ b/drivers/i2c/ast2600_i2c.c @@ -2,6 +2,7 @@ /* * Copyright ASPEED Technology Inc. */ +#include #include #include #include diff --git a/drivers/i2c/ast_i2c.c b/drivers/i2c/ast_i2c.c index 02ee406bbd7..1c1d5566dad 100644 --- a/drivers/i2c/ast_i2c.c +++ b/drivers/i2c/ast_i2c.c @@ -5,6 +5,7 @@ * Copyright 2017 Google, Inc. */ +#include #include #include #include diff --git a/drivers/i2c/at91_i2c.c b/drivers/i2c/at91_i2c.c index cfae36c74d1..b7a25885e66 100644 --- a/drivers/i2c/at91_i2c.c +++ b/drivers/i2c/at91_i2c.c @@ -8,6 +8,7 @@ #include #include #include +#include #include #include #include diff --git a/drivers/i2c/cros_ec_ldo.c b/drivers/i2c/cros_ec_ldo.c index dfe823c142c..c593540ac13 100644 --- a/drivers/i2c/cros_ec_ldo.c +++ b/drivers/i2c/cros_ec_ldo.c @@ -4,6 +4,7 @@ * Written by Simon Glass */ +#include #include #include #include diff --git a/drivers/i2c/cros_ec_tunnel.c b/drivers/i2c/cros_ec_tunnel.c index 2d610e0a2aa..75828b6e7c2 100644 --- a/drivers/i2c/cros_ec_tunnel.c +++ b/drivers/i2c/cros_ec_tunnel.c @@ -4,6 +4,7 @@ * Written by Simon Glass */ +#include #include #include #include diff --git a/drivers/i2c/davinci_i2c.c b/drivers/i2c/davinci_i2c.c index 39132747208..25ef937dc0b 100644 --- a/drivers/i2c/davinci_i2c.c +++ b/drivers/i2c/davinci_i2c.c @@ -11,7 +11,7 @@ * Please see doc/driver-model/i2c-howto.rst for instructions. */ -#include +#include #include #include #include diff --git a/drivers/i2c/designware_i2c.c b/drivers/i2c/designware_i2c.c index e8c1623d41f..29cf63375c7 100644 --- a/drivers/i2c/designware_i2c.c +++ b/drivers/i2c/designware_i2c.c @@ -4,6 +4,7 @@ * Vipin Kumar, STMicroelectronics, vipin.kumar@st.com. */ +#include #include #include #include diff --git a/drivers/i2c/designware_i2c_pci.c b/drivers/i2c/designware_i2c_pci.c index 11c98672265..28495a3f428 100644 --- a/drivers/i2c/designware_i2c_pci.c +++ b/drivers/i2c/designware_i2c_pci.c @@ -5,6 +5,7 @@ * Copyright 2019 Google Inc */ +#include #include #include #include diff --git a/drivers/i2c/exynos_hs_i2c.c b/drivers/i2c/exynos_hs_i2c.c index 9a364fdae37..a7349e06cfd 100644 --- a/drivers/i2c/exynos_hs_i2c.c +++ b/drivers/i2c/exynos_hs_i2c.c @@ -6,6 +6,7 @@ * David Mueller, ELSOFT AG, d.mueller@elsoft.ch */ +#include #include #include #include diff --git a/drivers/i2c/fsl_i2c.c b/drivers/i2c/fsl_i2c.c index bac14fb2f42..d9d8ee81d2e 100644 --- a/drivers/i2c/fsl_i2c.c +++ b/drivers/i2c/fsl_i2c.c @@ -6,7 +6,7 @@ * Changes for multibus/multiadapter I2C support. */ -#include +#include #include #include /* Functional interface */ #include diff --git a/drivers/i2c/i2c-cdns.c b/drivers/i2c/i2c-cdns.c index 3f7cf8533ec..935b2ac6377 100644 --- a/drivers/i2c/i2c-cdns.c +++ b/drivers/i2c/i2c-cdns.c @@ -7,6 +7,7 @@ * with added driver-model support and code cleanup. */ +#include #include #include #include diff --git a/drivers/i2c/i2c-cortina.c b/drivers/i2c/i2c-cortina.c index 96f957164c1..960ae8c700f 100644 --- a/drivers/i2c/i2c-cortina.c +++ b/drivers/i2c/i2c-cortina.c @@ -4,12 +4,12 @@ * Arthur Li, Cortina Access, arthur.li@cortina-access.com. */ +#include #include #include #include #include #include -#include #include "i2c-cortina.h" static void set_speed(struct i2c_regs *regs, int i2c_spd) diff --git a/drivers/i2c/i2c-emul-uclass.c b/drivers/i2c/i2c-emul-uclass.c index 0954d53847e..d421ddfcbe2 100644 --- a/drivers/i2c/i2c-emul-uclass.c +++ b/drivers/i2c/i2c-emul-uclass.c @@ -5,6 +5,7 @@ #define LOG_CATEGORY UCLASS_I2C_EMUL +#include #include #include #include diff --git a/drivers/i2c/i2c-gpio.c b/drivers/i2c/i2c-gpio.c index e0a575fb4a4..5fc3cfe42ef 100644 --- a/drivers/i2c/i2c-gpio.c +++ b/drivers/i2c/i2c-gpio.c @@ -5,6 +5,7 @@ * This file is based on: drivers/i2c/soft-i2c.c, * with added driver-model support and code cleanup. */ +#include #include #include #include diff --git a/drivers/i2c/i2c-microchip.c b/drivers/i2c/i2c-microchip.c index 788747879a2..d453e243d6f 100644 --- a/drivers/i2c/i2c-microchip.c +++ b/drivers/i2c/i2c-microchip.c @@ -6,6 +6,7 @@ * Padmarao Begari * Conor Dooley */ +#include #include #include #include diff --git a/drivers/i2c/i2c-uclass.c b/drivers/i2c/i2c-uclass.c index 380a9f8f3ad..98f95859f3b 100644 --- a/drivers/i2c/i2c-uclass.c +++ b/drivers/i2c/i2c-uclass.c @@ -5,6 +5,7 @@ #define LOG_CATEGORY UCLASS_I2C +#include #include #include #include diff --git a/drivers/i2c/i2c-versatile.c b/drivers/i2c/i2c-versatile.c index a8f0a170f79..0a1a85dfc28 100644 --- a/drivers/i2c/i2c-versatile.c +++ b/drivers/i2c/i2c-versatile.c @@ -5,6 +5,7 @@ * */ +#include #include #include #include diff --git a/drivers/i2c/i2c_core.c b/drivers/i2c/i2c_core.c index 7c43a5546d3..fe0cd75d94a 100644 --- a/drivers/i2c/i2c_core.c +++ b/drivers/i2c/i2c_core.c @@ -7,7 +7,7 @@ * * Multibus/multiadapter I2C core functions (wrappers) */ -#include +#include #include #include #include diff --git a/drivers/i2c/ihs_i2c.c b/drivers/i2c/ihs_i2c.c index dc88cd19167..d715714638f 100644 --- a/drivers/i2c/ihs_i2c.c +++ b/drivers/i2c/ihs_i2c.c @@ -4,6 +4,7 @@ * Dirk Eibach, Guntermann & Drunck GmbH, dirk.eibach@gdsys.cc */ +#include #include #include #include diff --git a/drivers/i2c/imx_lpi2c.c b/drivers/i2c/imx_lpi2c.c index 6c0d8eb5f4f..ad9293c92e1 100644 --- a/drivers/i2c/imx_lpi2c.c +++ b/drivers/i2c/imx_lpi2c.c @@ -3,6 +3,7 @@ * Copyright 2016 Freescale Semiconductors, Inc. */ +#include #include #include #include diff --git a/drivers/i2c/intel_i2c.c b/drivers/i2c/intel_i2c.c index d8ceea10cda..4fc6f1a11a7 100644 --- a/drivers/i2c/intel_i2c.c +++ b/drivers/i2c/intel_i2c.c @@ -7,11 +7,11 @@ * Copyright (C) 2016 Stefan Roese */ +#include #include #include #include #include -#include #include /* PCI Configuration Space (D31:F3): SMBus */ diff --git a/drivers/i2c/iproc_i2c.c b/drivers/i2c/iproc_i2c.c index 6570f64fe77..39af49c4ec5 100644 --- a/drivers/i2c/iproc_i2c.c +++ b/drivers/i2c/iproc_i2c.c @@ -6,6 +6,7 @@ #include #include +#include #include #include #include diff --git a/drivers/i2c/lpc32xx_i2c.c b/drivers/i2c/lpc32xx_i2c.c index a4e42e64a9b..496f4feec56 100644 --- a/drivers/i2c/lpc32xx_i2c.c +++ b/drivers/i2c/lpc32xx_i2c.c @@ -6,7 +6,7 @@ * Written-by: Albert ARIBAUD - 3ADEV */ -#include +#include #include #include #include diff --git a/drivers/i2c/meson_i2c.c b/drivers/i2c/meson_i2c.c index 19f1b6b0819..434e3461b1d 100644 --- a/drivers/i2c/meson_i2c.c +++ b/drivers/i2c/meson_i2c.c @@ -2,6 +2,7 @@ /* * (C) Copyright 2017 - Beniamino Galvani */ +#include #include #include #include diff --git a/drivers/i2c/muxes/i2c-arb-gpio-challenge.c b/drivers/i2c/muxes/i2c-arb-gpio-challenge.c index a83d7cb0829..ad730e0e79f 100644 --- a/drivers/i2c/muxes/i2c-arb-gpio-challenge.c +++ b/drivers/i2c/muxes/i2c-arb-gpio-challenge.c @@ -4,12 +4,12 @@ * Written by Simon Glass */ +#include #include #include #include #include #include -#include #include #include #include diff --git a/drivers/i2c/muxes/i2c-mux-gpio.c b/drivers/i2c/muxes/i2c-mux-gpio.c index f212bd1f983..4ca206115f8 100644 --- a/drivers/i2c/muxes/i2c-mux-gpio.c +++ b/drivers/i2c/muxes/i2c-mux-gpio.c @@ -10,6 +10,7 @@ #include #include #include +#include #include #include #include diff --git a/drivers/i2c/muxes/i2c-mux-uclass.c b/drivers/i2c/muxes/i2c-mux-uclass.c index d1999d21feb..a5d1bb0576d 100644 --- a/drivers/i2c/muxes/i2c-mux-uclass.c +++ b/drivers/i2c/muxes/i2c-mux-uclass.c @@ -6,6 +6,7 @@ #define LOG_CATEGORY UCLASS_I2C_MUX +#include #include #include #include diff --git a/drivers/i2c/muxes/pca954x.c b/drivers/i2c/muxes/pca954x.c index b4e3e16a976..0034dfbf6da 100644 --- a/drivers/i2c/muxes/pca954x.c +++ b/drivers/i2c/muxes/pca954x.c @@ -5,6 +5,7 @@ * Written by Michal Simek */ +#include #include #include #include diff --git a/drivers/i2c/mv_i2c.c b/drivers/i2c/mv_i2c.c index 949cc45d308..5bc9cd7b295 100644 --- a/drivers/i2c/mv_i2c.c +++ b/drivers/i2c/mv_i2c.c @@ -16,6 +16,7 @@ * Murray.Jensen@cmst.csiro.au, 27-Jan-01. */ +#include #include #include #include diff --git a/drivers/i2c/mvtwsi.c b/drivers/i2c/mvtwsi.c index 44e8e191b03..c38330f758a 100644 --- a/drivers/i2c/mvtwsi.c +++ b/drivers/i2c/mvtwsi.c @@ -7,7 +7,7 @@ * Copyright (c) 2010 Albert Aribaud. */ -#include +#include #include #include #include diff --git a/drivers/i2c/mxc_i2c.c b/drivers/i2c/mxc_i2c.c index 0acdaf7e743..d501133a0c8 100644 --- a/drivers/i2c/mxc_i2c.c +++ b/drivers/i2c/mxc_i2c.c @@ -14,7 +14,7 @@ * */ -#include +#include #include #include #include diff --git a/drivers/i2c/nx_i2c.c b/drivers/i2c/nx_i2c.c index 8562dd82bd6..07cda0fa679 100644 --- a/drivers/i2c/nx_i2c.c +++ b/drivers/i2c/nx_i2c.c @@ -1,8 +1,8 @@ +#include #include #include #include #include -#include #include #include #include diff --git a/drivers/i2c/ocores_i2c.c b/drivers/i2c/ocores_i2c.c index cf714d22ee4..fff85118d0d 100644 --- a/drivers/i2c/ocores_i2c.c +++ b/drivers/i2c/ocores_i2c.c @@ -12,6 +12,7 @@ * Andreas Larsson */ +#include #include #include #include diff --git a/drivers/i2c/omap24xx_i2c.c b/drivers/i2c/omap24xx_i2c.c index ebe472e20cd..6fc9d1eba9d 100644 --- a/drivers/i2c/omap24xx_i2c.c +++ b/drivers/i2c/omap24xx_i2c.c @@ -38,6 +38,7 @@ * */ +#include #include #include #include diff --git a/drivers/i2c/qup_i2c.c b/drivers/i2c/qup_i2c.c index 26707d63980..5ae3cccd4ac 100644 --- a/drivers/i2c/qup_i2c.c +++ b/drivers/i2c/qup_i2c.c @@ -9,6 +9,7 @@ #include #include +#include #include #include #include diff --git a/drivers/i2c/rcar_i2c.c b/drivers/i2c/rcar_i2c.c index f0f9b2afacf..ff9a2d80dda 100644 --- a/drivers/i2c/rcar_i2c.c +++ b/drivers/i2c/rcar_i2c.c @@ -11,6 +11,7 @@ * Kuninori Morimoto */ +#include #include #include #include diff --git a/drivers/i2c/rcar_iic.c b/drivers/i2c/rcar_iic.c index 2aa0f5fbfae..f0e50914c68 100644 --- a/drivers/i2c/rcar_iic.c +++ b/drivers/i2c/rcar_iic.c @@ -9,6 +9,7 @@ * Copyright (C) 2011, 2013 Nobuhiro Iwamatsu */ +#include #include #include #include diff --git a/drivers/i2c/rk_i2c.c b/drivers/i2c/rk_i2c.c index fa167268ae7..9927af94a80 100644 --- a/drivers/i2c/rk_i2c.c +++ b/drivers/i2c/rk_i2c.c @@ -6,6 +6,7 @@ * Peter, Software Engineering, . */ +#include #include #include #include diff --git a/drivers/i2c/s3c24x0_i2c.c b/drivers/i2c/s3c24x0_i2c.c index 72d2ab0f73d..505e20bc61c 100644 --- a/drivers/i2c/s3c24x0_i2c.c +++ b/drivers/i2c/s3c24x0_i2c.c @@ -4,10 +4,10 @@ * David Mueller, ELSOFT AG, d.mueller@elsoft.ch */ +#include #include #include #include -#include #if defined(CONFIG_ARCH_EXYNOS4) || defined(CONFIG_ARCH_EXYNOS5) #include #include diff --git a/drivers/i2c/sandbox_i2c.c b/drivers/i2c/sandbox_i2c.c index 74bb5e93397..c99e6de9332 100644 --- a/drivers/i2c/sandbox_i2c.c +++ b/drivers/i2c/sandbox_i2c.c @@ -5,6 +5,7 @@ * Copyright (c) 2014 Google, Inc */ +#include #include #include #include diff --git a/drivers/i2c/sh_i2c.c b/drivers/i2c/sh_i2c.c index ab816101dea..3335d9482a2 100644 --- a/drivers/i2c/sh_i2c.c +++ b/drivers/i2c/sh_i2c.c @@ -7,6 +7,7 @@ * Please see doc/driver-model/i2c-howto.rst for instructions. */ +#include #include #include #include diff --git a/drivers/i2c/soft_i2c.c b/drivers/i2c/soft_i2c.c index 1f2afc65e8b..ed8ba47de45 100644 --- a/drivers/i2c/soft_i2c.c +++ b/drivers/i2c/soft_i2c.c @@ -15,7 +15,7 @@ * Please see doc/driver-model/i2c-howto.rst for instructions. */ -#include +#include #if defined(CONFIG_AT91FAMILY) #include #include diff --git a/drivers/i2c/stm32f7_i2c.c b/drivers/i2c/stm32f7_i2c.c index 3f51b1dd1db..f42e08a6418 100644 --- a/drivers/i2c/stm32f7_i2c.c +++ b/drivers/i2c/stm32f7_i2c.c @@ -5,6 +5,7 @@ #define LOG_CATEGORY UCLASS_I2C +#include #include #include #include diff --git a/drivers/i2c/sun6i_p2wi.c b/drivers/i2c/sun6i_p2wi.c index c927c0edf25..b8e07a533ca 100644 --- a/drivers/i2c/sun6i_p2wi.c +++ b/drivers/i2c/sun6i_p2wi.c @@ -15,6 +15,7 @@ #include #include +#include #include #include #include diff --git a/drivers/i2c/sun8i_rsb.c b/drivers/i2c/sun8i_rsb.c index 2197f180566..f36f2c7afac 100644 --- a/drivers/i2c/sun8i_rsb.c +++ b/drivers/i2c/sun8i_rsb.c @@ -10,6 +10,7 @@ #include #include +#include #include #include #include diff --git a/drivers/i2c/tegra186_bpmp_i2c.c b/drivers/i2c/tegra186_bpmp_i2c.c index d30eb523122..588f6bdcc4b 100644 --- a/drivers/i2c/tegra186_bpmp_i2c.c +++ b/drivers/i2c/tegra186_bpmp_i2c.c @@ -3,6 +3,7 @@ * Copyright (c) 2016, NVIDIA CORPORATION. */ +#include #include #include #include diff --git a/drivers/i2c/tegra_i2c.c b/drivers/i2c/tegra_i2c.c index 3c324bd2663..57d77d56ea5 100644 --- a/drivers/i2c/tegra_i2c.c +++ b/drivers/i2c/tegra_i2c.c @@ -5,6 +5,7 @@ * NVIDIA Corporation */ +#include #include #include #include diff --git a/drivers/i2c/xilinx_xiic.c b/drivers/i2c/xilinx_xiic.c index 056024e350f..72199a62b2d 100644 --- a/drivers/i2c/xilinx_xiic.c +++ b/drivers/i2c/xilinx_xiic.c @@ -9,6 +9,7 @@ * Copyright (c) 2009-2010 Intel Corporation */ +#include #include #include #include diff --git a/drivers/input/apple_spi_kbd.c b/drivers/input/apple_spi_kbd.c index 5b30cec2dcb..7cf12f453a3 100644 --- a/drivers/input/apple_spi_kbd.c +++ b/drivers/input/apple_spi_kbd.c @@ -3,6 +3,7 @@ * Copyright (C) 2021 Mark Kettenis */ +#include #include #include #include diff --git a/drivers/input/button_kbd.c b/drivers/input/button_kbd.c index 0a917ac8b99..c73d3b18be9 100644 --- a/drivers/input/button_kbd.c +++ b/drivers/input/button_kbd.c @@ -4,6 +4,7 @@ */ #include +#include #include #include #include diff --git a/drivers/input/cros_ec_keyb.c b/drivers/input/cros_ec_keyb.c index 0917ee20fed..c4853463739 100644 --- a/drivers/input/cros_ec_keyb.c +++ b/drivers/input/cros_ec_keyb.c @@ -5,6 +5,7 @@ * Copyright (c) 2012 The Chromium OS Authors. */ +#include #include #include #include diff --git a/drivers/input/i8042.c b/drivers/input/i8042.c index 9bf21053cf0..e6070ca0152 100644 --- a/drivers/input/i8042.c +++ b/drivers/input/i8042.c @@ -8,6 +8,7 @@ #define LOG_CATEGORY UCLASS_KEYBOARD +#include #include #include #include diff --git a/drivers/input/input.c b/drivers/input/input.c index 3f146fb07e6..8a6506e7c6f 100644 --- a/drivers/input/input.c +++ b/drivers/input/input.c @@ -6,13 +6,13 @@ * (C) Copyright 2004 DENX Software Engineering, Wolfgang Denk, wd@denx.de */ +#include #include #include #include #include #include #include -#include #include #ifdef CONFIG_DM_KEYBOARD #include diff --git a/drivers/input/key_matrix.c b/drivers/input/key_matrix.c index 2e631660c88..e2fb2e17078 100644 --- a/drivers/input/key_matrix.c +++ b/drivers/input/key_matrix.c @@ -6,6 +6,7 @@ * (C) Copyright 2004 DENX Software Engineering, Wolfgang Denk, wd@denx.de */ +#include #include #include #include diff --git a/drivers/input/keyboard-uclass.c b/drivers/input/keyboard-uclass.c index df9ee8f7d65..aefc8e825e2 100644 --- a/drivers/input/keyboard-uclass.c +++ b/drivers/input/keyboard-uclass.c @@ -5,6 +5,7 @@ #define LOG_CATEGORY UCLASS_KEYBOARD +#include #include #include #include diff --git a/drivers/input/tegra-kbc.c b/drivers/input/tegra-kbc.c index fc13975d4f0..d4741a76663 100644 --- a/drivers/input/tegra-kbc.c +++ b/drivers/input/tegra-kbc.c @@ -4,6 +4,7 @@ * NVIDIA Corporation */ +#include #include #include #include @@ -12,7 +13,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/iommu/apple_dart.c b/drivers/iommu/apple_dart.c index 9327dea1e3b..6ecd84303bc 100644 --- a/drivers/iommu/apple_dart.c +++ b/drivers/iommu/apple_dart.c @@ -3,6 +3,7 @@ * Copyright (C) 2021 Mark Kettenis */ +#include #include #include #include diff --git a/drivers/iommu/iommu-uclass.c b/drivers/iommu/iommu-uclass.c index bb31cd519d2..dff3239cccb 100644 --- a/drivers/iommu/iommu-uclass.c +++ b/drivers/iommu/iommu-uclass.c @@ -5,6 +5,7 @@ #define LOG_CATEGORY UCLASS_IOMMU +#include #include #include #include diff --git a/drivers/iommu/sandbox_iommu.c b/drivers/iommu/sandbox_iommu.c index e37976f86f0..6ceb7fd5ec3 100644 --- a/drivers/iommu/sandbox_iommu.c +++ b/drivers/iommu/sandbox_iommu.c @@ -3,6 +3,7 @@ * Copyright (C) 2021 Mark Kettenis */ +#include #include #include #include diff --git a/drivers/led/led-uclass.c b/drivers/led/led-uclass.c index f37bf6a1550..a4be56fc258 100644 --- a/drivers/led/led-uclass.c +++ b/drivers/led/led-uclass.c @@ -6,6 +6,7 @@ #define LOG_CATEGORY UCLASS_LED +#include #include #include #include diff --git a/drivers/led/led_bcm6328.c b/drivers/led/led_bcm6328.c index dcc5741195c..f59a92fb1fd 100644 --- a/drivers/led/led_bcm6328.c +++ b/drivers/led/led_bcm6328.c @@ -3,6 +3,7 @@ * Copyright (C) 2017 Álvaro Fernández Rojas */ +#include #include #include #include diff --git a/drivers/led/led_bcm6358.c b/drivers/led/led_bcm6358.c index b1373ab7426..25aa3994d0e 100644 --- a/drivers/led/led_bcm6358.c +++ b/drivers/led/led_bcm6358.c @@ -3,6 +3,7 @@ * Copyright (C) 2017 Álvaro Fernández Rojas */ +#include #include #include #include diff --git a/drivers/led/led_bcm6753.c b/drivers/led/led_bcm6753.c index 170caf7bdca..2466d930116 100644 --- a/drivers/led/led_bcm6753.c +++ b/drivers/led/led_bcm6753.c @@ -6,6 +6,7 @@ * drivers/led/led_bcm6858.c */ +#include #include #include #include diff --git a/drivers/led/led_bcm6858.c b/drivers/led/led_bcm6858.c index a6efdcf6405..397dc0d8693 100644 --- a/drivers/led/led_bcm6858.c +++ b/drivers/led/led_bcm6858.c @@ -7,6 +7,7 @@ * drivers/led/led_bcm6358.c */ +#include #include #include #include diff --git a/drivers/led/led_cortina.c b/drivers/led/led_cortina.c index 2d3ad323d33..bcbe78d632a 100644 --- a/drivers/led/led_cortina.c +++ b/drivers/led/led_cortina.c @@ -6,6 +6,7 @@ * */ +#include #include #include #include diff --git a/drivers/led/led_gpio.c b/drivers/led/led_gpio.c index ce22fb49f2a..71421de628c 100644 --- a/drivers/led/led_gpio.c +++ b/drivers/led/led_gpio.c @@ -4,6 +4,7 @@ * Written by Simon Glass */ +#include #include #include #include diff --git a/drivers/led/led_pwm.c b/drivers/led/led_pwm.c index 15dd836509b..ae6de3087ab 100644 --- a/drivers/led/led_pwm.c +++ b/drivers/led/led_pwm.c @@ -4,6 +4,7 @@ * Author: Ivan Vozvakhov */ +#include #include #include #include diff --git a/drivers/mailbox/apple-mbox.c b/drivers/mailbox/apple-mbox.c index 2ee49734f40..30c8e2f03fa 100644 --- a/drivers/mailbox/apple-mbox.c +++ b/drivers/mailbox/apple-mbox.c @@ -3,6 +3,7 @@ * Copyright (C) 2021 Mark Kettenis */ +#include #include #include #include diff --git a/drivers/mailbox/k3-sec-proxy.c b/drivers/mailbox/k3-sec-proxy.c index 5eafe46fd4d..05f6b1795d6 100644 --- a/drivers/mailbox/k3-sec-proxy.c +++ b/drivers/mailbox/k3-sec-proxy.c @@ -6,6 +6,7 @@ * Lokesh Vutla */ +#include #include #include #include diff --git a/drivers/mailbox/mailbox-uclass.c b/drivers/mailbox/mailbox-uclass.c index 4bf4987ce0a..85ba8c5fd99 100644 --- a/drivers/mailbox/mailbox-uclass.c +++ b/drivers/mailbox/mailbox-uclass.c @@ -5,6 +5,7 @@ #define LOG_CATEGORY UCLASS_MAILBOX +#include #include #include #include diff --git a/drivers/mailbox/sandbox-mbox-test.c b/drivers/mailbox/sandbox-mbox-test.c index a2cfde2f62d..ffd4674d1ef 100644 --- a/drivers/mailbox/sandbox-mbox-test.c +++ b/drivers/mailbox/sandbox-mbox-test.c @@ -3,6 +3,7 @@ * Copyright (c) 2016, NVIDIA CORPORATION. */ +#include #include #include #include diff --git a/drivers/mailbox/sandbox-mbox.c b/drivers/mailbox/sandbox-mbox.c index 87e06e492fe..87d38de0cb6 100644 --- a/drivers/mailbox/sandbox-mbox.c +++ b/drivers/mailbox/sandbox-mbox.c @@ -3,6 +3,7 @@ * Copyright (c) 2016, NVIDIA CORPORATION. */ +#include #include #include #include diff --git a/drivers/mailbox/stm32-ipcc.c b/drivers/mailbox/stm32-ipcc.c index dda108735fc..046e1a8aca6 100644 --- a/drivers/mailbox/stm32-ipcc.c +++ b/drivers/mailbox/stm32-ipcc.c @@ -5,6 +5,7 @@ #define LOG_CATEGORY UCLASS_MAILBOX +#include #include #include #include diff --git a/drivers/mailbox/tegra-hsp.c b/drivers/mailbox/tegra-hsp.c index bfd4d7cdf2e..08c51c40f14 100644 --- a/drivers/mailbox/tegra-hsp.c +++ b/drivers/mailbox/tegra-hsp.c @@ -3,6 +3,7 @@ * Copyright (c) 2016, NVIDIA CORPORATION. */ +#include #include #include #include diff --git a/drivers/mailbox/zynqmp-ipi.c b/drivers/mailbox/zynqmp-ipi.c index 4df69734ed9..eb86847bbe2 100644 --- a/drivers/mailbox/zynqmp-ipi.c +++ b/drivers/mailbox/zynqmp-ipi.c @@ -5,6 +5,7 @@ * Copyright (C) 2018-2019 Xilinx, Inc. */ +#include #include #include #include diff --git a/drivers/memory/stm32-fmc2-ebi.c b/drivers/memory/stm32-fmc2-ebi.c index 713dead5c57..1ce96077858 100644 --- a/drivers/memory/stm32-fmc2-ebi.c +++ b/drivers/memory/stm32-fmc2-ebi.c @@ -5,6 +5,7 @@ #define LOG_CATEGORY UCLASS_NOP +#include #include #include #include diff --git a/drivers/memory/ti-aemif.c b/drivers/memory/ti-aemif.c index 29131f536a6..41325eb0f94 100644 --- a/drivers/memory/ti-aemif.c +++ b/drivers/memory/ti-aemif.c @@ -6,6 +6,7 @@ * Texas Instruments Incorporated, */ +#include #include #include diff --git a/drivers/memory/ti-gpmc.c b/drivers/memory/ti-gpmc.c index 8af48e199a7..8877b8f4385 100644 --- a/drivers/memory/ti-gpmc.c +++ b/drivers/memory/ti-gpmc.c @@ -7,6 +7,7 @@ #include #include +#include #include #include #include diff --git a/drivers/misc/altera_sysid.c b/drivers/misc/altera_sysid.c index 21e64fa3e6f..878df12771c 100644 --- a/drivers/misc/altera_sysid.c +++ b/drivers/misc/altera_sysid.c @@ -4,6 +4,7 @@ * Scott McNutt */ +#include #include #include #include diff --git a/drivers/misc/atsha204a-i2c.c b/drivers/misc/atsha204a-i2c.c index 3b9046da880..707daa90bdb 100644 --- a/drivers/misc/atsha204a-i2c.c +++ b/drivers/misc/atsha204a-i2c.c @@ -10,6 +10,7 @@ * published by the Free Software Foundation. */ +#include #include #include #include diff --git a/drivers/misc/cbmem_console.c b/drivers/misc/cbmem_console.c index 8220addd579..ba3a599c4a5 100644 --- a/drivers/misc/cbmem_console.c +++ b/drivers/misc/cbmem_console.c @@ -3,8 +3,8 @@ * Copyright (C) 2011 The ChromiumOS Authors. All rights reserved. */ +#include #include -#include #include void cbmemc_putc(struct stdio_dev *dev, char data) diff --git a/drivers/misc/cros_ec.c b/drivers/misc/cros_ec.c index fabe4964a33..9c1e6a5e3e7 100644 --- a/drivers/misc/cros_ec.c +++ b/drivers/misc/cros_ec.c @@ -15,6 +15,7 @@ #define LOG_CATEGORY UCLASS_CROS_EC +#include #include #include #include @@ -23,7 +24,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/misc/cros_ec_i2c.c b/drivers/misc/cros_ec_i2c.c index 5516aa8b3ff..a1b78a3045d 100644 --- a/drivers/misc/cros_ec_i2c.c +++ b/drivers/misc/cros_ec_i2c.c @@ -12,6 +12,7 @@ * KBC. */ +#include #include #include #include diff --git a/drivers/misc/cros_ec_lpc.c b/drivers/misc/cros_ec_lpc.c index e2a3226362a..1a8a81349c3 100644 --- a/drivers/misc/cros_ec_lpc.c +++ b/drivers/misc/cros_ec_lpc.c @@ -12,11 +12,11 @@ * KBC. */ +#include #include #include #include #include -#include #include #ifdef DEBUG_TRACE diff --git a/drivers/misc/cros_ec_sandbox.c b/drivers/misc/cros_ec_sandbox.c index 1cad51d474d..1201535f4af 100644 --- a/drivers/misc/cros_ec_sandbox.c +++ b/drivers/misc/cros_ec_sandbox.c @@ -7,6 +7,7 @@ #define LOG_CATEGORY UCLASS_CROS_EC +#include #include #include #include @@ -16,7 +17,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/misc/cros_ec_spi.c b/drivers/misc/cros_ec_spi.c index e86791c03a7..591ff30df89 100644 --- a/drivers/misc/cros_ec_spi.c +++ b/drivers/misc/cros_ec_spi.c @@ -12,12 +12,12 @@ * KBC. */ +#include #include #include #include #include #include -#include int cros_ec_spi_packet(struct udevice *udev, int out_bytes, int in_bytes) { diff --git a/drivers/misc/ds4510.c b/drivers/misc/ds4510.c index 302015e2793..9340596f2c6 100644 --- a/drivers/misc/ds4510.c +++ b/drivers/misc/ds4510.c @@ -8,6 +8,7 @@ * and 4 programmable non-volatile GPIO pins. */ +#include #include #include #include diff --git a/drivers/misc/esm_pmic.c b/drivers/misc/esm_pmic.c index 1963c8664a5..a518f750611 100644 --- a/drivers/misc/esm_pmic.c +++ b/drivers/misc/esm_pmic.c @@ -7,6 +7,7 @@ * */ +#include #include #include #include diff --git a/drivers/misc/fs_loader.c b/drivers/misc/fs_loader.c index 66803f4b997..1ffc199ba1e 100644 --- a/drivers/misc/fs_loader.c +++ b/drivers/misc/fs_loader.c @@ -6,6 +6,7 @@ #define LOG_CATEGORY UCLASS_FS_FIRMWARE_LOADER +#include #include #include #include diff --git a/drivers/misc/fsl_devdis.c b/drivers/misc/fsl_devdis.c index 2c3d2348076..179053a298a 100644 --- a/drivers/misc/fsl_devdis.c +++ b/drivers/misc/fsl_devdis.c @@ -3,7 +3,7 @@ * Copyright 2015 Freescale Semiconductor, Inc. * Author: Zhuoyu Zhang */ -#include +#include #include #include #include diff --git a/drivers/misc/fsl_ifc.c b/drivers/misc/fsl_ifc.c index 93f41da0f97..f165b8c36ba 100644 --- a/drivers/misc/fsl_ifc.c +++ b/drivers/misc/fsl_ifc.c @@ -4,7 +4,7 @@ * Author: Dipen Dudhat */ -#include +#include #include #include diff --git a/drivers/misc/fsl_iim.c b/drivers/misc/fsl_iim.c index 65468a68dbd..85cc3c26b2e 100644 --- a/drivers/misc/fsl_iim.c +++ b/drivers/misc/fsl_iim.c @@ -8,6 +8,7 @@ * Martha Marx */ +#include #include #include #include diff --git a/drivers/misc/fsl_portals.c b/drivers/misc/fsl_portals.c index e7c0df78b6b..6b831281e96 100644 --- a/drivers/misc/fsl_portals.c +++ b/drivers/misc/fsl_portals.c @@ -4,7 +4,7 @@ * Copyright 2017 NXP */ -#include +#include #include #include #include diff --git a/drivers/misc/fsl_sec_mon.c b/drivers/misc/fsl_sec_mon.c index 7518089e1e3..3597ee22242 100644 --- a/drivers/misc/fsl_sec_mon.c +++ b/drivers/misc/fsl_sec_mon.c @@ -3,7 +3,7 @@ * Copyright 2015 Freescale Semiconductor, Inc. */ -#include +#include #include #include diff --git a/drivers/misc/gdsys_ioep.c b/drivers/misc/gdsys_ioep.c index d4916a277b8..145cfa23c6c 100644 --- a/drivers/misc/gdsys_ioep.c +++ b/drivers/misc/gdsys_ioep.c @@ -11,6 +11,7 @@ * SPDX-License-Identifier: GPL-2.0+ */ +#include #include #include #include diff --git a/drivers/misc/gdsys_rxaui_ctrl.c b/drivers/misc/gdsys_rxaui_ctrl.c index d4cd63ca9f8..8f5cbe420f8 100644 --- a/drivers/misc/gdsys_rxaui_ctrl.c +++ b/drivers/misc/gdsys_rxaui_ctrl.c @@ -7,6 +7,7 @@ * Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc */ +#include #include #include #include diff --git a/drivers/misc/gdsys_soc.c b/drivers/misc/gdsys_soc.c index 0adbb8df3c2..27e7dc48327 100644 --- a/drivers/misc/gdsys_soc.c +++ b/drivers/misc/gdsys_soc.c @@ -4,6 +4,7 @@ * Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc */ +#include #include #include #include diff --git a/drivers/misc/gpio_led.c b/drivers/misc/gpio_led.c index e63689967a7..30679f80cf1 100644 --- a/drivers/misc/gpio_led.c +++ b/drivers/misc/gpio_led.c @@ -5,6 +5,7 @@ * Licensed under the GPL-2 or later. */ +#include #include #include diff --git a/drivers/misc/i2c_eeprom.c b/drivers/misc/i2c_eeprom.c index 10f0173d805..9111bd724cb 100644 --- a/drivers/misc/i2c_eeprom.c +++ b/drivers/misc/i2c_eeprom.c @@ -5,6 +5,8 @@ #define LOG_CATEGORY UCLASS_I2C_EEPROM +#include +#include #include #include #include diff --git a/drivers/misc/i2c_eeprom_emul.c b/drivers/misc/i2c_eeprom_emul.c index 3ad2e047ee3..6f32087ede5 100644 --- a/drivers/misc/i2c_eeprom_emul.c +++ b/drivers/misc/i2c_eeprom_emul.c @@ -5,6 +5,7 @@ * Copyright (c) 2014 Google, Inc */ +#include #include #include #include diff --git a/drivers/misc/ihs_fpga.c b/drivers/misc/ihs_fpga.c index fe196b60819..a0fece985d8 100644 --- a/drivers/misc/ihs_fpga.c +++ b/drivers/misc/ihs_fpga.c @@ -9,6 +9,7 @@ * Dirk Eibach, Guntermann & Drunck GmbH, eibach@gdsys.de */ +#include #include #include #include diff --git a/drivers/misc/imx8/fuse.c b/drivers/misc/imx8/fuse.c index 90d251a4405..b81f73f283f 100644 --- a/drivers/misc/imx8/fuse.c +++ b/drivers/misc/imx8/fuse.c @@ -3,6 +3,7 @@ * Copyright 2019 NXP */ +#include #include #include #include diff --git a/drivers/misc/imx8/scu.c b/drivers/misc/imx8/scu.c index bbd7e24200b..798800aa758 100644 --- a/drivers/misc/imx8/scu.c +++ b/drivers/misc/imx8/scu.c @@ -5,6 +5,7 @@ * Peng Fan */ +#include #include #include #include diff --git a/drivers/misc/imx8/scu_api.c b/drivers/misc/imx8/scu_api.c index 591d71b096a..6e2c678e614 100644 --- a/drivers/misc/imx8/scu_api.c +++ b/drivers/misc/imx8/scu_api.c @@ -5,6 +5,7 @@ * Peng Fan */ +#include #include #include #include diff --git a/drivers/misc/imx_ele/ele_api.c b/drivers/misc/imx_ele/ele_api.c index 3745504637b..e0ec22c7abf 100644 --- a/drivers/misc/imx_ele/ele_api.c +++ b/drivers/misc/imx_ele/ele_api.c @@ -4,6 +4,7 @@ * */ +#include #include #include #include diff --git a/drivers/misc/imx_ele/ele_mu.c b/drivers/misc/imx_ele/ele_mu.c index 0cf81f33ba5..053cdcf0fe0 100644 --- a/drivers/misc/imx_ele/ele_mu.c +++ b/drivers/misc/imx_ele/ele_mu.c @@ -3,6 +3,7 @@ * Copyright 2020-2022 NXP */ +#include #include #include #include diff --git a/drivers/misc/imx_ele/fuse.c b/drivers/misc/imx_ele/fuse.c index d12539c8aac..4e4dcb42cdd 100644 --- a/drivers/misc/imx_ele/fuse.c +++ b/drivers/misc/imx_ele/fuse.c @@ -3,6 +3,7 @@ * Copyright 2020 NXP */ +#include #include #include #include diff --git a/drivers/misc/irq-uclass.c b/drivers/misc/irq-uclass.c index 79eb7c200dc..7b79ed2df46 100644 --- a/drivers/misc/irq-uclass.c +++ b/drivers/misc/irq-uclass.c @@ -6,6 +6,7 @@ #define LOG_CATEGORY UCLASS_IRQ +#include #include #include #include diff --git a/drivers/misc/irq_sandbox.c b/drivers/misc/irq_sandbox.c index 5d176f63b5c..8b5573fcadd 100644 --- a/drivers/misc/irq_sandbox.c +++ b/drivers/misc/irq_sandbox.c @@ -5,6 +5,7 @@ * Copyright 2019 Google LLC */ +#include #include #include #include diff --git a/drivers/misc/irq_sandbox_test.c b/drivers/misc/irq_sandbox_test.c index 3669b863bec..95c45c24edb 100644 --- a/drivers/misc/irq_sandbox_test.c +++ b/drivers/misc/irq_sandbox_test.c @@ -5,6 +5,7 @@ * Copyright 2021 Google LLC */ +#include #include #include #include diff --git a/drivers/misc/jz4780_efuse.c b/drivers/misc/jz4780_efuse.c index 5c92de26ec5..1fba3271db6 100644 --- a/drivers/misc/jz4780_efuse.c +++ b/drivers/misc/jz4780_efuse.c @@ -6,6 +6,7 @@ * Author: Alex Smith */ +#include #include #include #include diff --git a/drivers/misc/k3_avs.c b/drivers/misc/k3_avs.c index 87471cc3b16..0d29eff1ac0 100644 --- a/drivers/misc/k3_avs.c +++ b/drivers/misc/k3_avs.c @@ -7,6 +7,7 @@ * */ +#include #include #include #include diff --git a/drivers/misc/k3_esm.c b/drivers/misc/k3_esm.c index fa3d6565622..f6ac18bdc75 100644 --- a/drivers/misc/k3_esm.c +++ b/drivers/misc/k3_esm.c @@ -7,6 +7,7 @@ * */ +#include #include #include #include diff --git a/drivers/misc/ls2_sfp.c b/drivers/misc/ls2_sfp.c index 8cb6e999bed..5351c7ed34f 100644 --- a/drivers/misc/ls2_sfp.c +++ b/drivers/misc/ls2_sfp.c @@ -12,6 +12,7 @@ */ #define LOG_CATEGORY UCLASS_MISC +#include #include #include #include diff --git a/drivers/misc/microchip_flexcom.c b/drivers/misc/microchip_flexcom.c index c5ddecac755..e0a6f2d3880 100644 --- a/drivers/misc/microchip_flexcom.c +++ b/drivers/misc/microchip_flexcom.c @@ -4,6 +4,7 @@ * Author: Eugen Hristev */ +#include #include #include #include diff --git a/drivers/misc/misc-uclass.c b/drivers/misc/misc-uclass.c index 1389e146b61..cfe9d562fa0 100644 --- a/drivers/misc/misc-uclass.c +++ b/drivers/misc/misc-uclass.c @@ -5,6 +5,7 @@ #define LOG_CATEGORY UCLASS_MISC +#include #include #include #include diff --git a/drivers/misc/misc_sandbox.c b/drivers/misc/misc_sandbox.c index 2473419df2a..31cde2dbac0 100644 --- a/drivers/misc/misc_sandbox.c +++ b/drivers/misc/misc_sandbox.c @@ -4,6 +4,7 @@ * Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc */ +#include #include #include diff --git a/drivers/misc/mpc83xx_serdes.c b/drivers/misc/mpc83xx_serdes.c index cf9aa9b35b3..93c87e998c4 100644 --- a/drivers/misc/mpc83xx_serdes.c +++ b/drivers/misc/mpc83xx_serdes.c @@ -9,6 +9,7 @@ * Copyright (C) 2008 MontaVista Software, Inc. */ +#include #include #include #include diff --git a/drivers/misc/mxc_ocotp.c b/drivers/misc/mxc_ocotp.c index d1674caa138..8ee18f29d9b 100644 --- a/drivers/misc/mxc_ocotp.c +++ b/drivers/misc/mxc_ocotp.c @@ -11,6 +11,7 @@ * Copyright (C) 2011 Freescale Semiconductor, Inc. */ +#include #include #include #include diff --git a/drivers/misc/mxs_ocotp.c b/drivers/misc/mxs_ocotp.c index 6432c62dac3..facc720c8ef 100644 --- a/drivers/misc/mxs_ocotp.c +++ b/drivers/misc/mxs_ocotp.c @@ -11,6 +11,7 @@ * etc.) which would make common driver an ifdef nightmare :-( */ +#include #include #include #include diff --git a/drivers/misc/npcm_host_intf.c b/drivers/misc/npcm_host_intf.c index 58bab888c3c..79f57f57d89 100644 --- a/drivers/misc/npcm_host_intf.c +++ b/drivers/misc/npcm_host_intf.c @@ -4,6 +4,7 @@ * Copyright (c) 2022 Nuvoton Technology Corp. */ +#include #include #include #include diff --git a/drivers/misc/npcm_otp.c b/drivers/misc/npcm_otp.c index adb6135291d..08029724c04 100644 --- a/drivers/misc/npcm_otp.c +++ b/drivers/misc/npcm_otp.c @@ -4,6 +4,7 @@ */ #include +#include #include #include #include diff --git a/drivers/misc/nuvoton_nct6102d.c b/drivers/misc/nuvoton_nct6102d.c index a3ca037d25f..daf5019d017 100644 --- a/drivers/misc/nuvoton_nct6102d.c +++ b/drivers/misc/nuvoton_nct6102d.c @@ -3,6 +3,7 @@ * Copyright (C) 2016 Stefan Roese */ +#include #include #include #include diff --git a/drivers/misc/nvmem.c b/drivers/misc/nvmem.c index d0cb0a35b81..5a2bd1f9f72 100644 --- a/drivers/misc/nvmem.c +++ b/drivers/misc/nvmem.c @@ -3,6 +3,7 @@ * Copyright (C) 2022 Sean Anderson */ +#include #include #include #include diff --git a/drivers/misc/p2sb-uclass.c b/drivers/misc/p2sb-uclass.c index 016c8073378..f24857a1515 100644 --- a/drivers/misc/p2sb-uclass.c +++ b/drivers/misc/p2sb-uclass.c @@ -8,6 +8,7 @@ #define LOG_CATEGORY UCLASS_P2SB +#include #include #include #include diff --git a/drivers/misc/p2sb_emul.c b/drivers/misc/p2sb_emul.c index 3dac6bd82e3..51f87161d5b 100644 --- a/drivers/misc/p2sb_emul.c +++ b/drivers/misc/p2sb_emul.c @@ -8,6 +8,7 @@ #define LOG_CATEGORY UCLASS_MISC +#include #include #include #include diff --git a/drivers/misc/p2sb_sandbox.c b/drivers/misc/p2sb_sandbox.c index 9f3cd14958b..d80bca22a6b 100644 --- a/drivers/misc/p2sb_sandbox.c +++ b/drivers/misc/p2sb_sandbox.c @@ -7,6 +7,7 @@ #define LOG_CATEGORY UCLASS_P2SB +#include #include #include #include diff --git a/drivers/misc/pca9551_led.c b/drivers/misc/pca9551_led.c index 040d0d5cf48..cdc4390f815 100644 --- a/drivers/misc/pca9551_led.c +++ b/drivers/misc/pca9551_led.c @@ -3,6 +3,7 @@ * Copyright (C) 2015 Stefan Roese */ +#include #include #include #include diff --git a/drivers/misc/pwrseq-uclass.c b/drivers/misc/pwrseq-uclass.c index bddc3c33685..a0f24e1bf3a 100644 --- a/drivers/misc/pwrseq-uclass.c +++ b/drivers/misc/pwrseq-uclass.c @@ -5,6 +5,7 @@ #define LOG_CATEGORY UCLASS_PWRSEQ +#include #include #include diff --git a/drivers/misc/qfw.c b/drivers/misc/qfw.c index 0e002ac25f4..db98619fdf5 100644 --- a/drivers/misc/qfw.c +++ b/drivers/misc/qfw.c @@ -6,6 +6,7 @@ #define LOG_CATEGORY UCLASS_QFW +#include #include #include #include diff --git a/drivers/misc/rockchip-efuse.c b/drivers/misc/rockchip-efuse.c index c7430147718..2f96b79ea40 100644 --- a/drivers/misc/rockchip-efuse.c +++ b/drivers/misc/rockchip-efuse.c @@ -6,6 +6,7 @@ * Written by Philipp Tomsich */ +#include #include #include #include diff --git a/drivers/misc/rockchip-otp.c b/drivers/misc/rockchip-otp.c index 2123c31038f..4f757083a1b 100644 --- a/drivers/misc/rockchip-otp.c +++ b/drivers/misc/rockchip-otp.c @@ -3,6 +3,7 @@ * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd */ +#include #include #include #include diff --git a/drivers/misc/sandbox_adder.c b/drivers/misc/sandbox_adder.c index de1c6357582..3ea33e46e9f 100644 --- a/drivers/misc/sandbox_adder.c +++ b/drivers/misc/sandbox_adder.c @@ -7,6 +7,7 @@ #define LOG_CATEGORY UCLASS_MISC +#include #include #include #include diff --git a/drivers/misc/sifive-otp.c b/drivers/misc/sifive-otp.c index 7fbcd3799e5..a624a358802 100644 --- a/drivers/misc/sifive-otp.c +++ b/drivers/misc/sifive-otp.c @@ -17,6 +17,7 @@ * Right now first 1KiB is used to store only serial number. */ +#include #include #include #include diff --git a/drivers/misc/sl28cpld.c b/drivers/misc/sl28cpld.c index 1c61b005af3..01ef1c6178f 100644 --- a/drivers/misc/sl28cpld.c +++ b/drivers/misc/sl28cpld.c @@ -3,6 +3,7 @@ * Copyright (c) 2021 Michael Walle */ +#include #include #include diff --git a/drivers/misc/smsc_lpc47m.c b/drivers/misc/smsc_lpc47m.c index 1b15907b093..bda064f1365 100644 --- a/drivers/misc/smsc_lpc47m.c +++ b/drivers/misc/smsc_lpc47m.c @@ -3,6 +3,7 @@ * Copyright (C) 2014, Bin Meng */ +#include #include #include diff --git a/drivers/misc/smsc_sio1007.c b/drivers/misc/smsc_sio1007.c index 6d99aa61d91..3b7b1c8bcf2 100644 --- a/drivers/misc/smsc_sio1007.c +++ b/drivers/misc/smsc_sio1007.c @@ -3,6 +3,7 @@ * Copyright (C) 2016, Bin Meng */ +#include #include #include #include diff --git a/drivers/misc/spltest_sandbox.c b/drivers/misc/spltest_sandbox.c index 3011a229271..6b9701a06ae 100644 --- a/drivers/misc/spltest_sandbox.c +++ b/drivers/misc/spltest_sandbox.c @@ -4,6 +4,7 @@ * Written by Simon Glass */ +#include #include #include diff --git a/drivers/misc/status_led.c b/drivers/misc/status_led.c index 3b1baa4f840..a6e9c03a02e 100644 --- a/drivers/misc/status_led.c +++ b/drivers/misc/status_led.c @@ -4,8 +4,8 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ +#include #include -#include /* * The purpose of this code is to signal the operational status of a diff --git a/drivers/misc/stm32_rcc.c b/drivers/misc/stm32_rcc.c index 0dd827e1dd0..c1e5428a6b8 100644 --- a/drivers/misc/stm32_rcc.c +++ b/drivers/misc/stm32_rcc.c @@ -6,6 +6,7 @@ #define LOG_CATEGORY UCLASS_NOP +#include #include #include #include diff --git a/drivers/misc/stm32mp_fuse.c b/drivers/misc/stm32mp_fuse.c index 34be6c28c19..9fd6c367dc6 100644 --- a/drivers/misc/stm32mp_fuse.c +++ b/drivers/misc/stm32mp_fuse.c @@ -3,6 +3,7 @@ * Copyright (C) 2018, STMicroelectronics - All Rights Reserved */ +#include #include #include #include diff --git a/drivers/misc/swap_case.c b/drivers/misc/swap_case.c index d4a5620c62c..ee5c12bd0a4 100644 --- a/drivers/misc/swap_case.c +++ b/drivers/misc/swap_case.c @@ -6,6 +6,7 @@ * Written by Simon Glass */ +#include #include #include #include diff --git a/drivers/misc/syscon_sandbox.c b/drivers/misc/syscon_sandbox.c index 6adb4154c25..d5cef188d74 100644 --- a/drivers/misc/syscon_sandbox.c +++ b/drivers/misc/syscon_sandbox.c @@ -4,6 +4,7 @@ * Written by Simon Glass */ +#include #include #include #include diff --git a/drivers/misc/tegra186_bpmp.c b/drivers/misc/tegra186_bpmp.c index a1585b81867..fecac9c4d90 100644 --- a/drivers/misc/tegra186_bpmp.c +++ b/drivers/misc/tegra186_bpmp.c @@ -3,6 +3,7 @@ * Copyright (c) 2016, NVIDIA CORPORATION. */ +#include #include #include #include diff --git a/drivers/misc/tegra_car.c b/drivers/misc/tegra_car.c index 497ec18564c..0ddbb3c619b 100644 --- a/drivers/misc/tegra_car.c +++ b/drivers/misc/tegra_car.c @@ -3,6 +3,7 @@ * Copyright (c) 2016, NVIDIA CORPORATION. */ +#include #include #include #include diff --git a/drivers/misc/test_drv.c b/drivers/misc/test_drv.c index 9b1e357a139..927618256f0 100644 --- a/drivers/misc/test_drv.c +++ b/drivers/misc/test_drv.c @@ -3,6 +3,7 @@ * Copyright (c) 2014 Google, Inc */ +#include #include #include #include diff --git a/drivers/misc/turris_omnia_mcu.c b/drivers/misc/turris_omnia_mcu.c index be77acbd165..6b2f17c0002 100644 --- a/drivers/misc/turris_omnia_mcu.c +++ b/drivers/misc/turris_omnia_mcu.c @@ -4,6 +4,7 @@ * Copyright (C) 2024 Marek Behún */ +#include #include #include #include diff --git a/drivers/misc/usb251xb.c b/drivers/misc/usb251xb.c index daba2c2d683..92e92ba5e62 100644 --- a/drivers/misc/usb251xb.c +++ b/drivers/misc/usb251xb.c @@ -10,6 +10,7 @@ * https://patchwork.kernel.org/patch/9257715/ */ +#include #include #include #include diff --git a/drivers/misc/vexpress_config.c b/drivers/misc/vexpress_config.c index e7655ceff74..99aad1412ae 100644 --- a/drivers/misc/vexpress_config.c +++ b/drivers/misc/vexpress_config.c @@ -4,6 +4,7 @@ * Author: Liviu Dudau * */ +#include #include #include #include diff --git a/drivers/misc/winbond_w83627.c b/drivers/misc/winbond_w83627.c index 87b9043e65c..3838b3f74f4 100644 --- a/drivers/misc/winbond_w83627.c +++ b/drivers/misc/winbond_w83627.c @@ -3,6 +3,7 @@ * Copyright (C) 2016 Stefan Roese */ +#include #include #include diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig index d0944793c92..549634891a3 100644 --- a/drivers/mmc/Kconfig +++ b/drivers/mmc/Kconfig @@ -147,16 +147,9 @@ config SPL_MMC_IO_VOLTAGE support. For eMMC this not mandatory, but not enabling this option may prevent the driver of using the faster modes. -config MMC_SUPPORTS_TUNING - bool - -config SPL_MMC_SUPPORTS_TUNING - bool - config MMC_UHS_SUPPORT bool "enable UHS support" depends on MMC_IO_VOLTAGE - select MMC_SUPPORTS_TUNING help The Ultra High Speed (UHS) bus is available on some SDHC and SDXC cards. The IO voltage must be switchable from 3.3v to 1.8v. The bus @@ -165,7 +158,6 @@ config MMC_UHS_SUPPORT config SPL_MMC_UHS_SUPPORT bool "enable UHS support in SPL" depends on SPL_MMC_IO_VOLTAGE - select SPL_MMC_SUPPORTS_TUNING help The Ultra High Speed (UHS) bus is available on some SDHC and SDXC cards. The IO voltage must be switchable from 3.3v to 1.8v. The bus @@ -201,7 +193,6 @@ config SPL_MMC_HS400_SUPPORT config MMC_HS200_SUPPORT bool "enable HS200 support" - select MMC_SUPPORTS_TUNING help The HS200 mode is support by some eMMC. The bus frequency is up to 200MHz. This mode requires tuning the IO. @@ -209,7 +200,6 @@ config MMC_HS200_SUPPORT config SPL_MMC_HS200_SUPPORT bool "enable HS200 support in SPL" depends on SPL_MMC - select SPL_MMC_SUPPORTS_TUNING help The HS200 mode is support by some eMMC. The bus frequency is up to 200MHz. This mode requires tuning the IO. @@ -357,7 +347,6 @@ config MMC_OCTEONTX bool "Marvell Octeon Multimedia Card Interface support" depends on (ARCH_OCTEON || ARCH_OCTEONTX || ARCH_OCTEONTX2) depends on DM_MMC - select MMC_SUPPORTS_TUNING if ARCH_OCTEONTX2 help This selects the Octeon Multimedia card Interface. If you have an OcteonTX/TX2 or MIPS Octeon board with a diff --git a/drivers/mmc/am654_sdhci.c b/drivers/mmc/am654_sdhci.c index 48fac7a11b4..fadab7d40bb 100644 --- a/drivers/mmc/am654_sdhci.c +++ b/drivers/mmc/am654_sdhci.c @@ -6,6 +6,7 @@ */ #include +#include #include #include #include @@ -396,7 +397,7 @@ static void am654_sdhci_write_b(struct sdhci_host *host, u8 val, int reg) writeb(val, host->ioaddr + reg); } -#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING) +#ifdef MMC_SUPPORTS_TUNING #define ITAPDLY_LENGTH 32 #define ITAPDLY_LAST_INDEX (ITAPDLY_LENGTH - 1) @@ -499,7 +500,7 @@ static int am654_sdhci_execute_tuning(struct mmc *mmc, u8 opcode) } #endif const struct sdhci_ops am654_sdhci_ops = { -#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING) +#ifdef MMC_SUPPORTS_TUNING .platform_execute_tuning = am654_sdhci_execute_tuning, #endif .deferred_probe = am654_sdhci_deferred_probe, @@ -559,7 +560,7 @@ static int j721e_4bit_sdhci_set_ios_post(struct sdhci_host *host) } const struct sdhci_ops j721e_4bit_sdhci_ops = { -#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING) +#ifdef MMC_SUPPORTS_TUNING .platform_execute_tuning = am654_sdhci_execute_tuning, #endif .deferred_probe = am654_sdhci_deferred_probe, diff --git a/drivers/mmc/arm_pl180_mmci.c b/drivers/mmc/arm_pl180_mmci.c index f00b0ff0dc9..cecc7ad783d 100644 --- a/drivers/mmc/arm_pl180_mmci.c +++ b/drivers/mmc/arm_pl180_mmci.c @@ -11,6 +11,7 @@ /* #define DEBUG */ +#include "common.h" #include #include #include diff --git a/drivers/mmc/aspeed_sdhci.c b/drivers/mmc/aspeed_sdhci.c index 87a6f66ebb3..c9626c6beb8 100644 --- a/drivers/mmc/aspeed_sdhci.c +++ b/drivers/mmc/aspeed_sdhci.c @@ -4,6 +4,7 @@ * Eddie James */ +#include #include #include #include diff --git a/drivers/mmc/atmel_sdhci.c b/drivers/mmc/atmel_sdhci.c index 0b265196f02..d92bad97b71 100644 --- a/drivers/mmc/atmel_sdhci.c +++ b/drivers/mmc/atmel_sdhci.c @@ -4,6 +4,7 @@ * Wenyou.Yang */ +#include #include #include #include diff --git a/drivers/mmc/bcm2835_sdhci.c b/drivers/mmc/bcm2835_sdhci.c index 598a51d914a..5e48394fd0f 100644 --- a/drivers/mmc/bcm2835_sdhci.c +++ b/drivers/mmc/bcm2835_sdhci.c @@ -36,6 +36,7 @@ * Inspired by sdhci-pci.c, by Pierre Ossman */ +#include #include #include #include diff --git a/drivers/mmc/bcm2835_sdhost.c b/drivers/mmc/bcm2835_sdhost.c index 720127468d3..5c23c03d10d 100644 --- a/drivers/mmc/bcm2835_sdhost.c +++ b/drivers/mmc/bcm2835_sdhost.c @@ -30,6 +30,7 @@ * sdhci.c and sdhci-pci.c by Pierre Ossman */ #include +#include #include #include #include diff --git a/drivers/mmc/bcmstb_sdhci.c b/drivers/mmc/bcmstb_sdhci.c index 7bddbebb162..49846adcf54 100644 --- a/drivers/mmc/bcmstb_sdhci.c +++ b/drivers/mmc/bcmstb_sdhci.c @@ -6,6 +6,7 @@ * Author: Thomas Fitzsimmons */ +#include #include #include #include diff --git a/drivers/mmc/ca_dw_mmc.c b/drivers/mmc/ca_dw_mmc.c index 54a2ba4795e..a17ed8c11cb 100644 --- a/drivers/mmc/ca_dw_mmc.c +++ b/drivers/mmc/ca_dw_mmc.c @@ -4,6 +4,7 @@ * Arthur Li */ +#include #include #include #include diff --git a/drivers/mmc/davinci_mmc.c b/drivers/mmc/davinci_mmc.c index 5107fcd8362..3a3d23aec00 100644 --- a/drivers/mmc/davinci_mmc.c +++ b/drivers/mmc/davinci_mmc.c @@ -6,6 +6,7 @@ */ #include +#include #include #include #include diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c index e6107c770fe..e1036641452 100644 --- a/drivers/mmc/dw_mmc.c +++ b/drivers/mmc/dw_mmc.c @@ -6,6 +6,7 @@ */ #include +#include #include #include #include diff --git a/drivers/mmc/exynos_dw_mmc.c b/drivers/mmc/exynos_dw_mmc.c index a51f762988d..2f849c43b12 100644 --- a/drivers/mmc/exynos_dw_mmc.c +++ b/drivers/mmc/exynos_dw_mmc.c @@ -4,6 +4,7 @@ * Jaehoon Chung */ +#include #include #include #include diff --git a/drivers/mmc/f_sdh30.c b/drivers/mmc/f_sdh30.c index f47cf848521..3d587a464d5 100644 --- a/drivers/mmc/f_sdh30.c +++ b/drivers/mmc/f_sdh30.c @@ -5,6 +5,7 @@ * Copyright 2021 Socionext, Inc. */ +#include #include #include #include diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c index 0c66980b621..595d88bd562 100644 --- a/drivers/mmc/fsl_esdhc.c +++ b/drivers/mmc/fsl_esdhc.c @@ -10,6 +10,7 @@ */ #include +#include #include #include #include @@ -1101,7 +1102,7 @@ static int fsl_esdhc_reinit(struct udevice *dev) return esdhc_init_common(priv, &plat->mmc); } -#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING) +#ifdef MMC_SUPPORTS_TUNING static int fsl_esdhc_execute_tuning(struct udevice *dev, uint32_t opcode) { struct fsl_esdhc_plat *plat = dev_get_plat(dev); @@ -1174,7 +1175,7 @@ static const struct dm_mmc_ops fsl_esdhc_ops = { .get_cd = fsl_esdhc_get_cd, .send_cmd = fsl_esdhc_send_cmd, .set_ios = fsl_esdhc_set_ios, -#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING) +#ifdef MMC_SUPPORTS_TUNING .execute_tuning = fsl_esdhc_execute_tuning, #endif .reinit = fsl_esdhc_reinit, diff --git a/drivers/mmc/fsl_esdhc_imx.c b/drivers/mmc/fsl_esdhc_imx.c index a9b8d7dd67f..b74c0140020 100644 --- a/drivers/mmc/fsl_esdhc_imx.c +++ b/drivers/mmc/fsl_esdhc_imx.c @@ -11,6 +11,7 @@ */ #include +#include #include #include #include @@ -634,7 +635,7 @@ static void set_sysctl(struct fsl_esdhc_priv *priv, struct mmc *mmc, uint clock) priv->clock = clock; } -#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING) +#ifdef MMC_SUPPORTS_TUNING static int esdhc_change_pinstate(struct udevice *dev) { struct fsl_esdhc_priv *priv = dev_get_priv(dev); @@ -912,7 +913,7 @@ static int esdhc_set_ios_common(struct fsl_esdhc_priv *priv, struct mmc *mmc) int ret __maybe_unused; u32 clock; -#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING) +#ifdef MMC_SUPPORTS_TUNING /* * call esdhc_set_timing() before update the clock rate, * This is because current we support DDR and SDR mode, @@ -950,7 +951,7 @@ static int esdhc_set_ios_common(struct fsl_esdhc_priv *priv, struct mmc *mmc) esdhc_setbits32(®s->sysctl, SYSCTL_PEREN | SYSCTL_CKEN); } -#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING) +#ifdef MMC_SUPPORTS_TUNING /* * For HS400/HS400ES mode, make sure set the strobe dll in the * target clock rate. So call esdhc_set_strobe_dll() after the @@ -1617,7 +1618,7 @@ static const struct dm_mmc_ops fsl_esdhc_ops = { .get_cd = fsl_esdhc_get_cd, .send_cmd = fsl_esdhc_send_cmd, .set_ios = fsl_esdhc_set_ios, -#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING) +#ifdef MMC_SUPPORTS_TUNING .execute_tuning = fsl_esdhc_execute_tuning, #endif #if CONFIG_IS_ENABLED(MMC_HS400_ES_SUPPORT) diff --git a/drivers/mmc/fsl_esdhc_spl.c b/drivers/mmc/fsl_esdhc_spl.c index 1a11258be4d..6d7c0cff22a 100644 --- a/drivers/mmc/fsl_esdhc_spl.c +++ b/drivers/mmc/fsl_esdhc_spl.c @@ -3,7 +3,7 @@ * Copyright 2013 Freescale Semiconductor, Inc. */ -#include +#include #include #include #include diff --git a/drivers/mmc/ftsdc010_mci.c b/drivers/mmc/ftsdc010_mci.c index 11e44264e47..cabb747fbbd 100644 --- a/drivers/mmc/ftsdc010_mci.c +++ b/drivers/mmc/ftsdc010_mci.c @@ -9,6 +9,7 @@ * Author: Rick Chen (rick@andestech.com) */ +#include #include #include #include diff --git a/drivers/mmc/gen_atmel_mci.c b/drivers/mmc/gen_atmel_mci.c index 6a531fa0961..3ee99558f6f 100644 --- a/drivers/mmc/gen_atmel_mci.c +++ b/drivers/mmc/gen_atmel_mci.c @@ -8,7 +8,7 @@ * Copyright (C) 2004-2006 Atmel Corporation */ -#include +#include #include #include #include diff --git a/drivers/mmc/hi6220_dw_mmc.c b/drivers/mmc/hi6220_dw_mmc.c index c68a9157bfc..dc0210402bd 100644 --- a/drivers/mmc/hi6220_dw_mmc.c +++ b/drivers/mmc/hi6220_dw_mmc.c @@ -4,6 +4,7 @@ * peter.griffin */ +#include #include #include #include diff --git a/drivers/mmc/iproc_sdhci.c b/drivers/mmc/iproc_sdhci.c index 7ab74ff117a..11d86ad658f 100644 --- a/drivers/mmc/iproc_sdhci.c +++ b/drivers/mmc/iproc_sdhci.c @@ -4,6 +4,7 @@ * */ +#include #include #include #include diff --git a/drivers/mmc/jz_mmc.c b/drivers/mmc/jz_mmc.c index fc10bb256a4..61e48ee0f62 100644 --- a/drivers/mmc/jz_mmc.c +++ b/drivers/mmc/jz_mmc.c @@ -6,6 +6,7 @@ * Author: Paul Burton */ +#include #include #include #include diff --git a/drivers/mmc/kona_sdhci.c b/drivers/mmc/kona_sdhci.c index 83f14122632..2bbe673b912 100644 --- a/drivers/mmc/kona_sdhci.c +++ b/drivers/mmc/kona_sdhci.c @@ -3,6 +3,7 @@ * Copyright 2013 Broadcom Corporation. */ +#include #include #include #include diff --git a/drivers/mmc/meson_gx_mmc.c b/drivers/mmc/meson_gx_mmc.c index 5852b24c6d2..0825c0a2a83 100644 --- a/drivers/mmc/meson_gx_mmc.c +++ b/drivers/mmc/meson_gx_mmc.c @@ -3,6 +3,7 @@ * (C) Copyright 2016 Carlo Caione */ +#include #include #include #include diff --git a/drivers/mmc/mmc-pwrseq.c b/drivers/mmc/mmc-pwrseq.c index a1c9624a222..2539f61323d 100644 --- a/drivers/mmc/mmc-pwrseq.c +++ b/drivers/mmc/mmc-pwrseq.c @@ -4,6 +4,7 @@ * Jaehoon Chung */ +#include #include #include #include diff --git a/drivers/mmc/mmc-uclass.c b/drivers/mmc/mmc-uclass.c index da6a39b7d99..24170c59ecc 100644 --- a/drivers/mmc/mmc-uclass.c +++ b/drivers/mmc/mmc-uclass.c @@ -7,6 +7,7 @@ #define LOG_CATEGORY UCLASS_MMC +#include #include #include #include @@ -111,7 +112,7 @@ int mmc_getcd(struct mmc *mmc) return dm_mmc_get_cd(mmc->dev); } -#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING) +#ifdef MMC_SUPPORTS_TUNING static int dm_mmc_execute_tuning(struct udevice *dev, uint opcode) { struct dm_mmc_ops *ops = mmc_get_ops(dev); diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c index b18dc331f78..7b068c71ff3 100644 --- a/drivers/mmc/mmc.c +++ b/drivers/mmc/mmc.c @@ -8,6 +8,7 @@ */ #include +#include #include #include #include @@ -16,7 +17,6 @@ #include #include #include -#include #include #include #include @@ -24,7 +24,6 @@ #include #include #include -#include #include #include "mmc_private.h" @@ -330,7 +329,7 @@ int mmc_set_blocklen(struct mmc *mmc, int len) MMC_QUIRK_RETRY_SET_BLOCKLEN, 4); } -#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING) +#ifdef MMC_SUPPORTS_TUNING static const u8 tuning_blk_pattern_4bit[] = { 0xff, 0x0f, 0xff, 0x00, 0xff, 0xcc, 0xc3, 0xcc, 0xc3, 0x3c, 0xcc, 0xff, 0xfe, 0xff, 0xfe, 0xef, @@ -1622,7 +1621,7 @@ static inline int bus_width(uint cap) } #if !CONFIG_IS_ENABLED(DM_MMC) -#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING) +#ifdef MMC_SUPPORTS_TUNING static int mmc_execute_tuning(struct mmc *mmc, uint opcode) { return -ENOTSUPP; @@ -1703,7 +1702,7 @@ void mmc_dump_capabilities(const char *text, uint caps) struct mode_width_tuning { enum bus_mode mode; uint widths; -#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING) +#ifdef MMC_SUPPORTS_TUNING uint tuning; #endif }; @@ -1744,7 +1743,7 @@ static inline int mmc_set_signal_voltage(struct mmc *mmc, uint signal_voltage) #if !CONFIG_IS_ENABLED(MMC_TINY) static const struct mode_width_tuning sd_modes_by_pref[] = { #if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT) -#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING) +#ifdef MMC_SUPPORTS_TUNING { .mode = UHS_SDR104, .widths = MMC_MODE_4BIT | MMC_MODE_1BIT, @@ -1847,7 +1846,7 @@ static int sd_select_mode_and_width(struct mmc *mmc, uint card_caps) mmc_set_clock(mmc, mmc->tran_speed, MMC_CLK_ENABLE); -#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING) +#ifdef MMC_SUPPORTS_TUNING /* execute tuning if needed */ if (mwt->tuning && !mmc_host_is_spi(mmc)) { err = mmc_execute_tuning(mmc, @@ -2225,7 +2224,7 @@ static int mmc_select_mode_and_width(struct mmc *mmc, uint card_caps) mmc_select_mode(mmc, mwt->mode); mmc_set_clock(mmc, mmc->tran_speed, MMC_CLK_ENABLE); -#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING) +#ifdef MMC_SUPPORTS_TUNING /* execute tuning if needed */ if (mwt->tuning) { diff --git a/drivers/mmc/mmc_boot.c b/drivers/mmc/mmc_boot.c index 367c957b518..0a74b1fb776 100644 --- a/drivers/mmc/mmc_boot.c +++ b/drivers/mmc/mmc_boot.c @@ -4,6 +4,7 @@ * Written by Amar */ +#include #include #include #include "mmc_private.h" diff --git a/drivers/mmc/mmc_bootdev.c b/drivers/mmc/mmc_bootdev.c index 5a1688b75d0..55ecead2ddf 100644 --- a/drivers/mmc/mmc_bootdev.c +++ b/drivers/mmc/mmc_bootdev.c @@ -6,6 +6,7 @@ * Written by Simon Glass */ +#include #include #include #include diff --git a/drivers/mmc/mmc_legacy.c b/drivers/mmc/mmc_legacy.c index a87d2276c1b..a101ee43fde 100644 --- a/drivers/mmc/mmc_legacy.c +++ b/drivers/mmc/mmc_legacy.c @@ -5,6 +5,7 @@ * Written by Simon Glass */ +#include #include #include #include diff --git a/drivers/mmc/mmc_spi.c b/drivers/mmc/mmc_spi.c index 675e642efd0..bcea800e5f6 100644 --- a/drivers/mmc/mmc_spi.c +++ b/drivers/mmc/mmc_spi.c @@ -6,6 +6,7 @@ * * Licensed under the GPL-2 or later. */ +#include #include #include #include diff --git a/drivers/mmc/mmc_write.c b/drivers/mmc/mmc_write.c index c023d15e52a..a6f93380dd0 100644 --- a/drivers/mmc/mmc_write.c +++ b/drivers/mmc/mmc_write.c @@ -7,6 +7,7 @@ */ #include +#include #include #include #include diff --git a/drivers/mmc/msm_sdhci.c b/drivers/mmc/msm_sdhci.c index 4ce0de6c47d..5e9d66526a8 100644 --- a/drivers/mmc/msm_sdhci.c +++ b/drivers/mmc/msm_sdhci.c @@ -7,6 +7,7 @@ * Based on Linux driver */ +#include #include #include #include diff --git a/drivers/mmc/mtk-sd.c b/drivers/mmc/mtk-sd.c index 3a9258255a7..296aaee7331 100644 --- a/drivers/mmc/mtk-sd.c +++ b/drivers/mmc/mtk-sd.c @@ -7,6 +7,7 @@ */ #include +#include #include #include #include @@ -1010,7 +1011,7 @@ static int msdc_ops_get_wp(struct udevice *dev) #endif } -#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING) +#ifdef MMC_SUPPORTS_TUNING static u32 test_delay_bit(u32 delay, u32 bit) { bit %= PAD_DELAY_MAX; @@ -1759,7 +1760,7 @@ static const struct dm_mmc_ops msdc_ops = { .set_ios = msdc_ops_set_ios, .get_cd = msdc_ops_get_cd, .get_wp = msdc_ops_get_wp, -#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING) +#ifdef MMC_SUPPORTS_TUNING .execute_tuning = msdc_execute_tuning, #endif .wait_dat0 = msdc_ops_wait_dat0, diff --git a/drivers/mmc/mv_sdhci.c b/drivers/mmc/mv_sdhci.c index 2da5334c21f..dbdd671c88b 100644 --- a/drivers/mmc/mv_sdhci.c +++ b/drivers/mmc/mv_sdhci.c @@ -3,6 +3,7 @@ * Marvell SD Host Controller Interface */ +#include #include #include #include diff --git a/drivers/mmc/mvebu_mmc.c b/drivers/mmc/mvebu_mmc.c index 5af1953cd14..fea55c61ed7 100644 --- a/drivers/mmc/mvebu_mmc.c +++ b/drivers/mmc/mvebu_mmc.c @@ -7,6 +7,7 @@ * Written-by: Maen Suleiman, Gerald Kerma */ +#include #include #include #include diff --git a/drivers/mmc/mxcmmc.c b/drivers/mmc/mxcmmc.c index 1acea6f820b..0057273a2a7 100644 --- a/drivers/mmc/mxcmmc.c +++ b/drivers/mmc/mxcmmc.c @@ -17,6 +17,7 @@ */ #include +#include #include #include #include diff --git a/drivers/mmc/mxsmmc.c b/drivers/mmc/mxsmmc.c index 95390a5be7e..35a8e21058e 100644 --- a/drivers/mmc/mxsmmc.c +++ b/drivers/mmc/mxsmmc.c @@ -20,6 +20,7 @@ * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net */ +#include #include #include #include diff --git a/drivers/mmc/nexell_dw_mmc.c b/drivers/mmc/nexell_dw_mmc.c index 2e1ce54c7d5..2723e4887cf 100644 --- a/drivers/mmc/nexell_dw_mmc.c +++ b/drivers/mmc/nexell_dw_mmc.c @@ -6,6 +6,7 @@ * (C) Copyright 2019 Stefan Bosch */ +#include #include #include #include diff --git a/drivers/mmc/npcm_sdhci.c b/drivers/mmc/npcm_sdhci.c index dff4732ea06..d63521d6855 100644 --- a/drivers/mmc/npcm_sdhci.c +++ b/drivers/mmc/npcm_sdhci.c @@ -3,6 +3,7 @@ * Copyright (c) 2022 Nuvoton Technology Corp. */ +#include #include #include #include diff --git a/drivers/mmc/octeontx_hsmmc.c b/drivers/mmc/octeontx_hsmmc.c index 3b5e1221732..7f9c4f4d36d 100644 --- a/drivers/mmc/octeontx_hsmmc.c +++ b/drivers/mmc/octeontx_hsmmc.c @@ -794,7 +794,7 @@ octeontx_mmc_get_cr_mods(struct mmc *mmc, const struct mmc_cmd *cmd, u8 desired_ctype = 0; if (IS_MMC(mmc)) { -#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING) +#ifdef MMC_SUPPORTS_TUNING if (cmd->cmdidx == MMC_CMD_SEND_TUNING_BLOCK_HS200) { if (cmd->resp_type == MMC_RSP_R1) cr.rtype_xor = 1; @@ -1631,7 +1631,7 @@ static int octeontx_mmc_dev_send_cmd(struct udevice *dev, struct mmc_cmd *cmd, return octeontx_mmc_send_cmd(dev_to_mmc(dev), cmd, data); } -#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING) +#ifdef MMC_SUPPORTS_TUNING static int octeontx_mmc_test_cmd(struct mmc *mmc, u32 opcode, int *statp) { struct mmc_cmd cmd; @@ -2421,12 +2421,12 @@ static int octeontx_mmc_execute_tuning(struct udevice *dev, u32 opcode) return 0; } -#else /* CONFIG_MMC_SUPPORTS_TUNING */ +#else /* MMC_SUPPORTS_TUNING */ static void octeontx_mmc_set_emm_timing(struct mmc *mmc, union mio_emm_timing emm_timing) { } -#endif /* CONFIG_MMC_SUPPORTS_TUNING */ +#endif /* MMC_SUPPORTS_TUNING */ /** * Calculate the clock period with rounding up @@ -2573,7 +2573,7 @@ static int octeontx_mmc_set_ios(struct udevice *dev) err = octeontx_mmc_configure_delay(mmc); -#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING) +#ifdef MMC_SUPPORTS_TUNING if (!err && mmc->selected_mode == MMC_HS_400 && !slot->hs400_tuned) { debug("%s: Tuning HS400 mode\n", __func__); err = octeontx_tune_hs400(mmc); @@ -3776,7 +3776,7 @@ static const struct dm_mmc_ops octeontx_hsmmc_ops = { .set_ios = octeontx_mmc_set_ios, .get_cd = octeontx_mmc_get_cd, .get_wp = octeontx_mmc_get_wp, -#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING) +#ifdef MMC_SUPPORTS_TUNING .execute_tuning = octeontx_mmc_execute_tuning, #endif }; diff --git a/drivers/mmc/omap_hsmmc.c b/drivers/mmc/omap_hsmmc.c index 2b7f9fc9a20..99f21b2c546 100644 --- a/drivers/mmc/omap_hsmmc.c +++ b/drivers/mmc/omap_hsmmc.c @@ -23,6 +23,7 @@ */ #include +#include #include #include #include @@ -576,7 +577,7 @@ static uint32_t omap_hsmmc_set_capabilities(struct mmc *mmc) return val; } -#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING) +#ifdef MMC_SUPPORTS_TUNING static void omap_hsmmc_disable_tuning(struct mmc *mmc) { struct hsmmc *mmc_base; @@ -1517,7 +1518,7 @@ static const struct dm_mmc_ops omap_hsmmc_ops = { .get_cd = omap_hsmmc_getcd, .get_wp = omap_hsmmc_getwp, #endif -#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING) +#ifdef MMC_SUPPORTS_TUNING .execute_tuning = omap_hsmmc_execute_tuning, #endif .wait_dat0 = omap_hsmmc_wait_dat0, diff --git a/drivers/mmc/owl_mmc.c b/drivers/mmc/owl_mmc.c index bd4906f58e7..e84171a661a 100644 --- a/drivers/mmc/owl_mmc.c +++ b/drivers/mmc/owl_mmc.c @@ -11,6 +11,7 @@ * channel, and those special bits used in this driver is picked from vendor * source exclusively for MMC/SD. */ +#include #include #include #include diff --git a/drivers/mmc/pci_mmc.c b/drivers/mmc/pci_mmc.c index d446c55f72b..4d163ccba04 100644 --- a/drivers/mmc/pci_mmc.c +++ b/drivers/mmc/pci_mmc.c @@ -4,6 +4,7 @@ * Copyright (C) 2014, Bin Meng */ +#include #include #include #include diff --git a/drivers/mmc/piton_mmc.c b/drivers/mmc/piton_mmc.c index fed1f841608..a330bbf8cbe 100644 --- a/drivers/mmc/piton_mmc.c +++ b/drivers/mmc/piton_mmc.c @@ -11,6 +11,7 @@ #include #include +#include #include #include #include diff --git a/drivers/mmc/rockchip_dw_mmc.c b/drivers/mmc/rockchip_dw_mmc.c index 1a10b7057a4..ad4529d6afa 100644 --- a/drivers/mmc/rockchip_dw_mmc.c +++ b/drivers/mmc/rockchip_dw_mmc.c @@ -3,6 +3,7 @@ * Copyright (c) 2013 Google, Inc */ +#include #include #include #include diff --git a/drivers/mmc/rockchip_sdhci.c b/drivers/mmc/rockchip_sdhci.c index 35667b86b50..c889c7bc985 100644 --- a/drivers/mmc/rockchip_sdhci.c +++ b/drivers/mmc/rockchip_sdhci.c @@ -5,6 +5,7 @@ * Rockchip SD Host Controller Interface */ +#include #include #include #include diff --git a/drivers/mmc/rpmb.c b/drivers/mmc/rpmb.c index 0658ce22cf1..b68d98573c9 100644 --- a/drivers/mmc/rpmb.c +++ b/drivers/mmc/rpmb.c @@ -8,6 +8,7 @@ */ #include +#include #include #include #include diff --git a/drivers/mmc/s5p_sdhci.c b/drivers/mmc/s5p_sdhci.c index 80dbb38c9b3..3b74feae68c 100644 --- a/drivers/mmc/s5p_sdhci.c +++ b/drivers/mmc/s5p_sdhci.c @@ -4,6 +4,7 @@ * Jaehoon Chung */ +#include #include #include #include diff --git a/drivers/mmc/sandbox_mmc.c b/drivers/mmc/sandbox_mmc.c index a24520f2e78..0ba7940a4db 100644 --- a/drivers/mmc/sandbox_mmc.c +++ b/drivers/mmc/sandbox_mmc.c @@ -4,6 +4,7 @@ * Written by Simon Glass */ +#include #include #include #include diff --git a/drivers/mmc/sdhci-adma.c b/drivers/mmc/sdhci-adma.c index fdb189d71a6..283ba956deb 100644 --- a/drivers/mmc/sdhci-adma.c +++ b/drivers/mmc/sdhci-adma.c @@ -3,6 +3,7 @@ * SDHCI ADMA2 helper functions. */ +#include #include #include #include diff --git a/drivers/mmc/sdhci-cadence.c b/drivers/mmc/sdhci-cadence.c index 07ec35a0463..c0a9f60b149 100644 --- a/drivers/mmc/sdhci-cadence.c +++ b/drivers/mmc/sdhci-cadence.c @@ -4,6 +4,7 @@ * Author: Masahiro Yamada */ +#include #include #include #include @@ -273,7 +274,7 @@ static int sdhci_cdns_probe(struct udevice *dev) host->ops = &sdhci_cdns_ops; host->quirks |= SDHCI_QUIRK_WAIT_SEND_CMD; sdhci_cdns_mmc_ops = sdhci_ops; -#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING) +#ifdef MMC_SUPPORTS_TUNING sdhci_cdns_mmc_ops.execute_tuning = sdhci_cdns_execute_tuning; #endif diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c index 560b7e889c7..af654ea8d13 100644 --- a/drivers/mmc/sdhci.c +++ b/drivers/mmc/sdhci.c @@ -7,6 +7,7 @@ * Murray.Jensen@cmst.csiro.au, 27-Jan-01. */ +#include #include #include #include @@ -14,7 +15,6 @@ #include #include #include -#include #include #include #include @@ -351,7 +351,7 @@ static int sdhci_send_command(struct mmc *mmc, struct mmc_cmd *cmd, return -ECOMM; } -#if defined(CONFIG_DM_MMC) && CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING) +#if defined(CONFIG_DM_MMC) && defined(MMC_SUPPORTS_TUNING) static int sdhci_execute_tuning(struct udevice *dev, uint opcode) { int err; @@ -848,7 +848,7 @@ const struct dm_mmc_ops sdhci_ops = { .set_ios = sdhci_set_ios, .get_cd = sdhci_get_cd, .deferred_probe = sdhci_deferred_probe, -#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING) +#ifdef MMC_SUPPORTS_TUNING .execute_tuning = sdhci_execute_tuning, #endif .wait_dat0 = sdhci_wait_dat0, diff --git a/drivers/mmc/sh_mmcif.c b/drivers/mmc/sh_mmcif.c index 06a30d5efb8..76dc1c68b82 100644 --- a/drivers/mmc/sh_mmcif.c +++ b/drivers/mmc/sh_mmcif.c @@ -6,6 +6,7 @@ */ #include +#include #include #include #include diff --git a/drivers/mmc/snps_dw_mmc.c b/drivers/mmc/snps_dw_mmc.c index 9bdbe5070b1..0134399e393 100644 --- a/drivers/mmc/snps_dw_mmc.c +++ b/drivers/mmc/snps_dw_mmc.c @@ -7,6 +7,7 @@ * Author: Eugeniy Paltsev */ +#include #include #include #include diff --git a/drivers/mmc/socfpga_dw_mmc.c b/drivers/mmc/socfpga_dw_mmc.c index f738019b835..387cb8b6b50 100644 --- a/drivers/mmc/socfpga_dw_mmc.c +++ b/drivers/mmc/socfpga_dw_mmc.c @@ -3,6 +3,7 @@ * (C) Copyright 2013 Altera Corporation */ +#include #include #include #include diff --git a/drivers/mmc/sti_sdhci.c b/drivers/mmc/sti_sdhci.c index 91018b7e21a..23a1dd43c9b 100644 --- a/drivers/mmc/sti_sdhci.c +++ b/drivers/mmc/sti_sdhci.c @@ -4,6 +4,7 @@ * Author(s): Patrice Chotard, for STMicroelectronics. */ +#include #include #include #include diff --git a/drivers/mmc/stm32_sdmmc2.c b/drivers/mmc/stm32_sdmmc2.c index 9483fb57daf..39ae79ba129 100644 --- a/drivers/mmc/stm32_sdmmc2.c +++ b/drivers/mmc/stm32_sdmmc2.c @@ -6,6 +6,7 @@ #define LOG_CATEGORY UCLASS_MMC +#include #include #include #include diff --git a/drivers/mmc/sunxi_mmc.c b/drivers/mmc/sunxi_mmc.c index 0b56d1405be..714706d2411 100644 --- a/drivers/mmc/sunxi_mmc.c +++ b/drivers/mmc/sunxi_mmc.c @@ -13,6 +13,7 @@ * proper DM_MMC implementation at the end. */ +#include #include #include #include diff --git a/drivers/mmc/tangier_sdhci.c b/drivers/mmc/tangier_sdhci.c index ae65c310b68..11564273324 100644 --- a/drivers/mmc/tangier_sdhci.c +++ b/drivers/mmc/tangier_sdhci.c @@ -2,6 +2,7 @@ /* * Copyright (c) 2017 Intel Corporation */ +#include #include #include #include diff --git a/drivers/mmc/tegra_mmc.c b/drivers/mmc/tegra_mmc.c index 5ed7f01d3f3..c01fb3d0165 100644 --- a/drivers/mmc/tegra_mmc.c +++ b/drivers/mmc/tegra_mmc.c @@ -7,6 +7,7 @@ */ #include +#include #include #include #include diff --git a/drivers/mmc/tmio-common.c b/drivers/mmc/tmio-common.c index 0b396122b46..719c4830bc3 100644 --- a/drivers/mmc/tmio-common.c +++ b/drivers/mmc/tmio-common.c @@ -4,6 +4,7 @@ * Author: Masahiro Yamada */ +#include #include #include #include diff --git a/drivers/mmc/uniphier-sd.c b/drivers/mmc/uniphier-sd.c index 5b3650d52ee..8cde4308aae 100644 --- a/drivers/mmc/uniphier-sd.c +++ b/drivers/mmc/uniphier-sd.c @@ -4,6 +4,7 @@ * Author: Masahiro Yamada */ +#include #include #include #include diff --git a/drivers/mmc/xenon_sdhci.c b/drivers/mmc/xenon_sdhci.c index 0e4902fab77..27dbe0404e0 100644 --- a/drivers/mmc/xenon_sdhci.c +++ b/drivers/mmc/xenon_sdhci.c @@ -14,6 +14,7 @@ * Stefan Roese */ +#include #include #include #include diff --git a/drivers/mmc/zynq_sdhci.c b/drivers/mmc/zynq_sdhci.c index 898be5a0913..935540d1719 100644 --- a/drivers/mmc/zynq_sdhci.c +++ b/drivers/mmc/zynq_sdhci.c @@ -7,6 +7,7 @@ */ #include +#include #include #include #include diff --git a/drivers/mtd/altera_qspi.c b/drivers/mtd/altera_qspi.c index c26615821c8..d31391f36a4 100644 --- a/drivers/mtd/altera_qspi.c +++ b/drivers/mtd/altera_qspi.c @@ -3,6 +3,7 @@ * Copyright (C) 2015 Thomas Chou */ +#include #include #include #include diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c index a7826e81c17..8ade7949a68 100644 --- a/drivers/mtd/cfi_flash.c +++ b/drivers/mtd/cfi_flash.c @@ -16,7 +16,7 @@ /* The DEBUG define must be before common to enable debugging */ /* #define DEBUG */ -#include +#include #include #include #include @@ -26,7 +26,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/mtd/cfi_mtd.c b/drivers/mtd/cfi_mtd.c index b14d4773931..bf4473ba9e8 100644 --- a/drivers/mtd/cfi_mtd.c +++ b/drivers/mtd/cfi_mtd.c @@ -5,6 +5,7 @@ * Written by: Piotr Ziecik */ +#include #include #include #include diff --git a/drivers/mtd/hbmc-am654.c b/drivers/mtd/hbmc-am654.c index 599beda30d5..8161087b50c 100644 --- a/drivers/mtd/hbmc-am654.c +++ b/drivers/mtd/hbmc-am654.c @@ -3,6 +3,7 @@ // Copyright (C) 2019 Texas Instruments Incorporated - https://www.ti.com/ // Author: Vignesh Raghavendra +#include #include #include #include diff --git a/drivers/mtd/jedec_flash.c b/drivers/mtd/jedec_flash.c index a832f348f22..859c7fd4ec2 100644 --- a/drivers/mtd/jedec_flash.c +++ b/drivers/mtd/jedec_flash.c @@ -11,6 +11,7 @@ /* The DEBUG define must be before common to enable debugging */ /*#define DEBUG*/ +#include #include #include #include diff --git a/drivers/mtd/mtd-uclass.c b/drivers/mtd/mtd-uclass.c index 720bd824c4d..0743fe7af9f 100644 --- a/drivers/mtd/mtd-uclass.c +++ b/drivers/mtd/mtd-uclass.c @@ -5,6 +5,7 @@ #define LOG_CATEGORY UCLASS_MTD +#include #include #include #include diff --git a/drivers/mtd/mtd_uboot.c b/drivers/mtd/mtd_uboot.c index 69cb3b51f92..14ce726b10d 100644 --- a/drivers/mtd/mtd_uboot.c +++ b/drivers/mtd/mtd_uboot.c @@ -3,6 +3,7 @@ * (C) Copyright 2014 * Heiko Schocher, DENX Software Engineering, hs@denx.de. */ +#include #include #include #include diff --git a/drivers/mtd/mtdpart.c b/drivers/mtd/mtdpart.c index be1d19b4ffa..4886392a1cf 100644 --- a/drivers/mtd/mtdpart.c +++ b/drivers/mtd/mtdpart.c @@ -19,6 +19,7 @@ #include #endif +#include #include #include #include diff --git a/drivers/mtd/nand/bbt.c b/drivers/mtd/nand/bbt.c index 4ff0999f62a..972aec6e266 100644 --- a/drivers/mtd/nand/bbt.c +++ b/drivers/mtd/nand/bbt.c @@ -9,6 +9,7 @@ #define pr_fmt(fmt) "nand-bbt: " fmt +#include #include #include #include diff --git a/drivers/mtd/nand/core.c b/drivers/mtd/nand/core.c index 472ad0bdefb..f6d9c584f78 100644 --- a/drivers/mtd/nand/core.c +++ b/drivers/mtd/nand/core.c @@ -9,6 +9,7 @@ #define pr_fmt(fmt) "nand: " fmt +#include #include #ifndef __UBOOT__ #include diff --git a/drivers/mtd/nand/raw/am335x_spl_bch.c b/drivers/mtd/nand/raw/am335x_spl_bch.c index 64d8ce0965a..6831af98b73 100644 --- a/drivers/mtd/nand/raw/am335x_spl_bch.c +++ b/drivers/mtd/nand/raw/am335x_spl_bch.c @@ -9,7 +9,7 @@ * Stefan Roese, DENX Software Engineering, sr@denx.de. */ -#include +#include #include #include #include diff --git a/drivers/mtd/nand/raw/arasan_nfc.c b/drivers/mtd/nand/raw/arasan_nfc.c index 4f013efafb3..ffcd963b3da 100644 --- a/drivers/mtd/nand/raw/arasan_nfc.c +++ b/drivers/mtd/nand/raw/arasan_nfc.c @@ -5,6 +5,7 @@ * Copyright (C) 2014 - 2015 Xilinx, Inc. */ +#include #include #include #include diff --git a/drivers/mtd/nand/raw/atmel_nand.c b/drivers/mtd/nand/raw/atmel_nand.c index 4dbf7b47135..6d94e7af38e 100644 --- a/drivers/mtd/nand/raw/atmel_nand.c +++ b/drivers/mtd/nand/raw/atmel_nand.c @@ -10,7 +10,7 @@ * (C) Copyright 2012 ATMEL, Hong Xu */ -#include +#include #include #include #include diff --git a/drivers/mtd/nand/raw/brcmnand/bcm63158_nand.c b/drivers/mtd/nand/raw/brcmnand/bcm63158_nand.c index 3f59fbbbb8f..4e6d99fd3ca 100644 --- a/drivers/mtd/nand/raw/brcmnand/bcm63158_nand.c +++ b/drivers/mtd/nand/raw/brcmnand/bcm63158_nand.c @@ -1,5 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ +#include #include #include #include diff --git a/drivers/mtd/nand/raw/brcmnand/bcm6368_nand.c b/drivers/mtd/nand/raw/brcmnand/bcm6368_nand.c index d54de0b3ecc..6164989b937 100644 --- a/drivers/mtd/nand/raw/brcmnand/bcm6368_nand.c +++ b/drivers/mtd/nand/raw/brcmnand/bcm6368_nand.c @@ -1,5 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ +#include #include #include #include diff --git a/drivers/mtd/nand/raw/brcmnand/bcm6753_nand.c b/drivers/mtd/nand/raw/brcmnand/bcm6753_nand.c index a101222a28f..feae66ef25a 100644 --- a/drivers/mtd/nand/raw/brcmnand/bcm6753_nand.c +++ b/drivers/mtd/nand/raw/brcmnand/bcm6753_nand.c @@ -1,5 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ +#include #include #include #include diff --git a/drivers/mtd/nand/raw/brcmnand/bcm68360_nand.c b/drivers/mtd/nand/raw/brcmnand/bcm68360_nand.c index 385642d0c09..dbd85af7079 100644 --- a/drivers/mtd/nand/raw/brcmnand/bcm68360_nand.c +++ b/drivers/mtd/nand/raw/brcmnand/bcm68360_nand.c @@ -1,5 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ +#include #include #include #include diff --git a/drivers/mtd/nand/raw/brcmnand/bcm6838_nand.c b/drivers/mtd/nand/raw/brcmnand/bcm6838_nand.c index 407898ddae6..ef3649688c6 100644 --- a/drivers/mtd/nand/raw/brcmnand/bcm6838_nand.c +++ b/drivers/mtd/nand/raw/brcmnand/bcm6838_nand.c @@ -1,5 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ +#include #include #include #include diff --git a/drivers/mtd/nand/raw/brcmnand/bcm6858_nand.c b/drivers/mtd/nand/raw/brcmnand/bcm6858_nand.c index 564c678c9ef..027fdd37da3 100644 --- a/drivers/mtd/nand/raw/brcmnand/bcm6858_nand.c +++ b/drivers/mtd/nand/raw/brcmnand/bcm6858_nand.c @@ -1,5 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ +#include #include #include #include diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c b/drivers/mtd/nand/raw/brcmnand/brcmnand.c index b7bf7cc0893..efbf9a3120a 100644 --- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c +++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c @@ -12,6 +12,7 @@ * GNU General Public License for more details. */ +#include #include #include #include diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand_compat.c b/drivers/mtd/nand/raw/brcmnand/brcmnand_compat.c index b3b3df5c042..a6acf556bcc 100644 --- a/drivers/mtd/nand/raw/brcmnand/brcmnand_compat.c +++ b/drivers/mtd/nand/raw/brcmnand/brcmnand_compat.c @@ -1,5 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ +#include #include #include #include diff --git a/drivers/mtd/nand/raw/brcmnand/iproc_nand.c b/drivers/mtd/nand/raw/brcmnand/iproc_nand.c index 430d6c93853..69711d98ce1 100644 --- a/drivers/mtd/nand/raw/brcmnand/iproc_nand.c +++ b/drivers/mtd/nand/raw/brcmnand/iproc_nand.c @@ -4,6 +4,7 @@ * Copyright (C) 2015 Broadcom Corporation */ +#include #include #include #include diff --git a/drivers/mtd/nand/raw/cortina_nand.c b/drivers/mtd/nand/raw/cortina_nand.c index 06918a46e93..b7be6602f7c 100644 --- a/drivers/mtd/nand/raw/cortina_nand.c +++ b/drivers/mtd/nand/raw/cortina_nand.c @@ -3,6 +3,7 @@ * Copyright (c) 2020, Cortina Access Inc.. */ +#include #include #include #include diff --git a/drivers/mtd/nand/raw/davinci_nand.c b/drivers/mtd/nand/raw/davinci_nand.c index d4daf06b8de..71bbb8231bf 100644 --- a/drivers/mtd/nand/raw/davinci_nand.c +++ b/drivers/mtd/nand/raw/davinci_nand.c @@ -28,7 +28,7 @@ - */ -#include +#include #include #include #include diff --git a/drivers/mtd/nand/raw/denali.c b/drivers/mtd/nand/raw/denali.c index b2401116689..c827f80281c 100644 --- a/drivers/mtd/nand/raw/denali.c +++ b/drivers/mtd/nand/raw/denali.c @@ -5,6 +5,7 @@ * Copyright (C) 2009-2010, Intel Corporation and its suppliers. */ +#include #include #include #include diff --git a/drivers/mtd/nand/raw/denali_spl.c b/drivers/mtd/nand/raw/denali_spl.c index b1e2c9d8161..165a23312cb 100644 --- a/drivers/mtd/nand/raw/denali_spl.c +++ b/drivers/mtd/nand/raw/denali_spl.c @@ -4,7 +4,7 @@ * Copyright (C) 2014-2015 Masahiro Yamada */ -#include +#include #include #include #include diff --git a/drivers/mtd/nand/raw/fsl_elbc_nand.c b/drivers/mtd/nand/raw/fsl_elbc_nand.c index 157330cb287..7853c3f74e2 100644 --- a/drivers/mtd/nand/raw/fsl_elbc_nand.c +++ b/drivers/mtd/nand/raw/fsl_elbc_nand.c @@ -7,7 +7,7 @@ * Scott Wood */ -#include +#include #include #include #include diff --git a/drivers/mtd/nand/raw/fsl_elbc_spl.c b/drivers/mtd/nand/raw/fsl_elbc_spl.c index 17b8ef7ff4b..26aaab08e89 100644 --- a/drivers/mtd/nand/raw/fsl_elbc_spl.c +++ b/drivers/mtd/nand/raw/fsl_elbc_spl.c @@ -9,7 +9,7 @@ * Author: Scott Wood */ -#include +#include #include #include #include diff --git a/drivers/mtd/nand/raw/fsl_ifc_nand.c b/drivers/mtd/nand/raw/fsl_ifc_nand.c index 857d50ef9b0..1d7c1fddd3f 100644 --- a/drivers/mtd/nand/raw/fsl_ifc_nand.c +++ b/drivers/mtd/nand/raw/fsl_ifc_nand.c @@ -6,7 +6,7 @@ * Authors: Dipen Dudhat */ -#include +#include #include #include #include diff --git a/drivers/mtd/nand/raw/fsl_ifc_spl.c b/drivers/mtd/nand/raw/fsl_ifc_spl.c index c2ebee94870..69d26f1f79a 100644 --- a/drivers/mtd/nand/raw/fsl_ifc_spl.c +++ b/drivers/mtd/nand/raw/fsl_ifc_spl.c @@ -6,7 +6,7 @@ * Author: Dipen Dudhat */ -#include +#include #include #include #include diff --git a/drivers/mtd/nand/raw/kirkwood_nand.c b/drivers/mtd/nand/raw/kirkwood_nand.c index cd182be268d..621d2d232c8 100644 --- a/drivers/mtd/nand/raw/kirkwood_nand.c +++ b/drivers/mtd/nand/raw/kirkwood_nand.c @@ -5,6 +5,7 @@ * Written-by: Prafulla Wadaskar */ +#include #include #include #include diff --git a/drivers/mtd/nand/raw/kmeter1_nand.c b/drivers/mtd/nand/raw/kmeter1_nand.c index e9398eb4093..dfe73d64e46 100644 --- a/drivers/mtd/nand/raw/kmeter1_nand.c +++ b/drivers/mtd/nand/raw/kmeter1_nand.c @@ -4,7 +4,7 @@ * Heiko Schocher, DENX Software Engineering, hs@denx.de */ -#include +#include #include #include #include diff --git a/drivers/mtd/nand/raw/lpc32xx_nand_mlc.c b/drivers/mtd/nand/raw/lpc32xx_nand_mlc.c index c89661badbf..f8ae216d56c 100644 --- a/drivers/mtd/nand/raw/lpc32xx_nand_mlc.c +++ b/drivers/mtd/nand/raw/lpc32xx_nand_mlc.c @@ -19,7 +19,7 @@ * should not rely on the ECC validity. */ -#include +#include #include #include #include diff --git a/drivers/mtd/nand/raw/lpc32xx_nand_slc.c b/drivers/mtd/nand/raw/lpc32xx_nand_slc.c index 4d643bc64bc..b21a0b9d293 100644 --- a/drivers/mtd/nand/raw/lpc32xx_nand_slc.c +++ b/drivers/mtd/nand/raw/lpc32xx_nand_slc.c @@ -10,7 +10,7 @@ * Author: Kevin Wells */ -#include +#include #include #include #include diff --git a/drivers/mtd/nand/raw/mxc_nand.c b/drivers/mtd/nand/raw/mxc_nand.c index 0750b38f708..dbdc5b0bca1 100644 --- a/drivers/mtd/nand/raw/mxc_nand.c +++ b/drivers/mtd/nand/raw/mxc_nand.c @@ -5,7 +5,7 @@ * Copyright 2009 Ilya Yanok, */ -#include +#include #include #include #include diff --git a/drivers/mtd/nand/raw/mxc_nand_spl.c b/drivers/mtd/nand/raw/mxc_nand_spl.c index c5872848954..a855c9987f8 100644 --- a/drivers/mtd/nand/raw/mxc_nand_spl.c +++ b/drivers/mtd/nand/raw/mxc_nand_spl.c @@ -10,7 +10,7 @@ * Stefan Roese, DENX Software Engineering, sr at denx.de. */ -#include +#include #include #include #include diff --git a/drivers/mtd/nand/raw/mxic_nand.c b/drivers/mtd/nand/raw/mxic_nand.c index 0e54b5f6938..6abdc24bd30 100644 --- a/drivers/mtd/nand/raw/mxic_nand.c +++ b/drivers/mtd/nand/raw/mxic_nand.c @@ -6,6 +6,7 @@ * Zhengxun Li */ +#include #include #include #include diff --git a/drivers/mtd/nand/raw/mxs_nand.c b/drivers/mtd/nand/raw/mxs_nand.c index 11b0247b284..fd65772af80 100644 --- a/drivers/mtd/nand/raw/mxs_nand.c +++ b/drivers/mtd/nand/raw/mxs_nand.c @@ -13,6 +13,7 @@ * Copyright 2017-2019 NXP */ +#include #include #include #include diff --git a/drivers/mtd/nand/raw/mxs_nand_spl.c b/drivers/mtd/nand/raw/mxs_nand_spl.c index c8e064347ad..f7d3f02f85a 100644 --- a/drivers/mtd/nand/raw/mxs_nand_spl.c +++ b/drivers/mtd/nand/raw/mxs_nand_spl.c @@ -4,6 +4,7 @@ * Copyright 2019 NXP * Author: Tim Harvey */ +#include #include #include #include diff --git a/drivers/mtd/nand/raw/nand.c b/drivers/mtd/nand/raw/nand.c index 36054492e18..b591170346d 100644 --- a/drivers/mtd/nand/raw/nand.c +++ b/drivers/mtd/nand/raw/nand.c @@ -5,7 +5,7 @@ * Ladislav Michl */ -#include +#include #include #include #include diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c index 18b95caffef..688d17ba3c2 100644 --- a/drivers/mtd/nand/raw/nand_base.c +++ b/drivers/mtd/nand/raw/nand_base.c @@ -28,6 +28,7 @@ */ #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt +#include #include #include #include diff --git a/drivers/mtd/nand/raw/nand_bbt.c b/drivers/mtd/nand/raw/nand_bbt.c index 1fb8535ab05..cd451870a6f 100644 --- a/drivers/mtd/nand/raw/nand_bbt.c +++ b/drivers/mtd/nand/raw/nand_bbt.c @@ -57,6 +57,7 @@ * */ +#include #include #include #include diff --git a/drivers/mtd/nand/raw/nand_bch.c b/drivers/mtd/nand/raw/nand_bch.c index f317cc26c90..bb48ebbb96c 100644 --- a/drivers/mtd/nand/raw/nand_bch.c +++ b/drivers/mtd/nand/raw/nand_bch.c @@ -7,6 +7,7 @@ * */ +#include #include #include #include diff --git a/drivers/mtd/nand/raw/nand_ecc.c b/drivers/mtd/nand/raw/nand_ecc.c index 0530ccb0722..2bc329be1a3 100644 --- a/drivers/mtd/nand/raw/nand_ecc.c +++ b/drivers/mtd/nand/raw/nand_ecc.c @@ -22,6 +22,7 @@ * this file might be covered by the GNU General Public License. */ +#include #include #include diff --git a/drivers/mtd/nand/raw/nand_ids.c b/drivers/mtd/nand/raw/nand_ids.c index 4f46378ffe1..be60d6d9d99 100644 --- a/drivers/mtd/nand/raw/nand_ids.c +++ b/drivers/mtd/nand/raw/nand_ids.c @@ -6,6 +6,7 @@ * published by the Free Software Foundation. * */ +#include #include #include diff --git a/drivers/mtd/nand/raw/nand_spl_load.c b/drivers/mtd/nand/raw/nand_spl_load.c index 87af675c139..7ac9bf4d120 100644 --- a/drivers/mtd/nand/raw/nand_spl_load.c +++ b/drivers/mtd/nand/raw/nand_spl_load.c @@ -4,7 +4,7 @@ * Heiko Schocher, DENX Software Engineering, hs@denx.de. */ -#include +#include #include /* diff --git a/drivers/mtd/nand/raw/nand_spl_simple.c b/drivers/mtd/nand/raw/nand_spl_simple.c index c0956ab0e49..80d6e0e1e4e 100644 --- a/drivers/mtd/nand/raw/nand_spl_simple.c +++ b/drivers/mtd/nand/raw/nand_spl_simple.c @@ -4,7 +4,7 @@ * Stefan Roese, DENX Software Engineering, sr@denx.de. */ -#include +#include #include #include #include diff --git a/drivers/mtd/nand/raw/nand_timings.c b/drivers/mtd/nand/raw/nand_timings.c index c1bac1d01cc..e6aa7903913 100644 --- a/drivers/mtd/nand/raw/nand_timings.c +++ b/drivers/mtd/nand/raw/nand_timings.c @@ -8,6 +8,7 @@ * published by the Free Software Foundation. * */ +#include #include #include #include diff --git a/drivers/mtd/nand/raw/nand_util.c b/drivers/mtd/nand/raw/nand_util.c index fda4239fa79..72cc24f4037 100644 --- a/drivers/mtd/nand/raw/nand_util.c +++ b/drivers/mtd/nand/raw/nand_util.c @@ -18,6 +18,7 @@ * Copyright 2010 Freescale Semiconductor */ +#include #include #include #include diff --git a/drivers/mtd/nand/raw/omap_elm.c b/drivers/mtd/nand/raw/omap_elm.c index 61751b9ae2d..015ec9bc2de 100644 --- a/drivers/mtd/nand/raw/omap_elm.c +++ b/drivers/mtd/nand/raw/omap_elm.c @@ -12,6 +12,7 @@ * sets in uboot */ +#include #include #include #include diff --git a/drivers/mtd/nand/raw/omap_gpmc.c b/drivers/mtd/nand/raw/omap_gpmc.c index 92a92ad63a0..2f8fa7d73d2 100644 --- a/drivers/mtd/nand/raw/omap_gpmc.c +++ b/drivers/mtd/nand/raw/omap_gpmc.c @@ -4,7 +4,7 @@ * Rohit Choraria */ -#include +#include #include #include #include diff --git a/drivers/mtd/nand/raw/pxa3xx_nand.c b/drivers/mtd/nand/raw/pxa3xx_nand.c index 17c5601bead..1d9a6d107b1 100644 --- a/drivers/mtd/nand/raw/pxa3xx_nand.c +++ b/drivers/mtd/nand/raw/pxa3xx_nand.c @@ -6,6 +6,7 @@ * Copyright © 2006 Marvell International Ltd. */ +#include #include #include #include diff --git a/drivers/mtd/nand/raw/rockchip_nfc.c b/drivers/mtd/nand/raw/rockchip_nfc.c index f730e15d041..088cc7fead2 100644 --- a/drivers/mtd/nand/raw/rockchip_nfc.c +++ b/drivers/mtd/nand/raw/rockchip_nfc.c @@ -5,6 +5,7 @@ * Author: Yifeng Zhao */ +#include #include #include #include diff --git a/drivers/mtd/nand/raw/stm32_fmc2_nand.c b/drivers/mtd/nand/raw/stm32_fmc2_nand.c index 083ea4c5a74..d284b8cbb12 100644 --- a/drivers/mtd/nand/raw/stm32_fmc2_nand.c +++ b/drivers/mtd/nand/raw/stm32_fmc2_nand.c @@ -6,6 +6,7 @@ #define LOG_CATEGORY UCLASS_MTD +#include #include #include #include diff --git a/drivers/mtd/nand/raw/sunxi_nand.c b/drivers/mtd/nand/raw/sunxi_nand.c index 34197bb09a1..0b5b74dc242 100644 --- a/drivers/mtd/nand/raw/sunxi_nand.c +++ b/drivers/mtd/nand/raw/sunxi_nand.c @@ -25,6 +25,7 @@ */ #include +#include #include #include #include diff --git a/drivers/mtd/nand/raw/sunxi_nand_spl.c b/drivers/mtd/nand/raw/sunxi_nand_spl.c index 040138e2559..c9b8c78ed75 100644 --- a/drivers/mtd/nand/raw/sunxi_nand_spl.c +++ b/drivers/mtd/nand/raw/sunxi_nand_spl.c @@ -6,6 +6,7 @@ #include #include +#include #include #include #include diff --git a/drivers/mtd/nand/raw/tegra_nand.c b/drivers/mtd/nand/raw/tegra_nand.c index 8285f87359e..6086ecdfa3d 100644 --- a/drivers/mtd/nand/raw/tegra_nand.c +++ b/drivers/mtd/nand/raw/tegra_nand.c @@ -6,6 +6,7 @@ * (C) Copyright 2006 DENX Software Engineering */ +#include #include #include #include diff --git a/drivers/mtd/nand/raw/vf610_nfc.c b/drivers/mtd/nand/raw/vf610_nfc.c index 10265950368..d2363a0662e 100644 --- a/drivers/mtd/nand/raw/vf610_nfc.c +++ b/drivers/mtd/nand/raw/vf610_nfc.c @@ -21,7 +21,7 @@ * - HW ECC: Only 24 and 32-bit error correction implemented. */ -#include +#include #include #include #include diff --git a/drivers/mtd/nand/raw/zynq_nand.c b/drivers/mtd/nand/raw/zynq_nand.c index 5f90171a6fe..bacaf13c570 100644 --- a/drivers/mtd/nand/raw/zynq_nand.c +++ b/drivers/mtd/nand/raw/zynq_nand.c @@ -6,6 +6,7 @@ * This driver is based on plat_nand.c and mxc_nand.c drivers */ +#include #include #include #include diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c index ef50237f10e..62c28aa422d 100644 --- a/drivers/mtd/nand/spi/core.c +++ b/drivers/mtd/nand/spi/core.c @@ -21,6 +21,7 @@ #include #include #else +#include #include #include #include diff --git a/drivers/mtd/nvmxip/nvmxip-uclass.c b/drivers/mtd/nvmxip/nvmxip-uclass.c index 95dfa58def1..9a316d1de39 100644 --- a/drivers/mtd/nvmxip/nvmxip-uclass.c +++ b/drivers/mtd/nvmxip/nvmxip-uclass.c @@ -6,6 +6,7 @@ * Abdellatif El Khlifi */ +#include #include #include #if CONFIG_IS_ENABLED(SANDBOX64) diff --git a/drivers/mtd/nvmxip/nvmxip.c b/drivers/mtd/nvmxip/nvmxip.c index 229938db380..0bd98d64275 100644 --- a/drivers/mtd/nvmxip/nvmxip.c +++ b/drivers/mtd/nvmxip/nvmxip.c @@ -6,6 +6,7 @@ * Abdellatif El Khlifi */ +#include #include #include #include diff --git a/drivers/mtd/nvmxip/nvmxip_qspi.c b/drivers/mtd/nvmxip/nvmxip_qspi.c index 460887c7da3..4d7471118a4 100644 --- a/drivers/mtd/nvmxip/nvmxip_qspi.c +++ b/drivers/mtd/nvmxip/nvmxip_qspi.c @@ -6,6 +6,7 @@ * Abdellatif El Khlifi */ +#include #include #include #include diff --git a/drivers/mtd/onenand/onenand_base.c b/drivers/mtd/onenand/onenand_base.c index edecb841338..762b01c1b0f 100644 --- a/drivers/mtd/onenand/onenand_base.c +++ b/drivers/mtd/onenand/onenand_base.c @@ -19,6 +19,7 @@ * published by the Free Software Foundation. */ +#include #include #include #include diff --git a/drivers/mtd/onenand/onenand_bbt.c b/drivers/mtd/onenand/onenand_bbt.c index 6af1cb2ec19..cc1e449f4a7 100644 --- a/drivers/mtd/onenand/onenand_bbt.c +++ b/drivers/mtd/onenand/onenand_bbt.c @@ -14,6 +14,7 @@ * published by the Free Software Foundation. */ +#include #include #include #include diff --git a/drivers/mtd/onenand/onenand_spl.c b/drivers/mtd/onenand/onenand_spl.c index a9d54a243ad..2699958a5de 100644 --- a/drivers/mtd/onenand/onenand_spl.c +++ b/drivers/mtd/onenand/onenand_spl.c @@ -7,10 +7,9 @@ * Kyungmin Park */ -#include +#include #include #include -#include #include #include diff --git a/drivers/mtd/onenand/onenand_uboot.c b/drivers/mtd/onenand/onenand_uboot.c index db0ac6c1fb8..ecacabefadc 100644 --- a/drivers/mtd/onenand/onenand_uboot.c +++ b/drivers/mtd/onenand/onenand_uboot.c @@ -13,7 +13,7 @@ * OneNAND initialization at U-Boot */ -#include +#include #include #include #include diff --git a/drivers/mtd/onenand/samsung.c b/drivers/mtd/onenand/samsung.c index ccfdad4913e..c415e5149a0 100644 --- a/drivers/mtd/onenand/samsung.c +++ b/drivers/mtd/onenand/samsung.c @@ -9,6 +9,7 @@ * Emulate the pseudo BufferRAM */ +#include #include #include #include diff --git a/drivers/mtd/renesas_rpc_hf.c b/drivers/mtd/renesas_rpc_hf.c index 8dcffde9aa3..979b64d4a2f 100644 --- a/drivers/mtd/renesas_rpc_hf.c +++ b/drivers/mtd/renesas_rpc_hf.c @@ -7,6 +7,7 @@ * Copyright (C) 2017 Marek Vasut */ +#include #include #include #include diff --git a/drivers/mtd/spi/fsl_espi_spl.c b/drivers/mtd/spi/fsl_espi_spl.c index 73eea922c33..cdbdbd6ea58 100644 --- a/drivers/mtd/spi/fsl_espi_spl.c +++ b/drivers/mtd/spi/fsl_espi_spl.c @@ -3,7 +3,7 @@ * Copyright 2013 Freescale Semiconductor, Inc. */ -#include +#include #include #include #include diff --git a/drivers/mtd/spi/sandbox.c b/drivers/mtd/spi/sandbox.c index 2d5a16bf6a2..4fe547171a5 100644 --- a/drivers/mtd/spi/sandbox.c +++ b/drivers/mtd/spi/sandbox.c @@ -10,6 +10,7 @@ #define LOG_CATEGORY UCLASS_SPI_FLASH +#include #include #include #include diff --git a/drivers/mtd/spi/sf-uclass.c b/drivers/mtd/spi/sf-uclass.c index a4d15bd64aa..2da0cf0dcf9 100644 --- a/drivers/mtd/spi/sf-uclass.c +++ b/drivers/mtd/spi/sf-uclass.c @@ -5,6 +5,7 @@ #define LOG_CATEGORY UCLASS_SPI_FLASH +#include #include #include #include diff --git a/drivers/mtd/spi/sf_bootdev.c b/drivers/mtd/spi/sf_bootdev.c index 017a74a3016..d6b47b11ce4 100644 --- a/drivers/mtd/spi/sf_bootdev.c +++ b/drivers/mtd/spi/sf_bootdev.c @@ -5,6 +5,7 @@ * Copyright 2022 Google LLC */ +#include #include #include #include diff --git a/drivers/mtd/spi/sf_dataflash.c b/drivers/mtd/spi/sf_dataflash.c index 6db24189c8e..6a0d953a729 100644 --- a/drivers/mtd/spi/sf_dataflash.c +++ b/drivers/mtd/spi/sf_dataflash.c @@ -6,6 +6,7 @@ * Haikun Wang (haikun.wang@freescale.com) */ +#include #include #include #include diff --git a/drivers/mtd/spi/sf_mtd.c b/drivers/mtd/spi/sf_mtd.c index 7342f26d88e..071b25ac67f 100644 --- a/drivers/mtd/spi/sf_mtd.c +++ b/drivers/mtd/spi/sf_mtd.c @@ -3,6 +3,7 @@ * Copyright (C) 2012-2014 Daniel Schwierzeck, daniel.schwierzeck@gmail.com */ +#include #include #include #include diff --git a/drivers/mtd/spi/sf_probe.c b/drivers/mtd/spi/sf_probe.c index 7100b64bf22..de6516f1065 100644 --- a/drivers/mtd/spi/sf_probe.c +++ b/drivers/mtd/spi/sf_probe.c @@ -7,6 +7,7 @@ * Copyright (C) 2013 Jagannadha Sutradharudu Teki, Xilinx Inc. */ +#include #include #include #include diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c index 982dd251150..f86003ca8c0 100644 --- a/drivers/mtd/spi/spi-nor-core.c +++ b/drivers/mtd/spi/spi-nor-core.c @@ -9,6 +9,7 @@ * Synced from Linux v4.19 */ +#include #include #include #include diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c index 684206ea07d..4e83b8c94c9 100644 --- a/drivers/mtd/spi/spi-nor-ids.c +++ b/drivers/mtd/spi/spi-nor-ids.c @@ -6,6 +6,7 @@ * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/ */ +#include #include #include diff --git a/drivers/mtd/spi/spi-nor-tiny.c b/drivers/mtd/spi/spi-nor-tiny.c index 5755c5eed29..0719fe845ca 100644 --- a/drivers/mtd/spi/spi-nor-tiny.c +++ b/drivers/mtd/spi/spi-nor-tiny.c @@ -9,6 +9,7 @@ * Synced from Linux v4.19 */ +#include #include #include #include diff --git a/drivers/mtd/stm32_flash.c b/drivers/mtd/stm32_flash.c index ec83be6b51f..4523344ba6b 100644 --- a/drivers/mtd/stm32_flash.c +++ b/drivers/mtd/stm32_flash.c @@ -4,7 +4,7 @@ * Kamil Lulko, */ -#include +#include #include #include #include diff --git a/drivers/mtd/ubispl/ubispl.c b/drivers/mtd/ubispl/ubispl.c index 90a7c4c6f9e..b58d8e8d565 100644 --- a/drivers/mtd/ubispl/ubispl.c +++ b/drivers/mtd/ubispl/ubispl.c @@ -7,6 +7,7 @@ * Copyright (c) International Business Machines Corp., 2006 */ +#include #include #include #include diff --git a/drivers/mux/mmio.c b/drivers/mux/mmio.c index e1125458a62..00e0282dcc0 100644 --- a/drivers/mux/mmio.c +++ b/drivers/mux/mmio.c @@ -6,6 +6,7 @@ * Copyright (C) 2017 Pengutronix, Philipp Zabel * Copyright (C) 2019 Texas Instrument, Jean-jacques Hiblot */ +#include #include #include #include diff --git a/drivers/mux/mux-uclass.c b/drivers/mux/mux-uclass.c index 8a3e7a84f41..8833888ded3 100644 --- a/drivers/mux/mux-uclass.c +++ b/drivers/mux/mux-uclass.c @@ -13,6 +13,7 @@ #define LOG_CATEGORY UCLASS_MUX +#include #include #include #include diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig index b4ff033afa9..b2d7b499766 100644 --- a/drivers/net/Kconfig +++ b/drivers/net/Kconfig @@ -193,24 +193,6 @@ config CALXEDA_XGMAC This driver supports the XGMAC in Calxeda Highbank and Midway machines. -config DWC_ETH_XGMAC - bool "Synopsys DWC Ethernet XGMAC device support" - select PHYLIB - help - This driver supports the Synopsys Designware Ethernet XGMAC (10G - Ethernet MAC) IP block. The IP supports many options for bus type, - clocking/reset structure, and feature list. - -config DWC_ETH_XGMAC_SOCFPGA - bool "Synopsys DWC Ethernet XGMAC device support for SOCFPGA" - select REGMAP - select SYSCON - depends on DWC_ETH_XGMAC - default y if TARGET_SOCFPGA_AGILEX5 - help - The Synopsys Designware Ethernet XGMAC IP block with specific - configuration used in Intel SoC FPGA chip. - config DRIVER_DM9000 bool "Davicom DM9000 controller driver" help diff --git a/drivers/net/Makefile b/drivers/net/Makefile index dce71685c3d..dc3404519d6 100644 --- a/drivers/net/Makefile +++ b/drivers/net/Makefile @@ -22,8 +22,6 @@ obj-$(CONFIG_DWC_ETH_QOS) += dwc_eth_qos.o obj-$(CONFIG_DWC_ETH_QOS_IMX) += dwc_eth_qos_imx.o obj-$(CONFIG_DWC_ETH_QOS_ROCKCHIP) += dwc_eth_qos_rockchip.o obj-$(CONFIG_DWC_ETH_QOS_QCOM) += dwc_eth_qos_qcom.o -obj-$(CONFIG_DWC_ETH_XGMAC) += dwc_eth_xgmac.o -obj-$(CONFIG_DWC_ETH_XGMAC_SOCFPGA) += dwc_eth_xgmac_socfpga.o obj-$(CONFIG_DWC_ETH_QOS_STARFIVE) += dwc_eth_qos_starfive.o obj-$(CONFIG_DWC_ETH_QOS_STM32) += dwc_eth_qos_stm32.o obj-$(CONFIG_E1000) += e1000.o diff --git a/drivers/net/ag7xxx.c b/drivers/net/ag7xxx.c index 059a65d4661..da1f3f45808 100644 --- a/drivers/net/ag7xxx.c +++ b/drivers/net/ag7xxx.c @@ -6,6 +6,7 @@ * Copyright (C) 2019 Rosy Song */ +#include #include #include #include diff --git a/drivers/net/altera_tse.c b/drivers/net/altera_tse.c index c57aafd0026..e2340936fa6 100644 --- a/drivers/net/altera_tse.c +++ b/drivers/net/altera_tse.c @@ -8,6 +8,7 @@ * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ +#include #include #include #include diff --git a/drivers/net/aspeed_mdio.c b/drivers/net/aspeed_mdio.c index f2e4392aa9a..a99715a7282 100644 --- a/drivers/net/aspeed_mdio.c +++ b/drivers/net/aspeed_mdio.c @@ -7,6 +7,7 @@ * This file is inspired from the Linux kernel driver drivers/net/phy/mdio-aspeed.c */ +#include #include #include #include diff --git a/drivers/net/bcm-sf2-eth-gmac.c b/drivers/net/bcm-sf2-eth-gmac.c index ba244b4a26e..cbe1e85222f 100644 --- a/drivers/net/bcm-sf2-eth-gmac.c +++ b/drivers/net/bcm-sf2-eth-gmac.c @@ -11,6 +11,7 @@ #endif #include +#include #include #include #include diff --git a/drivers/net/bcm-sf2-eth.c b/drivers/net/bcm-sf2-eth.c index c10719c6b51..1524f5c9989 100644 --- a/drivers/net/bcm-sf2-eth.c +++ b/drivers/net/bcm-sf2-eth.c @@ -3,6 +3,7 @@ * Copyright 2014 Broadcom Corporation. */ +#include #include #include #include diff --git a/drivers/net/bcm6348-eth.c b/drivers/net/bcm6348-eth.c index f87db4ab46e..15a94f6ce9a 100644 --- a/drivers/net/bcm6348-eth.c +++ b/drivers/net/bcm6348-eth.c @@ -6,6 +6,7 @@ * Copyright (C) 2008 Maxime Bizon */ +#include #include #include #include diff --git a/drivers/net/bcm6368-eth.c b/drivers/net/bcm6368-eth.c index 0601fcc42f5..9679a45b075 100644 --- a/drivers/net/bcm6368-eth.c +++ b/drivers/net/bcm6368-eth.c @@ -6,6 +6,7 @@ * Copyright (C) 2008 Maxime Bizon */ +#include #include #include #include diff --git a/drivers/net/bnxt/bnxt.c b/drivers/net/bnxt/bnxt.c index 25fbcd7b116..1c9a9962408 100644 --- a/drivers/net/bnxt/bnxt.c +++ b/drivers/net/bnxt/bnxt.c @@ -3,6 +3,7 @@ * Copyright 2019-2021 Broadcom. */ +#include #include #include diff --git a/drivers/net/calxedaxgmac.c b/drivers/net/calxedaxgmac.c index ebb399457fb..eb1e2a756cd 100644 --- a/drivers/net/calxedaxgmac.c +++ b/drivers/net/calxedaxgmac.c @@ -3,6 +3,7 @@ * Copyright 2010-2011 Calxeda, Inc. */ +#include #include #include #include diff --git a/drivers/net/cortina_ni.c b/drivers/net/cortina_ni.c index 79026882800..ef6ecd88b0c 100644 --- a/drivers/net/cortina_ni.c +++ b/drivers/net/cortina_ni.c @@ -7,6 +7,7 @@ * Ethernet MAC Driver for all supported CAxxxx SoCs */ +#include #include #include #include diff --git a/drivers/net/dc2114x.c b/drivers/net/dc2114x.c index ce028f451f1..4e7af95b41c 100644 --- a/drivers/net/dc2114x.c +++ b/drivers/net/dc2114x.c @@ -1,5 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ +#include #include #include #include diff --git a/drivers/net/designware.c b/drivers/net/designware.c index 07b0f49ef58..682045cea2c 100644 --- a/drivers/net/designware.c +++ b/drivers/net/designware.c @@ -8,6 +8,7 @@ * Designware ethernet IP driver for U-Boot */ +#include #include #include #include diff --git a/drivers/net/dm9000x.c b/drivers/net/dm9000x.c index 9e17f0b9c28..bec8d67dad0 100644 --- a/drivers/net/dm9000x.c +++ b/drivers/net/dm9000x.c @@ -49,6 +49,7 @@ * TODO: external MII is not functional, only internal at the moment. */ +#include #include #include #include diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c index 67ac86f82bc..32a5d52165a 100644 --- a/drivers/net/dwc_eth_qos.c +++ b/drivers/net/dwc_eth_qos.c @@ -29,6 +29,7 @@ #define LOG_CATEGORY UCLASS_ETH +#include #include #include #include diff --git a/drivers/net/dwc_eth_qos_imx.c b/drivers/net/dwc_eth_qos_imx.c index d6bed278ca7..9c4e3904413 100644 --- a/drivers/net/dwc_eth_qos_imx.c +++ b/drivers/net/dwc_eth_qos_imx.c @@ -3,6 +3,7 @@ * Copyright 2022 NXP */ +#include #include #include #include diff --git a/drivers/net/dwc_eth_qos_qcom.c b/drivers/net/dwc_eth_qos_qcom.c index 77d626393d5..8178138fc65 100644 --- a/drivers/net/dwc_eth_qos_qcom.c +++ b/drivers/net/dwc_eth_qos_qcom.c @@ -5,6 +5,7 @@ * Qcom DWMAC specific glue layer */ +#include #include #include #include diff --git a/drivers/net/dwc_eth_qos_rockchip.c b/drivers/net/dwc_eth_qos_rockchip.c index c4557e57988..fa9e513faea 100644 --- a/drivers/net/dwc_eth_qos_rockchip.c +++ b/drivers/net/dwc_eth_qos_rockchip.c @@ -8,6 +8,7 @@ * part in order to simplify future porting of fixes and support for other SoCs. */ +#include #include #include #include diff --git a/drivers/net/dwc_eth_qos_starfive.c b/drivers/net/dwc_eth_qos_starfive.c index 09e714ce76a..5be8ac0f1a5 100644 --- a/drivers/net/dwc_eth_qos_starfive.c +++ b/drivers/net/dwc_eth_qos_starfive.c @@ -4,6 +4,7 @@ * Author: Yanhong Wang */ +#include #include #include #include diff --git a/drivers/net/dwc_eth_xgmac.c b/drivers/net/dwc_eth_xgmac.c deleted file mode 100644 index d3e5f9255f5..00000000000 --- a/drivers/net/dwc_eth_xgmac.c +++ /dev/null @@ -1,1165 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Copyright (c) 2023, Intel Corporation. - * - * Portions based on U-Boot's dwc_eth_qos.c. - */ - -/* - * This driver supports the Synopsys Designware Ethernet XGMAC (10G Ethernet - * MAC) IP block. The IP supports multiple options for bus type, clocking/ - * reset structure, and feature list. - * - * The driver is written such that generic core logic is kept separate from - * configuration-specific logic. Code that interacts with configuration- - * specific resources is split out into separate functions to avoid polluting - * common code. If/when this driver is enhanced to support multiple - * configurations, the core code should be adapted to call all configuration- - * specific functions through function pointers, with the definition of those - * function pointers being supplied by struct udevice_id xgmac_ids[]'s .data - * field. - * - * This configuration uses an AXI master/DMA bus, an AHB slave/register bus, - * contains the DMA, MTL, and MAC sub-blocks, and supports a single RGMII PHY. - * This configuration also has SW control over all clock and reset signals to - * the HW block. - */ - -#define LOG_CATEGORY UCLASS_ETH - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include "dwc_eth_xgmac.h" - -static void *xgmac_alloc_descs(struct xgmac_priv *xgmac, unsigned int num) -{ - return memalign(ARCH_DMA_MINALIGN, num * xgmac->desc_size); -} - -static void xgmac_free_descs(void *descs) -{ - free(descs); -} - -static struct xgmac_desc *xgmac_get_desc(struct xgmac_priv *xgmac, - unsigned int num, bool rx) -{ - return (rx ? xgmac->rx_descs : xgmac->tx_descs) + - (num * xgmac->desc_size); -} - -void xgmac_inval_desc_generic(void *desc) -{ - unsigned long start; - unsigned long end; - - if (!desc) { - pr_err("%s invalid input buffer\n", __func__); - return; - } - - start = (unsigned long)desc & ~(ARCH_DMA_MINALIGN - 1); - end = ALIGN(start + sizeof(struct xgmac_desc), - ARCH_DMA_MINALIGN); - - invalidate_dcache_range(start, end); -} - -void xgmac_flush_desc_generic(void *desc) -{ - unsigned long start; - unsigned long end; - - if (!desc) { - pr_err("%s invalid input buffer\n", __func__); - return; - } - - start = (unsigned long)desc & ~(ARCH_DMA_MINALIGN - 1); - end = ALIGN(start + sizeof(struct xgmac_desc), - ARCH_DMA_MINALIGN); - - flush_dcache_range(start, end); -} - -void xgmac_inval_buffer_generic(void *buf, size_t size) -{ - unsigned long start; - unsigned long end; - - if (!buf) { - pr_err("%s invalid input buffer\n", __func__); - return; - } - - start = (unsigned long)buf & ~(ARCH_DMA_MINALIGN - 1); - end = ALIGN((unsigned long)buf + size, - ARCH_DMA_MINALIGN); - - invalidate_dcache_range(start, end); -} - -void xgmac_flush_buffer_generic(void *buf, size_t size) -{ - unsigned long start; - unsigned long end; - - if (!buf) { - pr_err("%s invalid input buffer\n", __func__); - return; - } - - start = (unsigned long)buf & ~(ARCH_DMA_MINALIGN - 1); - end = ALIGN((unsigned long)buf + size, - ARCH_DMA_MINALIGN); - - flush_dcache_range(start, end); -} - -static int xgmac_mdio_wait_idle(struct xgmac_priv *xgmac) -{ - return wait_for_bit_le32(&xgmac->mac_regs->mdio_data, - XGMAC_MAC_MDIO_ADDRESS_SBUSY, false, - XGMAC_TIMEOUT_100MS, true); -} - -static int xgmac_mdio_read(struct mii_dev *bus, int mdio_addr, int mdio_devad, - int mdio_reg) -{ - struct xgmac_priv *xgmac = bus->priv; - u32 val; - u32 hw_addr; - int ret; - - debug("%s(dev=%p, addr=0x%x, reg=%d):\n", __func__, xgmac->dev, mdio_addr, - mdio_reg); - - ret = xgmac_mdio_wait_idle(xgmac); - if (ret) { - pr_err("MDIO not idle at entry: %d\n", ret); - return ret; - } - - /* Set clause 22 format */ - val = BIT(mdio_addr); - writel(val, &xgmac->mac_regs->mdio_clause_22_port); - - hw_addr = (mdio_addr << XGMAC_MAC_MDIO_ADDRESS_PA_SHIFT) | - (mdio_reg & XGMAC_MAC_MDIO_REG_ADDR_C22P_MASK); - - val = xgmac->config->config_mac_mdio << - XGMAC_MAC_MDIO_ADDRESS_CR_SHIFT; - - val |= XGMAC_MAC_MDIO_ADDRESS_SADDR | - XGMAC_MDIO_SINGLE_CMD_ADDR_CMD_READ | - XGMAC_MAC_MDIO_ADDRESS_SBUSY; - - ret = xgmac_mdio_wait_idle(xgmac); - if (ret) { - pr_err("MDIO not idle at entry: %d\n", ret); - return ret; - } - - writel(hw_addr, &xgmac->mac_regs->mdio_address); - writel(val, &xgmac->mac_regs->mdio_data); - - ret = xgmac_mdio_wait_idle(xgmac); - if (ret) { - pr_err("MDIO read didn't complete: %d\n", ret); - return ret; - } - - val = readl(&xgmac->mac_regs->mdio_data); - val &= XGMAC_MAC_MDIO_DATA_GD_MASK; - - debug("%s: val=0x%x\n", __func__, val); - - return val; -} - -static int xgmac_mdio_write(struct mii_dev *bus, int mdio_addr, int mdio_devad, - int mdio_reg, u16 mdio_val) -{ - struct xgmac_priv *xgmac = bus->priv; - u32 val; - u32 hw_addr; - int ret; - - debug("%s(dev=%p, addr=0x%x, reg=%d, val=0x%x):\n", __func__, xgmac->dev, - mdio_addr, mdio_reg, mdio_val); - - ret = xgmac_mdio_wait_idle(xgmac); - if (ret) { - pr_err("MDIO not idle at entry: %d\n", ret); - return ret; - } - - /* Set clause 22 format */ - val = BIT(mdio_addr); - writel(val, &xgmac->mac_regs->mdio_clause_22_port); - - hw_addr = (mdio_addr << XGMAC_MAC_MDIO_ADDRESS_PA_SHIFT) | - (mdio_reg & XGMAC_MAC_MDIO_REG_ADDR_C22P_MASK); - - hw_addr |= (mdio_reg >> XGMAC_MAC_MDIO_ADDRESS_PA_SHIFT) << - XGMAC_MAC_MDIO_ADDRESS_DA_SHIFT; - - val = (xgmac->config->config_mac_mdio << - XGMAC_MAC_MDIO_ADDRESS_CR_SHIFT); - - val |= XGMAC_MAC_MDIO_ADDRESS_SADDR | - mdio_val | XGMAC_MDIO_SINGLE_CMD_ADDR_CMD_WRITE | - XGMAC_MAC_MDIO_ADDRESS_SBUSY; - - ret = xgmac_mdio_wait_idle(xgmac); - if (ret) { - pr_err("MDIO not idle at entry: %d\n", ret); - return ret; - } - - writel(hw_addr, &xgmac->mac_regs->mdio_address); - writel(val, &xgmac->mac_regs->mdio_data); - - ret = xgmac_mdio_wait_idle(xgmac); - if (ret) { - pr_err("MDIO write didn't complete: %d\n", ret); - return ret; - } - - return 0; -} - -static int xgmac_set_full_duplex(struct udevice *dev) -{ - struct xgmac_priv *xgmac = dev_get_priv(dev); - - debug("%s(dev=%p):\n", __func__, dev); - - clrbits_le32(&xgmac->mac_regs->mac_extended_conf, XGMAC_MAC_EXT_CONF_HD); - - return 0; -} - -static int xgmac_set_half_duplex(struct udevice *dev) -{ - struct xgmac_priv *xgmac = dev_get_priv(dev); - - debug("%s(dev=%p):\n", __func__, dev); - - setbits_le32(&xgmac->mac_regs->mac_extended_conf, XGMAC_MAC_EXT_CONF_HD); - - /* WAR: Flush TX queue when switching to half-duplex */ - setbits_le32(&xgmac->mtl_regs->txq0_operation_mode, - XGMAC_MTL_TXQ0_OPERATION_MODE_FTQ); - - return 0; -} - -static int xgmac_set_gmii_speed(struct udevice *dev) -{ - struct xgmac_priv *xgmac = dev_get_priv(dev); - u32 val; - - debug("%s(dev=%p):\n", __func__, dev); - - val = XGMAC_MAC_CONF_SS_1G_GMII << XGMAC_MAC_CONF_SS_SHIFT; - writel(val, &xgmac->mac_regs->tx_configuration); - - return 0; -} - -static int xgmac_set_mii_speed_100(struct udevice *dev) -{ - struct xgmac_priv *xgmac = dev_get_priv(dev); - u32 val; - - debug("%s(dev=%p):\n", __func__, dev); - - val = XGMAC_MAC_CONF_SS_100M_MII << XGMAC_MAC_CONF_SS_SHIFT; - writel(val, &xgmac->mac_regs->tx_configuration); - - return 0; -} - -static int xgmac_set_mii_speed_10(struct udevice *dev) -{ - struct xgmac_priv *xgmac = dev_get_priv(dev); - u32 val; - - debug("%s(dev=%p):\n", __func__, dev); - - val = XGMAC_MAC_CONF_SS_2_10M_MII << XGMAC_MAC_CONF_SS_SHIFT; - writel(val, &xgmac->mac_regs->tx_configuration); - - return 0; -} - -static int xgmac_adjust_link(struct udevice *dev) -{ - struct xgmac_priv *xgmac = dev_get_priv(dev); - int ret; - bool en_calibration; - - debug("%s(dev=%p):\n", __func__, dev); - - if (xgmac->phy->duplex) - ret = xgmac_set_full_duplex(dev); - else - ret = xgmac_set_half_duplex(dev); - if (ret < 0) { - pr_err("xgmac_set_*_duplex() failed: %d\n", ret); - return ret; - } - - switch (xgmac->phy->speed) { - case SPEED_1000: - en_calibration = true; - ret = xgmac_set_gmii_speed(dev); - break; - case SPEED_100: - en_calibration = true; - ret = xgmac_set_mii_speed_100(dev); - break; - case SPEED_10: - en_calibration = false; - ret = xgmac_set_mii_speed_10(dev); - break; - default: - pr_err("invalid speed %d\n", xgmac->phy->speed); - return -EINVAL; - } - if (ret < 0) { - pr_err("xgmac_set_*mii_speed*() failed: %d\n", ret); - return ret; - } - - if (en_calibration) { - ret = xgmac->config->ops->xgmac_calibrate_pads(dev); - if (ret < 0) { - pr_err("xgmac_calibrate_pads() failed: %d\n", - ret); - return ret; - } - } else { - ret = xgmac->config->ops->xgmac_disable_calibration(dev); - if (ret < 0) { - pr_err("xgmac_disable_calibration() failed: %d\n", - ret); - return ret; - } - } - - return 0; -} - -static int xgmac_write_hwaddr(struct udevice *dev) -{ - struct eth_pdata *plat = dev_get_plat(dev); - struct xgmac_priv *xgmac = dev_get_priv(dev); - u32 val; - - /* - * This function may be called before start() or after stop(). At that - * time, on at least some configurations of the XGMAC HW, all clocks to - * the XGMAC HW block will be stopped, and a reset signal applied. If - * any register access is attempted in this state, bus timeouts or CPU - * hangs may occur. This check prevents that. - * - * A simple solution to this problem would be to not implement - * write_hwaddr(), since start() always writes the MAC address into HW - * anyway. However, it is desirable to implement write_hwaddr() to - * support the case of SW that runs subsequent to U-Boot which expects - * the MAC address to already be programmed into the XGMAC registers, - * which must happen irrespective of whether the U-Boot user (or - * scripts) actually made use of the XGMAC device, and hence - * irrespective of whether start() was ever called. - * - */ - if (!xgmac->config->reg_access_always_ok && !xgmac->reg_access_ok) - return 0; - - /* Update the MAC address */ - val = (plat->enetaddr[5] << 8) | - (plat->enetaddr[4]); - writel(val, &xgmac->mac_regs->address0_high); - val = (plat->enetaddr[3] << 24) | - (plat->enetaddr[2] << 16) | - (plat->enetaddr[1] << 8) | - (plat->enetaddr[0]); - writel(val, &xgmac->mac_regs->address0_low); - return 0; -} - -static int xgmac_read_rom_hwaddr(struct udevice *dev) -{ - struct eth_pdata *pdata = dev_get_plat(dev); - struct xgmac_priv *xgmac = dev_get_priv(dev); - int ret; - - ret = xgmac->config->ops->xgmac_get_enetaddr(dev); - if (ret < 0) - return ret; - - return !is_valid_ethaddr(pdata->enetaddr); -} - -static int xgmac_get_phy_addr(struct xgmac_priv *priv, struct udevice *dev) -{ - struct ofnode_phandle_args phandle_args; - int reg; - - if (dev_read_phandle_with_args(dev, "phy-handle", NULL, 0, 0, - &phandle_args)) { - debug("Failed to find phy-handle"); - return -ENODEV; - } - - priv->phy_of_node = phandle_args.node; - - reg = ofnode_read_u32_default(phandle_args.node, "reg", 0); - - return reg; -} - -static int xgmac_start(struct udevice *dev) -{ - struct xgmac_priv *xgmac = dev_get_priv(dev); - int ret, i; - u32 val, tx_fifo_sz, rx_fifo_sz, tqs, rqs, pbl; - ulong last_rx_desc; - ulong desc_pad; - - struct xgmac_desc *tx_desc = NULL; - struct xgmac_desc *rx_desc = NULL; - int addr = -1; - - debug("%s(dev=%p):\n", __func__, dev); - - xgmac->tx_desc_idx = 0; - xgmac->rx_desc_idx = 0; - - ret = xgmac->config->ops->xgmac_start_resets(dev); - if (ret < 0) { - pr_err("xgmac_start_resets() failed: %d\n", ret); - goto err; - } - - xgmac->reg_access_ok = true; - - ret = wait_for_bit_le32(&xgmac->dma_regs->mode, - XGMAC_DMA_MODE_SWR, false, - xgmac->config->swr_wait, false); - if (ret) { - pr_err("XGMAC_DMA_MODE_SWR stuck: %d\n", ret); - goto err_stop_resets; - } - - ret = xgmac->config->ops->xgmac_calibrate_pads(dev); - if (ret < 0) { - pr_err("xgmac_calibrate_pads() failed: %d\n", ret); - goto err_stop_resets; - } - - /* - * if PHY was already connected and configured, - * don't need to reconnect/reconfigure again - */ - if (!xgmac->phy) { - addr = xgmac_get_phy_addr(xgmac, dev); - xgmac->phy = phy_connect(xgmac->mii, addr, dev, - xgmac->config->interface(dev)); - if (!xgmac->phy) { - pr_err("phy_connect() failed\n"); - goto err_stop_resets; - } - - if (xgmac->max_speed) { - ret = phy_set_supported(xgmac->phy, xgmac->max_speed); - if (ret) { - pr_err("phy_set_supported() failed: %d\n", ret); - goto err_shutdown_phy; - } - } - - xgmac->phy->node = xgmac->phy_of_node; - ret = phy_config(xgmac->phy); - if (ret < 0) { - pr_err("phy_config() failed: %d\n", ret); - goto err_shutdown_phy; - } - } - - ret = phy_startup(xgmac->phy); - if (ret < 0) { - pr_err("phy_startup() failed: %d\n", ret); - goto err_shutdown_phy; - } - - if (!xgmac->phy->link) { - pr_err("No link\n"); - goto err_shutdown_phy; - } - - ret = xgmac_adjust_link(dev); - if (ret < 0) { - pr_err("xgmac_adjust_link() failed: %d\n", ret); - goto err_shutdown_phy; - } - - /* Configure MTL */ - - /* Enable Store and Forward mode for TX */ - /* Program Tx operating mode */ - setbits_le32(&xgmac->mtl_regs->txq0_operation_mode, - XGMAC_MTL_TXQ0_OPERATION_MODE_TSF | - (XGMAC_MTL_TXQ0_OPERATION_MODE_TXQEN_ENABLED << - XGMAC_MTL_TXQ0_OPERATION_MODE_TXQEN_SHIFT)); - - /* Transmit Queue weight */ - writel(0x10, &xgmac->mtl_regs->txq0_quantum_weight); - - /* Enable Store and Forward mode for RX, since no jumbo frame */ - setbits_le32(&xgmac->mtl_regs->rxq0_operation_mode, - XGMAC_MTL_RXQ0_OPERATION_MODE_RSF); - - /* Transmit/Receive queue fifo size; use all RAM for 1 queue */ - val = readl(&xgmac->mac_regs->hw_feature1); - tx_fifo_sz = (val >> XGMAC_MAC_HW_FEATURE1_TXFIFOSIZE_SHIFT) & - XGMAC_MAC_HW_FEATURE1_TXFIFOSIZE_MASK; - rx_fifo_sz = (val >> XGMAC_MAC_HW_FEATURE1_RXFIFOSIZE_SHIFT) & - XGMAC_MAC_HW_FEATURE1_RXFIFOSIZE_MASK; - - /* - * r/tx_fifo_sz is encoded as log2(n / 128). Undo that by shifting. - * r/tqs is encoded as (n / 256) - 1. - */ - tqs = (128 << tx_fifo_sz) / 256 - 1; - rqs = (128 << rx_fifo_sz) / 256 - 1; - - clrsetbits_le32(&xgmac->mtl_regs->txq0_operation_mode, - XGMAC_MTL_TXQ0_OPERATION_MODE_TQS_MASK << - XGMAC_MTL_TXQ0_OPERATION_MODE_TQS_SHIFT, - tqs << XGMAC_MTL_TXQ0_OPERATION_MODE_TQS_SHIFT); - clrsetbits_le32(&xgmac->mtl_regs->rxq0_operation_mode, - XGMAC_MTL_RXQ0_OPERATION_MODE_RQS_MASK << - XGMAC_MTL_RXQ0_OPERATION_MODE_RQS_SHIFT, - rqs << XGMAC_MTL_RXQ0_OPERATION_MODE_RQS_SHIFT); - - setbits_le32(&xgmac->mtl_regs->rxq0_operation_mode, - XGMAC_MTL_RXQ0_OPERATION_MODE_EHFC); - - /* Configure MAC */ - clrsetbits_le32(&xgmac->mac_regs->rxq_ctrl0, - XGMAC_MAC_RXQ_CTRL0_RXQ0EN_MASK << - XGMAC_MAC_RXQ_CTRL0_RXQ0EN_SHIFT, - xgmac->config->config_mac << - XGMAC_MAC_RXQ_CTRL0_RXQ0EN_SHIFT); - - /* Multicast and Broadcast Queue Enable */ - setbits_le32(&xgmac->mac_regs->rxq_ctrl1, - XGMAC_MAC_RXQ_CTRL1_MCBCQEN); - - /* enable promise mode and receive all mode */ - setbits_le32(&xgmac->mac_regs->mac_packet_filter, - XGMAC_MAC_PACKET_FILTER_RA | - XGMAC_MAC_PACKET_FILTER_PR); - - /* Set TX flow control parameters */ - /* Set Pause Time */ - setbits_le32(&xgmac->mac_regs->q0_tx_flow_ctrl, - XGMAC_MAC_Q0_TX_FLOW_CTRL_PT_MASK << - XGMAC_MAC_Q0_TX_FLOW_CTRL_PT_SHIFT); - - /* Assign priority for RX flow control */ - clrbits_le32(&xgmac->mac_regs->rxq_ctrl2, - XGMAC_MAC_RXQ_CTRL2_PSRQ0_MASK << - XGMAC_MAC_RXQ_CTRL2_PSRQ0_SHIFT); - - /* Enable flow control */ - setbits_le32(&xgmac->mac_regs->q0_tx_flow_ctrl, - XGMAC_MAC_Q0_TX_FLOW_CTRL_TFE); - setbits_le32(&xgmac->mac_regs->rx_flow_ctrl, - XGMAC_MAC_RX_FLOW_CTRL_RFE); - - clrbits_le32(&xgmac->mac_regs->tx_configuration, - XGMAC_MAC_CONF_JD); - - clrbits_le32(&xgmac->mac_regs->rx_configuration, - XGMAC_MAC_CONF_JE | - XGMAC_MAC_CONF_GPSLCE | - XGMAC_MAC_CONF_WD); - - setbits_le32(&xgmac->mac_regs->rx_configuration, - XGMAC_MAC_CONF_ACS | - XGMAC_MAC_CONF_CST); - - ret = xgmac_write_hwaddr(dev); - if (ret < 0) { - pr_err("xgmac_write_hwaddr() failed: %d\n", ret); - goto err; - } - - /* Configure DMA */ - clrsetbits_le32(&xgmac->dma_regs->sysbus_mode, - XGMAC_DMA_SYSBUS_MODE_AAL, - XGMAC_DMA_SYSBUS_MODE_EAME | - XGMAC_DMA_SYSBUS_MODE_UNDEF); - - /* Enable OSP mode */ - setbits_le32(&xgmac->dma_regs->ch0_tx_control, - XGMAC_DMA_CH0_TX_CONTROL_OSP); - - /* RX buffer size. Must be a multiple of bus width */ - clrsetbits_le32(&xgmac->dma_regs->ch0_rx_control, - XGMAC_DMA_CH0_RX_CONTROL_RBSZ_MASK << - XGMAC_DMA_CH0_RX_CONTROL_RBSZ_SHIFT, - XGMAC_MAX_PACKET_SIZE << - XGMAC_DMA_CH0_RX_CONTROL_RBSZ_SHIFT); - - desc_pad = (xgmac->desc_size - sizeof(struct xgmac_desc)) / - xgmac->config->axi_bus_width; - - setbits_le32(&xgmac->dma_regs->ch0_control, - XGMAC_DMA_CH0_CONTROL_PBLX8 | - (desc_pad << XGMAC_DMA_CH0_CONTROL_DSL_SHIFT)); - - /* - * Burst length must be < 1/2 FIFO size. - * FIFO size in tqs is encoded as (n / 256) - 1. - * Each burst is n * 8 (PBLX8) * 16 (AXI width) == 128 bytes. - * Half of n * 256 is n * 128, so pbl == tqs, modulo the -1. - */ - pbl = tqs + 1; - if (pbl > 32) - pbl = 32; - - clrsetbits_le32(&xgmac->dma_regs->ch0_tx_control, - XGMAC_DMA_CH0_TX_CONTROL_TXPBL_MASK << - XGMAC_DMA_CH0_TX_CONTROL_TXPBL_SHIFT, - pbl << XGMAC_DMA_CH0_TX_CONTROL_TXPBL_SHIFT); - - clrsetbits_le32(&xgmac->dma_regs->ch0_rx_control, - XGMAC_DMA_CH0_RX_CONTROL_RXPBL_MASK << - XGMAC_DMA_CH0_RX_CONTROL_RXPBL_SHIFT, - 8 << XGMAC_DMA_CH0_RX_CONTROL_RXPBL_SHIFT); - - /* DMA performance configuration */ - val = (XGMAC_DMA_SYSBUS_MODE_RD_OSR_LMT_MASK << - XGMAC_DMA_SYSBUS_MODE_RD_OSR_LMT_SHIFT) | - (XGMAC_DMA_SYSBUS_MODE_WR_OSR_LMT_MASK << - XGMAC_DMA_SYSBUS_MODE_WR_OSR_LMT_SHIFT) | - XGMAC_DMA_SYSBUS_MODE_EAME | - XGMAC_DMA_SYSBUS_MODE_BLEN16 | - XGMAC_DMA_SYSBUS_MODE_BLEN8 | - XGMAC_DMA_SYSBUS_MODE_BLEN4 | - XGMAC_DMA_SYSBUS_MODE_BLEN32; - - writel(val, &xgmac->dma_regs->sysbus_mode); - - /* Set up descriptors */ - - memset(xgmac->tx_descs, 0, xgmac->desc_size * XGMAC_DESCRIPTORS_TX); - memset(xgmac->rx_descs, 0, xgmac->desc_size * XGMAC_DESCRIPTORS_RX); - - for (i = 0; i < XGMAC_DESCRIPTORS_TX; i++) { - tx_desc = (struct xgmac_desc *)xgmac_get_desc(xgmac, i, false); - - xgmac->config->ops->xgmac_flush_desc(tx_desc); - } - - for (i = 0; i < XGMAC_DESCRIPTORS_RX; i++) { - rx_desc = (struct xgmac_desc *)xgmac_get_desc(xgmac, i, true); - - rx_desc->des0 = (uintptr_t)(xgmac->rx_dma_buf + - (i * XGMAC_MAX_PACKET_SIZE)); - rx_desc->des3 = XGMAC_DESC3_OWN; - /* Flush the cache to the memory */ - mb(); - xgmac->config->ops->xgmac_flush_desc(rx_desc); - xgmac->config->ops->xgmac_inval_buffer(xgmac->rx_dma_buf + - (i * XGMAC_MAX_PACKET_SIZE), - XGMAC_MAX_PACKET_SIZE); - } - - writel(0, &xgmac->dma_regs->ch0_txdesc_list_haddress); - writel((ulong)xgmac_get_desc(xgmac, 0, false), - &xgmac->dma_regs->ch0_txdesc_list_address); - writel(XGMAC_DESCRIPTORS_TX - 1, - &xgmac->dma_regs->ch0_txdesc_ring_length); - writel(0, &xgmac->dma_regs->ch0_rxdesc_list_haddress); - writel((ulong)xgmac_get_desc(xgmac, 0, true), - &xgmac->dma_regs->ch0_rxdesc_list_address); - writel(XGMAC_DESCRIPTORS_RX - 1, - &xgmac->dma_regs->ch0_rxdesc_ring_length); - - /* Enable everything */ - setbits_le32(&xgmac->dma_regs->ch0_tx_control, - XGMAC_DMA_CH0_TX_CONTROL_ST); - setbits_le32(&xgmac->dma_regs->ch0_rx_control, - XGMAC_DMA_CH0_RX_CONTROL_SR); - setbits_le32(&xgmac->mac_regs->tx_configuration, - XGMAC_MAC_CONF_TE); - setbits_le32(&xgmac->mac_regs->rx_configuration, - XGMAC_MAC_CONF_RE); - - /* TX tail pointer not written until we need to TX a packet */ - /* - * Point RX tail pointer at last descriptor. Ideally, we'd point at the - * first descriptor, implying all descriptors were available. However, - * that's not distinguishable from none of the descriptors being - * available. - */ - last_rx_desc = (ulong)xgmac_get_desc(xgmac, XGMAC_DESCRIPTORS_RX - 1, true); - writel(last_rx_desc, &xgmac->dma_regs->ch0_rxdesc_tail_pointer); - - xgmac->started = true; - - debug("%s: OK\n", __func__); - return 0; - -err_shutdown_phy: - phy_shutdown(xgmac->phy); -err_stop_resets: - xgmac->config->ops->xgmac_stop_resets(dev); -err: - pr_err("FAILED: %d\n", ret); - return ret; -} - -static void xgmac_stop(struct udevice *dev) -{ - struct xgmac_priv *xgmac = dev_get_priv(dev); - unsigned long start_time; - u32 val; - u32 trcsts; - u32 txqsts; - u32 prxq; - u32 rxqsts; - - debug("%s(dev=%p):\n", __func__, dev); - - if (!xgmac->started) - return; - xgmac->started = false; - xgmac->reg_access_ok = false; - - /* Disable TX DMA */ - clrbits_le32(&xgmac->dma_regs->ch0_tx_control, - XGMAC_DMA_CH0_TX_CONTROL_ST); - - /* Wait for TX all packets to drain out of MTL */ - start_time = get_timer(0); - - while (get_timer(start_time) < XGMAC_TIMEOUT_100MS) { - val = readl(&xgmac->mtl_regs->txq0_debug); - - trcsts = (val >> XGMAC_MTL_TXQ0_DEBUG_TRCSTS_SHIFT) & - XGMAC_MTL_TXQ0_DEBUG_TRCSTS_MASK; - - txqsts = val & XGMAC_MTL_TXQ0_DEBUG_TXQSTS; - - if (trcsts != XGMAC_MTL_TXQ0_DEBUG_TRCSTS_READ_STATE && !txqsts) - break; - } - - /* Turn off MAC TX and RX */ - clrbits_le32(&xgmac->mac_regs->tx_configuration, - XGMAC_MAC_CONF_RE); - clrbits_le32(&xgmac->mac_regs->rx_configuration, - XGMAC_MAC_CONF_RE); - - /* Wait for all RX packets to drain out of MTL */ - start_time = get_timer(0); - - while (get_timer(start_time) < XGMAC_TIMEOUT_100MS) { - val = readl(&xgmac->mtl_regs->rxq0_debug); - - prxq = (val >> XGMAC_MTL_RXQ0_DEBUG_PRXQ_SHIFT) & - XGMAC_MTL_RXQ0_DEBUG_PRXQ_MASK; - - rxqsts = (val >> XGMAC_MTL_RXQ0_DEBUG_RXQSTS_SHIFT) & - XGMAC_MTL_RXQ0_DEBUG_RXQSTS_MASK; - - if (!prxq && !rxqsts) - break; - } - - /* Turn off RX DMA */ - clrbits_le32(&xgmac->dma_regs->ch0_rx_control, - XGMAC_DMA_CH0_RX_CONTROL_SR); - - if (xgmac->phy) - phy_shutdown(xgmac->phy); - - xgmac->config->ops->xgmac_stop_resets(dev); - - debug("%s: OK\n", __func__); -} - -static int xgmac_send(struct udevice *dev, void *packet, int length) -{ - struct xgmac_priv *xgmac = dev_get_priv(dev); - struct xgmac_desc *tx_desc; - unsigned long start_time; - - debug("%s(dev=%p, packet=%p, length=%d):\n", __func__, dev, packet, - length); - - memcpy(xgmac->tx_dma_buf, packet, length); - xgmac->config->ops->xgmac_flush_buffer(xgmac->tx_dma_buf, length); - - tx_desc = xgmac_get_desc(xgmac, xgmac->tx_desc_idx, false); - xgmac->tx_desc_idx++; - xgmac->tx_desc_idx %= XGMAC_DESCRIPTORS_TX; - - tx_desc->des0 = (ulong)xgmac->tx_dma_buf; - tx_desc->des1 = 0; - tx_desc->des2 = length; - /* - * Make sure that if HW sees the _OWN write below, it will see all the - * writes to the rest of the descriptor too. - */ - mb(); - tx_desc->des3 = XGMAC_DESC3_OWN | XGMAC_DESC3_FD | XGMAC_DESC3_LD | length; - xgmac->config->ops->xgmac_flush_desc(tx_desc); - - writel((ulong)xgmac_get_desc(xgmac, xgmac->tx_desc_idx, false), - &xgmac->dma_regs->ch0_txdesc_tail_pointer); - - start_time = get_timer(0); - - while (get_timer(start_time) < XGMAC_TIMEOUT_100MS) { - xgmac->config->ops->xgmac_inval_desc(tx_desc); - if (!(readl(&tx_desc->des3) & XGMAC_DESC3_OWN)) - return 0; - } - debug("%s: TX timeout\n", __func__); - - return -ETIMEDOUT; -} - -static int xgmac_recv(struct udevice *dev, int flags, uchar **packetp) -{ - struct xgmac_priv *xgmac = dev_get_priv(dev); - struct xgmac_desc *rx_desc; - int length; - - debug("%s(dev=%p, flags=0x%x):\n", __func__, dev, flags); - - rx_desc = xgmac_get_desc(xgmac, xgmac->rx_desc_idx, true); - xgmac->config->ops->xgmac_inval_desc(rx_desc); - if (rx_desc->des3 & XGMAC_DESC3_OWN) { - debug("%s: RX packet not available\n", __func__); - return -EAGAIN; - } - - *packetp = xgmac->rx_dma_buf + - (xgmac->rx_desc_idx * XGMAC_MAX_PACKET_SIZE); - length = rx_desc->des3 & XGMAC_RDES3_PKT_LENGTH_MASK; - debug("%s: *packetp=%p, length=%d\n", __func__, *packetp, length); - - xgmac->config->ops->xgmac_inval_buffer(*packetp, length); - - return length; -} - -static int xgmac_free_pkt(struct udevice *dev, uchar *packet, int length) -{ - struct xgmac_priv *xgmac = dev_get_priv(dev); - u32 idx, idx_mask = xgmac->desc_per_cacheline - 1; - uchar *packet_expected; - struct xgmac_desc *rx_desc; - - debug("%s(packet=%p, length=%d)\n", __func__, packet, length); - - packet_expected = xgmac->rx_dma_buf + - (xgmac->rx_desc_idx * XGMAC_MAX_PACKET_SIZE); - if (packet != packet_expected) { - debug("%s: Unexpected packet (expected %p)\n", __func__, - packet_expected); - return -EINVAL; - } - - xgmac->config->ops->xgmac_inval_buffer(packet, length); - - if ((xgmac->rx_desc_idx & idx_mask) == idx_mask) { - for (idx = xgmac->rx_desc_idx - idx_mask; - idx <= xgmac->rx_desc_idx; - idx++) { - rx_desc = xgmac_get_desc(xgmac, idx, true); - rx_desc->des0 = 0; - /* Flush the cache to the memory */ - mb(); - xgmac->config->ops->xgmac_flush_desc(rx_desc); - xgmac->config->ops->xgmac_inval_buffer(packet, length); - rx_desc->des0 = (u32)(ulong)(xgmac->rx_dma_buf + - (idx * XGMAC_MAX_PACKET_SIZE)); - rx_desc->des1 = 0; - rx_desc->des2 = 0; - /* - * Make sure that if HW sees the _OWN write below, - * it will see all the writes to the rest of the - * descriptor too. - */ - mb(); - rx_desc->des3 = XGMAC_DESC3_OWN; - xgmac->config->ops->xgmac_flush_desc(rx_desc); - } - writel((ulong)rx_desc, &xgmac->dma_regs->ch0_rxdesc_tail_pointer); - } - - xgmac->rx_desc_idx++; - xgmac->rx_desc_idx %= XGMAC_DESCRIPTORS_RX; - - return 0; -} - -static int xgmac_probe_resources_core(struct udevice *dev) -{ - struct xgmac_priv *xgmac = dev_get_priv(dev); - unsigned int desc_step; - int ret; - - debug("%s(dev=%p):\n", __func__, dev); - - /* Maximum distance between neighboring descriptors, in Bytes. */ - desc_step = sizeof(struct xgmac_desc); - - if (desc_step < ARCH_DMA_MINALIGN) { - /* - * The hardware implementation cannot place one descriptor - * per cacheline, it is necessary to place multiple descriptors - * per cacheline in memory and do cache management carefully. - */ - xgmac->desc_size = BIT(fls(desc_step) - 1); - } else { - xgmac->desc_size = ALIGN(sizeof(struct xgmac_desc), - (unsigned int)ARCH_DMA_MINALIGN); - } - xgmac->desc_per_cacheline = ARCH_DMA_MINALIGN / xgmac->desc_size; - - xgmac->tx_descs = xgmac_alloc_descs(xgmac, XGMAC_DESCRIPTORS_TX); - if (!xgmac->tx_descs) { - debug("%s: xgmac_alloc_descs(tx) failed\n", __func__); - ret = -ENOMEM; - goto err; - } - - xgmac->rx_descs = xgmac_alloc_descs(xgmac, XGMAC_DESCRIPTORS_RX); - if (!xgmac->rx_descs) { - debug("%s: xgmac_alloc_descs(rx) failed\n", __func__); - ret = -ENOMEM; - goto err_free_tx_descs; - } - - xgmac->tx_dma_buf = memalign(XGMAC_BUFFER_ALIGN, XGMAC_MAX_PACKET_SIZE); - if (!xgmac->tx_dma_buf) { - debug("%s: memalign(tx_dma_buf) failed\n", __func__); - ret = -ENOMEM; - goto err_free_descs; - } - debug("%s: tx_dma_buf=%p\n", __func__, xgmac->tx_dma_buf); - - xgmac->rx_dma_buf = memalign(XGMAC_BUFFER_ALIGN, XGMAC_RX_BUFFER_SIZE); - if (!xgmac->rx_dma_buf) { - debug("%s: memalign(rx_dma_buf) failed\n", __func__); - ret = -ENOMEM; - goto err_free_tx_dma_buf; - } - debug("%s: rx_dma_buf=%p\n", __func__, xgmac->rx_dma_buf); - - xgmac->rx_pkt = malloc(XGMAC_MAX_PACKET_SIZE); - if (!xgmac->rx_pkt) { - debug("%s: malloc(rx_pkt) failed\n", __func__); - ret = -ENOMEM; - goto err_free_rx_dma_buf; - } - debug("%s: rx_pkt=%p\n", __func__, xgmac->rx_pkt); - - xgmac->config->ops->xgmac_inval_buffer(xgmac->rx_dma_buf, - XGMAC_MAX_PACKET_SIZE * XGMAC_DESCRIPTORS_RX); - - debug("%s: OK\n", __func__); - return 0; - -err_free_rx_dma_buf: - free(xgmac->rx_dma_buf); -err_free_tx_dma_buf: - free(xgmac->tx_dma_buf); -err_free_descs: - xgmac_free_descs(xgmac->rx_descs); -err_free_tx_descs: - xgmac_free_descs(xgmac->tx_descs); -err: - - debug("%s: returns %d\n", __func__, ret); - return ret; -} - -static int xgmac_remove_resources_core(struct udevice *dev) -{ - struct xgmac_priv *xgmac = dev_get_priv(dev); - - debug("%s(dev=%p):\n", __func__, dev); - - free(xgmac->rx_pkt); - free(xgmac->rx_dma_buf); - free(xgmac->tx_dma_buf); - xgmac_free_descs(xgmac->rx_descs); - xgmac_free_descs(xgmac->tx_descs); - - debug("%s: OK\n", __func__); - return 0; -} - -/* board-specific Ethernet Interface initializations. */ -__weak int board_interface_eth_init(struct udevice *dev, - phy_interface_t interface_type) -{ - return 0; -} - -static int xgmac_probe(struct udevice *dev) -{ - struct xgmac_priv *xgmac = dev_get_priv(dev); - int ret; - - debug("%s(dev=%p):\n", __func__, dev); - - xgmac->dev = dev; - xgmac->config = (void *)dev_get_driver_data(dev); - - xgmac->regs = dev_read_addr(dev); - if (xgmac->regs == FDT_ADDR_T_NONE) { - pr_err("dev_read_addr() failed\n"); - return -ENODEV; - } - xgmac->mac_regs = (void *)(xgmac->regs + XGMAC_MAC_REGS_BASE); - xgmac->mtl_regs = (void *)(xgmac->regs + XGMAC_MTL_REGS_BASE); - xgmac->dma_regs = (void *)(xgmac->regs + XGMAC_DMA_REGS_BASE); - - xgmac->max_speed = dev_read_u32_default(dev, "max-speed", 0); - - ret = xgmac_probe_resources_core(dev); - if (ret < 0) { - pr_err("xgmac_probe_resources_core() failed: %d\n", ret); - return ret; - } - - ret = xgmac->config->ops->xgmac_probe_resources(dev); - if (ret < 0) { - pr_err("xgmac_probe_resources() failed: %d\n", ret); - goto err_remove_resources_core; - } - - ret = xgmac->config->ops->xgmac_start_clks(dev); - if (ret < 0) { - pr_err("xgmac_start_clks() failed: %d\n", ret); - return ret; - } - - if (IS_ENABLED(CONFIG_DM_ETH_PHY)) - xgmac->mii = eth_phy_get_mdio_bus(dev); - - if (!xgmac->mii) { - xgmac->mii = mdio_alloc(); - if (!xgmac->mii) { - pr_err("mdio_alloc() failed\n"); - ret = -ENOMEM; - goto err_stop_clks; - } - xgmac->mii->read = xgmac_mdio_read; - xgmac->mii->write = xgmac_mdio_write; - xgmac->mii->priv = xgmac; - strcpy(xgmac->mii->name, dev->name); - - ret = mdio_register(xgmac->mii); - if (ret < 0) { - pr_err("mdio_register() failed: %d\n", ret); - goto err_free_mdio; - } - } - - if (IS_ENABLED(CONFIG_DM_ETH_PHY)) - eth_phy_set_mdio_bus(dev, xgmac->mii); - - debug("%s: OK\n", __func__); - return 0; - -err_free_mdio: - mdio_free(xgmac->mii); -err_stop_clks: - xgmac->config->ops->xgmac_stop_clks(dev); -err_remove_resources_core: - xgmac_remove_resources_core(dev); - - debug("%s: returns %d\n", __func__, ret); - return ret; -} - -static int xgmac_remove(struct udevice *dev) -{ - struct xgmac_priv *xgmac = dev_get_priv(dev); - - debug("%s(dev=%p):\n", __func__, dev); - - mdio_unregister(xgmac->mii); - mdio_free(xgmac->mii); - xgmac->config->ops->xgmac_stop_clks(dev); - xgmac->config->ops->xgmac_remove_resources(dev); - - xgmac_remove_resources_core(dev); - - debug("%s: OK\n", __func__); - return 0; -} - -int xgmac_null_ops(struct udevice *dev) -{ - return 0; -} - -static const struct eth_ops xgmac_ops = { - .start = xgmac_start, - .stop = xgmac_stop, - .send = xgmac_send, - .recv = xgmac_recv, - .free_pkt = xgmac_free_pkt, - .write_hwaddr = xgmac_write_hwaddr, - .read_rom_hwaddr = xgmac_read_rom_hwaddr, -}; - -static const struct udevice_id xgmac_ids[] = { - { - .compatible = "intel,socfpga-dwxgmac", - .data = (ulong)&xgmac_socfpga_config - }, - { } -}; - -U_BOOT_DRIVER(eth_xgmac) = { - .name = "eth_xgmac", - .id = UCLASS_ETH, - .of_match = of_match_ptr(xgmac_ids), - .probe = xgmac_probe, - .remove = xgmac_remove, - .ops = &xgmac_ops, - .priv_auto = sizeof(struct xgmac_priv), - .plat_auto = sizeof(struct eth_pdata), -}; diff --git a/drivers/net/dwc_eth_xgmac.h b/drivers/net/dwc_eth_xgmac.h deleted file mode 100644 index 259f815f3f2..00000000000 --- a/drivers/net/dwc_eth_xgmac.h +++ /dev/null @@ -1,298 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright 2023 Intel Coporation. - */ - -#include -#include - -/* Core registers */ - -#define XGMAC_MAC_REGS_BASE 0x000 - -struct xgmac_mac_regs { - u32 tx_configuration; /* 0x000 */ - u32 rx_configuration; /* 0x004 */ - u32 mac_packet_filter; /* 0x008 */ - u32 unused_00c[(0x070 - 0x00c) / 4]; /* 0x00c */ - u32 q0_tx_flow_ctrl; /* 0x070 */ - u32 unused_070[(0x090 - 0x074) / 4]; /* 0x074 */ - u32 rx_flow_ctrl; /* 0x090 */ - u32 unused_094[(0x0a0 - 0x094) / 4]; /* 0x094 */ - u32 rxq_ctrl0; /* 0x0a0 */ - u32 rxq_ctrl1; /* 0x0a4 */ - u32 rxq_ctrl2; /* 0x0a8 */ - u32 unused_0ac[(0x0dc - 0x0ac) / 4]; /* 0x0ac */ - u32 us_tic_counter; /* 0x0dc */ - u32 unused_0e0[(0x11c - 0x0e0) / 4]; /* 0x0e0 */ - u32 hw_feature0; /* 0x11c */ - u32 hw_feature1; /* 0x120 */ - u32 hw_feature2; /* 0x124 */ - u32 hw_feature3; /* 0x128 */ - u32 hw_feature4; /* 0x12c */ - u32 unused_130[(0x140 - 0x130) / 4]; /* 0x130 */ - u32 mac_extended_conf; /* 0x140 */ - u32 unused_144[(0x200 - 0x144) / 4]; /* 0x144 */ - u32 mdio_address; /* 0x200 */ - u32 mdio_data; /* 0x204 */ - u32 mdio_cont_write_addr; /* 0x208 */ - u32 mdio_cont_write_data; /* 0x20c */ - u32 mdio_cont_scan_port_enable; /* 0x210 */ - u32 mdio_intr_status; /* 0x214 */ - u32 mdio_intr_enable; /* 0x218 */ - u32 mdio_port_cnct_dsnct_status; /* 0x21c */ - u32 mdio_clause_22_port; /* 0x220 */ - u32 unused_224[(0x300 - 0x224) / 4]; /* 0x224 */ - u32 address0_high; /* 0x300 */ - u32 address0_low; /* 0x304 */ -}; - -#define XGMAC_TIMEOUT_100MS 100000 -#define XGMAC_MAC_CONF_SS_SHIFT 29 -#define XGMAC_MAC_CONF_SS_10G_XGMII 0 -#define XGMAC_MAC_CONF_SS_2_5G_GMII 2 -#define XGMAC_MAC_CONF_SS_1G_GMII 3 -#define XGMAC_MAC_CONF_SS_100M_MII 4 -#define XGMAC_MAC_CONF_SS_5G_XGMII 5 -#define XGMAC_MAC_CONF_SS_2_5G_XGMII 6 -#define XGMAC_MAC_CONF_SS_2_10M_MII 7 - -#define XGMAC_MAC_CONF_JD BIT(16) -#define XGMAC_MAC_CONF_JE BIT(8) -#define XGMAC_MAC_CONF_WD BIT(7) -#define XGMAC_MAC_CONF_GPSLCE BIT(6) -#define XGMAC_MAC_CONF_CST BIT(2) -#define XGMAC_MAC_CONF_ACS BIT(1) -#define XGMAC_MAC_CONF_TE BIT(0) -#define XGMAC_MAC_CONF_RE BIT(0) - -#define XGMAC_MAC_EXT_CONF_HD BIT(24) - -#define XGMAC_MAC_PACKET_FILTER_RA BIT(31) -#define XGMAC_MAC_PACKET_FILTER_PR BIT(0) - -#define XGMAC_MAC_Q0_TX_FLOW_CTRL_PT_SHIFT 16 -#define XGMAC_MAC_Q0_TX_FLOW_CTRL_PT_MASK GENMASK(15, 0) -#define XGMAC_MAC_Q0_TX_FLOW_CTRL_TFE BIT(1) - -#define XGMAC_MAC_RX_FLOW_CTRL_RFE BIT(0) -#define XGMAC_MAC_RXQ_CTRL0_RXQ0EN_SHIFT 0 -#define XGMAC_MAC_RXQ_CTRL0_RXQ0EN_MASK GENMASK(1, 0) -#define XGMAC_MAC_RXQ_CTRL0_RXQ0EN_NOT_ENABLED 0 -#define XGMAC_MAC_RXQ_CTRL0_RXQ0EN_ENABLED_DCB 2 -#define XGMAC_MAC_RXQ_CTRL0_RXQ0EN_ENABLED_AV 1 - -#define XGMAC_MAC_RXQ_CTRL1_MCBCQEN BIT(15) - -#define XGMAC_MAC_RXQ_CTRL2_PSRQ0_SHIFT 0 -#define XGMAC_MAC_RXQ_CTRL2_PSRQ0_MASK GENMASK(7, 0) - -#define XGMAC_MAC_HW_FEATURE1_TXFIFOSIZE_SHIFT 6 -#define XGMAC_MAC_HW_FEATURE1_TXFIFOSIZE_MASK GENMASK(4, 0) -#define XGMAC_MAC_HW_FEATURE1_RXFIFOSIZE_SHIFT 0 -#define XGMAC_MAC_HW_FEATURE1_RXFIFOSIZE_MASK GENMASK(4, 0) - -#define XGMAC_MDIO_SINGLE_CMD_SHIFT 16 -#define XGMAC_MDIO_SINGLE_CMD_ADDR_CMD_READ 3 << XGMAC_MDIO_SINGLE_CMD_SHIFT -#define XGMAC_MDIO_SINGLE_CMD_ADDR_CMD_WRITE BIT(16) -#define XGMAC_MAC_MDIO_ADDRESS_PA_SHIFT 16 -#define XGMAC_MAC_MDIO_ADDRESS_PA_MASK GENMASK(15, 0) -#define XGMAC_MAC_MDIO_ADDRESS_DA_SHIFT 21 -#define XGMAC_MAC_MDIO_ADDRESS_CR_SHIFT 19 -#define XGMAC_MAC_MDIO_ADDRESS_CR_100_150 0 -#define XGMAC_MAC_MDIO_ADDRESS_CR_150_250 1 -#define XGMAC_MAC_MDIO_ADDRESS_CR_250_300 2 -#define XGMAC_MAC_MDIO_ADDRESS_CR_300_350 3 -#define XGMAC_MAC_MDIO_ADDRESS_CR_350_400 4 -#define XGMAC_MAC_MDIO_ADDRESS_CR_400_500 5 -#define XGMAC_MAC_MDIO_ADDRESS_SADDR BIT(18) -#define XGMAC_MAC_MDIO_ADDRESS_SBUSY BIT(22) -#define XGMAC_MAC_MDIO_REG_ADDR_C22P_MASK GENMASK(4, 0) -#define XGMAC_MAC_MDIO_DATA_GD_MASK GENMASK(15, 0) - -/* MTL Registers */ - -#define XGMAC_MTL_REGS_BASE 0x1000 - -struct xgmac_mtl_regs { - u32 mtl_operation_mode; /* 0x1000 */ - u32 unused_1004[(0x1030 - 0x1004) / 4]; /* 0x1004 */ - u32 mtl_rxq_dma_map0; /* 0x1030 */ - u32 mtl_rxq_dma_map1; /* 0x1034 */ - u32 mtl_rxq_dma_map2; /* 0x1038 */ - u32 mtl_rxq_dma_map3; /* 0x103c */ - u32 mtl_tc_prty_map0; /* 0x1040 */ - u32 mtl_tc_prty_map1; /* 0x1044 */ - u32 unused_1048[(0x1100 - 0x1048) / 4]; /* 0x1048 */ - u32 txq0_operation_mode; /* 0x1100 */ - u32 unused_1104; /* 0x1104 */ - u32 txq0_debug; /* 0x1108 */ - u32 unused_100c[(0x1118 - 0x110c) / 4]; /* 0x110c */ - u32 txq0_quantum_weight; /* 0x1118 */ - u32 unused_111c[(0x1140 - 0x111c) / 4]; /* 0x111c */ - u32 rxq0_operation_mode; /* 0x1140 */ - u32 unused_1144; /* 0x1144 */ - u32 rxq0_debug; /* 0x1148 */ -}; - -#define XGMAC_MTL_TXQ0_OPERATION_MODE_TQS_SHIFT 16 -#define XGMAC_MTL_TXQ0_OPERATION_MODE_TQS_MASK GENMASK(8, 0) -#define XGMAC_MTL_TXQ0_OPERATION_MODE_TXQEN_SHIFT 2 -#define XGMAC_MTL_TXQ0_OPERATION_MODE_TXQEN_ENABLED 2 -#define XGMAC_MTL_TXQ0_OPERATION_MODE_TSF BIT(1) -#define XGMAC_MTL_TXQ0_OPERATION_MODE_FTQ BIT(0) - -#define XGMAC_MTL_TXQ0_DEBUG_TXQSTS BIT(4) -#define XGMAC_MTL_TXQ0_DEBUG_TRCSTS_SHIFT 1 -#define XGMAC_MTL_TXQ0_DEBUG_TRCSTS_MASK GENMASK(2, 0) -#define XGMAC_MTL_TXQ0_DEBUG_TRCSTS_READ_STATE 0x1 - -#define XGMAC_MTL_RXQ0_OPERATION_MODE_RQS_SHIFT 16 -#define XGMAC_MTL_RXQ0_OPERATION_MODE_RQS_MASK GENMASK(9, 0) -#define XGMAC_MTL_RXQ0_OPERATION_MODE_EHFC BIT(7) -#define XGMAC_MTL_RXQ0_OPERATION_MODE_RSF BIT(5) - -#define XGMAC_MTL_RXQ0_DEBUG_PRXQ_SHIFT 16 -#define XGMAC_MTL_RXQ0_DEBUG_PRXQ_MASK GENMASK(14, 0) -#define XGMAC_MTL_RXQ0_DEBUG_RXQSTS_SHIFT 4 -#define XGMAC_MTL_RXQ0_DEBUG_RXQSTS_MASK GENMASK(1, 0) - -/* DMA Registers */ - -#define XGMAC_DMA_REGS_BASE 0x3000 - -struct xgmac_dma_regs { - u32 mode; /* 0x3000 */ - u32 sysbus_mode; /* 0x3004 */ - u32 unused_3008[(0x3100 - 0x3008) / 4]; /* 0x3008 */ - u32 ch0_control; /* 0x3100 */ - u32 ch0_tx_control; /* 0x3104 */ - u32 ch0_rx_control; /* 0x3108 */ - u32 slot_func_control_status; /* 0x310c */ - u32 ch0_txdesc_list_haddress; /* 0x3110 */ - u32 ch0_txdesc_list_address; /* 0x3114 */ - u32 ch0_rxdesc_list_haddress; /* 0x3118 */ - u32 ch0_rxdesc_list_address; /* 0x311c */ - u32 unused_3120; /* 0x3120 */ - u32 ch0_txdesc_tail_pointer; /* 0x3124 */ - u32 unused_3128; /* 0x3128 */ - u32 ch0_rxdesc_tail_pointer; /* 0x312c */ - u32 ch0_txdesc_ring_length; /* 0x3130 */ - u32 ch0_rxdesc_ring_length; /* 0x3134 */ - u32 unused_3138[(0x3160 - 0x3138) / 4]; /* 0x3138 */ - u32 ch0_status; /* 0x3160 */ -}; - -#define XGMAC_DMA_MODE_SWR BIT(0) -#define XGMAC_DMA_SYSBUS_MODE_WR_OSR_LMT_SHIFT 24 -#define XGMAC_DMA_SYSBUS_MODE_WR_OSR_LMT_MASK GENMASK(4, 0) -#define XGMAC_DMA_SYSBUS_MODE_RD_OSR_LMT_SHIFT 16 -#define XGMAC_DMA_SYSBUS_MODE_RD_OSR_LMT_MASK GENMASK(4, 0) -#define XGMAC_DMA_SYSBUS_MODE_AAL BIT(12) -#define XGMAC_DMA_SYSBUS_MODE_EAME BIT(11) -#define XGMAC_DMA_SYSBUS_MODE_BLEN32 BIT(4) -#define XGMAC_DMA_SYSBUS_MODE_BLEN16 BIT(3) -#define XGMAC_DMA_SYSBUS_MODE_BLEN8 BIT(2) -#define XGMAC_DMA_SYSBUS_MODE_BLEN4 BIT(1) -#define XGMAC_DMA_SYSBUS_MODE_UNDEF BIT(0) - -#define XGMAC_DMA_CH0_CONTROL_DSL_SHIFT 18 -#define XGMAC_DMA_CH0_CONTROL_PBLX8 BIT(16) - -#define XGMAC_DMA_CH0_TX_CONTROL_TXPBL_SHIFT 16 -#define XGMAC_DMA_CH0_TX_CONTROL_TXPBL_MASK GENMASK(5, 0) -#define XGMAC_DMA_CH0_TX_CONTROL_OSP BIT(4) -#define XGMAC_DMA_CH0_TX_CONTROL_ST BIT(0) - -#define XGMAC_DMA_CH0_RX_CONTROL_RXPBL_SHIFT 16 -#define XGMAC_DMA_CH0_RX_CONTROL_RXPBL_MASK GENMASK(5, 0) -#define XGMAC_DMA_CH0_RX_CONTROL_RBSZ_SHIFT 4 -#define XGMAC_DMA_CH0_RX_CONTROL_RBSZ_MASK GENMASK(10, 0) -#define XGMAC_DMA_CH0_RX_CONTROL_SR BIT(0) - -/* Descriptors */ -#define XGMAC_DESCRIPTORS_TX 8 -#define XGMAC_DESCRIPTORS_RX 8 -#define XGMAC_BUFFER_ALIGN ARCH_DMA_MINALIGN -#define XGMAC_MAX_PACKET_SIZE ALIGN(1568, ARCH_DMA_MINALIGN) -#define XGMAC_RX_BUFFER_SIZE (XGMAC_DESCRIPTORS_RX * XGMAC_MAX_PACKET_SIZE) - -#define XGMAC_RDES3_PKT_LENGTH_MASK GENMASK(13, 0) - -struct xgmac_desc { - u32 des0; - u32 des1; - u32 des2; - u32 des3; -}; - -#define XGMAC_DESC3_OWN BIT(31) -#define XGMAC_DESC3_FD BIT(29) -#define XGMAC_DESC3_LD BIT(28) - -#define XGMAC_AXI_WIDTH_32 4 -#define XGMAC_AXI_WIDTH_64 8 -#define XGMAC_AXI_WIDTH_128 16 - -struct xgmac_config { - bool reg_access_always_ok; - int swr_wait; - int config_mac; - int config_mac_mdio; - unsigned int axi_bus_width; - phy_interface_t (*interface)(const struct udevice *dev); - struct xgmac_ops *ops; -}; - -struct xgmac_ops { - void (*xgmac_inval_desc)(void *desc); - void (*xgmac_flush_desc)(void *desc); - void (*xgmac_inval_buffer)(void *buf, size_t size); - void (*xgmac_flush_buffer)(void *buf, size_t size); - int (*xgmac_probe_resources)(struct udevice *dev); - int (*xgmac_remove_resources)(struct udevice *dev); - int (*xgmac_stop_resets)(struct udevice *dev); - int (*xgmac_start_resets)(struct udevice *dev); - int (*xgmac_stop_clks)(struct udevice *dev); - int (*xgmac_start_clks)(struct udevice *dev); - int (*xgmac_calibrate_pads)(struct udevice *dev); - int (*xgmac_disable_calibration)(struct udevice *dev); - int (*xgmac_get_enetaddr)(struct udevice *dev); -}; - -struct xgmac_priv { - struct udevice *dev; - const struct xgmac_config *config; - fdt_addr_t regs; - struct xgmac_mac_regs *mac_regs; - struct xgmac_mtl_regs *mtl_regs; - struct xgmac_dma_regs *dma_regs; - struct reset_ctl reset_ctl; - struct reset_ctl_bulk reset_bulk; - struct clk clk_common; - struct mii_dev *mii; - struct phy_device *phy; - ofnode phy_of_node; - void *syscon_phy; - u32 syscon_phy_regshift; - u32 max_speed; - void *tx_descs; - void *rx_descs; - int tx_desc_idx, rx_desc_idx; - unsigned int desc_size; - unsigned int desc_per_cacheline; - void *tx_dma_buf; - void *rx_dma_buf; - void *rx_pkt; - bool started; - bool reg_access_ok; - bool clk_ck_enabled; -}; - -void xgmac_inval_desc_generic(void *desc); -void xgmac_flush_desc_generic(void *desc); -void xgmac_inval_buffer_generic(void *buf, size_t size); -void xgmac_flush_buffer_generic(void *buf, size_t size); -int xgmac_null_ops(struct udevice *dev); - -extern struct xgmac_config xgmac_socfpga_config; diff --git a/drivers/net/dwc_eth_xgmac_socfpga.c b/drivers/net/dwc_eth_xgmac_socfpga.c deleted file mode 100644 index 270c1b0ca6c..00000000000 --- a/drivers/net/dwc_eth_xgmac_socfpga.c +++ /dev/null @@ -1,226 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Copyright (c) 2023, Intel Corporation - */ -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include "dwc_eth_xgmac.h" - -#define SOCFPGA_XGMAC_SYSCON_ARG_COUNT 2 - -static int dwxgmac_socfpga_do_setphy(struct udevice *dev, u32 modereg) -{ - struct xgmac_priv *xgmac = dev_get_priv(dev); - int ret; - - u32 modemask = SYSMGR_EMACGRP_CTRL_PHYSEL_MASK << - xgmac->syscon_phy_regshift; - - if (!(IS_ENABLED(CONFIG_SPL_BUILD)) && IS_ENABLED(CONFIG_SPL_ATF)) { - u32 index = ((u64)xgmac->syscon_phy - socfpga_get_sysmgr_addr() - - SYSMGR_SOC64_EMAC0) >> 2; - - u32 id = SOCFPGA_SECURE_REG_SYSMGR_SOC64_EMAC0 + index; - - ret = socfpga_secure_reg_update32(id, - modemask, - modereg << - xgmac->syscon_phy_regshift); - if (ret) { - dev_err(dev, "Failed to set PHY register via SMC call\n"); - return ret; - } - - } else { - clrsetbits_le32(xgmac->phy, modemask, modereg); - } - - return 0; -} - -static int xgmac_probe_resources_socfpga(struct udevice *dev) -{ - struct xgmac_priv *xgmac = dev_get_priv(dev); - struct regmap *reg_map; - struct ofnode_phandle_args args; - void *range; - phy_interface_t interface; - int ret; - u32 modereg; - - interface = xgmac->config->interface(dev); - - switch (interface) { - case PHY_INTERFACE_MODE_MII: - case PHY_INTERFACE_MODE_GMII: - modereg = SYSMGR_EMACGRP_CTRL_PHYSEL_ENUM_GMII_MII; - break; - case PHY_INTERFACE_MODE_RMII: - modereg = SYSMGR_EMACGRP_CTRL_PHYSEL_ENUM_RMII; - break; - case PHY_INTERFACE_MODE_RGMII: - modereg = SYSMGR_EMACGRP_CTRL_PHYSEL_ENUM_RGMII; - break; - default: - dev_err(dev, "Unsupported PHY mode\n"); - return -EINVAL; - } - - /* Get PHY syscon */ - ret = dev_read_phandle_with_args(dev, "altr,sysmgr-syscon", NULL, - SOCFPGA_XGMAC_SYSCON_ARG_COUNT, - 0, &args); - - if (ret) { - dev_err(dev, "Failed to get syscon: %d\n", ret); - return ret; - } - - if (args.args_count != SOCFPGA_XGMAC_SYSCON_ARG_COUNT) { - dev_err(dev, "Invalid number of syscon args\n"); - return -EINVAL; - } - - reg_map = syscon_node_to_regmap(args.node); - if (IS_ERR(reg_map)) { - ret = PTR_ERR(reg_map); - dev_err(dev, "Failed to get reg_map: %d\n", ret); - return ret; - } - - range = regmap_get_range(reg_map, 0); - if (!range) { - dev_err(dev, "Failed to get reg_map: %d\n", ret); - return -ENOMEM; - } - - xgmac->syscon_phy = range + args.args[0]; - xgmac->syscon_phy_regshift = args.args[1]; - - /* Get Reset Bulk */ - ret = reset_get_bulk(dev, &xgmac->reset_bulk); - if (ret) { - dev_err(dev, "Failed to get reset: %d\n", ret); - return ret; - } - - ret = reset_assert_bulk(&xgmac->reset_bulk); - if (ret) { - dev_err(dev, "XGMAC failed to assert reset: %d\n", ret); - return ret; - } - - ret = dwxgmac_socfpga_do_setphy(dev, modereg); - if (ret) - return ret; - - ret = reset_deassert_bulk(&xgmac->reset_bulk); - if (ret) { - dev_err(dev, "XGMAC failed to de-assert reset: %d\n", ret); - return ret; - } - - ret = clk_get_by_name(dev, "stmmaceth", &xgmac->clk_common); - if (ret) { - pr_err("clk_get_by_name(stmmaceth) failed: %d", ret); - goto err_probe; - } - return 0; - -err_probe: - debug("%s: returns %d\n", __func__, ret); - return ret; -} - -static int xgmac_get_enetaddr_socfpga(struct udevice *dev) -{ - struct eth_pdata *pdata = dev_get_plat(dev); - struct xgmac_priv *xgmac = dev_get_priv(dev); - u32 hi_addr, lo_addr; - - debug("%s(dev=%p):\n", __func__, dev); - - /* Read the MAC Address from the hardawre */ - hi_addr = readl(&xgmac->mac_regs->address0_high); - lo_addr = readl(&xgmac->mac_regs->address0_low); - - pdata->enetaddr[0] = lo_addr & 0xff; - pdata->enetaddr[1] = (lo_addr >> 8) & 0xff; - pdata->enetaddr[2] = (lo_addr >> 16) & 0xff; - pdata->enetaddr[3] = (lo_addr >> 24) & 0xff; - pdata->enetaddr[4] = hi_addr & 0xff; - pdata->enetaddr[5] = (hi_addr >> 8) & 0xff; - - return !is_valid_ethaddr(pdata->enetaddr); -} - -static int xgmac_start_resets_socfpga(struct udevice *dev) -{ - struct xgmac_priv *xgmac = dev_get_priv(dev); - int ret; - - debug("%s(dev=%p):\n", __func__, dev); - - ret = reset_assert_bulk(&xgmac->reset_bulk); - if (ret < 0) { - pr_err("xgmac reset assert failed: %d", ret); - return ret; - } - - udelay(2); - - ret = reset_deassert_bulk(&xgmac->reset_bulk); - if (ret < 0) { - pr_err("xgmac reset de-assert failed: %d", ret); - return ret; - } - - return 0; -} - -static struct xgmac_ops xgmac_socfpga_ops = { - .xgmac_inval_desc = xgmac_inval_desc_generic, - .xgmac_flush_desc = xgmac_flush_desc_generic, - .xgmac_inval_buffer = xgmac_inval_buffer_generic, - .xgmac_flush_buffer = xgmac_flush_buffer_generic, - .xgmac_probe_resources = xgmac_probe_resources_socfpga, - .xgmac_remove_resources = xgmac_null_ops, - .xgmac_stop_resets = xgmac_null_ops, - .xgmac_start_resets = xgmac_start_resets_socfpga, - .xgmac_stop_clks = xgmac_null_ops, - .xgmac_start_clks = xgmac_null_ops, - .xgmac_calibrate_pads = xgmac_null_ops, - .xgmac_disable_calibration = xgmac_null_ops, - .xgmac_get_enetaddr = xgmac_get_enetaddr_socfpga, -}; - -struct xgmac_config __maybe_unused xgmac_socfpga_config = { - .reg_access_always_ok = false, - .swr_wait = 50, - .config_mac = XGMAC_MAC_RXQ_CTRL0_RXQ0EN_ENABLED_DCB, - .config_mac_mdio = XGMAC_MAC_MDIO_ADDRESS_CR_350_400, - .axi_bus_width = XGMAC_AXI_WIDTH_64, - .interface = dev_read_phy_mode, - .ops = &xgmac_socfpga_ops -}; diff --git a/drivers/net/dwmac_meson8b.c b/drivers/net/dwmac_meson8b.c index fde4aabbace..871171e1be5 100644 --- a/drivers/net/dwmac_meson8b.c +++ b/drivers/net/dwmac_meson8b.c @@ -3,6 +3,7 @@ * Copyright (C) 2021 BayLibre, SAS */ +#include #include #include #include diff --git a/drivers/net/dwmac_s700.c b/drivers/net/dwmac_s700.c index 969d247b4f3..744b58bdd1a 100644 --- a/drivers/net/dwmac_s700.c +++ b/drivers/net/dwmac_s700.c @@ -5,6 +5,7 @@ * Actions DWMAC specific glue layer */ +#include #include #include #include diff --git a/drivers/net/dwmac_socfpga.c b/drivers/net/dwmac_socfpga.c index bba3fc4d34b..82fdff51dac 100644 --- a/drivers/net/dwmac_socfpga.c +++ b/drivers/net/dwmac_socfpga.c @@ -5,6 +5,7 @@ * Altera SoCFPGA EMAC extras */ +#include #include #include #include diff --git a/drivers/net/e1000.c b/drivers/net/e1000.c index 663d900eb09..4e7ba666770 100644 --- a/drivers/net/e1000.c +++ b/drivers/net/e1000.c @@ -29,6 +29,7 @@ tested on both gig copper and gig fiber boards * Copyright 2011 Freescale Semiconductor, Inc. */ +#include #include #include #include diff --git a/drivers/net/e1000_spi.c b/drivers/net/e1000_spi.c index 1e830b99f1d..69adf282c73 100644 --- a/drivers/net/e1000_spi.c +++ b/drivers/net/e1000_spi.c @@ -1,9 +1,9 @@ +#include #include #include #include #include "e1000.h" #include -#include #include /*----------------------------------------------------------------------- diff --git a/drivers/net/eepro100.c b/drivers/net/eepro100.c index d18a8d577ca..38d96ab72b6 100644 --- a/drivers/net/eepro100.c +++ b/drivers/net/eepro100.c @@ -4,7 +4,7 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ -#include +#include #include #include #include diff --git a/drivers/net/eth-phy-uclass.c b/drivers/net/eth-phy-uclass.c index 1dae26878e6..9d1e8d38ffa 100644 --- a/drivers/net/eth-phy-uclass.c +++ b/drivers/net/eth-phy-uclass.c @@ -5,6 +5,7 @@ #define LOG_CATEGORY UCLASS_ETH_PHY +#include #include #include #include diff --git a/drivers/net/ethoc.c b/drivers/net/ethoc.c index dc7e6f1929f..13fad8119bb 100644 --- a/drivers/net/ethoc.c +++ b/drivers/net/ethoc.c @@ -9,6 +9,7 @@ * Copyright (C) 2016 Cadence Design Systems Inc. */ +#include #include #include #include diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c index 0a0d92bc2cd..90af18f80a8 100644 --- a/drivers/net/fec_mxc.c +++ b/drivers/net/fec_mxc.c @@ -7,6 +7,7 @@ * (C) Copyright 2007 Pengutronix, Juergen Beisert */ +#include #include #include #include diff --git a/drivers/net/fm/b4860.c b/drivers/net/fm/b4860.c index 46a0d38b101..1c5543e3c87 100644 --- a/drivers/net/fm/b4860.c +++ b/drivers/net/fm/b4860.c @@ -3,7 +3,7 @@ * Copyright 2012 Freescale Semiconductor, Inc. * Roy Zang */ -#include +#include #include #include #include diff --git a/drivers/net/fm/dtsec.c b/drivers/net/fm/dtsec.c index 371d9f07a46..c51a65cb94f 100644 --- a/drivers/net/fm/dtsec.c +++ b/drivers/net/fm/dtsec.c @@ -3,6 +3,7 @@ * Copyright 2009-2011 Freescale Semiconductor, Inc. */ +#include #include #include #include diff --git a/drivers/net/fm/eth.c b/drivers/net/fm/eth.c index 19f3f0fef07..9fd26de0d72 100644 --- a/drivers/net/fm/eth.c +++ b/drivers/net/fm/eth.c @@ -4,7 +4,7 @@ * Copyright 2020 NXP * Dave Liu */ -#include +#include #include #include #include diff --git a/drivers/net/fm/ls1043.c b/drivers/net/fm/ls1043.c index 41b75761fdd..3db5c907a2a 100644 --- a/drivers/net/fm/ls1043.c +++ b/drivers/net/fm/ls1043.c @@ -2,7 +2,7 @@ /* * Copyright 2015 Freescale Semiconductor, Inc. */ -#include +#include #include #include #include diff --git a/drivers/net/fm/ls1046.c b/drivers/net/fm/ls1046.c index 56c5c6846a4..3b0ee98ddd3 100644 --- a/drivers/net/fm/ls1046.c +++ b/drivers/net/fm/ls1046.c @@ -2,7 +2,7 @@ /* * Copyright 2016 Freescale Semiconductor, Inc. */ -#include +#include #include #include #include diff --git a/drivers/net/fm/memac.c b/drivers/net/fm/memac.c index 37b54626af0..eeb67a39a77 100644 --- a/drivers/net/fm/memac.c +++ b/drivers/net/fm/memac.c @@ -7,6 +7,7 @@ /* MAXFRM - maximum frame length */ #define MAXFRM_MASK 0x0000ffff +#include #include #include #include diff --git a/drivers/net/fm/memac_phy.c b/drivers/net/fm/memac_phy.c index 26425d94ae5..e0b62b94490 100644 --- a/drivers/net/fm/memac_phy.c +++ b/drivers/net/fm/memac_phy.c @@ -5,6 +5,7 @@ * Roy Zang * Some part is taken from tsec.c */ +#include #include #include #include diff --git a/drivers/net/fm/p1023.c b/drivers/net/fm/p1023.c index 362bc9f30a1..9013b276bc9 100644 --- a/drivers/net/fm/p1023.c +++ b/drivers/net/fm/p1023.c @@ -2,7 +2,7 @@ /* * Copyright 2011 Freescale Semiconductor, Inc. */ -#include +#include #include #include #include diff --git a/drivers/net/fm/p4080.c b/drivers/net/fm/p4080.c index 6e63e338e5d..7ad993221f7 100644 --- a/drivers/net/fm/p4080.c +++ b/drivers/net/fm/p4080.c @@ -2,7 +2,7 @@ /* * Copyright 2011 Freescale Semiconductor, Inc. */ -#include +#include #include #include #include diff --git a/drivers/net/fm/p5020.c b/drivers/net/fm/p5020.c index 4fc1f723a3d..f931491b112 100644 --- a/drivers/net/fm/p5020.c +++ b/drivers/net/fm/p5020.c @@ -2,7 +2,7 @@ /* * Copyright 2011 Freescale Semiconductor, Inc. */ -#include +#include #include #include #include diff --git a/drivers/net/fm/p5040.c b/drivers/net/fm/p5040.c index f6ae947ef99..ef9f4bcce4d 100644 --- a/drivers/net/fm/p5040.c +++ b/drivers/net/fm/p5040.c @@ -2,7 +2,7 @@ /* * Copyright 2011 Freescale Semiconductor, Inc. */ -#include +#include #include #include #include diff --git a/drivers/net/fm/t1024.c b/drivers/net/fm/t1024.c index 18d71e7b60e..70ab4610cdf 100644 --- a/drivers/net/fm/t1024.c +++ b/drivers/net/fm/t1024.c @@ -4,7 +4,7 @@ * Shengzhou Liu */ -#include +#include #include #include #include diff --git a/drivers/net/fm/t1040.c b/drivers/net/fm/t1040.c index dafa6d638e3..5c260bed7fd 100644 --- a/drivers/net/fm/t1040.c +++ b/drivers/net/fm/t1040.c @@ -2,7 +2,7 @@ /* * Copyright 2013 Freescale Semiconductor, Inc. */ -#include +#include #include #include #include diff --git a/drivers/net/fm/t2080.c b/drivers/net/fm/t2080.c index 390ca0aee70..6174934d2b8 100644 --- a/drivers/net/fm/t2080.c +++ b/drivers/net/fm/t2080.c @@ -5,7 +5,7 @@ * Shengzhou Liu */ -#include +#include #include #include #include diff --git a/drivers/net/fm/t4240.c b/drivers/net/fm/t4240.c index df76073eecd..f0a02bfe457 100644 --- a/drivers/net/fm/t4240.c +++ b/drivers/net/fm/t4240.c @@ -3,7 +3,7 @@ * Copyright 2012 Freescale Semiconductor, Inc. * Roy Zang */ -#include +#include #include #include #include diff --git a/drivers/net/fm/tgec.c b/drivers/net/fm/tgec.c index f7b51ce0bba..9cc9f3fde3a 100644 --- a/drivers/net/fm/tgec.c +++ b/drivers/net/fm/tgec.c @@ -7,6 +7,7 @@ /* MAXFRM - maximum frame length */ #define MAXFRM_MASK 0x0000ffff +#include #include #include #include diff --git a/drivers/net/fm/tgec_phy.c b/drivers/net/fm/tgec_phy.c index f6c8f80c835..22225c2f82f 100644 --- a/drivers/net/fm/tgec_phy.c +++ b/drivers/net/fm/tgec_phy.c @@ -4,6 +4,7 @@ * Andy Fleming * Some part is taken from tsec.c */ +#include #include #include #include diff --git a/drivers/net/fsl-mc/mc.c b/drivers/net/fsl-mc/mc.c index c2869ce4010..f5c5057bec1 100644 --- a/drivers/net/fsl-mc/mc.c +++ b/drivers/net/fsl-mc/mc.c @@ -3,7 +3,7 @@ * Copyright 2014 Freescale Semiconductor, Inc. * Copyright 2017-2018, 2020-2021 NXP */ -#include +#include #include #include #include diff --git a/drivers/net/fsl-mc/mc_sys.c b/drivers/net/fsl-mc/mc_sys.c index 482fb0463d5..4d32516b005 100644 --- a/drivers/net/fsl-mc/mc_sys.c +++ b/drivers/net/fsl-mc/mc_sys.c @@ -8,6 +8,7 @@ #include #include +#include #include #include #include diff --git a/drivers/net/fsl_enetc.c b/drivers/net/fsl_enetc.c index a6b0bafc8c6..1fd5089cc4b 100644 --- a/drivers/net/fsl_enetc.c +++ b/drivers/net/fsl_enetc.c @@ -4,6 +4,7 @@ * Copyright 2017-2021 NXP */ +#include #include #include #include diff --git a/drivers/net/fsl_enetc_mdio.c b/drivers/net/fsl_enetc_mdio.c index 2d5fcbb6dbd..50ad76dfeb5 100644 --- a/drivers/net/fsl_enetc_mdio.c +++ b/drivers/net/fsl_enetc_mdio.c @@ -4,6 +4,7 @@ * Copyright 2019 NXP */ +#include #include #include #include diff --git a/drivers/net/fsl_ls_mdio.c b/drivers/net/fsl_ls_mdio.c index e3c37d9045f..fce73937502 100644 --- a/drivers/net/fsl_ls_mdio.c +++ b/drivers/net/fsl_ls_mdio.c @@ -3,6 +3,7 @@ * Copyright 2020 NXP */ +#include #include #include #include diff --git a/drivers/net/fsl_mdio.c b/drivers/net/fsl_mdio.c index a0f1c59e058..5fd11db05f5 100644 --- a/drivers/net/fsl_mdio.c +++ b/drivers/net/fsl_mdio.c @@ -5,6 +5,7 @@ * Mingkai Hu */ +#include #include #include #include diff --git a/drivers/net/ftgmac100.c b/drivers/net/ftgmac100.c index 8781e50a48d..9b536fd5ab8 100644 --- a/drivers/net/ftgmac100.c +++ b/drivers/net/ftgmac100.c @@ -11,6 +11,7 @@ * Copyright (C) 2018, IBM Corporation. */ +#include #include #include #include diff --git a/drivers/net/ftmac100.c b/drivers/net/ftmac100.c index 199a0723b84..fae3adc3de3 100644 --- a/drivers/net/ftmac100.c +++ b/drivers/net/ftmac100.c @@ -7,6 +7,7 @@ */ #include +#include #include #include #include diff --git a/drivers/net/gmac_rockchip.c b/drivers/net/gmac_rockchip.c index d63e2dbfaeb..51f835adabc 100644 --- a/drivers/net/gmac_rockchip.c +++ b/drivers/net/gmac_rockchip.c @@ -5,6 +5,7 @@ * Rockchip GMAC ethernet IP driver for U-Boot */ +#include #include #include #include diff --git a/drivers/net/higmacv300.c b/drivers/net/higmacv300.c index 6b88f6fbf59..1862235d0cd 100644 --- a/drivers/net/higmacv300.c +++ b/drivers/net/higmacv300.c @@ -8,6 +8,7 @@ #include #include #include +#include #include #include #include diff --git a/drivers/net/ks8851_mll.c b/drivers/net/ks8851_mll.c index cc2e826257a..518548e3bbc 100644 --- a/drivers/net/ks8851_mll.c +++ b/drivers/net/ks8851_mll.c @@ -6,6 +6,7 @@ #include #include +#include #include #include #include diff --git a/drivers/net/ldpaa_eth/ldpaa_eth.c b/drivers/net/ldpaa_eth/ldpaa_eth.c index b72198ca530..87fbada06ba 100644 --- a/drivers/net/ldpaa_eth/ldpaa_eth.c +++ b/drivers/net/ldpaa_eth/ldpaa_eth.c @@ -4,6 +4,7 @@ * Copyright 2017, 2023 NXP */ +#include #include #include #include diff --git a/drivers/net/ldpaa_eth/ldpaa_wriop.c b/drivers/net/ldpaa_eth/ldpaa_wriop.c index a803b8fa797..adecb813576 100644 --- a/drivers/net/ldpaa_eth/ldpaa_wriop.c +++ b/drivers/net/ldpaa_eth/ldpaa_wriop.c @@ -3,6 +3,7 @@ * Copyright (C) 2015 Freescale Semiconductor */ +#include #include #include #include diff --git a/drivers/net/ldpaa_eth/ls1088a.c b/drivers/net/ldpaa_eth/ls1088a.c index 2727fb01179..32bcb51725a 100644 --- a/drivers/net/ldpaa_eth/ls1088a.c +++ b/drivers/net/ldpaa_eth/ls1088a.c @@ -2,7 +2,7 @@ /* * Copyright 2017 NXP */ -#include +#include #include #include #include diff --git a/drivers/net/ldpaa_eth/ls2080a.c b/drivers/net/ldpaa_eth/ls2080a.c index 05017552b3f..845a36bce87 100644 --- a/drivers/net/ldpaa_eth/ls2080a.c +++ b/drivers/net/ldpaa_eth/ls2080a.c @@ -2,7 +2,7 @@ /* * Copyright 2015 Freescale Semiconductor, Inc. */ -#include +#include #include #include #include diff --git a/drivers/net/ldpaa_eth/lx2160a.c b/drivers/net/ldpaa_eth/lx2160a.c index 25ae684063b..c2641a92d7e 100644 --- a/drivers/net/ldpaa_eth/lx2160a.c +++ b/drivers/net/ldpaa_eth/lx2160a.c @@ -2,7 +2,7 @@ /* * Copyright 2018, 2020 NXP */ -#include +#include #include #include #include diff --git a/drivers/net/macb.c b/drivers/net/macb.c index cbf5f605518..bca014c3cbb 100644 --- a/drivers/net/macb.c +++ b/drivers/net/macb.c @@ -2,6 +2,7 @@ /* * Copyright (C) 2005-2006 Atmel Corporation */ +#include #include #include #include diff --git a/drivers/net/mcffec.c b/drivers/net/mcffec.c index 04b711e4f65..ec1fae9688b 100644 --- a/drivers/net/mcffec.c +++ b/drivers/net/mcffec.c @@ -10,7 +10,7 @@ * (C) 2019 Angelo Dureghello */ -#include +#include #include #include #include diff --git a/drivers/net/mcfmii.c b/drivers/net/mcfmii.c index 9bf887035d7..eae20654513 100644 --- a/drivers/net/mcfmii.c +++ b/drivers/net/mcfmii.c @@ -4,6 +4,7 @@ * TsiChung Liew (Tsi-Chung.Liew@freescale.com) */ +#include #include #include #include diff --git a/drivers/net/mdio-ipq4019.c b/drivers/net/mdio-ipq4019.c index c824c3da3dd..50134b4d9b6 100644 --- a/drivers/net/mdio-ipq4019.c +++ b/drivers/net/mdio-ipq4019.c @@ -11,6 +11,7 @@ */ #include +#include #include #include #include diff --git a/drivers/net/mpc8xx_fec.c b/drivers/net/mpc8xx_fec.c index c44fa6acdd7..78337731e1f 100644 --- a/drivers/net/mpc8xx_fec.c +++ b/drivers/net/mpc8xx_fec.c @@ -4,6 +4,7 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ +#include #include #include #include diff --git a/drivers/net/mscc_eswitch/jr2_switch.c b/drivers/net/mscc_eswitch/jr2_switch.c index 925888e0765..7157428a685 100644 --- a/drivers/net/mscc_eswitch/jr2_switch.c +++ b/drivers/net/mscc_eswitch/jr2_switch.c @@ -3,6 +3,7 @@ * Copyright (c) 2018 Microsemi Corporation */ +#include #include #include #include diff --git a/drivers/net/mscc_eswitch/luton_switch.c b/drivers/net/mscc_eswitch/luton_switch.c index 2f3d0911fdf..5e4f00c4f4d 100644 --- a/drivers/net/mscc_eswitch/luton_switch.c +++ b/drivers/net/mscc_eswitch/luton_switch.c @@ -3,6 +3,7 @@ * Copyright (c) 2019 Microsemi Corporation */ +#include #include #include #include diff --git a/drivers/net/mscc_eswitch/ocelot_switch.c b/drivers/net/mscc_eswitch/ocelot_switch.c index 30bb4b5bad8..7ea1f551a11 100644 --- a/drivers/net/mscc_eswitch/ocelot_switch.c +++ b/drivers/net/mscc_eswitch/ocelot_switch.c @@ -3,6 +3,7 @@ * Copyright (c) 2018 Microsemi Corporation */ +#include #include #include #include diff --git a/drivers/net/mscc_eswitch/serval_switch.c b/drivers/net/mscc_eswitch/serval_switch.c index 8eab41df99a..be06e483373 100644 --- a/drivers/net/mscc_eswitch/serval_switch.c +++ b/drivers/net/mscc_eswitch/serval_switch.c @@ -3,6 +3,7 @@ * Copyright (c) 2019 Microsemi Corporation */ +#include #include #include #include diff --git a/drivers/net/mscc_eswitch/servalt_switch.c b/drivers/net/mscc_eswitch/servalt_switch.c index 61547d7933e..2d2329c204a 100644 --- a/drivers/net/mscc_eswitch/servalt_switch.c +++ b/drivers/net/mscc_eswitch/servalt_switch.c @@ -3,6 +3,7 @@ * Copyright (c) 2019 Microsemi Corporation */ +#include #include #include #include diff --git a/drivers/net/mt7628-eth.c b/drivers/net/mt7628-eth.c index fc8a6bb331b..b95de474fb0 100644 --- a/drivers/net/mt7628-eth.c +++ b/drivers/net/mt7628-eth.c @@ -13,6 +13,7 @@ * copyrights here, so I can't add them here. */ +#include #include #include #include diff --git a/drivers/net/mtk_eth.c b/drivers/net/mtk_eth.c index 94f17a97fe0..75e7bcf83b7 100644 --- a/drivers/net/mtk_eth.c +++ b/drivers/net/mtk_eth.c @@ -6,6 +6,7 @@ * Author: Mark Lee */ +#include #include #include #include diff --git a/drivers/net/mv88e6xxx.c b/drivers/net/mv88e6xxx.c index 557b6b2c8f6..8fbbc1cacca 100644 --- a/drivers/net/mv88e6xxx.c +++ b/drivers/net/mv88e6xxx.c @@ -23,6 +23,7 @@ * on the mv88e6176 via an SGMII interface. */ +#include #include #include #include diff --git a/drivers/net/mvgbe.c b/drivers/net/mvgbe.c index 17b62bbc205..3587ca2124e 100644 --- a/drivers/net/mvgbe.c +++ b/drivers/net/mvgbe.c @@ -11,6 +11,7 @@ * Copyright (C) 2002 rabeeh@galileo.co.il */ +#include #include #include #include diff --git a/drivers/net/mvmdio.c b/drivers/net/mvmdio.c index 3315e06f591..5ebcfe14b7f 100644 --- a/drivers/net/mvmdio.c +++ b/drivers/net/mvmdio.c @@ -4,6 +4,7 @@ * Author: Ken Ma */ +#include #include #include #include diff --git a/drivers/net/mvneta.c b/drivers/net/mvneta.c index f014d39b175..24933473fa0 100644 --- a/drivers/net/mvneta.c +++ b/drivers/net/mvneta.c @@ -12,6 +12,7 @@ * Thomas Petazzoni */ +#include #include #include #include diff --git a/drivers/net/mvpp2.c b/drivers/net/mvpp2.c index d19a79d1600..1cd54307650 100644 --- a/drivers/net/mvpp2.c +++ b/drivers/net/mvpp2.c @@ -13,6 +13,7 @@ * warranty of any kind, whether express or implied. */ +#include #include #include #include diff --git a/drivers/net/netconsole.c b/drivers/net/netconsole.c index 1943de8ba73..151bc55e076 100644 --- a/drivers/net/netconsole.c +++ b/drivers/net/netconsole.c @@ -4,12 +4,12 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ +#include #include #include #include #include #include -#include #ifndef CFG_NETCONSOLE_BUFFER_SIZE #define CFG_NETCONSOLE_BUFFER_SIZE 512 diff --git a/drivers/net/npcm750_eth.c b/drivers/net/npcm750_eth.c index f0ec6c556cc..2028f4ae286 100644 --- a/drivers/net/npcm750_eth.c +++ b/drivers/net/npcm750_eth.c @@ -3,6 +3,7 @@ * Copyright (c) 2021 Nuvoton Technology Corp. */ +#include #include #include #include diff --git a/drivers/net/pch_gbe.c b/drivers/net/pch_gbe.c index adeca3d040d..ecf8c28fe41 100644 --- a/drivers/net/pch_gbe.c +++ b/drivers/net/pch_gbe.c @@ -5,6 +5,7 @@ * Intel Platform Controller Hub EG20T (codename Topcliff) GMAC Driver */ +#include #include #include #include diff --git a/drivers/net/pcnet.c b/drivers/net/pcnet.c index 180a96af16b..a1f3c2bd290 100644 --- a/drivers/net/pcnet.c +++ b/drivers/net/pcnet.c @@ -6,6 +6,7 @@ * Linux driver pcnet32.c written 1996-1999 by Thomas Bogendoerfer. */ +#include #include #include #include diff --git a/drivers/net/pfe_eth/pfe_cmd.c b/drivers/net/pfe_eth/pfe_cmd.c index 99c2a8d4e92..2fe0db0fe71 100644 --- a/drivers/net/pfe_eth/pfe_cmd.c +++ b/drivers/net/pfe_eth/pfe_cmd.c @@ -9,6 +9,7 @@ * @brief PFE utility commands */ +#include #include #include #include diff --git a/drivers/net/pfe_eth/pfe_eth.c b/drivers/net/pfe_eth/pfe_eth.c index e24a6f93d91..ab532c5a420 100644 --- a/drivers/net/pfe_eth/pfe_eth.c +++ b/drivers/net/pfe_eth/pfe_eth.c @@ -4,7 +4,7 @@ * Copyright 2017 NXP */ -#include +#include #include #include #include diff --git a/drivers/net/pfe_eth/pfe_mdio.c b/drivers/net/pfe_eth/pfe_mdio.c index ce2f76eabc8..ff48726dbf5 100644 --- a/drivers/net/pfe_eth/pfe_mdio.c +++ b/drivers/net/pfe_eth/pfe_mdio.c @@ -3,7 +3,7 @@ * Copyright 2015-2016 Freescale Semiconductor, Inc. * Copyright 2017 NXP */ -#include +#include #include #include #include diff --git a/drivers/net/phy/adin.c b/drivers/net/phy/adin.c index ce448810ff6..0970449d0f9 100644 --- a/drivers/net/phy/adin.c +++ b/drivers/net/phy/adin.c @@ -6,6 +6,7 @@ * Copyright 2022 Variscite Ltd. * Copyright 2022 Josua Mayer */ +#include #include #include #include diff --git a/drivers/net/phy/aquantia.c b/drivers/net/phy/aquantia.c index 4517a6b13ba..a958e88d44f 100644 --- a/drivers/net/phy/aquantia.c +++ b/drivers/net/phy/aquantia.c @@ -6,6 +6,7 @@ * Copyright 2018, 2021 NXP */ #include +#include #include #include #include diff --git a/drivers/net/phy/atheros.c b/drivers/net/phy/atheros.c index 61525f68c35..abb7bdf537c 100644 --- a/drivers/net/phy/atheros.c +++ b/drivers/net/phy/atheros.c @@ -6,6 +6,7 @@ * author Andy Fleming * Copyright (c) 2019 Michael Walle */ +#include #include #include #include diff --git a/drivers/net/phy/b53.c b/drivers/net/phy/b53.c index e95363067fe..26e8e2fe64f 100644 --- a/drivers/net/phy/b53.c +++ b/drivers/net/phy/b53.c @@ -22,6 +22,7 @@ * cover other switches would be trivial. */ +#include #include #include #include diff --git a/drivers/net/phy/broadcom.c b/drivers/net/phy/broadcom.c index 0a49015eb89..ecccb7c3b54 100644 --- a/drivers/net/phy/broadcom.c +++ b/drivers/net/phy/broadcom.c @@ -5,6 +5,7 @@ * Copyright 2010-2011 Freescale Semiconductor, Inc. * author Andy Fleming */ +#include #include #include diff --git a/drivers/net/phy/ca_phy.c b/drivers/net/phy/ca_phy.c index 5b2c67d2fda..edef21867b0 100644 --- a/drivers/net/phy/ca_phy.c +++ b/drivers/net/phy/ca_phy.c @@ -8,6 +8,7 @@ */ #include +#include #include #include #include diff --git a/drivers/net/phy/cortina.c b/drivers/net/phy/cortina.c index d043e859bad..1cf8b28f582 100644 --- a/drivers/net/phy/cortina.c +++ b/drivers/net/phy/cortina.c @@ -8,6 +8,7 @@ */ #include +#include #include #include #include diff --git a/drivers/net/phy/davicom.c b/drivers/net/phy/davicom.c index 72d66812985..31ffa1ac7a9 100644 --- a/drivers/net/phy/davicom.c +++ b/drivers/net/phy/davicom.c @@ -5,6 +5,7 @@ * Copyright 2010-2011 Freescale Semiconductor, Inc. * author Andy Fleming */ +#include #include #define MIIM_DM9161_SCR 0x10 diff --git a/drivers/net/phy/dp83867.c b/drivers/net/phy/dp83867.c index 772cde1c520..b6726031ebb 100644 --- a/drivers/net/phy/dp83867.c +++ b/drivers/net/phy/dp83867.c @@ -3,6 +3,7 @@ * TI PHY drivers * */ +#include #include #include #include diff --git a/drivers/net/phy/dp83869.c b/drivers/net/phy/dp83869.c index b6fb5adae1f..f9d4782580e 100644 --- a/drivers/net/phy/dp83869.c +++ b/drivers/net/phy/dp83869.c @@ -4,6 +4,7 @@ * */ +#include #include #include #include diff --git a/drivers/net/phy/ethernet_id.c b/drivers/net/phy/ethernet_id.c index 2f8454ca27d..4dfdee60dcc 100644 --- a/drivers/net/phy/ethernet_id.c +++ b/drivers/net/phy/ethernet_id.c @@ -5,6 +5,7 @@ * Copyright (C) 2022 Xilinx, Inc. */ +#include #include #include #include diff --git a/drivers/net/phy/fixed.c b/drivers/net/phy/fixed.c index 11d36164976..2f0823b8365 100644 --- a/drivers/net/phy/fixed.c +++ b/drivers/net/phy/fixed.c @@ -6,6 +6,7 @@ */ #include +#include #include #include #include diff --git a/drivers/net/phy/generic_10g.c b/drivers/net/phy/generic_10g.c index 38dc9a88563..34ac51ea070 100644 --- a/drivers/net/phy/generic_10g.c +++ b/drivers/net/phy/generic_10g.c @@ -7,6 +7,7 @@ * * Based loosely off of Linux's PHY Lib */ +#include #include #include diff --git a/drivers/net/phy/intel_xway.c b/drivers/net/phy/intel_xway.c index fe50eec011a..9d1b97d349f 100644 --- a/drivers/net/phy/intel_xway.c +++ b/drivers/net/phy/intel_xway.c @@ -1,4 +1,5 @@ // SPDX-License-Identifier: GPL-2.0+ +#include #include #include diff --git a/drivers/net/phy/lxt.c b/drivers/net/phy/lxt.c index a817c58b128..20940033a38 100644 --- a/drivers/net/phy/lxt.c +++ b/drivers/net/phy/lxt.c @@ -5,6 +5,7 @@ * Copyright 2010-2011 Freescale Semiconductor, Inc. * author Andy Fleming */ +#include #include /* LXT971 Status 2 registers */ diff --git a/drivers/net/phy/marvell.c b/drivers/net/phy/marvell.c index b0a0b7fcb38..0a90f710dfe 100644 --- a/drivers/net/phy/marvell.c +++ b/drivers/net/phy/marvell.c @@ -5,6 +5,7 @@ * Copyright 2010-2011 Freescale Semiconductor, Inc. * author Andy Fleming */ +#include #include #include #include diff --git a/drivers/net/phy/marvell10g.c b/drivers/net/phy/marvell10g.c index 8c95bcbb9ad..9e64672f5ca 100644 --- a/drivers/net/phy/marvell10g.c +++ b/drivers/net/phy/marvell10g.c @@ -22,6 +22,7 @@ * If both the fiber and copper ports are connected, the first to gain * link takes priority and the other port is completely locked out. */ +#include #include #include #include diff --git a/drivers/net/phy/meson-gxl.c b/drivers/net/phy/meson-gxl.c index d43b476b3c8..b49c9b5f495 100644 --- a/drivers/net/phy/meson-gxl.c +++ b/drivers/net/phy/meson-gxl.c @@ -7,6 +7,7 @@ * Author: Neil Armstrong */ #include +#include #include #include #include diff --git a/drivers/net/phy/micrel_ksz8xxx.c b/drivers/net/phy/micrel_ksz8xxx.c index a9a64466ac2..b0f3abcb037 100644 --- a/drivers/net/phy/micrel_ksz8xxx.c +++ b/drivers/net/phy/micrel_ksz8xxx.c @@ -6,6 +6,7 @@ * author Andy Fleming * (C) 2012 NetModule AG, David Andrey, added KSZ9031 */ +#include #include #include #include diff --git a/drivers/net/phy/micrel_ksz90x1.c b/drivers/net/phy/micrel_ksz90x1.c index 556d75e31ed..ffc3c987eaa 100644 --- a/drivers/net/phy/micrel_ksz90x1.c +++ b/drivers/net/phy/micrel_ksz90x1.c @@ -8,6 +8,7 @@ * (C) Copyright 2017 Adaptrum, Inc. * Written by Alexandru Gagniuc for Adaptrum, Inc. */ +#include #include #include #include diff --git a/drivers/net/phy/miiphybb.c b/drivers/net/phy/miiphybb.c index 083d9d3996d..cf71f7d4e7e 100644 --- a/drivers/net/phy/miiphybb.c +++ b/drivers/net/phy/miiphybb.c @@ -12,6 +12,7 @@ * channel. */ +#include #include #include #include diff --git a/drivers/net/phy/motorcomm.c b/drivers/net/phy/motorcomm.c index a96430cec43..a2c763c8791 100644 --- a/drivers/net/phy/motorcomm.c +++ b/drivers/net/phy/motorcomm.c @@ -6,6 +6,7 @@ */ #include +#include #include #include #include diff --git a/drivers/net/phy/mv88e61xx.c b/drivers/net/phy/mv88e61xx.c index ecc10f788af..85778106edd 100644 --- a/drivers/net/phy/mv88e61xx.c +++ b/drivers/net/phy/mv88e61xx.c @@ -29,6 +29,7 @@ * changes may be required. */ +#include #include #include #include diff --git a/drivers/net/phy/mv88e6352.c b/drivers/net/phy/mv88e6352.c index 6284298ebc1..56060762d85 100644 --- a/drivers/net/phy/mv88e6352.c +++ b/drivers/net/phy/mv88e6352.c @@ -4,6 +4,7 @@ * Valentin Lontgchamp, Keymile AG, valentin.longchamp@keymile.com */ +#include #include #include #include diff --git a/drivers/net/phy/natsemi.c b/drivers/net/phy/natsemi.c index f7e514ef203..6b9e99ea115 100644 --- a/drivers/net/phy/natsemi.c +++ b/drivers/net/phy/natsemi.c @@ -5,6 +5,7 @@ * Copyright 2010-2011 Freescale Semiconductor, Inc. * author Andy Fleming */ +#include #include /* NatSemi DP83630 */ diff --git a/drivers/net/phy/ncsi.c b/drivers/net/phy/ncsi.c index a1de438ffff..2bca116a9d8 100644 --- a/drivers/net/phy/ncsi.c +++ b/drivers/net/phy/ncsi.c @@ -5,6 +5,7 @@ * Copyright (C) 2019, IBM Corporation. */ +#include #include #include #include diff --git a/drivers/net/phy/nxp-c45-tja11xx.c b/drivers/net/phy/nxp-c45-tja11xx.c index a1e4c3d053b..f24fc5b2de6 100644 --- a/drivers/net/phy/nxp-c45-tja11xx.c +++ b/drivers/net/phy/nxp-c45-tja11xx.c @@ -5,6 +5,7 @@ * Copyright 2021 NXP * Author: Radu Pirea */ +#include #include #include #include diff --git a/drivers/net/phy/nxp-tja11xx.c b/drivers/net/phy/nxp-tja11xx.c index a61471f4277..471b0e322b5 100644 --- a/drivers/net/phy/nxp-tja11xx.c +++ b/drivers/net/phy/nxp-tja11xx.c @@ -6,6 +6,7 @@ * Copyright (C) 2018 Marek Vasut */ +#include #include #include #include diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c index fbf85d90f54..270176cfe62 100644 --- a/drivers/net/phy/phy.c +++ b/drivers/net/phy/phy.c @@ -7,6 +7,7 @@ * * Based loosely off of Linux's PHY Lib */ +#include #include #include #include diff --git a/drivers/net/phy/realtek.c b/drivers/net/phy/realtek.c index 30f35cced9d..7e1036b2271 100644 --- a/drivers/net/phy/realtek.c +++ b/drivers/net/phy/realtek.c @@ -6,6 +6,7 @@ * author Andy Fleming * Copyright 2016 Karsten Merker */ +#include #include #include #include diff --git a/drivers/net/phy/smsc.c b/drivers/net/phy/smsc.c index 0d823f5f2b1..056b607e0b8 100644 --- a/drivers/net/phy/smsc.c +++ b/drivers/net/phy/smsc.c @@ -9,6 +9,7 @@ * Some code copied from linux kernel * Copyright (c) 2006 Herbert Valerio Riedel */ +#include #include /* This code does not check the partner abilities. */ diff --git a/drivers/net/phy/teranetics.c b/drivers/net/phy/teranetics.c index b39311976d6..15f2c12ed83 100644 --- a/drivers/net/phy/teranetics.c +++ b/drivers/net/phy/teranetics.c @@ -5,6 +5,7 @@ * Copyright 2010-2011 Freescale Semiconductor, Inc. * author Andy Fleming */ +#include #include #include diff --git a/drivers/net/phy/vitesse.c b/drivers/net/phy/vitesse.c index 4867d1931b4..c5cf0d7dfbd 100644 --- a/drivers/net/phy/vitesse.c +++ b/drivers/net/phy/vitesse.c @@ -6,6 +6,7 @@ * Original Author: Andy Fleming * Add vsc8662 phy support - Priyanka Jain */ +#include #include /* Cicada Auxiliary Control/Status Register */ diff --git a/drivers/net/phy/xilinx_gmii2rgmii.c b/drivers/net/phy/xilinx_gmii2rgmii.c index e44b7b75bd5..e2969bc4842 100644 --- a/drivers/net/phy/xilinx_gmii2rgmii.c +++ b/drivers/net/phy/xilinx_gmii2rgmii.c @@ -5,6 +5,7 @@ * Copyright (C) 2018 Xilinx, Inc. */ +#include #include #include #include diff --git a/drivers/net/phy/xilinx_phy.c b/drivers/net/phy/xilinx_phy.c index a59e17d11e5..c07c780193f 100644 --- a/drivers/net/phy/xilinx_phy.c +++ b/drivers/net/phy/xilinx_phy.c @@ -6,6 +6,7 @@ */ #include +#include #include #include #include diff --git a/drivers/net/pic32_eth.c b/drivers/net/pic32_eth.c index eea3c48aeff..1333a3aa7e4 100644 --- a/drivers/net/pic32_eth.c +++ b/drivers/net/pic32_eth.c @@ -3,6 +3,7 @@ * (c) 2015 Purna Chandra Mandal * */ +#include #include #include #include diff --git a/drivers/net/pic32_mdio.c b/drivers/net/pic32_mdio.c index 8610f9a1aa5..d4049cfea52 100644 --- a/drivers/net/pic32_mdio.c +++ b/drivers/net/pic32_mdio.c @@ -5,6 +5,7 @@ * Copyright 2015 Microchip Inc. * Purna Chandra Mandal */ +#include #include #include #include diff --git a/drivers/net/qe/dm_qe_uec.c b/drivers/net/qe/dm_qe_uec.c index ac3aedd8b49..6d1509d90cf 100644 --- a/drivers/net/qe/dm_qe_uec.c +++ b/drivers/net/qe/dm_qe_uec.c @@ -7,6 +7,7 @@ * Copyright (C) 2020 Heiko Schocher */ +#include #include #include #include diff --git a/drivers/net/qe/dm_qe_uec_phy.c b/drivers/net/qe/dm_qe_uec_phy.c index 8c0168be859..a0bcc8d3e55 100644 --- a/drivers/net/qe/dm_qe_uec_phy.c +++ b/drivers/net/qe/dm_qe_uec_phy.c @@ -8,6 +8,7 @@ * Copyright (C) 2020 Heiko Schocher */ +#include #include #include #include diff --git a/drivers/net/qe/uccf.c b/drivers/net/qe/uccf.c index badf4e5db3e..00848a1a37d 100644 --- a/drivers/net/qe/uccf.c +++ b/drivers/net/qe/uccf.c @@ -7,7 +7,6 @@ */ #include -#include #include #include #include diff --git a/drivers/net/qe/uccf.h b/drivers/net/qe/uccf.h index e60bbe241cd..99f8458edf6 100644 --- a/drivers/net/qe/uccf.h +++ b/drivers/net/qe/uccf.h @@ -9,8 +9,8 @@ #ifndef __UCCF_H__ #define __UCCF_H__ -#include -#include +#include "common.h" +#include "linux/immap_qe.h" #include /* Fast or Giga ethernet */ diff --git a/drivers/net/ravb.c b/drivers/net/ravb.c index f1401d2f6ed..4764bca7082 100644 --- a/drivers/net/ravb.c +++ b/drivers/net/ravb.c @@ -8,6 +8,7 @@ * Based on the SuperH Ethernet driver. */ +#include #include #include #include diff --git a/drivers/net/rswitch.c b/drivers/net/rswitch.c index 8e1b6e2f6f6..5a69ca1a0f9 100644 --- a/drivers/net/rswitch.c +++ b/drivers/net/rswitch.c @@ -9,6 +9,7 @@ #include #include +#include #include #include #include diff --git a/drivers/net/rtl8139.c b/drivers/net/rtl8139.c index 2e0afad089f..d8f24ec81a2 100644 --- a/drivers/net/rtl8139.c +++ b/drivers/net/rtl8139.c @@ -68,6 +68,7 @@ * */ +#include #include #include #include diff --git a/drivers/net/rtl8169.c b/drivers/net/rtl8169.c index e80aebc0bcf..93e83661cec 100644 --- a/drivers/net/rtl8169.c +++ b/drivers/net/rtl8169.c @@ -39,6 +39,7 @@ * 26 August 2006 Mihai Georgian * Modified to use le32_to_cpu and cpu_to_le32 properly */ +#include #include #include #include diff --git a/drivers/net/sandbox-raw-bus.c b/drivers/net/sandbox-raw-bus.c index 15670d6d24a..fb1ba5a8c83 100644 --- a/drivers/net/sandbox-raw-bus.c +++ b/drivers/net/sandbox-raw-bus.c @@ -4,6 +4,7 @@ * Copyright (c) 2018 Joe Hershberger */ +#include #include #include #include diff --git a/drivers/net/sandbox-raw.c b/drivers/net/sandbox-raw.c index 1d716716778..99eb7a3bbff 100644 --- a/drivers/net/sandbox-raw.c +++ b/drivers/net/sandbox-raw.c @@ -8,6 +8,7 @@ #include #include +#include #include #include #include diff --git a/drivers/net/sandbox.c b/drivers/net/sandbox.c index fe3627db6e3..13022addb6a 100644 --- a/drivers/net/sandbox.c +++ b/drivers/net/sandbox.c @@ -6,6 +6,7 @@ * Joe Hershberger */ +#include #include #include #include diff --git a/drivers/net/sh_eth.c b/drivers/net/sh_eth.c index f1ce994cfd5..7b1f59dc498 100644 --- a/drivers/net/sh_eth.c +++ b/drivers/net/sh_eth.c @@ -9,6 +9,7 @@ */ #include +#include #include #include #include diff --git a/drivers/net/sja1105.c b/drivers/net/sja1105.c index 0ba84a4496f..48f044c6472 100644 --- a/drivers/net/sja1105.c +++ b/drivers/net/sja1105.c @@ -8,6 +8,7 @@ * Ported from Linux (drivers/net/dsa/sja1105/). */ +#include #include #include #include diff --git a/drivers/net/smc911x.c b/drivers/net/smc911x.c index f39ba40944f..616b7ce174f 100644 --- a/drivers/net/smc911x.c +++ b/drivers/net/smc911x.c @@ -5,6 +5,7 @@ * (c) 2007 Pengutronix, Sascha Hauer */ +#include #include #include #include diff --git a/drivers/net/sun8i_emac.c b/drivers/net/sun8i_emac.c index f4b97798d2d..8bff4fe9a9e 100644 --- a/drivers/net/sun8i_emac.c +++ b/drivers/net/sun8i_emac.c @@ -16,6 +16,7 @@ #include #include #include +#include #include #include #include diff --git a/drivers/net/sunxi_emac.c b/drivers/net/sunxi_emac.c index 3dee849c97e..f546ad1fe8d 100644 --- a/drivers/net/sunxi_emac.c +++ b/drivers/net/sunxi_emac.c @@ -5,6 +5,7 @@ * (C) Copyright 2012, Stefan Roese */ +#include #include #include #include diff --git a/drivers/net/ti/am65-cpsw-nuss.c b/drivers/net/ti/am65-cpsw-nuss.c index 335c8bee3fe..b151e25d6a4 100644 --- a/drivers/net/ti/am65-cpsw-nuss.c +++ b/drivers/net/ti/am65-cpsw-nuss.c @@ -6,6 +6,7 @@ * */ +#include #include #include #include diff --git a/drivers/net/ti/cpsw-common.c b/drivers/net/ti/cpsw-common.c index 3e66d7c7bdf..d5428274d19 100644 --- a/drivers/net/ti/cpsw-common.c +++ b/drivers/net/ti/cpsw-common.c @@ -5,6 +5,7 @@ * Copyright (C) 2016, Texas Instruments, Incorporated */ +#include #include #include #include diff --git a/drivers/net/ti/cpsw.c b/drivers/net/ti/cpsw.c index d7746f454ba..9a5e9642df1 100644 --- a/drivers/net/ti/cpsw.c +++ b/drivers/net/ti/cpsw.c @@ -5,6 +5,7 @@ * Copyright (C) 2010-2018 Texas Instruments Incorporated - https://www.ti.com/ */ +#include #include #include #include diff --git a/drivers/net/ti/cpsw_mdio.c b/drivers/net/ti/cpsw_mdio.c index 9e0083ca789..f1b1eba75d0 100644 --- a/drivers/net/ti/cpsw_mdio.c +++ b/drivers/net/ti/cpsw_mdio.c @@ -6,6 +6,7 @@ */ #include +#include #include #include #include diff --git a/drivers/net/ti/davinci_emac.c b/drivers/net/ti/davinci_emac.c index 03a1a7a1159..034877a7690 100644 --- a/drivers/net/ti/davinci_emac.c +++ b/drivers/net/ti/davinci_emac.c @@ -21,7 +21,7 @@ * ver. 1.0: Sep 2005, Anant Gole - Created EMAC version for uBoot. * ver 1.1: Nov 2005, Anant Gole - Extended the RX logic for multiple descriptors */ -#include +#include #include #include #include diff --git a/drivers/net/ti/keystone_net.c b/drivers/net/ti/keystone_net.c index c6e5bf21cf0..43dbf3f1067 100644 --- a/drivers/net/ti/keystone_net.c +++ b/drivers/net/ti/keystone_net.c @@ -5,6 +5,7 @@ * (C) Copyright 2012-2014 * Texas Instruments Incorporated, */ +#include #include #include #include diff --git a/drivers/net/tsec.c b/drivers/net/tsec.c index 6481ee24a60..8833e3098d5 100644 --- a/drivers/net/tsec.c +++ b/drivers/net/tsec.c @@ -8,6 +8,7 @@ */ #include +#include #include #include #include diff --git a/drivers/net/vsc7385.c b/drivers/net/vsc7385.c index bd1869dfc83..09883f06be2 100644 --- a/drivers/net/vsc7385.c +++ b/drivers/net/vsc7385.c @@ -13,6 +13,7 @@ */ #include +#include #include #include #include diff --git a/drivers/net/xilinx_axi_emac.c b/drivers/net/xilinx_axi_emac.c index a1a39f61488..ef151ee51b4 100644 --- a/drivers/net/xilinx_axi_emac.c +++ b/drivers/net/xilinx_axi_emac.c @@ -7,6 +7,7 @@ */ #include +#include #include #include #include diff --git a/drivers/net/xilinx_axi_mrmac.c b/drivers/net/xilinx_axi_mrmac.c index 555651937f8..410fb25ddef 100644 --- a/drivers/net/xilinx_axi_mrmac.c +++ b/drivers/net/xilinx_axi_mrmac.c @@ -9,6 +9,7 @@ */ #include +#include #include #include #include diff --git a/drivers/net/xilinx_emaclite.c b/drivers/net/xilinx_emaclite.c index c25ac2e6600..16ba915fbaa 100644 --- a/drivers/net/xilinx_emaclite.c +++ b/drivers/net/xilinx_emaclite.c @@ -6,6 +6,7 @@ * Michal SIMEK */ +#include #include #include #include diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c index b41ee95892e..7c57d32614f 100644 --- a/drivers/net/zynq_gem.c +++ b/drivers/net/zynq_gem.c @@ -9,6 +9,7 @@ */ #include +#include #include #include #include diff --git a/drivers/nvme/nvme-uclass.c b/drivers/nvme/nvme-uclass.c index 44c88ad27f3..f3af6a27b63 100644 --- a/drivers/nvme/nvme-uclass.c +++ b/drivers/nvme/nvme-uclass.c @@ -6,6 +6,7 @@ #define LOG_CATEGORY UCLASS_NVME +#include #include #include #include diff --git a/drivers/nvme/nvme.c b/drivers/nvme/nvme.c index 7c58ceb78f5..59a139baa0b 100644 --- a/drivers/nvme/nvme.c +++ b/drivers/nvme/nvme.c @@ -4,6 +4,7 @@ * Copyright (C) 2017 Bin Meng */ +#include #include #include #include diff --git a/drivers/nvme/nvme_apple.c b/drivers/nvme/nvme_apple.c index 7e7538553e3..819b748dc02 100644 --- a/drivers/nvme/nvme_apple.c +++ b/drivers/nvme/nvme_apple.c @@ -3,6 +3,7 @@ * (C) Copyright 2021 Mark Kettenis */ +#include #include #include #include diff --git a/drivers/nvme/nvme_pci.c b/drivers/nvme/nvme_pci.c index c24f8cf1eb1..5bb43d299fc 100644 --- a/drivers/nvme/nvme_pci.c +++ b/drivers/nvme/nvme_pci.c @@ -4,6 +4,7 @@ * Copyright (C) 2017 Bin Meng */ +#include #include #include #include diff --git a/drivers/nvme/nvme_show.c b/drivers/nvme/nvme_show.c index 158102363e9..72cbac82bcc 100644 --- a/drivers/nvme/nvme_show.c +++ b/drivers/nvme/nvme_show.c @@ -4,6 +4,7 @@ * Copyright (C) 2017 Bin Meng */ +#include #include #include #include diff --git a/drivers/pch/pch-uclass.c b/drivers/pch/pch-uclass.c index 9af24758004..af028f9ceca 100644 --- a/drivers/pch/pch-uclass.c +++ b/drivers/pch/pch-uclass.c @@ -6,6 +6,7 @@ #define LOG_CATEGORY UCLASS_PCH +#include #include #include diff --git a/drivers/pch/pch7.c b/drivers/pch/pch7.c index 4ef82a77e27..5fb35a19eff 100644 --- a/drivers/pch/pch7.c +++ b/drivers/pch/pch7.c @@ -3,6 +3,7 @@ * Copyright (C) 2014 Google, Inc */ +#include #include #include #include diff --git a/drivers/pch/pch9.c b/drivers/pch/pch9.c index 24b0465efde..3137eb2c28f 100644 --- a/drivers/pch/pch9.c +++ b/drivers/pch/pch9.c @@ -5,6 +5,7 @@ #define LOG_CATEGORY UCLASS_PCH +#include #include #include #include diff --git a/drivers/pch/sandbox_pch.c b/drivers/pch/sandbox_pch.c index aa82dca560f..37c368954b4 100644 --- a/drivers/pch/sandbox_pch.c +++ b/drivers/pch/sandbox_pch.c @@ -3,6 +3,7 @@ * Copyright 2018 Google LLC */ +#include #include #include diff --git a/drivers/pci/pci-aardvark.c b/drivers/pci/pci-aardvark.c index f5db4bdb760..af0e55cd2f2 100644 --- a/drivers/pci/pci-aardvark.c +++ b/drivers/pci/pci-aardvark.c @@ -25,6 +25,7 @@ * */ +#include #include #include #include diff --git a/drivers/pci/pci-emul-uclass.c b/drivers/pci/pci-emul-uclass.c index 166ee9fcd43..a0b8afb87a0 100644 --- a/drivers/pci/pci-emul-uclass.c +++ b/drivers/pci/pci-emul-uclass.c @@ -4,6 +4,7 @@ * Written by Simon Glass */ +#include #include #include #include diff --git a/drivers/pci/pci-rcar-gen2.c b/drivers/pci/pci-rcar-gen2.c index 12c31e74087..b81eb353689 100644 --- a/drivers/pci/pci-rcar-gen2.c +++ b/drivers/pci/pci-rcar-gen2.c @@ -5,7 +5,7 @@ * Copyright (C) 2018 Marek Vasut */ -#include +#include #include #include #include diff --git a/drivers/pci/pci-rcar-gen3.c b/drivers/pci/pci-rcar-gen3.c index 76878246f1e..1252ef74c58 100644 --- a/drivers/pci/pci-rcar-gen3.c +++ b/drivers/pci/pci-rcar-gen3.c @@ -15,6 +15,7 @@ * Author: Phil Edworthy */ +#include #include #include #include diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c index 6571e653049..1a48256de03 100644 --- a/drivers/pci/pci-uclass.c +++ b/drivers/pci/pci-uclass.c @@ -6,6 +6,7 @@ #define LOG_CATEGORY UCLASS_PCI +#include #include #include #include diff --git a/drivers/pci/pci_auto.c b/drivers/pci/pci_auto.c index 90f81886445..01230360bad 100644 --- a/drivers/pci/pci_auto.c +++ b/drivers/pci/pci_auto.c @@ -8,7 +8,7 @@ * Copyright (c) 2021 Maciej W. Rozycki */ -#include +#include #include #include #include diff --git a/drivers/pci/pci_auto_common.c b/drivers/pci/pci_auto_common.c index cfa818ed821..2f4aff01049 100644 --- a/drivers/pci/pci_auto_common.c +++ b/drivers/pci/pci_auto_common.c @@ -11,6 +11,7 @@ * Written by Simon Glass */ +#include #include #include #include diff --git a/drivers/pci/pci_common.c b/drivers/pci/pci_common.c index a57cf11cc53..a18251297fd 100644 --- a/drivers/pci/pci_common.c +++ b/drivers/pci/pci_common.c @@ -9,6 +9,7 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ +#include #include #include #include diff --git a/drivers/pci/pci_compat.c b/drivers/pci/pci_compat.c index 8233925e525..9dddca8efe0 100644 --- a/drivers/pci/pci_compat.c +++ b/drivers/pci/pci_compat.c @@ -4,6 +4,7 @@ * * Copyright (C) 2014 Google, Inc */ +#include #include #include #include diff --git a/drivers/pci/pci_ftpci100.c b/drivers/pci/pci_ftpci100.c index 43275b3d6a2..a1775445005 100644 --- a/drivers/pci/pci_ftpci100.c +++ b/drivers/pci/pci_ftpci100.c @@ -1,5 +1,6 @@ // SPDX-License-Identifier: GPL-2.0-or-later +#include #include #include #include diff --git a/drivers/pci/pci_mpc85xx.c b/drivers/pci/pci_mpc85xx.c index c07feba7976..249cfe66466 100644 --- a/drivers/pci/pci_mpc85xx.c +++ b/drivers/pci/pci_mpc85xx.c @@ -4,6 +4,7 @@ * Heiko Schocher, DENX Software Engineering, hs@denx.de. * */ +#include #include #include #include diff --git a/drivers/pci/pci_mvebu.c b/drivers/pci/pci_mvebu.c index 77815513b76..83559550e6f 100644 --- a/drivers/pci/pci_mvebu.c +++ b/drivers/pci/pci_mvebu.c @@ -10,6 +10,7 @@ * Pali Rohár */ +#include #include #include #include diff --git a/drivers/pci/pci_rom.c b/drivers/pci/pci_rom.c index 78e5de937cd..438583aa017 100644 --- a/drivers/pci/pci_rom.c +++ b/drivers/pci/pci_rom.c @@ -24,6 +24,7 @@ #define LOG_CATEGORY UCLASS_PCI +#include #include #include #include @@ -35,7 +36,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/pci/pci_sandbox.c b/drivers/pci/pci_sandbox.c index fed0850458d..ca44d002371 100644 --- a/drivers/pci/pci_sandbox.c +++ b/drivers/pci/pci_sandbox.c @@ -4,6 +4,7 @@ * Written by Simon Glass */ +#include #include #include #include diff --git a/drivers/pci/pci_sh7751.c b/drivers/pci/pci_sh7751.c index 3cd01e9b94a..c1be56ce7a0 100644 --- a/drivers/pci/pci_sh7751.c +++ b/drivers/pci/pci_sh7751.c @@ -5,7 +5,7 @@ * (C) 2007,2008 Nobuhiro Iwamatsu */ -#include +#include #include #include #include diff --git a/drivers/pci/pci_tegra.c b/drivers/pci/pci_tegra.c index bb8832c6ab9..d6374a58e33 100644 --- a/drivers/pci/pci_tegra.c +++ b/drivers/pci/pci_tegra.c @@ -11,6 +11,7 @@ #define pr_fmt(fmt) "tegra-pcie: " fmt +#include #include #include #include diff --git a/drivers/pci/pci_x86.c b/drivers/pci/pci_x86.c index ab76166451c..8d036930e73 100644 --- a/drivers/pci/pci_x86.c +++ b/drivers/pci/pci_x86.c @@ -3,6 +3,7 @@ * Copyright (c) 2015 Google, Inc */ +#include #include #include #include diff --git a/drivers/pci/pcie_apple.c b/drivers/pci/pcie_apple.c index 6a8e715d4b6..21bafba3b0e 100644 --- a/drivers/pci/pcie_apple.c +++ b/drivers/pci/pcie_apple.c @@ -16,6 +16,7 @@ * Author: Marc Zyngier */ +#include #include #include #include diff --git a/drivers/pci/pcie_brcmstb.c b/drivers/pci/pcie_brcmstb.c index f978c64365c..cd45f0bee9b 100644 --- a/drivers/pci/pcie_brcmstb.c +++ b/drivers/pci/pcie_brcmstb.c @@ -12,6 +12,7 @@ * Copyright (C) 2020 Nicolas Saenz Julienne */ +#include #include #include #include diff --git a/drivers/pci/pcie_dw_common.c b/drivers/pci/pcie_dw_common.c index 0673e516c6f..74fb6df412c 100644 --- a/drivers/pci/pcie_dw_common.c +++ b/drivers/pci/pcie_dw_common.c @@ -8,6 +8,7 @@ * Copyright (C) 2018 Texas Instruments, Inc */ +#include #include #include #include diff --git a/drivers/pci/pcie_dw_meson.c b/drivers/pci/pcie_dw_meson.c index bb78e7874b1..f953797908b 100644 --- a/drivers/pci/pcie_dw_meson.c +++ b/drivers/pci/pcie_dw_meson.c @@ -9,6 +9,7 @@ * Copyright (c) 2021 Rockchip, Inc. */ +#include #include #include #include diff --git a/drivers/pci/pcie_dw_mvebu.c b/drivers/pci/pcie_dw_mvebu.c index 43b919175c9..c41f3f15304 100644 --- a/drivers/pci/pcie_dw_mvebu.c +++ b/drivers/pci/pcie_dw_mvebu.c @@ -10,11 +10,10 @@ * - drivers/pci/pcie_xilinx.c */ -#include +#include #include #include #include -#include #include #include #include diff --git a/drivers/pci/pcie_dw_rockchip.c b/drivers/pci/pcie_dw_rockchip.c index 1bad51fb3eb..bc4635f6713 100644 --- a/drivers/pci/pcie_dw_rockchip.c +++ b/drivers/pci/pcie_dw_rockchip.c @@ -5,6 +5,7 @@ * Copyright (c) 2021 Rockchip, Inc. */ +#include #include #include #include diff --git a/drivers/pci/pcie_dw_sifive.c b/drivers/pci/pcie_dw_sifive.c index 6285edf4b03..fac3f182372 100644 --- a/drivers/pci/pcie_dw_sifive.c +++ b/drivers/pci/pcie_dw_sifive.c @@ -14,6 +14,7 @@ #include #include #include +#include #include #include #include diff --git a/drivers/pci/pcie_dw_ti.c b/drivers/pci/pcie_dw_ti.c index 78a5d035865..4195a02de39 100644 --- a/drivers/pci/pcie_dw_ti.c +++ b/drivers/pci/pcie_dw_ti.c @@ -3,6 +3,7 @@ * Copyright (C) 2018 Texas Instruments, Inc */ +#include #include #include #include diff --git a/drivers/pci/pcie_ecam_generic.c b/drivers/pci/pcie_ecam_generic.c index 3cb2bbbccb4..f5bc6e3d92d 100644 --- a/drivers/pci/pcie_ecam_generic.c +++ b/drivers/pci/pcie_ecam_generic.c @@ -7,6 +7,7 @@ * Copyright (C) 2016 Imagination Technologies */ +#include #include #include #include diff --git a/drivers/pci/pcie_ecam_synquacer.c b/drivers/pci/pcie_ecam_synquacer.c index fc855dfca4e..e3e22891088 100644 --- a/drivers/pci/pcie_ecam_synquacer.c +++ b/drivers/pci/pcie_ecam_synquacer.c @@ -8,6 +8,7 @@ * Copyright (C) 2021 Linaro Ltd. */ +#include #include #include #include diff --git a/drivers/pci/pcie_fsl.c b/drivers/pci/pcie_fsl.c index 18af23c9504..ec917ee7d5b 100644 --- a/drivers/pci/pcie_fsl.c +++ b/drivers/pci/pcie_fsl.c @@ -6,7 +6,7 @@ * Author: Hou Zhiqiang */ -#include +#include #include #include #include diff --git a/drivers/pci/pcie_fsl_fixup.c b/drivers/pci/pcie_fsl_fixup.c index 9187e7af746..f4e227895d1 100644 --- a/drivers/pci/pcie_fsl_fixup.c +++ b/drivers/pci/pcie_fsl_fixup.c @@ -6,6 +6,7 @@ * Author: Hou Zhiqiang */ +#include #ifdef CONFIG_OF_BOARD_SETUP #include #include diff --git a/drivers/pci/pcie_imx.c b/drivers/pci/pcie_imx.c index 11c4ccbfc55..78f2c7d6bcd 100644 --- a/drivers/pci/pcie_imx.c +++ b/drivers/pci/pcie_imx.c @@ -17,6 +17,7 @@ * those too in order to have a single modern PCIe iMX driver. */ +#include #include #include #include diff --git a/drivers/pci/pcie_intel_fpga.c b/drivers/pci/pcie_intel_fpga.c index 959fd369086..60195cfe1b6 100644 --- a/drivers/pci/pcie_intel_fpga.c +++ b/drivers/pci/pcie_intel_fpga.c @@ -6,6 +6,7 @@ * */ +#include #include #include #include diff --git a/drivers/pci/pcie_iproc.c b/drivers/pci/pcie_iproc.c index 360ef1b011f..d6d3a9e2025 100644 --- a/drivers/pci/pcie_iproc.c +++ b/drivers/pci/pcie_iproc.c @@ -4,6 +4,7 @@ * */ +#include #include #include #include diff --git a/drivers/pci/pcie_layerscape.c b/drivers/pci/pcie_layerscape.c index 1be33095b9c..3c7c4ca18e8 100644 --- a/drivers/pci/pcie_layerscape.c +++ b/drivers/pci/pcie_layerscape.c @@ -5,6 +5,7 @@ * Layerscape PCIe driver */ +#include #include #include #include diff --git a/drivers/pci/pcie_layerscape_ep.c b/drivers/pci/pcie_layerscape_ep.c index 3520488b345..83f7eebd627 100644 --- a/drivers/pci/pcie_layerscape_ep.c +++ b/drivers/pci/pcie_layerscape_ep.c @@ -4,7 +4,7 @@ * Layerscape PCIe EP driver */ -#include +#include #include #include #include diff --git a/drivers/pci/pcie_layerscape_fixup.c b/drivers/pci/pcie_layerscape_fixup.c index ec4a7e7b657..c5198353957 100644 --- a/drivers/pci/pcie_layerscape_fixup.c +++ b/drivers/pci/pcie_layerscape_fixup.c @@ -5,6 +5,7 @@ * Layerscape PCIe driver */ +#include #include #include #include diff --git a/drivers/pci/pcie_layerscape_fixup_common.c b/drivers/pci/pcie_layerscape_fixup_common.c index f37e37f6b15..095874a9276 100644 --- a/drivers/pci/pcie_layerscape_fixup_common.c +++ b/drivers/pci/pcie_layerscape_fixup_common.c @@ -7,10 +7,10 @@ * */ +#include #include #include #include -#include #include #include #include "pcie_layerscape_fixup_common.h" diff --git a/drivers/pci/pcie_layerscape_gen4.c b/drivers/pci/pcie_layerscape_gen4.c index 57dc91f2fae..021c975869f 100644 --- a/drivers/pci/pcie_layerscape_gen4.c +++ b/drivers/pci/pcie_layerscape_gen4.c @@ -6,7 +6,7 @@ * Author: Hou Zhiqiang */ -#include +#include #include #include #include diff --git a/drivers/pci/pcie_layerscape_gen4_fixup.c b/drivers/pci/pcie_layerscape_gen4_fixup.c index 60c4338bcdb..b2a45bf105c 100644 --- a/drivers/pci/pcie_layerscape_gen4_fixup.c +++ b/drivers/pci/pcie_layerscape_gen4_fixup.c @@ -7,6 +7,7 @@ * */ +#include #include #include #include diff --git a/drivers/pci/pcie_layerscape_rc.c b/drivers/pci/pcie_layerscape_rc.c index e7913d43a8b..6a5bf88da23 100644 --- a/drivers/pci/pcie_layerscape_rc.c +++ b/drivers/pci/pcie_layerscape_rc.c @@ -4,6 +4,7 @@ * Layerscape PCIe driver */ +#include #include #include #include diff --git a/drivers/pci/pcie_mediatek.c b/drivers/pci/pcie_mediatek.c index 04d8cc29afd..f0f34b5d119 100644 --- a/drivers/pci/pcie_mediatek.c +++ b/drivers/pci/pcie_mediatek.c @@ -7,6 +7,7 @@ * Honghui Zhang */ +#include #include #include #include diff --git a/drivers/pci/pcie_phytium.c b/drivers/pci/pcie_phytium.c index 94de89bcad7..3bd1f5cd6d9 100644 --- a/drivers/pci/pcie_phytium.c +++ b/drivers/pci/pcie_phytium.c @@ -7,6 +7,7 @@ * Copyright (C) 2019 */ +#include #include #include #include diff --git a/drivers/pci/pcie_plda_common.c b/drivers/pci/pcie_plda_common.c index 622a5cee109..cd74bb47116 100644 --- a/drivers/pci/pcie_plda_common.c +++ b/drivers/pci/pcie_plda_common.c @@ -6,6 +6,7 @@ * */ +#include #include #include #include diff --git a/drivers/pci/pcie_rockchip.c b/drivers/pci/pcie_rockchip.c index 19f9e58a640..624841e9d8b 100644 --- a/drivers/pci/pcie_rockchip.c +++ b/drivers/pci/pcie_rockchip.c @@ -11,6 +11,7 @@ * Bits taken from Linux Rockchip PCIe host controller. */ +#include #include #include #include diff --git a/drivers/pci/pcie_starfive_jh7110.c b/drivers/pci/pcie_starfive_jh7110.c index 569fbfd35c8..903a544d37f 100644 --- a/drivers/pci/pcie_starfive_jh7110.c +++ b/drivers/pci/pcie_starfive_jh7110.c @@ -7,6 +7,7 @@ * */ +#include #include #include #include diff --git a/drivers/pci/pcie_uniphier.c b/drivers/pci/pcie_uniphier.c index d1170b576bc..f2edea9899a 100644 --- a/drivers/pci/pcie_uniphier.c +++ b/drivers/pci/pcie_uniphier.c @@ -5,6 +5,7 @@ */ #include +#include #include #include #include diff --git a/drivers/pci/pcie_xilinx.c b/drivers/pci/pcie_xilinx.c index a674ab04bee..3db460b5f93 100644 --- a/drivers/pci/pcie_xilinx.c +++ b/drivers/pci/pcie_xilinx.c @@ -5,6 +5,7 @@ * Copyright (C) 2016 Imagination Technologies */ +#include #include #include #include diff --git a/drivers/pci_endpoint/pci_ep-uclass.c b/drivers/pci_endpoint/pci_ep-uclass.c index 902d1a51eaa..6ee4cfbdb4a 100644 --- a/drivers/pci_endpoint/pci_ep-uclass.c +++ b/drivers/pci_endpoint/pci_ep-uclass.c @@ -11,6 +11,7 @@ #define LOG_CATEGORY UCLASS_PCI_EP +#include #include #include #include diff --git a/drivers/pci_endpoint/pcie-cadence-ep.c b/drivers/pci_endpoint/pcie-cadence-ep.c index e02ea14e4e4..d58c64982b2 100644 --- a/drivers/pci_endpoint/pcie-cadence-ep.c +++ b/drivers/pci_endpoint/pcie-cadence-ep.c @@ -4,6 +4,7 @@ * Written by Ramon Fried */ +#include #include #include #include diff --git a/drivers/pci_endpoint/sandbox-pci_ep.c b/drivers/pci_endpoint/sandbox-pci_ep.c index aa623fa357d..de148cddb91 100644 --- a/drivers/pci_endpoint/sandbox-pci_ep.c +++ b/drivers/pci_endpoint/sandbox-pci_ep.c @@ -3,6 +3,7 @@ * Copyright (c) 2019 Ramon Fried */ +#include #include #include #include diff --git a/drivers/phy/allwinner/phy-sun4i-usb.c b/drivers/phy/allwinner/phy-sun4i-usb.c index b9306c9a827..6624e9134f4 100644 --- a/drivers/phy/allwinner/phy-sun4i-usb.c +++ b/drivers/phy/allwinner/phy-sun4i-usb.c @@ -10,6 +10,7 @@ * SPDX-License-Identifier: GPL-2.0+ */ +#include #include #include #include diff --git a/drivers/phy/bcm6318-usbh-phy.c b/drivers/phy/bcm6318-usbh-phy.c index d715541bd4c..a2fa446cb1c 100644 --- a/drivers/phy/bcm6318-usbh-phy.c +++ b/drivers/phy/bcm6318-usbh-phy.c @@ -7,6 +7,7 @@ * Copyright 2013 Florian Fainelli */ +#include #include #include #include diff --git a/drivers/phy/bcm6348-usbh-phy.c b/drivers/phy/bcm6348-usbh-phy.c index ffb37b634a3..857fb575ef1 100644 --- a/drivers/phy/bcm6348-usbh-phy.c +++ b/drivers/phy/bcm6348-usbh-phy.c @@ -7,6 +7,7 @@ * Copyright 2013 Florian Fainelli */ +#include #include #include #include diff --git a/drivers/phy/bcm6358-usbh-phy.c b/drivers/phy/bcm6358-usbh-phy.c index a8d24609bfc..bfdcfb0d245 100644 --- a/drivers/phy/bcm6358-usbh-phy.c +++ b/drivers/phy/bcm6358-usbh-phy.c @@ -7,6 +7,7 @@ * Copyright 2013 Florian Fainelli */ +#include #include #include #include diff --git a/drivers/phy/bcm6368-usbh-phy.c b/drivers/phy/bcm6368-usbh-phy.c index 5bee130425d..1a2870d5149 100644 --- a/drivers/phy/bcm6368-usbh-phy.c +++ b/drivers/phy/bcm6368-usbh-phy.c @@ -7,6 +7,7 @@ * Copyright 2013 Florian Fainelli */ +#include #include #include #include diff --git a/drivers/phy/cadence/phy-cadence-sierra.c b/drivers/phy/cadence/phy-cadence-sierra.c index f5e23f36c56..4bb8a0ca7f3 100644 --- a/drivers/phy/cadence/phy-cadence-sierra.c +++ b/drivers/phy/cadence/phy-cadence-sierra.c @@ -11,6 +11,7 @@ * Jean-Jacques Hiblot * */ +#include #include #include #include diff --git a/drivers/phy/cadence/phy-cadence-torrent.c b/drivers/phy/cadence/phy-cadence-torrent.c index d4e8ece4935..ef924e7af50 100644 --- a/drivers/phy/cadence/phy-cadence-torrent.c +++ b/drivers/phy/cadence/phy-cadence-torrent.c @@ -10,6 +10,7 @@ * */ +#include #include #include #include diff --git a/drivers/phy/keystone-usb-phy.c b/drivers/phy/keystone-usb-phy.c index cfc15203d63..3bb9c0814c1 100644 --- a/drivers/phy/keystone-usb-phy.c +++ b/drivers/phy/keystone-usb-phy.c @@ -4,6 +4,7 @@ * Written by Jean-Jacques Hiblot */ +#include #include #include #include diff --git a/drivers/phy/marvell/comphy_a3700.c b/drivers/phy/marvell/comphy_a3700.c index bca325d1996..c490dc69c69 100644 --- a/drivers/phy/marvell/comphy_a3700.c +++ b/drivers/phy/marvell/comphy_a3700.c @@ -3,6 +3,7 @@ * Copyright (C) 2015-2016 Marvell International Ltd. */ +#include #include #include #include diff --git a/drivers/phy/marvell/comphy_core.c b/drivers/phy/marvell/comphy_core.c index a666a4e794e..7272dfb9fe8 100644 --- a/drivers/phy/marvell/comphy_core.c +++ b/drivers/phy/marvell/comphy_core.c @@ -5,6 +5,7 @@ * Copyright (C) 2016 Stefan Roese */ +#include #include #include #include diff --git a/drivers/phy/marvell/comphy_cp110.c b/drivers/phy/marvell/comphy_cp110.c index b8cdedf6edf..bb15fbaf347 100644 --- a/drivers/phy/marvell/comphy_cp110.c +++ b/drivers/phy/marvell/comphy_cp110.c @@ -3,6 +3,7 @@ * Copyright (C) 2015-2016 Marvell International Ltd. */ +#include #include #include #include @@ -11,7 +12,6 @@ #include #include #include -#include #include #include "comphy_core.h" diff --git a/drivers/phy/marvell/comphy_mux.c b/drivers/phy/marvell/comphy_mux.c index a8aa37fc46f..10981d25ec9 100644 --- a/drivers/phy/marvell/comphy_mux.c +++ b/drivers/phy/marvell/comphy_mux.c @@ -3,6 +3,7 @@ * Copyright (C) 2015-2016 Marvell International Ltd. */ +#include #include #include diff --git a/drivers/phy/meson-axg-mipi-dphy.c b/drivers/phy/meson-axg-mipi-dphy.c index 3f89de19970..faa1d9d6d37 100644 --- a/drivers/phy/meson-axg-mipi-dphy.c +++ b/drivers/phy/meson-axg-mipi-dphy.c @@ -7,6 +7,7 @@ * Author: Neil Armstrong */ +#include #include #include #include diff --git a/drivers/phy/meson-axg-mipi-pcie-analog.c b/drivers/phy/meson-axg-mipi-pcie-analog.c index 731917cef43..236ea1ce5ca 100644 --- a/drivers/phy/meson-axg-mipi-pcie-analog.c +++ b/drivers/phy/meson-axg-mipi-pcie-analog.c @@ -7,6 +7,7 @@ * Author: Neil Armstrong */ +#include #include #include #include diff --git a/drivers/phy/meson-g12a-usb2.c b/drivers/phy/meson-g12a-usb2.c index 8cded12438b..3958d2404b8 100644 --- a/drivers/phy/meson-g12a-usb2.c +++ b/drivers/phy/meson-g12a-usb2.c @@ -7,6 +7,7 @@ * Author: Neil Armstrong */ +#include #include #include #include diff --git a/drivers/phy/meson-g12a-usb3-pcie.c b/drivers/phy/meson-g12a-usb3-pcie.c index 4d183867c3a..1eaff410efa 100644 --- a/drivers/phy/meson-g12a-usb3-pcie.c +++ b/drivers/phy/meson-g12a-usb3-pcie.c @@ -7,6 +7,7 @@ * Author: Neil Armstrong */ +#include #include #include #include diff --git a/drivers/phy/meson-gxbb-usb2.c b/drivers/phy/meson-gxbb-usb2.c index 4c88ccf3927..725b056a71a 100644 --- a/drivers/phy/meson-gxbb-usb2.c +++ b/drivers/phy/meson-gxbb-usb2.c @@ -8,6 +8,7 @@ * Author: Beniamino Galvani */ +#include #include #include #include diff --git a/drivers/phy/meson-gxl-usb2.c b/drivers/phy/meson-gxl-usb2.c index 92c285103c4..d633effa404 100644 --- a/drivers/phy/meson-gxl-usb2.c +++ b/drivers/phy/meson-gxl-usb2.c @@ -7,6 +7,7 @@ * Author: Neil Armstrong */ +#include #include #include #include diff --git a/drivers/phy/mt76x8-usb-phy.c b/drivers/phy/mt76x8-usb-phy.c index 99f8a221f5a..4069208b679 100644 --- a/drivers/phy/mt76x8-usb-phy.c +++ b/drivers/phy/mt76x8-usb-phy.c @@ -7,6 +7,7 @@ */ #include +#include #include #include #include diff --git a/drivers/phy/nop-phy.c b/drivers/phy/nop-phy.c index 286171cba76..c53e3216d0f 100644 --- a/drivers/phy/nop-phy.c +++ b/drivers/phy/nop-phy.c @@ -5,6 +5,7 @@ */ #include +#include #include #include #include diff --git a/drivers/phy/omap-usb2-phy.c b/drivers/phy/omap-usb2-phy.c index 2be0178882a..d3d38062ecf 100644 --- a/drivers/phy/omap-usb2-phy.c +++ b/drivers/phy/omap-usb2-phy.c @@ -6,6 +6,7 @@ * Written by Jean-Jacques Hiblot */ +#include #include #include #include diff --git a/drivers/phy/phy-ab8500-usb.c b/drivers/phy/phy-ab8500-usb.c index 5de7b6f86cc..3d3d48c9733 100644 --- a/drivers/phy/phy-ab8500-usb.c +++ b/drivers/phy/phy-ab8500-usb.c @@ -1,6 +1,7 @@ // SPDX-License-Identifier: GPL-2.0+ /* Copyright (C) 2019 Stephan Gerhold */ +#include #include #include #include diff --git a/drivers/phy/phy-apple-atc.c b/drivers/phy/phy-apple-atc.c index 78eedf676b0..15c5b8a1c2d 100644 --- a/drivers/phy/phy-apple-atc.c +++ b/drivers/phy/phy-apple-atc.c @@ -3,6 +3,7 @@ * Copyright (C) 2022 Mark Kettenis */ +#include #include #include #include diff --git a/drivers/phy/phy-bcm-sr-pcie.c b/drivers/phy/phy-bcm-sr-pcie.c index 97859a0cb87..cf33bab3707 100644 --- a/drivers/phy/phy-bcm-sr-pcie.c +++ b/drivers/phy/phy-bcm-sr-pcie.c @@ -3,6 +3,7 @@ * Copyright (C) 2019 Broadcom */ +#include #include #include #include diff --git a/drivers/phy/phy-core-mipi-dphy.c b/drivers/phy/phy-core-mipi-dphy.c index 8fb985a1e68..bb61816add2 100644 --- a/drivers/phy/phy-core-mipi-dphy.c +++ b/drivers/phy/phy-core-mipi-dphy.c @@ -4,8 +4,8 @@ * Copyright (C) 2018 Cadence Design Systems Inc. */ +#include #include -#include #include #include diff --git a/drivers/phy/phy-da8xx-usb.c b/drivers/phy/phy-da8xx-usb.c index cf26aaaa3d8..d025188eae9 100644 --- a/drivers/phy/phy-da8xx-usb.c +++ b/drivers/phy/phy-da8xx-usb.c @@ -6,9 +6,9 @@ * DT support added by: Adam Ford */ +#include #include #include -#include #include #include #include diff --git a/drivers/phy/phy-imx8mq-usb.c b/drivers/phy/phy-imx8mq-usb.c index 75763046adc..e5e96e77a68 100644 --- a/drivers/phy/phy-imx8mq-usb.c +++ b/drivers/phy/phy-imx8mq-usb.c @@ -4,6 +4,7 @@ * */ +#include #include #include #include diff --git a/drivers/phy/phy-mtk-tphy.c b/drivers/phy/phy-mtk-tphy.c index 6f9ac1528e8..ea9edf212c6 100644 --- a/drivers/phy/phy-mtk-tphy.c +++ b/drivers/phy/phy-mtk-tphy.c @@ -5,6 +5,7 @@ * Ryder Lee */ +#include #include #include #include diff --git a/drivers/phy/phy-npcm-usb.c b/drivers/phy/phy-npcm-usb.c index 028fedf92dc..24eba665543 100644 --- a/drivers/phy/phy-npcm-usb.c +++ b/drivers/phy/phy-npcm-usb.c @@ -3,6 +3,7 @@ * Copyright (c) 2021 Nuvoton Technology Corp. */ +#include #include #include #include diff --git a/drivers/phy/phy-rcar-gen2.c b/drivers/phy/phy-rcar-gen2.c index f9428c7ad12..e528c4ec579 100644 --- a/drivers/phy/phy-rcar-gen2.c +++ b/drivers/phy/phy-rcar-gen2.c @@ -5,6 +5,7 @@ * Copyright (C) 2018 Marek Vasut */ +#include #include #include #include diff --git a/drivers/phy/phy-rcar-gen3.c b/drivers/phy/phy-rcar-gen3.c index 7c292cae0e2..03c747b373b 100644 --- a/drivers/phy/phy-rcar-gen3.c +++ b/drivers/phy/phy-rcar-gen3.c @@ -5,6 +5,7 @@ * Copyright (C) 2018 Marek Vasut */ +#include #include #include #include diff --git a/drivers/phy/phy-stm32-usbphyc.c b/drivers/phy/phy-stm32-usbphyc.c index 8d643b762f9..000e495dbd4 100644 --- a/drivers/phy/phy-stm32-usbphyc.c +++ b/drivers/phy/phy-stm32-usbphyc.c @@ -5,6 +5,7 @@ #define LOG_CATEGORY UCLASS_PHY +#include #include #include #include diff --git a/drivers/phy/phy-ti-am654.c b/drivers/phy/phy-ti-am654.c index c3d9972397a..70a746d2c92 100644 --- a/drivers/phy/phy-ti-am654.c +++ b/drivers/phy/phy-ti-am654.c @@ -6,6 +6,7 @@ * Author: Kishon Vijay Abraham I */ +#include #include #include #include diff --git a/drivers/phy/phy-uclass.c b/drivers/phy/phy-uclass.c index acdcda15b5b..0dcfe258bc4 100644 --- a/drivers/phy/phy-uclass.c +++ b/drivers/phy/phy-uclass.c @@ -6,6 +6,7 @@ #define LOG_CATEGORY UCLASS_PHY +#include #include #include #include diff --git a/drivers/phy/phy-zynqmp.c b/drivers/phy/phy-zynqmp.c index 7049e740d56..d1288bb17f3 100644 --- a/drivers/phy/phy-zynqmp.c +++ b/drivers/phy/phy-zynqmp.c @@ -9,6 +9,7 @@ * Author: Laurent Pinchart */ +#include #include #include #include diff --git a/drivers/phy/qcom/msm8916-usbh-phy.c b/drivers/phy/qcom/msm8916-usbh-phy.c index 4b435aa2a6e..f52046f7cb0 100644 --- a/drivers/phy/qcom/msm8916-usbh-phy.c +++ b/drivers/phy/qcom/msm8916-usbh-phy.c @@ -3,6 +3,7 @@ * Copyright (C) 2018 Ramon Fried */ +#include #include #include #include diff --git a/drivers/phy/qcom/phy-qcom-ipq4019-usb.c b/drivers/phy/qcom/phy-qcom-ipq4019-usb.c index 3b647324e02..5808489249f 100644 --- a/drivers/phy/qcom/phy-qcom-ipq4019-usb.c +++ b/drivers/phy/qcom/phy-qcom-ipq4019-usb.c @@ -8,6 +8,7 @@ */ #include +#include #include #include #include diff --git a/drivers/phy/qcom/phy-qcom-usb-hs-28nm.c b/drivers/phy/qcom/phy-qcom-usb-hs-28nm.c index c344809a608..05a9a2cf1d7 100644 --- a/drivers/phy/qcom/phy-qcom-usb-hs-28nm.c +++ b/drivers/phy/qcom/phy-qcom-usb-hs-28nm.c @@ -5,6 +5,7 @@ * Based on Linux driver */ +#include #include #include #include diff --git a/drivers/phy/qcom/phy-qcom-usb-ss.c b/drivers/phy/qcom/phy-qcom-usb-ss.c index 270d09d883c..1b03a3c43dc 100644 --- a/drivers/phy/qcom/phy-qcom-usb-ss.c +++ b/drivers/phy/qcom/phy-qcom-usb-ss.c @@ -5,6 +5,7 @@ * Based on Linux driver */ +#include #include #include #include diff --git a/drivers/phy/renesas/r8a779f0-ether-serdes.c b/drivers/phy/renesas/r8a779f0-ether-serdes.c index 40284ef2fd3..bd1fdd3a667 100644 --- a/drivers/phy/renesas/r8a779f0-ether-serdes.c +++ b/drivers/phy/renesas/r8a779f0-ether-serdes.c @@ -7,6 +7,7 @@ #include #include #include +#include #include #include #include diff --git a/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c b/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c index 3ad339bccc1..9ca66bf8db9 100644 --- a/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c +++ b/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c @@ -5,6 +5,7 @@ * Copyright (C) 2021 Rockchip Electronics Co., Ltd. */ +#include #include #include #include diff --git a/drivers/phy/rockchip/phy-rockchip-pcie.c b/drivers/phy/rockchip/phy-rockchip-pcie.c index 660037034ec..44ca4bc7919 100644 --- a/drivers/phy/rockchip/phy-rockchip-pcie.c +++ b/drivers/phy/rockchip/phy-rockchip-pcie.c @@ -7,6 +7,7 @@ * Copyright (C) 2016 ROCKCHIP, Inc. */ +#include #include #include #include diff --git a/drivers/phy/rockchip/phy-rockchip-snps-pcie3.c b/drivers/phy/rockchip/phy-rockchip-snps-pcie3.c index 2737bd81dd9..a4392daf4c9 100644 --- a/drivers/phy/rockchip/phy-rockchip-snps-pcie3.c +++ b/drivers/phy/rockchip/phy-rockchip-snps-pcie3.c @@ -5,6 +5,7 @@ * Copyright (C) 2021 Rockchip Electronics Co., Ltd. */ +#include #include #include #include diff --git a/drivers/phy/rockchip/phy-rockchip-typec.c b/drivers/phy/rockchip/phy-rockchip-typec.c index c7459dbc5fc..47c69dd6c45 100644 --- a/drivers/phy/rockchip/phy-rockchip-typec.c +++ b/drivers/phy/rockchip/phy-rockchip-typec.c @@ -8,6 +8,7 @@ * Kever Yang */ +#include #include #include #include diff --git a/drivers/phy/rockchip/phy-rockchip-usbdp.c b/drivers/phy/rockchip/phy-rockchip-usbdp.c index 9deec47ae46..18e76402799 100644 --- a/drivers/phy/rockchip/phy-rockchip-usbdp.c +++ b/drivers/phy/rockchip/phy-rockchip-usbdp.c @@ -5,6 +5,7 @@ * Copyright (C) 2021 Rockchip Electronics Co., Ltd */ +#include #include #include #include diff --git a/drivers/phy/sandbox-phy.c b/drivers/phy/sandbox-phy.c index b159147a765..7e123da25fb 100644 --- a/drivers/phy/sandbox-phy.c +++ b/drivers/phy/sandbox-phy.c @@ -4,6 +4,7 @@ * Written by Jean-Jacques Hiblot */ +#include #include #include diff --git a/drivers/phy/socionext/phy-uniphier-pcie.c b/drivers/phy/socionext/phy-uniphier-pcie.c index 91208dfe120..d352c4ca3a9 100644 --- a/drivers/phy/socionext/phy-uniphier-pcie.c +++ b/drivers/phy/socionext/phy-uniphier-pcie.c @@ -4,6 +4,7 @@ * Copyright 2019-2021 Socionext, Inc. */ +#include #include #include #include diff --git a/drivers/phy/socionext/phy-uniphier-usb3.c b/drivers/phy/socionext/phy-uniphier-usb3.c index 1d65c1f7da5..1d65b0b08f7 100644 --- a/drivers/phy/socionext/phy-uniphier-usb3.c +++ b/drivers/phy/socionext/phy-uniphier-usb3.c @@ -4,6 +4,7 @@ * Copyright 2019-2023 Socionext, Inc. */ +#include #include #include diff --git a/drivers/phy/sti_usb_phy.c b/drivers/phy/sti_usb_phy.c index 2447e89f50d..9e5ac9bfde6 100644 --- a/drivers/phy/sti_usb_phy.c +++ b/drivers/phy/sti_usb_phy.c @@ -4,6 +4,7 @@ * Author(s): Patrice Chotard, for STMicroelectronics. */ +#include #include #include #include diff --git a/drivers/phy/ti-pipe3-phy.c b/drivers/phy/ti-pipe3-phy.c index 62f6cc2bfbf..29a35ae5ffb 100644 --- a/drivers/phy/ti-pipe3-phy.c +++ b/drivers/phy/ti-pipe3-phy.c @@ -4,6 +4,7 @@ * Written by Jean-Jacques Hiblot */ +#include #include #include #include diff --git a/drivers/phy/ti/phy-j721e-wiz.c b/drivers/phy/ti/phy-j721e-wiz.c index c69a342e2b4..daf62f5deda 100644 --- a/drivers/phy/ti/phy-j721e-wiz.c +++ b/drivers/phy/ti/phy-j721e-wiz.c @@ -4,6 +4,7 @@ * Jean-Jacques Hiblot */ +#include #include #include #include diff --git a/drivers/pinctrl/aspeed/pinctrl_ast2500.c b/drivers/pinctrl/aspeed/pinctrl_ast2500.c index 9e7c347caf8..93920a6389b 100644 --- a/drivers/pinctrl/aspeed/pinctrl_ast2500.c +++ b/drivers/pinctrl/aspeed/pinctrl_ast2500.c @@ -3,6 +3,7 @@ * Copyright 2017 Google, Inc */ +#include #include #include #include diff --git a/drivers/pinctrl/aspeed/pinctrl_ast2600.c b/drivers/pinctrl/aspeed/pinctrl_ast2600.c index bc12590e583..8a4f9705ca9 100644 --- a/drivers/pinctrl/aspeed/pinctrl_ast2600.c +++ b/drivers/pinctrl/aspeed/pinctrl_ast2600.c @@ -3,6 +3,7 @@ * Copyright (C) ASPEED Technology Inc. */ +#include #include #include #include diff --git a/drivers/pinctrl/ath79/pinctrl_ar933x.c b/drivers/pinctrl/ath79/pinctrl_ar933x.c index 61e37a2e559..eb673a9f69c 100644 --- a/drivers/pinctrl/ath79/pinctrl_ar933x.c +++ b/drivers/pinctrl/ath79/pinctrl_ar933x.c @@ -3,6 +3,7 @@ * Copyright (C) 2015-2016 Wills Wang */ +#include #include #include #include diff --git a/drivers/pinctrl/ath79/pinctrl_qca953x.c b/drivers/pinctrl/ath79/pinctrl_qca953x.c index e4f695fc4d4..0d534268e96 100644 --- a/drivers/pinctrl/ath79/pinctrl_qca953x.c +++ b/drivers/pinctrl/ath79/pinctrl_qca953x.c @@ -3,6 +3,7 @@ * Copyright (C) 2015-2016 Wills Wang */ +#include #include #include #include diff --git a/drivers/pinctrl/broadcom/pinctrl-bcm283x.c b/drivers/pinctrl/broadcom/pinctrl-bcm283x.c index cf9350c151e..e949cb70900 100644 --- a/drivers/pinctrl/broadcom/pinctrl-bcm283x.c +++ b/drivers/pinctrl/broadcom/pinctrl-bcm283x.c @@ -10,6 +10,7 @@ * https://spdx.org/licenses */ +#include #include #include #include diff --git a/drivers/pinctrl/broadcom/pinctrl-bcm6838.c b/drivers/pinctrl/broadcom/pinctrl-bcm6838.c index 7d0c09a130c..58f28a13709 100644 --- a/drivers/pinctrl/broadcom/pinctrl-bcm6838.c +++ b/drivers/pinctrl/broadcom/pinctrl-bcm6838.c @@ -1,5 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 +#include #include #include #include diff --git a/drivers/pinctrl/exynos/pinctrl-exynos.c b/drivers/pinctrl/exynos/pinctrl-exynos.c index b393127c642..8a045cdf7aa 100644 --- a/drivers/pinctrl/exynos/pinctrl-exynos.c +++ b/drivers/pinctrl/exynos/pinctrl-exynos.c @@ -6,6 +6,7 @@ */ #include +#include #include #include #include diff --git a/drivers/pinctrl/exynos/pinctrl-exynos7420.c b/drivers/pinctrl/exynos/pinctrl-exynos7420.c index 8fdf60715a5..77d510d8f60 100644 --- a/drivers/pinctrl/exynos/pinctrl-exynos7420.c +++ b/drivers/pinctrl/exynos/pinctrl-exynos7420.c @@ -5,6 +5,7 @@ * Thomas Abraham */ +#include #include #include #include diff --git a/drivers/pinctrl/exynos/pinctrl-exynos78x0.c b/drivers/pinctrl/exynos/pinctrl-exynos78x0.c index 61b98443daf..1b696fdfd28 100644 --- a/drivers/pinctrl/exynos/pinctrl-exynos78x0.c +++ b/drivers/pinctrl/exynos/pinctrl-exynos78x0.c @@ -9,6 +9,7 @@ * Thomas Abraham */ +#include #include #include #include diff --git a/drivers/pinctrl/intel/pinctrl.c b/drivers/pinctrl/intel/pinctrl.c index 6cfe83a593a..1607000dedc 100644 --- a/drivers/pinctrl/intel/pinctrl.c +++ b/drivers/pinctrl/intel/pinctrl.c @@ -16,6 +16,7 @@ #define LOG_CATEGORY UCLASS_GPIO +#include #include #include #include diff --git a/drivers/pinctrl/intel/pinctrl_apl.c b/drivers/pinctrl/intel/pinctrl_apl.c index e554d285435..181a6ff2702 100644 --- a/drivers/pinctrl/intel/pinctrl_apl.c +++ b/drivers/pinctrl/intel/pinctrl_apl.c @@ -8,6 +8,7 @@ #define LOG_CATEGORY UCLASS_GPIO +#include #include #include #include diff --git a/drivers/pinctrl/mediatek/pinctrl-mtk-common.c b/drivers/pinctrl/mediatek/pinctrl-mtk-common.c index 37fc28bb779..0baef57c1c2 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mtk-common.c +++ b/drivers/pinctrl/mediatek/pinctrl-mtk-common.c @@ -4,6 +4,7 @@ * Author: Ryder Lee */ +#include #include #include #include diff --git a/drivers/pinctrl/meson/pinctrl-meson-a1.c b/drivers/pinctrl/meson/pinctrl-meson-a1.c index 7e9ac6390b1..30cf3bc0be4 100644 --- a/drivers/pinctrl/meson/pinctrl-meson-a1.c +++ b/drivers/pinctrl/meson/pinctrl-meson-a1.c @@ -6,6 +6,7 @@ * Author: Igor Prusov */ +#include #include #include #include diff --git a/drivers/pinctrl/meson/pinctrl-meson-axg-pmx.c b/drivers/pinctrl/meson/pinctrl-meson-axg-pmx.c index 52c726cf038..cfe94cf9e17 100644 --- a/drivers/pinctrl/meson/pinctrl-meson-axg-pmx.c +++ b/drivers/pinctrl/meson/pinctrl-meson-axg-pmx.c @@ -6,6 +6,7 @@ #include #include +#include #include #include #include diff --git a/drivers/pinctrl/meson/pinctrl-meson-axg.c b/drivers/pinctrl/meson/pinctrl-meson-axg.c index 94e09cd3f8a..820a6c9bb1a 100644 --- a/drivers/pinctrl/meson/pinctrl-meson-axg.c +++ b/drivers/pinctrl/meson/pinctrl-meson-axg.c @@ -7,6 +7,7 @@ * Author: Xingyu Chen */ +#include #include #include #include diff --git a/drivers/pinctrl/meson/pinctrl-meson-g12a.c b/drivers/pinctrl/meson/pinctrl-meson-g12a.c index 24f47f82558..90a4f8056cd 100644 --- a/drivers/pinctrl/meson/pinctrl-meson-g12a.c +++ b/drivers/pinctrl/meson/pinctrl-meson-g12a.c @@ -8,6 +8,7 @@ * Author: Yixun Lan */ +#include #include #include #include diff --git a/drivers/pinctrl/meson/pinctrl-meson-gx-pmx.c b/drivers/pinctrl/meson/pinctrl-meson-gx-pmx.c index 396b3a0e842..99502d89c6c 100644 --- a/drivers/pinctrl/meson/pinctrl-meson-gx-pmx.c +++ b/drivers/pinctrl/meson/pinctrl-meson-gx-pmx.c @@ -5,6 +5,7 @@ #include #include +#include #include #include #include diff --git a/drivers/pinctrl/meson/pinctrl-meson-gxbb.c b/drivers/pinctrl/meson/pinctrl-meson-gxbb.c index 03ae1f9f8a5..93a895c9fa7 100644 --- a/drivers/pinctrl/meson/pinctrl-meson-gxbb.c +++ b/drivers/pinctrl/meson/pinctrl-meson-gxbb.c @@ -6,6 +6,7 @@ * Copyright (C) 2016 Endless Mobile, Inc. */ +#include #include #include #include diff --git a/drivers/pinctrl/meson/pinctrl-meson-gxl.c b/drivers/pinctrl/meson/pinctrl-meson-gxl.c index 16517f95ddb..a44145e2d4e 100644 --- a/drivers/pinctrl/meson/pinctrl-meson-gxl.c +++ b/drivers/pinctrl/meson/pinctrl-meson-gxl.c @@ -6,6 +6,7 @@ * Copyright (C) 2016 Endless Mobile, Inc. */ +#include #include #include #include diff --git a/drivers/pinctrl/meson/pinctrl-meson.c b/drivers/pinctrl/meson/pinctrl-meson.c index babf1bccc96..ee362d8464f 100644 --- a/drivers/pinctrl/meson/pinctrl-meson.c +++ b/drivers/pinctrl/meson/pinctrl-meson.c @@ -3,6 +3,7 @@ * (C) Copyright 2016 - Beniamino Galvani */ +#include #include #include #include diff --git a/drivers/pinctrl/mscc/mscc-common.c b/drivers/pinctrl/mscc/mscc-common.c index 2af5587ec47..307ed1db875 100644 --- a/drivers/pinctrl/mscc/mscc-common.c +++ b/drivers/pinctrl/mscc/mscc-common.c @@ -10,6 +10,7 @@ #include #include +#include #include #include #include diff --git a/drivers/pinctrl/mscc/pinctrl-jr2.c b/drivers/pinctrl/mscc/pinctrl-jr2.c index 4ef4040cd70..cb340581cc0 100644 --- a/drivers/pinctrl/mscc/pinctrl-jr2.c +++ b/drivers/pinctrl/mscc/pinctrl-jr2.c @@ -6,6 +6,7 @@ * Copyright (c) 2018 Microsemi Corporation */ +#include #include #include #include diff --git a/drivers/pinctrl/mscc/pinctrl-luton.c b/drivers/pinctrl/mscc/pinctrl-luton.c index 7707350aace..325c9a9705b 100644 --- a/drivers/pinctrl/mscc/pinctrl-luton.c +++ b/drivers/pinctrl/mscc/pinctrl-luton.c @@ -7,6 +7,7 @@ * Copyright (c) 2018 Microsemi Corporation */ +#include #include #include #include diff --git a/drivers/pinctrl/mscc/pinctrl-ocelot.c b/drivers/pinctrl/mscc/pinctrl-ocelot.c index 826388c2f74..57e2ef0d7c1 100644 --- a/drivers/pinctrl/mscc/pinctrl-ocelot.c +++ b/drivers/pinctrl/mscc/pinctrl-ocelot.c @@ -10,6 +10,7 @@ #include #include +#include #include #include #include diff --git a/drivers/pinctrl/mscc/pinctrl-serval.c b/drivers/pinctrl/mscc/pinctrl-serval.c index 2081cd6750c..a6b9796df81 100644 --- a/drivers/pinctrl/mscc/pinctrl-serval.c +++ b/drivers/pinctrl/mscc/pinctrl-serval.c @@ -6,6 +6,7 @@ * Copyright (c) 2019 Microsemi Corporation */ +#include #include #include #include diff --git a/drivers/pinctrl/mscc/pinctrl-servalt.c b/drivers/pinctrl/mscc/pinctrl-servalt.c index efa4e26d9f7..8e8678580db 100644 --- a/drivers/pinctrl/mscc/pinctrl-servalt.c +++ b/drivers/pinctrl/mscc/pinctrl-servalt.c @@ -6,6 +6,7 @@ * Copyright (c) 2019 Microsemi Corporation */ +#include #include #include #include diff --git a/drivers/pinctrl/mtmips/pinctrl-mt7628.c b/drivers/pinctrl/mtmips/pinctrl-mt7628.c index dc7acec4a77..79c63c7caec 100644 --- a/drivers/pinctrl/mtmips/pinctrl-mt7628.c +++ b/drivers/pinctrl/mtmips/pinctrl-mt7628.c @@ -5,6 +5,7 @@ * Author: Weijie Gao */ +#include #include #include #include diff --git a/drivers/pinctrl/mtmips/pinctrl-mtmips-common.c b/drivers/pinctrl/mtmips/pinctrl-mtmips-common.c index bab34e97b61..869b7810685 100644 --- a/drivers/pinctrl/mtmips/pinctrl-mtmips-common.c +++ b/drivers/pinctrl/mtmips/pinctrl-mtmips-common.c @@ -5,6 +5,7 @@ * Author: Weijie Gao */ +#include #include #include #include diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c index 64036296e24..e834dddfd13 100644 --- a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c +++ b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c @@ -16,6 +16,7 @@ * https://spdx.org/licenses */ +#include #include #include #include diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-38x.c b/drivers/pinctrl/mvebu/pinctrl-armada-38x.c index 78184d2860a..252151f3e5d 100644 --- a/drivers/pinctrl/mvebu/pinctrl-armada-38x.c +++ b/drivers/pinctrl/mvebu/pinctrl-armada-38x.c @@ -1,6 +1,7 @@ // SPDX-License-Identifier: GPL-2.0-or-later // (C) 2022 Pali Rohár +#include #include #include #include diff --git a/drivers/pinctrl/mvebu/pinctrl-mvebu.c b/drivers/pinctrl/mvebu/pinctrl-mvebu.c index 0d5fa4ceb9c..fd49a97b5b0 100644 --- a/drivers/pinctrl/mvebu/pinctrl-mvebu.c +++ b/drivers/pinctrl/mvebu/pinctrl-mvebu.c @@ -4,6 +4,7 @@ * https://spdx.org/licenses */ +#include #include #include #include diff --git a/drivers/pinctrl/nexell/pinctrl-nexell.c b/drivers/pinctrl/nexell/pinctrl-nexell.c index d5be7baf50d..20497a746d2 100644 --- a/drivers/pinctrl/nexell/pinctrl-nexell.c +++ b/drivers/pinctrl/nexell/pinctrl-nexell.c @@ -5,6 +5,7 @@ * Bongyu, KOO */ +#include #include #include #include diff --git a/drivers/pinctrl/nexell/pinctrl-s5pxx18.c b/drivers/pinctrl/nexell/pinctrl-s5pxx18.c index e7d0994f29e..863eb1455d2 100644 --- a/drivers/pinctrl/nexell/pinctrl-s5pxx18.c +++ b/drivers/pinctrl/nexell/pinctrl-s5pxx18.c @@ -7,6 +7,7 @@ * (C) Copyright 2019 Stefan Bosch */ +#include #include #include #include diff --git a/drivers/pinctrl/nxp/pinctrl-imx.c b/drivers/pinctrl/nxp/pinctrl-imx.c index ff466c49104..1596dcc4747 100644 --- a/drivers/pinctrl/nxp/pinctrl-imx.c +++ b/drivers/pinctrl/nxp/pinctrl-imx.c @@ -3,6 +3,7 @@ * Copyright (C) 2016 Peng Fan */ +#include #include #include #include diff --git a/drivers/pinctrl/nxp/pinctrl-imx5.c b/drivers/pinctrl/nxp/pinctrl-imx5.c index 6b690fdce8f..b32b748cfc6 100644 --- a/drivers/pinctrl/nxp/pinctrl-imx5.c +++ b/drivers/pinctrl/nxp/pinctrl-imx5.c @@ -4,6 +4,7 @@ * Copyright (C) 2016 Peng Fan */ +#include #include #include diff --git a/drivers/pinctrl/nxp/pinctrl-imx6.c b/drivers/pinctrl/nxp/pinctrl-imx6.c index 322eec87ff5..6994dbb61a3 100644 --- a/drivers/pinctrl/nxp/pinctrl-imx6.c +++ b/drivers/pinctrl/nxp/pinctrl-imx6.c @@ -4,6 +4,7 @@ * Copyright (C) 2016 Peng Fan */ +#include #include #include diff --git a/drivers/pinctrl/nxp/pinctrl-imx7.c b/drivers/pinctrl/nxp/pinctrl-imx7.c index a8275e26456..77ddb8e0b9d 100644 --- a/drivers/pinctrl/nxp/pinctrl-imx7.c +++ b/drivers/pinctrl/nxp/pinctrl-imx7.c @@ -3,6 +3,7 @@ * Copyright (C) 2016 Peng Fan */ +#include #include #include diff --git a/drivers/pinctrl/nxp/pinctrl-imx7ulp.c b/drivers/pinctrl/nxp/pinctrl-imx7ulp.c index 7ea2dbe7d36..6da9ff7c5bc 100644 --- a/drivers/pinctrl/nxp/pinctrl-imx7ulp.c +++ b/drivers/pinctrl/nxp/pinctrl-imx7ulp.c @@ -5,6 +5,7 @@ * Peng Fan */ +#include #include #include diff --git a/drivers/pinctrl/nxp/pinctrl-imx8.c b/drivers/pinctrl/nxp/pinctrl-imx8.c index 4e9a9ea6808..46af44ecb1f 100644 --- a/drivers/pinctrl/nxp/pinctrl-imx8.c +++ b/drivers/pinctrl/nxp/pinctrl-imx8.c @@ -3,6 +3,7 @@ * Copyright 2018 NXP */ +#include #include #include #include diff --git a/drivers/pinctrl/nxp/pinctrl-imx8ulp.c b/drivers/pinctrl/nxp/pinctrl-imx8ulp.c index 73d3c009d5b..4e8fa08bc6e 100644 --- a/drivers/pinctrl/nxp/pinctrl-imx8ulp.c +++ b/drivers/pinctrl/nxp/pinctrl-imx8ulp.c @@ -4,6 +4,7 @@ * */ +#include #include #include diff --git a/drivers/pinctrl/nxp/pinctrl-imxrt.c b/drivers/pinctrl/nxp/pinctrl-imxrt.c index 23f07f8d1e0..53b70da869e 100644 --- a/drivers/pinctrl/nxp/pinctrl-imxrt.c +++ b/drivers/pinctrl/nxp/pinctrl-imxrt.c @@ -4,6 +4,7 @@ * Author(s): Giulio Benetti */ +#include #include #include diff --git a/drivers/pinctrl/nxp/pinctrl-mxs.c b/drivers/pinctrl/nxp/pinctrl-mxs.c index 85ab5fdf640..eb90e28d4b2 100644 --- a/drivers/pinctrl/nxp/pinctrl-mxs.c +++ b/drivers/pinctrl/nxp/pinctrl-mxs.c @@ -4,6 +4,7 @@ * Lukasz Majewski, DENX Software Engineering, lukma@denx.de */ +#include #include #include #include diff --git a/drivers/pinctrl/nxp/pinctrl-scu.c b/drivers/pinctrl/nxp/pinctrl-scu.c index 42d5c96468c..4959834c0fc 100644 --- a/drivers/pinctrl/nxp/pinctrl-scu.c +++ b/drivers/pinctrl/nxp/pinctrl-scu.c @@ -3,6 +3,7 @@ * Copyright 2018-2019 NXP */ +#include #include #include #include diff --git a/drivers/pinctrl/nxp/pinctrl-vf610.c b/drivers/pinctrl/nxp/pinctrl-vf610.c index adf3073f1be..14e2e9d3ee6 100644 --- a/drivers/pinctrl/nxp/pinctrl-vf610.c +++ b/drivers/pinctrl/nxp/pinctrl-vf610.c @@ -4,6 +4,7 @@ * Lukasz Majewski, DENX Software Engineering, lukma@denx.de */ +#include #include #include diff --git a/drivers/pinctrl/pinctrl-apple.c b/drivers/pinctrl/pinctrl-apple.c index f373afde58e..62476358c34 100644 --- a/drivers/pinctrl/pinctrl-apple.c +++ b/drivers/pinctrl/pinctrl-apple.c @@ -3,6 +3,7 @@ * (C) Copyright 2021 Mark Kettenis */ +#include #include #include #include diff --git a/drivers/pinctrl/pinctrl-at91-pio4.c b/drivers/pinctrl/pinctrl-at91-pio4.c index c697a4c3456..84b398619c4 100644 --- a/drivers/pinctrl/pinctrl-at91-pio4.c +++ b/drivers/pinctrl/pinctrl-at91-pio4.c @@ -6,6 +6,7 @@ * Wenyou.Yang */ +#include #include #include #include diff --git a/drivers/pinctrl/pinctrl-at91.c b/drivers/pinctrl/pinctrl-at91.c index 5038cb535e3..b7aab12f11c 100644 --- a/drivers/pinctrl/pinctrl-at91.c +++ b/drivers/pinctrl/pinctrl-at91.c @@ -6,6 +6,7 @@ * Wenyou.Yang */ +#include #include #include #include diff --git a/drivers/pinctrl/pinctrl-generic.c b/drivers/pinctrl/pinctrl-generic.c index 2464acf0b85..8909b57810a 100644 --- a/drivers/pinctrl/pinctrl-generic.c +++ b/drivers/pinctrl/pinctrl-generic.c @@ -3,6 +3,7 @@ * Copyright (C) 2015 Masahiro Yamada */ +#include #include #include #include diff --git a/drivers/pinctrl/pinctrl-k210.c b/drivers/pinctrl/pinctrl-k210.c index dad036610c9..ee35dfe1420 100644 --- a/drivers/pinctrl/pinctrl-k210.c +++ b/drivers/pinctrl/pinctrl-k210.c @@ -3,6 +3,7 @@ * Copyright (C) 2020 Sean Anderson */ +#include #include #include #include diff --git a/drivers/pinctrl/pinctrl-qe-io.c b/drivers/pinctrl/pinctrl-qe-io.c index 61db9274cc3..dc0be7ce3bd 100644 --- a/drivers/pinctrl/pinctrl-qe-io.c +++ b/drivers/pinctrl/pinctrl-qe-io.c @@ -6,6 +6,7 @@ * based on source code of Shlomi Gridish */ +#include #include #include #include diff --git a/drivers/pinctrl/pinctrl-sandbox.c b/drivers/pinctrl/pinctrl-sandbox.c index a5d056643a0..77659774509 100644 --- a/drivers/pinctrl/pinctrl-sandbox.c +++ b/drivers/pinctrl/pinctrl-sandbox.c @@ -4,6 +4,7 @@ * Copyright (C) 2015 Masahiro Yamada */ +#include #include #include #include diff --git a/drivers/pinctrl/pinctrl-single.c b/drivers/pinctrl/pinctrl-single.c index a3802d22d4f..d1db377c137 100644 --- a/drivers/pinctrl/pinctrl-single.c +++ b/drivers/pinctrl/pinctrl-single.c @@ -4,6 +4,7 @@ * Copyright (C) 2021 Dario Binacchi */ +#include #include #include #include diff --git a/drivers/pinctrl/pinctrl-sti.c b/drivers/pinctrl/pinctrl-sti.c index 4996b69d9af..1ff7ea00555 100644 --- a/drivers/pinctrl/pinctrl-sti.c +++ b/drivers/pinctrl/pinctrl-sti.c @@ -6,6 +6,7 @@ * Author(s): Patrice Chotard, for STMicroelectronics. */ +#include #include #include #include diff --git a/drivers/pinctrl/pinctrl-stmfx.c b/drivers/pinctrl/pinctrl-stmfx.c index 61f335c4eb1..509e2a80e9a 100644 --- a/drivers/pinctrl/pinctrl-stmfx.c +++ b/drivers/pinctrl/pinctrl-stmfx.c @@ -8,6 +8,7 @@ #define LOG_CATEGORY UCLASS_PINCTRL +#include #include #include #include diff --git a/drivers/pinctrl/pinctrl-uclass.c b/drivers/pinctrl/pinctrl-uclass.c index d9bda7494e2..fe2ba5021a7 100644 --- a/drivers/pinctrl/pinctrl-uclass.c +++ b/drivers/pinctrl/pinctrl-uclass.c @@ -5,6 +5,7 @@ #define LOG_CATEGORY UCLASS_PINCTRL +#include #include #include #include diff --git a/drivers/pinctrl/pinctrl-zynqmp.c b/drivers/pinctrl/pinctrl-zynqmp.c index 6fa203a3b86..eb17a4290b7 100644 --- a/drivers/pinctrl/pinctrl-zynqmp.c +++ b/drivers/pinctrl/pinctrl-zynqmp.c @@ -8,6 +8,7 @@ * Copyright (C) 2021 Xilinx, Inc. All rights reserved. */ +#include #include #include #include diff --git a/drivers/pinctrl/pinctrl_pic32.c b/drivers/pinctrl/pinctrl_pic32.c index 9f38b56e9c0..54d97ac0ae3 100644 --- a/drivers/pinctrl/pinctrl_pic32.c +++ b/drivers/pinctrl/pinctrl_pic32.c @@ -4,6 +4,7 @@ * Copyright (c) 2015 Microchip Technology Inc. * Written by Purna Chandra Mandal */ +#include #include #include #include diff --git a/drivers/pinctrl/pinctrl_stm32.c b/drivers/pinctrl/pinctrl_stm32.c index eada1001240..7120b8edba0 100644 --- a/drivers/pinctrl/pinctrl_stm32.c +++ b/drivers/pinctrl/pinctrl_stm32.c @@ -5,6 +5,7 @@ #define LOG_CATEGORY UCLASS_PINCTRL +#include #include #include #include diff --git a/drivers/pinctrl/qcom/pinctrl-apq8016.c b/drivers/pinctrl/qcom/pinctrl-apq8016.c index 0c7437822ff..b14a8921af4 100644 --- a/drivers/pinctrl/qcom/pinctrl-apq8016.c +++ b/drivers/pinctrl/qcom/pinctrl-apq8016.c @@ -6,6 +6,7 @@ * */ +#include #include #include "pinctrl-qcom.h" diff --git a/drivers/pinctrl/qcom/pinctrl-apq8096.c b/drivers/pinctrl/qcom/pinctrl-apq8096.c index 132ece868bf..9697cb5beb7 100644 --- a/drivers/pinctrl/qcom/pinctrl-apq8096.c +++ b/drivers/pinctrl/qcom/pinctrl-apq8096.c @@ -6,6 +6,7 @@ * */ +#include #include #include "pinctrl-qcom.h" diff --git a/drivers/pinctrl/qcom/pinctrl-ipq4019.c b/drivers/pinctrl/qcom/pinctrl-ipq4019.c index 3215c677b26..26ab487857f 100644 --- a/drivers/pinctrl/qcom/pinctrl-ipq4019.c +++ b/drivers/pinctrl/qcom/pinctrl-ipq4019.c @@ -7,6 +7,7 @@ * Author: Robert Marko */ +#include #include #include "pinctrl-qcom.h" diff --git a/drivers/pinctrl/qcom/pinctrl-qcom.c b/drivers/pinctrl/qcom/pinctrl-qcom.c index 3c3336e7635..e68971b37ff 100644 --- a/drivers/pinctrl/qcom/pinctrl-qcom.c +++ b/drivers/pinctrl/qcom/pinctrl-qcom.c @@ -6,6 +6,7 @@ * */ +#include #include #include #include diff --git a/drivers/pinctrl/qcom/pinctrl-qcs404.c b/drivers/pinctrl/qcom/pinctrl-qcs404.c index fb6defaeddf..4b7c670c90b 100644 --- a/drivers/pinctrl/qcom/pinctrl-qcs404.c +++ b/drivers/pinctrl/qcom/pinctrl-qcs404.c @@ -5,6 +5,7 @@ * (C) Copyright 2022 Sumit Garg */ +#include #include #include "pinctrl-qcom.h" diff --git a/drivers/pinctrl/qcom/pinctrl-sdm845.c b/drivers/pinctrl/qcom/pinctrl-sdm845.c index f1a23f51099..c1e5cc01fde 100644 --- a/drivers/pinctrl/qcom/pinctrl-sdm845.c +++ b/drivers/pinctrl/qcom/pinctrl-sdm845.c @@ -7,6 +7,7 @@ * */ +#include #include #include "pinctrl-qcom.h" diff --git a/drivers/pinctrl/rockchip/pinctrl-px30.c b/drivers/pinctrl/rockchip/pinctrl-px30.c index cc7885bae40..2c35491b24d 100644 --- a/drivers/pinctrl/rockchip/pinctrl-px30.c +++ b/drivers/pinctrl/rockchip/pinctrl-px30.c @@ -3,6 +3,7 @@ * (C) Copyright 2019 Rockchip Electronics Co., Ltd */ +#include #include #include #include diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3036.c b/drivers/pinctrl/rockchip/pinctrl-rk3036.c index b14386ccd93..afcd34396e2 100644 --- a/drivers/pinctrl/rockchip/pinctrl-rk3036.c +++ b/drivers/pinctrl/rockchip/pinctrl-rk3036.c @@ -3,6 +3,7 @@ * (C) Copyright 2019 Rockchip Electronics Co., Ltd */ +#include #include #include #include diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3066.c b/drivers/pinctrl/rockchip/pinctrl-rk3066.c index 60e088a9a6f..598b63223e3 100644 --- a/drivers/pinctrl/rockchip/pinctrl-rk3066.c +++ b/drivers/pinctrl/rockchip/pinctrl-rk3066.c @@ -3,6 +3,7 @@ * (C) Copyright 2021 Rockchip Electronics Co., Ltd */ +#include #include #include #include diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3128.c b/drivers/pinctrl/rockchip/pinctrl-rk3128.c index d00fc3da8b2..355c45eb7f8 100644 --- a/drivers/pinctrl/rockchip/pinctrl-rk3128.c +++ b/drivers/pinctrl/rockchip/pinctrl-rk3128.c @@ -3,6 +3,7 @@ * (C) Copyright 2019 Rockchip Electronics Co., Ltd */ +#include #include #include #include diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3188.c b/drivers/pinctrl/rockchip/pinctrl-rk3188.c index 83db51f66ae..9a982cbfad9 100644 --- a/drivers/pinctrl/rockchip/pinctrl-rk3188.c +++ b/drivers/pinctrl/rockchip/pinctrl-rk3188.c @@ -3,6 +3,7 @@ * (C) Copyright 2019 Rockchip Electronics Co., Ltd */ +#include #include #include #include diff --git a/drivers/pinctrl/rockchip/pinctrl-rk322x.c b/drivers/pinctrl/rockchip/pinctrl-rk322x.c index b804597c048..351406da2d4 100644 --- a/drivers/pinctrl/rockchip/pinctrl-rk322x.c +++ b/drivers/pinctrl/rockchip/pinctrl-rk322x.c @@ -3,6 +3,7 @@ * (C) Copyright 2019 Rockchip Electronics Co., Ltd */ +#include #include #include #include diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3288.c b/drivers/pinctrl/rockchip/pinctrl-rk3288.c index 3870c1b7a34..a976b7aeeb2 100644 --- a/drivers/pinctrl/rockchip/pinctrl-rk3288.c +++ b/drivers/pinctrl/rockchip/pinctrl-rk3288.c @@ -3,6 +3,7 @@ * (C) Copyright 2019 Rockchip Electronics Co., Ltd */ +#include #include #include #include diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3308.c b/drivers/pinctrl/rockchip/pinctrl-rk3308.c index 2cd91b10a3b..f9ac6347eaf 100644 --- a/drivers/pinctrl/rockchip/pinctrl-rk3308.c +++ b/drivers/pinctrl/rockchip/pinctrl-rk3308.c @@ -3,6 +3,7 @@ * (C) Copyright 2019 Rockchip Electronics Co., Ltd */ +#include #include #include #include diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3328.c b/drivers/pinctrl/rockchip/pinctrl-rk3328.c index 47c2e923a1b..65a75007677 100644 --- a/drivers/pinctrl/rockchip/pinctrl-rk3328.c +++ b/drivers/pinctrl/rockchip/pinctrl-rk3328.c @@ -3,6 +3,7 @@ * (C) Copyright 2019 Rockchip Electronics Co., Ltd */ +#include #include #include #include diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3368.c b/drivers/pinctrl/rockchip/pinctrl-rk3368.c index 9ae06ed19e9..ba867a89174 100644 --- a/drivers/pinctrl/rockchip/pinctrl-rk3368.c +++ b/drivers/pinctrl/rockchip/pinctrl-rk3368.c @@ -3,6 +3,7 @@ * (C) Copyright 2019 Rockchip Electronics Co., Ltd */ +#include #include #include #include diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3399.c b/drivers/pinctrl/rockchip/pinctrl-rk3399.c index b7a5092c032..ae785573baf 100644 --- a/drivers/pinctrl/rockchip/pinctrl-rk3399.c +++ b/drivers/pinctrl/rockchip/pinctrl-rk3399.c @@ -3,6 +3,7 @@ * (C) Copyright 2019 Rockchip Electronics Co., Ltd */ +#include #include #include #include diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3568.c b/drivers/pinctrl/rockchip/pinctrl-rk3568.c index 5deedc648a4..1d439198260 100644 --- a/drivers/pinctrl/rockchip/pinctrl-rk3568.c +++ b/drivers/pinctrl/rockchip/pinctrl-rk3568.c @@ -3,6 +3,7 @@ * (C) Copyright 2020 Rockchip Electronics Co., Ltd */ +#include #include #include #include diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3588.c b/drivers/pinctrl/rockchip/pinctrl-rk3588.c index 98ababc7c90..548cf09bcca 100644 --- a/drivers/pinctrl/rockchip/pinctrl-rk3588.c +++ b/drivers/pinctrl/rockchip/pinctrl-rk3588.c @@ -3,6 +3,7 @@ * (C) Copyright 2021 Rockchip Electronics Co., Ltd */ +#include #include #include #include diff --git a/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c b/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c index 3e74e2f1489..8ef089994f4 100644 --- a/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c +++ b/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c @@ -3,6 +3,7 @@ * (C) Copyright 2019 Rockchip Electronics Co., Ltd */ +#include #include #include #include diff --git a/drivers/pinctrl/rockchip/pinctrl-rv1108.c b/drivers/pinctrl/rockchip/pinctrl-rv1108.c index 3eff5f59598..5b70b503d2b 100644 --- a/drivers/pinctrl/rockchip/pinctrl-rv1108.c +++ b/drivers/pinctrl/rockchip/pinctrl-rv1108.c @@ -3,6 +3,7 @@ * (C) Copyright 2019 Rockchip Electronics Co., Ltd */ +#include #include #include #include diff --git a/drivers/pinctrl/rockchip/pinctrl-rv1126.c b/drivers/pinctrl/rockchip/pinctrl-rv1126.c index efa2408b204..eefb8b17768 100644 --- a/drivers/pinctrl/rockchip/pinctrl-rv1126.c +++ b/drivers/pinctrl/rockchip/pinctrl-rv1126.c @@ -3,6 +3,7 @@ * (C) Copyright 2020 Rockchip Electronics Co., Ltd */ +#include #include #include #include diff --git a/drivers/pinctrl/starfive/pinctrl-starfive.c b/drivers/pinctrl/starfive/pinctrl-starfive.c index 95b1a752de2..9b09cc21cfa 100644 --- a/drivers/pinctrl/starfive/pinctrl-starfive.c +++ b/drivers/pinctrl/starfive/pinctrl-starfive.c @@ -7,6 +7,7 @@ * Author: Jianlong Huang */ +#include #include #include #include diff --git a/drivers/pinctrl/tegra/funcmux-tegra114.c b/drivers/pinctrl/tegra/funcmux-tegra114.c index 23e9e238367..23a27c86888 100644 --- a/drivers/pinctrl/tegra/funcmux-tegra114.c +++ b/drivers/pinctrl/tegra/funcmux-tegra114.c @@ -5,6 +5,7 @@ /* Tegra114 high-level function multiplexing */ +#include #include #include #include diff --git a/drivers/pinctrl/tegra/funcmux-tegra124.c b/drivers/pinctrl/tegra/funcmux-tegra124.c index b041cead344..e7ad85fde2d 100644 --- a/drivers/pinctrl/tegra/funcmux-tegra124.c +++ b/drivers/pinctrl/tegra/funcmux-tegra124.c @@ -6,6 +6,7 @@ /* Tegra124 high-level function multiplexing */ +#include #include #include #include diff --git a/drivers/pinctrl/tegra/funcmux-tegra20.c b/drivers/pinctrl/tegra/funcmux-tegra20.c index b8c91323785..90fe0cba8ea 100644 --- a/drivers/pinctrl/tegra/funcmux-tegra20.c +++ b/drivers/pinctrl/tegra/funcmux-tegra20.c @@ -4,6 +4,7 @@ */ /* Tegra20 high-level function multiplexing */ +#include #include #include #include diff --git a/drivers/pinctrl/tegra/funcmux-tegra210.c b/drivers/pinctrl/tegra/funcmux-tegra210.c index d52b6150e59..30d994a17ff 100644 --- a/drivers/pinctrl/tegra/funcmux-tegra210.c +++ b/drivers/pinctrl/tegra/funcmux-tegra210.c @@ -6,6 +6,7 @@ /* Tegra210 high-level function multiplexing */ +#include #include #include #include diff --git a/drivers/pinctrl/tegra/funcmux-tegra30.c b/drivers/pinctrl/tegra/funcmux-tegra30.c index e31b859beb8..c3ee787f33b 100644 --- a/drivers/pinctrl/tegra/funcmux-tegra30.c +++ b/drivers/pinctrl/tegra/funcmux-tegra30.c @@ -5,6 +5,7 @@ /* Tegra30 high-level function multiplexing */ +#include #include #include #include diff --git a/drivers/pinctrl/tegra/pinmux-common.c b/drivers/pinctrl/tegra/pinmux-common.c index 5266c8db487..16b03bfe7b0 100644 --- a/drivers/pinctrl/tegra/pinmux-common.c +++ b/drivers/pinctrl/tegra/pinmux-common.c @@ -4,6 +4,7 @@ * Copyright (c) 2011 The Chromium OS Authors. */ +#include #include #include #include diff --git a/drivers/pinctrl/tegra/pinmux-tegra114.c b/drivers/pinctrl/tegra/pinmux-tegra114.c index 15c6b653aed..11796602c54 100644 --- a/drivers/pinctrl/tegra/pinmux-tegra114.c +++ b/drivers/pinctrl/tegra/pinmux-tegra114.c @@ -3,6 +3,7 @@ * Copyright (c) 2010-2014, NVIDIA CORPORATION. All rights reserved. */ +#include #include #include diff --git a/drivers/pinctrl/tegra/pinmux-tegra124.c b/drivers/pinctrl/tegra/pinmux-tegra124.c index 6d5b720aa0e..261ce64b205 100644 --- a/drivers/pinctrl/tegra/pinmux-tegra124.c +++ b/drivers/pinctrl/tegra/pinmux-tegra124.c @@ -3,6 +3,7 @@ * Copyright (c) 2013-2014, NVIDIA CORPORATION. All rights reserved. */ +#include #include #include diff --git a/drivers/pinctrl/tegra/pinmux-tegra20.c b/drivers/pinctrl/tegra/pinmux-tegra20.c index c1f86476b9e..0af39e74c53 100644 --- a/drivers/pinctrl/tegra/pinmux-tegra20.c +++ b/drivers/pinctrl/tegra/pinmux-tegra20.c @@ -5,6 +5,7 @@ /* Tegra20 pin multiplexing functions */ +#include #include #include diff --git a/drivers/pinctrl/tegra/pinmux-tegra30.c b/drivers/pinctrl/tegra/pinmux-tegra30.c index 59ce9cea4a9..d11b2aa572d 100644 --- a/drivers/pinctrl/tegra/pinmux-tegra30.c +++ b/drivers/pinctrl/tegra/pinmux-tegra30.c @@ -3,6 +3,7 @@ * Copyright (c) 2010-2014, NVIDIA CORPORATION. All rights reserved. */ +#include #include #include diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-core.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-core.c index eafb65496a3..bdca3f2f715 100644 --- a/drivers/pinctrl/uniphier/pinctrl-uniphier-core.c +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-core.c @@ -4,6 +4,7 @@ * Author: Masahiro Yamada */ +#include #include #include #include diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-ld11.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-ld11.c index 778a9899483..a1a3cd73859 100644 --- a/drivers/pinctrl/uniphier/pinctrl-uniphier-ld11.c +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-ld11.c @@ -4,6 +4,7 @@ * Author: Masahiro Yamada */ +#include #include #include diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c index 3ef10151dab..7a92a46c17f 100644 --- a/drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c @@ -4,6 +4,7 @@ * Author: Masahiro Yamada */ +#include #include #include diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-ld4.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-ld4.c index 9302e309e20..d33e4d7dd25 100644 --- a/drivers/pinctrl/uniphier/pinctrl-uniphier-ld4.c +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-ld4.c @@ -4,6 +4,7 @@ * Author: Masahiro Yamada */ +#include #include #include diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c index f7c5bf3bcae..0e3eb131ecf 100644 --- a/drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c @@ -4,6 +4,7 @@ * Author: Masahiro Yamada */ +#include #include #include diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c index 2704a50749e..7ba2266092f 100644 --- a/drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c @@ -4,6 +4,7 @@ * Author: Masahiro Yamada */ +#include #include #include diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c index 655ec6e6057..9ce2e2c270e 100644 --- a/drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c @@ -4,6 +4,7 @@ * Author: Masahiro Yamada */ +#include #include #include diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c index 226272c2b82..e8c2018097c 100644 --- a/drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c @@ -4,6 +4,7 @@ * Author: Masahiro Yamada */ +#include #include #include diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-pxs3.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-pxs3.c index 8df13ca209c..8a8f1269bb5 100644 --- a/drivers/pinctrl/uniphier/pinctrl-uniphier-pxs3.c +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-pxs3.c @@ -5,6 +5,7 @@ * Author: Dai Okamura */ +#include #include #include diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-sld8.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-sld8.c index c045ae99ac5..04c06fb280e 100644 --- a/drivers/pinctrl/uniphier/pinctrl-uniphier-sld8.c +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-sld8.c @@ -4,6 +4,7 @@ * Author: Masahiro Yamada */ +#include #include #include diff --git a/drivers/power/acpi_pmc/acpi-pmc-uclass.c b/drivers/power/acpi_pmc/acpi-pmc-uclass.c index c289cede15b..34446a34e60 100644 --- a/drivers/power/acpi_pmc/acpi-pmc-uclass.c +++ b/drivers/power/acpi_pmc/acpi-pmc-uclass.c @@ -5,6 +5,7 @@ #define LOG_CATEGORY UCLASS_ACPI_PMC +#include #include #include #include diff --git a/drivers/power/acpi_pmc/pmc_emul.c b/drivers/power/acpi_pmc/pmc_emul.c index 8eff3d9fa7a..8015031da85 100644 --- a/drivers/power/acpi_pmc/pmc_emul.c +++ b/drivers/power/acpi_pmc/pmc_emul.c @@ -6,6 +6,7 @@ * Written by Simon Glass */ +#include #include #include #include diff --git a/drivers/power/acpi_pmc/sandbox.c b/drivers/power/acpi_pmc/sandbox.c index ed1bb198093..8cf03f737c0 100644 --- a/drivers/power/acpi_pmc/sandbox.c +++ b/drivers/power/acpi_pmc/sandbox.c @@ -7,6 +7,7 @@ #define LOG_CATEGORY UCLASS_ACPI_PMC +#include #include #include #include diff --git a/drivers/power/axp152.c b/drivers/power/axp152.c index 5a62382ab86..a93987c1538 100644 --- a/drivers/power/axp152.c +++ b/drivers/power/axp152.c @@ -3,8 +3,8 @@ * (C) Copyright 2012 * Henrik Nordstrom */ +#include #include -#include #include #include diff --git a/drivers/power/axp209.c b/drivers/power/axp209.c index 6ae416982eb..3447b9f0113 100644 --- a/drivers/power/axp209.c +++ b/drivers/power/axp209.c @@ -4,11 +4,11 @@ * Henrik Nordstrom */ +#include #include #include #include #include -#include #ifdef CONFIG_AXP_ALDO3_VOLT_SLOPE_08 # define AXP209_VRC_SLOPE AXP209_VRC_LDO3_800uV_uS diff --git a/drivers/power/axp221.c b/drivers/power/axp221.c index c22ca03f469..d251c314b98 100644 --- a/drivers/power/axp221.c +++ b/drivers/power/axp221.c @@ -9,6 +9,7 @@ * (C) Copyright 2013 Oliver Schinagl */ +#include #include #include #include diff --git a/drivers/power/axp305.c b/drivers/power/axp305.c index 0312ad9af76..049ef07f746 100644 --- a/drivers/power/axp305.c +++ b/drivers/power/axp305.c @@ -9,6 +9,7 @@ * (C) Copyright 2013 Oliver Schinagl */ +#include #include #include #include diff --git a/drivers/power/axp313.c b/drivers/power/axp313.c index 09ecb5b1ec2..bbc9e911115 100644 --- a/drivers/power/axp313.c +++ b/drivers/power/axp313.c @@ -10,6 +10,7 @@ * (C) Copyright 2013 Oliver Schinagl */ +#include #include #include #include diff --git a/drivers/power/axp809.c b/drivers/power/axp809.c index 9e38e1a7450..d327a584ded 100644 --- a/drivers/power/axp809.c +++ b/drivers/power/axp809.c @@ -10,6 +10,7 @@ * (C) Copyright 2013 Oliver Schinagl */ +#include #include #include #include diff --git a/drivers/power/axp818.c b/drivers/power/axp818.c index 83ae6ecc138..08286ea3b55 100644 --- a/drivers/power/axp818.c +++ b/drivers/power/axp818.c @@ -10,6 +10,7 @@ * (C) Copyright 2013 Oliver Schinagl */ +#include #include #include #include diff --git a/drivers/power/domain/apple-pmgr.c b/drivers/power/domain/apple-pmgr.c index bf9940621ee..402c5b1fd18 100644 --- a/drivers/power/domain/apple-pmgr.c +++ b/drivers/power/domain/apple-pmgr.c @@ -3,6 +3,7 @@ * Copyright (C) 2021 Mark Kettenis */ +#include #include #include #include diff --git a/drivers/power/domain/bcm6328-power-domain.c b/drivers/power/domain/bcm6328-power-domain.c index 36b5a933748..80144dd9772 100644 --- a/drivers/power/domain/bcm6328-power-domain.c +++ b/drivers/power/domain/bcm6328-power-domain.c @@ -3,6 +3,7 @@ * Copyright (C) 2017 Álvaro Fernández Rojas */ +#include #include #include #include diff --git a/drivers/power/domain/imx8-power-domain-legacy.c b/drivers/power/domain/imx8-power-domain-legacy.c index 713a51d7807..c8ca2665752 100644 --- a/drivers/power/domain/imx8-power-domain-legacy.c +++ b/drivers/power/domain/imx8-power-domain-legacy.c @@ -3,6 +3,7 @@ * Copyright 2017 NXP */ +#include #include #include #include diff --git a/drivers/power/domain/imx8-power-domain.c b/drivers/power/domain/imx8-power-domain.c index e8dcc057fee..b45e468756b 100644 --- a/drivers/power/domain/imx8-power-domain.c +++ b/drivers/power/domain/imx8-power-domain.c @@ -4,6 +4,7 @@ */ #define DEBUG +#include #include #include #include diff --git a/drivers/power/domain/imx8m-power-domain.c b/drivers/power/domain/imx8m-power-domain.c index 8b6870c8646..df5d7d69562 100644 --- a/drivers/power/domain/imx8m-power-domain.c +++ b/drivers/power/domain/imx8m-power-domain.c @@ -3,6 +3,7 @@ * Copyright 2017 NXP */ +#include #include #include #include diff --git a/drivers/power/domain/imx8mp-hsiomix.c b/drivers/power/domain/imx8mp-hsiomix.c index 455ad53ef52..6188a04c45e 100644 --- a/drivers/power/domain/imx8mp-hsiomix.c +++ b/drivers/power/domain/imx8mp-hsiomix.c @@ -3,6 +3,7 @@ * Copyright (C) 2022 Marek Vasut */ +#include #include #include #include diff --git a/drivers/power/domain/meson-ee-pwrc.c b/drivers/power/domain/meson-ee-pwrc.c index 20e9f32b381..676fded8080 100644 --- a/drivers/power/domain/meson-ee-pwrc.c +++ b/drivers/power/domain/meson-ee-pwrc.c @@ -4,6 +4,7 @@ * Author: Neil Armstrong */ +#include #include #include #include diff --git a/drivers/power/domain/meson-gx-pwrc-vpu.c b/drivers/power/domain/meson-gx-pwrc-vpu.c index 1c56e8508c3..612660ce89f 100644 --- a/drivers/power/domain/meson-gx-pwrc-vpu.c +++ b/drivers/power/domain/meson-gx-pwrc-vpu.c @@ -6,6 +6,7 @@ * Author: Neil Armstrong */ +#include #include #include #include diff --git a/drivers/power/domain/mtk-power-domain.c b/drivers/power/domain/mtk-power-domain.c index 2d1ba1855a5..3b84147d481 100644 --- a/drivers/power/domain/mtk-power-domain.c +++ b/drivers/power/domain/mtk-power-domain.c @@ -5,6 +5,7 @@ */ #include +#include #include #include #include diff --git a/drivers/power/domain/power-domain-uclass.c b/drivers/power/domain/power-domain-uclass.c index 938bd8cbc9f..f6286c70c1d 100644 --- a/drivers/power/domain/power-domain-uclass.c +++ b/drivers/power/domain/power-domain-uclass.c @@ -5,6 +5,7 @@ #define LOG_CATEGORY UCLASS_POWER_DOMAIN +#include #include #include #include diff --git a/drivers/power/domain/sandbox-power-domain-test.c b/drivers/power/domain/sandbox-power-domain-test.c index 08c15ef342b..1bf52f1d861 100644 --- a/drivers/power/domain/sandbox-power-domain-test.c +++ b/drivers/power/domain/sandbox-power-domain-test.c @@ -3,6 +3,7 @@ * Copyright (c) 2016, NVIDIA CORPORATION. */ +#include #include #include #include diff --git a/drivers/power/domain/sandbox-power-domain.c b/drivers/power/domain/sandbox-power-domain.c index 9dd490b14a3..04a071044f3 100644 --- a/drivers/power/domain/sandbox-power-domain.c +++ b/drivers/power/domain/sandbox-power-domain.c @@ -3,6 +3,7 @@ * Copyright (c) 2016, NVIDIA CORPORATION. */ +#include #include #include #include diff --git a/drivers/power/domain/tegra186-power-domain.c b/drivers/power/domain/tegra186-power-domain.c index 334c460c805..46da541b75a 100644 --- a/drivers/power/domain/tegra186-power-domain.c +++ b/drivers/power/domain/tegra186-power-domain.c @@ -3,6 +3,7 @@ * Copyright (c) 2016, NVIDIA CORPORATION. */ +#include #include #include #include diff --git a/drivers/power/domain/ti-power-domain.c b/drivers/power/domain/ti-power-domain.c index b059dd37376..8996c40ddc0 100644 --- a/drivers/power/domain/ti-power-domain.c +++ b/drivers/power/domain/ti-power-domain.c @@ -7,6 +7,7 @@ */ #include +#include #include #include #include diff --git a/drivers/power/domain/ti-sci-power-domain.c b/drivers/power/domain/ti-sci-power-domain.c index 0a9f498b97b..8d6abe13dbc 100644 --- a/drivers/power/domain/ti-sci-power-domain.c +++ b/drivers/power/domain/ti-sci-power-domain.c @@ -8,6 +8,7 @@ * Loosely based on Linux kernel ti_sci_pm_domains.c... */ +#include #include #include #include diff --git a/drivers/power/domain/zynqmp-power-domain.c b/drivers/power/domain/zynqmp-power-domain.c index ac93934eb42..5ee9e020fb3 100644 --- a/drivers/power/domain/zynqmp-power-domain.c +++ b/drivers/power/domain/zynqmp-power-domain.c @@ -3,6 +3,7 @@ * Copyright (c) 2021, Xilinx. Inc. */ +#include #include #include #include diff --git a/drivers/power/exynos-tmu.c b/drivers/power/exynos-tmu.c index 21c2fabce1b..6d62f6cae40 100644 --- a/drivers/power/exynos-tmu.c +++ b/drivers/power/exynos-tmu.c @@ -17,12 +17,11 @@ * MA 02111-1307 USA */ +#include #include #include #include -#include #include -#include #include #include diff --git a/drivers/power/mt6323.c b/drivers/power/mt6323.c index dd6cbcf1820..354817a0378 100644 --- a/drivers/power/mt6323.c +++ b/drivers/power/mt6323.c @@ -3,6 +3,7 @@ * Copyright (C) 2019 Frank Wunderlich */ +#include #include #include #include diff --git a/drivers/power/pmic/ab8500.c b/drivers/power/pmic/ab8500.c index 9ba096711e1..1f64f217c34 100644 --- a/drivers/power/pmic/ab8500.c +++ b/drivers/power/pmic/ab8500.c @@ -7,6 +7,7 @@ * Copyright (C) ST-Ericsson SA 2010 */ +#include #include #include #include diff --git a/drivers/power/pmic/act8846.c b/drivers/power/pmic/act8846.c index 3058ef0f893..8f0f5a6d96e 100644 --- a/drivers/power/pmic/act8846.c +++ b/drivers/power/pmic/act8846.c @@ -4,6 +4,7 @@ * Written by Simon Glass */ +#include #include #include #include diff --git a/drivers/power/pmic/as3722.c b/drivers/power/pmic/as3722.c index 9b0f4fb9736..c7dd9705d18 100644 --- a/drivers/power/pmic/as3722.c +++ b/drivers/power/pmic/as3722.c @@ -5,6 +5,7 @@ #define pr_fmt(fmt) "as3722: " fmt +#include #include #include #include diff --git a/drivers/power/pmic/as3722_gpio.c b/drivers/power/pmic/as3722_gpio.c index 52d8bd00b1f..987fbdf9bc0 100644 --- a/drivers/power/pmic/as3722_gpio.c +++ b/drivers/power/pmic/as3722_gpio.c @@ -3,6 +3,7 @@ * Copyright (C) 2014 NVIDIA Corporation */ +#include #include #include #include diff --git a/drivers/power/pmic/bd71837.c b/drivers/power/pmic/bd71837.c index a5df2570fc3..ee6ae78e5c4 100644 --- a/drivers/power/pmic/bd71837.c +++ b/drivers/power/pmic/bd71837.c @@ -3,6 +3,7 @@ * Copyright 2018 NXP */ +#include #include #include #include diff --git a/drivers/power/pmic/da9063.c b/drivers/power/pmic/da9063.c index 7bd3df39142..ca95b82e6d0 100644 --- a/drivers/power/pmic/da9063.c +++ b/drivers/power/pmic/da9063.c @@ -4,6 +4,7 @@ * Martin Fuzzey */ +#include #include #include #include diff --git a/drivers/power/pmic/fan53555.c b/drivers/power/pmic/fan53555.c index 95bf600cbc3..d556b9a5878 100644 --- a/drivers/power/pmic/fan53555.c +++ b/drivers/power/pmic/fan53555.c @@ -3,6 +3,7 @@ * (C) 2018 Theobroma Systems Design und Consulting GmbH */ +#include #include #include #include diff --git a/drivers/power/pmic/i2c_pmic_emul.c b/drivers/power/pmic/i2c_pmic_emul.c index 6e81b9c3427..f0a03742f87 100644 --- a/drivers/power/pmic/i2c_pmic_emul.c +++ b/drivers/power/pmic/i2c_pmic_emul.c @@ -4,6 +4,7 @@ * Przemyslaw Marczak */ +#include #include #include #include diff --git a/drivers/power/pmic/lp873x.c b/drivers/power/pmic/lp873x.c index 2c8fa4ea312..fda5bc15164 100644 --- a/drivers/power/pmic/lp873x.c +++ b/drivers/power/pmic/lp873x.c @@ -4,6 +4,7 @@ * Keerthy */ +#include #include #include #include diff --git a/drivers/power/pmic/lp87565.c b/drivers/power/pmic/lp87565.c index c2ff75bbcdc..904e02c4d81 100644 --- a/drivers/power/pmic/lp87565.c +++ b/drivers/power/pmic/lp87565.c @@ -4,6 +4,7 @@ * Keerthy */ +#include #include #include #include diff --git a/drivers/power/pmic/max77686.c b/drivers/power/pmic/max77686.c index bfe57b386d3..7e6f7d1966f 100644 --- a/drivers/power/pmic/max77686.c +++ b/drivers/power/pmic/max77686.c @@ -4,6 +4,7 @@ * Przemyslaw Marczak */ +#include #include #include #include diff --git a/drivers/power/pmic/max8997.c b/drivers/power/pmic/max8997.c index 4afa6c84ef8..504a63bf743 100644 --- a/drivers/power/pmic/max8997.c +++ b/drivers/power/pmic/max8997.c @@ -4,6 +4,7 @@ * Jaehoon Chung */ +#include #include #include #include diff --git a/drivers/power/pmic/max8998.c b/drivers/power/pmic/max8998.c index 05669023753..d155474447f 100644 --- a/drivers/power/pmic/max8998.c +++ b/drivers/power/pmic/max8998.c @@ -4,6 +4,7 @@ * Jaehoon Chung */ +#include #include #include #include diff --git a/drivers/power/pmic/mc34708.c b/drivers/power/pmic/mc34708.c index 43badb5767a..40d732224b6 100644 --- a/drivers/power/pmic/mc34708.c +++ b/drivers/power/pmic/mc34708.c @@ -5,6 +5,7 @@ * */ +#include #include #include #include diff --git a/drivers/power/pmic/mp5416.c b/drivers/power/pmic/mp5416.c index 9d44f0ae655..6180adf77e2 100644 --- a/drivers/power/pmic/mp5416.c +++ b/drivers/power/pmic/mp5416.c @@ -2,6 +2,7 @@ /* * Copyright 2020 Gateworks Corporation */ +#include #include #include #include diff --git a/drivers/power/pmic/palmas.c b/drivers/power/pmic/palmas.c index f676bf64169..e340a32279f 100644 --- a/drivers/power/pmic/palmas.c +++ b/drivers/power/pmic/palmas.c @@ -4,6 +4,7 @@ * Keerthy */ +#include #include #include #include diff --git a/drivers/power/pmic/pca9450.c b/drivers/power/pmic/pca9450.c index 07af6273d8a..0bbe98cd8a2 100644 --- a/drivers/power/pmic/pca9450.c +++ b/drivers/power/pmic/pca9450.c @@ -3,6 +3,7 @@ * Copyright 2019 NXP */ +#include #include #include #include diff --git a/drivers/power/pmic/pfuze100.c b/drivers/power/pmic/pfuze100.c index 9e09805d251..15420acb472 100644 --- a/drivers/power/pmic/pfuze100.c +++ b/drivers/power/pmic/pfuze100.c @@ -4,6 +4,7 @@ * Peng Fan */ +#include #include #include #include diff --git a/drivers/power/pmic/pmic-uclass.c b/drivers/power/pmic/pmic-uclass.c index bb459816d14..0e2f5e1f411 100644 --- a/drivers/power/pmic/pmic-uclass.c +++ b/drivers/power/pmic/pmic-uclass.c @@ -6,6 +6,7 @@ #define LOG_CATEGORY UCLASS_PMIC +#include #include #include #include diff --git a/drivers/power/pmic/pmic_hi6553.c b/drivers/power/pmic/pmic_hi6553.c index 05305013882..80b9078cf8f 100644 --- a/drivers/power/pmic/pmic_hi6553.c +++ b/drivers/power/pmic/pmic_hi6553.c @@ -4,6 +4,7 @@ * Peter Griffin */ #include +#include #include #include #include diff --git a/drivers/power/pmic/pmic_ltc3676.c b/drivers/power/pmic/pmic_ltc3676.c index 145a631b6b2..af94f37b0f1 100644 --- a/drivers/power/pmic/pmic_ltc3676.c +++ b/drivers/power/pmic/pmic_ltc3676.c @@ -4,6 +4,7 @@ * Tim Harvey */ +#include #include #include #include diff --git a/drivers/power/pmic/pmic_mc34vr500.c b/drivers/power/pmic/pmic_mc34vr500.c index 0dfdfbdf3dc..9dd1c46ea22 100644 --- a/drivers/power/pmic/pmic_mc34vr500.c +++ b/drivers/power/pmic/pmic_mc34vr500.c @@ -4,6 +4,7 @@ * Hou Zhiqiang */ +#include #include #include #include diff --git a/drivers/power/pmic/pmic_pca9450.c b/drivers/power/pmic/pmic_pca9450.c index 12500ba9990..8c4d0a92306 100644 --- a/drivers/power/pmic/pmic_pca9450.c +++ b/drivers/power/pmic/pmic_pca9450.c @@ -3,6 +3,7 @@ * Copyright 2019 NXP */ +#include #include #include #include diff --git a/drivers/power/pmic/pmic_pfuze100.c b/drivers/power/pmic/pmic_pfuze100.c index a266709d8d0..5115b55e49d 100644 --- a/drivers/power/pmic/pmic_pfuze100.c +++ b/drivers/power/pmic/pmic_pfuze100.c @@ -4,6 +4,7 @@ * Tim Harvey */ +#include #include #include #include diff --git a/drivers/power/pmic/pmic_pfuze3000.c b/drivers/power/pmic/pmic_pfuze3000.c index 602c4744aa6..a6d97252bc9 100644 --- a/drivers/power/pmic/pmic_pfuze3000.c +++ b/drivers/power/pmic/pmic_pfuze3000.c @@ -4,6 +4,7 @@ * Peng Fan */ +#include #include #include #include diff --git a/drivers/power/pmic/pmic_qcom.c b/drivers/power/pmic/pmic_qcom.c index 92d0a95859b..f2ac6494811 100644 --- a/drivers/power/pmic/pmic_qcom.c +++ b/drivers/power/pmic/pmic_qcom.c @@ -4,6 +4,7 @@ * * (C) Copyright 2015 Mateusz Kulikowski */ +#include #include #include #include diff --git a/drivers/power/pmic/pmic_tps62362.c b/drivers/power/pmic/pmic_tps62362.c index 4f0e406d560..6426d1488a5 100644 --- a/drivers/power/pmic/pmic_tps62362.c +++ b/drivers/power/pmic/pmic_tps62362.c @@ -4,6 +4,7 @@ * Author: Felipe Balbi */ +#include #include #include #include diff --git a/drivers/power/pmic/pmic_tps65217.c b/drivers/power/pmic/pmic_tps65217.c index bd44e0d9ae0..ccbf2235933 100644 --- a/drivers/power/pmic/pmic_tps65217.c +++ b/drivers/power/pmic/pmic_tps65217.c @@ -4,6 +4,7 @@ * Texas Instruments, */ +#include #include #include #include diff --git a/drivers/power/pmic/pmic_tps65218.c b/drivers/power/pmic/pmic_tps65218.c index 49d07e95cd7..67174901804 100644 --- a/drivers/power/pmic/pmic_tps65218.c +++ b/drivers/power/pmic/pmic_tps65218.c @@ -4,6 +4,7 @@ * Texas Instruments, */ +#include #include #include #include diff --git a/drivers/power/pmic/pmic_tps65910.c b/drivers/power/pmic/pmic_tps65910.c index df9bb66a7f9..e3de7308215 100644 --- a/drivers/power/pmic/pmic_tps65910.c +++ b/drivers/power/pmic/pmic_tps65910.c @@ -4,6 +4,7 @@ * Texas Instruments, */ +#include #include #include diff --git a/drivers/power/pmic/pmic_tps65910_dm.c b/drivers/power/pmic/pmic_tps65910_dm.c index de8d805566a..ecf836eb0e6 100644 --- a/drivers/power/pmic/pmic_tps65910_dm.c +++ b/drivers/power/pmic/pmic_tps65910_dm.c @@ -3,6 +3,7 @@ * Copyright (C) EETS GmbH, 2017, Felix Brack */ +#include #include #include #include diff --git a/drivers/power/pmic/rk8xx.c b/drivers/power/pmic/rk8xx.c index 12ff26a0855..3a8261d1749 100644 --- a/drivers/power/pmic/rk8xx.c +++ b/drivers/power/pmic/rk8xx.c @@ -4,6 +4,7 @@ * Written by Simon Glass */ +#include #include #include #include diff --git a/drivers/power/pmic/rn5t567.c b/drivers/power/pmic/rn5t567.c index 0124d84a729..9d103dd8405 100644 --- a/drivers/power/pmic/rn5t567.c +++ b/drivers/power/pmic/rn5t567.c @@ -4,6 +4,7 @@ * Stefan Agner */ +#include #include #include #include diff --git a/drivers/power/pmic/s2mps11.c b/drivers/power/pmic/s2mps11.c index 17780017035..5ff4f205211 100644 --- a/drivers/power/pmic/s2mps11.c +++ b/drivers/power/pmic/s2mps11.c @@ -4,6 +4,7 @@ * Przemyslaw Marczak */ +#include #include #include #include diff --git a/drivers/power/pmic/s5m8767.c b/drivers/power/pmic/s5m8767.c index 799d0012540..eea072ae824 100644 --- a/drivers/power/pmic/s5m8767.c +++ b/drivers/power/pmic/s5m8767.c @@ -3,6 +3,7 @@ * Copyright (C) 2015 Google, Inc */ +#include #include #include #include diff --git a/drivers/power/pmic/sandbox.c b/drivers/power/pmic/sandbox.c index ddc11d6df86..14b82455f5f 100644 --- a/drivers/power/pmic/sandbox.c +++ b/drivers/power/pmic/sandbox.c @@ -6,6 +6,7 @@ #define LOG_CATEGORY UCLASS_PMIC +#include #include #include #include diff --git a/drivers/power/pmic/stpmic1.c b/drivers/power/pmic/stpmic1.c index c99a0c27b33..8701d4f971c 100644 --- a/drivers/power/pmic/stpmic1.c +++ b/drivers/power/pmic/stpmic1.c @@ -3,6 +3,7 @@ * Copyright (C) 2018, STMicroelectronics - All Rights Reserved */ +#include #include #include #include diff --git a/drivers/power/pmic/tps65090.c b/drivers/power/pmic/tps65090.c index ad2ab34719e..2a04d5948a5 100644 --- a/drivers/power/pmic/tps65090.c +++ b/drivers/power/pmic/tps65090.c @@ -4,6 +4,7 @@ * Written by Simon Glass */ +#include #include #include #include diff --git a/drivers/power/pmic/tps65219.c b/drivers/power/pmic/tps65219.c index 0716af027a3..9462afee77f 100644 --- a/drivers/power/pmic/tps65219.c +++ b/drivers/power/pmic/tps65219.c @@ -4,6 +4,7 @@ * Author: Neil Armstrong */ +#include #include #include #include diff --git a/drivers/power/pmic/tps65941.c b/drivers/power/pmic/tps65941.c index c3490db2a08..943d845086c 100644 --- a/drivers/power/pmic/tps65941.c +++ b/drivers/power/pmic/tps65941.c @@ -4,6 +4,7 @@ * Keerthy */ +#include #include #include #include diff --git a/drivers/power/power_core.c b/drivers/power/power_core.c index 1caf9f09346..4f7ba099cd9 100644 --- a/drivers/power/power_core.c +++ b/drivers/power/power_core.c @@ -9,6 +9,7 @@ * (C) Copyright 2008-2009 Freescale Semiconductor, Inc. */ +#include #include #include #include diff --git a/drivers/power/power_dialog.c b/drivers/power/power_dialog.c index a5c7ea34c4a..ad7aaf35a9a 100644 --- a/drivers/power/power_dialog.c +++ b/drivers/power/power_dialog.c @@ -4,7 +4,7 @@ * Lukasz Majewski */ -#include +#include #include #include #include diff --git a/drivers/power/power_fsl.c b/drivers/power/power_fsl.c index a10a14a7961..9dc930fb305 100644 --- a/drivers/power/power_fsl.c +++ b/drivers/power/power_fsl.c @@ -4,7 +4,7 @@ * Lukasz Majewski */ -#include +#include #include #include #include diff --git a/drivers/power/power_i2c.c b/drivers/power/power_i2c.c index a871fc41987..b67ac2f027b 100644 --- a/drivers/power/power_i2c.c +++ b/drivers/power/power_i2c.c @@ -10,6 +10,7 @@ * (C) Copyright 2019 NXP */ +#include #include #include #include diff --git a/drivers/power/power_spi.c b/drivers/power/power_spi.c index 54427316ce4..1eaf9773ef8 100644 --- a/drivers/power/power_spi.c +++ b/drivers/power/power_spi.c @@ -9,6 +9,7 @@ * (C) Copyright 2008-2009 Freescale Semiconductor, Inc. */ +#include #include #include #include diff --git a/drivers/power/regulator/act8846.c b/drivers/power/regulator/act8846.c index d3e72da0d35..bdce97365dd 100644 --- a/drivers/power/regulator/act8846.c +++ b/drivers/power/regulator/act8846.c @@ -8,6 +8,7 @@ * zyw */ +#include #include #include #include diff --git a/drivers/power/regulator/anatop_regulator.c b/drivers/power/regulator/anatop_regulator.c index 824a753db16..096a1565d5a 100644 --- a/drivers/power/regulator/anatop_regulator.c +++ b/drivers/power/regulator/anatop_regulator.c @@ -4,6 +4,7 @@ * Copyright (C) 2021 Linaro */ +#include #include #include #include diff --git a/drivers/power/regulator/as3722_regulator.c b/drivers/power/regulator/as3722_regulator.c index 8d60965fe9a..ec0776b440b 100644 --- a/drivers/power/regulator/as3722_regulator.c +++ b/drivers/power/regulator/as3722_regulator.c @@ -6,6 +6,7 @@ * Placeholder regulator driver for as3722. */ +#include #include #include #include diff --git a/drivers/power/regulator/bd71837.c b/drivers/power/regulator/bd71837.c index 59aec1a7313..913ed88d45f 100644 --- a/drivers/power/regulator/bd71837.c +++ b/drivers/power/regulator/bd71837.c @@ -5,6 +5,7 @@ * ROHM BD71837 regulator driver */ +#include #include #include #include diff --git a/drivers/power/regulator/da9063.c b/drivers/power/regulator/da9063.c index 5d566b06a52..8df1abcf788 100644 --- a/drivers/power/regulator/da9063.c +++ b/drivers/power/regulator/da9063.c @@ -4,6 +4,7 @@ * Martin Fuzzey */ +#include #include #include #include diff --git a/drivers/power/regulator/fan53555.c b/drivers/power/regulator/fan53555.c index 5cba58f91ca..fa8d88f2e0d 100644 --- a/drivers/power/regulator/fan53555.c +++ b/drivers/power/regulator/fan53555.c @@ -3,6 +3,7 @@ * (C) 2018 Theobroma Systems Design und Consulting GmbH */ +#include #include #include #include diff --git a/drivers/power/regulator/fixed.c b/drivers/power/regulator/fixed.c index 98c89bf2aff..590c288d657 100644 --- a/drivers/power/regulator/fixed.c +++ b/drivers/power/regulator/fixed.c @@ -5,6 +5,7 @@ * Przemyslaw Marczak */ +#include #include #include #include diff --git a/drivers/power/regulator/gpio-regulator.c b/drivers/power/regulator/gpio-regulator.c index 38b22535c3d..74137b7b876 100644 --- a/drivers/power/regulator/gpio-regulator.c +++ b/drivers/power/regulator/gpio-regulator.c @@ -4,6 +4,7 @@ * Keerthy */ +#include #include #include #include diff --git a/drivers/power/regulator/lp873x_regulator.c b/drivers/power/regulator/lp873x_regulator.c index c59d77118ad..c326f8efa47 100644 --- a/drivers/power/regulator/lp873x_regulator.c +++ b/drivers/power/regulator/lp873x_regulator.c @@ -6,6 +6,7 @@ * Keerthy */ +#include #include #include #include diff --git a/drivers/power/regulator/lp87565_regulator.c b/drivers/power/regulator/lp87565_regulator.c index d622d956815..6bbc831d2c8 100644 --- a/drivers/power/regulator/lp87565_regulator.c +++ b/drivers/power/regulator/lp87565_regulator.c @@ -6,6 +6,7 @@ * Keerthy */ +#include #include #include #include diff --git a/drivers/power/regulator/max77686.c b/drivers/power/regulator/max77686.c index 4e0ba12a0ef..3a208039934 100644 --- a/drivers/power/regulator/max77686.c +++ b/drivers/power/regulator/max77686.c @@ -6,6 +6,7 @@ * Przemyslaw Marczak */ +#include #include #include #include diff --git a/drivers/power/regulator/npcm8xx_regulator.c b/drivers/power/regulator/npcm8xx_regulator.c index 30d1b8945cb..fcd1058cdf5 100644 --- a/drivers/power/regulator/npcm8xx_regulator.c +++ b/drivers/power/regulator/npcm8xx_regulator.c @@ -3,6 +3,7 @@ * Copyright (c) 2022 Nuvoton Technology Corp. */ +#include #include #include #include diff --git a/drivers/power/regulator/palmas_regulator.c b/drivers/power/regulator/palmas_regulator.c index 2286eac93fb..d615e947340 100644 --- a/drivers/power/regulator/palmas_regulator.c +++ b/drivers/power/regulator/palmas_regulator.c @@ -6,6 +6,7 @@ * Keerthy */ +#include #include #include #include diff --git a/drivers/power/regulator/pbias_regulator.c b/drivers/power/regulator/pbias_regulator.c index 8f599cab689..cf4e2858443 100644 --- a/drivers/power/regulator/pbias_regulator.c +++ b/drivers/power/regulator/pbias_regulator.c @@ -4,6 +4,7 @@ * Jean-Jacques Hiblot */ +#include #include #include #include diff --git a/drivers/power/regulator/pca9450.c b/drivers/power/regulator/pca9450.c index 9faf1eab5f9..7ca20d1f7f8 100644 --- a/drivers/power/regulator/pca9450.c +++ b/drivers/power/regulator/pca9450.c @@ -7,6 +7,7 @@ * ROHM BD71837 regulator driver */ +#include #include #include #include diff --git a/drivers/power/regulator/pfuze100.c b/drivers/power/regulator/pfuze100.c index bf3a7019411..1d926689b3b 100644 --- a/drivers/power/regulator/pfuze100.c +++ b/drivers/power/regulator/pfuze100.c @@ -5,6 +5,7 @@ * Peng Fan */ +#include #include #include #include diff --git a/drivers/power/regulator/pwm_regulator.c b/drivers/power/regulator/pwm_regulator.c index ff738faadc5..ca59f3ae3e1 100644 --- a/drivers/power/regulator/pwm_regulator.c +++ b/drivers/power/regulator/pwm_regulator.c @@ -7,6 +7,7 @@ * Author: Lee Jones */ +#include #include #include #include diff --git a/drivers/power/regulator/regulator-uclass.c b/drivers/power/regulator/regulator-uclass.c index 66fd531da04..77d101f262e 100644 --- a/drivers/power/regulator/regulator-uclass.c +++ b/drivers/power/regulator/regulator-uclass.c @@ -6,6 +6,7 @@ #define LOG_CATEGORY UCLASS_REGULATOR +#include #include #include #include diff --git a/drivers/power/regulator/regulator_common.c b/drivers/power/regulator/regulator_common.c index e3565d32a01..0116fa01bbf 100644 --- a/drivers/power/regulator/regulator_common.c +++ b/drivers/power/regulator/regulator_common.c @@ -4,6 +4,7 @@ * Sven Schwermer */ +#include #include #include #include diff --git a/drivers/power/regulator/rk8xx.c b/drivers/power/regulator/rk8xx.c index bf3af781527..1bd4605d43a 100644 --- a/drivers/power/regulator/rk8xx.c +++ b/drivers/power/regulator/rk8xx.c @@ -8,6 +8,7 @@ * zyw */ +#include #include #include #include diff --git a/drivers/power/regulator/s2mps11_regulator.c b/drivers/power/regulator/s2mps11_regulator.c index 96de55065fe..987a1f9d863 100644 --- a/drivers/power/regulator/s2mps11_regulator.c +++ b/drivers/power/regulator/s2mps11_regulator.c @@ -4,6 +4,7 @@ * Jaehoon Chung */ +#include #include #include #include diff --git a/drivers/power/regulator/s5m8767.c b/drivers/power/regulator/s5m8767.c index 0dcf0990802..23575831f38 100644 --- a/drivers/power/regulator/s5m8767.c +++ b/drivers/power/regulator/s5m8767.c @@ -3,6 +3,7 @@ * Copyright (C) 2015 Google, Inc */ +#include #include #include #include diff --git a/drivers/power/regulator/sandbox.c b/drivers/power/regulator/sandbox.c index 80a68f5a30d..71ef0c5441a 100644 --- a/drivers/power/regulator/sandbox.c +++ b/drivers/power/regulator/sandbox.c @@ -4,6 +4,7 @@ * Przemyslaw Marczak */ +#include #include #include #include diff --git a/drivers/power/regulator/scmi_regulator.c b/drivers/power/regulator/scmi_regulator.c index 99f6506f162..9c72c35d039 100644 --- a/drivers/power/regulator/scmi_regulator.c +++ b/drivers/power/regulator/scmi_regulator.c @@ -5,6 +5,7 @@ #define LOG_CATEGORY UCLASS_REGULATOR +#include #include #include #include diff --git a/drivers/power/regulator/stm32-vrefbuf.c b/drivers/power/regulator/stm32-vrefbuf.c index dd8a33f15be..c37998a4bac 100644 --- a/drivers/power/regulator/stm32-vrefbuf.c +++ b/drivers/power/regulator/stm32-vrefbuf.c @@ -8,6 +8,7 @@ #define LOG_CATEGORY UCLASS_REGULATOR +#include #include #include #include diff --git a/drivers/power/regulator/stpmic1.c b/drivers/power/regulator/stpmic1.c index b5ffa1cd589..4839d834316 100644 --- a/drivers/power/regulator/stpmic1.c +++ b/drivers/power/regulator/stpmic1.c @@ -4,6 +4,7 @@ * Author: Christophe Kerello */ +#include #include #include #include diff --git a/drivers/power/regulator/tps62360_regulator.c b/drivers/power/regulator/tps62360_regulator.c index 9acc6b90549..7014b1982d0 100644 --- a/drivers/power/regulator/tps62360_regulator.c +++ b/drivers/power/regulator/tps62360_regulator.c @@ -4,6 +4,7 @@ * Tero Kristo */ +#include #include #include #include diff --git a/drivers/power/regulator/tps65090_regulator.c b/drivers/power/regulator/tps65090_regulator.c index 2d414de1490..fa15e61a10e 100644 --- a/drivers/power/regulator/tps65090_regulator.c +++ b/drivers/power/regulator/tps65090_regulator.c @@ -3,10 +3,10 @@ * Copyright (c) 2015 Google, Inc */ +#include #include #include #include -#include #include #include #include diff --git a/drivers/power/regulator/tps65219_regulator.c b/drivers/power/regulator/tps65219_regulator.c index b7124fed024..f87d07e61fb 100644 --- a/drivers/power/regulator/tps65219_regulator.c +++ b/drivers/power/regulator/tps65219_regulator.c @@ -5,6 +5,7 @@ * */ +#include #include #include #include diff --git a/drivers/power/regulator/tps65910_regulator.c b/drivers/power/regulator/tps65910_regulator.c index 562fd7db190..a4b9d449274 100644 --- a/drivers/power/regulator/tps65910_regulator.c +++ b/drivers/power/regulator/tps65910_regulator.c @@ -3,6 +3,7 @@ * Copyright (C) EETS GmbH, 2017, Felix Brack */ +#include #include #include #include diff --git a/drivers/power/regulator/tps65941_regulator.c b/drivers/power/regulator/tps65941_regulator.c index bc4d153fd84..5809a53fa21 100644 --- a/drivers/power/regulator/tps65941_regulator.c +++ b/drivers/power/regulator/tps65941_regulator.c @@ -6,6 +6,7 @@ * Keerthy */ +#include #include #include #include diff --git a/drivers/power/sy8106a.c b/drivers/power/sy8106a.c index fb6028de71a..45f47939869 100644 --- a/drivers/power/sy8106a.c +++ b/drivers/power/sy8106a.c @@ -3,6 +3,7 @@ * (C) Copyright 2016 * Jelle van der Waa */ +#include #include #include diff --git a/drivers/power/tps6586x.c b/drivers/power/tps6586x.c index 4034a9b49dd..37f1c459a63 100644 --- a/drivers/power/tps6586x.c +++ b/drivers/power/tps6586x.c @@ -4,12 +4,12 @@ * (C) Copyright 2010,2011 NVIDIA Corporation */ +#include #include #include #include #include #include -#include static struct udevice *tps6586x_dev; diff --git a/drivers/pwm/cros_ec_pwm.c b/drivers/pwm/cros_ec_pwm.c index b89f00f151b..4a39c319aa2 100644 --- a/drivers/pwm/cros_ec_pwm.c +++ b/drivers/pwm/cros_ec_pwm.c @@ -1,5 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ +#include #include #include #include diff --git a/drivers/pwm/exynos_pwm.c b/drivers/pwm/exynos_pwm.c index 5ded60978f4..609025d680d 100644 --- a/drivers/pwm/exynos_pwm.c +++ b/drivers/pwm/exynos_pwm.c @@ -3,6 +3,7 @@ * Copyright 2016 Google Inc. */ +#include #include #include #include diff --git a/drivers/pwm/pwm-aspeed.c b/drivers/pwm/pwm-aspeed.c index ebc9d9a8975..b03472d2345 100644 --- a/drivers/pwm/pwm-aspeed.c +++ b/drivers/pwm/pwm-aspeed.c @@ -38,6 +38,7 @@ * This improvement can disable/enable through PWM_ASPEED_CTRL_DUTY_SYNC_DISABLE. */ +#include #include #include #include diff --git a/drivers/pwm/pwm-at91.c b/drivers/pwm/pwm-at91.c index ffc37180eb4..3ff1fb6d5c3 100644 --- a/drivers/pwm/pwm-at91.c +++ b/drivers/pwm/pwm-at91.c @@ -9,6 +9,7 @@ * Based on drivers/pwm/pwm-atmel.c from Linux. */ #include +#include #include #include #include diff --git a/drivers/pwm/pwm-cadence-ttc.c b/drivers/pwm/pwm-cadence-ttc.c index 767628833bc..d9f6736a7ae 100644 --- a/drivers/pwm/pwm-cadence-ttc.c +++ b/drivers/pwm/pwm-cadence-ttc.c @@ -6,6 +6,7 @@ #define LOG_CATEGORY UCLASS_PWM #include +#include #include #include #include diff --git a/drivers/pwm/pwm-imx.c b/drivers/pwm/pwm-imx.c index 320ea7c4239..8fbb40cc276 100644 --- a/drivers/pwm/pwm-imx.c +++ b/drivers/pwm/pwm-imx.c @@ -6,6 +6,7 @@ * Basic support for the pwm module on imx6. */ +#include #include #include #include diff --git a/drivers/pwm/pwm-meson.c b/drivers/pwm/pwm-meson.c index c2597d8b669..60959720dac 100644 --- a/drivers/pwm/pwm-meson.c +++ b/drivers/pwm/pwm-meson.c @@ -16,6 +16,7 @@ * current period to complete first). */ +#include #include #include #include diff --git a/drivers/pwm/pwm-mtk.c b/drivers/pwm/pwm-mtk.c index 9776a41ff48..ad845ed9662 100644 --- a/drivers/pwm/pwm-mtk.c +++ b/drivers/pwm/pwm-mtk.c @@ -5,6 +5,7 @@ * Author: Sam Shih */ +#include #include #include #include diff --git a/drivers/pwm/pwm-sifive.c b/drivers/pwm/pwm-sifive.c index e9777c71f5e..b9813a3b6bb 100644 --- a/drivers/pwm/pwm-sifive.c +++ b/drivers/pwm/pwm-sifive.c @@ -12,6 +12,7 @@ * - The hardware generates only inverted output. */ +#include #include #include #include diff --git a/drivers/pwm/pwm-ti-ehrpwm.c b/drivers/pwm/pwm-ti-ehrpwm.c index 563109ef0f8..fefa3c65ec4 100644 --- a/drivers/pwm/pwm-ti-ehrpwm.c +++ b/drivers/pwm/pwm-ti-ehrpwm.c @@ -7,6 +7,7 @@ * Based on Linux kernel drivers/pwm/pwm-tiehrpwm.c */ +#include #include #include #include diff --git a/drivers/pwm/pwm-uclass.c b/drivers/pwm/pwm-uclass.c index 6543db1d623..648d0757ba6 100644 --- a/drivers/pwm/pwm-uclass.c +++ b/drivers/pwm/pwm-uclass.c @@ -6,6 +6,7 @@ #define LOG_CATEGORY UCLASS_PWM +#include #include #include diff --git a/drivers/pwm/rk_pwm.c b/drivers/pwm/rk_pwm.c index 0a64eb01dc2..1858d597338 100644 --- a/drivers/pwm/rk_pwm.c +++ b/drivers/pwm/rk_pwm.c @@ -4,6 +4,7 @@ * Written by Simon Glass */ +#include #include #include #include diff --git a/drivers/pwm/sandbox_pwm.c b/drivers/pwm/sandbox_pwm.c index 0d798609dda..4df15f0a2e8 100644 --- a/drivers/pwm/sandbox_pwm.c +++ b/drivers/pwm/sandbox_pwm.c @@ -4,6 +4,7 @@ * Written by Simon Glass */ +#include #include #include #include diff --git a/drivers/pwm/sunxi_pwm.c b/drivers/pwm/sunxi_pwm.c index 2140a05b679..bb1bec05ec3 100644 --- a/drivers/pwm/sunxi_pwm.c +++ b/drivers/pwm/sunxi_pwm.c @@ -3,6 +3,7 @@ * Copyright (c) 2017-2018 Vasily Khoruzhick */ +#include #include #include #include diff --git a/drivers/pwm/tegra_pwm.c b/drivers/pwm/tegra_pwm.c index e3f1417f2ad..87034706060 100644 --- a/drivers/pwm/tegra_pwm.c +++ b/drivers/pwm/tegra_pwm.c @@ -3,6 +3,7 @@ * Copyright 2016 Google Inc. */ +#include #include #include #include diff --git a/drivers/ram/aspeed/sdram_ast2500.c b/drivers/ram/aspeed/sdram_ast2500.c index 0d6ab79f96f..dc466a88e71 100644 --- a/drivers/ram/aspeed/sdram_ast2500.c +++ b/drivers/ram/aspeed/sdram_ast2500.c @@ -5,7 +5,7 @@ * Copyright 2016 Google, Inc */ -#include +#include #include #include #include diff --git a/drivers/ram/aspeed/sdram_ast2600.c b/drivers/ram/aspeed/sdram_ast2600.c index 55e80fba3dc..d463933363e 100644 --- a/drivers/ram/aspeed/sdram_ast2600.c +++ b/drivers/ram/aspeed/sdram_ast2600.c @@ -2,7 +2,7 @@ /* * Copyright (C) ASPEED Technology Inc. */ -#include +#include #include #include #include diff --git a/drivers/ram/bmips_ram.c b/drivers/ram/bmips_ram.c index 760bebdbba0..98045248ecf 100644 --- a/drivers/ram/bmips_ram.c +++ b/drivers/ram/bmips_ram.c @@ -7,6 +7,7 @@ * Copyright (C) 2009 Florian Fainelli */ +#include #include #include #include diff --git a/drivers/ram/cadence/ddr_ctrl.c b/drivers/ram/cadence/ddr_ctrl.c index 0fa60e766a7..3e5959a84a3 100644 --- a/drivers/ram/cadence/ddr_ctrl.c +++ b/drivers/ram/cadence/ddr_ctrl.c @@ -24,6 +24,7 @@ * bandwidth allocated to each AXI slave can be set. */ +#include #include #include #include diff --git a/drivers/ram/imxrt_sdram.c b/drivers/ram/imxrt_sdram.c index 3df106c9b79..6a15242c20c 100644 --- a/drivers/ram/imxrt_sdram.c +++ b/drivers/ram/imxrt_sdram.c @@ -4,6 +4,7 @@ * Author(s): Giulio Benetti */ +#include #include #include #include diff --git a/drivers/ram/k3-am654-ddrss.c b/drivers/ram/k3-am654-ddrss.c index 21ff9d761e1..cff8ffc8929 100644 --- a/drivers/ram/k3-am654-ddrss.c +++ b/drivers/ram/k3-am654-ddrss.c @@ -6,6 +6,7 @@ * Lokesh Vutla */ +#include #include #include #include diff --git a/drivers/ram/k3-ddrss/k3-ddrss.c b/drivers/ram/k3-ddrss/k3-ddrss.c index 525b6d5b79f..a5c9b82cf1d 100644 --- a/drivers/ram/k3-ddrss/k3-ddrss.c +++ b/drivers/ram/k3-ddrss/k3-ddrss.c @@ -5,6 +5,7 @@ * Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/ */ +#include #include #include #include diff --git a/drivers/ram/mediatek/ddr3-mt7629.c b/drivers/ram/mediatek/ddr3-mt7629.c index c27c4593b9d..f65fcf179cf 100644 --- a/drivers/ram/mediatek/ddr3-mt7629.c +++ b/drivers/ram/mediatek/ddr3-mt7629.c @@ -8,7 +8,7 @@ */ #include -#include +#include #include #include #include diff --git a/drivers/ram/mpc83xx_sdram.c b/drivers/ram/mpc83xx_sdram.c index 28a663289a2..11676d4fae7 100644 --- a/drivers/ram/mpc83xx_sdram.c +++ b/drivers/ram/mpc83xx_sdram.c @@ -4,6 +4,7 @@ * Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc */ +#include #include #include #include diff --git a/drivers/ram/ram-uclass.c b/drivers/ram/ram-uclass.c index a33d583cc44..4e21240fd4c 100644 --- a/drivers/ram/ram-uclass.c +++ b/drivers/ram/ram-uclass.c @@ -6,6 +6,7 @@ #define LOG_CATEGORY UCLASS_RAM +#include #include #include #include diff --git a/drivers/ram/renesas/rzn1/ddr_async.c b/drivers/ram/renesas/rzn1/ddr_async.c index 4d470aae191..7a81497bc92 100644 --- a/drivers/ram/renesas/rzn1/ddr_async.c +++ b/drivers/ram/renesas/rzn1/ddr_async.c @@ -7,6 +7,7 @@ * * Copyright (C) 2015 Renesas Electronics Europe Ltd */ +#include #include #include #include diff --git a/drivers/ram/rockchip/dmc-rk3368.c b/drivers/ram/rockchip/dmc-rk3368.c index 42114a5aa91..5279bf0a154 100644 --- a/drivers/ram/rockchip/dmc-rk3368.c +++ b/drivers/ram/rockchip/dmc-rk3368.c @@ -3,7 +3,7 @@ * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH */ -#include +#include #include #include #include diff --git a/drivers/ram/rockchip/sdram_common.c b/drivers/ram/rockchip/sdram_common.c index b7a8fce607c..60fc90d0a5c 100644 --- a/drivers/ram/rockchip/sdram_common.c +++ b/drivers/ram/rockchip/sdram_common.c @@ -3,7 +3,7 @@ * (C) Copyright 2018 Rockchip Electronics Co., Ltd. */ -#include +#include #include #include #include diff --git a/drivers/ram/rockchip/sdram_pctl_px30.c b/drivers/ram/rockchip/sdram_pctl_px30.c index 3ec98af536e..e5c80fb83b3 100644 --- a/drivers/ram/rockchip/sdram_pctl_px30.c +++ b/drivers/ram/rockchip/sdram_pctl_px30.c @@ -3,6 +3,7 @@ * (C) Copyright 2018 Rockchip Electronics Co., Ltd. */ +#include #include #include #include diff --git a/drivers/ram/rockchip/sdram_phy_px30.c b/drivers/ram/rockchip/sdram_phy_px30.c index 5416eef3878..f7f6de1ba98 100644 --- a/drivers/ram/rockchip/sdram_phy_px30.c +++ b/drivers/ram/rockchip/sdram_phy_px30.c @@ -3,6 +3,7 @@ * (C) Copyright 2018 Rockchip Electronics Co., Ltd. */ +#include #include #include #include diff --git a/drivers/ram/rockchip/sdram_px30.c b/drivers/ram/rockchip/sdram_px30.c index 37e62120504..21498e89570 100644 --- a/drivers/ram/rockchip/sdram_px30.c +++ b/drivers/ram/rockchip/sdram_px30.c @@ -3,7 +3,7 @@ * (C) Copyright 2018 Rockchip Electronics Co., Ltd. */ -#include +#include #include #include #include diff --git a/drivers/ram/rockchip/sdram_rk3066.c b/drivers/ram/rockchip/sdram_rk3066.c index a280e2d9fa1..562cf544c90 100644 --- a/drivers/ram/rockchip/sdram_rk3066.c +++ b/drivers/ram/rockchip/sdram_rk3066.c @@ -6,7 +6,7 @@ * Adapted from the very similar rk3188 ddr init. */ -#include +#include #include #include #include diff --git a/drivers/ram/rockchip/sdram_rk3128.c b/drivers/ram/rockchip/sdram_rk3128.c index 66611f80b2d..ded65393806 100644 --- a/drivers/ram/rockchip/sdram_rk3128.c +++ b/drivers/ram/rockchip/sdram_rk3128.c @@ -3,7 +3,7 @@ * (C) Copyright 2017 Rockchip Electronics Co., Ltd. */ -#include +#include #include #include #include diff --git a/drivers/ram/rockchip/sdram_rk3188.c b/drivers/ram/rockchip/sdram_rk3188.c index 618bce5c9f4..e1b28c6e593 100644 --- a/drivers/ram/rockchip/sdram_rk3188.c +++ b/drivers/ram/rockchip/sdram_rk3188.c @@ -6,7 +6,7 @@ * Adapted from the very similar rk3288 ddr init. */ -#include +#include #include #include #include diff --git a/drivers/ram/rockchip/sdram_rk322x.c b/drivers/ram/rockchip/sdram_rk322x.c index a48a5091184..5fc23c11193 100644 --- a/drivers/ram/rockchip/sdram_rk322x.c +++ b/drivers/ram/rockchip/sdram_rk322x.c @@ -2,7 +2,7 @@ /* * (C) Copyright 2017 Rockchip Electronics Co., Ltd */ -#include +#include #include #include #include diff --git a/drivers/ram/rockchip/sdram_rk3288.c b/drivers/ram/rockchip/sdram_rk3288.c index c9f61e933e9..242d564a7d2 100644 --- a/drivers/ram/rockchip/sdram_rk3288.c +++ b/drivers/ram/rockchip/sdram_rk3288.c @@ -6,7 +6,7 @@ * Adapted from coreboot. */ -#include +#include #include #include #include diff --git a/drivers/ram/rockchip/sdram_rk3308.c b/drivers/ram/rockchip/sdram_rk3308.c index 8071997f8d8..264366291cf 100644 --- a/drivers/ram/rockchip/sdram_rk3308.c +++ b/drivers/ram/rockchip/sdram_rk3308.c @@ -3,7 +3,7 @@ * (C) Copyright 2019 Rockchip Electronics Co., Ltd. */ -#include +#include #include #include #include diff --git a/drivers/ram/rockchip/sdram_rk3328.c b/drivers/ram/rockchip/sdram_rk3328.c index 99690d67a50..b5ca8ca436f 100644 --- a/drivers/ram/rockchip/sdram_rk3328.c +++ b/drivers/ram/rockchip/sdram_rk3328.c @@ -2,7 +2,7 @@ /* * (C) Copyright 2017 Rockchip Electronics Co., Ltd. */ -#include +#include #include #include #include diff --git a/drivers/ram/rockchip/sdram_rk3399.c b/drivers/ram/rockchip/sdram_rk3399.c index ef9a1824b2b..02cc4a38cf0 100644 --- a/drivers/ram/rockchip/sdram_rk3399.c +++ b/drivers/ram/rockchip/sdram_rk3399.c @@ -5,7 +5,7 @@ * Adapted from coreboot. */ -#include +#include #include #include #include diff --git a/drivers/ram/rockchip/sdram_rk3568.c b/drivers/ram/rockchip/sdram_rk3568.c index a252d5c7010..f661615c1b9 100644 --- a/drivers/ram/rockchip/sdram_rk3568.c +++ b/drivers/ram/rockchip/sdram_rk3568.c @@ -3,7 +3,7 @@ * (C) Copyright 2021 Rockchip Electronics Co., Ltd. */ -#include +#include #include #include #include diff --git a/drivers/ram/rockchip/sdram_rk3588.c b/drivers/ram/rockchip/sdram_rk3588.c index a144b432d76..cf56e2a9412 100644 --- a/drivers/ram/rockchip/sdram_rk3588.c +++ b/drivers/ram/rockchip/sdram_rk3588.c @@ -3,7 +3,7 @@ * (C) Copyright 2021 Rockchip Electronics Co., Ltd. */ -#include +#include #include #include #include diff --git a/drivers/ram/rockchip/sdram_rv1126.c b/drivers/ram/rockchip/sdram_rv1126.c index 4fbb088a8d9..849e15a9193 100644 --- a/drivers/ram/rockchip/sdram_rv1126.c +++ b/drivers/ram/rockchip/sdram_rv1126.c @@ -4,7 +4,7 @@ * Copyright (c) 2022 Edgeble AI Technologies Pvt. Ltd. */ -#include +#include #include #include #include diff --git a/drivers/ram/sandbox_ram.c b/drivers/ram/sandbox_ram.c index 2097da56532..910dce623e9 100644 --- a/drivers/ram/sandbox_ram.c +++ b/drivers/ram/sandbox_ram.c @@ -4,6 +4,7 @@ * Written by Simon Glass */ +#include #include #include #include diff --git a/drivers/ram/sifive/sifive_ddr.c b/drivers/ram/sifive/sifive_ddr.c index bd2f438d727..4bd69a62be2 100644 --- a/drivers/ram/sifive/sifive_ddr.c +++ b/drivers/ram/sifive/sifive_ddr.c @@ -6,6 +6,7 @@ * Pragnesh Patel */ +#include #include #include #include diff --git a/drivers/ram/starfive/ddrcsr_boot.c b/drivers/ram/starfive/ddrcsr_boot.c index 6764b3ed5cc..f2dd55f74a0 100644 --- a/drivers/ram/starfive/ddrcsr_boot.c +++ b/drivers/ram/starfive/ddrcsr_boot.c @@ -4,6 +4,7 @@ * Author: Yanhong Wang */ +#include #include #include #include diff --git a/drivers/ram/starfive/ddrphy_start.c b/drivers/ram/starfive/ddrphy_start.c index efe3f8a181a..479b6ef1041 100644 --- a/drivers/ram/starfive/ddrphy_start.c +++ b/drivers/ram/starfive/ddrphy_start.c @@ -4,6 +4,7 @@ * Author: Yanhong Wang */ +#include #include #include "starfive_ddr.h" diff --git a/drivers/ram/starfive/ddrphy_train.c b/drivers/ram/starfive/ddrphy_train.c index 0aff1e8727e..0740f49be5b 100644 --- a/drivers/ram/starfive/ddrphy_train.c +++ b/drivers/ram/starfive/ddrphy_train.c @@ -4,7 +4,7 @@ * Author: Yanhong Wang */ -#include +#include #include static const u32 ddr_train_data[] = { diff --git a/drivers/ram/starfive/ddrphy_utils.c b/drivers/ram/starfive/ddrphy_utils.c index d6dd6ee7a85..1c9fe0a7846 100644 --- a/drivers/ram/starfive/ddrphy_utils.c +++ b/drivers/ram/starfive/ddrphy_utils.c @@ -4,7 +4,7 @@ * Author: Yanhong Wang */ -#include +#include #include static const u32 ddr_phy_data[] = { diff --git a/drivers/ram/starfive/starfive_ddr.c b/drivers/ram/starfive/starfive_ddr.c index b31ed3bcf61..a0a3d6b33dc 100644 --- a/drivers/ram/starfive/starfive_ddr.c +++ b/drivers/ram/starfive/starfive_ddr.c @@ -4,6 +4,7 @@ * Author: Yanhong Wang */ +#include #include #include #include diff --git a/drivers/ram/starfive/starfive_ddr.h b/drivers/ram/starfive/starfive_ddr.h index c29d26b510c..d0ec1c1da80 100644 --- a/drivers/ram/starfive/starfive_ddr.h +++ b/drivers/ram/starfive/starfive_ddr.h @@ -7,8 +7,6 @@ #ifndef __STARFIVE_DDR_H__ #define __STARFIVE_DDR_H__ -#include - #define SEC_CTRL_ADDR 0x1000 #define PHY_BASE_ADDR 0x800 #define PHY_AC_BASE_ADDR 0x1000 diff --git a/drivers/ram/stm32_sdram.c b/drivers/ram/stm32_sdram.c index 10dc05dd640..891f4137813 100644 --- a/drivers/ram/stm32_sdram.c +++ b/drivers/ram/stm32_sdram.c @@ -6,6 +6,7 @@ #define LOG_CATEGORY UCLASS_RAM +#include #include #include #include diff --git a/drivers/ram/stm32mp1/stm32mp1_ddr.c b/drivers/ram/stm32mp1/stm32mp1_ddr.c index d7834b32299..8ee4e24f39d 100644 --- a/drivers/ram/stm32mp1/stm32mp1_ddr.c +++ b/drivers/ram/stm32mp1/stm32mp1_ddr.c @@ -5,6 +5,7 @@ #define LOG_CATEGORY UCLASS_RAM +#include #include #include #include diff --git a/drivers/ram/stm32mp1/stm32mp1_interactive.c b/drivers/ram/stm32mp1/stm32mp1_interactive.c index 6340afbb870..2c19847c663 100644 --- a/drivers/ram/stm32mp1/stm32mp1_interactive.c +++ b/drivers/ram/stm32mp1/stm32mp1_interactive.c @@ -5,6 +5,7 @@ #define LOG_CATEGORY UCLASS_RAM +#include #include #include #include diff --git a/drivers/ram/stm32mp1/stm32mp1_ram.c b/drivers/ram/stm32mp1/stm32mp1_ram.c index debc458c0e2..a82b1db7592 100644 --- a/drivers/ram/stm32mp1/stm32mp1_ram.c +++ b/drivers/ram/stm32mp1/stm32mp1_ram.c @@ -5,6 +5,7 @@ #define LOG_CATEGORY UCLASS_RAM +#include #include #include #include diff --git a/drivers/ram/stm32mp1/stm32mp1_tests.c b/drivers/ram/stm32mp1/stm32mp1_tests.c index 6108faa7073..c5f33544144 100644 --- a/drivers/ram/stm32mp1/stm32mp1_tests.c +++ b/drivers/ram/stm32mp1/stm32mp1_tests.c @@ -5,6 +5,7 @@ #define LOG_CATEGORY UCLASS_RAM +#include #include #include #include diff --git a/drivers/ram/sunxi/dram_sun20i_d1.c b/drivers/ram/sunxi/dram_sun20i_d1.c index a1794032f3b..38379281d73 100644 --- a/drivers/ram/sunxi/dram_sun20i_d1.c +++ b/drivers/ram/sunxi/dram_sun20i_d1.c @@ -13,7 +13,7 @@ */ #include -#include +#include #ifdef CONFIG_RAM #include #include diff --git a/drivers/reboot-mode/reboot-mode-gpio.c b/drivers/reboot-mode/reboot-mode-gpio.c index 22ee40c3433..305174736ed 100644 --- a/drivers/reboot-mode/reboot-mode-gpio.c +++ b/drivers/reboot-mode/reboot-mode-gpio.c @@ -3,6 +3,7 @@ * Copyright (c), Vaisala Oyj */ +#include #include #include #include diff --git a/drivers/reboot-mode/reboot-mode-nvmem.c b/drivers/reboot-mode/reboot-mode-nvmem.c index b9af242520a..da41ca41d9a 100644 --- a/drivers/reboot-mode/reboot-mode-nvmem.c +++ b/drivers/reboot-mode/reboot-mode-nvmem.c @@ -3,6 +3,7 @@ * Copyright (C) 2022 Sean Anderson */ +#include #include #include #include diff --git a/drivers/reboot-mode/reboot-mode-rtc.c b/drivers/reboot-mode/reboot-mode-rtc.c index 4f4ad63febc..972d0cdbcb5 100644 --- a/drivers/reboot-mode/reboot-mode-rtc.c +++ b/drivers/reboot-mode/reboot-mode-rtc.c @@ -3,6 +3,7 @@ * Copyright (c), Vaisala Oyj */ +#include #include #include #include diff --git a/drivers/reboot-mode/reboot-mode-uclass.c b/drivers/reboot-mode/reboot-mode-uclass.c index 7cbe02eb4ed..2b38aa26b85 100644 --- a/drivers/reboot-mode/reboot-mode-uclass.c +++ b/drivers/reboot-mode/reboot-mode-uclass.c @@ -3,6 +3,7 @@ * Copyright (c), Vaisala Oyj */ +#include #include #include #include diff --git a/drivers/remoteproc/ipu_rproc.c b/drivers/remoteproc/ipu_rproc.c index 2ca78b550a7..996e658e871 100644 --- a/drivers/remoteproc/ipu_rproc.c +++ b/drivers/remoteproc/ipu_rproc.c @@ -8,6 +8,7 @@ * Keerthy */ +#include #include #include #include diff --git a/drivers/remoteproc/k3_system_controller.c b/drivers/remoteproc/k3_system_controller.c index 71238a6058a..071de40fbd6 100644 --- a/drivers/remoteproc/k3_system_controller.c +++ b/drivers/remoteproc/k3_system_controller.c @@ -6,6 +6,7 @@ * Lokesh Vutla */ +#include #include #include #include diff --git a/drivers/remoteproc/pru_rproc.c b/drivers/remoteproc/pru_rproc.c index 9aec138637b..6ec55e27d9d 100644 --- a/drivers/remoteproc/pru_rproc.c +++ b/drivers/remoteproc/pru_rproc.c @@ -6,6 +6,7 @@ * Keerthy */ +#include #include #include #include @@ -398,12 +399,10 @@ static void pru_set_id(struct pru_privdata *priv, struct udevice *dev) { u32 mask2 = 0x38000; - if (device_is_compatible(dev, "ti,am654-rtu") || - device_is_compatible(dev, "ti,am642-rtu")) + if (device_is_compatible(dev, "ti,am654-rtu")) mask2 = 0x6000; - if (device_is_compatible(dev, "ti,am654-tx-pru") || - device_is_compatible(dev, "ti,am642-tx-pru")) + if (device_is_compatible(dev, "ti,am654-tx-pru")) mask2 = 0xc000; if ((priv->pru_iram & mask2) == mask2) @@ -449,9 +448,6 @@ static const struct udevice_id pru_ids[] = { { .compatible = "ti,am654-pru"}, { .compatible = "ti,am654-rtu"}, { .compatible = "ti,am654-tx-pru" }, - { .compatible = "ti,am642-pru"}, - { .compatible = "ti,am642-rtu"}, - { .compatible = "ti,am642-tx-pru" }, {} }; diff --git a/drivers/remoteproc/rproc-elf-loader.c b/drivers/remoteproc/rproc-elf-loader.c index ab1836b3f07..5e070e5076e 100644 --- a/drivers/remoteproc/rproc-elf-loader.c +++ b/drivers/remoteproc/rproc-elf-loader.c @@ -2,6 +2,7 @@ /* * Copyright (C) 2019, STMicroelectronics - All Rights Reserved */ +#include #include #include #include diff --git a/drivers/remoteproc/rproc-uclass.c b/drivers/remoteproc/rproc-uclass.c index 3ba2b40dca3..aa7f7586a81 100644 --- a/drivers/remoteproc/rproc-uclass.c +++ b/drivers/remoteproc/rproc-uclass.c @@ -7,6 +7,7 @@ #define LOG_CATEGORY UCLASS_REMOTEPROC #define pr_fmt(fmt) "%s: " fmt, __func__ +#include #include #include #include diff --git a/drivers/remoteproc/sandbox_testproc.c b/drivers/remoteproc/sandbox_testproc.c index ad575a7c10f..f76f68ebeb4 100644 --- a/drivers/remoteproc/sandbox_testproc.c +++ b/drivers/remoteproc/sandbox_testproc.c @@ -4,6 +4,7 @@ * Texas Instruments Incorporated - https://www.ti.com/ */ #define pr_fmt(fmt) "%s: " fmt, __func__ +#include #include #include #include diff --git a/drivers/remoteproc/stm32_copro.c b/drivers/remoteproc/stm32_copro.c index f45da9a68ac..3e322c4d719 100644 --- a/drivers/remoteproc/stm32_copro.c +++ b/drivers/remoteproc/stm32_copro.c @@ -4,6 +4,7 @@ */ #define LOG_CATEGORY UCLASS_REMOTEPROC +#include #include #include #include diff --git a/drivers/remoteproc/ti_k3_arm64_rproc.c b/drivers/remoteproc/ti_k3_arm64_rproc.c index d3eb957b2e4..767493c1383 100644 --- a/drivers/remoteproc/ti_k3_arm64_rproc.c +++ b/drivers/remoteproc/ti_k3_arm64_rproc.c @@ -7,6 +7,7 @@ * */ +#include #include #include #include diff --git a/drivers/remoteproc/ti_k3_dsp_rproc.c b/drivers/remoteproc/ti_k3_dsp_rproc.c index 57fe1037da0..e790406324a 100644 --- a/drivers/remoteproc/ti_k3_dsp_rproc.c +++ b/drivers/remoteproc/ti_k3_dsp_rproc.c @@ -7,6 +7,7 @@ * Suman Anna */ +#include #include #include #include diff --git a/drivers/remoteproc/ti_k3_r5f_rproc.c b/drivers/remoteproc/ti_k3_r5f_rproc.c index b55b1dc10d4..631e548dcce 100644 --- a/drivers/remoteproc/ti_k3_r5f_rproc.c +++ b/drivers/remoteproc/ti_k3_r5f_rproc.c @@ -7,6 +7,7 @@ * Suman Anna */ +#include #include #include #include diff --git a/drivers/remoteproc/ti_power_proc.c b/drivers/remoteproc/ti_power_proc.c index cf150af4ef9..f55df4a9119 100644 --- a/drivers/remoteproc/ti_power_proc.c +++ b/drivers/remoteproc/ti_power_proc.c @@ -4,6 +4,7 @@ * Texas Instruments Incorporated - https://www.ti.com/ */ #define pr_fmt(fmt) "%s: " fmt, __func__ +#include #include #include #include diff --git a/drivers/reset/reset-ast2500.c b/drivers/reset/reset-ast2500.c index 0ed5396b3e9..d9cecf3a72e 100644 --- a/drivers/reset/reset-ast2500.c +++ b/drivers/reset/reset-ast2500.c @@ -4,6 +4,7 @@ * Copyright 2020 ASPEED Technology Inc. */ +#include #include #include #include diff --git a/drivers/reset/reset-ast2600.c b/drivers/reset/reset-ast2600.c index ec7b9b6625d..1732a450efc 100644 --- a/drivers/reset/reset-ast2600.c +++ b/drivers/reset/reset-ast2600.c @@ -3,6 +3,7 @@ * Copyright 2020 ASPEED Technology Inc. */ +#include #include #include #include diff --git a/drivers/reset/reset-bcm6345.c b/drivers/reset/reset-bcm6345.c index 6f140574216..5383f59ca37 100644 --- a/drivers/reset/reset-bcm6345.c +++ b/drivers/reset/reset-bcm6345.c @@ -6,6 +6,7 @@ * Copyright (C) 2012 Jonas Gorski */ +#include #include #include #include diff --git a/drivers/reset/reset-dra7.c b/drivers/reset/reset-dra7.c index 2f0ec4c042f..05101a94f9b 100644 --- a/drivers/reset/reset-dra7.c +++ b/drivers/reset/reset-dra7.c @@ -7,6 +7,7 @@ */ #include +#include #include #include #include diff --git a/drivers/reset/reset-hisilicon.c b/drivers/reset/reset-hisilicon.c index aca54cd6701..85e02b296b0 100644 --- a/drivers/reset/reset-hisilicon.c +++ b/drivers/reset/reset-hisilicon.c @@ -6,6 +6,7 @@ #include #include #include +#include #include #include #include diff --git a/drivers/reset/reset-hsdk.c b/drivers/reset/reset-hsdk.c index 747e73b17fc..74b1173e887 100644 --- a/drivers/reset/reset-hsdk.c +++ b/drivers/reset/reset-hsdk.c @@ -8,6 +8,7 @@ #include #include +#include #include #include #include diff --git a/drivers/reset/reset-imx7.c b/drivers/reset/reset-imx7.c index 65a352b71fd..a3b3132f2fa 100644 --- a/drivers/reset/reset-imx7.c +++ b/drivers/reset/reset-imx7.c @@ -6,6 +6,7 @@ #include #include #include +#include #include #include #include diff --git a/drivers/reset/reset-jh7110.c b/drivers/reset/reset-jh7110.c index adf722d5871..d6bdf6bb00c 100644 --- a/drivers/reset/reset-jh7110.c +++ b/drivers/reset/reset-jh7110.c @@ -5,6 +5,7 @@ * */ +#include #include #include #include diff --git a/drivers/reset/reset-mediatek.c b/drivers/reset/reset-mediatek.c index 4b3afab92ea..97ed221f739 100644 --- a/drivers/reset/reset-mediatek.c +++ b/drivers/reset/reset-mediatek.c @@ -6,6 +6,7 @@ * Weijie Gao */ +#include #include #include #include diff --git a/drivers/reset/reset-meson.c b/drivers/reset/reset-meson.c index 6337cdaaffa..9d0c8b354f4 100644 --- a/drivers/reset/reset-meson.c +++ b/drivers/reset/reset-meson.c @@ -6,6 +6,7 @@ * Author: Neil Armstrong */ +#include #include #include #include diff --git a/drivers/reset/reset-mtmips.c b/drivers/reset/reset-mtmips.c index 2db6766280f..7bb8469823c 100644 --- a/drivers/reset/reset-mtmips.c +++ b/drivers/reset/reset-mtmips.c @@ -5,6 +5,7 @@ * Author: Weijie Gao */ +#include #include #include #include diff --git a/drivers/reset/reset-raspberrypi.c b/drivers/reset/reset-raspberrypi.c index 1792f0813f7..804e32b8dd1 100644 --- a/drivers/reset/reset-raspberrypi.c +++ b/drivers/reset/reset-raspberrypi.c @@ -4,6 +4,7 @@ * * Copyright (C) 2020 Nicolas Saenz Julienne */ +#include #include #include #include diff --git a/drivers/reset/reset-rockchip.c b/drivers/reset/reset-rockchip.c index 876eb7dddaa..6cabaa10a35 100644 --- a/drivers/reset/reset-rockchip.c +++ b/drivers/reset/reset-rockchip.c @@ -3,6 +3,7 @@ * (C) Copyright 2017 Rockchip Electronics Co., Ltd */ +#include #include #include #include diff --git a/drivers/reset/reset-scmi.c b/drivers/reset/reset-scmi.c index 6dc1fcb3365..b76711f0a8f 100644 --- a/drivers/reset/reset-scmi.c +++ b/drivers/reset/reset-scmi.c @@ -5,6 +5,7 @@ #define LOG_CATEGORY UCLASS_RESET +#include #include #include #include diff --git a/drivers/reset/reset-sifive.c b/drivers/reset/reset-sifive.c index 65f857149b9..23513b2f541 100644 --- a/drivers/reset/reset-sifive.c +++ b/drivers/reset/reset-sifive.c @@ -4,6 +4,7 @@ * Author: Sagar Kadam */ +#include #include #include #include diff --git a/drivers/reset/reset-socfpga.c b/drivers/reset/reset-socfpga.c index 866437fd24f..6e3f03e2484 100644 --- a/drivers/reset/reset-socfpga.c +++ b/drivers/reset/reset-socfpga.c @@ -12,6 +12,7 @@ * Maxime Ripard */ +#include #include #include #include diff --git a/drivers/reset/reset-sunxi.c b/drivers/reset/reset-sunxi.c index fd47e1f9e37..e484d1fff44 100644 --- a/drivers/reset/reset-sunxi.c +++ b/drivers/reset/reset-sunxi.c @@ -4,6 +4,7 @@ * Author: Jagan Teki */ +#include #include #include #include diff --git a/drivers/reset/reset-syscon.c b/drivers/reset/reset-syscon.c index 5be8c9492af..ff387ab6b22 100644 --- a/drivers/reset/reset-syscon.c +++ b/drivers/reset/reset-syscon.c @@ -3,6 +3,7 @@ * Copyright (C) 2020 Sean Anderson */ +#include #include #include #include diff --git a/drivers/reset/reset-ti-sci.c b/drivers/reset/reset-ti-sci.c index e69bcd41cbe..fd654a08f13 100644 --- a/drivers/reset/reset-ti-sci.c +++ b/drivers/reset/reset-ti-sci.c @@ -8,6 +8,7 @@ * Loosely based on Linux kernel reset-ti-sci.c... */ +#include #include #include #include diff --git a/drivers/reset/reset-uclass.c b/drivers/reset/reset-uclass.c index fe4cebf54f1..b972faf0132 100644 --- a/drivers/reset/reset-uclass.c +++ b/drivers/reset/reset-uclass.c @@ -5,6 +5,7 @@ #define LOG_CATEGORY UCLASS_RESET +#include #include #include #include diff --git a/drivers/reset/reset-uniphier.c b/drivers/reset/reset-uniphier.c index 49b001f0594..35e3ccebd72 100644 --- a/drivers/reset/reset-uniphier.c +++ b/drivers/reset/reset-uniphier.c @@ -5,6 +5,7 @@ * Author: Kunihiko Hayashi */ +#include #include #include #include diff --git a/drivers/reset/reset-zynqmp.c b/drivers/reset/reset-zynqmp.c index b9c4f09fdfd..87b4df5bf81 100644 --- a/drivers/reset/reset-zynqmp.c +++ b/drivers/reset/reset-zynqmp.c @@ -5,6 +5,7 @@ #define LOG_CATEGORY UCLASS_RESET +#include #include #include #include diff --git a/drivers/reset/rst-rk3588.c b/drivers/reset/rst-rk3588.c index eae2eb10de2..2c524e4c403 100644 --- a/drivers/reset/rst-rk3588.c +++ b/drivers/reset/rst-rk3588.c @@ -5,6 +5,7 @@ * Author: Sebastian Reichel */ +#include #include #include #include diff --git a/drivers/reset/sandbox-reset-test.c b/drivers/reset/sandbox-reset-test.c index dfacb764bc7..51b79810c89 100644 --- a/drivers/reset/sandbox-reset-test.c +++ b/drivers/reset/sandbox-reset-test.c @@ -3,6 +3,7 @@ * Copyright (c) 2016, NVIDIA CORPORATION. */ +#include #include #include #include diff --git a/drivers/reset/sandbox-reset.c b/drivers/reset/sandbox-reset.c index adf9eedcba6..97b1b92e4a6 100644 --- a/drivers/reset/sandbox-reset.c +++ b/drivers/reset/sandbox-reset.c @@ -3,6 +3,7 @@ * Copyright (c) 2016, NVIDIA CORPORATION. */ +#include #include #include #include diff --git a/drivers/reset/sti-reset.c b/drivers/reset/sti-reset.c index 412a0c5b452..5305270fbf2 100644 --- a/drivers/reset/sti-reset.c +++ b/drivers/reset/sti-reset.c @@ -4,6 +4,7 @@ * Author(s): Patrice Chotard, for STMicroelectronics. */ +#include #include #include #include diff --git a/drivers/reset/stm32-reset.c b/drivers/reset/stm32-reset.c index 9d4f361b251..0bbde29810b 100644 --- a/drivers/reset/stm32-reset.c +++ b/drivers/reset/stm32-reset.c @@ -6,6 +6,7 @@ #define LOG_CATEGORY UCLASS_RESET +#include #include #include #include diff --git a/drivers/reset/tegra-car-reset.c b/drivers/reset/tegra-car-reset.c index e3ecc8d3735..501e9cab8f7 100644 --- a/drivers/reset/tegra-car-reset.c +++ b/drivers/reset/tegra-car-reset.c @@ -3,6 +3,7 @@ * Copyright (c) 2016, NVIDIA CORPORATION. */ +#include #include #include #include diff --git a/drivers/reset/tegra186-reset.c b/drivers/reset/tegra186-reset.c index 89624227c29..d43da454114 100644 --- a/drivers/reset/tegra186-reset.c +++ b/drivers/reset/tegra186-reset.c @@ -3,6 +3,7 @@ * Copyright (c) 2016, NVIDIA CORPORATION. */ +#include #include #include #include diff --git a/drivers/rtc/abx80x.c b/drivers/rtc/abx80x.c index 1235b840ab0..823aff03f5f 100644 --- a/drivers/rtc/abx80x.c +++ b/drivers/rtc/abx80x.c @@ -12,6 +12,7 @@ * */ +#include #include #include #include diff --git a/drivers/rtc/davinci.c b/drivers/rtc/davinci.c index a20b73e1990..c7ce41bbf5c 100644 --- a/drivers/rtc/davinci.c +++ b/drivers/rtc/davinci.c @@ -4,6 +4,7 @@ * Heiko Schocher * Copyright (C) 2021 Dario Binacchi */ +#include #include #include #include diff --git a/drivers/rtc/ds1307.c b/drivers/rtc/ds1307.c index ba06ff9f0be..0e9d3d24dd8 100644 --- a/drivers/rtc/ds1307.c +++ b/drivers/rtc/ds1307.c @@ -13,7 +13,7 @@ * based on ds1337.c */ -#include +#include #include #include #include diff --git a/drivers/rtc/ds1337.c b/drivers/rtc/ds1337.c index 7eccf1cb8c5..2c780ab8edf 100644 --- a/drivers/rtc/ds1337.c +++ b/drivers/rtc/ds1337.c @@ -11,7 +11,7 @@ * DS1337 Real Time Clock (RTC). */ -#include +#include #include #include #include diff --git a/drivers/rtc/ds1374.c b/drivers/rtc/ds1374.c index 895dbbaf1c7..89442f9386b 100644 --- a/drivers/rtc/ds1374.c +++ b/drivers/rtc/ds1374.c @@ -13,7 +13,7 @@ * based on ds1337.c */ -#include +#include #include #include #include diff --git a/drivers/rtc/ds3231.c b/drivers/rtc/ds3231.c index d6267d660d0..bd32ed2dbf9 100644 --- a/drivers/rtc/ds3231.c +++ b/drivers/rtc/ds3231.c @@ -14,7 +14,7 @@ * copied from ds1337.c */ -#include +#include #include #include #include diff --git a/drivers/rtc/ds3232.c b/drivers/rtc/ds3232.c index 7314ba219da..16501cfe5d3 100644 --- a/drivers/rtc/ds3232.c +++ b/drivers/rtc/ds3232.c @@ -3,6 +3,7 @@ * (C) Copyright 2019, Vaisala Oyj */ +#include #include #include #include diff --git a/drivers/rtc/emul_rtc.c b/drivers/rtc/emul_rtc.c index 97a8d9bb7df..6f47d82522b 100644 --- a/drivers/rtc/emul_rtc.c +++ b/drivers/rtc/emul_rtc.c @@ -5,11 +5,11 @@ * This driver emulates a real time clock based on timer ticks. */ +#include #include #include #include #include -#include #include /** diff --git a/drivers/rtc/ht1380.c b/drivers/rtc/ht1380.c index c202261e999..85fcee3e71e 100644 --- a/drivers/rtc/ht1380.c +++ b/drivers/rtc/ht1380.c @@ -15,6 +15,7 @@ * */ +#include #include #include #include diff --git a/drivers/rtc/i2c_rtc_emul.c b/drivers/rtc/i2c_rtc_emul.c index ea11c72c964..c307d6036dd 100644 --- a/drivers/rtc/i2c_rtc_emul.c +++ b/drivers/rtc/i2c_rtc_emul.c @@ -13,6 +13,7 @@ * time-keeping. It does not change the system time. */ +#include #include #include #include diff --git a/drivers/rtc/isl1208.c b/drivers/rtc/isl1208.c index 83db505afe9..59a60b75b30 100644 --- a/drivers/rtc/isl1208.c +++ b/drivers/rtc/isl1208.c @@ -11,6 +11,7 @@ * ISL1208 Real Time Clock (RTC). */ +#include #include #include #include diff --git a/drivers/rtc/m41t62.c b/drivers/rtc/m41t62.c index 7bfea9e0b31..891fe09d311 100644 --- a/drivers/rtc/m41t62.c +++ b/drivers/rtc/m41t62.c @@ -16,7 +16,7 @@ /* #define DEBUG */ -#include +#include #include #include #include diff --git a/drivers/rtc/mc13xxx-rtc.c b/drivers/rtc/mc13xxx-rtc.c index 9e396bcdae9..6c2aef89758 100644 --- a/drivers/rtc/mc13xxx-rtc.c +++ b/drivers/rtc/mc13xxx-rtc.c @@ -3,6 +3,7 @@ * Copyright (C) 2008, Guennadi Liakhovetski */ +#include #include #include #include diff --git a/drivers/rtc/mc146818.c b/drivers/rtc/mc146818.c index c0d86c6d063..03ce081d576 100644 --- a/drivers/rtc/mc146818.c +++ b/drivers/rtc/mc146818.c @@ -8,6 +8,7 @@ * Date & Time support for the MC146818 (PIXX4) RTC */ +#include #include #include #include diff --git a/drivers/rtc/mcfrtc.c b/drivers/rtc/mcfrtc.c index b5cc6b96881..d2ac889c309 100644 --- a/drivers/rtc/mcfrtc.c +++ b/drivers/rtc/mcfrtc.c @@ -4,6 +4,7 @@ * TsiChung Liew (Tsi-Chung.Liew@freescale.com) */ +#include #include #include diff --git a/drivers/rtc/mvrtc.c b/drivers/rtc/mvrtc.c index f070c681b94..50240d57fa9 100644 --- a/drivers/rtc/mvrtc.c +++ b/drivers/rtc/mvrtc.c @@ -8,6 +8,7 @@ * Date & Time support for Marvell Integrated RTC */ +#include #include #include #include diff --git a/drivers/rtc/mxsrtc.c b/drivers/rtc/mxsrtc.c index 69d22a4bdcb..be899a92540 100644 --- a/drivers/rtc/mxsrtc.c +++ b/drivers/rtc/mxsrtc.c @@ -6,6 +6,7 @@ * on behalf of DENX Software Engineering GmbH */ +#include #include #include #include diff --git a/drivers/rtc/pcf2127.c b/drivers/rtc/pcf2127.c index 27a340f07d6..2f3fafb4968 100644 --- a/drivers/rtc/pcf2127.c +++ b/drivers/rtc/pcf2127.c @@ -5,6 +5,7 @@ /* #define DEBUG */ +#include #include #include #include diff --git a/drivers/rtc/pcf8563.c b/drivers/rtc/pcf8563.c index 03bef68051b..91a412440b8 100644 --- a/drivers/rtc/pcf8563.c +++ b/drivers/rtc/pcf8563.c @@ -10,7 +10,7 @@ /* #define DEBUG */ -#include +#include #include #include #include diff --git a/drivers/rtc/pl031.c b/drivers/rtc/pl031.c index 855ee913416..a1d376611d6 100644 --- a/drivers/rtc/pl031.c +++ b/drivers/rtc/pl031.c @@ -6,6 +6,7 @@ * reference linux-2.6.20.6/drivers/rtc/rtc-pl031.c */ +#include #include #include #include diff --git a/drivers/rtc/pt7c4338.c b/drivers/rtc/pt7c4338.c index 79df07814a6..e0a7bd3662f 100644 --- a/drivers/rtc/pt7c4338.c +++ b/drivers/rtc/pt7c4338.c @@ -18,7 +18,7 @@ * It has 56 bytes of nonvolatile RAM. */ -#include +#include #include #include #include diff --git a/drivers/rtc/rtc-uclass.c b/drivers/rtc/rtc-uclass.c index 8f6c0c6a0a7..e5ae6ea4d5f 100644 --- a/drivers/rtc/rtc-uclass.c +++ b/drivers/rtc/rtc-uclass.c @@ -6,6 +6,7 @@ #define LOG_CATEGORY UCLASS_RTC +#include #include #include #include diff --git a/drivers/rtc/rv3029.c b/drivers/rtc/rv3029.c index a82acec6f7e..3afe5b2fdd6 100644 --- a/drivers/rtc/rv3029.c +++ b/drivers/rtc/rv3029.c @@ -7,8 +7,10 @@ * Michael Buesch */ +#include #include #include +#include #include #include #include diff --git a/drivers/rtc/rv8803.c b/drivers/rtc/rv8803.c index 82b43722ff5..06a4ae89fa9 100644 --- a/drivers/rtc/rv8803.c +++ b/drivers/rtc/rv8803.c @@ -10,6 +10,7 @@ * */ +#include #include #include #include diff --git a/drivers/rtc/rx8010sj.c b/drivers/rtc/rx8010sj.c index 0d778f4c328..bf93b557748 100644 --- a/drivers/rtc/rx8010sj.c +++ b/drivers/rtc/rx8010sj.c @@ -17,7 +17,7 @@ */ #include -#include +#include #include #include #include diff --git a/drivers/rtc/rx8025.c b/drivers/rtc/rx8025.c index c7895244283..1394c2306a4 100644 --- a/drivers/rtc/rx8025.c +++ b/drivers/rtc/rx8025.c @@ -8,6 +8,7 @@ * Epson RX8025 RTC driver. */ +#include #include #include #include diff --git a/drivers/rtc/s35392a.c b/drivers/rtc/s35392a.c index 03fb9a0be91..80f55c86233 100644 --- a/drivers/rtc/s35392a.c +++ b/drivers/rtc/s35392a.c @@ -18,6 +18,7 @@ */ #include +#include #include #include #include diff --git a/drivers/rtc/sandbox_rtc.c b/drivers/rtc/sandbox_rtc.c index 4404501c2f6..657e5c7be2c 100644 --- a/drivers/rtc/sandbox_rtc.c +++ b/drivers/rtc/sandbox_rtc.c @@ -4,6 +4,7 @@ * Written by Simon Glass */ +#include #include #include #include diff --git a/drivers/rtc/stm32_rtc.c b/drivers/rtc/stm32_rtc.c index ee70c11c8bc..ec7584c3d70 100644 --- a/drivers/rtc/stm32_rtc.c +++ b/drivers/rtc/stm32_rtc.c @@ -5,6 +5,7 @@ #define LOG_CATEGORY UCLASS_RTC +#include #include #include #include diff --git a/drivers/rtc/zynqmp_rtc.c b/drivers/rtc/zynqmp_rtc.c index 15122a04838..ab9b93ca979 100644 --- a/drivers/rtc/zynqmp_rtc.c +++ b/drivers/rtc/zynqmp_rtc.c @@ -5,6 +5,7 @@ #define LOG_CATEGORY UCLASS_RTC +#include #include #include #include diff --git a/drivers/scsi/sandbox_scsi.c b/drivers/scsi/sandbox_scsi.c index 544a0247083..a7ac33cb1c4 100644 --- a/drivers/scsi/sandbox_scsi.c +++ b/drivers/scsi/sandbox_scsi.c @@ -9,6 +9,7 @@ #define LOG_CATEGORY UCLASS_SCSI +#include #include #include #include diff --git a/drivers/scsi/scsi-uclass.c b/drivers/scsi/scsi-uclass.c index 1ee8236c05c..a7c1eaf0cf5 100644 --- a/drivers/scsi/scsi-uclass.c +++ b/drivers/scsi/scsi-uclass.c @@ -10,6 +10,7 @@ #define LOG_CATEGORY UCLASS_SCSI +#include #include #include diff --git a/drivers/scsi/scsi.c b/drivers/scsi/scsi.c index 73cb83548eb..79ee400d12f 100644 --- a/drivers/scsi/scsi.c +++ b/drivers/scsi/scsi.c @@ -6,6 +6,7 @@ #define LOG_CATEGORY UCLASS_SCSI +#include #include #include #include diff --git a/drivers/scsi/scsi_bootdev.c b/drivers/scsi/scsi_bootdev.c index 28e4612f337..218221fa306 100644 --- a/drivers/scsi/scsi_bootdev.c +++ b/drivers/scsi/scsi_bootdev.c @@ -6,6 +6,7 @@ * Written by Simon Glass */ +#include #include #include #include diff --git a/drivers/scsi/scsi_emul.c b/drivers/scsi/scsi_emul.c index d1bb926b713..6b8468f7994 100644 --- a/drivers/scsi/scsi_emul.c +++ b/drivers/scsi/scsi_emul.c @@ -11,6 +11,7 @@ #define LOG_CATEGORY UCLASS_SCSI +#include #include #include #include diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile index dbe598b7406..403ab1ded68 100644 --- a/drivers/serial/Makefile +++ b/drivers/serial/Makefile @@ -65,4 +65,3 @@ obj-$(CONFIG_S5P4418_PL011_SERIAL) += serial_s5p4418_pl011.o ifndef CONFIG_SPL_BUILD obj-$(CONFIG_USB_TTY) += usbtty.o endif -obj-$(CONFIG_UART4_SERIAL) += serial_adi_uart4.o diff --git a/drivers/serial/altera_jtag_uart.c b/drivers/serial/altera_jtag_uart.c index 3f706e1839f..9e39da7dd24 100644 --- a/drivers/serial/altera_jtag_uart.c +++ b/drivers/serial/altera_jtag_uart.c @@ -4,6 +4,7 @@ * Scott McNutt */ +#include #include #include #include diff --git a/drivers/serial/altera_uart.c b/drivers/serial/altera_uart.c index 3c13ef25bb4..35920480841 100644 --- a/drivers/serial/altera_uart.c +++ b/drivers/serial/altera_uart.c @@ -4,6 +4,7 @@ * Scott McNutt */ +#include #include #include #include diff --git a/drivers/serial/arm_dcc.c b/drivers/serial/arm_dcc.c index 66af136695d..a402a123b6d 100644 --- a/drivers/serial/arm_dcc.c +++ b/drivers/serial/arm_dcc.c @@ -15,6 +15,7 @@ * this file might be covered by the GNU General Public License. */ +#include #include #include diff --git a/drivers/serial/atmel_usart.c b/drivers/serial/atmel_usart.c index 7e45a80969e..9827c006fa8 100644 --- a/drivers/serial/atmel_usart.c +++ b/drivers/serial/atmel_usart.c @@ -5,6 +5,7 @@ * Modified to support C structur SoC access by * Andreas Bießmann */ +#include #include #include #include diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c index 4963385dc1c..6deb1d8ddc5 100644 --- a/drivers/serial/ns16550.c +++ b/drivers/serial/ns16550.c @@ -5,7 +5,7 @@ */ #include -#include +#include #include #include #include diff --git a/drivers/serial/sandbox.c b/drivers/serial/sandbox.c index ec0068e33d3..f6ac3d22852 100644 --- a/drivers/serial/sandbox.c +++ b/drivers/serial/sandbox.c @@ -9,6 +9,7 @@ * U-Boot. */ +#include #include #include #include diff --git a/drivers/serial/serial-uclass.c b/drivers/serial/serial-uclass.c index 84f02f7ac76..e4fa3933bc8 100644 --- a/drivers/serial/serial-uclass.c +++ b/drivers/serial/serial-uclass.c @@ -5,7 +5,7 @@ #define LOG_CATEGORY UCLASS_SERIAL -#include +#include #include #include #include diff --git a/drivers/serial/serial.c b/drivers/serial/serial.c index dc4bb06fa99..787edd53602 100644 --- a/drivers/serial/serial.c +++ b/drivers/serial/serial.c @@ -4,7 +4,7 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ -#include +#include #include #include #include diff --git a/drivers/serial/serial_adi_uart4.c b/drivers/serial/serial_adi_uart4.c deleted file mode 100644 index 45f8315d0a0..00000000000 --- a/drivers/serial/serial_adi_uart4.c +++ /dev/null @@ -1,225 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * (C) Copyright 2022 - Analog Devices, Inc. - * - * Written and/or maintained by Timesys Corporation - * - * Converted to driver model by Nathan Barrett-Morrison - * - * Contact: Nathan Barrett-Morrison - * Contact: Greg Malysa - * - */ - -#include -#include -#include -#include -#include -#include - -/* - * UART4 Masks - */ - -/* UART_CONTROL */ -#define UEN BIT(0) -#define LOOP_ENA BIT(1) -#define UMOD (3 << 4) -#define UMOD_UART (0 << 4) -#define UMOD_MDB BIT(4) -#define UMOD_IRDA BIT(4) -#define WLS (3 << 8) -#define WLS_5 (0 << 8) -#define WLS_6 BIT(8) -#define WLS_7 (2 << 8) -#define WLS_8 (3 << 8) -#define STB BIT(12) -#define STBH BIT(13) -#define PEN BIT(14) -#define EPS BIT(15) -#define STP BIT(16) -#define FPE BIT(17) -#define FFE BIT(18) -#define SB BIT(19) -#define FCPOL BIT(22) -#define RPOLC BIT(23) -#define TPOLC BIT(24) -#define MRTS BIT(25) -#define XOFF BIT(26) -#define ARTS BIT(27) -#define ACTS BIT(28) -#define RFIT BIT(29) -#define RFRT BIT(30) - -/* UART_STATUS */ -#define DR BIT(0) -#define OE BIT(1) -#define PE BIT(2) -#define FE BIT(3) -#define BI BIT(4) -#define THRE BIT(5) -#define TEMT BIT(7) -#define TFI BIT(8) -#define ASTKY BIT(9) -#define ADDR BIT(10) -#define RO BIT(11) -#define SCTS BIT(12) -#define CTS BIT(16) -#define RFCS BIT(17) - -/* UART_EMASK */ -#define ERBFI BIT(0) -#define ETBEI BIT(1) -#define ELSI BIT(2) -#define EDSSI BIT(3) -#define EDTPTI BIT(4) -#define ETFI BIT(5) -#define ERFCI BIT(6) -#define EAWI BIT(7) -#define ERXS BIT(8) -#define ETXS BIT(9) - -DECLARE_GLOBAL_DATA_PTR; - -struct uart4_reg { - u32 revid; - u32 control; - u32 status; - u32 scr; - u32 clock; - u32 emask; - u32 emaskst; - u32 emaskcl; - u32 rbr; - u32 thr; - u32 taip; - u32 tsr; - u32 rsr; - u32 txdiv_cnt; - u32 rxdiv_cnt; -}; - -struct adi_uart4_platdata { - // Hardware registers - struct uart4_reg *regs; - - // Enable divide-by-one baud rate setting - bool edbo; -}; - -static int adi_uart4_set_brg(struct udevice *dev, int baudrate) -{ - struct adi_uart4_platdata *plat = dev_get_plat(dev); - struct uart4_reg *regs = plat->regs; - u32 divisor, uart_base_clk_rate; - struct clk uart_base_clk; - - if (clk_get_by_index(dev, 0, &uart_base_clk)) { - dev_err(dev, "Could not get UART base clock\n"); - return -1; - } - - uart_base_clk_rate = clk_get_rate(&uart_base_clk); - - if (plat->edbo) { - u16 divisor16 = (uart_base_clk_rate + (baudrate / 2)) / baudrate; - - divisor = divisor16 | BIT(31); - } else { - // Divisor is only 16 bits - divisor = 0x0000ffff & ((uart_base_clk_rate + (baudrate * 8)) / (baudrate * 16)); - } - - writel(divisor, ®s->clock); - return 0; -} - -static int adi_uart4_pending(struct udevice *dev, bool input) -{ - struct adi_uart4_platdata *plat = dev_get_plat(dev); - struct uart4_reg *regs = plat->regs; - - if (input) - return (readl(®s->status) & DR) ? 1 : 0; - else - return (readl(®s->status) & THRE) ? 0 : 1; -} - -static int adi_uart4_getc(struct udevice *dev) -{ - struct adi_uart4_platdata *plat = dev_get_plat(dev); - struct uart4_reg *regs = plat->regs; - int uart_rbr_val; - - if (!adi_uart4_pending(dev, true)) - return -EAGAIN; - - uart_rbr_val = readl(®s->rbr); - writel(-1, ®s->status); - - return uart_rbr_val; -} - -static int adi_uart4_putc(struct udevice *dev, const char ch) -{ - struct adi_uart4_platdata *plat = dev_get_plat(dev); - struct uart4_reg *regs = plat->regs; - - if (adi_uart4_pending(dev, false)) - return -EAGAIN; - - writel(ch, ®s->thr); - return 0; -} - -static const struct dm_serial_ops adi_uart4_serial_ops = { - .setbrg = adi_uart4_set_brg, - .getc = adi_uart4_getc, - .putc = adi_uart4_putc, - .pending = adi_uart4_pending, -}; - -static int adi_uart4_of_to_plat(struct udevice *dev) -{ - struct adi_uart4_platdata *plat = dev_get_plat(dev); - fdt_addr_t addr; - - addr = dev_read_addr(dev); - if (addr == FDT_ADDR_T_NONE) - return -EINVAL; - - plat->regs = (struct uart4_reg *)addr; - plat->edbo = dev_read_bool(dev, "adi,enable-edbo"); - - return 0; -} - -static int adi_uart4_probe(struct udevice *dev) -{ - struct adi_uart4_platdata *plat = dev_get_plat(dev); - struct uart4_reg *regs = plat->regs; - - /* always enable UART to 8-bit mode */ - writel(UEN | UMOD_UART | WLS_8, ®s->control); - - writel(-1, ®s->status); - - return 0; -} - -static const struct udevice_id adi_uart4_serial_ids[] = { - { .compatible = "adi,uart4" }, - { } -}; - -U_BOOT_DRIVER(serial_adi_uart4) = { - .name = "serial_adi_uart4", - .id = UCLASS_SERIAL, - .of_match = adi_uart4_serial_ids, - .of_to_plat = adi_uart4_of_to_plat, - .plat_auto = sizeof(struct adi_uart4_platdata), - .probe = adi_uart4_probe, - .ops = &adi_uart4_serial_ops, - .flags = DM_FLAG_PRE_RELOC, -}; diff --git a/drivers/serial/serial_ar933x.c b/drivers/serial/serial_ar933x.c index 4d92752690f..4f916349762 100644 --- a/drivers/serial/serial_ar933x.c +++ b/drivers/serial/serial_ar933x.c @@ -3,6 +3,7 @@ * Copyright (C) 2015-2016 Wills Wang */ +#include #include #include #include diff --git a/drivers/serial/serial_arc.c b/drivers/serial/serial_arc.c index c0930cf7334..c2fc8a901e2 100644 --- a/drivers/serial/serial_arc.c +++ b/drivers/serial/serial_arc.c @@ -7,6 +7,7 @@ * */ +#include #include #include #include diff --git a/drivers/serial/serial_bcm283x_mu.c b/drivers/serial/serial_bcm283x_mu.c index 7fa26244b1c..7585f790d22 100644 --- a/drivers/serial/serial_bcm283x_mu.c +++ b/drivers/serial/serial_bcm283x_mu.c @@ -14,6 +14,7 @@ /* Simple U-Boot driver for the BCM283x mini UART */ +#include #include #include #include diff --git a/drivers/serial/serial_bcm283x_pl011.c b/drivers/serial/serial_bcm283x_pl011.c index 2abc1c4658f..09a9868a38f 100644 --- a/drivers/serial/serial_bcm283x_pl011.c +++ b/drivers/serial/serial_bcm283x_pl011.c @@ -3,6 +3,7 @@ * Copyright (c) 2018 Alexander Graf */ +#include #include #include #include diff --git a/drivers/serial/serial_coreboot.c b/drivers/serial/serial_coreboot.c index b1f69f6998c..23066e4d054 100644 --- a/drivers/serial/serial_coreboot.c +++ b/drivers/serial/serial_coreboot.c @@ -7,6 +7,7 @@ #define LOG_CATGEGORY UCLASS_SERIAL +#include #include #include #include diff --git a/drivers/serial/serial_cortina.c b/drivers/serial/serial_cortina.c index 3ae8fb46584..6dc81a775d3 100644 --- a/drivers/serial/serial_cortina.c +++ b/drivers/serial/serial_cortina.c @@ -5,6 +5,7 @@ * */ +#include #include #include #include diff --git a/drivers/serial/serial_efi.c b/drivers/serial/serial_efi.c index 5733eaaf9d4..0067576389d 100644 --- a/drivers/serial/serial_efi.c +++ b/drivers/serial/serial_efi.c @@ -4,6 +4,7 @@ * Written by Simon Glass */ +#include #include #include #include diff --git a/drivers/serial/serial_htif.c b/drivers/serial/serial_htif.c index 2a93bbbcc9f..5d2bf0aaeba 100644 --- a/drivers/serial/serial_htif.c +++ b/drivers/serial/serial_htif.c @@ -3,6 +3,7 @@ * Copyright (C) 2022 Ventana Micro Systems Inc. */ +#include #include #include #include diff --git a/drivers/serial/serial_intel_mid.c b/drivers/serial/serial_intel_mid.c index 4b528e45292..bbf19057c4d 100644 --- a/drivers/serial/serial_intel_mid.c +++ b/drivers/serial/serial_intel_mid.c @@ -3,6 +3,7 @@ * Copyright (c) 2017 Intel Corporation */ +#include #include #include #include diff --git a/drivers/serial/serial_linflexuart.c b/drivers/serial/serial_linflexuart.c index ff66e69b9d7..b449e55a650 100644 --- a/drivers/serial/serial_linflexuart.c +++ b/drivers/serial/serial_linflexuart.c @@ -3,6 +3,7 @@ * (C) Copyright 2013-2016 Freescale Semiconductor, Inc. */ +#include #include #include #include diff --git a/drivers/serial/serial_lpuart.c b/drivers/serial/serial_lpuart.c index a06e6dc2505..3f2be72b830 100644 --- a/drivers/serial/serial_lpuart.c +++ b/drivers/serial/serial_lpuart.c @@ -4,6 +4,7 @@ * Copyright 2013 Freescale Semiconductor, Inc. */ +#include #include #include #include diff --git a/drivers/serial/serial_mcf.c b/drivers/serial/serial_mcf.c index 76143575fa9..bb2afd0d8cd 100644 --- a/drivers/serial/serial_mcf.c +++ b/drivers/serial/serial_mcf.c @@ -15,6 +15,7 @@ * as serial console interface. */ +#include #include #include #include diff --git a/drivers/serial/serial_meson.c b/drivers/serial/serial_meson.c index bb79b972957..be5f380f850 100644 --- a/drivers/serial/serial_meson.c +++ b/drivers/serial/serial_meson.c @@ -3,6 +3,7 @@ * (C) Copyright 2016 Beniamino Galvani */ +#include #include #include #include diff --git a/drivers/serial/serial_mpc8xx.c b/drivers/serial/serial_mpc8xx.c index 9ce3fc3d9ec..d82760c7f10 100644 --- a/drivers/serial/serial_mpc8xx.c +++ b/drivers/serial/serial_mpc8xx.c @@ -4,6 +4,7 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ +#include #include #include #include diff --git a/drivers/serial/serial_msm.c b/drivers/serial/serial_msm.c index 757e5eaf974..a472e0b3683 100644 --- a/drivers/serial/serial_msm.c +++ b/drivers/serial/serial_msm.c @@ -8,6 +8,7 @@ * Based on Linux driver. */ +#include #include #include #include diff --git a/drivers/serial/serial_msm_geni.c b/drivers/serial/serial_msm_geni.c index cb6c09fdd09..5260474fb9a 100644 --- a/drivers/serial/serial_msm_geni.c +++ b/drivers/serial/serial_msm_geni.c @@ -9,6 +9,7 @@ #include #include +#include #include #include #include diff --git a/drivers/serial/serial_mtk.c b/drivers/serial/serial_mtk.c index 3f569c68f22..f146f2b006e 100644 --- a/drivers/serial/serial_mtk.c +++ b/drivers/serial/serial_mtk.c @@ -7,7 +7,7 @@ */ #include -#include +#include #include #include #include diff --git a/drivers/serial/serial_mvebu_a3700.c b/drivers/serial/serial_mvebu_a3700.c index 1a0b85e170a..b2017c64556 100644 --- a/drivers/serial/serial_mvebu_a3700.c +++ b/drivers/serial/serial_mvebu_a3700.c @@ -4,6 +4,7 @@ * Copyright (C) 2021 Pali Rohár */ +#include #include #include #include diff --git a/drivers/serial/serial_mxc.c b/drivers/serial/serial_mxc.c index c5fd740be4d..cc85a502726 100644 --- a/drivers/serial/serial_mxc.c +++ b/drivers/serial/serial_mxc.c @@ -3,6 +3,7 @@ * (c) 2007 Sascha Hauer */ +#include #include #include #include diff --git a/drivers/serial/serial_mxs.c b/drivers/serial/serial_mxs.c index 071bd09fef6..3659948b872 100644 --- a/drivers/serial/serial_mxs.c +++ b/drivers/serial/serial_mxs.c @@ -2,6 +2,7 @@ /* * Copyright (C) 2023 Marek Vasut */ +#include #include #include #include diff --git a/drivers/serial/serial_npcm.c b/drivers/serial/serial_npcm.c index 661daf1aefa..6bf3a943a2f 100644 --- a/drivers/serial/serial_npcm.c +++ b/drivers/serial/serial_npcm.c @@ -3,6 +3,7 @@ * Copyright (c) 2021 Nuvoton Technology Corp. */ +#include #include #include #include diff --git a/drivers/serial/serial_ns16550.c b/drivers/serial/serial_ns16550.c index 577864bc219..4014f682040 100644 --- a/drivers/serial/serial_ns16550.c +++ b/drivers/serial/serial_ns16550.c @@ -4,7 +4,7 @@ * Rob Taylor, Flying Pig Systems. robt@flyingpig.com. */ -#include +#include #include #include #include diff --git a/drivers/serial/serial_nulldev.c b/drivers/serial/serial_nulldev.c index 78a9e0b195f..f3ca7f52559 100644 --- a/drivers/serial/serial_nulldev.c +++ b/drivers/serial/serial_nulldev.c @@ -3,6 +3,7 @@ * Copyright (c) 2015 National Instruments */ +#include #include #include diff --git a/drivers/serial/serial_omap.c b/drivers/serial/serial_omap.c index 94672655c28..49ced8f9fae 100644 --- a/drivers/serial/serial_omap.c +++ b/drivers/serial/serial_omap.c @@ -6,7 +6,7 @@ * Lokesh Vutla */ -#include +#include #include #include #include diff --git a/drivers/serial/serial_owl.c b/drivers/serial/serial_owl.c index 8ce8aa32a21..3b795785f78 100644 --- a/drivers/serial/serial_owl.c +++ b/drivers/serial/serial_owl.c @@ -6,6 +6,7 @@ * Copyright (C) 2018 Manivannan Sadhasivam */ +#include #include #include #include diff --git a/drivers/serial/serial_pic32.c b/drivers/serial/serial_pic32.c index a49c4139b5a..0a03a9a2549 100644 --- a/drivers/serial/serial_pic32.c +++ b/drivers/serial/serial_pic32.c @@ -3,6 +3,7 @@ * (c) 2015 Paul Thacker * */ +#include #include #include #include diff --git a/drivers/serial/serial_pl01x.c b/drivers/serial/serial_pl01x.c index 80c35963b8f..f04c21e0826 100644 --- a/drivers/serial/serial_pl01x.c +++ b/drivers/serial/serial_pl01x.c @@ -10,6 +10,7 @@ /* Simple U-Boot driver for the PrimeCell PL010/PL011 UARTs */ +#include #include /* For get_bus_freq() */ #include diff --git a/drivers/serial/serial_rockchip.c b/drivers/serial/serial_rockchip.c index 8a15173f238..f4e9422ed91 100644 --- a/drivers/serial/serial_rockchip.c +++ b/drivers/serial/serial_rockchip.c @@ -3,6 +3,7 @@ * Copyright (c) 2015 Google, Inc */ +#include #include #include #include diff --git a/drivers/serial/serial_s5p4418_pl011.c b/drivers/serial/serial_s5p4418_pl011.c index 1fb954e80c2..e4492e662e9 100644 --- a/drivers/serial/serial_s5p4418_pl011.c +++ b/drivers/serial/serial_s5p4418_pl011.c @@ -3,6 +3,7 @@ * Copyright (C) 2022 Stefan Bosch */ +#include #include #include #include diff --git a/drivers/serial/serial_semihosting.c b/drivers/serial/serial_semihosting.c index 56a5ec72428..cfa1ec3148c 100644 --- a/drivers/serial/serial_semihosting.c +++ b/drivers/serial/serial_semihosting.c @@ -3,6 +3,7 @@ * Copyright (C) 2022 Sean Anderson */ +#include #include #include #include diff --git a/drivers/serial/serial_sifive.c b/drivers/serial/serial_sifive.c index e47828e4d6a..c449f3fd02d 100644 --- a/drivers/serial/serial_sifive.c +++ b/drivers/serial/serial_sifive.c @@ -3,6 +3,7 @@ * Copyright (C) 2018 Anup Patel */ +#include #include #include #include diff --git a/drivers/serial/serial_sti_asc.c b/drivers/serial/serial_sti_asc.c index ef68e585dd6..40381b57b08 100644 --- a/drivers/serial/serial_sti_asc.c +++ b/drivers/serial/serial_sti_asc.c @@ -6,6 +6,7 @@ * Author(s): Patrice Chotard, for STMicroelectronics. */ +#include #include #include #include diff --git a/drivers/serial/serial_stm32.c b/drivers/serial/serial_stm32.c index 1ee58142b3f..fb039546a41 100644 --- a/drivers/serial/serial_stm32.c +++ b/drivers/serial/serial_stm32.c @@ -6,6 +6,7 @@ #define LOG_CATEGORY UCLASS_SERIAL +#include #include #include #include diff --git a/drivers/serial/serial_uniphier.c b/drivers/serial/serial_uniphier.c index a566ba7a47d..27e4b92c399 100644 --- a/drivers/serial/serial_uniphier.c +++ b/drivers/serial/serial_uniphier.c @@ -5,6 +5,7 @@ * Author: Masahiro Yamada */ +#include #include #include #include diff --git a/drivers/serial/serial_xen.c b/drivers/serial/serial_xen.c index e05805f6372..ab318b06462 100644 --- a/drivers/serial/serial_xen.c +++ b/drivers/serial/serial_xen.c @@ -3,6 +3,7 @@ * (C) 2018 NXP * (C) 2020 EPAM Systems Inc. */ +#include #include #include #include diff --git a/drivers/serial/serial_xuartlite.c b/drivers/serial/serial_xuartlite.c index eb234108746..35df413321f 100644 --- a/drivers/serial/serial_xuartlite.c +++ b/drivers/serial/serial_xuartlite.c @@ -8,6 +8,7 @@ */ #include +#include #include #include #include diff --git a/drivers/serial/serial_zynq.c b/drivers/serial/serial_zynq.c index 55f13c00ddf..1847d1f6ecd 100644 --- a/drivers/serial/serial_zynq.c +++ b/drivers/serial/serial_zynq.c @@ -5,6 +5,7 @@ */ #include +#include #include #include #include diff --git a/drivers/serial/usbtty.c b/drivers/serial/usbtty.c index ae3ac8070d3..ecb6ba853df 100644 --- a/drivers/serial/usbtty.c +++ b/drivers/serial/usbtty.c @@ -7,6 +7,7 @@ * Bryan O'Donoghue, bodonoghue@codehermit.ie */ +#include #include #include #include diff --git a/drivers/sm/meson-sm.c b/drivers/sm/meson-sm.c index 87eba1486db..15b3b0e2672 100644 --- a/drivers/sm/meson-sm.c +++ b/drivers/sm/meson-sm.c @@ -5,6 +5,7 @@ * Author: Alexey Romanov */ +#include #include #include #include diff --git a/drivers/sm/sandbox-sm.c b/drivers/sm/sandbox-sm.c index a95e685494c..109ddb2af55 100644 --- a/drivers/sm/sandbox-sm.c +++ b/drivers/sm/sandbox-sm.c @@ -5,6 +5,7 @@ * Author: Alexey Romanov */ +#include #include #include #include diff --git a/drivers/sm/sm-uclass.c b/drivers/sm/sm-uclass.c index abca0052e29..6a8b7026293 100644 --- a/drivers/sm/sm-uclass.c +++ b/drivers/sm/sm-uclass.c @@ -5,6 +5,7 @@ * Author: Alexey Romanov */ +#include #include #include #include diff --git a/drivers/smem/msm_smem.c b/drivers/smem/msm_smem.c index ccd145f9afb..17ee6c837c6 100644 --- a/drivers/smem/msm_smem.c +++ b/drivers/smem/msm_smem.c @@ -5,6 +5,7 @@ * Copyright (c) 2018, Ramon Fried */ +#include #include #include #include diff --git a/drivers/smem/sandbox_smem.c b/drivers/smem/sandbox_smem.c index fec98e5611d..7397e4407ad 100644 --- a/drivers/smem/sandbox_smem.c +++ b/drivers/smem/sandbox_smem.c @@ -3,6 +3,7 @@ * Copyright (c) 2018 Ramon Fried */ +#include #include #include #include diff --git a/drivers/smem/smem-uclass.c b/drivers/smem/smem-uclass.c index 4dea5cc4bf1..8469076915e 100644 --- a/drivers/smem/smem-uclass.c +++ b/drivers/smem/smem-uclass.c @@ -5,6 +5,7 @@ #define LOG_CATEGORY UCLASS_SMEM +#include #include #include diff --git a/drivers/soc/soc-uclass.c b/drivers/soc/soc-uclass.c index 744cdda2e18..8b3044fed8d 100644 --- a/drivers/soc/soc-uclass.c +++ b/drivers/soc/soc-uclass.c @@ -6,6 +6,7 @@ #define LOG_CATEGORY UCLASS_SOC +#include #include #include #include diff --git a/drivers/soc/soc_sandbox.c b/drivers/soc/soc_sandbox.c index 8d621e88f56..15fdd9930cb 100644 --- a/drivers/soc/soc_sandbox.c +++ b/drivers/soc/soc_sandbox.c @@ -6,6 +6,7 @@ * Dave Gerlach */ +#include #include #include diff --git a/drivers/soc/soc_ti_k3.c b/drivers/soc/soc_ti_k3.c index b585e47d46f..3a4e58bba67 100644 --- a/drivers/soc/soc_ti_k3.c +++ b/drivers/soc/soc_ti_k3.c @@ -4,6 +4,7 @@ * Dave Gerlach */ +#include #include #include diff --git a/drivers/soc/soc_xilinx_versal.c b/drivers/soc/soc_xilinx_versal.c index 7427f8432c8..3d8c25c19bb 100644 --- a/drivers/soc/soc_xilinx_versal.c +++ b/drivers/soc/soc_xilinx_versal.c @@ -5,6 +5,7 @@ * Copyright (C) 2021 Xilinx, Inc. */ +#include #include #include #include diff --git a/drivers/soc/soc_xilinx_versal_net.c b/drivers/soc/soc_xilinx_versal_net.c index d64fc366a6d..146d068bb4a 100644 --- a/drivers/soc/soc_xilinx_versal_net.c +++ b/drivers/soc/soc_xilinx_versal_net.c @@ -5,6 +5,7 @@ * Copyright (C) 2022, Advanced Micro Devices, Inc. */ +#include #include #include #include diff --git a/drivers/soc/soc_xilinx_zynqmp.c b/drivers/soc/soc_xilinx_zynqmp.c index a2d5b82fd34..d8b4f172a39 100644 --- a/drivers/soc/soc_xilinx_zynqmp.c +++ b/drivers/soc/soc_xilinx_zynqmp.c @@ -9,6 +9,7 @@ * Stefan Herbrechtsmeier */ +#include #include #include #include diff --git a/drivers/soc/ti/k3-navss-ringacc.c b/drivers/soc/ti/k3-navss-ringacc.c index d3f3d4761c2..ed39ff2fa4c 100644 --- a/drivers/soc/ti/k3-navss-ringacc.c +++ b/drivers/soc/ti/k3-navss-ringacc.c @@ -5,6 +5,7 @@ * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com */ +#include #include #include #include diff --git a/drivers/soc/ti/keystone_serdes.c b/drivers/soc/ti/keystone_serdes.c index b19617997e1..0e1bf8ff39d 100644 --- a/drivers/soc/ti/keystone_serdes.c +++ b/drivers/soc/ti/keystone_serdes.c @@ -7,6 +7,7 @@ */ #include +#include #include #include #include diff --git a/drivers/soc/ti/pruss.c b/drivers/soc/ti/pruss.c index e3bb2ede554..461390925d2 100644 --- a/drivers/soc/ti/pruss.c +++ b/drivers/soc/ti/pruss.c @@ -5,6 +5,7 @@ * Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/ */ +#include #include #include #include @@ -204,7 +205,6 @@ static int pruss_probe(struct udevice *dev) static const struct udevice_id pruss_ids[] = { { .compatible = "ti,am654-icssg"}, - { .compatible = "ti,am642-icssg"}, {} }; diff --git a/drivers/sound/broadwell_i2s.c b/drivers/sound/broadwell_i2s.c index bc44b5ec7e1..7f754e65676 100644 --- a/drivers/sound/broadwell_i2s.c +++ b/drivers/sound/broadwell_i2s.c @@ -9,6 +9,7 @@ #define LOG_CATEGORY UCLASS_I2S +#include #include #include #include diff --git a/drivers/sound/broadwell_sound.c b/drivers/sound/broadwell_sound.c index 473f8d8f977..6e083fe1f69 100644 --- a/drivers/sound/broadwell_sound.c +++ b/drivers/sound/broadwell_sound.c @@ -8,6 +8,7 @@ #define LOG_CATEGORY UCLASS_SOUND +#include #include #include #include diff --git a/drivers/sound/codec-uclass.c b/drivers/sound/codec-uclass.c index 1c1560619ea..2cb233bd306 100644 --- a/drivers/sound/codec-uclass.c +++ b/drivers/sound/codec-uclass.c @@ -6,6 +6,7 @@ #define LOG_CATEGORY UCLASS_AUDIO_CODEC +#include #include #include diff --git a/drivers/sound/da7219.c b/drivers/sound/da7219.c index 5b9b3f65263..c1edef44360 100644 --- a/drivers/sound/da7219.c +++ b/drivers/sound/da7219.c @@ -6,6 +6,7 @@ * Parts taken from coreboot */ +#include #include #include #include diff --git a/drivers/sound/hda_codec.c b/drivers/sound/hda_codec.c index da8bde67de6..af6148ef724 100644 --- a/drivers/sound/hda_codec.c +++ b/drivers/sound/hda_codec.c @@ -7,6 +7,7 @@ #define LOG_CATEGORY UCLASS_SOUND +#include #include #include #include diff --git a/drivers/sound/i2s-uclass.c b/drivers/sound/i2s-uclass.c index 6263c4d7071..fc4f686b516 100644 --- a/drivers/sound/i2s-uclass.c +++ b/drivers/sound/i2s-uclass.c @@ -6,6 +6,7 @@ #define LOG_CATEGORY UCLASS_I2S +#include #include #include diff --git a/drivers/sound/i8254_beep.c b/drivers/sound/i8254_beep.c index 7234ad4a07e..5572dc4d265 100644 --- a/drivers/sound/i8254_beep.c +++ b/drivers/sound/i8254_beep.c @@ -3,6 +3,7 @@ * Copyright 2018 Google LLC */ +#include #include #include #include diff --git a/drivers/sound/ivybridge_sound.c b/drivers/sound/ivybridge_sound.c index aeeba1d267e..d982219e06d 100644 --- a/drivers/sound/ivybridge_sound.c +++ b/drivers/sound/ivybridge_sound.c @@ -12,6 +12,7 @@ #define LOG_CATEGORY UCLASS_SOUND +#include #include #include #include diff --git a/drivers/sound/max98088.c b/drivers/sound/max98088.c index d9037641ca4..c0463b8e8a6 100644 --- a/drivers/sound/max98088.c +++ b/drivers/sound/max98088.c @@ -8,6 +8,7 @@ * following the changes made in max98095.c */ +#include #include #include #include diff --git a/drivers/sound/max98090.c b/drivers/sound/max98090.c index 18a3ffa85c8..a798762f1ee 100644 --- a/drivers/sound/max98090.c +++ b/drivers/sound/max98090.c @@ -5,6 +5,7 @@ * Copyright 2011 Maxim Integrated Products */ +#include #include #include #include diff --git a/drivers/sound/max98095.c b/drivers/sound/max98095.c index 96e772cff21..d0f701aaf10 100644 --- a/drivers/sound/max98095.c +++ b/drivers/sound/max98095.c @@ -7,6 +7,7 @@ * Modified for U-Boot by R. Chandrasekar (rcsekar@samsung.com) */ +#include #include #include #include diff --git a/drivers/sound/max98357a.c b/drivers/sound/max98357a.c index da56ffdd6bb..bdf6dc236ec 100644 --- a/drivers/sound/max98357a.c +++ b/drivers/sound/max98357a.c @@ -6,6 +6,7 @@ * Parts taken from coreboot */ +#include #include #include #include diff --git a/drivers/sound/maxim_codec.c b/drivers/sound/maxim_codec.c index 98f094c0e9a..6553d959047 100644 --- a/drivers/sound/maxim_codec.c +++ b/drivers/sound/maxim_codec.c @@ -5,6 +5,7 @@ * Copyright 2011 Maxim Integrated Products */ +#include #include #include #include diff --git a/drivers/sound/rockchip_i2s.c b/drivers/sound/rockchip_i2s.c index 5078dfbed07..4e9e68aaac8 100644 --- a/drivers/sound/rockchip_i2s.c +++ b/drivers/sound/rockchip_i2s.c @@ -7,6 +7,7 @@ #define LOG_CATEGORY UCLASS_I2S +#include #include #include #include diff --git a/drivers/sound/rockchip_sound.c b/drivers/sound/rockchip_sound.c index 418d2efd452..94058e603d7 100644 --- a/drivers/sound/rockchip_sound.c +++ b/drivers/sound/rockchip_sound.c @@ -6,6 +6,7 @@ #define LOG_CATEGORY UCLASS_SOUND +#include #include #include #include diff --git a/drivers/sound/rt5677.c b/drivers/sound/rt5677.c index b5c997c6dd5..b655bb40b64 100644 --- a/drivers/sound/rt5677.c +++ b/drivers/sound/rt5677.c @@ -5,6 +5,7 @@ #define LOG_CATEGORY UCLASS_SOUND +#include #include #include #include diff --git a/drivers/sound/samsung-i2s.c b/drivers/sound/samsung-i2s.c index 42175fd7d28..dc5a2789aee 100644 --- a/drivers/sound/samsung-i2s.c +++ b/drivers/sound/samsung-i2s.c @@ -4,11 +4,11 @@ * R. Chandrasekar */ +#include #include #include #include #include -#include #include #include #include diff --git a/drivers/sound/samsung_sound.c b/drivers/sound/samsung_sound.c index 9150ad4a63b..473cedf7e97 100644 --- a/drivers/sound/samsung_sound.c +++ b/drivers/sound/samsung_sound.c @@ -4,6 +4,7 @@ * Written by Simon Glass */ +#include #include #include #include diff --git a/drivers/sound/sandbox.c b/drivers/sound/sandbox.c index 31ae153530e..c6cbd81fdbc 100644 --- a/drivers/sound/sandbox.c +++ b/drivers/sound/sandbox.c @@ -5,6 +5,7 @@ #define LOG_CATEGORY UCLASS_SOUND +#include #include #include #include diff --git a/drivers/sound/sound-uclass.c b/drivers/sound/sound-uclass.c index b8a3dab447d..2ffc4fc7c1d 100644 --- a/drivers/sound/sound-uclass.c +++ b/drivers/sound/sound-uclass.c @@ -6,6 +6,7 @@ #define LOG_CATEGORY UCLASS_SOUND +#include #include #include #include diff --git a/drivers/sound/sound.c b/drivers/sound/sound.c index 4fde2989e04..c0fc50c99da 100644 --- a/drivers/sound/sound.c +++ b/drivers/sound/sound.c @@ -4,9 +4,9 @@ * R. Chandrasekar */ +#include #include #include -#include void sound_create_square_wave(uint sample_rate, unsigned short *data, int size, uint freq, uint channels) diff --git a/drivers/sound/tegra_ahub.c b/drivers/sound/tegra_ahub.c index 8f1b0c009a8..495a29c5137 100644 --- a/drivers/sound/tegra_ahub.c +++ b/drivers/sound/tegra_ahub.c @@ -7,11 +7,11 @@ #define LOG_CATEGORY UCLASS_MISC +#include #include #include #include #include -#include #include #include #include diff --git a/drivers/sound/tegra_i2s.c b/drivers/sound/tegra_i2s.c index 357aac36cea..932f737900e 100644 --- a/drivers/sound/tegra_i2s.c +++ b/drivers/sound/tegra_i2s.c @@ -5,6 +5,7 @@ */ #define LOG_CATEGORY UCLASS_I2S +#include #include #include #include diff --git a/drivers/sound/tegra_sound.c b/drivers/sound/tegra_sound.c index 152c929146f..aef6a2eb147 100644 --- a/drivers/sound/tegra_sound.c +++ b/drivers/sound/tegra_sound.c @@ -6,6 +6,7 @@ #define LOG_CATEGORY UCLASS_I2S +#include #include #include #include diff --git a/drivers/sound/wm8994.c b/drivers/sound/wm8994.c index 6b3091aa5de..fd646479b31 100644 --- a/drivers/sound/wm8994.c +++ b/drivers/sound/wm8994.c @@ -3,6 +3,7 @@ * Copyright (C) 2012 Samsung Electronics * R. Chandrasekar */ +#include #include #include #include diff --git a/drivers/spi/altera_spi.c b/drivers/spi/altera_spi.c index 8e227d187b0..989679e881b 100644 --- a/drivers/spi/altera_spi.c +++ b/drivers/spi/altera_spi.c @@ -6,6 +6,7 @@ * Copyright (c) 2005-2008 Analog Devices Inc. * Copyright (C) 2010 Thomas Chou */ +#include #include #include #include diff --git a/drivers/spi/apple_spi.c b/drivers/spi/apple_spi.c index 5f94e9f7a74..f35f5af1f6f 100644 --- a/drivers/spi/apple_spi.c +++ b/drivers/spi/apple_spi.c @@ -4,6 +4,7 @@ * Copyright The Asahi Linux Contributors */ +#include #include #include #include diff --git a/drivers/spi/atcspi200_spi.c b/drivers/spi/atcspi200_spi.c index 929bf90458c..70cb242cd31 100644 --- a/drivers/spi/atcspi200_spi.c +++ b/drivers/spi/atcspi200_spi.c @@ -6,6 +6,7 @@ * Author: Rick Chen (rick@andestech.com) */ +#include #include #include #include diff --git a/drivers/spi/ath79_spi.c b/drivers/spi/ath79_spi.c index faefac71260..205567ef54d 100644 --- a/drivers/spi/ath79_spi.c +++ b/drivers/spi/ath79_spi.c @@ -3,6 +3,7 @@ * Copyright (C) 2015-2016 Wills Wang */ +#include #include #include #include diff --git a/drivers/spi/atmel-quadspi.c b/drivers/spi/atmel-quadspi.c index 3efb661803b..bd73e4fddf1 100644 --- a/drivers/spi/atmel-quadspi.c +++ b/drivers/spi/atmel-quadspi.c @@ -12,6 +12,7 @@ #include #include #include +#include #include #include #include diff --git a/drivers/spi/atmel_spi.c b/drivers/spi/atmel_spi.c index 79f01001318..d4f0c4c4483 100644 --- a/drivers/spi/atmel_spi.c +++ b/drivers/spi/atmel_spi.c @@ -2,6 +2,7 @@ /* * Copyright (C) 2007 Atmel Corporation */ +#include #include #include #include diff --git a/drivers/spi/bcm63xx_hsspi.c b/drivers/spi/bcm63xx_hsspi.c index 1aa43fd3a23..23ac5bb76c0 100644 --- a/drivers/spi/bcm63xx_hsspi.c +++ b/drivers/spi/bcm63xx_hsspi.c @@ -7,6 +7,7 @@ * Copyright (C) 2012-2013 Jonas Gorski */ +#include #include #include #include diff --git a/drivers/spi/bcm63xx_spi.c b/drivers/spi/bcm63xx_spi.c index 595b41c8ab8..889ac1f966e 100644 --- a/drivers/spi/bcm63xx_spi.c +++ b/drivers/spi/bcm63xx_spi.c @@ -7,6 +7,7 @@ * Copyright (C) 2010 Tanguy Bouzeloc */ +#include #include #include #include diff --git a/drivers/spi/bcmbca_hsspi.c b/drivers/spi/bcmbca_hsspi.c index eff9e1117d3..af45882db0a 100644 --- a/drivers/spi/bcmbca_hsspi.c +++ b/drivers/spi/bcmbca_hsspi.c @@ -8,6 +8,7 @@ * Copyright (C) 2021 Broadcom Ltd */ +#include #include #include #include diff --git a/drivers/spi/ca_sflash.c b/drivers/spi/ca_sflash.c index a99a8a4485a..38bddd38619 100644 --- a/drivers/spi/ca_sflash.c +++ b/drivers/spi/ca_sflash.c @@ -7,6 +7,7 @@ * Author: PengPeng Chen */ +#include #include #include #include diff --git a/drivers/spi/cadence_ospi_versal.c b/drivers/spi/cadence_ospi_versal.c index 222f828f54e..c2be307f1d8 100644 --- a/drivers/spi/cadence_ospi_versal.c +++ b/drivers/spi/cadence_ospi_versal.c @@ -6,6 +6,7 @@ */ #include +#include #include #include #include diff --git a/drivers/spi/cadence_qspi.c b/drivers/spi/cadence_qspi.c index 75e52232010..f4593c47b8c 100644 --- a/drivers/spi/cadence_qspi.c +++ b/drivers/spi/cadence_qspi.c @@ -4,6 +4,7 @@ * Altera Corporation */ +#include #include #include #include diff --git a/drivers/spi/cadence_qspi_apb.c b/drivers/spi/cadence_qspi_apb.c index 93ab2b5635f..fb905322178 100644 --- a/drivers/spi/cadence_qspi_apb.c +++ b/drivers/spi/cadence_qspi_apb.c @@ -25,6 +25,7 @@ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +#include #include #include #include diff --git a/drivers/spi/cf_spi.c b/drivers/spi/cf_spi.c index 8234468b1d4..1a841b5dcef 100644 --- a/drivers/spi/cf_spi.c +++ b/drivers/spi/cf_spi.c @@ -13,6 +13,7 @@ * TODO: fsl_dspi.c should work as a driver for the DSPI module. */ +#include #include #include #include diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c index 04c134be9ed..25f5e9fdebd 100644 --- a/drivers/spi/davinci_spi.c +++ b/drivers/spi/davinci_spi.c @@ -8,7 +8,7 @@ * Copyright (C) 2007 Atmel Corporation */ -#include +#include #include #include #include diff --git a/drivers/spi/designware_spi.c b/drivers/spi/designware_spi.c index 6bd48b1b373..22a79da2333 100644 --- a/drivers/spi/designware_spi.c +++ b/drivers/spi/designware_spi.c @@ -11,6 +11,7 @@ */ #define LOG_CATEGORY UCLASS_SPI +#include #include #include #include diff --git a/drivers/spi/exynos_spi.c b/drivers/spi/exynos_spi.c index 1b9bf004b7c..1bcc3ad318d 100644 --- a/drivers/spi/exynos_spi.c +++ b/drivers/spi/exynos_spi.c @@ -4,6 +4,7 @@ * Padmavathi Venna */ +#include #include #include #include diff --git a/drivers/spi/fsl_dspi.c b/drivers/spi/fsl_dspi.c index 1d4d90ce5aa..9b3d5a94817 100644 --- a/drivers/spi/fsl_dspi.c +++ b/drivers/spi/fsl_dspi.c @@ -11,6 +11,7 @@ #include #include +#include #include #include #include diff --git a/drivers/spi/fsl_espi.c b/drivers/spi/fsl_espi.c index 2638ed25200..b1d964d79d0 100644 --- a/drivers/spi/fsl_espi.c +++ b/drivers/spi/fsl_espi.c @@ -8,7 +8,7 @@ * Chuanhua Han (chuanhua.han@nxp.com) */ -#include +#include #include #include #include diff --git a/drivers/spi/fsl_qspi.c b/drivers/spi/fsl_qspi.c index 8a0a53cb372..3f97730bad0 100644 --- a/drivers/spi/fsl_qspi.c +++ b/drivers/spi/fsl_qspi.c @@ -23,6 +23,7 @@ * Transition to spi-mem in spi-fsl-qspi.c */ +#include #include #include #include diff --git a/drivers/spi/ich.c b/drivers/spi/ich.c index e48ca65fe72..9142ffd2387 100644 --- a/drivers/spi/ich.c +++ b/drivers/spi/ich.c @@ -7,6 +7,7 @@ #define LOG_CATEGORY UCLASS_SPI +#include #include #include #include diff --git a/drivers/spi/iproc_qspi.c b/drivers/spi/iproc_qspi.c index 09f30c22702..b5c274314b5 100644 --- a/drivers/spi/iproc_qspi.c +++ b/drivers/spi/iproc_qspi.c @@ -3,6 +3,7 @@ * Copyright 2020-2021 Broadcom */ +#include #include #include #include diff --git a/drivers/spi/kirkwood_spi.c b/drivers/spi/kirkwood_spi.c index 095cbea0fca..2bb7390bbfb 100644 --- a/drivers/spi/kirkwood_spi.c +++ b/drivers/spi/kirkwood_spi.c @@ -7,7 +7,7 @@ * Derived from drivers/spi/mpc8xxx_spi.c */ -#include +#include #include #include #include diff --git a/drivers/spi/meson_spifc.c b/drivers/spi/meson_spifc.c index d7ebb6bf1ac..d99a151406e 100644 --- a/drivers/spi/meson_spifc.c +++ b/drivers/spi/meson_spifc.c @@ -7,6 +7,7 @@ * Amlogic Meson SPI Flash Controller driver */ +#include #include #include #include diff --git a/drivers/spi/microchip_coreqspi.c b/drivers/spi/microchip_coreqspi.c index 234b1688272..5fe0c8e1237 100644 --- a/drivers/spi/microchip_coreqspi.c +++ b/drivers/spi/microchip_coreqspi.c @@ -5,6 +5,7 @@ * Naga Sureshkumar Relli */ +#include #include #include #include diff --git a/drivers/spi/mpc8xx_spi.c b/drivers/spi/mpc8xx_spi.c index 7e72fb9e23d..e1448cc6196 100644 --- a/drivers/spi/mpc8xx_spi.c +++ b/drivers/spi/mpc8xx_spi.c @@ -16,6 +16,7 @@ * */ +#include #include #include #include diff --git a/drivers/spi/mpc8xxx_spi.c b/drivers/spi/mpc8xxx_spi.c index cd624f4d6f0..7d15390c56b 100644 --- a/drivers/spi/mpc8xxx_spi.c +++ b/drivers/spi/mpc8xxx_spi.c @@ -4,6 +4,7 @@ * With help from the common/soft_spi and arch/powerpc/cpu/mpc8260 drivers */ +#include #include #include #include diff --git a/drivers/spi/mscc_bb_spi.c b/drivers/spi/mscc_bb_spi.c index ad4daeba3cd..95bea0da1b3 100644 --- a/drivers/spi/mscc_bb_spi.c +++ b/drivers/spi/mscc_bb_spi.c @@ -5,6 +5,7 @@ * Copyright (c) 2018 Microsemi Corporation */ +#include #include #include #include diff --git a/drivers/spi/mt7621_spi.c b/drivers/spi/mt7621_spi.c index e46942de2e3..3d008099862 100644 --- a/drivers/spi/mt7621_spi.c +++ b/drivers/spi/mt7621_spi.c @@ -8,6 +8,7 @@ * Copyright (C) 2014-2015 Felix Fietkau */ +#include #include #include #include diff --git a/drivers/spi/mtk_snfi_spi.c b/drivers/spi/mtk_snfi_spi.c index 830424b31d6..3decb3744de 100644 --- a/drivers/spi/mtk_snfi_spi.c +++ b/drivers/spi/mtk_snfi_spi.c @@ -5,6 +5,7 @@ * Author: Weijie Gao */ +#include #include #include #include diff --git a/drivers/spi/mtk_snor.c b/drivers/spi/mtk_snor.c index f202b2f49f5..4b7d4a6e074 100644 --- a/drivers/spi/mtk_snor.c +++ b/drivers/spi/mtk_snor.c @@ -7,6 +7,7 @@ // Some parts are based on drivers/spi/spi-mtk-nor.c of linux version #include +#include #include #include #include diff --git a/drivers/spi/mvebu_a3700_spi.c b/drivers/spi/mvebu_a3700_spi.c index fde9b142fb8..bba2383a111 100644 --- a/drivers/spi/mvebu_a3700_spi.c +++ b/drivers/spi/mvebu_a3700_spi.c @@ -5,6 +5,7 @@ * Copyright (C) 2016 Stefan Roese */ +#include #include #include #include diff --git a/drivers/spi/mxc_spi.c b/drivers/spi/mxc_spi.c index ff61a14f095..e291092c481 100644 --- a/drivers/spi/mxc_spi.c +++ b/drivers/spi/mxc_spi.c @@ -3,7 +3,7 @@ * Copyright (C) 2008, Guennadi Liakhovetski */ -#include +#include #include #include #include diff --git a/drivers/spi/mxs_spi.c b/drivers/spi/mxs_spi.c index ad9e490faa9..773e26bbed7 100644 --- a/drivers/spi/mxs_spi.c +++ b/drivers/spi/mxs_spi.c @@ -12,6 +12,7 @@ * GPIO driven chipselects are not supported. */ +#include #include #include #include diff --git a/drivers/spi/npcm_pspi.c b/drivers/spi/npcm_pspi.c index 7708a96971c..c9441304f5a 100644 --- a/drivers/spi/npcm_pspi.c +++ b/drivers/spi/npcm_pspi.c @@ -3,6 +3,7 @@ * Copyright (c) 2021 Nuvoton Technology. */ +#include #include #include #include diff --git a/drivers/spi/nxp_fspi.c b/drivers/spi/nxp_fspi.c index fefdaaa9e90..5db27f9ae2c 100644 --- a/drivers/spi/nxp_fspi.c +++ b/drivers/spi/nxp_fspi.c @@ -33,6 +33,7 @@ * Frieder Schrempf */ +#include #include #include #include diff --git a/drivers/spi/omap3_spi.c b/drivers/spi/omap3_spi.c index 3d82fc74ff5..5cce6baa621 100644 --- a/drivers/spi/omap3_spi.c +++ b/drivers/spi/omap3_spi.c @@ -16,9 +16,9 @@ * Modified by Ruslan Araslanov */ +#include #include #include -#include #include #include #include diff --git a/drivers/spi/pic32_spi.c b/drivers/spi/pic32_spi.c index e11ae7fc7a4..45f07f083da 100644 --- a/drivers/spi/pic32_spi.c +++ b/drivers/spi/pic32_spi.c @@ -6,6 +6,7 @@ * Purna Chandra Mandal */ +#include #include #include #include diff --git a/drivers/spi/pl022_spi.c b/drivers/spi/pl022_spi.c index 1e20701d0d3..e2b49ebd149 100644 --- a/drivers/spi/pl022_spi.c +++ b/drivers/spi/pl022_spi.c @@ -10,6 +10,7 @@ */ #include +#include #include #include #include diff --git a/drivers/spi/renesas_rpc_spi.c b/drivers/spi/renesas_rpc_spi.c index e6b602cf7b4..8aff2238645 100644 --- a/drivers/spi/renesas_rpc_spi.c +++ b/drivers/spi/renesas_rpc_spi.c @@ -5,6 +5,7 @@ * Copyright (C) 2018 Marek Vasut */ +#include #include #include #include diff --git a/drivers/spi/rk_spi.c b/drivers/spi/rk_spi.c index 4571dc9f9b6..c8694fdff95 100644 --- a/drivers/spi/rk_spi.c +++ b/drivers/spi/rk_spi.c @@ -10,6 +10,7 @@ * Peter, Software Engineering, . */ +#include #include #include #include diff --git a/drivers/spi/sandbox_spi.c b/drivers/spi/sandbox_spi.c index 4cc016138b1..f844597d04c 100644 --- a/drivers/spi/sandbox_spi.c +++ b/drivers/spi/sandbox_spi.c @@ -10,6 +10,7 @@ #define LOG_CATEGORY UCLASS_SPI +#include #include #include #include diff --git a/drivers/spi/sh_qspi.c b/drivers/spi/sh_qspi.c index b7364a61929..72594993853 100644 --- a/drivers/spi/sh_qspi.c +++ b/drivers/spi/sh_qspi.c @@ -8,6 +8,7 @@ #define LOG_CATEGORY UCLASS_SPI +#include #include #include #include diff --git a/drivers/spi/soft_spi.c b/drivers/spi/soft_spi.c index 9bdb4a5bff9..0fa14339bdc 100644 --- a/drivers/spi/soft_spi.c +++ b/drivers/spi/soft_spi.c @@ -9,6 +9,7 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ +#include #include #include #include diff --git a/drivers/spi/spi-aspeed-smc.c b/drivers/spi/spi-aspeed-smc.c index d91d58da459..7d5f101a766 100644 --- a/drivers/spi/spi-aspeed-smc.c +++ b/drivers/spi/spi-aspeed-smc.c @@ -12,6 +12,7 @@ #include #include +#include #include #include #include diff --git a/drivers/spi/spi-emul-uclass.c b/drivers/spi/spi-emul-uclass.c index d92f36bd20e..64bc19c0011 100644 --- a/drivers/spi/spi-emul-uclass.c +++ b/drivers/spi/spi-emul-uclass.c @@ -5,6 +5,7 @@ #define LOG_CATEGORY UCLASS_SPI_EMUL +#include #include #include #include diff --git a/drivers/spi/spi-mem.c b/drivers/spi/spi-mem.c index 3579b7d7db5..b7eca583595 100644 --- a/drivers/spi/spi-mem.c +++ b/drivers/spi/spi-mem.c @@ -13,6 +13,7 @@ #include #include "internals.h" #else +#include #include #include #include diff --git a/drivers/spi/spi-mxic.c b/drivers/spi/spi-mxic.c index b98bcd9b6ba..f663b9dcbb1 100644 --- a/drivers/spi/spi-mxic.c +++ b/drivers/spi/spi-mxic.c @@ -6,6 +6,7 @@ * zhengxunli */ +#include #include #include #include diff --git a/drivers/spi/spi-qup.c b/drivers/spi/spi-qup.c index 836c550b0bb..572cef1694c 100644 --- a/drivers/spi/spi-qup.c +++ b/drivers/spi/spi-qup.c @@ -15,6 +15,7 @@ #include #include #include +#include #include #include #include diff --git a/drivers/spi/spi-sifive.c b/drivers/spi/spi-sifive.c index 0c8666c05f9..ea372a05f83 100644 --- a/drivers/spi/spi-sifive.c +++ b/drivers/spi/spi-sifive.c @@ -6,6 +6,7 @@ * SiFive SPI controller driver (master mode only) */ +#include #include #include #include diff --git a/drivers/spi/spi-sn-f-ospi.c b/drivers/spi/spi-sn-f-ospi.c index fc82791006e..e3633a52608 100644 --- a/drivers/spi/spi-sn-f-ospi.c +++ b/drivers/spi/spi-sn-f-ospi.c @@ -5,6 +5,7 @@ */ #include +#include #include #include #include diff --git a/drivers/spi/spi-sunxi.c b/drivers/spi/spi-sunxi.c index 13725ee7a2d..9ec6b359e22 100644 --- a/drivers/spi/spi-sunxi.c +++ b/drivers/spi/spi-sunxi.c @@ -18,6 +18,7 @@ * SPDX-License-Identifier: GPL-2.0+ */ +#include #include #include #include diff --git a/drivers/spi/spi-synquacer.c b/drivers/spi/spi-synquacer.c index eb522fd7b3d..553f9687e3b 100644 --- a/drivers/spi/spi-synquacer.c +++ b/drivers/spi/spi-synquacer.c @@ -6,6 +6,7 @@ */ #include +#include #include #include #include diff --git a/drivers/spi/spi-uclass.c b/drivers/spi/spi-uclass.c index 6e281725239..f4795e68672 100644 --- a/drivers/spi/spi-uclass.c +++ b/drivers/spi/spi-uclass.c @@ -5,6 +5,7 @@ #define LOG_CATEGORY UCLASS_SPI +#include #include #include #include diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c index 50a076a98be..22910de0dd9 100644 --- a/drivers/spi/spi.c +++ b/drivers/spi/spi.c @@ -3,6 +3,7 @@ * Copyright (c) 2011 The Chromium OS Authors. */ +#include #include #include #include diff --git a/drivers/spi/stm32_qspi.c b/drivers/spi/stm32_qspi.c index 2812a4da411..2ffa201a66e 100644 --- a/drivers/spi/stm32_qspi.c +++ b/drivers/spi/stm32_qspi.c @@ -9,6 +9,7 @@ #define LOG_CATEGORY UCLASS_SPI +#include #include #include #include diff --git a/drivers/spi/stm32_spi.c b/drivers/spi/stm32_spi.c index 97b83b17167..ddb410a94c0 100644 --- a/drivers/spi/stm32_spi.c +++ b/drivers/spi/stm32_spi.c @@ -7,6 +7,7 @@ #define LOG_CATEGORY UCLASS_SPI +#include #include #include #include diff --git a/drivers/spi/tegra114_spi.c b/drivers/spi/tegra114_spi.c index 57f1a8fc703..f0256d8e664 100644 --- a/drivers/spi/tegra114_spi.c +++ b/drivers/spi/tegra114_spi.c @@ -5,6 +5,7 @@ * Copyright (c) 2010-2013 NVIDIA Corporation */ +#include #include #include #include diff --git a/drivers/spi/tegra20_sflash.c b/drivers/spi/tegra20_sflash.c index 19114808e9d..10e38cf839d 100644 --- a/drivers/spi/tegra20_sflash.c +++ b/drivers/spi/tegra20_sflash.c @@ -5,6 +5,7 @@ * With more help from omap3_spi SPI driver */ +#include #include #include #include diff --git a/drivers/spi/tegra20_slink.c b/drivers/spi/tegra20_slink.c index d54a5049205..d0e788539e0 100644 --- a/drivers/spi/tegra20_slink.c +++ b/drivers/spi/tegra20_slink.c @@ -5,6 +5,7 @@ * Copyright (c) 2010-2013 NVIDIA Corporation */ +#include #include #include #include diff --git a/drivers/spi/tegra210_qspi.c b/drivers/spi/tegra210_qspi.c index b969a7993d4..5c8c1859cc9 100644 --- a/drivers/spi/tegra210_qspi.c +++ b/drivers/spi/tegra210_qspi.c @@ -6,6 +6,7 @@ * */ +#include #include #include #include diff --git a/drivers/spi/ti_qspi.c b/drivers/spi/ti_qspi.c index a16412ec6fb..99acb108823 100644 --- a/drivers/spi/ti_qspi.c +++ b/drivers/spi/ti_qspi.c @@ -5,6 +5,7 @@ * Copyright (C) 2013, Texas Instruments, Incorporated */ +#include #include #include #include diff --git a/drivers/spi/uniphier_spi.c b/drivers/spi/uniphier_spi.c index 8f2c0fb4b8e..6402acbf14a 100644 --- a/drivers/spi/uniphier_spi.c +++ b/drivers/spi/uniphier_spi.c @@ -5,6 +5,7 @@ */ #include +#include #include #include #include diff --git a/drivers/spi/xilinx_spi.c b/drivers/spi/xilinx_spi.c index 0e7fa3a4525..94ddf4967ea 100644 --- a/drivers/spi/xilinx_spi.c +++ b/drivers/spi/xilinx_spi.c @@ -13,6 +13,7 @@ */ #include +#include #include #include #include diff --git a/drivers/spi/zynq_qspi.c b/drivers/spi/zynq_qspi.c index b71b9a6fd6c..cb52c0f3072 100644 --- a/drivers/spi/zynq_qspi.c +++ b/drivers/spi/zynq_qspi.c @@ -7,6 +7,7 @@ */ #include +#include #include #include #include diff --git a/drivers/spi/zynq_spi.c b/drivers/spi/zynq_spi.c index ebcb5b6cc88..b3e0858eb94 100644 --- a/drivers/spi/zynq_spi.c +++ b/drivers/spi/zynq_spi.c @@ -6,6 +6,7 @@ * Xilinx Zynq PS SPI controller driver (master mode only) */ +#include #include #include #include diff --git a/drivers/spi/zynqmp_gqspi.c b/drivers/spi/zynqmp_gqspi.c index 61349a4da53..a323994fb2d 100644 --- a/drivers/spi/zynqmp_gqspi.c +++ b/drivers/spi/zynqmp_gqspi.c @@ -7,6 +7,7 @@ #define LOG_CATEGORY UCLASS_SPI +#include #include #include #include diff --git a/drivers/spmi/spmi-msm.c b/drivers/spmi/spmi-msm.c index b0d6226041e..244de69b359 100644 --- a/drivers/spmi/spmi-msm.c +++ b/drivers/spmi/spmi-msm.c @@ -7,6 +7,7 @@ * Loosely based on Little Kernel driver */ +#include #include #include #include diff --git a/drivers/spmi/spmi-sandbox.c b/drivers/spmi/spmi-sandbox.c index 992b08dd612..f6772946bca 100644 --- a/drivers/spmi/spmi-sandbox.c +++ b/drivers/spmi/spmi-sandbox.c @@ -7,6 +7,7 @@ * (C) Copyright 2015 Mateusz Kulikowski */ +#include #include #include #include diff --git a/drivers/spmi/spmi-uclass.c b/drivers/spmi/spmi-uclass.c index 34fe8f6644c..9d9f46a37d8 100644 --- a/drivers/spmi/spmi-uclass.c +++ b/drivers/spmi/spmi-uclass.c @@ -7,6 +7,7 @@ #define LOG_CATEGORY UCLASS_SPMI +#include #include #include #include diff --git a/drivers/sysinfo/gazerbeam.c b/drivers/sysinfo/gazerbeam.c index a3c9d5354dd..c1fae6ccf2a 100644 --- a/drivers/sysinfo/gazerbeam.c +++ b/drivers/sysinfo/gazerbeam.c @@ -4,6 +4,7 @@ * Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc */ +#include #include #include #include diff --git a/drivers/sysinfo/gpio.c b/drivers/sysinfo/gpio.c index aaca318419b..82f90303bb7 100644 --- a/drivers/sysinfo/gpio.c +++ b/drivers/sysinfo/gpio.c @@ -3,6 +3,7 @@ * Copyright (C) 2021 Sean Anderson */ +#include #include #include #include diff --git a/drivers/sysinfo/rcar3.c b/drivers/sysinfo/rcar3.c index 37e2cccd9af..7b127986da7 100644 --- a/drivers/sysinfo/rcar3.c +++ b/drivers/sysinfo/rcar3.c @@ -3,6 +3,7 @@ * Copyright (C) 2021 Marek Vasut */ +#include #include #include #include diff --git a/drivers/sysinfo/sandbox.c b/drivers/sysinfo/sandbox.c index d39720958f0..d270a26aa43 100644 --- a/drivers/sysinfo/sandbox.c +++ b/drivers/sysinfo/sandbox.c @@ -4,6 +4,7 @@ * Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc */ +#include #include #include diff --git a/drivers/sysinfo/smbios.c b/drivers/sysinfo/smbios.c index a7ac8e3f072..80ebd1921d8 100644 --- a/drivers/sysinfo/smbios.c +++ b/drivers/sysinfo/smbios.c @@ -4,6 +4,7 @@ * Written by Simon Glass */ +#include #include #include diff --git a/drivers/sysinfo/sysinfo-uclass.c b/drivers/sysinfo/sysinfo-uclass.c index d77d1e3ee44..10194d0e14c 100644 --- a/drivers/sysinfo/sysinfo-uclass.c +++ b/drivers/sysinfo/sysinfo-uclass.c @@ -6,6 +6,7 @@ #define LOG_CATEGORY UCLASS_SYSINFO +#include #include #include diff --git a/drivers/sysreset/poweroff_gpio.c b/drivers/sysreset/poweroff_gpio.c index d9220024f47..ad04e4b1a85 100644 --- a/drivers/sysreset/poweroff_gpio.c +++ b/drivers/sysreset/poweroff_gpio.c @@ -11,6 +11,7 @@ * Copyright (C) 2012 Jamie Lentin */ +#include #include #include #include diff --git a/drivers/sysreset/sysreset-ti-sci.c b/drivers/sysreset/sysreset-ti-sci.c index 451fc5de735..0de132633a8 100644 --- a/drivers/sysreset/sysreset-ti-sci.c +++ b/drivers/sysreset/sysreset-ti-sci.c @@ -6,6 +6,7 @@ * Andreas Dannenberg */ +#include #include #include #include diff --git a/drivers/sysreset/sysreset-uclass.c b/drivers/sysreset/sysreset-uclass.c index 0abb4042e0f..6151b5fe03e 100644 --- a/drivers/sysreset/sysreset-uclass.c +++ b/drivers/sysreset/sysreset-uclass.c @@ -6,6 +6,7 @@ #define LOG_CATEGORY UCLASS_SYSRESET +#include #include #include #include diff --git a/drivers/sysreset/sysreset_ast.c b/drivers/sysreset/sysreset_ast.c index ef09440bbef..92fad96871b 100644 --- a/drivers/sysreset/sysreset_ast.c +++ b/drivers/sysreset/sysreset_ast.c @@ -3,6 +3,7 @@ * (C) Copyright 2016 Google, Inc */ +#include #include #include #include diff --git a/drivers/sysreset/sysreset_at91.c b/drivers/sysreset/sysreset_at91.c index 457042c7aae..fc85f31ebf0 100644 --- a/drivers/sysreset/sysreset_at91.c +++ b/drivers/sysreset/sysreset_at91.c @@ -7,6 +7,7 @@ #include #include #include +#include #include #include #include diff --git a/drivers/sysreset/sysreset_gpio.c b/drivers/sysreset/sysreset_gpio.c index 47018844a51..de42b593542 100644 --- a/drivers/sysreset/sysreset_gpio.c +++ b/drivers/sysreset/sysreset_gpio.c @@ -3,6 +3,7 @@ * Copyright (C) 2018 Xilinx, Inc. - Michal Simek */ +#include #include #include #include diff --git a/drivers/sysreset/sysreset_microblaze.c b/drivers/sysreset/sysreset_microblaze.c index b81d82f046b..83a7f77ac41 100644 --- a/drivers/sysreset/sysreset_microblaze.c +++ b/drivers/sysreset/sysreset_microblaze.c @@ -3,6 +3,7 @@ * Copyright (C) 2018 Xilinx, Inc. - Michal Simek */ +#include #include #include #include diff --git a/drivers/sysreset/sysreset_mpc83xx.c b/drivers/sysreset/sysreset_mpc83xx.c index dca49299f77..ca48328f7b5 100644 --- a/drivers/sysreset/sysreset_mpc83xx.c +++ b/drivers/sysreset/sysreset_mpc83xx.c @@ -4,6 +4,7 @@ * Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc */ +#include #include #include #include diff --git a/drivers/sysreset/sysreset_octeon.c b/drivers/sysreset/sysreset_octeon.c index c16223720e5..ebdea6ab66e 100644 --- a/drivers/sysreset/sysreset_octeon.c +++ b/drivers/sysreset/sysreset_octeon.c @@ -3,6 +3,7 @@ * Copyright (C) 2020 Stefan Roese */ +#include #include #include #include diff --git a/drivers/sysreset/sysreset_psci.c b/drivers/sysreset/sysreset_psci.c index 89b4f2dcaec..aa09d0b8827 100644 --- a/drivers/sysreset/sysreset_psci.c +++ b/drivers/sysreset/sysreset_psci.c @@ -3,6 +3,7 @@ * Copyright (C) 2017 Masahiro Yamada */ +#include #include #include #include diff --git a/drivers/sysreset/sysreset_resetctl.c b/drivers/sysreset/sysreset_resetctl.c index fbe3999b960..25bd5c9a7ff 100644 --- a/drivers/sysreset/sysreset_resetctl.c +++ b/drivers/sysreset/sysreset_resetctl.c @@ -5,6 +5,7 @@ * Author: Weijie Gao */ +#include #include #include #include diff --git a/drivers/sysreset/sysreset_rockchip.c b/drivers/sysreset/sysreset_rockchip.c index 00308f9a33b..f353f9b4c79 100644 --- a/drivers/sysreset/sysreset_rockchip.c +++ b/drivers/sysreset/sysreset_rockchip.c @@ -3,6 +3,7 @@ * (C) Copyright 2017 Rockchip Electronics Co., Ltd */ +#include #include #include #include diff --git a/drivers/sysreset/sysreset_sandbox.c b/drivers/sysreset/sysreset_sandbox.c index 93179f90bbb..c12eda81d03 100644 --- a/drivers/sysreset/sysreset_sandbox.c +++ b/drivers/sysreset/sysreset_sandbox.c @@ -4,6 +4,7 @@ * Written by Simon Glass */ +#include #include #include #include diff --git a/drivers/sysreset/sysreset_sbi.c b/drivers/sysreset/sysreset_sbi.c index 458191206b2..5e8090d62bf 100644 --- a/drivers/sysreset/sysreset_sbi.c +++ b/drivers/sysreset/sysreset_sbi.c @@ -3,6 +3,7 @@ * Copyright 2021, Heinrich Schuchardt */ +#include #include #include #include diff --git a/drivers/sysreset/sysreset_socfpga.c b/drivers/sysreset/sysreset_socfpga.c index a07b0f4fd55..9b62dd5eab0 100644 --- a/drivers/sysreset/sysreset_socfpga.c +++ b/drivers/sysreset/sysreset_socfpga.c @@ -4,6 +4,7 @@ * Simon Goldschmidt */ +#include #include #include #include diff --git a/drivers/sysreset/sysreset_socfpga_soc64.c b/drivers/sysreset/sysreset_socfpga_soc64.c index 6f44792abb0..9837aadf64b 100644 --- a/drivers/sysreset/sysreset_socfpga_soc64.c +++ b/drivers/sysreset/sysreset_socfpga_soc64.c @@ -4,6 +4,7 @@ * Simon Goldschmidt */ +#include #include #include #include diff --git a/drivers/sysreset/sysreset_sti.c b/drivers/sysreset/sysreset_sti.c index 110b7e23afa..edd90aab061 100644 --- a/drivers/sysreset/sysreset_sti.c +++ b/drivers/sysreset/sysreset_sti.c @@ -4,6 +4,7 @@ * Author(s): Patrice Chotard, for STMicroelectronics. */ +#include #include #include #include diff --git a/drivers/sysreset/sysreset_syscon.c b/drivers/sysreset/sysreset_syscon.c index 57144fa1e3b..e468dac0e90 100644 --- a/drivers/sysreset/sysreset_syscon.c +++ b/drivers/sysreset/sysreset_syscon.c @@ -7,6 +7,7 @@ * Author: Feng Kan */ +#include #include #include #include diff --git a/drivers/sysreset/sysreset_watchdog.c b/drivers/sysreset/sysreset_watchdog.c index 49c061e0880..6db5aa75b54 100644 --- a/drivers/sysreset/sysreset_watchdog.c +++ b/drivers/sysreset/sysreset_watchdog.c @@ -3,6 +3,7 @@ * Copyright (C) 2017 Álvaro Fernández Rojas */ +#include #include #include #include diff --git a/drivers/sysreset/sysreset_x86.c b/drivers/sysreset/sysreset_x86.c index c2f28c65280..dc772b5ff9e 100644 --- a/drivers/sysreset/sysreset_x86.c +++ b/drivers/sysreset/sysreset_x86.c @@ -5,6 +5,7 @@ * Generic reset driver for x86 processor */ +#include #include #include #include diff --git a/drivers/sysreset/sysreset_xtfpga.c b/drivers/sysreset/sysreset_xtfpga.c index ab71ea11a0b..84fbc79016a 100644 --- a/drivers/sysreset/sysreset_xtfpga.c +++ b/drivers/sysreset/sysreset_xtfpga.c @@ -5,7 +5,7 @@ * (C) Copyright 2016 Cadence Design Systems Inc. */ -#include +#include #include #include #include diff --git a/drivers/thermal/imx_scu_thermal.c b/drivers/thermal/imx_scu_thermal.c index fc2b0e227b2..3ec131cbc6e 100644 --- a/drivers/thermal/imx_scu_thermal.c +++ b/drivers/thermal/imx_scu_thermal.c @@ -4,6 +4,7 @@ */ #include +#include #include #include #include diff --git a/drivers/thermal/imx_thermal.c b/drivers/thermal/imx_thermal.c index ea1fcc3dcb2..2f6343e7a18 100644 --- a/drivers/thermal/imx_thermal.c +++ b/drivers/thermal/imx_thermal.c @@ -6,6 +6,7 @@ */ #include +#include #include #include #include diff --git a/drivers/thermal/imx_tmu.c b/drivers/thermal/imx_tmu.c index 70d002aee25..ea6c8329c0a 100644 --- a/drivers/thermal/imx_tmu.c +++ b/drivers/thermal/imx_tmu.c @@ -5,6 +5,7 @@ */ #include +#include #include #include #include diff --git a/drivers/thermal/thermal-uclass.c b/drivers/thermal/thermal-uclass.c index f0fe912e313..700df8af254 100644 --- a/drivers/thermal/thermal-uclass.c +++ b/drivers/thermal/thermal-uclass.c @@ -5,6 +5,7 @@ #define LOG_CATEGORY UCLASS_THERMAL +#include #include #include #include diff --git a/drivers/thermal/thermal_sandbox.c b/drivers/thermal/thermal_sandbox.c index 9af0d0247cb..7dc0d108b8c 100644 --- a/drivers/thermal/thermal_sandbox.c +++ b/drivers/thermal/thermal_sandbox.c @@ -6,6 +6,7 @@ * Sandbox driver for the thermal uclass. */ +#include #include #include diff --git a/drivers/timer/Kconfig b/drivers/timer/Kconfig index 6b1de82ae38..60519c3b536 100644 --- a/drivers/timer/Kconfig +++ b/drivers/timer/Kconfig @@ -50,14 +50,6 @@ config TIMER_EARLY use an early timer. These functions must be supported by your timer driver: timer_early_get_count() and timer_early_get_rate(). -config ADI_SC5XX_TIMER - bool "ADI ADSP-SC5xx Timer Support" - depends on TIMER && (SC57X || SC58X || SC59X || SC59X_64) - help - gptimer based timer support on ADI's ADSP-SC5xx platforms. Available - but not required on sc59x-64-based platforms (598 and similar). - Required on 32-bit platforms (sc57x, sc58x, sc594 and earlier). - config ALTERA_TIMER bool "Altera timer support" depends on TIMER diff --git a/drivers/timer/Makefile b/drivers/timer/Makefile index fb95c8899e3..b93145e8d43 100644 --- a/drivers/timer/Makefile +++ b/drivers/timer/Makefile @@ -3,7 +3,6 @@ # Copyright (C) 2015 Thomas Chou obj-y += timer-uclass.o -obj-$(CONFIG_ADI_SC5XX_TIMER) += adi_sc5xx_timer.o obj-$(CONFIG_ALTERA_TIMER) += altera_timer.o obj-$(CONFIG_$(SPL_)ANDES_PLMT_TIMER) += andes_plmt_timer.o obj-$(CONFIG_ARC_TIMER) += arc_timer.o diff --git a/drivers/timer/adi_sc5xx_timer.c b/drivers/timer/adi_sc5xx_timer.c deleted file mode 100644 index 11c098434a8..00000000000 --- a/drivers/timer/adi_sc5xx_timer.c +++ /dev/null @@ -1,145 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * (C) Copyright 2022 - Analog Devices, Inc. - * - * Written and/or maintained by Timesys Corporation - * - * Converted to driver model by Nathan Barrett-Morrison - * - * Author: Greg Malysa - * Additional Contact: Nathan Barrett-Morrison - * - * dm timer implementation for ADI ADSP-SC5xx SoCs - * - */ - -#include -#include -#include -#include -#include -#include - -/* - * Timer Configuration Register Bits - */ -#define TIMER_OUT_DIS 0x0800 -#define TIMER_PULSE_HI 0x0080 -#define TIMER_MODE_PWM_CONT 0x000c - -#define __BFP(m) u16 m; u16 __pad_##m - -struct gptimer3 { - __BFP(config); - u32 counter; - u32 period; - u32 width; - u32 delay; -}; - -struct gptimer3_group_regs { - __BFP(run); - __BFP(enable); - __BFP(disable); - __BFP(stop_cfg); - __BFP(stop_cfg_set); - __BFP(stop_cfg_clr); - __BFP(data_imsk); - __BFP(stat_imsk); - __BFP(tr_msk); - __BFP(tr_ie); - __BFP(data_ilat); - __BFP(stat_ilat); - __BFP(err_status); - __BFP(bcast_per); - __BFP(bcast_wid); - __BFP(bcast_dly); -}; - -#define MAX_TIM_LOAD 0xFFFFFFFF - -struct adi_gptimer_priv { - struct gptimer3_group_regs __iomem *timer_group; - struct gptimer3 __iomem *timer_base; - u32 prev; - u64 upper; -}; - -static u64 adi_gptimer_get_count(struct udevice *udev) -{ - struct adi_gptimer_priv *priv = dev_get_priv(udev); - - u32 now = readl(&priv->timer_base->counter); - - if (now < priv->prev) - priv->upper += (1ull << 32); - - priv->prev = now; - - return (priv->upper + (u64)now); -} - -static const struct timer_ops adi_gptimer_ops = { - .get_count = adi_gptimer_get_count, -}; - -static int adi_gptimer_probe(struct udevice *udev) -{ - struct timer_dev_priv *uc_priv = dev_get_uclass_priv(udev); - struct adi_gptimer_priv *priv = dev_get_priv(udev); - struct clk clk; - u16 imask; - int ret; - - priv->timer_group = dev_remap_addr_index(udev, 0); - priv->timer_base = dev_remap_addr_index(udev, 1); - priv->upper = 0; - priv->prev = 0; - - if (!priv->timer_group || !priv->timer_base) { - dev_err(udev, "Missing timer_group or timer_base reg entries\n"); - return -ENODEV; - } - - ret = clk_get_by_index(udev, 0, &clk); - if (ret < 0) { - dev_err(udev, "Missing clock reference for timer\n"); - return ret; - } - - ret = clk_enable(&clk); - if (ret) { - dev_err(udev, "Failed to enable clock\n"); - return ret; - } - - uc_priv->clock_rate = clk_get_rate(&clk); - - /* Enable timer */ - writew(TIMER_OUT_DIS | TIMER_MODE_PWM_CONT | TIMER_PULSE_HI, - &priv->timer_base->config); - writel(MAX_TIM_LOAD, &priv->timer_base->period); - writel(MAX_TIM_LOAD - 1, &priv->timer_base->width); - - /* We only use timer 0 in uboot */ - imask = readw(&priv->timer_group->data_imsk); - imask &= ~(1 << 0); - writew(imask, &priv->timer_group->data_imsk); - writew((1 << 0), &priv->timer_group->enable); - - return 0; -} - -static const struct udevice_id adi_gptimer_ids[] = { - { .compatible = "adi,sc5xx-gptimer" }, - { }, -}; - -U_BOOT_DRIVER(adi_gptimer) = { - .name = "adi_gptimer", - .id = UCLASS_TIMER, - .of_match = adi_gptimer_ids, - .priv_auto = sizeof(struct adi_gptimer_priv), - .probe = adi_gptimer_probe, - .ops = &adi_gptimer_ops, -}; diff --git a/drivers/timer/altera_timer.c b/drivers/timer/altera_timer.c index ece246c23d2..040dc65f48a 100644 --- a/drivers/timer/altera_timer.c +++ b/drivers/timer/altera_timer.c @@ -7,6 +7,7 @@ * Scott McNutt */ +#include #include #include #include diff --git a/drivers/timer/andes_plmt_timer.c b/drivers/timer/andes_plmt_timer.c index 20baaf61307..42dd4b62317 100644 --- a/drivers/timer/andes_plmt_timer.c +++ b/drivers/timer/andes_plmt_timer.c @@ -8,6 +8,7 @@ * associated with timer tick. */ +#include #include #include #include diff --git a/drivers/timer/arc_timer.c b/drivers/timer/arc_timer.c index 413bcc32f01..497f8a04155 100644 --- a/drivers/timer/arc_timer.c +++ b/drivers/timer/arc_timer.c @@ -3,6 +3,7 @@ * Copyright (C) 2016 Synopsys, Inc. All rights reserved. */ +#include #include #include #include diff --git a/drivers/timer/arm_global_timer.c b/drivers/timer/arm_global_timer.c index b8057929f99..2e50d9fbc58 100644 --- a/drivers/timer/arm_global_timer.c +++ b/drivers/timer/arm_global_timer.c @@ -6,7 +6,7 @@ * ARM Cortext A9 global timer driver */ -#include +#include #include #include #include diff --git a/drivers/timer/arm_twd_timer.c b/drivers/timer/arm_twd_timer.c index 2b2f3591173..40ccd165874 100644 --- a/drivers/timer/arm_twd_timer.c +++ b/drivers/timer/arm_twd_timer.c @@ -27,6 +27,7 @@ * Alex Zuepke */ +#include #include #include #include diff --git a/drivers/timer/ast_timer.c b/drivers/timer/ast_timer.c index 6601cab7b16..78adc96cc59 100644 --- a/drivers/timer/ast_timer.c +++ b/drivers/timer/ast_timer.c @@ -3,6 +3,7 @@ * Copyright 2016 Google Inc. */ +#include #include #include #include diff --git a/drivers/timer/atmel_pit_timer.c b/drivers/timer/atmel_pit_timer.c index 0a367a5a7f4..5cf46f224ab 100644 --- a/drivers/timer/atmel_pit_timer.c +++ b/drivers/timer/atmel_pit_timer.c @@ -4,6 +4,7 @@ * Wenyou.Yang */ +#include #include #include #include diff --git a/drivers/timer/atmel_tcb_timer.c b/drivers/timer/atmel_tcb_timer.c index 3a328b2f6c7..8c17987c7d7 100644 --- a/drivers/timer/atmel_tcb_timer.c +++ b/drivers/timer/atmel_tcb_timer.c @@ -5,6 +5,7 @@ * Author: Clément Léger */ +#include #include #include #include diff --git a/drivers/timer/cadence-ttc.c b/drivers/timer/cadence-ttc.c index 3cffb1bb88d..2eff45060ad 100644 --- a/drivers/timer/cadence-ttc.c +++ b/drivers/timer/cadence-ttc.c @@ -3,6 +3,7 @@ * Copyright (C) 2018 Xilinx, Inc. (Michal Simek) */ +#include #include #include #include diff --git a/drivers/timer/dw-apb-timer.c b/drivers/timer/dw-apb-timer.c index 77ccb98cb8d..0607f751ca7 100644 --- a/drivers/timer/dw-apb-timer.c +++ b/drivers/timer/dw-apb-timer.c @@ -5,6 +5,7 @@ * Copyright (C) 2018 Marek Vasut */ +#include #include #include #include diff --git a/drivers/timer/fttmr010_timer.c b/drivers/timer/fttmr010_timer.c index c41bbfc1d57..b6289e64610 100644 --- a/drivers/timer/fttmr010_timer.c +++ b/drivers/timer/fttmr010_timer.c @@ -5,6 +5,7 @@ * * 23/08/2022 Port to DM */ +#include #include #include #include diff --git a/drivers/timer/imx-gpt-timer.c b/drivers/timer/imx-gpt-timer.c index 07b9fdb5e18..9c3b64ae5b1 100644 --- a/drivers/timer/imx-gpt-timer.c +++ b/drivers/timer/imx-gpt-timer.c @@ -4,7 +4,7 @@ * Author(s): Giulio Benetti */ -#include +#include #include #include #include diff --git a/drivers/timer/mchp-pit64b-timer.c b/drivers/timer/mchp-pit64b-timer.c index 1a5b2e6a0dc..c9806d7eeeb 100644 --- a/drivers/timer/mchp-pit64b-timer.c +++ b/drivers/timer/mchp-pit64b-timer.c @@ -7,6 +7,7 @@ * Author: Claudiu Beznea */ +#include #include #include #include diff --git a/drivers/timer/mpc83xx_timer.c b/drivers/timer/mpc83xx_timer.c index 9da74479aaa..7814cb6a5d6 100644 --- a/drivers/timer/mpc83xx_timer.c +++ b/drivers/timer/mpc83xx_timer.c @@ -4,7 +4,7 @@ * Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc */ -#include +#include #include #include #include diff --git a/drivers/timer/mtk_timer.c b/drivers/timer/mtk_timer.c index 8216c289837..223e63f6c1a 100644 --- a/drivers/timer/mtk_timer.c +++ b/drivers/timer/mtk_timer.c @@ -7,6 +7,7 @@ */ #include +#include #include #include #include diff --git a/drivers/timer/nomadik-mtu-timer.c b/drivers/timer/nomadik-mtu-timer.c index 9a05582c0d5..4d24de14ae6 100644 --- a/drivers/timer/nomadik-mtu-timer.c +++ b/drivers/timer/nomadik-mtu-timer.c @@ -12,6 +12,7 @@ * Copyright (C) 2010 Linus Walleij for ST-Ericsson */ +#include #include #include #include diff --git a/drivers/timer/npcm-timer.c b/drivers/timer/npcm-timer.c index 9463fd29ce8..4562a6f2311 100644 --- a/drivers/timer/npcm-timer.c +++ b/drivers/timer/npcm-timer.c @@ -3,6 +3,7 @@ * Copyright (c) 2022 Nuvoton Technology Corp. */ +#include #include #include #include diff --git a/drivers/timer/omap-timer.c b/drivers/timer/omap-timer.c index fda6356fdba..9b6d97dae67 100644 --- a/drivers/timer/omap-timer.c +++ b/drivers/timer/omap-timer.c @@ -5,6 +5,7 @@ * Copyright (C) 2015, Texas Instruments, Incorporated */ +#include #include #include #include diff --git a/drivers/timer/orion-timer.c b/drivers/timer/orion-timer.c index 821b681a232..9cab27f2e48 100644 --- a/drivers/timer/orion-timer.c +++ b/drivers/timer/orion-timer.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ #include -#include +#include #include #include #include diff --git a/drivers/timer/ostm_timer.c b/drivers/timer/ostm_timer.c index 314f956cdfb..3bf0d4647b5 100644 --- a/drivers/timer/ostm_timer.c +++ b/drivers/timer/ostm_timer.c @@ -5,6 +5,7 @@ * Copyright (C) 2019 Marek Vasut */ +#include #include #include #include diff --git a/drivers/timer/riscv_aclint_timer.c b/drivers/timer/riscv_aclint_timer.c index 35da1ea2fd2..73fb8791285 100644 --- a/drivers/timer/riscv_aclint_timer.c +++ b/drivers/timer/riscv_aclint_timer.c @@ -4,7 +4,7 @@ * Copyright (C) 2018, Bin Meng */ -#include +#include #include #include #include diff --git a/drivers/timer/riscv_timer.c b/drivers/timer/riscv_timer.c index 1f4980ceb38..169c03dcb5c 100644 --- a/drivers/timer/riscv_timer.c +++ b/drivers/timer/riscv_timer.c @@ -10,7 +10,7 @@ * This driver provides generic timer support for S-mode U-Boot. */ -#include +#include #include #include #include diff --git a/drivers/timer/rockchip_timer.c b/drivers/timer/rockchip_timer.c index 96c010f4dcc..e66c49aa6bb 100644 --- a/drivers/timer/rockchip_timer.c +++ b/drivers/timer/rockchip_timer.c @@ -3,6 +3,7 @@ * Copyright (C) 2017 Theobroma Systems Design und Consulting GmbH */ +#include #include #include #include diff --git a/drivers/timer/sandbox_timer.c b/drivers/timer/sandbox_timer.c index e8b54a02965..1da7e0c3a76 100644 --- a/drivers/timer/sandbox_timer.c +++ b/drivers/timer/sandbox_timer.c @@ -3,6 +3,7 @@ * Copyright (C) 2015 Thomas Chou */ +#include #include #include #include diff --git a/drivers/timer/sp804_timer.c b/drivers/timer/sp804_timer.c index a254e295cbf..8fd4afb15a5 100644 --- a/drivers/timer/sp804_timer.c +++ b/drivers/timer/sp804_timer.c @@ -4,6 +4,7 @@ * Copyright (C) 2022 Arm Ltd. */ +#include #include #include #include diff --git a/drivers/timer/starfive-timer.c b/drivers/timer/starfive-timer.c index 6b79c8858b5..6ac7d7f1d0e 100644 --- a/drivers/timer/starfive-timer.c +++ b/drivers/timer/starfive-timer.c @@ -4,6 +4,7 @@ * Author: Kuan Lim Lee */ +#include #include #include #include diff --git a/drivers/timer/stm32_timer.c b/drivers/timer/stm32_timer.c index 1dc21c5c1be..1213a14ef19 100644 --- a/drivers/timer/stm32_timer.c +++ b/drivers/timer/stm32_timer.c @@ -6,7 +6,7 @@ #define LOG_CATEGORY UCLASS_TIMER -#include +#include #include #include #include diff --git a/drivers/timer/tegra-timer.c b/drivers/timer/tegra-timer.c index 3545424889d..a867c649c3a 100644 --- a/drivers/timer/tegra-timer.c +++ b/drivers/timer/tegra-timer.c @@ -3,6 +3,7 @@ * Copyright (C) 2022 Svyatoslav Ryhel */ +#include #include #include #include diff --git a/drivers/timer/timer-uclass.c b/drivers/timer/timer-uclass.c index 8305f06d318..60ff65529ab 100644 --- a/drivers/timer/timer-uclass.c +++ b/drivers/timer/timer-uclass.c @@ -5,6 +5,7 @@ #define LOG_CATEGORY UCLASS_TIMER +#include #include #include #include diff --git a/drivers/timer/tsc_timer.c b/drivers/timer/tsc_timer.c index 80c084f380d..f86a0b86921 100644 --- a/drivers/timer/tsc_timer.c +++ b/drivers/timer/tsc_timer.c @@ -6,6 +6,7 @@ * arch/x86/kernel/tsc_msr.c and arch/x86/kernel/tsc.c */ +#include #include #include #include diff --git a/drivers/timer/xilinx-timer.c b/drivers/timer/xilinx-timer.c index 54148aa1689..172fd9f9296 100644 --- a/drivers/timer/xilinx-timer.c +++ b/drivers/timer/xilinx-timer.c @@ -7,6 +7,7 @@ * Michal SIMEK */ +#include #include #include #include diff --git a/drivers/tpm/cr50_i2c.c b/drivers/tpm/cr50_i2c.c index 08ec179346e..acf4c7859a9 100644 --- a/drivers/tpm/cr50_i2c.c +++ b/drivers/tpm/cr50_i2c.c @@ -7,12 +7,12 @@ #define LOG_CATEGORY UCLASS_TPM +#include #include #include #include #include #include -#include #include #include #include diff --git a/drivers/tpm/sandbox_common.c b/drivers/tpm/sandbox_common.c index 596e0156389..7e0b2502e35 100644 --- a/drivers/tpm/sandbox_common.c +++ b/drivers/tpm/sandbox_common.c @@ -7,6 +7,7 @@ #define LOG_CATEGORY UCLASS_TPM +#include #include #include #include diff --git a/drivers/tpm/tpm-uclass.c b/drivers/tpm/tpm-uclass.c index 0fade2dcc0a..b2286f7e7ed 100644 --- a/drivers/tpm/tpm-uclass.c +++ b/drivers/tpm/tpm-uclass.c @@ -6,9 +6,9 @@ #define LOG_CATEGORY UCLASS_TPM +#include #include #include -#include #include #include #include diff --git a/drivers/tpm/tpm2_ftpm_tee.c b/drivers/tpm/tpm2_ftpm_tee.c index f2ced50c4eb..c61ff2c2af6 100644 --- a/drivers/tpm/tpm2_ftpm_tee.c +++ b/drivers/tpm/tpm2_ftpm_tee.c @@ -13,6 +13,7 @@ * https://github.com/microsoft/ms-tpm-20-ref/tree/master/Samples/ARM32-FirmwareTPM/optee_ta/fTPM */ +#include #include #include #include diff --git a/drivers/tpm/tpm2_tis_core.c b/drivers/tpm/tpm2_tis_core.c index 680a6409433..81b9210056d 100644 --- a/drivers/tpm/tpm2_tis_core.c +++ b/drivers/tpm/tpm2_tis_core.c @@ -5,8 +5,8 @@ * Based on the Linux TIS core interface and U-Boot original SPI TPM driver */ +#include #include -#include #include #include #include diff --git a/drivers/tpm/tpm2_tis_i2c.c b/drivers/tpm/tpm2_tis_i2c.c index 93efccc7757..99d1cf218da 100644 --- a/drivers/tpm/tpm2_tis_i2c.c +++ b/drivers/tpm/tpm2_tis_i2c.c @@ -3,6 +3,7 @@ * Copyright 2022 IBM Corp. */ +#include #include #include #include diff --git a/drivers/tpm/tpm2_tis_mmio.c b/drivers/tpm/tpm2_tis_mmio.c index dee5503c055..a646ce41ff4 100644 --- a/drivers/tpm/tpm2_tis_mmio.c +++ b/drivers/tpm/tpm2_tis_mmio.c @@ -5,6 +5,7 @@ * Specifications at www.trustedcomputinggroup.org */ +#include #include #include #include diff --git a/drivers/tpm/tpm2_tis_sandbox.c b/drivers/tpm/tpm2_tis_sandbox.c index 50e308e7116..d15a28d9fc8 100644 --- a/drivers/tpm/tpm2_tis_sandbox.c +++ b/drivers/tpm/tpm2_tis_sandbox.c @@ -4,6 +4,7 @@ * Author: Miquel Raynal */ +#include #include #include #include diff --git a/drivers/tpm/tpm2_tis_spi.c b/drivers/tpm/tpm2_tis_spi.c index 28079b5039a..de9cf8f21e0 100644 --- a/drivers/tpm/tpm2_tis_spi.c +++ b/drivers/tpm/tpm2_tis_spi.c @@ -13,11 +13,11 @@ * It is based on the U-Boot driver tpm_tis_infineon_i2c.c. */ +#include #include #include #include #include -#include #include #include #include diff --git a/drivers/tpm/tpm_atmel_twi.c b/drivers/tpm/tpm_atmel_twi.c index 05dd66525c7..fd2a45d34b0 100644 --- a/drivers/tpm/tpm_atmel_twi.c +++ b/drivers/tpm/tpm_atmel_twi.c @@ -5,11 +5,11 @@ * Written by Dirk Eibach */ +#include #include #include #include #include -#include #include #include diff --git a/drivers/tpm/tpm_tis_infineon.c b/drivers/tpm/tpm_tis_infineon.c index e2f6238cbc7..16f4af0e331 100644 --- a/drivers/tpm/tpm_tis_infineon.c +++ b/drivers/tpm/tpm_tis_infineon.c @@ -19,11 +19,11 @@ * Version: 2.1.1 */ +#include #include #include #include #include -#include #include #include #include diff --git a/drivers/tpm/tpm_tis_lpc.c b/drivers/tpm/tpm_tis_lpc.c index dec7acb0c7b..13a133d58eb 100644 --- a/drivers/tpm/tpm_tis_lpc.c +++ b/drivers/tpm/tpm_tis_lpc.c @@ -12,6 +12,7 @@ * slb9635), so this driver provides access to locality 0 only. */ +#include #include #include #include diff --git a/drivers/tpm/tpm_tis_sandbox.c b/drivers/tpm/tpm_tis_sandbox.c index 2bc7dc87ed3..7350e1c4d52 100644 --- a/drivers/tpm/tpm_tis_sandbox.c +++ b/drivers/tpm/tpm_tis_sandbox.c @@ -3,6 +3,7 @@ * Copyright (c) 2013 Google, Inc */ +#include #include #include #include diff --git a/drivers/tpm/tpm_tis_st33zp24_i2c.c b/drivers/tpm/tpm_tis_st33zp24_i2c.c index 1a265b28b22..e0eeabb9337 100644 --- a/drivers/tpm/tpm_tis_st33zp24_i2c.c +++ b/drivers/tpm/tpm_tis_st33zp24_i2c.c @@ -12,6 +12,7 @@ * STMicroelectronics Protocol Stack Specification version 1.2.0. */ +#include #include #include #include diff --git a/drivers/tpm/tpm_tis_st33zp24_spi.c b/drivers/tpm/tpm_tis_st33zp24_spi.c index 2cf690328d8..f0de8a65b09 100644 --- a/drivers/tpm/tpm_tis_st33zp24_spi.c +++ b/drivers/tpm/tpm_tis_st33zp24_spi.c @@ -12,6 +12,7 @@ * STMicroelectronics Protocol Stack Specification version 1.2.0. */ +#include #include #include #include diff --git a/drivers/ufs/cdns-platform.c b/drivers/ufs/cdns-platform.c index 510a6a6aa5d..d1f346937c5 100644 --- a/drivers/ufs/cdns-platform.c +++ b/drivers/ufs/cdns-platform.c @@ -6,6 +6,7 @@ */ #include +#include #include #include #include diff --git a/drivers/ufs/ti-j721e-ufs.c b/drivers/ufs/ti-j721e-ufs.c index c5c08610ffd..1860e0dca29 100644 --- a/drivers/ufs/ti-j721e-ufs.c +++ b/drivers/ufs/ti-j721e-ufs.c @@ -5,6 +5,7 @@ #include #include +#include #include #include #include diff --git a/drivers/ufs/ufs-pci.c b/drivers/ufs/ufs-pci.c index 871f3f50f5c..ad41358727a 100644 --- a/drivers/ufs/ufs-pci.c +++ b/drivers/ufs/ufs-pci.c @@ -4,6 +4,7 @@ * Author: Bin Meng */ +#include #include #include #include diff --git a/drivers/ufs/ufs-uclass.c b/drivers/ufs/ufs-uclass.c index 334bfcfa06a..92fcdf4e6cb 100644 --- a/drivers/ufs/ufs-uclass.c +++ b/drivers/ufs/ufs-uclass.c @@ -7,6 +7,7 @@ #define LOG_CATEGORY UCLASS_UFS +#include #include "ufs.h" #include diff --git a/drivers/ufs/ufs.c b/drivers/ufs/ufs.c index be64bf971f1..e4400f319a7 100644 --- a/drivers/ufs/ufs.c +++ b/drivers/ufs/ufs.c @@ -10,6 +10,7 @@ #include #include +#include #include #include #include diff --git a/drivers/ufs/ufs.h b/drivers/ufs/ufs.h index 43042c294bb..816a5ce0caf 100644 --- a/drivers/ufs/ufs.h +++ b/drivers/ufs/ufs.h @@ -2,7 +2,6 @@ #ifndef __UFS_H #define __UFS_H -#include #include "unipro.h" struct udevice; diff --git a/drivers/usb/cdns3/cdns3-ti.c b/drivers/usb/cdns3/cdns3-ti.c index ac072260c30..2e44aadea47 100644 --- a/drivers/usb/cdns3/cdns3-ti.c +++ b/drivers/usb/cdns3/cdns3-ti.c @@ -5,6 +5,7 @@ * Copyright (C) 2019 Texas Instruments Incorporated - https://www.ti.com */ +#include #include #include #include diff --git a/drivers/usb/cdns3/core.c b/drivers/usb/cdns3/core.c index b4e931646b8..12a741c6ea7 100644 --- a/drivers/usb/cdns3/core.c +++ b/drivers/usb/cdns3/core.c @@ -11,6 +11,7 @@ * Roger Quadros */ +#include #include #include #include diff --git a/drivers/usb/common/common.c b/drivers/usb/common/common.c index 13e9a61072a..7137a569d97 100644 --- a/drivers/usb/common/common.c +++ b/drivers/usb/common/common.c @@ -6,6 +6,7 @@ * Texas Instruments Incorporated, */ +#include #include #include #include diff --git a/drivers/usb/common/fsl-dt-fixup.c b/drivers/usb/common/fsl-dt-fixup.c index 6a68bd76c27..00b8cd368b1 100644 --- a/drivers/usb/common/fsl-dt-fixup.c +++ b/drivers/usb/common/fsl-dt-fixup.c @@ -7,6 +7,7 @@ * Author: Tor Krill tor@excito.com */ +#include #include #include #include diff --git a/drivers/usb/common/fsl-errata.c b/drivers/usb/common/fsl-errata.c index 89ae73f2ba4..9eb1d230672 100644 --- a/drivers/usb/common/fsl-errata.c +++ b/drivers/usb/common/fsl-errata.c @@ -5,6 +5,7 @@ * Copyright 2013 Freescale Semiconductor, Inc. */ +#include #include #include #include diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c index c443d56746d..96e850b7170 100644 --- a/drivers/usb/dwc3/core.c +++ b/drivers/usb/dwc3/core.c @@ -13,6 +13,7 @@ * commit cd72f890d2 : usb: dwc3: core: enable phy suspend quirk on non-FPGA */ +#include #include #include #include diff --git a/drivers/usb/dwc3/dwc3-generic.c b/drivers/usb/dwc3/dwc3-generic.c index 8db678eb85d..7a00529a2a8 100644 --- a/drivers/usb/dwc3/dwc3-generic.c +++ b/drivers/usb/dwc3/dwc3-generic.c @@ -7,6 +7,7 @@ * Based on dwc3-omap.c. */ +#include #include #include #include diff --git a/drivers/usb/dwc3/dwc3-layerscape.c b/drivers/usb/dwc3/dwc3-layerscape.c index ff83bf71e89..c32df2396d7 100644 --- a/drivers/usb/dwc3/dwc3-layerscape.c +++ b/drivers/usb/dwc3/dwc3-layerscape.c @@ -7,6 +7,7 @@ * Based on dwc3-generic.c. */ +#include #include #include #include diff --git a/drivers/usb/dwc3/dwc3-meson-g12a.c b/drivers/usb/dwc3/dwc3-meson-g12a.c index 21e4f637bb1..1a3e9350c46 100644 --- a/drivers/usb/dwc3/dwc3-meson-g12a.c +++ b/drivers/usb/dwc3/dwc3-meson-g12a.c @@ -6,6 +6,7 @@ * Author: Neil Armstrong */ +#include #include #include #include diff --git a/drivers/usb/dwc3/dwc3-meson-gxl.c b/drivers/usb/dwc3/dwc3-meson-gxl.c index 3e693c5ff31..2ce915701a8 100644 --- a/drivers/usb/dwc3/dwc3-meson-gxl.c +++ b/drivers/usb/dwc3/dwc3-meson-gxl.c @@ -7,6 +7,7 @@ */ #define DEBUG +#include #include #include #include diff --git a/drivers/usb/dwc3/dwc3-omap.c b/drivers/usb/dwc3/dwc3-omap.c index 4b219c35eb3..53c4d4826b4 100644 --- a/drivers/usb/dwc3/dwc3-omap.c +++ b/drivers/usb/dwc3/dwc3-omap.c @@ -13,6 +13,7 @@ * commit 7ee2566ff5 : usb: dwc3: dwc3-omap: get rid of ->prepare()/->complete() */ +#include #include #include #include diff --git a/drivers/usb/dwc3/ep0.c b/drivers/usb/dwc3/ep0.c index 117d38a0340..1133cf82b1a 100644 --- a/drivers/usb/dwc3/ep0.c +++ b/drivers/usb/dwc3/ep0.c @@ -12,6 +12,7 @@ * * commit c00552ebaf : Merge 3.18-rc7 into usb-next */ +#include #include #include #include diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c index fab32575647..39c19d94de1 100644 --- a/drivers/usb/dwc3/gadget.c +++ b/drivers/usb/dwc3/gadget.c @@ -13,6 +13,7 @@ * commit 8e74475b0e : usb: dwc3: gadget: use udc-core's reset notifier */ +#include #include #include #include diff --git a/drivers/usb/dwc3/samsung_usb_phy.c b/drivers/usb/dwc3/samsung_usb_phy.c index 0a771308163..abbd4136890 100644 --- a/drivers/usb/dwc3/samsung_usb_phy.c +++ b/drivers/usb/dwc3/samsung_usb_phy.c @@ -7,7 +7,7 @@ * Author: Joonyoung Shim */ -#include +#include #include #include #include diff --git a/drivers/usb/dwc3/ti_usb_phy.c b/drivers/usb/dwc3/ti_usb_phy.c index f0ecdea958a..8ae130860f7 100644 --- a/drivers/usb/dwc3/ti_usb_phy.c +++ b/drivers/usb/dwc3/ti_usb_phy.c @@ -16,6 +16,7 @@ * and remove" for phy-omap-usb2.c */ +#include #include #include #include diff --git a/drivers/usb/emul/sandbox_flash.c b/drivers/usb/emul/sandbox_flash.c index 24420e3d51e..7c5c1ab3de7 100644 --- a/drivers/usb/emul/sandbox_flash.c +++ b/drivers/usb/emul/sandbox_flash.c @@ -6,6 +6,7 @@ #define LOG_CATEGORY UCLASS_USB +#include #include #include #include diff --git a/drivers/usb/emul/sandbox_hub.c b/drivers/usb/emul/sandbox_hub.c index 3b3e59f978f..084cc16cc68 100644 --- a/drivers/usb/emul/sandbox_hub.c +++ b/drivers/usb/emul/sandbox_hub.c @@ -4,6 +4,7 @@ * Written by Simon Glass */ +#include #include #include #include diff --git a/drivers/usb/emul/sandbox_keyb.c b/drivers/usb/emul/sandbox_keyb.c index db769883ba3..5ec1e98e4ed 100644 --- a/drivers/usb/emul/sandbox_keyb.c +++ b/drivers/usb/emul/sandbox_keyb.c @@ -4,6 +4,7 @@ * Written by Simon Glass */ +#include #include #include #include diff --git a/drivers/usb/emul/usb-emul-uclass.c b/drivers/usb/emul/usb-emul-uclass.c index cdc18d6cbb9..b31dc950e3a 100644 --- a/drivers/usb/emul/usb-emul-uclass.c +++ b/drivers/usb/emul/usb-emul-uclass.c @@ -6,6 +6,7 @@ #define LOG_CATEGORY UCLASS_USB_EMUL +#include #include #include #include diff --git a/drivers/usb/eth/asix.c b/drivers/usb/eth/asix.c index c5a01ec922b..26dd312b7d0 100644 --- a/drivers/usb/eth/asix.c +++ b/drivers/usb/eth/asix.c @@ -5,6 +5,7 @@ * Patched for AX88772B by Antmicro Ltd */ +#include #include #include #include diff --git a/drivers/usb/eth/asix88179.c b/drivers/usb/eth/asix88179.c index 7bfd285b3aa..2e737e60668 100644 --- a/drivers/usb/eth/asix88179.c +++ b/drivers/usb/eth/asix88179.c @@ -5,6 +5,7 @@ * from the Linux AX88179_178a driver */ +#include #include #include #include diff --git a/drivers/usb/eth/mcs7830.c b/drivers/usb/eth/mcs7830.c index 199fb7a5d08..d94204f22d5 100644 --- a/drivers/usb/eth/mcs7830.c +++ b/drivers/usb/eth/mcs7830.c @@ -9,6 +9,7 @@ * MOSCHIP MCS7830 based (7730/7830/7832) USB 2.0 Ethernet Devices */ +#include #include #include #include diff --git a/drivers/usb/eth/r8152.c b/drivers/usb/eth/r8152.c index e3f20e08c33..3c866f4f1e2 100644 --- a/drivers/usb/eth/r8152.c +++ b/drivers/usb/eth/r8152.c @@ -4,6 +4,7 @@ * */ +#include #include #include #include diff --git a/drivers/usb/eth/r8152_fw.c b/drivers/usb/eth/r8152_fw.c index 3159f301060..a41abed3069 100644 --- a/drivers/usb/eth/r8152_fw.c +++ b/drivers/usb/eth/r8152_fw.c @@ -3,6 +3,7 @@ * Copyright (c) 2015 Realtek Semiconductor Corp. All rights reserved. * */ +#include #include #include #include diff --git a/drivers/usb/eth/smsc95xx.c b/drivers/usb/eth/smsc95xx.c index b4fcb2c2bb0..de6586e6263 100644 --- a/drivers/usb/eth/smsc95xx.c +++ b/drivers/usb/eth/smsc95xx.c @@ -6,6 +6,7 @@ * Copyright (C) 2007-2008 SMSC (Steve Glendinning) */ +#include #include #include #include diff --git a/drivers/usb/eth/usb_ether.c b/drivers/usb/eth/usb_ether.c index 8bba3e0974e..2e9af54fd63 100644 --- a/drivers/usb/eth/usb_ether.c +++ b/drivers/usb/eth/usb_ether.c @@ -3,6 +3,7 @@ * Copyright (c) 2011 The Chromium OS Authors. */ +#include #include #include #include diff --git a/drivers/usb/gadget/at91_udc.c b/drivers/usb/gadget/at91_udc.c index 86b2cbf3f6a..e573a03477b 100644 --- a/drivers/usb/gadget/at91_udc.c +++ b/drivers/usb/gadget/at91_udc.c @@ -13,6 +13,7 @@ #undef VERBOSE_DEBUG #undef PACKET_TRACE +#include #include #include #include diff --git a/drivers/usb/gadget/atmel_usba_udc.c b/drivers/usb/gadget/atmel_usba_udc.c index f99553df8d4..4c420747b0b 100644 --- a/drivers/usb/gadget/atmel_usba_udc.c +++ b/drivers/usb/gadget/atmel_usba_udc.c @@ -7,6 +7,7 @@ * Bo Shen */ +#include #include #include #include diff --git a/drivers/usb/gadget/bcm_udc_otg_phy.c b/drivers/usb/gadget/bcm_udc_otg_phy.c index 9875191091c..c89cd57c253 100644 --- a/drivers/usb/gadget/bcm_udc_otg_phy.c +++ b/drivers/usb/gadget/bcm_udc_otg_phy.c @@ -4,6 +4,7 @@ */ #include +#include #include #include #include diff --git a/drivers/usb/gadget/ci_udc.c b/drivers/usb/gadget/ci_udc.c index bbe03cfff1f..750d4714879 100644 --- a/drivers/usb/gadget/ci_udc.c +++ b/drivers/usb/gadget/ci_udc.c @@ -7,6 +7,7 @@ * Murray.Jensen@cmst.csiro.au, 27-Jan-01. */ +#include #include #include #include diff --git a/drivers/usb/gadget/config.c b/drivers/usb/gadget/config.c index 1363ef9e73d..e96782644f3 100644 --- a/drivers/usb/gadget/config.c +++ b/drivers/usb/gadget/config.c @@ -8,6 +8,7 @@ * Remy Bohmer */ +#include #include #include #include diff --git a/drivers/usb/gadget/dwc2_udc_otg.c b/drivers/usb/gadget/dwc2_udc_otg.c index 6bd395a6235..27082f5152c 100644 --- a/drivers/usb/gadget/dwc2_udc_otg.c +++ b/drivers/usb/gadget/dwc2_udc_otg.c @@ -17,6 +17,7 @@ * Lukasz Majewski */ #undef DEBUG +#include #include #include #include diff --git a/drivers/usb/gadget/dwc2_udc_otg_phy.c b/drivers/usb/gadget/dwc2_udc_otg_phy.c index c7eea7b3442..7f8e9564b9e 100644 --- a/drivers/usb/gadget/dwc2_udc_otg_phy.c +++ b/drivers/usb/gadget/dwc2_udc_otg_phy.c @@ -17,6 +17,7 @@ * Lukasz Majewski */ +#include #include #include #include diff --git a/drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c b/drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c index 16b2a03f9e4..1c34b753511 100644 --- a/drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c +++ b/drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c @@ -17,6 +17,7 @@ * Lukasz Majewski */ +#include #include #include #include diff --git a/drivers/usb/gadget/ep0.c b/drivers/usb/gadget/ep0.c index 9d08640ff23..c256cc31fbd 100644 --- a/drivers/usb/gadget/ep0.c +++ b/drivers/usb/gadget/ep0.c @@ -36,6 +36,7 @@ * XXX */ +#include #include #include diff --git a/drivers/usb/gadget/epautoconf.c b/drivers/usb/gadget/epautoconf.c index 0a70035ce04..bb0d2971d06 100644 --- a/drivers/usb/gadget/epautoconf.c +++ b/drivers/usb/gadget/epautoconf.c @@ -8,6 +8,7 @@ * Remy Bohmer */ +#include #include #include #include diff --git a/drivers/usb/gadget/ether.c b/drivers/usb/gadget/ether.c index b8b29d399b1..36618f0bdf3 100644 --- a/drivers/usb/gadget/ether.c +++ b/drivers/usb/gadget/ether.c @@ -7,6 +7,7 @@ * Copyright (C) 2008 Nokia Corporation */ +#include #include #include #include diff --git a/drivers/usb/gadget/f_acm.c b/drivers/usb/gadget/f_acm.c index f18c6a0a761..ba216128ab2 100644 --- a/drivers/usb/gadget/f_acm.c +++ b/drivers/usb/gadget/f_acm.c @@ -10,6 +10,7 @@ */ #include +#include #include #include #include diff --git a/drivers/usb/gadget/f_dfu.c b/drivers/usb/gadget/f_dfu.c index ca8b36e077b..44877df4ec6 100644 --- a/drivers/usb/gadget/f_dfu.c +++ b/drivers/usb/gadget/f_dfu.c @@ -16,6 +16,7 @@ #include #include +#include #include #include diff --git a/drivers/usb/gadget/f_fastboot.c b/drivers/usb/gadget/f_fastboot.c index 8df0e3f331d..09e740cc962 100644 --- a/drivers/usb/gadget/f_fastboot.c +++ b/drivers/usb/gadget/f_fastboot.c @@ -11,6 +11,7 @@ */ #include #include +#include #include #include #include diff --git a/drivers/usb/gadget/f_mass_storage.c b/drivers/usb/gadget/f_mass_storage.c index 89a96dbb7a7..ef90c7ec7fb 100644 --- a/drivers/usb/gadget/f_mass_storage.c +++ b/drivers/usb/gadget/f_mass_storage.c @@ -244,6 +244,7 @@ #include #include #include +#include #include #include #include diff --git a/drivers/usb/gadget/f_rockusb.c b/drivers/usb/gadget/f_rockusb.c index d679cdae97c..98a7ffa2a75 100644 --- a/drivers/usb/gadget/f_rockusb.c +++ b/drivers/usb/gadget/f_rockusb.c @@ -6,6 +6,7 @@ */ #include #include +#include #include #include #include diff --git a/drivers/usb/gadget/f_sdp.c b/drivers/usb/gadget/f_sdp.c index 89496917a61..ca2760c00d0 100644 --- a/drivers/usb/gadget/f_sdp.c +++ b/drivers/usb/gadget/f_sdp.c @@ -17,6 +17,7 @@ */ #include +#include #include #include #include diff --git a/drivers/usb/gadget/f_thor.c b/drivers/usb/gadget/f_thor.c index 54372118348..0e7529dcdbb 100644 --- a/drivers/usb/gadget/f_thor.c +++ b/drivers/usb/gadget/f_thor.c @@ -15,6 +15,7 @@ */ #include +#include #include #include #include diff --git a/drivers/usb/gadget/g_dnl.c b/drivers/usb/gadget/g_dnl.c index b5b5f5d8c11..afb7b74f305 100644 --- a/drivers/usb/gadget/g_dnl.c +++ b/drivers/usb/gadget/g_dnl.c @@ -6,6 +6,7 @@ * Lukasz Majewski */ +#include #include #include diff --git a/drivers/usb/gadget/max3420_udc.c b/drivers/usb/gadget/max3420_udc.c index 5a227c0ffd9..fa655c98dcc 100644 --- a/drivers/usb/gadget/max3420_udc.c +++ b/drivers/usb/gadget/max3420_udc.c @@ -1,5 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ +#include #include #include #include diff --git a/drivers/usb/gadget/rndis.c b/drivers/usb/gadget/rndis.c index 5e6e5a054ca..e7276ccd37a 100644 --- a/drivers/usb/gadget/rndis.c +++ b/drivers/usb/gadget/rndis.c @@ -18,6 +18,7 @@ * updates to merge with Linux 2.6, better match RNDIS spec */ +#include #include #include #include diff --git a/drivers/usb/gadget/udc/udc-core.c b/drivers/usb/gadget/udc/udc-core.c index 6bb419ae2ab..ba658d92296 100644 --- a/drivers/usb/gadget/udc/udc-core.c +++ b/drivers/usb/gadget/udc/udc-core.c @@ -19,6 +19,7 @@ #include #include #include +#include #include #include #include diff --git a/drivers/usb/gadget/udc/udc-uclass.c b/drivers/usb/gadget/udc/udc-uclass.c index 5dc23a55bb5..30ee1cab066 100644 --- a/drivers/usb/gadget/udc/udc-uclass.c +++ b/drivers/usb/gadget/udc/udc-uclass.c @@ -6,6 +6,7 @@ #define LOG_CATEGORY UCLASS_USB_GADGET_GENERIC +#include #include #include #include diff --git a/drivers/usb/gadget/usbstring.c b/drivers/usb/gadget/usbstring.c index 4617a95bd0a..e2464ad923f 100644 --- a/drivers/usb/gadget/usbstring.c +++ b/drivers/usb/gadget/usbstring.c @@ -6,6 +6,7 @@ * Remy Bohmer */ +#include #include #include #include diff --git a/drivers/usb/host/dwc2.c b/drivers/usb/host/dwc2.c index a9dbb85f4e6..637eb2dd06f 100644 --- a/drivers/usb/host/dwc2.c +++ b/drivers/usb/host/dwc2.c @@ -4,6 +4,7 @@ * Copyright (C) 2014 Marek Vasut */ +#include #include #include #include diff --git a/drivers/usb/host/dwc3-of-simple.c b/drivers/usb/host/dwc3-of-simple.c index d52e7d22d1a..f9df59d2e5d 100644 --- a/drivers/usb/host/dwc3-of-simple.c +++ b/drivers/usb/host/dwc3-of-simple.c @@ -10,6 +10,7 @@ * Author: Neil Armstrong */ +#include #include #include #include diff --git a/drivers/usb/host/dwc3-sti-glue.c b/drivers/usb/host/dwc3-sti-glue.c index 3e6834e38e3..4a3ab611127 100644 --- a/drivers/usb/host/dwc3-sti-glue.c +++ b/drivers/usb/host/dwc3-sti-glue.c @@ -6,6 +6,7 @@ * Author(s): Patrice Chotard, for STMicroelectronics. */ +#include #include #include #include diff --git a/drivers/usb/host/ehci-atmel.c b/drivers/usb/host/ehci-atmel.c index ee751224463..c6d50fd4551 100644 --- a/drivers/usb/host/ehci-atmel.c +++ b/drivers/usb/host/ehci-atmel.c @@ -5,6 +5,7 @@ * Written-by: Bo Shen */ +#include #include #include #include diff --git a/drivers/usb/host/ehci-exynos.c b/drivers/usb/host/ehci-exynos.c index 1e4a5a0b6f6..c1cdd4b0889 100644 --- a/drivers/usb/host/ehci-exynos.c +++ b/drivers/usb/host/ehci-exynos.c @@ -6,6 +6,7 @@ * Vivek Gautam */ +#include #include #include #include diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c index ee3eb065b14..0569dd54fff 100644 --- a/drivers/usb/host/ehci-fsl.c +++ b/drivers/usb/host/ehci-fsl.c @@ -7,6 +7,7 @@ * Author: Tor Krill tor@excito.com */ +#include #include #include #include diff --git a/drivers/usb/host/ehci-generic.c b/drivers/usb/host/ehci-generic.c index 23c3ed25554..936e30438d9 100644 --- a/drivers/usb/host/ehci-generic.c +++ b/drivers/usb/host/ehci-generic.c @@ -3,6 +3,7 @@ * Copyright (C) 2015 Alexey Brodkin */ +#include #include #include #include diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c index 7d5519c65a9..9839aa17492 100644 --- a/drivers/usb/host/ehci-hcd.c +++ b/drivers/usb/host/ehci-hcd.c @@ -6,6 +6,7 @@ * * All rights reserved. */ +#include #include #include #include diff --git a/drivers/usb/host/ehci-marvell.c b/drivers/usb/host/ehci-marvell.c index ca0ab57d49c..6093c8fb0b6 100644 --- a/drivers/usb/host/ehci-marvell.c +++ b/drivers/usb/host/ehci-marvell.c @@ -5,6 +5,7 @@ * Written-by: Prafulla Wadaskar */ +#include #include #include #include diff --git a/drivers/usb/host/ehci-msm.c b/drivers/usb/host/ehci-msm.c index a081f71b187..98fe7bc3bcb 100644 --- a/drivers/usb/host/ehci-msm.c +++ b/drivers/usb/host/ehci-msm.c @@ -7,6 +7,7 @@ * Based on Linux driver */ +#include #include #include #include diff --git a/drivers/usb/host/ehci-mx5.c b/drivers/usb/host/ehci-mx5.c index fb912654097..c11279867c7 100644 --- a/drivers/usb/host/ehci-mx5.c +++ b/drivers/usb/host/ehci-mx5.c @@ -4,6 +4,7 @@ * Copyright (C) 2010 Freescale Semiconductor, Inc. */ +#include #include #include #include diff --git a/drivers/usb/host/ehci-mx6.c b/drivers/usb/host/ehci-mx6.c index 31cd8a50f4a..a35fcca43a2 100644 --- a/drivers/usb/host/ehci-mx6.c +++ b/drivers/usb/host/ehci-mx6.c @@ -4,6 +4,7 @@ * Copyright (C) 2010 Freescale Semiconductor, Inc. */ +#include #include #include #include diff --git a/drivers/usb/host/ehci-mxs.c b/drivers/usb/host/ehci-mxs.c index 95af5c9254c..ddf7cc2d00a 100644 --- a/drivers/usb/host/ehci-mxs.c +++ b/drivers/usb/host/ehci-mxs.c @@ -6,6 +6,7 @@ * on behalf of DENX Software Engineering GmbH */ +#include #include #include #include diff --git a/drivers/usb/host/ehci-npcm.c b/drivers/usb/host/ehci-npcm.c index d2a9965b4b4..357a5614edb 100644 --- a/drivers/usb/host/ehci-npcm.c +++ b/drivers/usb/host/ehci-npcm.c @@ -3,6 +3,7 @@ * Copyright (c) 2021 Nuvoton Technology Corp. */ +#include #include #include #include diff --git a/drivers/usb/host/ehci-omap.c b/drivers/usb/host/ehci-omap.c index a95fcad0213..765336a3c42 100644 --- a/drivers/usb/host/ehci-omap.c +++ b/drivers/usb/host/ehci-omap.c @@ -10,8 +10,8 @@ * */ +#include #include -#include #include #include #include diff --git a/drivers/usb/host/ehci-pci.c b/drivers/usb/host/ehci-pci.c index 572686580cd..e98ab312618 100644 --- a/drivers/usb/host/ehci-pci.c +++ b/drivers/usb/host/ehci-pci.c @@ -4,6 +4,7 @@ * All rights reserved. */ +#include #include #include #include diff --git a/drivers/usb/host/ehci-tegra.c b/drivers/usb/host/ehci-tegra.c index 343893b9f19..2cf16256703 100644 --- a/drivers/usb/host/ehci-tegra.c +++ b/drivers/usb/host/ehci-tegra.c @@ -5,6 +5,7 @@ * Copyright (c) 2013 Lucas Stach */ +#include #include #include #include diff --git a/drivers/usb/host/ehci-vf.c b/drivers/usb/host/ehci-vf.c index 5afe28ea303..648e136447d 100644 --- a/drivers/usb/host/ehci-vf.c +++ b/drivers/usb/host/ehci-vf.c @@ -6,6 +6,7 @@ * Based on ehci-mx6 driver */ +#include #include #include #include diff --git a/drivers/usb/host/ehci-zynq.c b/drivers/usb/host/ehci-zynq.c index dfaff5c60f4..f7e458cb15a 100644 --- a/drivers/usb/host/ehci-zynq.c +++ b/drivers/usb/host/ehci-zynq.c @@ -5,6 +5,7 @@ * USB Low level initialization(Specific to zynq) */ +#include #include #include #include diff --git a/drivers/usb/host/ohci-at91.c b/drivers/usb/host/ohci-at91.c index b170f26e6c6..9b955c1bd67 100644 --- a/drivers/usb/host/ohci-at91.c +++ b/drivers/usb/host/ohci-at91.c @@ -4,6 +4,7 @@ * DENX Software Engineering */ +#include #include int usb_cpu_init(void) diff --git a/drivers/usb/host/ohci-da8xx.c b/drivers/usb/host/ohci-da8xx.c index d321d147c2f..d3d73d23844 100644 --- a/drivers/usb/host/ohci-da8xx.c +++ b/drivers/usb/host/ohci-da8xx.c @@ -3,6 +3,7 @@ * Copyright (C) 2012 Sughosh Ganu */ +#include #include #include #include diff --git a/drivers/usb/host/ohci-generic.c b/drivers/usb/host/ohci-generic.c index f1325cd4953..ceed1911a95 100644 --- a/drivers/usb/host/ohci-generic.c +++ b/drivers/usb/host/ohci-generic.c @@ -3,6 +3,7 @@ * Copyright (C) 2015 Alexey Brodkin */ +#include #include #include #include diff --git a/drivers/usb/host/ohci-hcd.c b/drivers/usb/host/ohci-hcd.c index c020d13c43d..3f4418198cc 100644 --- a/drivers/usb/host/ohci-hcd.c +++ b/drivers/usb/host/ohci-hcd.c @@ -27,7 +27,7 @@ * to activate workaround for bug #41 or this driver will NOT work! */ -#include +#include #include #include #include diff --git a/drivers/usb/host/ohci-lpc32xx.c b/drivers/usb/host/ohci-lpc32xx.c index ed04cae7afe..a04b2961b96 100644 --- a/drivers/usb/host/ohci-lpc32xx.c +++ b/drivers/usb/host/ohci-lpc32xx.c @@ -7,6 +7,7 @@ * Copyright (c) 2015 Tyco Fire Protection Products. */ +#include #include #include #include diff --git a/drivers/usb/host/ohci-npcm.c b/drivers/usb/host/ohci-npcm.c index ffeb6bc206a..9e1d5298809 100644 --- a/drivers/usb/host/ohci-npcm.c +++ b/drivers/usb/host/ohci-npcm.c @@ -3,6 +3,7 @@ * Copyright (c) 2021 Nuvoton Technology Corp. */ +#include #include #include #include diff --git a/drivers/usb/host/ohci-pci.c b/drivers/usb/host/ohci-pci.c index f10f1092420..f061aec2896 100644 --- a/drivers/usb/host/ohci-pci.c +++ b/drivers/usb/host/ohci-pci.c @@ -5,6 +5,7 @@ * */ +#include #include #include #include diff --git a/drivers/usb/host/r8a66597-hcd.c b/drivers/usb/host/r8a66597-hcd.c index f0b18bffba4..3ccbc16da37 100644 --- a/drivers/usb/host/r8a66597-hcd.c +++ b/drivers/usb/host/r8a66597-hcd.c @@ -5,6 +5,7 @@ * Copyright (C) 2008 Yoshihiro Shimoda */ +#include #include #include #include diff --git a/drivers/usb/host/usb-sandbox.c b/drivers/usb/host/usb-sandbox.c index e26f0b292ed..3d4f8d653b5 100644 --- a/drivers/usb/host/usb-sandbox.c +++ b/drivers/usb/host/usb-sandbox.c @@ -4,6 +4,7 @@ * Written by Simon Glass */ +#include #include #include #include diff --git a/drivers/usb/host/usb-uclass.c b/drivers/usb/host/usb-uclass.c index cd3a07e4c37..a1cd0ad2d66 100644 --- a/drivers/usb/host/usb-uclass.c +++ b/drivers/usb/host/usb-uclass.c @@ -8,6 +8,7 @@ #define LOG_CATEGORY UCLASS_USB +#include #include #include #include diff --git a/drivers/usb/host/usb_bootdev.c b/drivers/usb/host/usb_bootdev.c index 362b46dc466..7fa1c601dff 100644 --- a/drivers/usb/host/usb_bootdev.c +++ b/drivers/usb/host/usb_bootdev.c @@ -6,6 +6,7 @@ * Written by Simon Glass */ +#include #include #include #include diff --git a/drivers/usb/host/xhci-brcm.c b/drivers/usb/host/xhci-brcm.c index 2ffad148dea..fe17924028c 100644 --- a/drivers/usb/host/xhci-brcm.c +++ b/drivers/usb/host/xhci-brcm.c @@ -3,6 +3,7 @@ * Copyright (C) 2019 Broadcom. */ +#include #include #include #include diff --git a/drivers/usb/host/xhci-dwc3.c b/drivers/usb/host/xhci-dwc3.c index e3e0ceff43e..6cebe1cc30c 100644 --- a/drivers/usb/host/xhci-dwc3.c +++ b/drivers/usb/host/xhci-dwc3.c @@ -8,6 +8,7 @@ */ #include +#include #include #include #include diff --git a/drivers/usb/host/xhci-exynos5.c b/drivers/usb/host/xhci-exynos5.c index 6a2d422c4b8..270be934e7f 100644 --- a/drivers/usb/host/xhci-exynos5.c +++ b/drivers/usb/host/xhci-exynos5.c @@ -12,6 +12,7 @@ * exynos5 specific PHY-init sequence. */ +#include #include #include #include diff --git a/drivers/usb/host/xhci-fsl.c b/drivers/usb/host/xhci-fsl.c index 3484ae1d21e..e67e09e31e4 100644 --- a/drivers/usb/host/xhci-fsl.c +++ b/drivers/usb/host/xhci-fsl.c @@ -7,6 +7,7 @@ * Author: Ramneek Mehresh */ +#include #include #include #include diff --git a/drivers/usb/host/xhci-mem.c b/drivers/usb/host/xhci-mem.c index 045b0fba812..72b75306265 100644 --- a/drivers/usb/host/xhci-mem.c +++ b/drivers/usb/host/xhci-mem.c @@ -13,6 +13,7 @@ * Vikas Sajjan */ +#include #include #include #include diff --git a/drivers/usb/host/xhci-mtk.c b/drivers/usb/host/xhci-mtk.c index 7e288f0575b..63dfb793c6b 100644 --- a/drivers/usb/host/xhci-mtk.c +++ b/drivers/usb/host/xhci-mtk.c @@ -5,6 +5,7 @@ */ #include +#include #include #include #include diff --git a/drivers/usb/host/xhci-mvebu.c b/drivers/usb/host/xhci-mvebu.c index 1338b1021c6..46b89de85d1 100644 --- a/drivers/usb/host/xhci-mvebu.c +++ b/drivers/usb/host/xhci-mvebu.c @@ -5,6 +5,7 @@ * MVEBU USB HOST xHCI Controller */ +#include #include #include #include diff --git a/drivers/usb/host/xhci-omap.c b/drivers/usb/host/xhci-omap.c index 66da94c0709..501129d769a 100644 --- a/drivers/usb/host/xhci-omap.c +++ b/drivers/usb/host/xhci-omap.c @@ -8,6 +8,7 @@ * Author: Dan Murphy */ +#include #include #include #include diff --git a/drivers/usb/host/xhci-pci.c b/drivers/usb/host/xhci-pci.c index f6972af7963..11f1c02000a 100644 --- a/drivers/usb/host/xhci-pci.c +++ b/drivers/usb/host/xhci-pci.c @@ -5,6 +5,7 @@ * All rights reserved. */ +#include #include #include #include diff --git a/drivers/usb/host/xhci-rcar.c b/drivers/usb/host/xhci-rcar.c index 38c5928faed..fedcf786929 100644 --- a/drivers/usb/host/xhci-rcar.c +++ b/drivers/usb/host/xhci-rcar.c @@ -5,6 +5,7 @@ * Renesas RCar USB HOST xHCI Controller */ +#include #include #include #include diff --git a/drivers/usb/host/xhci-ring.c b/drivers/usb/host/xhci-ring.c index 1360a5940fa..910c5f3352b 100644 --- a/drivers/usb/host/xhci-ring.c +++ b/drivers/usb/host/xhci-ring.c @@ -13,6 +13,7 @@ * Vikas Sajjan */ +#include #include #include #include diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c index d30725d3fca..741e186ee05 100644 --- a/drivers/usb/host/xhci.c +++ b/drivers/usb/host/xhci.c @@ -19,6 +19,7 @@ * The quirk devices support hasn't been given yet. */ +#include #include #include #include diff --git a/drivers/usb/isp1760/isp1760-hcd.c b/drivers/usb/isp1760/isp1760-hcd.c index 96c483fb9af..a6c4d97aee3 100644 --- a/drivers/usb/isp1760/isp1760-hcd.c +++ b/drivers/usb/isp1760/isp1760-hcd.c @@ -7,6 +7,7 @@ */ #include +#include #include #include #include diff --git a/drivers/usb/isp1760/isp1760-if.c b/drivers/usb/isp1760/isp1760-if.c index 54246b49d5f..c96ab459f93 100644 --- a/drivers/usb/isp1760/isp1760-if.c +++ b/drivers/usb/isp1760/isp1760-if.c @@ -6,6 +6,7 @@ * (c) 2007 Sebastian Siewior */ +#include #include #include #include diff --git a/drivers/usb/isp1760/isp1760-uboot.c b/drivers/usb/isp1760/isp1760-uboot.c index 8dcb7768a2c..203500a4cb7 100644 --- a/drivers/usb/isp1760/isp1760-uboot.c +++ b/drivers/usb/isp1760/isp1760-uboot.c @@ -6,6 +6,7 @@ * */ +#include #include #include #include diff --git a/drivers/usb/mtu3/mtu3_plat.c b/drivers/usb/mtu3/mtu3_plat.c index ca86b58dfcd..b1b22b9357c 100644 --- a/drivers/usb/mtu3/mtu3_plat.c +++ b/drivers/usb/mtu3/mtu3_plat.c @@ -5,6 +5,7 @@ * Author: Chunfeng Yun */ +#include #include #include diff --git a/drivers/usb/musb-new/am35x.c b/drivers/usb/musb-new/am35x.c index 42bc816e4f1..0a52e09e19f 100644 --- a/drivers/usb/musb-new/am35x.c +++ b/drivers/usb/musb-new/am35x.c @@ -24,6 +24,7 @@ #include #else +#include #include #include #include diff --git a/drivers/usb/musb-new/da8xx.c b/drivers/usb/musb-new/da8xx.c index 7caf03cc2e1..68fc0c36146 100644 --- a/drivers/usb/musb-new/da8xx.c +++ b/drivers/usb/musb-new/da8xx.c @@ -13,6 +13,7 @@ * */ +#include #include #include #include diff --git a/drivers/usb/musb-new/mt85xx.c b/drivers/usb/musb-new/mt85xx.c index 14b28bbae6b..1e632dca046 100644 --- a/drivers/usb/musb-new/mt85xx.c +++ b/drivers/usb/musb-new/mt85xx.c @@ -9,6 +9,7 @@ * * This file is part of the Inventra Controller Driver for Linux. */ +#include #include #include #include diff --git a/drivers/usb/musb-new/musb_core.c b/drivers/usb/musb-new/musb_core.c index 257e7685cfa..00da554982f 100644 --- a/drivers/usb/musb-new/musb_core.c +++ b/drivers/usb/musb-new/musb_core.c @@ -79,6 +79,7 @@ #include #include #else +#include #include #include #include diff --git a/drivers/usb/musb-new/musb_dsps.c b/drivers/usb/musb-new/musb_dsps.c index b73f3531ce2..a8ff7434c9f 100644 --- a/drivers/usb/musb-new/musb_dsps.c +++ b/drivers/usb/musb-new/musb_dsps.c @@ -31,6 +31,7 @@ #include #else +#include #include #include #include diff --git a/drivers/usb/musb-new/musb_gadget.c b/drivers/usb/musb-new/musb_gadget.c index 29e225aa0f1..c6083963ede 100644 --- a/drivers/usb/musb-new/musb_gadget.c +++ b/drivers/usb/musb-new/musb_gadget.c @@ -22,6 +22,7 @@ #include #include #else +#include #include #include #include diff --git a/drivers/usb/musb-new/musb_gadget_ep0.c b/drivers/usb/musb-new/musb_gadget_ep0.c index 63eee31a6b3..55ce8de99bb 100644 --- a/drivers/usb/musb-new/musb_gadget_ep0.c +++ b/drivers/usb/musb-new/musb_gadget_ep0.c @@ -18,6 +18,7 @@ #include #include #else +#include #include #include #include diff --git a/drivers/usb/musb-new/musb_host.c b/drivers/usb/musb-new/musb_host.c index 2f2fc7c1359..e5905d90d66 100644 --- a/drivers/usb/musb-new/musb_host.c +++ b/drivers/usb/musb-new/musb_host.c @@ -21,6 +21,7 @@ #include #include #else +#include #include #include #include diff --git a/drivers/usb/musb-new/musb_uboot.c b/drivers/usb/musb-new/musb_uboot.c index 43ab3245e5c..7cea9a2ed65 100644 --- a/drivers/usb/musb-new/musb_uboot.c +++ b/drivers/usb/musb-new/musb_uboot.c @@ -1,3 +1,4 @@ +#include #include #include #include diff --git a/drivers/usb/musb-new/omap2430.c b/drivers/usb/musb-new/omap2430.c index c8dd73050b2..308eff832c9 100644 --- a/drivers/usb/musb-new/omap2430.c +++ b/drivers/usb/musb-new/omap2430.c @@ -8,6 +8,7 @@ * * This file is part of the Inventra Controller Driver for Linux. */ +#include #include #include #include diff --git a/drivers/usb/musb-new/pic32.c b/drivers/usb/musb-new/pic32.c index 0b25e5893b3..4ed5e6e90c6 100644 --- a/drivers/usb/musb-new/pic32.c +++ b/drivers/usb/musb-new/pic32.c @@ -9,6 +9,7 @@ * Based on the dsps "glue layer" code. */ +#include #include #include #include diff --git a/drivers/usb/musb-new/sunxi.c b/drivers/usb/musb-new/sunxi.c index b577ba41878..778b01b22ea 100644 --- a/drivers/usb/musb-new/sunxi.c +++ b/drivers/usb/musb-new/sunxi.c @@ -15,6 +15,7 @@ * * This file is part of the Inventra Controller Driver for Linux. */ +#include #include #include #include diff --git a/drivers/usb/musb-new/ti-musb.c b/drivers/usb/musb-new/ti-musb.c index 76e8b88369e..ed5e5194d8c 100644 --- a/drivers/usb/musb-new/ti-musb.c +++ b/drivers/usb/musb-new/ti-musb.c @@ -5,6 +5,7 @@ * (C) Copyright 2016 * Texas Instruments Incorporated, */ +#include #include #include #include diff --git a/drivers/usb/musb-new/ux500.c b/drivers/usb/musb-new/ux500.c index 6b4ef3c8578..57c7d5630d3 100644 --- a/drivers/usb/musb-new/ux500.c +++ b/drivers/usb/musb-new/ux500.c @@ -1,6 +1,7 @@ // SPDX-License-Identifier: GPL-2.0+ /* Copyright (C) 2019 Stephan Gerhold */ +#include #include #include #include diff --git a/drivers/usb/musb/am35x.c b/drivers/usb/musb/am35x.c index 2c23043d40e..f945f1f5e2c 100644 --- a/drivers/usb/musb/am35x.c +++ b/drivers/usb/musb/am35x.c @@ -9,6 +9,7 @@ * Copyright (c) 2010 Texas Instruments Incorporated */ +#include #include #include "am35x.h" diff --git a/drivers/usb/musb/musb_core.c b/drivers/usb/musb/musb_core.c index 260552e4dbd..9651f074a49 100644 --- a/drivers/usb/musb/musb_core.c +++ b/drivers/usb/musb/musb_core.c @@ -8,6 +8,7 @@ * Author: Thomas Abraham t-abraham@ti.com, Texas Instruments */ +#include #include #include "musb_core.h" diff --git a/drivers/usb/musb/musb_hcd.c b/drivers/usb/musb/musb_hcd.c index c95c6a48281..4676cabae0a 100644 --- a/drivers/usb/musb/musb_hcd.c +++ b/drivers/usb/musb/musb_hcd.c @@ -7,6 +7,7 @@ * Author: Thomas Abraham t-abraham@ti.com, Texas Instruments */ +#include #include #include #include diff --git a/drivers/usb/musb/musb_udc.c b/drivers/usb/musb/musb_udc.c index 696855ee3a6..2ffcb7caaad 100644 --- a/drivers/usb/musb/musb_udc.c +++ b/drivers/usb/musb/musb_udc.c @@ -37,6 +37,7 @@ * ------------------------------------------------------------------------- */ +#include #include #include #include diff --git a/drivers/usb/phy/rockchip_usb2_phy.c b/drivers/usb/phy/rockchip_usb2_phy.c index 9ec5b2d172b..c46ad86d3d6 100644 --- a/drivers/usb/phy/rockchip_usb2_phy.c +++ b/drivers/usb/phy/rockchip_usb2_phy.c @@ -3,6 +3,7 @@ * Copyright 2016 Rockchip Electronics Co., Ltd */ +#include #include #include #include diff --git a/drivers/usb/ulpi/omap-ulpi-viewport.c b/drivers/usb/ulpi/omap-ulpi-viewport.c index 6f0c3eb154e..1b01cd4c559 100644 --- a/drivers/usb/ulpi/omap-ulpi-viewport.c +++ b/drivers/usb/ulpi/omap-ulpi-viewport.c @@ -7,6 +7,7 @@ * Author: Govindraj R */ +#include #include #include #include diff --git a/drivers/usb/ulpi/ulpi-viewport.c b/drivers/usb/ulpi/ulpi-viewport.c index bac20a02f01..55a62808384 100644 --- a/drivers/usb/ulpi/ulpi-viewport.c +++ b/drivers/usb/ulpi/ulpi-viewport.c @@ -13,6 +13,7 @@ * Copyright (C) 2011 Google, Inc. */ +#include #include #include #include diff --git a/drivers/usb/ulpi/ulpi.c b/drivers/usb/ulpi/ulpi.c index 128adcbde13..b5d2c2c2d1c 100644 --- a/drivers/usb/ulpi/ulpi.c +++ b/drivers/usb/ulpi/ulpi.c @@ -19,6 +19,7 @@ * Freescale Semiconductors */ +#include #include #include #include diff --git a/drivers/video/anx9804.c b/drivers/video/anx9804.c index a149e6f5b95..52b5988ba5f 100644 --- a/drivers/video/anx9804.c +++ b/drivers/video/anx9804.c @@ -9,6 +9,7 @@ * interface for driving eDP TFT displays. */ +#include #include #include #include "anx98xx-edp.h" diff --git a/drivers/video/atmel_hlcdfb.c b/drivers/video/atmel_hlcdfb.c index 89bc0eeb680..652ba141801 100644 --- a/drivers/video/atmel_hlcdfb.c +++ b/drivers/video/atmel_hlcdfb.c @@ -5,6 +5,7 @@ * Copyright (C) 2012 Atmel Corporation */ +#include #include #include #include diff --git a/drivers/video/atmel_lcdfb.c b/drivers/video/atmel_lcdfb.c index 281c3a1d663..5a7a54ada70 100644 --- a/drivers/video/atmel_lcdfb.c +++ b/drivers/video/atmel_lcdfb.c @@ -5,6 +5,7 @@ * Copyright (C) 2007 Atmel Corporation */ +#include #include #include #include diff --git a/drivers/video/backlight-uclass.c b/drivers/video/backlight-uclass.c index 2a09b2da910..c14996d003c 100644 --- a/drivers/video/backlight-uclass.c +++ b/drivers/video/backlight-uclass.c @@ -6,6 +6,7 @@ #define LOG_CATEGORY UCLASS_PANEL_BACKLIGHT +#include #include #include diff --git a/drivers/video/backlight_gpio.c b/drivers/video/backlight_gpio.c index b26fa9a8acf..eea824ab5e1 100644 --- a/drivers/video/backlight_gpio.c +++ b/drivers/video/backlight_gpio.c @@ -4,6 +4,7 @@ * Author: Patrick Delaunay */ +#include #include #include #include diff --git a/drivers/video/bcm2835.c b/drivers/video/bcm2835.c index 0c81e606622..63efa762db1 100644 --- a/drivers/video/bcm2835.c +++ b/drivers/video/bcm2835.c @@ -3,6 +3,7 @@ * (C) Copyright 2012 Stephen Warren */ +#include #include #include #include diff --git a/drivers/video/bmp.c b/drivers/video/bmp.c index 291ed36440c..bab6fa7265a 100644 --- a/drivers/video/bmp.c +++ b/drivers/video/bmp.c @@ -8,6 +8,7 @@ * BMP handling routines */ +#include #include #include #include diff --git a/drivers/video/bochs.c b/drivers/video/bochs.c index 00e673a4db0..022ea38d4cf 100644 --- a/drivers/video/bochs.c +++ b/drivers/video/bochs.c @@ -5,6 +5,7 @@ #define LOG_CATEGORY UCLASS_VIDEO +#include #include #include #include diff --git a/drivers/video/bridge/anx6345.c b/drivers/video/bridge/anx6345.c index 8cee4c958bd..93fa25f16e3 100644 --- a/drivers/video/bridge/anx6345.c +++ b/drivers/video/bridge/anx6345.c @@ -3,6 +3,7 @@ * Copyright (C) 2017 Vasily Khoruzhick */ +#include #include #include #include diff --git a/drivers/video/bridge/ps862x.c b/drivers/video/bridge/ps862x.c index efd03752281..d1d22a6e235 100644 --- a/drivers/video/bridge/ps862x.c +++ b/drivers/video/bridge/ps862x.c @@ -4,6 +4,7 @@ * Written by Simon Glass */ +#include #include #include #include diff --git a/drivers/video/bridge/ptn3460.c b/drivers/video/bridge/ptn3460.c index 5851e1ef15e..4760f04108f 100644 --- a/drivers/video/bridge/ptn3460.c +++ b/drivers/video/bridge/ptn3460.c @@ -4,6 +4,7 @@ * Written by Simon Glass */ +#include #include #include #include diff --git a/drivers/video/bridge/ssd2825.c b/drivers/video/bridge/ssd2825.c index f978021c860..f0ef3dafb93 100644 --- a/drivers/video/bridge/ssd2825.c +++ b/drivers/video/bridge/ssd2825.c @@ -3,6 +3,7 @@ * Copyright (c) 2022 Svyatoslav Ryhel */ +#include #include #include #include diff --git a/drivers/video/bridge/video-bridge-uclass.c b/drivers/video/bridge/video-bridge-uclass.c index 2084a2e03ee..f389bc6b147 100644 --- a/drivers/video/bridge/video-bridge-uclass.c +++ b/drivers/video/bridge/video-bridge-uclass.c @@ -6,6 +6,7 @@ #define LOG_CATEGORY UCLASS_VIDEO_BRIDGE +#include #include #include #include diff --git a/drivers/video/broadwell_igd.c b/drivers/video/broadwell_igd.c index a26154ab588..83b6c908a8d 100644 --- a/drivers/video/broadwell_igd.c +++ b/drivers/video/broadwell_igd.c @@ -5,12 +5,12 @@ * Copyright (C) 2016 Google, Inc */ +#include #include #include #include #include #include -#include #include #include #include diff --git a/drivers/video/console_normal.c b/drivers/video/console_normal.c index 6f4194a1814..34ef5a52294 100644 --- a/drivers/video/console_normal.c +++ b/drivers/video/console_normal.c @@ -6,6 +6,7 @@ * (C) Copyright 2023 Dzmitry Sankouski */ +#include #include #include #include diff --git a/drivers/video/console_rotate.c b/drivers/video/console_rotate.c index dc969836274..e4303dfb364 100644 --- a/drivers/video/console_rotate.c +++ b/drivers/video/console_rotate.c @@ -6,6 +6,7 @@ * (C) Copyright 2023 Dzmitry Sankouski */ +#include #include #include #include diff --git a/drivers/video/console_truetype.c b/drivers/video/console_truetype.c index c435162d3f9..28665a32757 100644 --- a/drivers/video/console_truetype.c +++ b/drivers/video/console_truetype.c @@ -3,6 +3,7 @@ * Copyright (c) 2016 Google, Inc */ +#include #include #include #include diff --git a/drivers/video/coreboot.c b/drivers/video/coreboot.c index 9aede262642..5b718ae3e5a 100644 --- a/drivers/video/coreboot.c +++ b/drivers/video/coreboot.c @@ -3,6 +3,7 @@ * Copyright (C) 2016, Bin Meng */ +#include #include #include #include diff --git a/drivers/video/display-uclass.c b/drivers/video/display-uclass.c index 61a73e1bc2a..2da3d1d14e9 100644 --- a/drivers/video/display-uclass.c +++ b/drivers/video/display-uclass.c @@ -5,6 +5,7 @@ #define LOG_CATEGORY UCLASS_DISPLAY +#include #include #include #include diff --git a/drivers/video/dsi-host-uclass.c b/drivers/video/dsi-host-uclass.c index fde275ad7e2..6e5256eb126 100644 --- a/drivers/video/dsi-host-uclass.c +++ b/drivers/video/dsi-host-uclass.c @@ -7,6 +7,7 @@ #define LOG_CATEGORY UCLASS_DSI_HOST +#include #include #include diff --git a/drivers/video/dw_hdmi.c b/drivers/video/dw_hdmi.c index 35559cef229..c217af97878 100644 --- a/drivers/video/dw_hdmi.c +++ b/drivers/video/dw_hdmi.c @@ -5,14 +5,13 @@ * Copyright 2017 Jernej Skrabec */ +#include #include #include #include #include #include -#include #include -#include #include "dw_hdmi.h" struct tmds_n_cts { diff --git a/drivers/video/dw_mipi_dsi.c b/drivers/video/dw_mipi_dsi.c index c74fe678d12..a7e0784596a 100644 --- a/drivers/video/dw_mipi_dsi.c +++ b/drivers/video/dw_mipi_dsi.c @@ -9,6 +9,7 @@ * the Linux Kernel driver drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c. */ +#include #include #include #include diff --git a/drivers/video/efi.c b/drivers/video/efi.c index 78d123fad4b..28ac15ff61b 100644 --- a/drivers/video/efi.c +++ b/drivers/video/efi.c @@ -7,6 +7,7 @@ #define LOG_CATEGORY LOGC_EFI +#include #include #include #include diff --git a/drivers/video/endeavoru-panel.c b/drivers/video/endeavoru-panel.c index d4ba4d8b6da..1bff641434e 100644 --- a/drivers/video/endeavoru-panel.c +++ b/drivers/video/endeavoru-panel.c @@ -3,6 +3,7 @@ * Copyright (c) 2022 Svyatoslav Ryhel */ +#include #include #include #include diff --git a/drivers/video/exynos/exynos_dp.c b/drivers/video/exynos/exynos_dp.c index b0afb2338fb..59838da6c92 100644 --- a/drivers/video/exynos/exynos_dp.c +++ b/drivers/video/exynos/exynos_dp.c @@ -5,6 +5,7 @@ * Author: Donghwa Lee */ +#include #include #include #include diff --git a/drivers/video/exynos/exynos_dp_lowlevel.c b/drivers/video/exynos/exynos_dp_lowlevel.c index f007b319b20..ae500a70280 100644 --- a/drivers/video/exynos/exynos_dp_lowlevel.c +++ b/drivers/video/exynos/exynos_dp_lowlevel.c @@ -6,6 +6,7 @@ */ #include +#include #include #include #include diff --git a/drivers/video/exynos/exynos_fb.c b/drivers/video/exynos/exynos_fb.c index 0407a3f51b0..86970a6d5d2 100644 --- a/drivers/video/exynos/exynos_fb.c +++ b/drivers/video/exynos/exynos_fb.c @@ -7,6 +7,7 @@ */ #include +#include #include #include #include diff --git a/drivers/video/exynos/exynos_mipi_dsi.c b/drivers/video/exynos/exynos_mipi_dsi.c index edeb0a87bbb..804fcd0b248 100644 --- a/drivers/video/exynos/exynos_mipi_dsi.c +++ b/drivers/video/exynos/exynos_mipi_dsi.c @@ -6,6 +6,7 @@ * Author: Donghwa Lee */ +#include #include #include #include diff --git a/drivers/video/exynos/exynos_mipi_dsi_common.c b/drivers/video/exynos/exynos_mipi_dsi_common.c index fc2767adc38..be67cebae7f 100644 --- a/drivers/video/exynos/exynos_mipi_dsi_common.c +++ b/drivers/video/exynos/exynos_mipi_dsi_common.c @@ -6,6 +6,7 @@ * Author: Donghwa Lee */ +#include #include #include #include diff --git a/drivers/video/exynos/exynos_mipi_dsi_lowlevel.c b/drivers/video/exynos/exynos_mipi_dsi_lowlevel.c index 9f18b5da102..8111acd9a0b 100644 --- a/drivers/video/exynos/exynos_mipi_dsi_lowlevel.c +++ b/drivers/video/exynos/exynos_mipi_dsi_lowlevel.c @@ -6,6 +6,7 @@ * Author: Donghwa Lee */ +#include #include #include #include diff --git a/drivers/video/himax-hx8394.c b/drivers/video/himax-hx8394.c index cb7f93e9c99..63637b4db02 100644 --- a/drivers/video/himax-hx8394.c +++ b/drivers/video/himax-hx8394.c @@ -2,6 +2,7 @@ /* * Copyright (C) 2022 Ondrej Jirman */ +#include #include #include #include diff --git a/drivers/video/hitachi_tx18d42vm_lcd.c b/drivers/video/hitachi_tx18d42vm_lcd.c index 68f7b75eef9..95984fe3d3d 100644 --- a/drivers/video/hitachi_tx18d42vm_lcd.c +++ b/drivers/video/hitachi_tx18d42vm_lcd.c @@ -5,6 +5,7 @@ * (C) Copyright 2015 Hans de Goede */ +#include #include #include diff --git a/drivers/video/hx8238d.c b/drivers/video/hx8238d.c index 2491a32810e..6ee97cb4ff3 100644 --- a/drivers/video/hx8238d.c +++ b/drivers/video/hx8238d.c @@ -12,6 +12,7 @@ * */ +#include #include #include #include diff --git a/drivers/video/ihs_video_out.c b/drivers/video/ihs_video_out.c index bf4d4995c36..73b8f4bd1c9 100644 --- a/drivers/video/ihs_video_out.c +++ b/drivers/video/ihs_video_out.c @@ -9,6 +9,7 @@ * Dirk Eibach, Guntermann & Drunck GmbH, dirk.eibach@gdsys.de */ +#include #include #include #include diff --git a/drivers/video/imx/ipu_common.c b/drivers/video/imx/ipu_common.c index d582fb8ad9d..b0a99c9cd5d 100644 --- a/drivers/video/imx/ipu_common.c +++ b/drivers/video/imx/ipu_common.c @@ -11,7 +11,7 @@ */ /* #define DEBUG */ -#include +#include #include #include #include diff --git a/drivers/video/imx/ipu_disp.c b/drivers/video/imx/ipu_disp.c index aaba7d135a4..144322e4e26 100644 --- a/drivers/video/imx/ipu_disp.c +++ b/drivers/video/imx/ipu_disp.c @@ -12,6 +12,7 @@ /* #define DEBUG */ +#include #include #include #include diff --git a/drivers/video/imx/mxc_ipuv3_fb.c b/drivers/video/imx/mxc_ipuv3_fb.c index 039b22086a9..7e60385bcfa 100644 --- a/drivers/video/imx/mxc_ipuv3_fb.c +++ b/drivers/video/imx/mxc_ipuv3_fb.c @@ -10,6 +10,7 @@ * (C) Copyright 2004-2010 Freescale Semiconductor, Inc. */ +#include #include #include #include diff --git a/drivers/video/ivybridge_igd.c b/drivers/video/ivybridge_igd.c index ad688640733..c2cc976618a 100644 --- a/drivers/video/ivybridge_igd.c +++ b/drivers/video/ivybridge_igd.c @@ -3,6 +3,7 @@ * Copyright (C) 2016 Google, Inc */ +#include #include #include #include diff --git a/drivers/video/lm3533_backlight.c b/drivers/video/lm3533_backlight.c index 6b51fa0628e..00297a09b7f 100644 --- a/drivers/video/lm3533_backlight.c +++ b/drivers/video/lm3533_backlight.c @@ -6,6 +6,7 @@ #define LOG_CATEGORY UCLASS_PANEL_BACKLIGHT #include +#include #include #include #include diff --git a/drivers/video/logicore_dp_tx.c b/drivers/video/logicore_dp_tx.c index 643a77a0f4e..624084d38bc 100644 --- a/drivers/video/logicore_dp_tx.c +++ b/drivers/video/logicore_dp_tx.c @@ -9,6 +9,7 @@ * Dirk Eibach, Guntermann & Drunck GmbH, dirk.eibach@gdsys.cc */ +#include #include #include #include diff --git a/drivers/video/mali_dp.c b/drivers/video/mali_dp.c index c8921267462..dbb2f538617 100644 --- a/drivers/video/mali_dp.c +++ b/drivers/video/mali_dp.c @@ -5,6 +5,7 @@ * */ #define DEBUG +#include #include #include #include diff --git a/drivers/video/mcde_simple.c b/drivers/video/mcde_simple.c index 2ba5d0de152..0924ceee309 100644 --- a/drivers/video/mcde_simple.c +++ b/drivers/video/mcde_simple.c @@ -1,6 +1,7 @@ // SPDX-License-Identifier: GPL-2.0+ /* Copyright (C) 2019 Stephan Gerhold */ +#include #include #include #include diff --git a/drivers/video/meson/meson_canvas.c b/drivers/video/meson/meson_canvas.c index dd4c546222d..eccac2f8f24 100644 --- a/drivers/video/meson/meson_canvas.c +++ b/drivers/video/meson/meson_canvas.c @@ -6,6 +6,7 @@ * Author: Neil Armstrong */ +#include #include #include diff --git a/drivers/video/meson/meson_dw_hdmi.c b/drivers/video/meson/meson_dw_hdmi.c index 587df7beb9b..259af1b4571 100644 --- a/drivers/video/meson/meson_dw_hdmi.c +++ b/drivers/video/meson/meson_dw_hdmi.c @@ -4,6 +4,7 @@ * Author: Jorge Ramirez-Ortiz */ +#include #include #include #include diff --git a/drivers/video/meson/meson_plane.c b/drivers/video/meson/meson_plane.c index 899ce22d067..e3f784ecfe4 100644 --- a/drivers/video/meson/meson_plane.c +++ b/drivers/video/meson/meson_plane.c @@ -6,6 +6,7 @@ * Author: Neil Armstrong */ +#include #include #include #include diff --git a/drivers/video/meson/meson_vclk.c b/drivers/video/meson/meson_vclk.c index 4761ff661e4..e718a0074ed 100644 --- a/drivers/video/meson/meson_vclk.c +++ b/drivers/video/meson/meson_vclk.c @@ -6,6 +6,7 @@ * Author: Neil Armstrong */ +#include #include #include #include diff --git a/drivers/video/meson/meson_venc.c b/drivers/video/meson/meson_venc.c index 1bc6aaf7305..e7366dd2fde 100644 --- a/drivers/video/meson/meson_venc.c +++ b/drivers/video/meson/meson_venc.c @@ -6,6 +6,7 @@ * Author: Neil Armstrong */ +#include #include #include #include diff --git a/drivers/video/meson/meson_vpu.c b/drivers/video/meson/meson_vpu.c index ca627728743..67d4ce7b3b4 100644 --- a/drivers/video/meson/meson_vpu.c +++ b/drivers/video/meson/meson_vpu.c @@ -6,6 +6,7 @@ * Author: Neil Armstrong */ +#include #include #include #include diff --git a/drivers/video/meson/meson_vpu_init.c b/drivers/video/meson/meson_vpu_init.c index 0e34cefd100..c9808e1c631 100644 --- a/drivers/video/meson/meson_vpu_init.c +++ b/drivers/video/meson/meson_vpu_init.c @@ -8,6 +8,7 @@ #define DEBUG +#include #include #include #include diff --git a/drivers/video/mipi_dsi.c b/drivers/video/mipi_dsi.c index dc949c8ae61..ecacea1dbeb 100644 --- a/drivers/video/mipi_dsi.c +++ b/drivers/video/mipi_dsi.c @@ -32,6 +32,7 @@ * */ +#include #include #include #include diff --git a/drivers/video/mvebu_lcd.c b/drivers/video/mvebu_lcd.c index 3fc5640b71e..d3d07e5f833 100644 --- a/drivers/video/mvebu_lcd.c +++ b/drivers/video/mvebu_lcd.c @@ -5,6 +5,7 @@ * Initialization of LCD interface and setup of SPLASH screen image */ +#include #include #include #include diff --git a/drivers/video/mxsfb.c b/drivers/video/mxsfb.c index 792d6314d15..515363f6a49 100644 --- a/drivers/video/mxsfb.c +++ b/drivers/video/mxsfb.c @@ -4,6 +4,7 @@ * * Copyright (C) 2011-2013 Marek Vasut */ +#include #include #include #include diff --git a/drivers/video/nexell/s5pxx18_dp.c b/drivers/video/nexell/s5pxx18_dp.c index 16a489b88dc..2248f479057 100644 --- a/drivers/video/nexell/s5pxx18_dp.c +++ b/drivers/video/nexell/s5pxx18_dp.c @@ -6,6 +6,7 @@ */ #include +#include #include #include #include diff --git a/drivers/video/nexell/s5pxx18_dp_hdmi.c b/drivers/video/nexell/s5pxx18_dp_hdmi.c index 109d9f28bb0..3f1fb8a5757 100644 --- a/drivers/video/nexell/s5pxx18_dp_hdmi.c +++ b/drivers/video/nexell/s5pxx18_dp_hdmi.c @@ -6,6 +6,7 @@ */ #include +#include #include #include diff --git a/drivers/video/nexell/s5pxx18_dp_lvds.c b/drivers/video/nexell/s5pxx18_dp_lvds.c index 5db8d2b73b1..f8ea63fdf1b 100644 --- a/drivers/video/nexell/s5pxx18_dp_lvds.c +++ b/drivers/video/nexell/s5pxx18_dp_lvds.c @@ -6,8 +6,8 @@ */ #include +#include #include -#include #include #include diff --git a/drivers/video/nexell/s5pxx18_dp_mipi.c b/drivers/video/nexell/s5pxx18_dp_mipi.c index 58493a82598..670272b2680 100644 --- a/drivers/video/nexell/s5pxx18_dp_mipi.c +++ b/drivers/video/nexell/s5pxx18_dp_mipi.c @@ -6,6 +6,7 @@ */ #include +#include #include #include diff --git a/drivers/video/nexell/s5pxx18_dp_rgb.c b/drivers/video/nexell/s5pxx18_dp_rgb.c index 6abb8b5e216..44e8edb02a2 100644 --- a/drivers/video/nexell/s5pxx18_dp_rgb.c +++ b/drivers/video/nexell/s5pxx18_dp_rgb.c @@ -6,8 +6,8 @@ */ #include +#include #include -#include #include diff --git a/drivers/video/nexell/soc/s5pxx18_soc_disptop.h b/drivers/video/nexell/soc/s5pxx18_soc_disptop.h index 4ad353256eb..c7bf5043e60 100644 --- a/drivers/video/nexell/soc/s5pxx18_soc_disptop.h +++ b/drivers/video/nexell/soc/s5pxx18_soc_disptop.h @@ -8,7 +8,6 @@ #ifndef _S5PXX18_SOC_DISPTOP_H_ #define _S5PXX18_SOC_DISPTOP_H_ -#include #include "s5pxx18_soc_disptype.h" #define NUMBER_OF_DISPTOP_MODULE 1 diff --git a/drivers/video/nexell_display.c b/drivers/video/nexell_display.c index 7bda33fb16e..af2698ffca8 100644 --- a/drivers/video/nexell_display.c +++ b/drivers/video/nexell_display.c @@ -8,6 +8,7 @@ */ #include +#include #include #include #include diff --git a/drivers/video/omap3_dss.c b/drivers/video/omap3_dss.c index 0b7ce348d5a..432b16bfbfe 100644 --- a/drivers/video/omap3_dss.c +++ b/drivers/video/omap3_dss.c @@ -25,6 +25,7 @@ * MA 02111-1307 USA */ +#include #include #include diff --git a/drivers/video/orisetech_otm8009a.c b/drivers/video/orisetech_otm8009a.c index a29e909decc..848f174b6e4 100644 --- a/drivers/video/orisetech_otm8009a.c +++ b/drivers/video/orisetech_otm8009a.c @@ -7,6 +7,7 @@ * This otm8009a panel driver is inspired from the Linux Kernel driver * drivers/gpu/drm/panel/panel-orisetech-otm8009a.c. */ +#include #include #include #include diff --git a/drivers/video/panel-uclass.c b/drivers/video/panel-uclass.c index 52a3466dc8c..1f7e20e0b50 100644 --- a/drivers/video/panel-uclass.c +++ b/drivers/video/panel-uclass.c @@ -6,6 +6,7 @@ #define LOG_CATEGORY UCLASS_PANEL +#include #include #include diff --git a/drivers/video/pwm_backlight.c b/drivers/video/pwm_backlight.c index a4576c888cf..1c747d98d7a 100644 --- a/drivers/video/pwm_backlight.c +++ b/drivers/video/pwm_backlight.c @@ -6,6 +6,7 @@ #define LOG_CATEGORY UCLASS_PANEL_BACKLIGHT +#include #include #include #include diff --git a/drivers/video/raydium-rm68200.c b/drivers/video/raydium-rm68200.c index b8662ca22bf..f1fce55a2cb 100644 --- a/drivers/video/raydium-rm68200.c +++ b/drivers/video/raydium-rm68200.c @@ -7,6 +7,7 @@ * This rm68200 panel driver is inspired from the Linux Kernel driver * drivers/gpu/drm/panel/panel-raydium-rm68200.c. */ +#include #include #include #include diff --git a/drivers/video/renesas-r61307.c b/drivers/video/renesas-r61307.c index a3697bce5ee..3f5859055c9 100644 --- a/drivers/video/renesas-r61307.c +++ b/drivers/video/renesas-r61307.c @@ -5,6 +5,7 @@ * Copyright (c) 2022 Svyatoslav Ryhel */ +#include #include #include #include diff --git a/drivers/video/renesas-r69328.c b/drivers/video/renesas-r69328.c index 9861c3fef11..082f5bc3d0a 100644 --- a/drivers/video/renesas-r69328.c +++ b/drivers/video/renesas-r69328.c @@ -5,6 +5,7 @@ * Copyright (c) 2022 Svyatoslav Ryhel */ +#include #include #include #include diff --git a/drivers/video/rockchip/dw_mipi_dsi_rockchip.c b/drivers/video/rockchip/dw_mipi_dsi_rockchip.c index fa512173510..fb784636e87 100644 --- a/drivers/video/rockchip/dw_mipi_dsi_rockchip.c +++ b/drivers/video/rockchip/dw_mipi_dsi_rockchip.c @@ -24,6 +24,7 @@ #include #include +#include #include #include #include diff --git a/drivers/video/rockchip/rk3288_hdmi.c b/drivers/video/rockchip/rk3288_hdmi.c index 3d39f31a5ad..efa87540340 100644 --- a/drivers/video/rockchip/rk3288_hdmi.c +++ b/drivers/video/rockchip/rk3288_hdmi.c @@ -3,6 +3,7 @@ * Copyright (c) 2017 Theobroma Systems Design und Consulting GmbH */ +#include #include #include #include diff --git a/drivers/video/rockchip/rk3288_mipi.c b/drivers/video/rockchip/rk3288_mipi.c index 850fe310754..9d42119c826 100644 --- a/drivers/video/rockchip/rk3288_mipi.c +++ b/drivers/video/rockchip/rk3288_mipi.c @@ -4,6 +4,7 @@ * Author: Eric Gao */ +#include #include #include #include diff --git a/drivers/video/rockchip/rk3288_vop.c b/drivers/video/rockchip/rk3288_vop.c index 282831eaac4..a4683852ea0 100644 --- a/drivers/video/rockchip/rk3288_vop.c +++ b/drivers/video/rockchip/rk3288_vop.c @@ -5,6 +5,7 @@ * Copyright 2014 Rockchip Inc. */ +#include #include #include #include diff --git a/drivers/video/rockchip/rk3399_hdmi.c b/drivers/video/rockchip/rk3399_hdmi.c index c7630ccf555..5f3f5d26886 100644 --- a/drivers/video/rockchip/rk3399_hdmi.c +++ b/drivers/video/rockchip/rk3399_hdmi.c @@ -3,6 +3,7 @@ * Copyright (c) 2017 Theobroma Systems Design und Consulting GmbH */ +#include #include #include #include diff --git a/drivers/video/rockchip/rk3399_mipi.c b/drivers/video/rockchip/rk3399_mipi.c index 57e36eed6a9..b62d8086674 100644 --- a/drivers/video/rockchip/rk3399_mipi.c +++ b/drivers/video/rockchip/rk3399_mipi.c @@ -4,6 +4,7 @@ * Author: Eric Gao */ +#include #include #include #include diff --git a/drivers/video/rockchip/rk3399_vop.c b/drivers/video/rockchip/rk3399_vop.c index 17e1601e814..cb589c7537e 100644 --- a/drivers/video/rockchip/rk3399_vop.c +++ b/drivers/video/rockchip/rk3399_vop.c @@ -5,6 +5,7 @@ * Copyright 2014 Rockchip Inc. */ +#include #include #include #include diff --git a/drivers/video/rockchip/rk_edp.c b/drivers/video/rockchip/rk_edp.c index eb881ba4b0e..5f68a610e4a 100644 --- a/drivers/video/rockchip/rk_edp.c +++ b/drivers/video/rockchip/rk_edp.c @@ -4,6 +4,7 @@ * Copyright 2014 Rockchip Inc. */ +#include #include #include #include diff --git a/drivers/video/rockchip/rk_hdmi.c b/drivers/video/rockchip/rk_hdmi.c index 0ac0a3a1ecd..d31f6a4ff81 100644 --- a/drivers/video/rockchip/rk_hdmi.c +++ b/drivers/video/rockchip/rk_hdmi.c @@ -5,6 +5,7 @@ * Copyright 2014 Rockchip Inc. */ +#include #include #include #include diff --git a/drivers/video/rockchip/rk_lvds.c b/drivers/video/rockchip/rk_lvds.c index c969dae30b6..d0a015e31ee 100644 --- a/drivers/video/rockchip/rk_lvds.c +++ b/drivers/video/rockchip/rk_lvds.c @@ -3,6 +3,7 @@ * Copyright 2016 Rockchip Inc. */ +#include #include #include #include diff --git a/drivers/video/rockchip/rk_mipi.c b/drivers/video/rockchip/rk_mipi.c index 0a603083ba9..f14cbc6dbf7 100644 --- a/drivers/video/rockchip/rk_mipi.c +++ b/drivers/video/rockchip/rk_mipi.c @@ -4,6 +4,7 @@ * Author: Eric Gao */ +#include #include #include #include diff --git a/drivers/video/rockchip/rk_vop.c b/drivers/video/rockchip/rk_vop.c index 17dfe62c9da..acc02e5d7c7 100644 --- a/drivers/video/rockchip/rk_vop.c +++ b/drivers/video/rockchip/rk_vop.c @@ -4,6 +4,7 @@ * Copyright 2014 Rockchip Inc. */ +#include #include #include #include diff --git a/drivers/video/sandbox_dsi_host.c b/drivers/video/sandbox_dsi_host.c index 7025ac986e3..c84a27ee3be 100644 --- a/drivers/video/sandbox_dsi_host.c +++ b/drivers/video/sandbox_dsi_host.c @@ -3,6 +3,7 @@ * Copyright (C) 2019, STMicroelectronics - All Rights Reserved */ +#include #include #include #include diff --git a/drivers/video/sandbox_osd.c b/drivers/video/sandbox_osd.c index bedc32b7c80..2a854d3958b 100644 --- a/drivers/video/sandbox_osd.c +++ b/drivers/video/sandbox_osd.c @@ -3,6 +3,7 @@ * (C) Copyright 2018 * Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc */ +#include #include #include #include diff --git a/drivers/video/sandbox_sdl.c b/drivers/video/sandbox_sdl.c index 69dfa930273..9081c7da62e 100644 --- a/drivers/video/sandbox_sdl.c +++ b/drivers/video/sandbox_sdl.c @@ -3,6 +3,7 @@ * Copyright (c) 2013 Google, Inc */ +#include #include #include #include diff --git a/drivers/video/seps525.c b/drivers/video/seps525.c index 86cd301c4b9..74c8721e1e1 100644 --- a/drivers/video/seps525.c +++ b/drivers/video/seps525.c @@ -6,6 +6,7 @@ * Copyright (C) 2020 Xilinx Inc. */ +#include #include #include #include diff --git a/drivers/video/simple_panel.c b/drivers/video/simple_panel.c index b6c5b058b2e..76a30427a59 100644 --- a/drivers/video/simple_panel.c +++ b/drivers/video/simple_panel.c @@ -4,6 +4,7 @@ * Written by Simon Glass */ +#include #include #include #include diff --git a/drivers/video/simplefb.c b/drivers/video/simplefb.c index cb518b149cb..33bb78bc3a3 100644 --- a/drivers/video/simplefb.c +++ b/drivers/video/simplefb.c @@ -3,6 +3,7 @@ * (C) Copyright 2017 Rob Clark */ +#include #include #include #include diff --git a/drivers/video/ssd2828.c b/drivers/video/ssd2828.c index 4334bbd7235..948f5e74d0f 100644 --- a/drivers/video/ssd2828.c +++ b/drivers/video/ssd2828.c @@ -9,6 +9,7 @@ * interface for driving a MIPI compatible TFT display. */ +#include #include #include #include diff --git a/drivers/video/stm32/stm32_dsi.c b/drivers/video/stm32/stm32_dsi.c index 438ed41e8d5..a18c1e027a8 100644 --- a/drivers/video/stm32/stm32_dsi.c +++ b/drivers/video/stm32/stm32_dsi.c @@ -10,6 +10,7 @@ #define LOG_CATEGORY UCLASS_VIDEO_BRIDGE +#include #include #include #include diff --git a/drivers/video/stm32/stm32_ltdc.c b/drivers/video/stm32/stm32_ltdc.c index 0a062c8939d..4f60ba8ebee 100644 --- a/drivers/video/stm32/stm32_ltdc.c +++ b/drivers/video/stm32/stm32_ltdc.c @@ -7,6 +7,7 @@ #define LOG_CATEGORY UCLASS_VIDEO +#include #include #include #include diff --git a/drivers/video/sunxi/lcdc.c b/drivers/video/sunxi/lcdc.c index 264d775c125..73033c3b858 100644 --- a/drivers/video/sunxi/lcdc.c +++ b/drivers/video/sunxi/lcdc.c @@ -7,6 +7,7 @@ * (C) Copyright 2017 Jernej Skrabec */ +#include #include #include diff --git a/drivers/video/sunxi/sunxi_de2.c b/drivers/video/sunxi/sunxi_de2.c index 154641b9a69..e02d359cd25 100644 --- a/drivers/video/sunxi/sunxi_de2.c +++ b/drivers/video/sunxi/sunxi_de2.c @@ -5,6 +5,7 @@ * (C) Copyright 2017 Jernej Skrabec */ +#include #include #include #include diff --git a/drivers/video/sunxi/sunxi_display.c b/drivers/video/sunxi/sunxi_display.c index 4a6a89ef9d2..8da44a1bb6d 100644 --- a/drivers/video/sunxi/sunxi_display.c +++ b/drivers/video/sunxi/sunxi_display.c @@ -6,7 +6,7 @@ * (C) Copyright 2014-2015 Hans de Goede */ -#include +#include #include #include #include diff --git a/drivers/video/sunxi/sunxi_dw_hdmi.c b/drivers/video/sunxi/sunxi_dw_hdmi.c index b9c03ea0386..a5e8d39e98f 100644 --- a/drivers/video/sunxi/sunxi_dw_hdmi.c +++ b/drivers/video/sunxi/sunxi_dw_hdmi.c @@ -6,6 +6,7 @@ */ #include +#include #include #include #include diff --git a/drivers/video/sunxi/sunxi_lcd.c b/drivers/video/sunxi/sunxi_lcd.c index 953233fcd68..7a01cc343ca 100644 --- a/drivers/video/sunxi/sunxi_lcd.c +++ b/drivers/video/sunxi/sunxi_lcd.c @@ -5,6 +5,7 @@ * (C) Copyright 2017 Vasily Khoruzhick */ +#include #include #include #include diff --git a/drivers/video/sunxi/tve_common.c b/drivers/video/sunxi/tve_common.c index 7bc2b3b2909..35251371d14 100644 --- a/drivers/video/sunxi/tve_common.c +++ b/drivers/video/sunxi/tve_common.c @@ -7,6 +7,7 @@ * (C) Copyright 2017 Jernej Skrabec */ +#include #include #include diff --git a/drivers/video/tda19988.c b/drivers/video/tda19988.c index ebc8521c6ed..24487439045 100644 --- a/drivers/video/tda19988.c +++ b/drivers/video/tda19988.c @@ -5,6 +5,7 @@ * Based on the Linux driver, (C) 2012 Texas Instruments */ +#include #include #include #include diff --git a/drivers/video/tdo-tl070wsh30.c b/drivers/video/tdo-tl070wsh30.c index d772958f46e..273672db024 100644 --- a/drivers/video/tdo-tl070wsh30.c +++ b/drivers/video/tdo-tl070wsh30.c @@ -3,6 +3,7 @@ * Copyright (C) 2020 BayLibre, SAS * Author: Neil Armstrong */ +#include #include #include #include diff --git a/drivers/video/tegra124/display.c b/drivers/video/tegra124/display.c index abe31e27d84..9261cc9384a 100644 --- a/drivers/video/tegra124/display.c +++ b/drivers/video/tegra124/display.c @@ -5,6 +5,7 @@ * Extracted from Chromium coreboot commit 3f59b13d */ +#include #include #include #include @@ -13,7 +14,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/video/tegra124/dp.c b/drivers/video/tegra124/dp.c index 763f7ee39fc..b27b1633bab 100644 --- a/drivers/video/tegra124/dp.c +++ b/drivers/video/tegra124/dp.c @@ -4,12 +4,12 @@ * Copyright 2014 Google Inc. */ +#include #include #include #include #include #include -#include #include #include #include diff --git a/drivers/video/tegra124/sor.c b/drivers/video/tegra124/sor.c index 1ce5330c6bc..258685182c7 100644 --- a/drivers/video/tegra124/sor.c +++ b/drivers/video/tegra124/sor.c @@ -3,6 +3,7 @@ * Copyright (c) 2011-2013, NVIDIA Corporation. */ +#include #include #include #include diff --git a/drivers/video/tegra20/mipi-phy.c b/drivers/video/tegra20/mipi-phy.c index 576262e405d..c3ebc4074b5 100644 --- a/drivers/video/tegra20/mipi-phy.c +++ b/drivers/video/tegra20/mipi-phy.c @@ -3,6 +3,7 @@ * Copyright (C) 2013 NVIDIA Corporation */ +#include #include #include "mipi-phy.h" diff --git a/drivers/video/tegra20/tegra-dsi.c b/drivers/video/tegra20/tegra-dsi.c index 35a8e6c176b..13dae37806f 100644 --- a/drivers/video/tegra20/tegra-dsi.c +++ b/drivers/video/tegra20/tegra-dsi.c @@ -4,6 +4,7 @@ * Copyright (c) 2022 Svyatoslav Ryhel */ +#include #include #include #include diff --git a/drivers/video/tegra20/tegra-pwm-backlight.c b/drivers/video/tegra20/tegra-pwm-backlight.c index 79d8a021a3a..5f93f57fe90 100644 --- a/drivers/video/tegra20/tegra-pwm-backlight.c +++ b/drivers/video/tegra20/tegra-pwm-backlight.c @@ -6,6 +6,7 @@ #define LOG_CATEGORY UCLASS_PANEL_BACKLIGHT #include +#include #include #include #include diff --git a/drivers/video/ti/tilcdc-panel.c b/drivers/video/ti/tilcdc-panel.c index d4076523060..df95086a515 100644 --- a/drivers/video/ti/tilcdc-panel.c +++ b/drivers/video/ti/tilcdc-panel.c @@ -5,6 +5,7 @@ * Copyright (C) 2020 Dario Binacchi */ +#include #include #include #include diff --git a/drivers/video/ti/tilcdc.c b/drivers/video/ti/tilcdc.c index 493e2f18cd2..2734754ecde 100644 --- a/drivers/video/ti/tilcdc.c +++ b/drivers/video/ti/tilcdc.c @@ -3,6 +3,7 @@ * Copyright (C) 2020 Dario Binacchi */ +#include #include #include #include diff --git a/drivers/video/tidss/tidss_drv.c b/drivers/video/tidss/tidss_drv.c index 865d4bddb7f..1380c6b6937 100644 --- a/drivers/video/tidss/tidss_drv.c +++ b/drivers/video/tidss/tidss_drv.c @@ -9,6 +9,7 @@ * Author: Tomi Valkeinen */ +#include #include #include #include diff --git a/drivers/video/vesa.c b/drivers/video/vesa.c index ab756ac8ea1..50912c5c8bc 100644 --- a/drivers/video/vesa.c +++ b/drivers/video/vesa.c @@ -3,6 +3,7 @@ * Copyright (C) 2016, Bin Meng */ +#include #include #include #include diff --git a/drivers/video/vidconsole-uclass.c b/drivers/video/vidconsole-uclass.c index 80e7adf6a1a..5d06e51ff23 100644 --- a/drivers/video/vidconsole-uclass.c +++ b/drivers/video/vidconsole-uclass.c @@ -9,6 +9,7 @@ #define LOG_CATEGORY UCLASS_VIDEO_CONSOLE +#include #include #include #include diff --git a/drivers/video/video-uclass.c b/drivers/video/video-uclass.c index ff1382f4a43..7b5d1dfbb3b 100644 --- a/drivers/video/video-uclass.c +++ b/drivers/video/video-uclass.c @@ -5,6 +5,7 @@ #define LOG_CATEGORY UCLASS_VIDEO +#include #include #include #include diff --git a/drivers/video/video_bmp.c b/drivers/video/video_bmp.c index ad512d99a1b..45f003c8251 100644 --- a/drivers/video/video_bmp.c +++ b/drivers/video/video_bmp.c @@ -3,6 +3,7 @@ * Copyright (c) 2015 Google, Inc */ +#include #include #include #include diff --git a/drivers/video/video_osd-uclass.c b/drivers/video/video_osd-uclass.c index 923686345ff..0d3aae4d827 100644 --- a/drivers/video/video_osd-uclass.c +++ b/drivers/video/video_osd-uclass.c @@ -6,6 +6,7 @@ #define LOG_CATEGORY UCLASS_VIDEO_OSD +#include #include #include diff --git a/drivers/video/videomodes.c b/drivers/video/videomodes.c index d86d8679841..35955a5df7d 100644 --- a/drivers/video/videomodes.c +++ b/drivers/video/videomodes.c @@ -55,6 +55,7 @@ "myvideo" and setting the variable "videomode=myvideo".. ****************************************************************************/ +#include #include #include #include diff --git a/drivers/video/zynqmp/zynqmp_dpsub.c b/drivers/video/zynqmp/zynqmp_dpsub.c index 1405b29cb8b..def4dcf6261 100644 --- a/drivers/video/zynqmp/zynqmp_dpsub.c +++ b/drivers/video/zynqmp/zynqmp_dpsub.c @@ -6,6 +6,7 @@ * Xilinx displayport(DP) Tx Subsytem driver */ +#include #include #include #include diff --git a/drivers/virtio/virtio-uclass.c b/drivers/virtio/virtio-uclass.c index 1dbc1a56aa2..c5420162735 100644 --- a/drivers/virtio/virtio-uclass.c +++ b/drivers/virtio/virtio-uclass.c @@ -17,6 +17,7 @@ #define LOG_CATEGORY UCLASS_VIRTIO +#include #include #include #include diff --git a/drivers/virtio/virtio_blk.c b/drivers/virtio/virtio_blk.c index 3404f61eba5..95810582867 100644 --- a/drivers/virtio/virtio_blk.c +++ b/drivers/virtio/virtio_blk.c @@ -6,6 +6,7 @@ #define LOG_CATEGORY UCLASS_VIRTIO +#include #include #include #include diff --git a/drivers/virtio/virtio_mmio.c b/drivers/virtio/virtio_mmio.c index 1cd737aca24..78c15c821b4 100644 --- a/drivers/virtio/virtio_mmio.c +++ b/drivers/virtio/virtio_mmio.c @@ -7,6 +7,7 @@ * Ported from Linux drivers/virtio/virtio_mmio.c */ +#include #include #include #include diff --git a/drivers/virtio/virtio_net.c b/drivers/virtio/virtio_net.c index 0e5367a085e..1794f73a8de 100644 --- a/drivers/virtio/virtio_net.c +++ b/drivers/virtio/virtio_net.c @@ -4,6 +4,7 @@ * Copyright (C) 2018, Bin Meng */ +#include #include #include #include diff --git a/drivers/virtio/virtio_pci_legacy.c b/drivers/virtio/virtio_pci_legacy.c index 15f8c6e7d25..aa89604ae84 100644 --- a/drivers/virtio/virtio_pci_legacy.c +++ b/drivers/virtio/virtio_pci_legacy.c @@ -6,6 +6,7 @@ * Ported from Linux drivers/virtio/virtio_pci*.c */ +#include #include #include #include diff --git a/drivers/virtio/virtio_pci_modern.c b/drivers/virtio/virtio_pci_modern.c index 5850e0c18c6..3cdc2d2d6fd 100644 --- a/drivers/virtio/virtio_pci_modern.c +++ b/drivers/virtio/virtio_pci_modern.c @@ -6,6 +6,7 @@ * Ported from Linux drivers/virtio/virtio_pci*.c */ +#include #include #include #include diff --git a/drivers/virtio/virtio_ring.c b/drivers/virtio/virtio_ring.c index 306fa5b3f68..c9adcce5c09 100644 --- a/drivers/virtio/virtio_ring.c +++ b/drivers/virtio/virtio_ring.c @@ -7,6 +7,7 @@ */ #include +#include #include #include #include diff --git a/drivers/virtio/virtio_rng.c b/drivers/virtio/virtio_rng.c index 90a371a59cc..786359a6e36 100644 --- a/drivers/virtio/virtio_rng.c +++ b/drivers/virtio/virtio_rng.c @@ -3,6 +3,7 @@ * Copyright (c) 2019, Linaro Limited */ +#include #include #include #include diff --git a/drivers/virtio/virtio_sandbox.c b/drivers/virtio/virtio_sandbox.c index 0f1ebef22e5..b34f1d60455 100644 --- a/drivers/virtio/virtio_sandbox.c +++ b/drivers/virtio/virtio_sandbox.c @@ -5,6 +5,7 @@ * VirtIO Sandbox transport driver, for testing purpose only */ +#include #include #include #include diff --git a/drivers/w1-eeprom/ds24xxx.c b/drivers/w1-eeprom/ds24xxx.c index 413d8bc5881..4be378b43d0 100644 --- a/drivers/w1-eeprom/ds24xxx.c +++ b/drivers/w1-eeprom/ds24xxx.c @@ -7,6 +7,7 @@ * */ +#include #include #include #include diff --git a/drivers/w1-eeprom/ds2502.c b/drivers/w1-eeprom/ds2502.c index db9f41e9726..a67f5edd0fe 100644 --- a/drivers/w1-eeprom/ds2502.c +++ b/drivers/w1-eeprom/ds2502.c @@ -20,6 +20,7 @@ * Martin Fuzzey */ +#include #include #include #include diff --git a/drivers/w1-eeprom/eep_sandbox.c b/drivers/w1-eeprom/eep_sandbox.c index 2a69ca27de7..27c7f9f1b6b 100644 --- a/drivers/w1-eeprom/eep_sandbox.c +++ b/drivers/w1-eeprom/eep_sandbox.c @@ -4,6 +4,7 @@ * */ +#include #include #include #include diff --git a/drivers/w1-eeprom/w1-eeprom-uclass.c b/drivers/w1-eeprom/w1-eeprom-uclass.c index 3919aad3c8a..70ba537243f 100644 --- a/drivers/w1-eeprom/w1-eeprom-uclass.c +++ b/drivers/w1-eeprom/w1-eeprom-uclass.c @@ -12,6 +12,7 @@ #define LOG_CATEGORY UCLASS_W1_EEPROM +#include #include #include #include diff --git a/drivers/w1/mxc_w1.c b/drivers/w1/mxc_w1.c index 9ebfc13c83a..b96c1a00bf2 100644 --- a/drivers/w1/mxc_w1.c +++ b/drivers/w1/mxc_w1.c @@ -17,6 +17,7 @@ * Martin Fuzzey */ +#include #include #include #include diff --git a/drivers/w1/w1-gpio.c b/drivers/w1/w1-gpio.c index 759f94e224e..9346f810ce1 100644 --- a/drivers/w1/w1-gpio.c +++ b/drivers/w1/w1-gpio.c @@ -7,6 +7,7 @@ * */ +#include #include #include #include diff --git a/drivers/w1/w1-uclass.c b/drivers/w1/w1-uclass.c index 9637ed24257..a4247ecd623 100644 --- a/drivers/w1/w1-uclass.c +++ b/drivers/w1/w1-uclass.c @@ -14,6 +14,7 @@ #define LOG_CATEGORY UCLASS_W1 +#include #include #include #include diff --git a/drivers/watchdog/armada-37xx-wdt.c b/drivers/watchdog/armada-37xx-wdt.c index 4b51178e1b8..e09f5ac9e34 100644 --- a/drivers/watchdog/armada-37xx-wdt.c +++ b/drivers/watchdog/armada-37xx-wdt.c @@ -5,6 +5,7 @@ * Marek Behún */ +#include #include #include #include diff --git a/drivers/watchdog/ast2600_wdt.c b/drivers/watchdog/ast2600_wdt.c index 190490f3692..bc9842089be 100644 --- a/drivers/watchdog/ast2600_wdt.c +++ b/drivers/watchdog/ast2600_wdt.c @@ -3,6 +3,7 @@ * Copyright (c) 2020 Aspeed Technology, Inc */ +#include #include #include #include diff --git a/drivers/watchdog/ast_wdt.c b/drivers/watchdog/ast_wdt.c index e61e13fdc49..f7b5a1adc10 100644 --- a/drivers/watchdog/ast_wdt.c +++ b/drivers/watchdog/ast_wdt.c @@ -3,6 +3,7 @@ * Copyright 2017 Google, Inc */ +#include #include #include #include diff --git a/drivers/watchdog/at91sam9_wdt.c b/drivers/watchdog/at91sam9_wdt.c index c809a8936b8..647ae325e9a 100644 --- a/drivers/watchdog/at91sam9_wdt.c +++ b/drivers/watchdog/at91sam9_wdt.c @@ -18,6 +18,7 @@ #include #include #include +#include #include #include #include diff --git a/drivers/watchdog/bcm6345_wdt.c b/drivers/watchdog/bcm6345_wdt.c index 6ebe901c2b8..677b1347ca7 100644 --- a/drivers/watchdog/bcm6345_wdt.c +++ b/drivers/watchdog/bcm6345_wdt.c @@ -7,6 +7,7 @@ * Copyright (C) 2008 Florian Fainelli */ +#include #include #include #include diff --git a/drivers/watchdog/cdns_wdt.c b/drivers/watchdog/cdns_wdt.c index cb5a786c589..743ab6487bc 100644 --- a/drivers/watchdog/cdns_wdt.c +++ b/drivers/watchdog/cdns_wdt.c @@ -6,6 +6,7 @@ * Author(s): Shreenidhi Shedi */ +#include #include #include #include diff --git a/drivers/watchdog/cortina_wdt.c b/drivers/watchdog/cortina_wdt.c index 9f09ac0e15f..7ab9d7b2db9 100644 --- a/drivers/watchdog/cortina_wdt.c +++ b/drivers/watchdog/cortina_wdt.c @@ -4,6 +4,7 @@ * */ +#include #include #include #include diff --git a/drivers/watchdog/designware_wdt.c b/drivers/watchdog/designware_wdt.c index bd9d7105366..b22e0ee06a4 100644 --- a/drivers/watchdog/designware_wdt.c +++ b/drivers/watchdog/designware_wdt.c @@ -4,6 +4,7 @@ */ #include +#include #include #include #include diff --git a/drivers/watchdog/ftwdt010_wdt.c b/drivers/watchdog/ftwdt010_wdt.c index 4769b967e52..1f5f301b125 100644 --- a/drivers/watchdog/ftwdt010_wdt.c +++ b/drivers/watchdog/ftwdt010_wdt.c @@ -14,6 +14,7 @@ * 22/08/2022 Port to DM */ +#include #include #include #include diff --git a/drivers/watchdog/imx_watchdog.c b/drivers/watchdog/imx_watchdog.c index ea770217e59..894158b304a 100644 --- a/drivers/watchdog/imx_watchdog.c +++ b/drivers/watchdog/imx_watchdog.c @@ -4,6 +4,7 @@ * Licensed under the GPL-2 or later. */ +#include #include #include #include diff --git a/drivers/watchdog/mcf_wdt.c b/drivers/watchdog/mcf_wdt.c index 5092a256af0..b36488bb5b9 100644 --- a/drivers/watchdog/mcf_wdt.c +++ b/drivers/watchdog/mcf_wdt.c @@ -6,7 +6,7 @@ * */ -#include +#include #include #include #include diff --git a/drivers/watchdog/mpc8xxx_wdt.c b/drivers/watchdog/mpc8xxx_wdt.c index 036ff690d3f..f28636ca901 100644 --- a/drivers/watchdog/mpc8xxx_wdt.c +++ b/drivers/watchdog/mpc8xxx_wdt.c @@ -3,6 +3,7 @@ * Copyright 2017 CS Systemes d'Information */ +#include #include #include #include diff --git a/drivers/watchdog/mt7621_wdt.c b/drivers/watchdog/mt7621_wdt.c index 6308d9632a8..f7d201b921a 100644 --- a/drivers/watchdog/mt7621_wdt.c +++ b/drivers/watchdog/mt7621_wdt.c @@ -9,6 +9,7 @@ * Copyright (C) 2013 John Crispin */ +#include #include #include #include diff --git a/drivers/watchdog/mtk_wdt.c b/drivers/watchdog/mtk_wdt.c index 706deb9da84..368b36849c8 100644 --- a/drivers/watchdog/mtk_wdt.c +++ b/drivers/watchdog/mtk_wdt.c @@ -6,6 +6,7 @@ * Author: Ryder Lee */ +#include #include #include #include diff --git a/drivers/watchdog/omap_wdt.c b/drivers/watchdog/omap_wdt.c index 5fd02ddf564..f0e57b4f728 100644 --- a/drivers/watchdog/omap_wdt.c +++ b/drivers/watchdog/omap_wdt.c @@ -36,6 +36,7 @@ * Use the driver model and standard identifiers; handle bigger timeouts. */ +#include #include #include #include diff --git a/drivers/watchdog/orion_wdt.c b/drivers/watchdog/orion_wdt.c index 4562b2a37e3..127766df58a 100644 --- a/drivers/watchdog/orion_wdt.c +++ b/drivers/watchdog/orion_wdt.c @@ -12,6 +12,7 @@ * warranty of any kind, whether express or implied. */ +#include #include #include #include diff --git a/drivers/watchdog/rti_wdt.c b/drivers/watchdog/rti_wdt.c index 99168d0cad0..8d93f19b984 100644 --- a/drivers/watchdog/rti_wdt.c +++ b/drivers/watchdog/rti_wdt.c @@ -8,6 +8,7 @@ * Derived from linux/drivers/watchdog/rti_wdt.c */ +#include #include #include #include diff --git a/drivers/watchdog/s5p_wdt.c b/drivers/watchdog/s5p_wdt.c index c244f15a895..80524a00101 100644 --- a/drivers/watchdog/s5p_wdt.c +++ b/drivers/watchdog/s5p_wdt.c @@ -4,6 +4,7 @@ * Minkyu Kang */ +#include #include #include #include diff --git a/drivers/watchdog/sandbox_alarm-wdt.c b/drivers/watchdog/sandbox_alarm-wdt.c index 8dbbfc249e7..71bb5d924ea 100644 --- a/drivers/watchdog/sandbox_alarm-wdt.c +++ b/drivers/watchdog/sandbox_alarm-wdt.c @@ -1,3 +1,4 @@ +#include #include #include #include diff --git a/drivers/watchdog/sandbox_wdt.c b/drivers/watchdog/sandbox_wdt.c index cd5eadbfd21..535614f04d6 100644 --- a/drivers/watchdog/sandbox_wdt.c +++ b/drivers/watchdog/sandbox_wdt.c @@ -3,6 +3,7 @@ * Copyright 2017 Google, Inc */ +#include #include #include #include diff --git a/drivers/watchdog/sbsa_gwdt.c b/drivers/watchdog/sbsa_gwdt.c index 03585529bb6..96d04665d52 100644 --- a/drivers/watchdog/sbsa_gwdt.c +++ b/drivers/watchdog/sbsa_gwdt.c @@ -7,6 +7,7 @@ #include #include +#include #include #include #include diff --git a/drivers/watchdog/sl28cpld-wdt.c b/drivers/watchdog/sl28cpld-wdt.c index c5b4f8a9f66..af5a6b1a28a 100644 --- a/drivers/watchdog/sl28cpld-wdt.c +++ b/drivers/watchdog/sl28cpld-wdt.c @@ -5,6 +5,7 @@ * Copyright (c) 2021 Michael Walle */ +#include #include #include #include diff --git a/drivers/watchdog/sp805_wdt.c b/drivers/watchdog/sp805_wdt.c index 10fe3e28232..6d58fd3cfda 100644 --- a/drivers/watchdog/sp805_wdt.c +++ b/drivers/watchdog/sp805_wdt.c @@ -8,6 +8,7 @@ #include #include #include +#include #include #include #include diff --git a/drivers/watchdog/stm32mp_wdt.c b/drivers/watchdog/stm32mp_wdt.c index 97ab8cfe7ab..7ebcd255266 100644 --- a/drivers/watchdog/stm32mp_wdt.c +++ b/drivers/watchdog/stm32mp_wdt.c @@ -5,6 +5,7 @@ #define LOG_CATEGORY UCLASS_WDT +#include #include #include #include diff --git a/drivers/watchdog/tangier_wdt.c b/drivers/watchdog/tangier_wdt.c index 8fbfac31b1e..bdc65597dcf 100644 --- a/drivers/watchdog/tangier_wdt.c +++ b/drivers/watchdog/tangier_wdt.c @@ -2,6 +2,7 @@ /* * Copyright (c) 2017 Intel Corporation */ +#include #include #include #include diff --git a/drivers/watchdog/ulp_wdog.c b/drivers/watchdog/ulp_wdog.c index 83f19dc0e86..0eea04ed2c6 100644 --- a/drivers/watchdog/ulp_wdog.c +++ b/drivers/watchdog/ulp_wdog.c @@ -3,6 +3,7 @@ * Copyright (C) 2016 Freescale Semiconductor, Inc. */ +#include #include #include #include diff --git a/drivers/watchdog/wdt-uclass.c b/drivers/watchdog/wdt-uclass.c index c88312ec721..417e8d7eef9 100644 --- a/drivers/watchdog/wdt-uclass.c +++ b/drivers/watchdog/wdt-uclass.c @@ -5,6 +5,7 @@ #define LOG_CATEGORY UCLASS_WDT +#include #include #include #include diff --git a/drivers/watchdog/xilinx_tb_wdt.c b/drivers/watchdog/xilinx_tb_wdt.c index 8a8e55370a0..b38c4000161 100644 --- a/drivers/watchdog/xilinx_tb_wdt.c +++ b/drivers/watchdog/xilinx_tb_wdt.c @@ -8,6 +8,7 @@ * Copyright (c) 2011-2018 Xilinx Inc. */ +#include #include #include #include diff --git a/drivers/watchdog/xilinx_wwdt.c b/drivers/watchdog/xilinx_wwdt.c index 41eff1a4645..963ab22fb45 100644 --- a/drivers/watchdog/xilinx_wwdt.c +++ b/drivers/watchdog/xilinx_wwdt.c @@ -9,6 +9,7 @@ */ #include +#include #include #include #include diff --git a/drivers/xen/events.c b/drivers/xen/events.c index fa8b13d2c61..2ebe20dbf26 100644 --- a/drivers/xen/events.c +++ b/drivers/xen/events.c @@ -14,6 +14,7 @@ * * [1] - http://xenbits.xen.org/gitweb/?p=mini-os.git;a=summary */ +#include #include #include diff --git a/drivers/xen/gnttab.c b/drivers/xen/gnttab.c index 005694a5c62..31e96e2939c 100644 --- a/drivers/xen/gnttab.c +++ b/drivers/xen/gnttab.c @@ -14,6 +14,7 @@ * * [1] - http://xenbits.xen.org/gitweb/?p=mini-os.git;a=summary */ +#include #include #include #include diff --git a/drivers/xen/hypervisor.c b/drivers/xen/hypervisor.c index d28df823c68..0b2311ba267 100644 --- a/drivers/xen/hypervisor.c +++ b/drivers/xen/hypervisor.c @@ -8,6 +8,7 @@ * Copyright (c) 2005, Grzegorz Milos, gm281@cam.ac.uk,Intel Research Cambridge * Copyright (c) 2020, EPAM Systems Inc. */ +#include #include #include #include diff --git a/drivers/xen/pvblock.c b/drivers/xen/pvblock.c index 0e47ffb46a8..9fc51d203e5 100644 --- a/drivers/xen/pvblock.c +++ b/drivers/xen/pvblock.c @@ -7,6 +7,7 @@ #define LOG_CATEGORY UCLASS_PVBLOCK #include +#include #include #include #include diff --git a/drivers/xen/xenbus.c b/drivers/xen/xenbus.c index 36de5255099..177d144723c 100644 --- a/drivers/xen/xenbus.c +++ b/drivers/xen/xenbus.c @@ -15,6 +15,7 @@ * [1] - http://xenbits.xen.org/gitweb/?p=mini-os.git;a=summary */ +#include #include #include diff --git a/env/Kconfig b/env/Kconfig index 9641abe371a..1f8e90af55e 100644 --- a/env/Kconfig +++ b/env/Kconfig @@ -312,7 +312,7 @@ config ENV_IS_IN_NVRAM config ENV_IS_IN_ONENAND bool "Environment is in OneNAND" - depends on !CHAIN_OF_TRUST && CMD_ONENAND + depends on !CHAIN_OF_TRUST help Define this if you want to put your local device's environment in OneNAND. diff --git a/env/attr.c b/env/attr.c index fed5b212e2f..a958c714828 100644 --- a/env/attr.c +++ b/env/attr.c @@ -4,13 +4,13 @@ * Joe Hershberger, National Instruments, joe.hershberger@ni.com */ -#include #ifdef USE_HOSTCC /* Eliminate "ANSI does not permit..." warnings */ #include +#include #include #else +#include #include -#include #endif #include diff --git a/env/callback.c b/env/callback.c index b7cbccd1175..98ddba035ea 100644 --- a/env/callback.c +++ b/env/callback.c @@ -4,6 +4,7 @@ * Joe Hershberger, National Instruments, joe.hershberger@ni.com */ +#include #include #include #include diff --git a/env/common.c b/env/common.c index d8c276dddfd..48a565107c1 100644 --- a/env/common.c +++ b/env/common.c @@ -7,6 +7,7 @@ * Andreas Heppel */ +#include #include #include #include diff --git a/env/eeprom.c b/env/eeprom.c index b290b1013e1..7ce7e9972b2 100644 --- a/env/eeprom.c +++ b/env/eeprom.c @@ -7,6 +7,7 @@ * Andreas Heppel */ +#include #include #include #include diff --git a/env/env.c b/env/env.c index bcc189e14db..bae3f6482ae 100644 --- a/env/env.c +++ b/env/env.c @@ -4,13 +4,13 @@ * Written by Simon Glass */ +#include #include #include #include #include #include #include -#include DECLARE_GLOBAL_DATA_PTR; diff --git a/env/ext4.c b/env/ext4.c index d92c844ea6c..f21939186f0 100644 --- a/env/ext4.c +++ b/env/ext4.c @@ -18,6 +18,7 @@ * Manjunatha C Achar */ +#include #include #include diff --git a/env/fat.c b/env/fat.c index f3f8b7301ee..d87a47b1001 100644 --- a/env/fat.c +++ b/env/fat.c @@ -6,6 +6,7 @@ * Maximilian Schwerin */ +#include #include #include #include diff --git a/env/flags.c b/env/flags.c index 233fd460d84..e2866361dfe 100644 --- a/env/flags.c +++ b/env/flags.c @@ -8,9 +8,9 @@ #include #include -#include #ifdef USE_HOSTCC /* Eliminate "ANSI does not permit..." warnings */ #include +#include #include "fw_env_private.h" #include "fw_env.h" #include @@ -18,7 +18,7 @@ #define env_get fw_getenv #define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0])) #else -#include +#include #include #endif diff --git a/env/flash.c b/env/flash.c index 1bd6e7003d6..1e75f8c004e 100644 --- a/env/flash.c +++ b/env/flash.c @@ -9,6 +9,7 @@ /* #define DEBUG */ +#include #include #include #include diff --git a/env/mmc.c b/env/mmc.c index 776df0786be..7afb733e890 100644 --- a/env/mmc.c +++ b/env/mmc.c @@ -5,6 +5,7 @@ /* #define DEBUG */ +#include #include #include diff --git a/env/nand.c b/env/nand.c index fef5697ec39..df300b13179 100644 --- a/env/nand.c +++ b/env/nand.c @@ -13,6 +13,7 @@ * Andreas Heppel */ +#include #include #include #include diff --git a/env/nowhere.c b/env/nowhere.c index 326f27db2e9..9ebc357dbd7 100644 --- a/env/nowhere.c +++ b/env/nowhere.c @@ -7,6 +7,7 @@ * Andreas Heppel */ +#include #include #include #include diff --git a/env/nvram.c b/env/nvram.c index d49cd0f337a..229c34f5367 100644 --- a/env/nvram.c +++ b/env/nvram.c @@ -7,6 +7,7 @@ * Andreas Heppel */ +#include #include #include #include diff --git a/env/onenand.c b/env/onenand.c index 8c349ef5ce6..1faa2cb62a3 100644 --- a/env/onenand.c +++ b/env/onenand.c @@ -7,6 +7,7 @@ * Kyungmin Park */ +#include #include #include #include diff --git a/env/remote.c b/env/remote.c index 0cc383c2360..166bebf52b5 100644 --- a/env/remote.c +++ b/env/remote.c @@ -5,10 +5,10 @@ /* #define DEBUG */ +#include #include #include #include -#include #include #include diff --git a/env/sf.c b/env/sf.c index c747e175e31..8f5c03b00d3 100644 --- a/env/sf.c +++ b/env/sf.c @@ -8,6 +8,7 @@ * * (C) Copyright 2008 Atmel Corporation */ +#include #include #include #include diff --git a/env/ubi.c b/env/ubi.c index 0c3e93c2bf2..445d34fedb8 100644 --- a/env/ubi.c +++ b/env/ubi.c @@ -4,6 +4,7 @@ * Joe Hershberger */ +#include #include #include diff --git a/examples/api/demo.c b/examples/api/demo.c index 677d13b307a..d586174ce8c 100644 --- a/examples/api/demo.c +++ b/examples/api/demo.c @@ -5,7 +5,7 @@ * Written by: Rafal Jaworowski */ -#include +#include #include #include #include diff --git a/examples/api/glue.c b/examples/api/glue.c index 08c21a8cb9c..075d307ae26 100644 --- a/examples/api/glue.c +++ b/examples/api/glue.c @@ -3,6 +3,7 @@ * (C) Copyright 2007-2008 Semihalf, Rafal Jaworowski */ +#include #include #include #include diff --git a/examples/api/libgenwrap.c b/examples/api/libgenwrap.c index bfd88e100d6..3aa222866ff 100644 --- a/examples/api/libgenwrap.c +++ b/examples/api/libgenwrap.c @@ -9,6 +9,7 @@ * existing code e.g. operations on strings and similar. */ +#include #include #include #include diff --git a/examples/standalone/atmel_df_pow2.c b/examples/standalone/atmel_df_pow2.c index ed0d7aeaadc..dcb25da9498 100644 --- a/examples/standalone/atmel_df_pow2.c +++ b/examples/standalone/atmel_df_pow2.c @@ -6,6 +6,7 @@ * Licensed under the 2-clause BSD. */ +#include #include #include #include diff --git a/examples/standalone/sched.c b/examples/standalone/sched.c index d507163f6f3..1c529607132 100644 --- a/examples/standalone/sched.c +++ b/examples/standalone/sched.c @@ -1,5 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ +#include #include /* diff --git a/examples/standalone/stubs.c b/examples/standalone/stubs.c index 04e8acb8abe..65115570e8e 100644 --- a/examples/standalone/stubs.c +++ b/examples/standalone/stubs.c @@ -1,3 +1,4 @@ +#include #include #include diff --git a/fs/btrfs/dev.c b/fs/btrfs/dev.c index e27a032c9f6..cb3b9713a5f 100644 --- a/fs/btrfs/dev.c +++ b/fs/btrfs/dev.c @@ -5,6 +5,7 @@ * 2017 Marek Behún, CZ.NIC, kabel@kernel.org */ +#include #include #include #include diff --git a/fs/btrfs/disk-io.c b/fs/btrfs/disk-io.c index e5bfaf461c2..7eaa7e94960 100644 --- a/fs/btrfs/disk-io.c +++ b/fs/btrfs/disk-io.c @@ -1,4 +1,5 @@ // SPDX-License-Identifier: GPL-2.0+ +#include #include #include #include diff --git a/fs/btrfs/volumes.c b/fs/btrfs/volumes.c index 8ec545eded7..7d4095d9ca8 100644 --- a/fs/btrfs/volumes.c +++ b/fs/btrfs/volumes.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ #include -#include +#include #include #include "ctree.h" #include "disk-io.h" diff --git a/fs/cbfs/cbfs.c b/fs/cbfs/cbfs.c index ad5583233bb..714f4baafc9 100644 --- a/fs/cbfs/cbfs.c +++ b/fs/cbfs/cbfs.c @@ -3,10 +3,10 @@ * Copyright (c) 2011 The Chromium OS Authors. All rights reserved. */ +#include #include #include #include -#include #include /* Offset of master header from the start of a coreboot ROM */ diff --git a/fs/cramfs/cramfs.c b/fs/cramfs/cramfs.c index 22148ff8fe2..abb2de34eb0 100644 --- a/fs/cramfs/cramfs.c +++ b/fs/cramfs/cramfs.c @@ -24,7 +24,7 @@ * The actual compression is based on zlib, see the other files. */ -#include +#include #include #include #include diff --git a/fs/cramfs/uncompress.c b/fs/cramfs/uncompress.c index 2141edf22e4..0d071b69f4c 100644 --- a/fs/cramfs/uncompress.c +++ b/fs/cramfs/uncompress.c @@ -20,7 +20,7 @@ * then is used by multiple filesystems. */ -#include +#include #include #include #include diff --git a/fs/ext4/dev.c b/fs/ext4/dev.c index 3fd8980b1d6..168443de1ff 100644 --- a/fs/ext4/dev.c +++ b/fs/ext4/dev.c @@ -22,6 +22,7 @@ * fs/ext2/dev.c file in uboot. */ +#include #include #include #include diff --git a/fs/ext4/ext4_common.c b/fs/ext4/ext4_common.c index 857c15d878e..2ff0dca2495 100644 --- a/fs/ext4/ext4_common.c +++ b/fs/ext4/ext4_common.c @@ -18,6 +18,7 @@ * ext4write : Based on generic ext4 protocol. */ +#include #include #include #include diff --git a/fs/ext4/ext4_journal.c b/fs/ext4/ext4_journal.c index 02c4ac2cb93..e80f797c8dc 100644 --- a/fs/ext4/ext4_journal.c +++ b/fs/ext4/ext4_journal.c @@ -13,6 +13,7 @@ * Copyright 1998-2000 Red Hat, Inc --- All Rights Reserved */ +#include #include #include #include diff --git a/fs/ext4/ext4_write.c b/fs/ext4/ext4_write.c index 38da3923c47..d057f6b5a79 100644 --- a/fs/ext4/ext4_write.c +++ b/fs/ext4/ext4_write.c @@ -21,6 +21,7 @@ */ +#include #include #include #include diff --git a/fs/ext4/ext4fs.c b/fs/ext4/ext4fs.c index da59cb008fc..33e200ffa3c 100644 --- a/fs/ext4/ext4fs.c +++ b/fs/ext4/ext4fs.c @@ -20,6 +20,7 @@ * ext4write : Based on generic ext4 protocol. */ +#include #include #include #include diff --git a/fs/fat/fat.c b/fs/fat/fat.c index e2570e81676..2dd9d4e72dc 100644 --- a/fs/fat/fat.c +++ b/fs/fat/fat.c @@ -10,6 +10,7 @@ #define LOG_CATEGORY LOGC_FS +#include #include #include #include diff --git a/fs/fat/fat_write.c b/fs/fat/fat_write.c index ea877ee9171..c8e0fbf1a3b 100644 --- a/fs/fat/fat_write.c +++ b/fs/fat/fat_write.c @@ -7,6 +7,7 @@ #define LOG_CATEGORY LOGC_FS +#include #include #include #include diff --git a/fs/fs.c b/fs/fs.c index bed1f7242f4..acf465bdd80 100644 --- a/fs/fs.c +++ b/fs/fs.c @@ -9,6 +9,7 @@ #include #include #include +#include #include #include #include @@ -20,7 +21,6 @@ #include #include #include -#include #include #include #include diff --git a/fs/fs_internal.c b/fs/fs_internal.c index 51c1719361b..111f91b355d 100644 --- a/fs/fs_internal.c +++ b/fs/fs_internal.c @@ -7,6 +7,7 @@ #define LOG_CATEGORY LOGC_CORE +#include #include #include #include diff --git a/fs/jffs2/compr_zlib.c b/fs/jffs2/compr_zlib.c index e1e3c15e75e..d306b6dc4cf 100644 --- a/fs/jffs2/compr_zlib.c +++ b/fs/jffs2/compr_zlib.c @@ -35,6 +35,8 @@ * */ +#include +#include #include #include diff --git a/fs/jffs2/jffs2_1pass.c b/fs/jffs2/jffs2_1pass.c index 5b7d7f4ae88..49ba82ef959 100644 --- a/fs/jffs2/jffs2_1pass.c +++ b/fs/jffs2/jffs2_1pass.c @@ -111,6 +111,7 @@ */ +#include #include #include #include diff --git a/fs/jffs2/mergesort.c b/fs/jffs2/mergesort.c index 495937d792d..fca77aa6511 100644 --- a/fs/jffs2/mergesort.c +++ b/fs/jffs2/mergesort.c @@ -7,6 +7,7 @@ * http://www.chiark.greenend.org.uk/~sgtatham/algorithms/listsort.html */ +#include #include "jffs2_private.h" int sort_list(struct b_list *list) diff --git a/fs/sandbox/host_bootdev.c b/fs/sandbox/host_bootdev.c index 3f74972a9f8..3ef53627608 100644 --- a/fs/sandbox/host_bootdev.c +++ b/fs/sandbox/host_bootdev.c @@ -6,6 +6,7 @@ * Written by Simon Glass */ +#include #include #include #include diff --git a/fs/sandbox/sandboxfs.c b/fs/sandbox/sandboxfs.c index 773b583fa43..4ae41d5b4db 100644 --- a/fs/sandbox/sandboxfs.c +++ b/fs/sandbox/sandboxfs.c @@ -3,7 +3,7 @@ * Copyright (c) 2012, Google Inc. */ -#include +#include #include #include #include diff --git a/fs/semihostingfs.c b/fs/semihostingfs.c index 77e39ca407e..3592338a686 100644 --- a/fs/semihostingfs.c +++ b/fs/semihostingfs.c @@ -4,7 +4,7 @@ * Copyright (c) 2012, Google Inc. */ -#include +#include #include #include #include diff --git a/fs/ubifs/super.c b/fs/ubifs/super.c index 788f88f0495..3e7160352e6 100644 --- a/fs/ubifs/super.c +++ b/fs/ubifs/super.c @@ -29,6 +29,7 @@ #include #else +#include #include #include #include diff --git a/fs/ubifs/ubifs.c b/fs/ubifs/ubifs.c index 75de01e95f7..a509584e5d7 100644 --- a/fs/ubifs/ubifs.c +++ b/fs/ubifs/ubifs.c @@ -11,6 +11,7 @@ * Adrian Hunter */ +#include #include #include #include diff --git a/fs/yaffs2/yaffs_mtdif.c b/fs/yaffs2/yaffs_mtdif.c index 0eec22bc4a5..50fed2d4b15 100644 --- a/fs/yaffs2/yaffs_mtdif.c +++ b/fs/yaffs2/yaffs_mtdif.c @@ -12,6 +12,7 @@ */ /* XXX U-BOOT XXX */ +#include #include "yportenv.h" diff --git a/fs/yaffs2/yaffs_mtdif2.c b/fs/yaffs2/yaffs_mtdif2.c index 2bf171f99f1..81a4d964f3e 100644 --- a/fs/yaffs2/yaffs_mtdif2.c +++ b/fs/yaffs2/yaffs_mtdif2.c @@ -14,6 +14,7 @@ /* mtd interface for YAFFS2 */ /* XXX U-BOOT XXX */ +#include #include #include diff --git a/fs/yaffs2/yaffs_uboot_glue.c b/fs/yaffs2/yaffs_uboot_glue.c index deddbaac51e..0a920561149 100644 --- a/fs/yaffs2/yaffs_uboot_glue.c +++ b/fs/yaffs2/yaffs_uboot_glue.c @@ -19,6 +19,7 @@ * This version now uses the ydevconfig mechanism to set up partitions. */ +#include #include #include #include diff --git a/fs/zfs/dev.c b/fs/zfs/dev.c index 722c6a86176..fcd9893b3ac 100644 --- a/fs/zfs/dev.c +++ b/fs/zfs/dev.c @@ -8,6 +8,7 @@ */ +#include #include #include #include diff --git a/fs/zfs/zfs.c b/fs/zfs/zfs.c index c44e7ece5df..bfc11fa6676 100644 --- a/fs/zfs/zfs.c +++ b/fs/zfs/zfs.c @@ -10,6 +10,7 @@ * Copyright 2004 Sun Microsystems, Inc. */ +#include #include #include #include diff --git a/fs/zfs/zfs_fletcher.c b/fs/zfs/zfs_fletcher.c index b06c335626a..008a303ec79 100644 --- a/fs/zfs/zfs_fletcher.c +++ b/fs/zfs/zfs_fletcher.c @@ -8,6 +8,7 @@ * Use is subject to license terms. */ +#include #include #include #include diff --git a/fs/zfs/zfs_lzjb.c b/fs/zfs/zfs_lzjb.c index e79c5b4278f..b42d4980129 100644 --- a/fs/zfs/zfs_lzjb.c +++ b/fs/zfs/zfs_lzjb.c @@ -8,6 +8,7 @@ * Use is subject to license terms. */ +#include #include #include #include diff --git a/fs/zfs/zfs_sha256.c b/fs/zfs/zfs_sha256.c index 602d75254ff..cb5b1c06834 100644 --- a/fs/zfs/zfs_sha256.c +++ b/fs/zfs/zfs_sha256.c @@ -8,6 +8,7 @@ * Use is subject to license terms. */ +#include #include #include #include diff --git a/include/acpi/acpi_s3.h b/include/acpi/acpi_s3.h index f7bea941855..d3f271f948e 100644 --- a/include/acpi/acpi_s3.h +++ b/include/acpi/acpi_s3.h @@ -37,9 +37,6 @@ #ifndef __ASSEMBLY__ -#include -#include - extern char __wakeup[]; extern int __wakeup_size; diff --git a/include/adc.h b/include/adc.h index 15e4cdb7dce..0d1a666908f 100644 --- a/include/adc.h +++ b/include/adc.h @@ -7,8 +7,6 @@ #ifndef _ADC_H_ #define _ADC_H_ -#include - /* ADC_CHANNEL() - ADC channel bit mask, to select only required channels */ #define ADC_CHANNEL(x) (1 << x) diff --git a/include/android_ab.h b/include/android_ab.h index dbf20343da6..1fee7582b90 100644 --- a/include/android_ab.h +++ b/include/android_ab.h @@ -6,8 +6,6 @@ #ifndef __ANDROID_AB_H #define __ANDROID_AB_H -#include - struct blk_desc; struct disk_partition; diff --git a/include/api_public.h b/include/api_public.h index e89572c00a4..5a4465ea893 100644 --- a/include/api_public.h +++ b/include/api_public.h @@ -8,8 +8,6 @@ #ifndef _API_PUBLIC_H_ #define _API_PUBLIC_H_ -#include - #define API_EINVAL 1 /* invalid argument(s) */ #define API_ENODEV 2 /* no device */ #define API_ENOMEM 3 /* no memory */ diff --git a/include/atf_common.h b/include/atf_common.h index 5ae45090252..d69892fac6c 100644 --- a/include/atf_common.h +++ b/include/atf_common.h @@ -74,8 +74,6 @@ #ifndef __ASSEMBLY__ -#include - /******************************************************************************* * Structure used for telling the next BL how much of a particular type of * memory is available for its use and how much is already used. diff --git a/include/audio_codec.h b/include/audio_codec.h index a87b76c6f9e..a81a3151576 100644 --- a/include/audio_codec.h +++ b/include/audio_codec.h @@ -7,8 +7,6 @@ #ifndef __AUDIO_CODEC_H__ #define __AUDIO_CODEC_H__ -#include - struct udevice; /* diff --git a/include/autoboot.h b/include/autoboot.h index c68bd79f8dc..eb204995d07 100644 --- a/include/autoboot.h +++ b/include/autoboot.h @@ -12,7 +12,6 @@ #define __AUTOBOOT_H #include -#include #ifdef CONFIG_SANDBOX diff --git a/include/axi.h b/include/axi.h index 133a06ee271..59fb0b2e458 100644 --- a/include/axi.h +++ b/include/axi.h @@ -7,8 +7,6 @@ #ifndef _AXI_H_ #define _AXI_H_ -#include - struct udevice; /** diff --git a/include/bmp_layout.h b/include/bmp_layout.h index eabbd25a330..a5c9498dc9f 100644 --- a/include/bmp_layout.h +++ b/include/bmp_layout.h @@ -10,8 +10,6 @@ #ifndef _BMP_H_ #define _BMP_H_ -#include - struct __packed bmp_color_table_entry { __u8 blue; __u8 green; diff --git a/include/bootmeth.h b/include/bootmeth.h index cd9517321c0..0fc36104ece 100644 --- a/include/bootmeth.h +++ b/include/bootmeth.h @@ -7,8 +7,6 @@ #ifndef __bootmeth_h #define __bootmeth_h -#include - struct blk_desc; struct bootflow; struct bootflow_iter; diff --git a/include/bootstd.h b/include/bootstd.h index ac756e98d84..99ce7b64e7c 100644 --- a/include/bootstd.h +++ b/include/bootstd.h @@ -10,8 +10,6 @@ #define __bootstd_h #include -#include -#include struct udevice; diff --git a/include/cedit.h b/include/cedit.h index a31b4245247..f43cafa5aa2 100644 --- a/include/cedit.h +++ b/include/cedit.h @@ -7,15 +7,12 @@ #ifndef __CEDIT_H #define __CEDIT_H -#include #include -#include struct abuf; struct expo; struct scene; struct video_priv; -struct udevice; enum { /* size increment for writing FDT */ diff --git a/include/common.h b/include/common.h new file mode 100644 index 00000000000..a79c2bb4993 --- /dev/null +++ b/include/common.h @@ -0,0 +1,33 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Common header file for U-Boot + * + * This file still includes quite a few headers that should be included + * individually as needed. Patches to remove things are welcome. + * + * (C) Copyright 2000-2009 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + */ + +#ifndef __COMMON_H_ +#define __COMMON_H_ 1 + +#ifndef __ASSEMBLY__ /* put C only stuff in this section */ +#include +#include +#include +#include +#include +#include +#include +#include +#include /* boot information for Linux kernel */ +#include +#endif /* __ASSEMBLY__ */ + +/* Pull in stuff for the build system */ +#ifdef DO_DEPS_ONLY +# include +#endif + +#endif /* __COMMON_H_ */ diff --git a/include/configs/mt7621.h b/include/configs/mt7621.h index e6dba707195..bf2bc2d45c0 100644 --- a/include/configs/mt7621.h +++ b/include/configs/mt7621.h @@ -14,6 +14,9 @@ #define CFG_SYS_INIT_SP_OFFSET 0x800000 +/* MMC */ +#define MMC_SUPPORTS_TUNING + /* Serial SPL */ #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_SERIAL) #define CFG_SYS_NS16550_CLK 50000000 diff --git a/include/configs/mt7623.h b/include/configs/mt7623.h index 6f42cd32d80..fca234a1dc7 100644 --- a/include/configs/mt7623.h +++ b/include/configs/mt7623.h @@ -11,6 +11,9 @@ #include +/* MMC */ +#define MMC_SUPPORTS_TUNING + /* DRAM */ #define CFG_SYS_SDRAM_BASE 0x80000000 diff --git a/include/configs/octeontx2_common.h b/include/configs/octeontx2_common.h index f415dffddbe..c4db38562d8 100644 --- a/include/configs/octeontx2_common.h +++ b/include/configs/octeontx2_common.h @@ -19,4 +19,9 @@ "loadaddr=20080000\0" \ "ethrotate=yes\0" +#if defined(CONFIG_MMC_OCTEONTX) +#define MMC_SUPPORTS_TUNING +/** EMMC specific defines */ +#endif + #endif /* __OCTEONTX2_COMMON_H__ */ diff --git a/include/ddr_spd.h b/include/ddr_spd.h index c4d199fd7e1..fe163da43e5 100644 --- a/include/ddr_spd.h +++ b/include/ddr_spd.h @@ -6,8 +6,6 @@ #ifndef _DDR_SPD_H_ #define _DDR_SPD_H_ -#include - /* * Format from "JEDEC Standard No. 21-C, * Appendix D: Rev 1.0: SPD's for DDR SDRAM diff --git a/include/display.h b/include/display.h index e8d8aaa15fb..3d012176441 100644 --- a/include/display.h +++ b/include/display.h @@ -6,8 +6,6 @@ #ifndef _DISPLAY_H #define _DISPLAY_H -#include - struct udevice; struct display_timing; diff --git a/include/dm/of.h b/include/dm/of.h index b7404c139d1..b1c934f610d 100644 --- a/include/dm/of.h +++ b/include/dm/of.h @@ -7,6 +7,7 @@ #ifndef _DM_OF_H #define _DM_OF_H +#include #include /* integer value within a device tree property which references another node */ diff --git a/include/dm/test.h b/include/dm/test.h index 02737411a16..b5937509212 100644 --- a/include/dm/test.h +++ b/include/dm/test.h @@ -6,8 +6,6 @@ #ifndef __DM_TEST_H #define __DM_TEST_H -#include - struct udevice; /** diff --git a/include/dt-bindings/clock/adi-sc5xx-clock.h b/include/dt-bindings/clock/adi-sc5xx-clock.h deleted file mode 100644 index 4a5373d1141..00000000000 --- a/include/dt-bindings/clock/adi-sc5xx-clock.h +++ /dev/null @@ -1,271 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later */ -/* - * (C) Copyright 2022 - Analog Devices, Inc. - * - * Written and/or maintained by Timesys Corporation - * - * Contact: Nathan Barrett-Morrison - * Contact: Greg Malysa - * - */ - -#ifndef DT_BINDINGS_CLOCK_ADI_SC5XX_CLOCK_H -#define DT_BINDINGS_CLOCK_ADI_SC5XX_CLOCK_H - -//ADSP-SC594 -#define ADSP_SC594_CLK_DUMMY 0 -#define ADSP_SC594_CLK_SYS_CLKIN0 1 -#define ADSP_SC594_CLK_SYS_CLKIN1 2 -#define ADSP_SC594_CLK_CGU1_IN 3 -#define ADSP_SC594_CLK_CGU0_PLL_IN 4 -#define ADSP_SC594_CLK_CGU1_PLL_IN 5 -#define ADSP_SC594_CLK_CGU0_VCO_OUT 6 -#define ADSP_SC594_CLK_CGU1_VCO_OUT 7 -#define ADSP_SC594_CLK_CGU0_PLLCLK 8 -#define ADSP_SC594_CLK_CGU1_PLLCLK 9 -#define ADSP_SC594_CLK_CGU0_CDIV 10 -#define ADSP_SC594_CLK_CGU0_SYSCLK 11 -#define ADSP_SC594_CLK_CGU0_DDIV 12 -#define ADSP_SC594_CLK_CGU0_ODIV 13 -#define ADSP_SC594_CLK_CGU0_S0SELDIV 14 -#define ADSP_SC594_CLK_CGU0_S1SELDIV 15 -#define ADSP_SC594_CLK_CGU0_S1SELEXDIV 16 -#define ADSP_SC594_CLK_CGU0_S1SEL 17 -#define ADSP_SC594_CLK_CGU1_CDIV 18 -#define ADSP_SC594_CLK_CGU1_SYSCLK 19 -#define ADSP_SC594_CLK_CGU1_DDIV 20 -#define ADSP_SC594_CLK_CGU1_ODIV 21 -#define ADSP_SC594_CLK_CGU1_S0SELDIV 22 -#define ADSP_SC594_CLK_CGU1_S1SELDIV 23 -#define ADSP_SC594_CLK_CGU1_S1SELEXDIV 24 -#define ADSP_SC594_CLK_CGU1_S1SEL 25 -#define ADSP_SC594_CLK_CGU0_CCLK0 26 -#define ADSP_SC594_CLK_CGU0_CCLK1 27 -#define ADSP_SC594_CLK_CGU0_OCLK 28 -#define ADSP_SC594_CLK_CGU0_DCLK 29 -#define ADSP_SC594_CLK_CGU0_SCLK1 30 -#define ADSP_SC594_CLK_CGU0_SCLK0 31 -#define ADSP_SC594_CLK_CGU1_CCLK0 32 -#define ADSP_SC594_CLK_CGU1_CCLK1 33 -#define ADSP_SC594_CLK_CGU1_OCLK 34 -#define ADSP_SC594_CLK_CGU1_DCLK 35 -#define ADSP_SC594_CLK_CGU1_SCLK1 36 -#define ADSP_SC594_CLK_CGU1_SCLK0 37 -#define ADSP_SC594_CLK_SHARC0_SEL 38 -#define ADSP_SC594_CLK_SHARC1_SEL 39 -#define ADSP_SC594_CLK_ARM_SEL 40 -#define ADSP_SC594_CLK_CDU_DDR_SEL 41 -#define ADSP_SC594_CLK_CAN_SEL 42 -#define ADSP_SC594_CLK_SPDIF_SEL 43 -#define ADSP_SC594_CLK_RESERVED_SEL 44 -#define ADSP_SC594_CLK_GIGE_SEL 45 -#define ADSP_SC594_CLK_LP_SEL 46 -#define ADSP_SC594_CLK_LPDDR_SEL 47 -#define ADSP_SC594_CLK_OSPI_SEL 48 -#define ADSP_SC594_CLK_TRACE_SEL 49 -#define ADSP_SC594_CLK_SHARC0 50 -#define ADSP_SC594_CLK_SHARC1 51 -#define ADSP_SC594_CLK_ARM 52 -#define ADSP_SC594_CLK_CDU_DDR 53 -#define ADSP_SC594_CLK_CAN 54 -#define ADSP_SC594_CLK_SPDIF 55 -#define ADSP_SC594_CLK_SPI 56 -#define ADSP_SC594_CLK_GIGE 57 -#define ADSP_SC594_CLK_LP 58 -#define ADSP_SC594_CLK_LPDDR 59 -#define ADSP_SC594_CLK_OSPI 60 -#define ADSP_SC594_CLK_TRACE 61 -#define ADSP_SC594_CLK_END 62 - -//ADSP-SC598 -#define ADSP_SC598_CLK_DUMMY 0 -#define ADSP_SC598_CLK_SYS_CLKIN0 1 -#define ADSP_SC598_CLK_SYS_CLKIN1 2 -#define ADSP_SC598_CLK_CGU0_PLL_IN 3 -#define ADSP_SC598_CLK_CGU0_VCO_OUT 4 -#define ADSP_SC598_CLK_CGU0_PLLCLK 5 -#define ADSP_SC598_CLK_CGU1_IN 6 -#define ADSP_SC598_CLK_CGU1_PLL_IN 7 -#define ADSP_SC598_CLK_CGU1_VCO_OUT 8 -#define ADSP_SC598_CLK_CGU1_PLLCLK 9 -#define ADSP_SC598_CLK_CGU0_CDIV 10 -#define ADSP_SC598_CLK_CGU0_SYSCLK 11 -#define ADSP_SC598_CLK_CGU0_DDIV 12 -#define ADSP_SC598_CLK_CGU0_ODIV 13 -#define ADSP_SC598_CLK_CGU0_S0SELDIV 14 -#define ADSP_SC598_CLK_CGU0_S1SELDIV 15 -#define ADSP_SC598_CLK_CGU0_S1SELEXDIV 16 -#define ADSP_SC598_CLK_CGU0_S1SEL 17 -#define ADSP_SC598_CLK_CGU1_CDIV 18 -#define ADSP_SC598_CLK_CGU1_SYSCLK 19 -#define ADSP_SC598_CLK_CGU1_DDIV 20 -#define ADSP_SC598_CLK_CGU1_ODIV 21 -#define ADSP_SC598_CLK_CGU1_S0SELDIV 22 -#define ADSP_SC598_CLK_CGU1_S1SELDIV 23 -#define ADSP_SC598_CLK_CGU1_S0SELEXDIV 24 -#define ADSP_SC598_CLK_CGU1_S1SELEXDIV 25 -#define ADSP_SC598_CLK_CGU1_S0SEL 26 -#define ADSP_SC598_CLK_CGU1_S1SEL 27 -#define ADSP_SC598_CLK_CGU0_CCLK2 28 -#define ADSP_SC598_CLK_CGU0_CCLK0 29 -#define ADSP_SC598_CLK_CGU0_OCLK 30 -#define ADSP_SC598_CLK_CGU0_DCLK 31 -#define ADSP_SC598_CLK_CGU0_SCLK1 32 -#define ADSP_SC598_CLK_CGU0_SCLK0 33 -#define ADSP_SC598_CLK_CGU1_CCLK0 34 -#define ADSP_SC598_CLK_CGU1_OCLK 35 -#define ADSP_SC598_CLK_CGU1_DCLK 36 -#define ADSP_SC598_CLK_CGU1_SCLK1 37 -#define ADSP_SC598_CLK_CGU1_SCLK0 38 -#define ADSP_SC598_CLK_CGU1_CCLK2 39 -#define ADSP_SC598_CLK_DCLK0_HALF 40 -#define ADSP_SC598_CLK_DCLK1_HALF 41 -#define ADSP_SC598_CLK_CGU1_SCLK1_HALF 42 -#define ADSP_SC598_CLK_SHARC0_SEL 43 -#define ADSP_SC598_CLK_SHARC1_SEL 44 -#define ADSP_SC598_CLK_ARM_SEL 45 -#define ADSP_SC598_CLK_CDU_DDR_SEL 46 -#define ADSP_SC598_CLK_CAN_SEL 47 -#define ADSP_SC598_CLK_SPDIF_SEL 48 -#define ADSP_SC598_CLK_SPI_SEL 49 -#define ADSP_SC598_CLK_GIGE_SEL 50 -#define ADSP_SC598_CLK_LP_SEL 51 -#define ADSP_SC598_CLK_LP_DDR_SEL 52 -#define ADSP_SC598_CLK_OSPI_REFCLK_SEL 53 -#define ADSP_SC598_CLK_TRACE_SEL 54 -#define ADSP_SC598_CLK_EMMC_SEL 55 -#define ADSP_SC598_CLK_EMMC_TIMER_QMC_SEL 56 -#define ADSP_SC598_CLK_SHARC0 57 -#define ADSP_SC598_CLK_SHARC1 58 -#define ADSP_SC598_CLK_ARM 59 -#define ADSP_SC598_CLK_CDU_DDR 60 -#define ADSP_SC598_CLK_CAN 61 -#define ADSP_SC598_CLK_SPDIF 62 -#define ADSP_SC598_CLK_SPI 63 -#define ADSP_SC598_CLK_GIGE 64 -#define ADSP_SC598_CLK_LP 65 -#define ADSP_SC598_CLK_LP_DDR 66 -#define ADSP_SC598_CLK_OSPI_REFCLK 67 -#define ADSP_SC598_CLK_TRACE 68 -#define ADSP_SC598_CLK_EMMC 69 -#define ADSP_SC598_CLK_EMMC_TIMER_QMC 70 -#define ADSP_SC598_CLK_3PLL_PLL_IN 71 -#define ADSP_SC598_CLK_3PLL_VCO_OUT 72 -#define ADSP_SC598_CLK_3PLL_PLLCLK 73 -#define ADSP_SC598_CLK_3PLL_DDIV 74 -#define ADSP_SC598_CLK_DDR 75 -#define ADSP_SC598_CLK_END 76 - -//ADSP-SC58X -#define ADSP_SC58X_CLK_DUMMY 0 -#define ADSP_SC58X_CLK_SYS_CLKIN0 1 -#define ADSP_SC58X_CLK_SYS_CLKIN1 2 -#define ADSP_SC58X_CLK_CGU0_PLL_IN 3 -#define ADSP_SC58X_CLK_CGU0_VCO_OUT 4 -#define ADSP_SC58X_CLK_CGU0_PLLCLK 5 -#define ADSP_SC58X_CLK_CGU1_IN 6 -#define ADSP_SC58X_CLK_CGU1_PLL_IN 7 -#define ADSP_SC58X_CLK_CGU1_VCO_OUT 8 -#define ADSP_SC58X_CLK_CGU1_PLLCLK 9 -#define ADSP_SC58X_CLK_CGU0_CDIV 10 -#define ADSP_SC58X_CLK_CGU0_SYSCLK 11 -#define ADSP_SC58X_CLK_CGU0_DDIV 12 -#define ADSP_SC58X_CLK_CGU0_ODIV 13 -#define ADSP_SC58X_CLK_CGU0_S0SELDIV 14 -#define ADSP_SC58X_CLK_CGU0_S1SELDIV 15 -#define ADSP_SC58X_CLK_CGU1_CDIV 16 -#define ADSP_SC58X_CLK_CGU1_SYSCLK 17 -#define ADSP_SC58X_CLK_CGU1_DDIV 18 -#define ADSP_SC58X_CLK_CGU1_ODIV 19 -#define ADSP_SC58X_CLK_CGU1_S0SELDIV 20 -#define ADSP_SC58X_CLK_CGU1_S1SELDIV 21 -#define ADSP_SC58X_CLK_CGU0_CCLK0 22 -#define ADSP_SC58X_CLK_CGU0_CCLK1 23 -#define ADSP_SC58X_CLK_CGU0_OCLK 24 -#define ADSP_SC58X_CLK_CGU0_DCLK 25 -#define ADSP_SC58X_CLK_CGU0_SCLK1 26 -#define ADSP_SC58X_CLK_CGU0_SCLK0 27 -#define ADSP_SC58X_CLK_CGU1_CCLK0 28 -#define ADSP_SC58X_CLK_CGU1_CCLK1 29 -#define ADSP_SC58X_CLK_CGU1_OCLK 30 -#define ADSP_SC58X_CLK_CGU1_DCLK 31 -#define ADSP_SC58X_CLK_CGU1_SCLK1 32 -#define ADSP_SC58X_CLK_CGU1_SCLK0 33 -#define ADSP_SC58X_CLK_OCLK0_HALF 34 -#define ADSP_SC58X_CLK_CCLK1_1_HALF 35 -#define ADSP_SC58X_CLK_SHARC0_SEL 36 -#define ADSP_SC58X_CLK_SHARC1_SEL 37 -#define ADSP_SC58X_CLK_ARM_SEL 38 -#define ADSP_SC58X_CLK_CDU_DDR_SEL 39 -#define ADSP_SC58X_CLK_CAN_SEL 40 -#define ADSP_SC58X_CLK_SPDIF_SEL 41 -#define ADSP_SC58X_CLK_RESERVED_SEL 42 -#define ADSP_SC58X_CLK_GIGE_SEL 43 -#define ADSP_SC58X_CLK_LP_SEL 44 -#define ADSP_SC58X_CLK_SDIO_SEL 45 -#define ADSP_SC58X_CLK_SHARC0 46 -#define ADSP_SC58X_CLK_SHARC1 47 -#define ADSP_SC58X_CLK_ARM 48 -#define ADSP_SC58X_CLK_CDU_DDR 49 -#define ADSP_SC58X_CLK_CAN 50 -#define ADSP_SC58X_CLK_SPDIF 51 -#define ADSP_SC58X_CLK_RESERVED 52 -#define ADSP_SC58X_CLK_GIGE 53 -#define ADSP_SC58X_CLK_LP 54 -#define ADSP_SC58X_CLK_SDIO 55 -#define ADSP_SC58X_CLK_END 56 - -//ADSP-SC57X -#define ADSP_SC57X_CLK_DUMMY 0 -#define ADSP_SC57X_CLK_SYS_CLKIN0 1 -#define ADSP_SC57X_CLK_SYS_CLKIN1 2 -#define ADSP_SC57X_CLK_CGU0_PLL_IN 3 -#define ADSP_SC57X_CLK_CGU0_PLLCLK 4 -#define ADSP_SC57X_CLK_CGU1_IN 5 -#define ADSP_SC57X_CLK_CGU1_PLL_IN 6 -#define ADSP_SC57X_CLK_CGU1_PLLCLK 7 -#define ADSP_SC57X_CLK_CGU0_CDIV 8 -#define ADSP_SC57X_CLK_CGU0_SYSCLK 9 -#define ADSP_SC57X_CLK_CGU0_DDIV 10 -#define ADSP_SC57X_CLK_CGU0_ODIV 11 -#define ADSP_SC57X_CLK_CGU0_S0SELDIV 12 -#define ADSP_SC57X_CLK_CGU0_S1SELDIV 13 -#define ADSP_SC57X_CLK_CGU1_CDIV 14 -#define ADSP_SC57X_CLK_CGU1_SYSCLK 15 -#define ADSP_SC57X_CLK_CGU1_DDIV 16 -#define ADSP_SC57X_CLK_CGU1_ODIV 17 -#define ADSP_SC57X_CLK_CGU1_S0SELDIV 18 -#define ADSP_SC57X_CLK_CGU1_S1SELDIV 19 -#define ADSP_SC57X_CLK_CGU0_CCLK0 20 -#define ADSP_SC57X_CLK_CGU0_CCLK1 21 -#define ADSP_SC57X_CLK_CGU0_OCLK 22 -#define ADSP_SC57X_CLK_CGU0_DCLK 23 -#define ADSP_SC57X_CLK_CGU0_SCLK1 24 -#define ADSP_SC57X_CLK_CGU0_SCLK0 25 -#define ADSP_SC57X_CLK_CGU1_CCLK0 26 -#define ADSP_SC57X_CLK_CGU1_CCLK1 27 -#define ADSP_SC57X_CLK_CGU1_OCLK 28 -#define ADSP_SC57X_CLK_CGU1_DCLK 29 -#define ADSP_SC57X_CLK_CGU1_SCLK1 30 -#define ADSP_SC57X_CLK_CGU1_SCLK0 31 -#define ADSP_SC57X_CLK_OCLK0_HALF 32 -#define ADSP_SC57X_CLK_CCLK1_1_HALF 33 -#define ADSP_SC57X_CLK_SHARC0_SEL 34 -#define ADSP_SC57X_CLK_SHARC1_SEL 35 -#define ADSP_SC57X_CLK_ARM_SEL 36 -#define ADSP_SC57X_CLK_CDU_DDR_SEL 37 -#define ADSP_SC57X_CLK_CAN_SEL 38 -#define ADSP_SC57X_CLK_SPDIF_SEL 39 -#define ADSP_SC57X_CLK_GIGE_SEL 40 -#define ADSP_SC57X_CLK_SDIO_SEL 41 -#define ADSP_SC57X_CLK_SHARC0 42 -#define ADSP_SC57X_CLK_SHARC1 43 -#define ADSP_SC57X_CLK_ARM 44 -#define ADSP_SC57X_CLK_CDU_DDR 45 -#define ADSP_SC57X_CLK_CAN 46 -#define ADSP_SC57X_CLK_SPDIF 47 -#define ADSP_SC57X_CLK_GIGE 48 -#define ADSP_SC57X_CLK_SDIO 49 -#define ADSP_SC57X_CLK_END 50 - -#endif diff --git a/include/eeprom.h b/include/eeprom.h index e223e4c7670..f9c6542ba76 100644 --- a/include/eeprom.h +++ b/include/eeprom.h @@ -8,8 +8,6 @@ #define __EEPROM_LEGACY_H #if defined(CONFIG_CMD_EEPROM) || defined(CONFIG_ENV_IS_IN_EEPROM) -#include - void eeprom_init(int bus); int eeprom_read(uint dev_addr, uint offset, uchar *buffer, uint cnt); int eeprom_write(uint dev_addr, uint offset, uchar *buffer, uint cnt); diff --git a/include/env/adi/adi_boot.env b/include/env/adi/adi_boot.env deleted file mode 100644 index d56b14f5172..00000000000 --- a/include/env/adi/adi_boot.env +++ /dev/null @@ -1,122 +0,0 @@ -/* - * A target board needs to set these variables for the commands below to work: - * - * - adi_stage2_offset, the location of stage2-boot.ldr on the SPI flash - * - adi_image_offset, location of the fitImage on the SPI flash - * - adi_rfs_offset, location of the RFS on the SPI flash - * - loadaddr, where you want to load things - * - jffs2file, name of the jffs2 file for update, ex adsp-sc5xx-tiny-adsp-sc573.jffs2 - */ - -#ifdef CONFIG_SC59X_64 -#define EARLY_PRINTK earlycon=adi_uart,0x31003000 -#else -#define EARLY_PRINTK earlyprintk=serial,uart0,CONFIG_BAUDRATE -#endif - -/* Config options */ -imagefile=fitImage -ethaddr=02:80:ad:20:31:e8 -eth1addr=02:80:ad:20:31:e9 -uart_console=CONFIG_UART_CONSOLE -#ifdef CONFIG_SC59X_64 -fdt_high=0xffffffffffffffff -initrd_high=0xffffffffffffffff -#else -fdt_high=0xffffffff -initrd_high=0xffffffff -#endif - -/* Helper routines */ -init_ethernet=mii info; - dhcp; - setenv serverip ${tftpserverip} - -/* Args for each boot mode */ -adi_bootargs=EARLY_PRINTK console=ttySC0,CONFIG_BAUDRATE vmalloc=512M -ramargs=setenv bootargs ${adi_bootargs} - -addip=setenv bootargs ${bootargs} ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}:eth0:off - -/* Boot modes are selectable and should be defined in the board env before including */ -#if defined(USE_NFS) -// rootpath is set by CONFIG_ROOTPATH -nfsargs=setenv bootargs root=/dev/nfs rw nfsroot=${serverip}${rootpath},tcp,nfsvers=3 ${adi_bootargs} -nfsboot=run init_ethernet; - tftp ${loadaddr} ${tftp_dir_prefix}${imagefile}; - run nfsargs; - run addip; - bootm ${loadaddr} -#endif - -#if defined(USE_MMC) -mmcargs=setenv bootargs root=/dev/mmcblk0p1 rw rootfstype=ext4 rootwait ${adi_bootargs} -mmcboot=mmc rescan; - ext4load mmc 0:1 ${loadaddr} /boot/${imagefile}; - run mmcargs; - bootm ${loadaddr} -#endif - -#if defined(USE_SPI) || defined(USE_OSPI) -spiargs=setenv bootargs root=/dev/mtdblock4 rw rootfstype=jffs2 ${adi_bootargs} -spiboot=run spiargs; - sf probe ${sfdev}; - sf read ${loadaddr} ${adi_image_offset} ${imagesize}; - bootm ${loadaddr} -#endif - -#if defined(USE_OSPI) -ospiboot=run spiboot -#endif - -#if defined(USE_RAM) -ramboot=run init_ethernet; - tftp ${loadaddr} ${tfpt_dir_prefix}${imagefile}; - run ramargs; - bootm ${loadaddr} -#endif - -/* Update commands */ -stage1file=stage1-boot.ldr -stage2file=stage2-boot.ldr - -#if defined(USE_SPI) || defined(USE_OSPI) -update_spi_uboot_stage1=tftp ${loadaddr} ${tftp_dir_prefix}${stage1file}; - sf probe ${sfdev}; - sf update ${loadaddr} 0x0 ${filesize} -update_spi_uboot_stage2=tftp ${loadaddr} ${tftp_dir_prefix}${stage2file}; - sf probe ${sfdev}; - sf update ${loadaddr} ${adi_stage2_offset} ${filesize} -update_spi_uboot=run update_spi_uboot_stage1; - run update_spi_uboot_stage2; -update_spi_fit=tftp ${loadaddr} ${tftp_dir_prefix}${imagefile}; - sf probe ${sfdev}; - sf update ${loadaddr} ${adi_image_offset} ${filesize}; - setenv imagesize ${filesize} -update_spi_rfs=tftp ${loadaddr} ${tftp_dir_prefix}${jffs2file}; - sf probe ${sfdev}; - sf update ${loadaddr} ${adi_rfs_offset} ${filesize} - -start_update_spi=run init_ethernet; - run update_spi_uboot; - run update_spi_fit; - run update_spi_rfs; -start_update_spi_uboot_only=run init_ethernet; - run update_spi_uboot; -#endif - -#if defined(USE_SPI) -update_spi=setenv sfdev CONFIG_SC_BOOT_SPI_BUS:CONFIG_SC_BOOT_SPI_SSEL; - setenv bootcmd run spiboot; - setenv argscmd spiargs; - run start_update_spi; - saveenv -#endif - -#if defined(USE_OSPI) -update_ospi=setenv sfdev CONFIG_SC_BOOT_OSPI_BUS:CONFIG_SC_BOOT_OSPI_SSEL; - setenv bootcmd run ospiboot; - setenv argscmd spiargs; - run start_update_spi; - saveenv -#endif diff --git a/include/env_callback.h b/include/env_callback.h index 8e500aaaf80..23bc650c162 100644 --- a/include/env_callback.h +++ b/include/env_callback.h @@ -7,7 +7,6 @@ #ifndef __ENV_CALLBACK_H__ #define __ENV_CALLBACK_H__ -#include #include #include #include diff --git a/include/env_default.h b/include/env_default.h index 076ffdd44e9..8ee500d1709 100644 --- a/include/env_default.h +++ b/include/env_default.h @@ -7,7 +7,6 @@ * Andreas Heppel */ -#include #include #include diff --git a/include/env_flags.h b/include/env_flags.h index 2476043b0e3..d785f87cdcb 100644 --- a/include/env_flags.h +++ b/include/env_flags.h @@ -7,8 +7,6 @@ #ifndef __ENV_FLAGS_H__ #define __ENV_FLAGS_H__ -#include - enum env_flags_vartype { env_flags_vartype_string, env_flags_vartype_decimal, diff --git a/include/extension_board.h b/include/extension_board.h index 87d404c0074..3b75b5ba9f7 100644 --- a/include/extension_board.h +++ b/include/extension_board.h @@ -7,8 +7,6 @@ #ifndef __EXTENSION_SUPPORT_H #define __EXTENSION_SUPPORT_H -#include - struct extension { struct list_head list; char name[32]; diff --git a/include/flash.h b/include/flash.h index 0f736977411..3710a2731b7 100644 --- a/include/flash.h +++ b/include/flash.h @@ -7,8 +7,6 @@ #ifndef _FLASH_H_ #define _FLASH_H_ -#include - /*----------------------------------------------------------------------- * FLASH Info: contains chip specific data, per FLASH bank */ diff --git a/include/fsl_errata.h b/include/fsl_errata.h index 9f070726acb..44547645df8 100644 --- a/include/fsl_errata.h +++ b/include/fsl_errata.h @@ -7,7 +7,7 @@ #define _FSL_ERRATA_H #if defined(CONFIG_PPC) -#include +#include #elif defined(CONFIG_ARCH_LS1021A) #include #elif defined(CONFIG_FSL_LAYERSCAPE) diff --git a/include/fsl_ifc.h b/include/fsl_ifc.h index 4991d932200..f9a0a7017d4 100644 --- a/include/fsl_ifc.h +++ b/include/fsl_ifc.h @@ -12,8 +12,6 @@ #include #ifdef CONFIG_ARM #include -#else -#include #endif #define FSL_IFC_V1_1_0 0x01010000 diff --git a/include/fsl_immap.h b/include/fsl_immap.h index 54d6e0ab377..5297c0b3f9b 100644 --- a/include/fsl_immap.h +++ b/include/fsl_immap.h @@ -7,9 +7,6 @@ #ifndef __FSL_IMMAP_H #define __FSL_IMMAP_H - -#include - /* * DDR memory controller registers * This structure works for mpc83xx (DDR2 and DDR3), mpc85xx, mpc86xx. diff --git a/include/fuse.h b/include/fuse.h index 4519821af7e..d48dcdfa647 100644 --- a/include/fuse.h +++ b/include/fuse.h @@ -11,8 +11,6 @@ #ifndef _FUSE_H_ #define _FUSE_H_ -#include - /* * Read/Sense/Program/Override interface: * bank: Fuse bank diff --git a/include/gzip.h b/include/gzip.h index 5e0d0ec07fb..e578b283edc 100644 --- a/include/gzip.h +++ b/include/gzip.h @@ -7,8 +7,6 @@ #ifndef __GZIP_H #define __GZIP_H -#include - struct blk_desc; /** diff --git a/include/handoff.h b/include/handoff.h index c0ae7b19a75..0104b834f2c 100644 --- a/include/handoff.h +++ b/include/handoff.h @@ -10,7 +10,6 @@ #if CONFIG_IS_ENABLED(HANDOFF) -#include #include /** diff --git a/include/i2c_eeprom.h b/include/i2c_eeprom.h index 1fe32d2dd68..cba991e3574 100644 --- a/include/i2c_eeprom.h +++ b/include/i2c_eeprom.h @@ -7,7 +7,6 @@ #define __I2C_EEPROM #include -#include struct udevice; diff --git a/include/init.h b/include/init.h index 2c10171359c..630d86729c4 100644 --- a/include/init.h +++ b/include/init.h @@ -401,8 +401,6 @@ void bdinfo_print_size(const char *name, uint64_t size); /* Show arch-specific information for the 'bd' command */ void arch_print_bdinfo(void); -struct cmd_tbl; - int do_bdinfo(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]); #endif /* __ASSEMBLY__ */ diff --git a/include/jffs2/load_kernel.h b/include/jffs2/load_kernel.h index fa4600e84fc..9346d7ee9f1 100644 --- a/include/jffs2/load_kernel.h +++ b/include/jffs2/load_kernel.h @@ -10,7 +10,6 @@ *-----------------------------------------------------------------------*/ #include -#include /* mtd device types */ #define MTD_DEV_TYPE_NOR 0x0001 diff --git a/include/libata.h b/include/libata.h index fa39d21a44a..a55e9315a73 100644 --- a/include/libata.h +++ b/include/libata.h @@ -10,7 +10,6 @@ #ifndef __LIBATA_H__ #define __LIBATA_H__ -#include enum { /* various global constants */ diff --git a/include/linux/compat.h b/include/linux/compat.h index 62381451617..f8e3570d1ad 100644 --- a/include/linux/compat.h +++ b/include/linux/compat.h @@ -5,7 +5,6 @@ #include #include #include -#include #include diff --git a/include/linux/mtd/omap_gpmc.h b/include/linux/mtd/omap_gpmc.h index 2dbf988863f..f08e700a1da 100644 --- a/include/linux/mtd/omap_gpmc.h +++ b/include/linux/mtd/omap_gpmc.h @@ -8,8 +8,6 @@ #ifndef __ASM_OMAP_GPMC_H #define __ASM_OMAP_GPMC_H -#include - /* Maximum Number of Chip Selects */ #define GPMC_CS_NUM 8 diff --git a/include/mailbox.h b/include/mailbox.h index e70266fb61c..323b6c2bc5d 100644 --- a/include/mailbox.h +++ b/include/mailbox.h @@ -6,8 +6,6 @@ #ifndef _MAILBOX_H #define _MAILBOX_H -#include - /** * A mailbox is a hardware mechanism for transferring small fixed-size messages * and/or notifications between the CPU on which U-Boot runs and some other diff --git a/include/mmc.h b/include/mmc.h index 7f1900363b9..4b8327f1f93 100644 --- a/include/mmc.h +++ b/include/mmc.h @@ -18,6 +18,13 @@ struct bd_info; +#if CONFIG_IS_ENABLED(MMC_HS200_SUPPORT) +#define MMC_SUPPORTS_TUNING +#endif +#if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT) +#define MMC_SUPPORTS_TUNING +#endif + /* SD/MMC version bits; 8 flags, 8 major, 8 minor, 8 change */ #define SD_VERSION_SD (1U << 31) #define MMC_VERSION_MMC (1U << 30) @@ -478,7 +485,7 @@ struct dm_mmc_ops { */ int (*get_wp)(struct udevice *dev); -#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING) +#ifdef MMC_SUPPORTS_TUNING /** * execute_tuning() - Start the tuning process * diff --git a/include/mpc85xx.h b/include/mpc85xx.h index ff86c7c12e0..636734dd3c6 100644 --- a/include/mpc85xx.h +++ b/include/mpc85xx.h @@ -6,7 +6,6 @@ #ifndef __MPC85xx_H__ #define __MPC85xx_H__ -#include #if defined(CONFIG_E500) #include #endif diff --git a/include/nand.h b/include/nand.h index cdba7384ad1..220ffa202ef 100644 --- a/include/nand.h +++ b/include/nand.h @@ -8,6 +8,8 @@ #ifndef _NAND_H_ #define _NAND_H_ +#include + extern void nand_init(void); void nand_reinit(void); unsigned long nand_size(void); diff --git a/include/netdev.h b/include/netdev.h index 2a06d9a261b..2a7f40e5040 100644 --- a/include/netdev.h +++ b/include/netdev.h @@ -10,12 +10,9 @@ #ifndef _NETDEV_H_ #define _NETDEV_H_ - -#include #include struct udevice; -struct bd_info; /* * Board and CPU-specific initialization functions diff --git a/include/pci.h b/include/pci.h index ea3b73923d6..aad233769a3 100644 --- a/include/pci.h +++ b/include/pci.h @@ -520,7 +520,6 @@ #ifndef __ASSEMBLY__ -#include #include #ifdef CONFIG_SYS_PCI_64BIT diff --git a/include/phy_interface.h b/include/phy_interface.h index b74f4ccd84a..31be3228c7c 100644 --- a/include/phy_interface.h +++ b/include/phy_interface.h @@ -11,7 +11,6 @@ #define _PHY_INTERFACE_H #include -#include typedef enum { PHY_INTERFACE_MODE_NA, /* don't touch */ diff --git a/include/ram.h b/include/ram.h index 3600bb57a6c..2fc971df465 100644 --- a/include/ram.h +++ b/include/ram.h @@ -7,8 +7,6 @@ #ifndef __RAM_H #define __RAM_H -#include - struct udevice; struct ram_info { diff --git a/include/s_record.h b/include/s_record.h index aab09d9c3c8..3ece695941d 100644 --- a/include/s_record.h +++ b/include/s_record.h @@ -4,8 +4,6 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ -#include - /*-------------------------------------------------------------------------- * * Motorola S-Record Format: diff --git a/include/sm.h b/include/sm.h index fbc156ad68a..afa9c89055e 100644 --- a/include/sm.h +++ b/include/sm.h @@ -19,7 +19,7 @@ * implementation of the driver you are using. */ -#include +#include #include struct udevice; diff --git a/include/splash.h b/include/splash.h index 83c6fa9767f..c3922375987 100644 --- a/include/splash.h +++ b/include/splash.h @@ -23,7 +23,6 @@ #define _SPLASH_H_ #include -#include enum splash_storage { SPLASH_STORAGE_NAND, diff --git a/include/u-boot/sha1.h b/include/u-boot/sha1.h index c1e9f67068d..09fee594d26 100644 --- a/include/u-boot/sha1.h +++ b/include/u-boot/sha1.h @@ -14,8 +14,6 @@ #ifndef _SHA1_H #define _SHA1_H -#include - #ifdef __cplusplus extern "C" { #endif diff --git a/include/u-boot/sha256.h b/include/u-boot/sha256.h index a4fe176c0b4..9aa1251789a 100644 --- a/include/u-boot/sha256.h +++ b/include/u-boot/sha256.h @@ -1,8 +1,6 @@ #ifndef _SHA256_H #define _SHA256_H -#include - #define SHA256_SUM_LEN 32 #define SHA256_DER_LEN 19 diff --git a/include/u-boot/sha512.h b/include/u-boot/sha512.h index 90bd96a3f8c..516729d7750 100644 --- a/include/u-boot/sha512.h +++ b/include/u-boot/sha512.h @@ -1,8 +1,6 @@ #ifndef _SHA512_H #define _SHA512_H -#include - #define SHA384_SUM_LEN 48 #define SHA384_DER_LEN 19 #define SHA512_SUM_LEN 64 diff --git a/include/virtio.h b/include/virtio.h index 17f894a79e3..8113a59d795 100644 --- a/include/virtio.h +++ b/include/virtio.h @@ -24,7 +24,6 @@ #include #include #include -#include #define VIRTIO_ID_NET 1 /* virtio net */ #define VIRTIO_ID_BLOCK 2 /* virtio block */ #define VIRTIO_ID_RNG 4 /* virtio rng */ diff --git a/include/xen/events.h b/include/xen/events.h index f0a8ef32d00..82bd18b48c8 100644 --- a/include/xen/events.h +++ b/include/xen/events.h @@ -15,7 +15,6 @@ #ifndef _EVENTS_H_ #define _EVENTS_H_ -#include #include #include diff --git a/net/arp.c b/net/arp.c index bc1e25f941f..37848ad32fb 100644 --- a/net/arp.c +++ b/net/arp.c @@ -9,10 +9,10 @@ * Copyright 2000-2002 Wolfgang Denk, wd@denx.de */ +#include #include #include #include -#include #include #include "arp.h" diff --git a/net/bootp.c b/net/bootp.c index 9dfb50749b4..86c56803c76 100644 --- a/net/bootp.c +++ b/net/bootp.c @@ -8,6 +8,7 @@ * Copyright 2000-2004 Wolfgang Denk, wd@denx.de */ +#include #include #include #include diff --git a/net/cdp.c b/net/cdp.c index d4cfc587ee3..a8f890e7522 100644 --- a/net/cdp.c +++ b/net/cdp.c @@ -9,6 +9,7 @@ * Copyright 2000-2002 Wolfgang Denk, wd@denx.de */ +#include #include #include "cdp.h" diff --git a/net/dhcpv6.c b/net/dhcpv6.c index 54619ee6983..4aea779f6f2 100644 --- a/net/dhcpv6.c +++ b/net/dhcpv6.c @@ -7,6 +7,7 @@ /* Simple DHCP6 network layer implementation. */ +#include #include #include #include diff --git a/net/dns.c b/net/dns.c index c2f0ab98c8d..5b1fe5b0103 100644 --- a/net/dns.c +++ b/net/dns.c @@ -22,6 +22,7 @@ * this stuff is worth it, you can buy me a beer in return. */ +#include #include #include #include diff --git a/net/eth-uclass.c b/net/eth-uclass.c index 4e3933fd05f..3d0ec91dfa4 100644 --- a/net/eth-uclass.c +++ b/net/eth-uclass.c @@ -7,6 +7,7 @@ #define LOG_CATEGORY UCLASS_ETH +#include #include #include #include diff --git a/net/eth_bootdev.c b/net/eth_bootdev.c index 6ee54e3c790..869adf8cbbd 100644 --- a/net/eth_bootdev.c +++ b/net/eth_bootdev.c @@ -8,6 +8,7 @@ #define LOG_CATEGORY UCLASS_BOOTSTD +#include #include #include #include diff --git a/net/eth_common.c b/net/eth_common.c index 89b5bb37189..14d4c07b695 100644 --- a/net/eth_common.c +++ b/net/eth_common.c @@ -5,6 +5,7 @@ * Joe Hershberger, National Instruments */ +#include #include #include #include diff --git a/net/fastboot_tcp.c b/net/fastboot_tcp.c index d1fccbc7238..2eb52ea2567 100644 --- a/net/fastboot_tcp.c +++ b/net/fastboot_tcp.c @@ -3,6 +3,7 @@ * Copyright (C) 2023 The Android Open Source Project */ +#include #include #include #include diff --git a/net/fastboot_udp.c b/net/fastboot_udp.c index d1479510d61..6fee441ab3b 100644 --- a/net/fastboot_udp.c +++ b/net/fastboot_udp.c @@ -3,6 +3,7 @@ * Copyright (C) 2016 The Android Open Source Project */ +#include #include #include #include diff --git a/net/link_local.c b/net/link_local.c index 179721333ff..8aec3c79969 100644 --- a/net/link_local.c +++ b/net/link_local.c @@ -11,6 +11,7 @@ * Licensed under the GPL v2 or later */ +#include #include #include #include diff --git a/net/mdio-mux-uclass.c b/net/mdio-mux-uclass.c index ee188b504d1..94b90e06576 100644 --- a/net/mdio-mux-uclass.c +++ b/net/mdio-mux-uclass.c @@ -4,6 +4,7 @@ * Alex Marginean, NXP */ +#include #include #include #include diff --git a/net/mdio-uclass.c b/net/mdio-uclass.c index 4f052ae432c..0ebfb2f1343 100644 --- a/net/mdio-uclass.c +++ b/net/mdio-uclass.c @@ -4,6 +4,7 @@ * Alex Marginean, NXP */ +#include #include #include #include diff --git a/net/ndisc.c b/net/ndisc.c index d417c5987ac..d1cec0601c8 100644 --- a/net/ndisc.c +++ b/net/ndisc.c @@ -9,6 +9,7 @@ /* Neighbour Discovery for IPv6 */ +#include #include #include #include diff --git a/net/net.c b/net/net.c index 23b5d3356af..0fb2d250773 100644 --- a/net/net.c +++ b/net/net.c @@ -81,6 +81,7 @@ */ +#include #include #include #include diff --git a/net/net6.c b/net/net6.c index 4cff98df15c..2dd64c0e161 100644 --- a/net/net6.c +++ b/net/net6.c @@ -9,12 +9,12 @@ /* Simple IPv6 network layer implementation */ +#include #include #include #include #include #include -#include /* NULL IPv6 address */ struct in6_addr const net_null_addr_ip6 = ZERO_IPV6_ADDR; diff --git a/net/nfs.c b/net/nfs.c index acc7106f10d..c18282448cc 100644 --- a/net/nfs.c +++ b/net/nfs.c @@ -30,6 +30,7 @@ * September 27, 2018. As of now, NFSv3 is the default choice. If the server * does not support NFSv3, we fall back to versions 2 or 1. */ +#include #include #include #ifdef CONFIG_SYS_DIRECT_FLASH_NFS diff --git a/net/pcap.c b/net/pcap.c index c959e3e4e51..4036d8a3fa5 100644 --- a/net/pcap.c +++ b/net/pcap.c @@ -3,10 +3,10 @@ * Copyright 2019 Ramon Fried */ +#include #include #include #include -#include #include #define LINKTYPE_ETHERNET 1 diff --git a/net/ping6.c b/net/ping6.c index 2479e08fd82..4882a17f510 100644 --- a/net/ping6.c +++ b/net/ping6.c @@ -9,6 +9,7 @@ /* Simple ping6 implementation */ +#include #include #include #include "ndisc.h" diff --git a/net/rarp.c b/net/rarp.c index a6b564e314d..231b6233c07 100644 --- a/net/rarp.c +++ b/net/rarp.c @@ -4,6 +4,7 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ +#include #include #include #include diff --git a/net/sntp.c b/net/sntp.c index 73d1d87d38b..dac0f8ceea1 100644 --- a/net/sntp.c +++ b/net/sntp.c @@ -5,6 +5,7 @@ * */ +#include #include #include #include diff --git a/net/tcp.c b/net/tcp.c index b0cc8a1fe3e..a713e1dd609 100644 --- a/net/tcp.c +++ b/net/tcp.c @@ -17,6 +17,7 @@ * - TCP application (eg wget) * Next Step HTTPS? */ +#include #include #include #include diff --git a/net/tftp.c b/net/tftp.c index 6b16bdcbe4c..2e335413492 100644 --- a/net/tftp.c +++ b/net/tftp.c @@ -5,6 +5,7 @@ * Copyright 2011 Comelit Group SpA, * Luca Ceresoli */ +#include #include #include #include diff --git a/net/udp.c b/net/udp.c index 37162260d17..a93822f511c 100644 --- a/net/udp.c +++ b/net/udp.c @@ -3,6 +3,7 @@ * Copyright (C) 2020 Philippe Reynes */ +#include #include #include diff --git a/net/wget.c b/net/wget.c index f1dd7abeff6..abab371e58e 100644 --- a/net/wget.c +++ b/net/wget.c @@ -6,6 +6,7 @@ #include #include +#include #include #include #include diff --git a/net/wol.c b/net/wol.c index 96478ba5751..0a625668a99 100644 --- a/net/wol.c +++ b/net/wol.c @@ -3,6 +3,7 @@ * Copyright 2018 Lothar Felten, lothar.felten@gmail.com */ +#include #include #include #include diff --git a/post/cpu/mpc83xx/ecc.c b/post/cpu/mpc83xx/ecc.c index 766eafa00e7..68da8ff4171 100644 --- a/post/cpu/mpc83xx/ecc.c +++ b/post/cpu/mpc83xx/ecc.c @@ -8,7 +8,7 @@ * Dave Liu */ -#include +#include #include #include #include diff --git a/post/drivers/flash.c b/post/drivers/flash.c index 21e2f940fe9..a1fcf1f135d 100644 --- a/post/drivers/flash.c +++ b/post/drivers/flash.c @@ -7,7 +7,7 @@ */ #if CFG_POST & CFG_SYS_POST_FLASH -#include +#include #include #include #include diff --git a/post/drivers/i2c.c b/post/drivers/i2c.c index 11c3c832352..557d6329a4f 100644 --- a/post/drivers/i2c.c +++ b/post/drivers/i2c.c @@ -21,7 +21,7 @@ * #endif */ -#include +#include #include #include #include diff --git a/post/drivers/memory.c b/post/drivers/memory.c index 8d4ae6fc6f1..1be2b41df45 100644 --- a/post/drivers/memory.c +++ b/post/drivers/memory.c @@ -4,7 +4,7 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ -#include +#include #include #include diff --git a/post/drivers/rtc.c b/post/drivers/rtc.c index 030954ef3dc..cc7a49847cc 100644 --- a/post/drivers/rtc.c +++ b/post/drivers/rtc.c @@ -4,7 +4,7 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ -#include +#include /* * RTC test diff --git a/post/lib_powerpc/andi.c b/post/lib_powerpc/andi.c index 3f525f51676..4f302166880 100644 --- a/post/lib_powerpc/andi.c +++ b/post/lib_powerpc/andi.c @@ -4,7 +4,7 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ -#include +#include #include /* diff --git a/post/lib_powerpc/b.c b/post/lib_powerpc/b.c index 9c9931c4f3a..0ec032dcb15 100644 --- a/post/lib_powerpc/b.c +++ b/post/lib_powerpc/b.c @@ -4,7 +4,7 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ -#include +#include #include /* diff --git a/post/lib_powerpc/cmp.c b/post/lib_powerpc/cmp.c index 9237dd53997..57f2b9694c3 100644 --- a/post/lib_powerpc/cmp.c +++ b/post/lib_powerpc/cmp.c @@ -4,7 +4,7 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ -#include +#include #include /* diff --git a/post/lib_powerpc/cmpi.c b/post/lib_powerpc/cmpi.c index 6436586b291..6e2bd636d74 100644 --- a/post/lib_powerpc/cmpi.c +++ b/post/lib_powerpc/cmpi.c @@ -4,7 +4,7 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ -#include +#include #include /* diff --git a/post/lib_powerpc/complex.c b/post/lib_powerpc/complex.c index 2899dece2c1..751bce67378 100644 --- a/post/lib_powerpc/complex.c +++ b/post/lib_powerpc/complex.c @@ -4,7 +4,7 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ -#include +#include #include /* diff --git a/post/lib_powerpc/cpu.c b/post/lib_powerpc/cpu.c index e41e6b3b97b..98a8c6392c3 100644 --- a/post/lib_powerpc/cpu.c +++ b/post/lib_powerpc/cpu.c @@ -4,7 +4,7 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ -#include +#include #include /* diff --git a/post/lib_powerpc/cr.c b/post/lib_powerpc/cr.c index 1e011f12159..3c7b6113846 100644 --- a/post/lib_powerpc/cr.c +++ b/post/lib_powerpc/cr.c @@ -4,7 +4,7 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ -#include +#include #include /* diff --git a/post/lib_powerpc/fpu/20001122-1.c b/post/lib_powerpc/fpu/20001122-1.c index d6b7bc656f6..9c1c886fc4f 100644 --- a/post/lib_powerpc/fpu/20001122-1.c +++ b/post/lib_powerpc/fpu/20001122-1.c @@ -7,7 +7,7 @@ * This file is originally a part of the GCC testsuite. */ -#include +#include #include diff --git a/post/lib_powerpc/fpu/20010114-2.c b/post/lib_powerpc/fpu/20010114-2.c index 5e79c4c6984..01bac500383 100644 --- a/post/lib_powerpc/fpu/20010114-2.c +++ b/post/lib_powerpc/fpu/20010114-2.c @@ -7,7 +7,7 @@ * This file is originally a part of the GCC testsuite. */ -#include +#include #include diff --git a/post/lib_powerpc/fpu/20010226-1.c b/post/lib_powerpc/fpu/20010226-1.c index a65ffcedb49..cc4aa0dca64 100644 --- a/post/lib_powerpc/fpu/20010226-1.c +++ b/post/lib_powerpc/fpu/20010226-1.c @@ -7,7 +7,7 @@ * This file is originally a part of the GCC testsuite. */ -#include +#include #include diff --git a/post/lib_powerpc/fpu/980619-1.c b/post/lib_powerpc/fpu/980619-1.c index 8ad256efa9f..111a2013fb5 100644 --- a/post/lib_powerpc/fpu/980619-1.c +++ b/post/lib_powerpc/fpu/980619-1.c @@ -7,7 +7,7 @@ * This file is originally a part of the GCC testsuite. */ -#include +#include #include diff --git a/post/lib_powerpc/fpu/acc1.c b/post/lib_powerpc/fpu/acc1.c index 408c391ce42..63cc3eeafc3 100644 --- a/post/lib_powerpc/fpu/acc1.c +++ b/post/lib_powerpc/fpu/acc1.c @@ -7,7 +7,7 @@ * This file is originally a part of the GCC testsuite. */ -#include +#include #include diff --git a/post/lib_powerpc/fpu/compare-fp-1.c b/post/lib_powerpc/fpu/compare-fp-1.c index 4b8537ea3db..4b4589664f1 100644 --- a/post/lib_powerpc/fpu/compare-fp-1.c +++ b/post/lib_powerpc/fpu/compare-fp-1.c @@ -9,7 +9,7 @@ * This file is originally a part of the GCC testsuite. */ -#include +#include #include diff --git a/post/lib_powerpc/fpu/fpu.c b/post/lib_powerpc/fpu/fpu.c index 2afe27ab355..59109f71e36 100644 --- a/post/lib_powerpc/fpu/fpu.c +++ b/post/lib_powerpc/fpu/fpu.c @@ -6,7 +6,7 @@ * Author: Sergei Poselenov */ -#include +#include /* * FPU test diff --git a/post/lib_powerpc/fpu/mul-subnormal-single-1.c b/post/lib_powerpc/fpu/mul-subnormal-single-1.c index 6b86e55e409..891aa95685f 100644 --- a/post/lib_powerpc/fpu/mul-subnormal-single-1.c +++ b/post/lib_powerpc/fpu/mul-subnormal-single-1.c @@ -9,7 +9,7 @@ * numbers) are rounded to within 0.5 ulp. PR other/14354. */ -#include +#include #include diff --git a/post/lib_powerpc/load.c b/post/lib_powerpc/load.c index 0a2a4222846..e4ac6bf186f 100644 --- a/post/lib_powerpc/load.c +++ b/post/lib_powerpc/load.c @@ -4,7 +4,7 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ -#include +#include #include /* diff --git a/post/lib_powerpc/multi.c b/post/lib_powerpc/multi.c index 6f991443741..4df45790ab6 100644 --- a/post/lib_powerpc/multi.c +++ b/post/lib_powerpc/multi.c @@ -4,7 +4,7 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ -#include +#include #include #include diff --git a/post/lib_powerpc/rlwimi.c b/post/lib_powerpc/rlwimi.c index 35a9e9b83bf..da219132257 100644 --- a/post/lib_powerpc/rlwimi.c +++ b/post/lib_powerpc/rlwimi.c @@ -4,7 +4,7 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ -#include +#include #include /* diff --git a/post/lib_powerpc/rlwinm.c b/post/lib_powerpc/rlwinm.c index 2995eb358ef..b0b976f98af 100644 --- a/post/lib_powerpc/rlwinm.c +++ b/post/lib_powerpc/rlwinm.c @@ -4,7 +4,7 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ -#include +#include #include /* diff --git a/post/lib_powerpc/rlwnm.c b/post/lib_powerpc/rlwnm.c index 3ba3a7607ab..22cd4568fc8 100644 --- a/post/lib_powerpc/rlwnm.c +++ b/post/lib_powerpc/rlwnm.c @@ -4,7 +4,7 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ -#include +#include #include /* diff --git a/post/lib_powerpc/srawi.c b/post/lib_powerpc/srawi.c index bd59ac4f36b..a103df75eb1 100644 --- a/post/lib_powerpc/srawi.c +++ b/post/lib_powerpc/srawi.c @@ -4,7 +4,7 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ -#include +#include #include /* diff --git a/post/lib_powerpc/store.c b/post/lib_powerpc/store.c index 470ea37e77d..71a4b6aba43 100644 --- a/post/lib_powerpc/store.c +++ b/post/lib_powerpc/store.c @@ -4,7 +4,7 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ -#include +#include #include /* diff --git a/post/lib_powerpc/string.c b/post/lib_powerpc/string.c index c4ea5cf9ba9..21e02bcb266 100644 --- a/post/lib_powerpc/string.c +++ b/post/lib_powerpc/string.c @@ -4,7 +4,7 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ -#include +#include #include /* diff --git a/post/lib_powerpc/three.c b/post/lib_powerpc/three.c index e65d7f023f9..68339b05ef2 100644 --- a/post/lib_powerpc/three.c +++ b/post/lib_powerpc/three.c @@ -4,7 +4,7 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ -#include +#include #include /* diff --git a/post/lib_powerpc/threei.c b/post/lib_powerpc/threei.c index 0c3a2e6674b..885dd8cb095 100644 --- a/post/lib_powerpc/threei.c +++ b/post/lib_powerpc/threei.c @@ -4,7 +4,7 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ -#include +#include #include /* diff --git a/post/lib_powerpc/threex.c b/post/lib_powerpc/threex.c index 24ebc98d48d..62ac713ecff 100644 --- a/post/lib_powerpc/threex.c +++ b/post/lib_powerpc/threex.c @@ -4,7 +4,7 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ -#include +#include #include /* diff --git a/post/lib_powerpc/two.c b/post/lib_powerpc/two.c index 28c70ec8897..7985669ba6e 100644 --- a/post/lib_powerpc/two.c +++ b/post/lib_powerpc/two.c @@ -4,7 +4,7 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ -#include +#include #include /* diff --git a/post/lib_powerpc/twox.c b/post/lib_powerpc/twox.c index 7f6a898d639..33d1a1d8d91 100644 --- a/post/lib_powerpc/twox.c +++ b/post/lib_powerpc/twox.c @@ -4,7 +4,7 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ -#include +#include #include /* diff --git a/post/post.c b/post/post.c index 705f94ccc91..946d9094d45 100644 --- a/post/post.c +++ b/post/post.c @@ -4,7 +4,7 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ -#include +#include #include #include #include diff --git a/post/tests.c b/post/tests.c index 208710a48ba..8cea428fcdc 100644 --- a/post/tests.c +++ b/post/tests.c @@ -4,8 +4,7 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ -#include -#include +#include #include diff --git a/scripts/Makefile.autoconf b/scripts/Makefile.autoconf index b42f9b525fe..8208ffe2274 100644 --- a/scripts/Makefile.autoconf +++ b/scripts/Makefile.autoconf @@ -45,7 +45,7 @@ c_flags := $(KBUILD_CFLAGS) $(KBUILD_CPPFLAGS) $(PLATFORM_CPPFLAGS) \ quiet_cmd_autoconf_dep = GEN $@ cmd_autoconf_dep = $(CC) -x c -DDO_DEPS_ONLY -M -MP $(c_flags) \ - -MQ include/config/auto.conf include/config.h > $@ || { \ + -MQ include/config/auto.conf $(srctree)/include/common.h > $@ || { \ rm $@; false; \ } include/autoconf.mk.dep: include/config.h FORCE @@ -70,7 +70,7 @@ quiet_cmd_autoconf = GEN $@ quiet_cmd_u_boot_cfg = CFG $@ cmd_u_boot_cfg = \ - $(CPP) $(c_flags) $2 -DDO_DEPS_ONLY -dM include/config.h > $@.tmp && { \ + $(CPP) $(c_flags) $2 -DDO_DEPS_ONLY -dM $(srctree)/include/common.h > $@.tmp && { \ grep 'define CONFIG_' $@.tmp | \ sed '/define CONFIG_IS_ENABLED(/d;/define CONFIG_IF_ENABLED_INT(/d;/define CONFIG_VAL(/d;' > $@; \ rm $@.tmp; \ diff --git a/scripts/gen_ll_addressable_symbols.sh b/scripts/gen_ll_addressable_symbols.sh index 13f670ae0ef..d0864804aaf 100755 --- a/scripts/gen_ll_addressable_symbols.sh +++ b/scripts/gen_ll_addressable_symbols.sh @@ -10,6 +10,6 @@ set -e -echo '#include ' +echo '#include ' $@ 2>/dev/null | grep -oe '_u_boot_list_2_[a-zA-Z0-9_]*_2_[a-zA-Z0-9_]*' | \ sort -u | sed -e 's/^\(.*\)/extern char \1[];\n__ADDRESSABLE(\1);/' diff --git a/test/bloblist.c b/test/bloblist.c index 7c63682908a..1c60bbac36c 100644 --- a/test/bloblist.c +++ b/test/bloblist.c @@ -3,6 +3,7 @@ * Copyright (c) 2018, Google Inc. All rights reserved. */ +#include #include #include #include diff --git a/test/boot/bootdev.c b/test/boot/bootdev.c index 6e940002f84..0702fccdae6 100644 --- a/test/boot/bootdev.c +++ b/test/boot/bootdev.c @@ -6,6 +6,7 @@ * Written by Simon Glass */ +#include #include #include #include diff --git a/test/boot/bootflow.c b/test/boot/bootflow.c index 4511cfa7f9b..674d4c05f83 100644 --- a/test/boot/bootflow.c +++ b/test/boot/bootflow.c @@ -6,6 +6,7 @@ * Written by Simon Glass */ +#include #include #include #include diff --git a/test/boot/bootmeth.c b/test/boot/bootmeth.c index 113b789ea79..e498eee036e 100644 --- a/test/boot/bootmeth.c +++ b/test/boot/bootmeth.c @@ -6,6 +6,7 @@ * Written by Simon Glass */ +#include #include #include #include diff --git a/test/boot/bootstd_common.c b/test/boot/bootstd_common.c index e50539500a0..cc97e255e5c 100644 --- a/test/boot/bootstd_common.c +++ b/test/boot/bootstd_common.c @@ -6,6 +6,7 @@ * Written by Simon Glass */ +#include #include #include #include diff --git a/test/boot/cedit.c b/test/boot/cedit.c index fd19da0a0c0..aa417190486 100644 --- a/test/boot/cedit.c +++ b/test/boot/cedit.c @@ -4,6 +4,7 @@ * Written by Simon Glass */ +#include #include #include #include diff --git a/test/boot/expo.c b/test/boot/expo.c index 6ea0184373d..714fdfa415d 100644 --- a/test/boot/expo.c +++ b/test/boot/expo.c @@ -4,6 +4,7 @@ * Written by Simon Glass */ +#include #include #include #include diff --git a/test/boot/image.c b/test/boot/image.c index 0894e30587f..2844b057859 100644 --- a/test/boot/image.c +++ b/test/boot/image.c @@ -6,6 +6,7 @@ * Written by Simon Glass */ +#include #include #include #include diff --git a/test/boot/measurement.c b/test/boot/measurement.c index 29be495412d..9db2ed324c2 100644 --- a/test/boot/measurement.c +++ b/test/boot/measurement.c @@ -6,6 +6,7 @@ * Written by Eddie James */ +#include #include #include #include diff --git a/test/boot/vbe_fixup.c b/test/boot/vbe_fixup.c index 540816e42b0..eba5c4ebe6c 100644 --- a/test/boot/vbe_fixup.c +++ b/test/boot/vbe_fixup.c @@ -6,6 +6,7 @@ * Written by Simon Glass */ +#include #include #include #include diff --git a/test/boot/vbe_simple.c b/test/boot/vbe_simple.c index 3672b744e5f..5e61840652c 100644 --- a/test/boot/vbe_simple.c +++ b/test/boot/vbe_simple.c @@ -6,6 +6,7 @@ * Written by Simon Glass */ +#include #include #include #include diff --git a/test/bootm.c b/test/bootm.c index 26c15552bf6..4bb3ca0655c 100644 --- a/test/bootm.c +++ b/test/bootm.c @@ -5,6 +5,7 @@ * Copyright 2020 Google LLC */ +#include #include #include #include diff --git a/test/cmd/addrmap.c b/test/cmd/addrmap.c index 7b8f49fd375..1eb5955db17 100644 --- a/test/cmd/addrmap.c +++ b/test/cmd/addrmap.c @@ -5,6 +5,7 @@ * Copyright (C) 2021, Bin Meng */ +#include #include #include #include diff --git a/test/cmd/armffa.c b/test/cmd/armffa.c index 38f40b72f5e..9a44a397e8a 100644 --- a/test/cmd/armffa.c +++ b/test/cmd/armffa.c @@ -8,6 +8,7 @@ * Abdellatif El Khlifi */ +#include #include #include #include diff --git a/test/cmd/bdinfo.c b/test/cmd/bdinfo.c index 027848c3e24..4977d01f62d 100644 --- a/test/cmd/bdinfo.c +++ b/test/cmd/bdinfo.c @@ -5,6 +5,7 @@ * Copyright 2023 Marek Vasut */ +#include #include #include #include diff --git a/test/cmd/exit.c b/test/cmd/exit.c index d310ec8531b..7e160f7e4bb 100644 --- a/test/cmd/exit.c +++ b/test/cmd/exit.c @@ -5,6 +5,7 @@ * Copyright 2022 Marek Vasut */ +#include #include #include #include diff --git a/test/cmd/fdt.c b/test/cmd/fdt.c index a0faf5aca90..54708552175 100644 --- a/test/cmd/fdt.c +++ b/test/cmd/fdt.c @@ -5,6 +5,7 @@ * Copyright 2022 Google LLC */ +#include #include #include #include diff --git a/test/cmd/font.c b/test/cmd/font.c index a8905ce617e..1fe05c1ead5 100644 --- a/test/cmd/font.c +++ b/test/cmd/font.c @@ -5,6 +5,7 @@ * Copyright 2022 Google LLC */ +#include #include #include #include diff --git a/test/cmd/history.c b/test/cmd/history.c index 6964bfa9e1e..06517fcdbb5 100644 --- a/test/cmd/history.c +++ b/test/cmd/history.c @@ -6,6 +6,7 @@ * Written by Simon Glass */ +#include #include #include #include diff --git a/test/cmd/loadm.c b/test/cmd/loadm.c index dff8a97d139..41e005ac592 100644 --- a/test/cmd/loadm.c +++ b/test/cmd/loadm.c @@ -9,6 +9,7 @@ * Rui Miguel Silva */ +#include #include #include #include diff --git a/test/cmd/mem.c b/test/cmd/mem.c index f1bbab6055b..d76f47cf311 100644 --- a/test/cmd/mem.c +++ b/test/cmd/mem.c @@ -5,6 +5,7 @@ * Copyright 2020 Google LLC */ +#include #include #include #include diff --git a/test/cmd/mem_search.c b/test/cmd/mem_search.c index 55ad2fac1e3..f80c9c40687 100644 --- a/test/cmd/mem_search.c +++ b/test/cmd/mem_search.c @@ -6,6 +6,7 @@ * Written by Simon Glass */ +#include #include #include #include diff --git a/test/cmd/pci_mps.c b/test/cmd/pci_mps.c index 2a64143eecd..fd96f4fba6c 100644 --- a/test/cmd/pci_mps.c +++ b/test/cmd/pci_mps.c @@ -7,6 +7,7 @@ * Written by Stephen Carlson */ +#include #include #include #include diff --git a/test/cmd/pinmux.c b/test/cmd/pinmux.c index 4253baa5646..df40bb77435 100644 --- a/test/cmd/pinmux.c +++ b/test/cmd/pinmux.c @@ -5,6 +5,7 @@ * Copyright (C) 2021, STMicroelectronics - All Rights Reserved */ +#include #include #include #include diff --git a/test/cmd/rw.c b/test/cmd/rw.c index edd762e4d58..98302bf047b 100644 --- a/test/cmd/rw.c +++ b/test/cmd/rw.c @@ -3,6 +3,7 @@ * Tests for read and write commands */ +#include #include #include #include diff --git a/test/cmd/seama.c b/test/cmd/seama.c index b60f6550b13..b1b56930c64 100644 --- a/test/cmd/seama.c +++ b/test/cmd/seama.c @@ -5,6 +5,7 @@ * Copyright (C) 2021 Linus Walleij */ +#include #include #include #include diff --git a/test/cmd/setexpr.c b/test/cmd/setexpr.c index d50ce5803c3..ee329e94b85 100644 --- a/test/cmd/setexpr.c +++ b/test/cmd/setexpr.c @@ -6,6 +6,7 @@ * Written by Simon Glass */ +#include #include #include #include diff --git a/test/cmd/temperature.c b/test/cmd/temperature.c index 364972626b1..2a1ea0611dc 100644 --- a/test/cmd/temperature.c +++ b/test/cmd/temperature.c @@ -5,6 +5,7 @@ * Copyright (C) 2022 Sartura Ltd. */ +#include #include #include #include diff --git a/test/cmd/test_echo.c b/test/cmd/test_echo.c index cde74ebeb61..091e4f823c9 100644 --- a/test/cmd/test_echo.c +++ b/test/cmd/test_echo.c @@ -5,6 +5,7 @@ * Copyright 2020, Heinrich Schuchadt */ +#include #include #include #include diff --git a/test/cmd/test_pause.c b/test/cmd/test_pause.c index 3703290350b..2b85cce3271 100644 --- a/test/cmd/test_pause.c +++ b/test/cmd/test_pause.c @@ -5,6 +5,7 @@ * Copyright 2022, Samuel Dionne-Riel */ +#include #include #include #include diff --git a/test/cmd/wget.c b/test/cmd/wget.c index 356a4dcd8fa..ed83fc94a5e 100644 --- a/test/cmd/wget.c +++ b/test/cmd/wget.c @@ -6,6 +6,7 @@ * Ying-Chun Liu (PaulLiu) */ +#include #include #include #include diff --git a/test/cmd_ut.c b/test/cmd_ut.c index 4e4aa8f1cb2..0677ce0cd17 100644 --- a/test/cmd_ut.c +++ b/test/cmd_ut.c @@ -4,9 +4,9 @@ * Joe Hershberger, National Instruments, joe.hershberger@ni.com */ +#include #include #include -#include #include #include #include diff --git a/test/command_ut.c b/test/command_ut.c index 2b8d28d7ae3..a74bd109e15 100644 --- a/test/command_ut.c +++ b/test/command_ut.c @@ -5,6 +5,7 @@ #define DEBUG +#include #include #include #include diff --git a/test/common/cmd_ut_common.c b/test/common/cmd_ut_common.c index 2f03a58af47..2c0267801b2 100644 --- a/test/common/cmd_ut_common.c +++ b/test/common/cmd_ut_common.c @@ -6,6 +6,7 @@ * Unit tests for common functions */ +#include #include #include #include diff --git a/test/common/cread.c b/test/common/cread.c index e159caed041..4edc7739604 100644 --- a/test/common/cread.c +++ b/test/common/cread.c @@ -3,8 +3,8 @@ * Copyright 2023 Google LLC */ +#include #include -#include #include #include #include diff --git a/test/common/cyclic.c b/test/common/cyclic.c index 461f8cf91f4..6e758e89dbd 100644 --- a/test/common/cyclic.c +++ b/test/common/cyclic.c @@ -3,6 +3,7 @@ * Copyright (C) 2022 Stefan Roese */ +#include #include #include #include diff --git a/test/common/event.c b/test/common/event.c index de433d34f22..b462694fc3b 100644 --- a/test/common/event.c +++ b/test/common/event.c @@ -6,6 +6,7 @@ * Written by Simon Glass */ +#include #include #include #include diff --git a/test/common/test_autoboot.c b/test/common/test_autoboot.c index 4ba1dcc8091..42a1e4ab1fa 100644 --- a/test/common/test_autoboot.c +++ b/test/common/test_autoboot.c @@ -6,6 +6,7 @@ */ #include +#include #include #include #include diff --git a/test/compression.c b/test/compression.c index aa1d38bb7bc..3df90819a1f 100644 --- a/test/compression.c +++ b/test/compression.c @@ -3,6 +3,7 @@ * Copyright (c) 2013, The Chromium Authors */ +#include #include #include #include diff --git a/test/dm/acpi.c b/test/dm/acpi.c index 4db2171a4b1..f14b3962f84 100644 --- a/test/dm/acpi.c +++ b/test/dm/acpi.c @@ -6,6 +6,7 @@ * Written by Simon Glass */ +#include #include #include #include diff --git a/test/dm/acpi_dp.c b/test/dm/acpi_dp.c index 87bd8ae6749..44bcabda6bc 100644 --- a/test/dm/acpi_dp.c +++ b/test/dm/acpi_dp.c @@ -6,6 +6,7 @@ * Written by Simon Glass */ +#include #include #include #include diff --git a/test/dm/acpigen.c b/test/dm/acpigen.c index 7113219792e..15b2b6f64a0 100644 --- a/test/dm/acpigen.c +++ b/test/dm/acpigen.c @@ -6,6 +6,7 @@ * Written by Simon Glass */ +#include #include #include #include diff --git a/test/dm/adc.c b/test/dm/adc.c index a26a677074a..740167e16b8 100644 --- a/test/dm/adc.c +++ b/test/dm/adc.c @@ -6,6 +6,7 @@ * Przemyslaw Marczak */ +#include #include #include #include diff --git a/test/dm/audio.c b/test/dm/audio.c index 3d1d821f323..add15ae20e0 100644 --- a/test/dm/audio.c +++ b/test/dm/audio.c @@ -4,6 +4,7 @@ * Written by Simon Glass */ +#include #include #include #include diff --git a/test/dm/axi.c b/test/dm/axi.c index 0900a9b5485..dc029df5e44 100644 --- a/test/dm/axi.c +++ b/test/dm/axi.c @@ -4,6 +4,7 @@ * Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc */ +#include #include #include #include diff --git a/test/dm/blk.c b/test/dm/blk.c index d03aec32f6c..799f1e4dc75 100644 --- a/test/dm/blk.c +++ b/test/dm/blk.c @@ -3,6 +3,7 @@ * Copyright (C) 2015 Google, Inc */ +#include #include #include #include diff --git a/test/dm/blkmap.c b/test/dm/blkmap.c index 7581e62df3b..7a163d6eaef 100644 --- a/test/dm/blkmap.c +++ b/test/dm/blkmap.c @@ -4,6 +4,7 @@ * Author: Tobias Waldekranz */ +#include #include #include #include diff --git a/test/dm/bootcount.c b/test/dm/bootcount.c index 9cfc7d48aac..b77b472d1f2 100644 --- a/test/dm/bootcount.c +++ b/test/dm/bootcount.c @@ -3,6 +3,7 @@ * (C) 2018 Theobroma Systems Design und Consulting GmbH */ +#include #include #include #include diff --git a/test/dm/bus.c b/test/dm/bus.c index a338c7f567c..89a6aa6554c 100644 --- a/test/dm/bus.c +++ b/test/dm/bus.c @@ -3,6 +3,7 @@ * Copyright (c) 2014 Google, Inc */ +#include #ifdef CONFIG_SANDBOX #include #include diff --git a/test/dm/button.c b/test/dm/button.c index 9157ec92878..830d96fbef3 100644 --- a/test/dm/button.c +++ b/test/dm/button.c @@ -5,6 +5,7 @@ * Based on led.c */ +#include #include #include #include diff --git a/test/dm/cache.c b/test/dm/cache.c index d2f3bfe2caf..bbd8f98d007 100644 --- a/test/dm/cache.c +++ b/test/dm/cache.c @@ -3,6 +3,7 @@ * Copyright (C) 2019 Intel Corporation */ +#include #include #include diff --git a/test/dm/clk.c b/test/dm/clk.c index a966471dbd9..57fabbdce08 100644 --- a/test/dm/clk.c +++ b/test/dm/clk.c @@ -3,6 +3,7 @@ * Copyright (C) 2015 Google, Inc */ +#include #include #include #include diff --git a/test/dm/clk_ccf.c b/test/dm/clk_ccf.c index 15fba31b962..61dad8d8527 100644 --- a/test/dm/clk_ccf.c +++ b/test/dm/clk_ccf.c @@ -4,6 +4,7 @@ * Lukasz Majewski, DENX Software Engineering, lukma@denx.de */ +#include #include #include #include diff --git a/test/dm/core.c b/test/dm/core.c index 4741c81bcc1..7f3f8d183bc 100644 --- a/test/dm/core.c +++ b/test/dm/core.c @@ -5,6 +5,7 @@ * Copyright (c) 2013 Google, Inc */ +#include #include #include #include diff --git a/test/dm/cpu.c b/test/dm/cpu.c index acba8105996..5734cd0a92d 100644 --- a/test/dm/cpu.c +++ b/test/dm/cpu.c @@ -4,6 +4,7 @@ * Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc */ +#include #include #include #include diff --git a/test/dm/cros_ec.c b/test/dm/cros_ec.c index ac0055f0acd..30cb70e0882 100644 --- a/test/dm/cros_ec.c +++ b/test/dm/cros_ec.c @@ -3,6 +3,7 @@ * Copyright 2021 Google LLC */ +#include #include #include #include diff --git a/test/dm/cros_ec_pwm.c b/test/dm/cros_ec_pwm.c index f68ee6f33b8..f8d6e1e6c40 100644 --- a/test/dm/cros_ec_pwm.c +++ b/test/dm/cros_ec_pwm.c @@ -1,5 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ +#include #include #include #include diff --git a/test/dm/devres.c b/test/dm/devres.c index 95a470b9f1c..3df0f64362d 100644 --- a/test/dm/devres.c +++ b/test/dm/devres.c @@ -5,6 +5,7 @@ * Copyright 2019 Google LLC */ +#include #include #include #include diff --git a/test/dm/dma.c b/test/dm/dma.c index 949710fdb4e..cce47cb2180 100644 --- a/test/dm/dma.c +++ b/test/dm/dma.c @@ -6,6 +6,7 @@ * Grygorii Strashko */ +#include #include #include #include diff --git a/test/dm/dsi_host.c b/test/dm/dsi_host.c index 68686a40d9f..6e0a5df704f 100644 --- a/test/dm/dsi_host.c +++ b/test/dm/dsi_host.c @@ -4,6 +4,7 @@ * Author(s): Yannick Fertre for STMicroelectronics. */ +#include #include #include #include diff --git a/test/dm/efi_media.c b/test/dm/efi_media.c index 9d0ed0f0755..e343a0e9c85 100644 --- a/test/dm/efi_media.c +++ b/test/dm/efi_media.c @@ -5,6 +5,7 @@ * Copyright 2021 Google LLC */ +#include #include #include #include diff --git a/test/dm/eth.c b/test/dm/eth.c index 820b8cbfc29..bb3dcc6b954 100644 --- a/test/dm/eth.c +++ b/test/dm/eth.c @@ -6,6 +6,7 @@ * Joe Hershberger */ +#include #include #include #include diff --git a/test/dm/fastboot.c b/test/dm/fastboot.c index 5d938eb7f12..758538d0e85 100644 --- a/test/dm/fastboot.c +++ b/test/dm/fastboot.c @@ -3,6 +3,7 @@ * Copyright (C) 2015 Google, Inc */ +#include #include #include #include diff --git a/test/dm/fdtdec.c b/test/dm/fdtdec.c index b484414f5f0..087d4846da8 100644 --- a/test/dm/fdtdec.c +++ b/test/dm/fdtdec.c @@ -3,6 +3,7 @@ * Copyright 2020 NXP */ +#include #include #include #include diff --git a/test/dm/ffa.c b/test/dm/ffa.c index fa6d54d00d6..6912666bb46 100644 --- a/test/dm/ffa.c +++ b/test/dm/ffa.c @@ -8,6 +8,7 @@ * Abdellatif El Khlifi */ +#include #include #include #include diff --git a/test/dm/firmware.c b/test/dm/firmware.c index ec68e816999..f37bccfe4a8 100644 --- a/test/dm/firmware.c +++ b/test/dm/firmware.c @@ -3,6 +3,7 @@ * Copyright (C) 2018 Xilinx, Inc. */ +#include #include #include #include diff --git a/test/dm/fwu_mdata.c b/test/dm/fwu_mdata.c index 43ce3d0a9d8..52018f610fe 100644 --- a/test/dm/fwu_mdata.c +++ b/test/dm/fwu_mdata.c @@ -5,6 +5,7 @@ */ #include +#include #include #include #include diff --git a/test/dm/gpio.c b/test/dm/gpio.c index 957ab25c8d3..0d88ec24bda 100644 --- a/test/dm/gpio.c +++ b/test/dm/gpio.c @@ -3,6 +3,7 @@ * Copyright (C) 2013 Google, Inc */ +#include #include #include #include diff --git a/test/dm/host.c b/test/dm/host.c index e514f8409cf..ca05a36b313 100644 --- a/test/dm/host.c +++ b/test/dm/host.c @@ -4,6 +4,7 @@ * Written by Simon Glass */ +#include #include #include #include diff --git a/test/dm/hwspinlock.c b/test/dm/hwspinlock.c index a05b183b8bc..995759d4d7e 100644 --- a/test/dm/hwspinlock.c +++ b/test/dm/hwspinlock.c @@ -3,6 +3,7 @@ * Copyright (C) 2018, STMicroelectronics - All Rights Reserved */ +#include #include #include #include diff --git a/test/dm/i2c.c b/test/dm/i2c.c index e9cf9f7819a..b46a22e79b1 100644 --- a/test/dm/i2c.c +++ b/test/dm/i2c.c @@ -5,6 +5,7 @@ * Note: Test coverage does not include 10-bit addressing */ +#include #include #include #include diff --git a/test/dm/i2s.c b/test/dm/i2s.c index a3d3a31b6fb..c2bf4d5604b 100644 --- a/test/dm/i2s.c +++ b/test/dm/i2s.c @@ -4,6 +4,7 @@ * Written by Simon Glass */ +#include #include #include #include diff --git a/test/dm/iommu.c b/test/dm/iommu.c index acea5f28971..62d38f1214a 100644 --- a/test/dm/iommu.c +++ b/test/dm/iommu.c @@ -3,6 +3,7 @@ * Copyright (C) 2021 Mark Kettenis */ +#include #include #include #include diff --git a/test/dm/irq.c b/test/dm/irq.c index d22772ab769..51dd5e4abb4 100644 --- a/test/dm/irq.c +++ b/test/dm/irq.c @@ -5,6 +5,7 @@ * Copyright 2019 Google LLC */ +#include #include #include #include diff --git a/test/dm/k210_pll.c b/test/dm/k210_pll.c index 2a581499634..354720f61e2 100644 --- a/test/dm/k210_pll.c +++ b/test/dm/k210_pll.c @@ -3,6 +3,7 @@ * Copyright (C) 2020 Sean Anderson */ +#include /* For DIV_ROUND_DOWN_ULL, defined in linux/kernel.h */ #include #include diff --git a/test/dm/led.c b/test/dm/led.c index c28fa044f45..eed3f4654c5 100644 --- a/test/dm/led.c +++ b/test/dm/led.c @@ -3,6 +3,7 @@ * Copyright (C) 2015 Google, Inc */ +#include #include #include #include diff --git a/test/dm/mailbox.c b/test/dm/mailbox.c index 14f72d58d1c..7ad8a1cbba2 100644 --- a/test/dm/mailbox.c +++ b/test/dm/mailbox.c @@ -3,6 +3,7 @@ * Copyright (c) 2016, NVIDIA CORPORATION. */ +#include #include #include #include diff --git a/test/dm/mdio.c b/test/dm/mdio.c index 7ececf37ccc..f863c52645b 100644 --- a/test/dm/mdio.c +++ b/test/dm/mdio.c @@ -4,6 +4,7 @@ * Alex Marginean, NXP */ +#include #include #include #include diff --git a/test/dm/mdio_mux.c b/test/dm/mdio_mux.c index 33a7e972609..bfe3518221f 100644 --- a/test/dm/mdio_mux.c +++ b/test/dm/mdio_mux.c @@ -4,6 +4,7 @@ * Alex Marginean, NXP */ +#include #include #include #include diff --git a/test/dm/misc.c b/test/dm/misc.c index ad856fd01b6..8bdd8c64bca 100644 --- a/test/dm/misc.c +++ b/test/dm/misc.c @@ -4,6 +4,7 @@ * Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc */ +#include #include #include #include diff --git a/test/dm/mmc.c b/test/dm/mmc.c index c0abea797d9..b1eb8bee2f9 100644 --- a/test/dm/mmc.c +++ b/test/dm/mmc.c @@ -3,6 +3,7 @@ * Copyright (C) 2015 Google, Inc */ +#include #include #include #include diff --git a/test/dm/mux-cmd.c b/test/dm/mux-cmd.c index d4bb8befa38..11c237b5da9 100644 --- a/test/dm/mux-cmd.c +++ b/test/dm/mux-cmd.c @@ -3,6 +3,7 @@ * Copyright (C) 2020 Texas Instruments Inc. * Pratyush Yadav */ +#include #include #include #include @@ -12,7 +13,6 @@ #include #include #include -#include #define BUF_SIZE 256 diff --git a/test/dm/mux-emul.c b/test/dm/mux-emul.c index febd521104a..c6aeeb7e1f1 100644 --- a/test/dm/mux-emul.c +++ b/test/dm/mux-emul.c @@ -3,6 +3,7 @@ * Copyright (C) 2020 Texas Instruments Incorporated - https://www.ti.com/ * Pratyush Yadav */ +#include #include #include #include diff --git a/test/dm/mux-mmio.c b/test/dm/mux-mmio.c index 3a871a19c7e..27c881dabde 100644 --- a/test/dm/mux-mmio.c +++ b/test/dm/mux-mmio.c @@ -4,6 +4,7 @@ * Jean-Jacques Hiblot */ +#include #include #include #include diff --git a/test/dm/nop.c b/test/dm/nop.c index 0c79431d9d8..f7d9a0f3df3 100644 --- a/test/dm/nop.c +++ b/test/dm/nop.c @@ -6,6 +6,7 @@ * Jean-Jacques Hiblot */ +#include #include #include #include diff --git a/test/dm/nvmxip.c b/test/dm/nvmxip.c index 537959a0930..f0ad47d4efe 100644 --- a/test/dm/nvmxip.c +++ b/test/dm/nvmxip.c @@ -8,6 +8,7 @@ * Abdellatif El Khlifi */ +#include #include #include #include diff --git a/test/dm/of_extra.c b/test/dm/of_extra.c index 3c31bfcd31f..ac2d886892d 100644 --- a/test/dm/of_extra.c +++ b/test/dm/of_extra.c @@ -4,6 +4,7 @@ * Written by Simon Glass */ +#include #include #include #include diff --git a/test/dm/of_platdata.c b/test/dm/of_platdata.c index d4939e88516..a241c427936 100644 --- a/test/dm/of_platdata.c +++ b/test/dm/of_platdata.c @@ -1,5 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ +#include #include #include #include diff --git a/test/dm/ofnode.c b/test/dm/ofnode.c index 39191d7f52b..a5bc43aea4e 100644 --- a/test/dm/ofnode.c +++ b/test/dm/ofnode.c @@ -16,6 +16,7 @@ * behaviour of each ofnode function, since that is done by the normal ones. */ +#include #include #include #include diff --git a/test/dm/ofread.c b/test/dm/ofread.c index 69d03c49107..3523860d2b3 100644 --- a/test/dm/ofread.c +++ b/test/dm/ofread.c @@ -1,5 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ +#include #include #include #include diff --git a/test/dm/osd.c b/test/dm/osd.c index cf4a3a545ed..6279b391ca5 100644 --- a/test/dm/osd.c +++ b/test/dm/osd.c @@ -4,6 +4,7 @@ * Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc */ +#include #include #include #include diff --git a/test/dm/p2sb.c b/test/dm/p2sb.c index 3ada1fcb362..df24709141a 100644 --- a/test/dm/p2sb.c +++ b/test/dm/p2sb.c @@ -5,6 +5,7 @@ * Copyright 2019 Google LLC */ +#include #include #include #include diff --git a/test/dm/panel.c b/test/dm/panel.c index 8be7c397a46..4d435a0d255 100644 --- a/test/dm/panel.c +++ b/test/dm/panel.c @@ -6,6 +6,7 @@ * Written by Simon Glass */ +#include #include #include #include diff --git a/test/dm/part.c b/test/dm/part.c index cabb31d18ca..d6e43458127 100644 --- a/test/dm/part.c +++ b/test/dm/part.c @@ -3,6 +3,7 @@ * Copyright (C) 2020 Sean Anderson */ +#include #include #include #include diff --git a/test/dm/pch.c b/test/dm/pch.c index b37b856d5da..53f7bbf180c 100644 --- a/test/dm/pch.c +++ b/test/dm/pch.c @@ -3,6 +3,7 @@ * Copyright 2018 Google LLC */ +#include #include #include #include diff --git a/test/dm/pci.c b/test/dm/pci.c index 9b97f2e0544..8c5e7da9e62 100644 --- a/test/dm/pci.c +++ b/test/dm/pci.c @@ -3,6 +3,7 @@ * Copyright (C) 2015 Google, Inc */ +#include #include #include #include diff --git a/test/dm/pci_ep.c b/test/dm/pci_ep.c index e82fc53f84b..9941abd4ceb 100644 --- a/test/dm/pci_ep.c +++ b/test/dm/pci_ep.c @@ -3,6 +3,7 @@ * Copyright (C) 2019 Ramon Fried */ +#include #include #include #include diff --git a/test/dm/phy.c b/test/dm/phy.c index d14117f6f7a..0cf3689fdec 100644 --- a/test/dm/phy.c +++ b/test/dm/phy.c @@ -4,6 +4,7 @@ * Written by Jean-Jacques Hiblot */ +#include #include #include #include diff --git a/test/dm/phys2bus.c b/test/dm/phys2bus.c index 1ee2150482c..342f2fa8eba 100644 --- a/test/dm/phys2bus.c +++ b/test/dm/phys2bus.c @@ -3,6 +3,7 @@ * Copyright (c) 2020 Nicolas Saenz Julienne */ +#include #include #include #include diff --git a/test/dm/pinmux.c b/test/dm/pinmux.c index cfbe3ef5d1e..6880b2d2cd9 100644 --- a/test/dm/pinmux.c +++ b/test/dm/pinmux.c @@ -3,6 +3,7 @@ * Copyright (C) 2020 Sean Anderson */ +#include #include #include #include diff --git a/test/dm/pmc.c b/test/dm/pmc.c index bbad1ee2741..e70227e7800 100644 --- a/test/dm/pmc.c +++ b/test/dm/pmc.c @@ -5,6 +5,7 @@ * Copyright 2019 Google LLC */ +#include #include #include #include diff --git a/test/dm/pmic.c b/test/dm/pmic.c index 53a6f0369e8..ce671202fbc 100644 --- a/test/dm/pmic.c +++ b/test/dm/pmic.c @@ -6,6 +6,7 @@ * Przemyslaw Marczak */ +#include #include #include #include diff --git a/test/dm/power-domain.c b/test/dm/power-domain.c index 120a9059c8e..8604b5d72dc 100644 --- a/test/dm/power-domain.c +++ b/test/dm/power-domain.c @@ -3,6 +3,7 @@ * Copyright (c) 2016, NVIDIA CORPORATION. */ +#include #include #include #include diff --git a/test/dm/pwm.c b/test/dm/pwm.c index 80133347ec7..dff626c771a 100644 --- a/test/dm/pwm.c +++ b/test/dm/pwm.c @@ -3,6 +3,7 @@ * Copyright (C) 2017 Google, Inc */ +#include #include #include #include diff --git a/test/dm/qfw.c b/test/dm/qfw.c index 3c354163ef3..f3f35689830 100644 --- a/test/dm/qfw.c +++ b/test/dm/qfw.c @@ -3,6 +3,7 @@ * Copyright 2021 Asherah Connor */ +#include #include #include #include diff --git a/test/dm/ram.c b/test/dm/ram.c index 188c7c32758..f624343138d 100644 --- a/test/dm/ram.c +++ b/test/dm/ram.c @@ -3,6 +3,7 @@ * Copyright (C) 2015 Google, Inc */ +#include #include #include #include diff --git a/test/dm/read.c b/test/dm/read.c index 4ecf18110d0..7768aa29688 100644 --- a/test/dm/read.c +++ b/test/dm/read.c @@ -3,6 +3,7 @@ * Copyright (c) 2020 Nicolas Saenz Julienne */ +#include #include #include #include diff --git a/test/dm/reboot-mode.c b/test/dm/reboot-mode.c index 160b4da07f2..fbb9c3a5426 100644 --- a/test/dm/reboot-mode.c +++ b/test/dm/reboot-mode.c @@ -3,6 +3,7 @@ * (C) 2018 Theobroma Systems Design und Consulting GmbH */ +#include #include #include #include diff --git a/test/dm/regmap.c b/test/dm/regmap.c index 1398f8f6573..8560f2afc2d 100644 --- a/test/dm/regmap.c +++ b/test/dm/regmap.c @@ -3,13 +3,13 @@ * Copyright (C) 2015 Google, Inc */ +#include #include #include #include #include #include #include -#include #include #include #include diff --git a/test/dm/regulator.c b/test/dm/regulator.c index 9e45fd177b9..86f4862d9dd 100644 --- a/test/dm/regulator.c +++ b/test/dm/regulator.c @@ -6,6 +6,7 @@ * Przemyslaw Marczak */ +#include #include #include #include diff --git a/test/dm/remoteproc.c b/test/dm/remoteproc.c index ef9e8e5a0df..f6f9e509e27 100644 --- a/test/dm/remoteproc.c +++ b/test/dm/remoteproc.c @@ -3,8 +3,7 @@ * (C) Copyright 2015 * Texas Instruments Incorporated - https://www.ti.com/ */ - -#include +#include #include #include #include diff --git a/test/dm/reset.c b/test/dm/reset.c index d3158bf4a72..e2d6f456230 100644 --- a/test/dm/reset.c +++ b/test/dm/reset.c @@ -3,6 +3,7 @@ * Copyright (c) 2016, NVIDIA CORPORATION. */ +#include #include #include #include diff --git a/test/dm/rkmtd.c b/test/dm/rkmtd.c index 3dc9ca1add1..3c3e8efa92f 100644 --- a/test/dm/rkmtd.c +++ b/test/dm/rkmtd.c @@ -8,6 +8,7 @@ * Copyright (C) 2023 Johan Jonker */ +#include #include #include #include diff --git a/test/dm/rng.c b/test/dm/rng.c index c8ed6cadf58..6d1f68848d5 100644 --- a/test/dm/rng.c +++ b/test/dm/rng.c @@ -3,6 +3,7 @@ * Copyright (c) 2019, Linaro Limited */ +#include #include #include #include diff --git a/test/dm/rtc.c b/test/dm/rtc.c index a8aa41955c2..bf97dbbd2f9 100644 --- a/test/dm/rtc.c +++ b/test/dm/rtc.c @@ -4,6 +4,7 @@ * Written by Simon Glass */ +#include #include #include #include diff --git a/test/dm/scmi.c b/test/dm/scmi.c index 69fc900e342..adf36ffaab1 100644 --- a/test/dm/scmi.c +++ b/test/dm/scmi.c @@ -12,6 +12,7 @@ * unknown SCMI protocol ID. */ +#include #include #include #include diff --git a/test/dm/scsi.c b/test/dm/scsi.c index 5180159fb27..380cfc88bab 100644 --- a/test/dm/scsi.c +++ b/test/dm/scsi.c @@ -3,6 +3,7 @@ * Copyright (C) 2015 Google, Inc */ +#include #include #include #include diff --git a/test/dm/serial.c b/test/dm/serial.c index 34c0d4db879..34b783e062e 100644 --- a/test/dm/serial.c +++ b/test/dm/serial.c @@ -3,6 +3,7 @@ * Copyright (c) 2018, STMicroelectronics */ +#include #include #include #include diff --git a/test/dm/sf.c b/test/dm/sf.c index 0e3a0f13f9e..17d43fef3bc 100644 --- a/test/dm/sf.c +++ b/test/dm/sf.c @@ -3,6 +3,7 @@ * Copyright (C) 2013 Google, Inc */ +#include #include #include #include diff --git a/test/dm/simple-bus.c b/test/dm/simple-bus.c index 8a730ba2fce..3530b47fac2 100644 --- a/test/dm/simple-bus.c +++ b/test/dm/simple-bus.c @@ -3,6 +3,7 @@ * Copyright (C) 2021, Bin Meng */ +#include #include #include #include diff --git a/test/dm/simple-pm-bus.c b/test/dm/simple-pm-bus.c index 9949cb34d59..792c7450580 100644 --- a/test/dm/simple-pm-bus.c +++ b/test/dm/simple-pm-bus.c @@ -3,6 +3,7 @@ * Copyright (C) 2020 Sean Anderson */ +#include #include #include #include diff --git a/test/dm/sm.c b/test/dm/sm.c index 4d95c2ad75b..7ebb0c9c85e 100644 --- a/test/dm/sm.c +++ b/test/dm/sm.c @@ -5,6 +5,7 @@ * Author: Alexey Romanov */ +#include #include #include #include diff --git a/test/dm/smem.c b/test/dm/smem.c index adcbfe574ab..289fb59ba13 100644 --- a/test/dm/smem.c +++ b/test/dm/smem.c @@ -3,6 +3,7 @@ * Copyright (C) 2018 Ramon Fried */ +#include #include #include #include diff --git a/test/dm/soc.c b/test/dm/soc.c index cb0ac1545f7..8f6c97fa790 100644 --- a/test/dm/soc.c +++ b/test/dm/soc.c @@ -6,6 +6,7 @@ * Dave Gerlach */ +#include #include #include #include diff --git a/test/dm/sound.c b/test/dm/sound.c index f4e6215e683..15d545ab5a3 100644 --- a/test/dm/sound.c +++ b/test/dm/sound.c @@ -4,6 +4,7 @@ * Written by Simon Glass */ +#include #include #include #include diff --git a/test/dm/spi.c b/test/dm/spi.c index 1ab2dd78324..325799bbf10 100644 --- a/test/dm/spi.c +++ b/test/dm/spi.c @@ -3,6 +3,7 @@ * Copyright (C) 2013 Google, Inc */ +#include #include #include #include diff --git a/test/dm/spmi.c b/test/dm/spmi.c index e10ae8db4d3..97bb0eb30fc 100644 --- a/test/dm/spmi.c +++ b/test/dm/spmi.c @@ -3,6 +3,7 @@ * (C) Copyright 2015 Mateusz Kulikowski */ +#include #include #include #include diff --git a/test/dm/syscon-reset.c b/test/dm/syscon-reset.c index ba19504573f..eeaddf88392 100644 --- a/test/dm/syscon-reset.c +++ b/test/dm/syscon-reset.c @@ -3,6 +3,7 @@ * Copyright (C) 2020 Sean Anderson */ +#include #include #include #include diff --git a/test/dm/syscon.c b/test/dm/syscon.c index 04d324e87d4..be232972336 100644 --- a/test/dm/syscon.c +++ b/test/dm/syscon.c @@ -3,6 +3,7 @@ * Copyright (C) 2015 Google, Inc */ +#include #include #include #include diff --git a/test/dm/sysinfo-gpio.c b/test/dm/sysinfo-gpio.c index 24a99dafb15..2e494b3f341 100644 --- a/test/dm/sysinfo-gpio.c +++ b/test/dm/sysinfo-gpio.c @@ -3,6 +3,7 @@ * Copyright (C) 2021 Sean Anderson */ +#include #include #include #include diff --git a/test/dm/sysinfo.c b/test/dm/sysinfo.c index 7444a580df6..96b3a8ebaba 100644 --- a/test/dm/sysinfo.c +++ b/test/dm/sysinfo.c @@ -4,6 +4,7 @@ * Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc */ +#include #include #include #include diff --git a/test/dm/sysreset.c b/test/dm/sysreset.c index f3a859be787..5aa69e04618 100644 --- a/test/dm/sysreset.c +++ b/test/dm/sysreset.c @@ -3,6 +3,7 @@ * Copyright (C) 2015 Google, Inc */ +#include #include #include #include diff --git a/test/dm/tag.c b/test/dm/tag.c index bce8a35acfb..8ae8a1fcd65 100644 --- a/test/dm/tag.c +++ b/test/dm/tag.c @@ -6,6 +6,7 @@ * Author: AKASHI Takahiro */ +#include #include #include /* DM_TEST() */ #include /* struct unit_test_state */ diff --git a/test/dm/tee.c b/test/dm/tee.c index bb02a9b3c98..7a11bf89138 100644 --- a/test/dm/tee.c +++ b/test/dm/tee.c @@ -3,6 +3,7 @@ * Copyright (C) 2018 Linaro Limited */ +#include #include #include #include diff --git a/test/dm/test-dm.c b/test/dm/test-dm.c index 4bc2c45db61..e73a1dd8f81 100644 --- a/test/dm/test-dm.c +++ b/test/dm/test-dm.c @@ -3,6 +3,7 @@ * Copyright (c) 2013 Google, Inc */ +#include #include #include diff --git a/test/dm/test-driver.c b/test/dm/test-driver.c index 851177c3018..02cb974b0f7 100644 --- a/test/dm/test-driver.c +++ b/test/dm/test-driver.c @@ -6,6 +6,7 @@ * Pavel Herrmann */ +#include #include #include #include diff --git a/test/dm/test-fdt.c b/test/dm/test-fdt.c index 18c89eef43f..72d0eb57e21 100644 --- a/test/dm/test-fdt.c +++ b/test/dm/test-fdt.c @@ -3,6 +3,7 @@ * Copyright (c) 2013 Google, Inc */ +#include #include #include #include diff --git a/test/dm/test-uclass.c b/test/dm/test-uclass.c index 9a80cc63667..067701734a0 100644 --- a/test/dm/test-uclass.c +++ b/test/dm/test-uclass.c @@ -6,6 +6,7 @@ * Pavel Herrmann */ +#include #include #include #include diff --git a/test/dm/timer.c b/test/dm/timer.c index 7fcefc42e59..9f94d476920 100644 --- a/test/dm/timer.c +++ b/test/dm/timer.c @@ -3,6 +3,7 @@ * Copyright (C) 2015 Thomas Chou */ +#include #include #include #include diff --git a/test/dm/tpm.c b/test/dm/tpm.c index 0e413c0eedd..cde933ab284 100644 --- a/test/dm/tpm.c +++ b/test/dm/tpm.c @@ -4,6 +4,7 @@ * Written by Simon Glass */ +#include #include #include #include diff --git a/test/dm/usb.c b/test/dm/usb.c index 9a571938b81..7671ef156d8 100644 --- a/test/dm/usb.c +++ b/test/dm/usb.c @@ -3,6 +3,7 @@ * Copyright (C) 2015 Google, Inc */ +#include #include #include #include diff --git a/test/dm/video.c b/test/dm/video.c index 7dfbeb9555d..d907f681600 100644 --- a/test/dm/video.c +++ b/test/dm/video.c @@ -4,6 +4,7 @@ * Written by Simon Glass */ +#include #include #include #include diff --git a/test/dm/virtio.c b/test/dm/virtio.c index 3efd7c74f42..3e108cdc35d 100644 --- a/test/dm/virtio.c +++ b/test/dm/virtio.c @@ -3,6 +3,7 @@ * Copyright (C) 2018, Bin Meng */ +#include #include #include #include diff --git a/test/dm/virtio_device.c b/test/dm/virtio_device.c index 63dc53415b7..fdda4da4178 100644 --- a/test/dm/virtio_device.c +++ b/test/dm/virtio_device.c @@ -3,6 +3,7 @@ * Copyright (C) 2018, Bin Meng */ +#include #include #include #include diff --git a/test/dm/virtio_rng.c b/test/dm/virtio_rng.c index ab7d862d79e..8b9a04b1fde 100644 --- a/test/dm/virtio_rng.c +++ b/test/dm/virtio_rng.c @@ -4,6 +4,7 @@ * Written by Andrew Scull */ +#include #include #include #include diff --git a/test/dm/wdt.c b/test/dm/wdt.c index 1df2da23c6c..2bbebcdbf28 100644 --- a/test/dm/wdt.c +++ b/test/dm/wdt.c @@ -3,9 +3,9 @@ * Copyright 2017 Google, Inc */ +#include #include #include -#include #include #include #include diff --git a/test/env/attr.c b/test/env/attr.c index de5d5d4ee27..8d5c0f1c3df 100644 --- a/test/env/attr.c +++ b/test/env/attr.c @@ -4,6 +4,7 @@ * Joe Hershberger, National Instruments, joe.hershberger@ni.com */ +#include #include #include #include diff --git a/test/env/cmd_ut_env.c b/test/env/cmd_ut_env.c index 13e0998341e..d65a32179ce 100644 --- a/test/env/cmd_ut_env.c +++ b/test/env/cmd_ut_env.c @@ -4,6 +4,7 @@ * Joe Hershberger, National Instruments, joe.hershberger@ni.com */ +#include #include #include #include diff --git a/test/env/fdt.c b/test/env/fdt.c index c495ac7b307..30bfa88c355 100644 --- a/test/env/fdt.c +++ b/test/env/fdt.c @@ -1,3 +1,4 @@ +#include #include #include #include diff --git a/test/env/hashtable.c b/test/env/hashtable.c index ccdf0138c4b..70102f9121c 100644 --- a/test/env/hashtable.c +++ b/test/env/hashtable.c @@ -4,11 +4,11 @@ * Roman Kapl, SYSGO, rka@sysgo.com */ +#include #include #include #include #include -#include #include #include diff --git a/test/fuzz/cmd_fuzz.c b/test/fuzz/cmd_fuzz.c index faa140433ff..d0bc7b8d7b7 100644 --- a/test/fuzz/cmd_fuzz.c +++ b/test/fuzz/cmd_fuzz.c @@ -5,6 +5,7 @@ */ #include +#include #include #include #include diff --git a/test/fuzz/virtio.c b/test/fuzz/virtio.c index 836eb9a2f66..8a47667e778 100644 --- a/test/fuzz/virtio.c +++ b/test/fuzz/virtio.c @@ -4,6 +4,7 @@ * Written by Andrew Scull */ +#include #include #include #include diff --git a/test/image/spl_load.c b/test/image/spl_load.c index 7cbad40ea0c..e1036eff28c 100644 --- a/test/image/spl_load.c +++ b/test/image/spl_load.c @@ -3,6 +3,7 @@ * Copyright (C) 2023 Sean Anderson */ +#include #include #include #include diff --git a/test/image/spl_load_fs.c b/test/image/spl_load_fs.c index 935078bf67b..a89189e1124 100644 --- a/test/image/spl_load_fs.c +++ b/test/image/spl_load_fs.c @@ -3,6 +3,7 @@ * Copyright (C) 2023 Sean Anderson */ +#include #include #include #include diff --git a/test/image/spl_load_net.c b/test/image/spl_load_net.c index 4af6e21b8b9..9d067a7a592 100644 --- a/test/image/spl_load_net.c +++ b/test/image/spl_load_net.c @@ -3,6 +3,7 @@ * Copyright (C) 2023 Sean Anderson */ +#include #include #include #include diff --git a/test/image/spl_load_nor.c b/test/image/spl_load_nor.c index f53a6724e27..de5686343b9 100644 --- a/test/image/spl_load_nor.c +++ b/test/image/spl_load_nor.c @@ -3,6 +3,7 @@ * Copyright (C) 2023 Sean Anderson */ +#include #include #include #include diff --git a/test/image/spl_load_os.c b/test/image/spl_load_os.c index 7d5fb9b07e0..26228a8a4a9 100644 --- a/test/image/spl_load_os.c +++ b/test/image/spl_load_os.c @@ -4,6 +4,7 @@ * Written by Simon Glass */ +#include #include #include #include diff --git a/test/image/spl_load_spi.c b/test/image/spl_load_spi.c index 80836dc0dff..54a95465e23 100644 --- a/test/image/spl_load_spi.c +++ b/test/image/spl_load_spi.c @@ -3,6 +3,7 @@ * Copyright (C) 2023 Sean Anderson */ +#include #include #include #include diff --git a/test/lib/abuf.c b/test/lib/abuf.c index 7c0481ab610..42803b20e2a 100644 --- a/test/lib/abuf.c +++ b/test/lib/abuf.c @@ -4,6 +4,7 @@ * Written by Simon Glass */ +#include #include #include #include diff --git a/test/lib/asn1.c b/test/lib/asn1.c index 4842b7058ac..a66cdd77df0 100644 --- a/test/lib/asn1.c +++ b/test/lib/asn1.c @@ -6,6 +6,7 @@ * Unit test for asn1 compiler and asn1 decoder function via various parsers */ +#include #include #include #include diff --git a/test/lib/cmd_ut_lib.c b/test/lib/cmd_ut_lib.c index f98cb9b3c57..f1ac015b2c8 100644 --- a/test/lib/cmd_ut_lib.c +++ b/test/lib/cmd_ut_lib.c @@ -5,6 +5,7 @@ * Unit tests for library functions */ +#include #include #include #include diff --git a/test/lib/efi_device_path.c b/test/lib/efi_device_path.c index 290c8768fa4..24e2f23c5af 100644 --- a/test/lib/efi_device_path.c +++ b/test/lib/efi_device_path.c @@ -5,6 +5,7 @@ * Copyright (c) 2020 Heinrich Schuchardt */ +#include #include #include #include diff --git a/test/lib/efi_image_region.c b/test/lib/efi_image_region.c index 3ca49dc4a2e..0b888f84337 100644 --- a/test/lib/efi_image_region.c +++ b/test/lib/efi_image_region.c @@ -3,6 +3,7 @@ * (C) Copyright 2020, Heinrich Schuchardt */ +#include #include #include #include diff --git a/test/lib/getopt.c b/test/lib/getopt.c index 388a076200b..3c68b93c8a5 100644 --- a/test/lib/getopt.c +++ b/test/lib/getopt.c @@ -6,6 +6,7 @@ * posix/tst-getopt-cancel.c */ +#include #include #include #include diff --git a/test/lib/hexdump.c b/test/lib/hexdump.c index d531a830398..5dccf438866 100644 --- a/test/lib/hexdump.c +++ b/test/lib/hexdump.c @@ -4,6 +4,7 @@ * Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc */ +#include #include #include #include diff --git a/test/lib/kconfig.c b/test/lib/kconfig.c index 0c463bb794a..3914f699659 100644 --- a/test/lib/kconfig.c +++ b/test/lib/kconfig.c @@ -6,6 +6,7 @@ * Written by Simon Glass */ +#include #include #include #include diff --git a/test/lib/kconfig_spl.c b/test/lib/kconfig_spl.c index 3bd8abdf4b8..8f8a3411b14 100644 --- a/test/lib/kconfig_spl.c +++ b/test/lib/kconfig_spl.c @@ -6,6 +6,7 @@ * Written by Simon Glass */ +#include #include #include #include diff --git a/test/lib/lmb.c b/test/lib/lmb.c index 4b5b6e5e209..7e4368de22e 100644 --- a/test/lib/lmb.c +++ b/test/lib/lmb.c @@ -3,6 +3,7 @@ * (C) Copyright 2018 Simon Goldschmidt */ +#include #include #include #include diff --git a/test/lib/longjmp.c b/test/lib/longjmp.c index 79d889bdd5f..201367a5a3a 100644 --- a/test/lib/longjmp.c +++ b/test/lib/longjmp.c @@ -5,6 +5,7 @@ * Copyright (c) 2021, Heinrich Schuchardt */ +#include #include #include #include diff --git a/test/lib/rsa.c b/test/lib/rsa.c index 40f70010c78..44f8ade226f 100644 --- a/test/lib/rsa.c +++ b/test/lib/rsa.c @@ -6,6 +6,7 @@ * Unit test for rsa_verify() function */ +#include #include #include #include diff --git a/test/lib/sscanf.c b/test/lib/sscanf.c index 9fe5521749f..772e4b92042 100644 --- a/test/lib/sscanf.c +++ b/test/lib/sscanf.c @@ -9,6 +9,7 @@ * Unit tests for sscanf() function */ +#include #include #include #include diff --git a/test/lib/string.c b/test/lib/string.c index d08dbca9291..5dcf4d6db00 100644 --- a/test/lib/string.c +++ b/test/lib/string.c @@ -9,6 +9,7 @@ * This has to be considered in testing. */ +#include #include #include #include diff --git a/test/lib/strlcat.c b/test/lib/strlcat.c index d1a0293271b..d8453fe78e2 100644 --- a/test/lib/strlcat.c +++ b/test/lib/strlcat.c @@ -6,6 +6,7 @@ * These tests adapted from glibc's string/test-strncat.c */ +#include #include #include #include diff --git a/test/lib/test_aes.c b/test/lib/test_aes.c index cfd9d8ca5a9..cbc712f7eda 100644 --- a/test/lib/test_aes.c +++ b/test/lib/test_aes.c @@ -5,6 +5,7 @@ * Unit tests for aes functions */ +#include #include #include #include diff --git a/test/lib/test_crypt.c b/test/lib/test_crypt.c index dcdadd992c1..fb21edf9748 100644 --- a/test/lib/test_crypt.c +++ b/test/lib/test_crypt.c @@ -5,6 +5,7 @@ * Unit test for crypt-style password hashing */ +#include #include #include #include diff --git a/test/lib/test_errno_str.c b/test/lib/test_errno_str.c index 67f76442b27..8a9f1fd9805 100644 --- a/test/lib/test_errno_str.c +++ b/test/lib/test_errno_str.c @@ -9,6 +9,7 @@ * This has to be considered in testing. */ +#include #include #include #include diff --git a/test/lib/test_print.c b/test/lib/test_print.c index c7fc50a1de1..79b67c77932 100644 --- a/test/lib/test_print.c +++ b/test/lib/test_print.c @@ -5,6 +5,7 @@ * Copyright 2020, Heinrich Schuchadt */ +#include #include #include #include diff --git a/test/lib/uuid.c b/test/lib/uuid.c index 0914f2c47e7..e24331a1366 100644 --- a/test/lib/uuid.c +++ b/test/lib/uuid.c @@ -8,6 +8,7 @@ * Abdellatif El Khlifi */ +#include #include #include #include diff --git a/test/log/cont_test.c b/test/log/cont_test.c index 036d44b9d73..de7b7f064cd 100644 --- a/test/log/cont_test.c +++ b/test/log/cont_test.c @@ -5,6 +5,7 @@ * Test continuation of log messages. */ +#include #include #include #include diff --git a/test/log/log_filter.c b/test/log/log_filter.c index 9cc891dc48c..b644b40a850 100644 --- a/test/log/log_filter.c +++ b/test/log/log_filter.c @@ -3,6 +3,7 @@ * Copyright (C) 2020 Sean Anderson */ +#include #include #include #include diff --git a/test/log/log_test.c b/test/log/log_test.c index 855353a9c40..c5abff80d11 100644 --- a/test/log/log_test.c +++ b/test/log/log_test.c @@ -6,6 +6,7 @@ * Written by Simon Glass */ +#include #include #include #include diff --git a/test/log/log_ut.c b/test/log/log_ut.c index 6617ed8b152..5aa3a184004 100644 --- a/test/log/log_ut.c +++ b/test/log/log_ut.c @@ -5,6 +5,7 @@ * Logging function tests. */ +#include #include #include #include diff --git a/test/log/nolog_ndebug.c b/test/log/nolog_ndebug.c index b714a16d2e7..bd9a4f408e7 100644 --- a/test/log/nolog_ndebug.c +++ b/test/log/nolog_ndebug.c @@ -5,6 +5,7 @@ * Logging function tests for CONFIG_LOG=n without #define DEBUG */ +#include #include #include #include diff --git a/test/log/nolog_test.c b/test/log/nolog_test.c index c4c0fa6cf81..4e52e5bed82 100644 --- a/test/log/nolog_test.c +++ b/test/log/nolog_test.c @@ -8,6 +8,7 @@ /* Needed for testing log_debug() */ #define DEBUG 1 +#include #include #include #include diff --git a/test/log/pr_cont_test.c b/test/log/pr_cont_test.c index 30f30d98fe1..df4520d2807 100644 --- a/test/log/pr_cont_test.c +++ b/test/log/pr_cont_test.c @@ -5,6 +5,7 @@ * Test continuation of log messages using pr_cont(). */ +#include #include #include #include diff --git a/test/log/syslog_test.c b/test/log/syslog_test.c index c4180f775b9..4db649db822 100644 --- a/test/log/syslog_test.c +++ b/test/log/syslog_test.c @@ -10,6 +10,7 @@ /* Override CONFIG_LOG_MAX_LEVEL */ #define LOG_DEBUG +#include #include #include #include diff --git a/test/log/syslog_test_ndebug.c b/test/log/syslog_test_ndebug.c index b10e636812b..4438791044d 100644 --- a/test/log/syslog_test_ndebug.c +++ b/test/log/syslog_test_ndebug.c @@ -7,6 +7,7 @@ * Invoke the test with: ./u-boot -d arch/sandbox/dts/test.dtb */ +#include #include #include #include diff --git a/test/optee/cmd_ut_optee.c b/test/optee/cmd_ut_optee.c index c6f50e0995a..c3887ab11d9 100644 --- a/test/optee/cmd_ut_optee.c +++ b/test/optee/cmd_ut_optee.c @@ -3,6 +3,7 @@ * Copyright (C) 2019, Theobroma Systems Design und Consulting GmbH */ +#include #include #include #include diff --git a/test/overlay/cmd_ut_overlay.c b/test/overlay/cmd_ut_overlay.c index bcb29a26e21..56a3df17138 100644 --- a/test/overlay/cmd_ut_overlay.c +++ b/test/overlay/cmd_ut_overlay.c @@ -4,6 +4,7 @@ * Copyright (c) 2016 Free Electrons */ +#include #include #include #include diff --git a/test/print_ut.c b/test/print_ut.c index bded2b6ebe5..bb844d2542b 100644 --- a/test/print_ut.c +++ b/test/print_ut.c @@ -3,6 +3,7 @@ * Copyright (c) 2012, The Chromium Authors */ +#include #include #include #include diff --git a/test/py/u_boot_console_base.py b/test/py/u_boot_console_base.py index 3e01be11029..26b6de07f88 100644 --- a/test/py/u_boot_console_base.py +++ b/test/py/u_boot_console_base.py @@ -17,6 +17,7 @@ import u_boot_spawn # Regexes for text we expect U-Boot to send to the console. pattern_u_boot_spl_signon = re.compile('(U-Boot SPL \\d{4}\\.\\d{2}[^\r\n]*\\))') +pattern_u_boot_spl2_signon = re.compile('(U-Boot SPL \\d{4}\\.\\d{2}[^\r\n]*\\))') pattern_u_boot_main_signon = re.compile('(U-Boot \\d{4}\\.\\d{2}[^\r\n]*\\))') pattern_stop_autoboot_prompt = re.compile('Hit any key to stop autoboot: ') pattern_unknown_command = re.compile('Unknown command \'.*\' - try \'help\'') @@ -28,6 +29,7 @@ PAT_RE = 1 bad_pattern_defs = ( ('spl_signon', pattern_u_boot_spl_signon), + ('spl2_signon', pattern_u_boot_spl2_signon), ('main_signon', pattern_u_boot_main_signon), ('stop_autoboot_prompt', pattern_stop_autoboot_prompt), ('unknown_command', pattern_unknown_command), @@ -150,20 +152,25 @@ class ConsoleBase(object): """ try: bcfg = self.config.buildconfig + config_spl = bcfg.get('config_spl', 'n') == 'y' config_spl_serial = bcfg.get('config_spl_serial', 'n') == 'y' env_spl_skipped = self.config.env.get('env__spl_skipped', False) - env_spl_banner_times = self.config.env.get('env__spl_banner_times', 1) + env_spl2_skipped = self.config.env.get('env__spl2_skipped', True) while loop_num > 0: loop_num -= 1 - while config_spl_serial and not env_spl_skipped and env_spl_banner_times > 0: + if config_spl and config_spl_serial and not env_spl_skipped: m = self.p.expect([pattern_u_boot_spl_signon] + self.bad_patterns) if m != 0: raise Exception('Bad pattern found on SPL console: ' + self.bad_pattern_ids[m - 1]) - env_spl_banner_times -= 1 - + if not env_spl2_skipped: + m = self.p.expect([pattern_u_boot_spl2_signon] + + self.bad_patterns) + if m != 0: + raise Exception('Bad pattern found on SPL2 console: ' + + self.bad_pattern_ids[m - 1]) m = self.p.expect([pattern_u_boot_main_signon] + self.bad_patterns) if m != 0: raise Exception('Bad pattern found on console: ' + diff --git a/test/stdint/int-types.c b/test/stdint/int-types.c index 9051e32c7ce..f6d09e8643d 100644 --- a/test/stdint/int-types.c +++ b/test/stdint/int-types.c @@ -1,4 +1,4 @@ -#include +#include int test_types(void) { diff --git a/test/str_ut.c b/test/str_ut.c index 389779859a3..fa9328ede50 100644 --- a/test/str_ut.c +++ b/test/str_ut.c @@ -3,6 +3,7 @@ * Copyright 2020 Google LLC */ +#include #include #include #include diff --git a/test/test-main.c b/test/test-main.c index 3fa6f6e32ec..b7015d9f38d 100644 --- a/test/test-main.c +++ b/test/test-main.c @@ -4,6 +4,7 @@ * Written by Simon Glass */ +#include #include #include #include diff --git a/test/time_ut.c b/test/time_ut.c index 149c4b58f4a..80b82dbfd83 100644 --- a/test/time_ut.c +++ b/test/time_ut.c @@ -4,6 +4,7 @@ * Written by Simon Glass */ +#include #include #include #include diff --git a/test/unicode_ut.c b/test/unicode_ut.c index 13e29c9b9e3..47c3f52774c 100644 --- a/test/unicode_ut.c +++ b/test/unicode_ut.c @@ -5,6 +5,7 @@ * Copyright (c) 2018 Heinrich Schuchardt */ +#include #include #include #include diff --git a/test/ut.c b/test/ut.c index ae99831ac8f..628e9dc9805 100644 --- a/test/ut.c +++ b/test/ut.c @@ -5,6 +5,7 @@ * Copyright (c) 2013 Google, Inc */ +#include #include #include #ifdef CONFIG_SANDBOX diff --git a/tools/dtoc/dtb_platdata.py b/tools/dtoc/dtb_platdata.py index 89066e6403f..39f416cfd80 100644 --- a/tools/dtoc/dtb_platdata.py +++ b/tools/dtoc/dtb_platdata.py @@ -835,6 +835,7 @@ class DtbPlatdata(): def generate_uclasses(self): self.out('\n') + self.out('#include \n') self.out('#include \n') self.out('#include \n') self.out('\n') @@ -1058,6 +1059,7 @@ class DtbPlatdata(): self.out('/* Allow use of U_BOOT_DRVINFO() in this file */\n') self.out('#define DT_PLAT_C\n') self.out('\n') + self.out('#include \n') self.out('#include \n') self.out('#include \n') self.out('\n') @@ -1090,6 +1092,7 @@ class DtbPlatdata(): See the documentation in doc/driver-model/of-plat.rst for more information. """ + self.out('#include \n') self.out('#include \n') self.out('#include \n') self.out('\n') diff --git a/tools/dtoc/test_dtoc.py b/tools/dtoc/test_dtoc.py index c4a0889aebe..597c93e8a87 100755 --- a/tools/dtoc/test_dtoc.py +++ b/tools/dtoc/test_dtoc.py @@ -63,6 +63,7 @@ C_HEADER = C_HEADER_PRE + ''' /* Allow use of U_BOOT_DRVINFO() in this file */ #define DT_PLAT_C +#include #include #include ''' @@ -416,6 +417,7 @@ U_BOOT_DRVINFO(spl_test3) = { ''' uclass_text_inst = ''' +#include #include #include @@ -519,6 +521,7 @@ DM_UCLASS_INST(testfdt) = { * This was generated by dtoc from a .dtb (device tree binary) file. */ +#include #include #include -- cgit v1.2.3