aboutsummaryrefslogtreecommitdiff
path: root/arch/arm/dts/rk3399-op1-opp.dtsi
blob: 69cc9b05baa572344d78d8176ebe895652f4a9af (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Copyright (c) 2016-2017 Fuzhou Rockchip Electronics Co., Ltd
 */

/ {
	cluster0_opp: opp-table0 {
		compatible = "operating-points-v2";
		opp-shared;

		opp00 {
			opp-hz = /bits/ 64 <408000000>;
			opp-microvolt = <800000>;
			clock-latency-ns = <40000>;
		};
		opp01 {
			opp-hz = /bits/ 64 <600000000>;
			opp-microvolt = <825000>;
		};
		opp02 {
			opp-hz = /bits/ 64 <816000000>;
			opp-microvolt = <850000>;
		};
		opp03 {
			opp-hz = /bits/ 64 <1008000000>;
			opp-microvolt = <900000>;
		};
		opp04 {
			opp-hz = /bits/ 64 <1200000000>;
			opp-microvolt = <975000>;
		};
		opp05 {
			opp-hz = /bits/ 64 <1416000000>;
			opp-microvolt = <1100000>;
		};
		opp06 {
			opp-hz = /bits/ 64 <1512000000>;
			opp-microvolt = <1150000>;
		};
	};

	cluster1_opp: opp-table1 {
		compatible = "operating-points-v2";
		opp-shared;

		opp00 {
			opp-hz = /bits/ 64 <408000000>;
			opp-microvolt = <800000>;
			clock-latency-ns = <40000>;
		};
		opp01 {
			opp-hz = /bits/ 64 <600000000>;
			opp-microvolt = <800000>;
		};
		opp02 {
			opp-hz = /bits/ 64 <816000000>;
			opp-microvolt = <825000>;
		};
		opp03 {
			opp-hz = /bits/ 64 <1008000000>;
			opp-microvolt = <850000>;
		};
		opp04 {
			opp-hz = /bits/ 64 <1200000000>;
			opp-microvolt = <900000>;
		};
		opp05 {
			opp-hz = /bits/ 64 <1416000000>;
			opp-microvolt = <975000>;
		};
		opp06 {
			opp-hz = /bits/ 64 <1608000000>;
			opp-microvolt = <1050000>;
		};
		opp07 {
			opp-hz = /bits/ 64 <1800000000>;
			opp-microvolt = <1150000>;
		};
		opp08 {
			opp-hz = /bits/ 64 <2016000000>;
			opp-microvolt = <1250000>;
		};
	};

	gpu_opp_table: opp-table2 {
		compatible = "operating-points-v2";

		opp00 {
			opp-hz = /bits/ 64 <200000000>;
			opp-microvolt = <800000>;
		};
		opp01 {
			opp-hz = /bits/ 64 <297000000>;
			opp-microvolt = <800000>;
		};
		opp02 {
			opp-hz = /bits/ 64 <400000000>;
			opp-microvolt = <825000>;
		};
		opp03 {
			opp-hz = /bits/ 64 <500000000>;
			opp-microvolt = <850000>;
		};
		opp04 {
			opp-hz = /bits/ 64 <600000000>;
			opp-microvolt = <925000>;
		};
		opp05 {
			opp-hz = /bits/ 64 <800000000>;
			opp-microvolt = <1075000>;
		};
	};
};

&cpu_l0 {
	operating-points-v2 = <&cluster0_opp>;
};

&cpu_l1 {
	operating-points-v2 = <&cluster0_opp>;
};

&cpu_l2 {
	operating-points-v2 = <&cluster0_opp>;
};

&cpu_l3 {
	operating-points-v2 = <&cluster0_opp>;
};

&cpu_b0 {
	operating-points-v2 = <&cluster1_opp>;
};

&cpu_b1 {
	operating-points-v2 = <&cluster1_opp>;
};

&gpu {
	operating-points-v2 = <&gpu_opp_table>;
};