path: root/board/lge/sniper/sniper.c

/*
 * (C) Copyright 2014
 * Paul Kocialkowski <contact@paulk.fr>
 *
 * Based on the OMAP3 Pandora code:
 * (C) Copyright 2008
 * Grazvydas Ignotas <notasas@gmail.com>
 *
 * Derived from Beagle Board, 3430 SDP, and OMAP3EVM code by
 *	Richard Woodruff <r-woodruff2@ti.com>
 *	Syed Mohammed Khasim <khasim@ti.com>
 *	Sunil Kumar <sunilsaini05@gmail.com>
 *	Shashi Ranjan <shashiranjanmca05@gmail.com>
 *
 * (C) Copyright 2004-2008
 * Texas Instruments, <www.ti.com>
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */
#include <common.h>
#include <twl4030.h>
#include <lp8720.h>
#include <asm/io.h>
#include <asm/gpio.h>
#include <asm/arch/mmc_host_def.h>
#include <asm/arch/mux.h>
#include <asm/arch/mem.h>
#include <asm/arch/gpio.h>
#include <asm/arch/sys_proto.h>
#include <asm/arch/dss.h>
#include <asm/mach-types.h>
#include <asm/omap_musb.h>
#include <linux/usb/ch9.h>
#include <linux/usb/gadget.h>
#include <linux/usb/musb.h>
#include "sniper.h"

DECLARE_GLOBAL_DATA_PTR;

const omap3_sysinfo sysinfo = {
	DDR_STACKED,
	"Sniper",
	"MMC",
};

/*
 * Routine: board_init
 * Description: Early hardware init.
 */
int board_init(void)
{
	gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
	/* board id for Linux */
	gd->bd->bi_arch_number = 3000;
	/* boot param addr */
	gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100);

	return 0;
}

#if defined(CONFIG_SPL_BUILD)
/*
 * Routine: get_board_mem_timings
 * Description: If we use SPL then there is no x-loader nor config header
 * so we have to setup the DDR timings ourself on both banks.
 */
void get_board_mem_timings(struct board_sdrc_timings *timings)
{
	timings->mcfg = HYNIX_V_MCFG_200(256 << 20);
	timings->ctrla = HYNIX_V_ACTIMA_200;
	timings->ctrlb = HYNIX_V_ACTIMB_200;
	timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz;
	timings->mr = MICRON_V_MR_165;
}
#endif

#ifdef CONFIG_USB_MUSB_OMAP2PLUS
static struct musb_hdrc_config musb_config = {
	.multipoint     = 1,
	.dyn_fifo       = 1,
	.num_eps        = 16,
	.ram_bits       = 12,
};

static struct omap_musb_board_data musb_board_data = {
	.interface_type	= MUSB_INTERFACE_ULPI,
};

static struct musb_hdrc_platform_data musb_plat = {
	.mode		= MUSB_PERIPHERAL,
	.config         = &musb_config,
	.power          = 100,
	.platform_ops	= &omap2430_ops,
	.board_data	= &musb_board_data,
};
#endif

#define LDO_AB_LEVEL_REG	0x24
#define LDO_CD_LEVEL_REG	0x25
#define LDO_ABCD_EN_REG	0x26
static int aat2862_write_reg(unsigned char addr, unsigned char data)
{
	return i2c_write(0x60, (uint)addr, 1, &data, 1);
}
#if 0
/*

#define PANEL_TIMING_H(bp, fp, sw) (DSS_HBP(bp) | DSS_HFP(fp) | DSS_HSW(sw))
#define PANEL_TIMING_V(bp, fp, sw) (DSS_VBP(bp) | DSS_VFP(fp) | DSS_VSW(sw))
#define PANEL_LCD_SIZE(xres, yres) ((yres - 1) << 16 | (xres - 1))
*/

	.pixel_clock    = LCD_PIXEL_CLOCK,
	.hfp            = 1, //right_margin - 1
	.hsw            = 1, //hsync_len - 1
	.hbp            = 1, //left_margin - 1
	.vfp            = 0, //lower_margin
	.vsw            = 1, //vsync_len - 1
	.vbp            = 0, //upper_margin

/*

static int hub_acbi = 0;
static int hub_acb = 0;

static u32 hub_config = (OMAP_DSS_LCD_TFT | OMAP_DSS_LCD_IVS |OMAP_DSS_LCD_IHS);

#define DSS_IVS		(1 << 12)
#define DSS_IHS		(1 << 13)
#define DSS_IPC		(1 << 14)
#define DSS_IEO		(1 << 15)
#define DSS_ONOFF	(1 << 17)

	l |= FLD_VAL(ihs, 13, 13);
	l |= FLD_VAL(ivs, 12, 12);

	l |= FLD_VAL(acbi, 11, 8);
	l |= FLD_VAL(acb, 7, 0);



	_dispc_set_pol_freq((config & OMAP_DSS_LCD_ONOFF) != 0,
			(config & OMAP_DSS_LCD_RF) != 0,
			(config & OMAP_DSS_LCD_IEO) != 0,
			(config & OMAP_DSS_LCD_IPC) != 0,
			(config & OMAP_DSS_LCD_IHS) != 0,
			(config & OMAP_DSS_LCD_IVS) != 0,
			acbi, acb);

	dispc_write_reg(DISPC_DIVISOR,
			FLD_VAL(lck_div, 23, 16) | FLD_VAL(pck_div, 7, 0)

dpi_set_dsi_clk -> dispc_set_lcd_divisor
(hub_dsi) dsi_pll_init −> dispc_set_clock_div -> dispc_set_lcd_divisor


r = dispc_calc_clock_div(1, 48 * 1000 * 1000, &cinfo);
*/
#endif
static struct panel_config lcd_cfg = {
	.timing_h       = PANEL_TIMING_H(1, 1, 1),
	.timing_v       = PANEL_TIMING_V(0, 0, 1),
	.pol_freq       = DSS_IVS | DSS_IHS, /* Pol Freq */
//	.divisor        = 0x0001000E,
	.divisor	= 0x10003,
//	.divisor        = 0x00010033, /* 9 Mhz Pixel Clock */ /* FIXME NOT FROM ANYWHERE */
	.lcd_size	= PANEL_LCD_SIZE(480, 800),
	.panel_type     = ACTIVE_DISPLAY, /* TFT */
	.data_lines     = LCD_INTERFACE_24_BIT, /* 24 Bit RGB */
	.load_mode      = 0x02, /* Frame Mode */
	.panel_color	= 0x00FF8000, // orange, why not?
	.gfx_format	= GFXFORMAT_RGB24_UNPACKED,
};

#if defined(CONFIG_VIDEO) && !defined(CONFIG_SPL_BUILD)
int board_video_init(void)
{
	dispc_init();
	dsi_init();

	printf("Trying to contact AAT2870\n");

	gpio_request(SNIPER_GPIO_LCD_CP_EN, "aat2870_en");
	gpio_direction_output(SNIPER_GPIO_LCD_CP_EN, 0);
	gpio_set_value(SNIPER_GPIO_LCD_CP_EN, 1);

	gpio_request(SNIPER_GPIO_LCD_CS, "lcd_cs");
	gpio_direction_output(SNIPER_GPIO_LCD_CS, 0);
	gpio_set_value(SNIPER_GPIO_LCD_CS, 1);

	gpio_request(SNIPER_GPIO_LCD_RESET_N, "lcd_reset_n");
	gpio_direction_output(SNIPER_GPIO_LCD_RESET_N, 0);

	printf("LCD reset\n");

	gpio_set_value(SNIPER_GPIO_LCD_RESET_N, 0);
	i2c_set_bus_num(1);
	aat2862_write_reg(LDO_AB_LEVEL_REG,0x4A);    /* LDOA 1.8V_LCD_IOVCC (1010), LDOB 3.0V_LCD_VCC_VCI (1100) */
        aat2862_write_reg(LDO_CD_LEVEL_REG,0x4C);    /* LDOC 1.8V_TOUCH_VDD (0100), LDOD 3.0V_TOUCH_VCPIN (1100) */
	aat2862_write_reg(LDO_ABCD_EN_REG,0x3);     /* LDO A & B ON */
	i2c_set_bus_num(0);
	mdelay(50);
	gpio_set_value(SNIPER_GPIO_LCD_RESET_N, 1);
	mdelay(10);

/*
	u8 data = 0;
	hub_panel_dcs_read_1(0x0a, &data);
	-> dsi_vc_dcs_read(TCH, dcs_cmd, buf, 1); // TCH = 0
	if (data == 0x94)
	{
		return 1;
	}
*/
	// Send commands here

//SNIPER_GPIO_LCD_RESET_N


//	lcd_cfg.frame_buffer = (void *)0x880000000;

// CONFIG_VIDEO_OMAP3

/*
	omap3_dss_panel_config(&lcd_cfg);
	omap3_dss_enable();
	printf("DSS enable over\n");
*/
	printf("AAT2862 backlight enable\n");

	i2c_set_bus_num(1);
	aat2862_write_reg(0x0,0xff); /* LCD channel enable */
	aat2862_write_reg(0x03,0xF4);  /* LED main group, LED enabled, 22.26 */
	aat2862_write_reg(0x04,0x74);  /* LED main group, LED enabled, 22.26 */
	aat2862_write_reg(0x05,0x74);  /* LED main group, LED enabled, 30 */
	aat2862_write_reg(0x06,0x74);  /* LED main group, LED enabled, 30 */
	i2c_set_bus_num(0);



	return 0;
}
#endif


void hub_load_rle565_image(unsigned char* src, unsigned int* dest, int len)
{
	unsigned short* src_ptr = (unsigned short*)src;
	unsigned int* dest_ptr = dest;
	unsigned short size;
	unsigned short value;
	int length = len;
	unsigned char red, green, blue;

	while (length > 0) {
		size = *src_ptr;
		src_ptr++;
		value = *src_ptr;
		src_ptr++;
		while(size--) {
			red = ((value >> 11) & 0xFF) << 3;
			green = ((value >> 5) & 0xFF) << 2;
			blue = (value & 0xFF) << 3;
			*dest_ptr = (0xFF << 24) | (red << 16) | (green << 8) | blue;
			dest_ptr++;
			length --;
		}
	}
}


extern unsigned int lg_boot_logo[];
#define CONFIG_FB_ADDRESS		0x9FA00000

struct led_ctrl_data {
	unsigned char reg;
	unsigned char val;
};
#define I2C_NO_REG						0xFF
#define BD2802_REG_CLKSETUP 			0x00
#define BD2802_REG_CONTROL 			0x01
#define BD2802_REG1_HOURSETUP			0x02
#define BD2802_R1_CURRENT1SETUP		0x03
#define BD2802_R1_CURRENT2SETUP		0x04
#define BD2802_R1_WAVEPATTERN		0x05
#define BD2802_G1_CURRENT1SETUP		0x06
#define BD2802_G1_CURRENT2SETUP		0x07
#define BD2802_G1_WAVEPATTERN		0x08
#define BD2802_B1_CURRENT1SETUP		0x09
#define BD2802_B1_CURRENT2SETUP		0x0A
#define BD2802_B1_WAVEPATTERN		0x0B
#define BD2802_REG2_HOURSETUP			0x0C
#define BD2802_R2_CURRENT1SETUP		0x0D
#define BD2802_R2_CURRENT2SETUP		0x0E
#define BD2802_R2_WAVEPATTERN		0x0F
#define BD2802_G2_CURRENT1SETUP		0x10
#define BD2802_G2_CURRENT2SETUP		0x11
#define BD2802_G2_WAVEPATTERN		0x12
#define BD2802_B2_CURRENT1SETUP		0x13
#define BD2802_B2_CURRENT2SETUP		0x14
#define BD2802_B2_WAVEPATTERN		0x15
#define BD2812_DCDCDRIVER		0x40
#define BD2812_PIN_FUNC_SETUP		0x41
static struct led_ctrl_data pwron_on_seq_bd2812[]=
{
	{BD2802_REG_CLKSETUP,0x00},
	{BD2802_REG_CONTROL,0x11},
	{BD2802_REG1_HOURSETUP,0xF3},
	{BD2802_REG2_HOURSETUP,0xF3},
	{BD2802_R1_CURRENT1SETUP,0x32},
	{BD2802_R1_CURRENT2SETUP,0x32},
	{BD2802_G1_CURRENT1SETUP,0x32},
	{BD2802_G1_CURRENT2SETUP,0x32},
	{BD2802_B1_CURRENT1SETUP,0x00},
	{BD2802_B1_CURRENT2SETUP,0x00},
	{BD2802_R2_CURRENT1SETUP,0x32},
	{BD2802_R2_CURRENT2SETUP,0x32},
	{BD2802_G2_CURRENT1SETUP,0x32},
	{BD2802_G2_CURRENT2SETUP,0x32},
	{BD2802_B2_CURRENT1SETUP,0x00},
	{BD2802_B2_CURRENT2SETUP,0x00},
	{BD2812_DCDCDRIVER,0x00},
	{BD2812_PIN_FUNC_SETUP,0x0F},
	{I2C_NO_REG, 0x00}  /* End of array */
};

int bd2812_setup(void)
{
	int i;

	gpio_request(SNIPER_GPIO_KEY_LED_RESET, "key_led_reset");
	gpio_direction_output(SNIPER_GPIO_KEY_LED_RESET, 0);

	gpio_set_value(SNIPER_GPIO_KEY_LED_RESET, 1);
	udelay(150);
	gpio_set_value(SNIPER_GPIO_KEY_LED_RESET, 0);
	udelay(150);
	gpio_set_value(SNIPER_GPIO_KEY_LED_RESET, 1);
	udelay(150);

	i2c_set_bus_num(1);

	for (i = 0; pwron_on_seq_bd2812[i].reg != I2C_NO_REG; i++) {
		i2c_write(0x1A, pwron_on_seq_bd2812[i].reg, 1, &pwron_on_seq_bd2812[i].val, 1);
		udelay(10); //to be fixed
	}

	i2c_set_bus_num(0);
}

void video_init(void)
{

	printf("VIDEO INIT BEGIN\n");

	/* VIDEO INIT HERE */


	printf("AAT2862 backlight enable\n");

	gpio_request(SNIPER_GPIO_LCD_CP_EN, "aat2870_en");
	gpio_direction_output(SNIPER_GPIO_LCD_CP_EN, 0);
	gpio_set_value(SNIPER_GPIO_LCD_CP_EN, 1);

	gpio_request(SNIPER_GPIO_LCD_CS, "lcd_cs");
	gpio_direction_output(SNIPER_GPIO_LCD_CS, 0);

	gpio_request(SNIPER_GPIO_LCD_RESET_N, "lcd_reset_n");
	gpio_direction_output(SNIPER_GPIO_LCD_RESET_N, 0);

	i2c_set_bus_num(1);
	aat2862_write_reg(0x0,0xff); /* LCD channel enable */
	aat2862_write_reg(0x03,0xF4);  /* LED main group, LED enabled, 22.26 */
	aat2862_write_reg(0x04,0x74);  /* LED main group, LED enabled, 22.26 */
	aat2862_write_reg(0x05,0x74);  /* LED main group, LED enabled, 30 */
	aat2862_write_reg(0x06,0x74);  /* LED main group, LED enabled, 30 */
	i2c_set_bus_num(0);

	i2c_set_bus_num(1);
	aat2862_write_reg(LDO_AB_LEVEL_REG,0x4A);    /* LDOA 1.8V_LCD_IOVCC (1010), LDOB 3.0V_LCD_VCC_VCI (1100) */
        aat2862_write_reg(LDO_CD_LEVEL_REG,0x4C);    /* LDOC 1.8V_TOUCH_VDD (0100), LDOD 3.0V_TOUCH_VCPIN (1100) */
	aat2862_write_reg(LDO_ABCD_EN_REG,0x3);     /* LDO A & B ON */
	i2c_set_bus_num(0);

	dispc_init();
	dsi_init();

	printf("LCD reset\n");

	gpio_set_value(SNIPER_GPIO_LCD_CS, 1);

	gpio_set_value(SNIPER_GPIO_LCD_RESET_N, 0);
	mdelay(50);
	gpio_set_value(SNIPER_GPIO_LCD_RESET_N, 1);
	mdelay(10);

	hub_panel_init_lcd();

	dsi_init();	//20100906 kyungtae.oh@lge.com for Factory test at LCD off
	dsi_display_update(0, 0, 480, 800); // PAULK: that's totally useless

	configure_dispc();
	dispc_configure_image(NULL); // use fbaddress
	hub_load_rle565_image(lg_boot_logo, CONFIG_FB_ADDRESS, 480*800);
	dispc_enable_lcd_out(1);
	dsi_update_screen_dispc(0,0,480,800);

	printf("VIDEO INIT END\n");


}

/*
 * Routine: misc_init_r
 * Description: Configure board specific parts
 */
int misc_init_r(void)
{
	setenv("serial#", "p970-replicant");
	g_dnl_set_serialnumber("p970-replicant");
#ifdef CONFIG_USB_MUSB_OMAP2PLUS
	musb_register(&musb_plat, &musb_board_data, (void *)MUSB_BASE);
#endif

/*
 for dss, look at LCD_RESET_N:

	omap_set_gpio_direction(HUB_PANEL_LCD_RESET_N, 0);
	mdelay(2);
	omap_set_gpio_dataout(HUB_PANEL_LCD_RESET_N, 0);
	aat2862_ldo_enabled(1);
	mdelay(50);
	omap_set_gpio_dataout(HUB_PANEL_LCD_RESET_N, 1);
	mdelay(10);
*/

	video_init();

	bd2812_setup();

	return 0;
}

u32 get_board_rev(void)
{
	return 10;
}

/*
 * Routine: set_muxconf_regs
 * Description: Setting up the configuration Mux registers specific to the
 *		hardware. Many pins need to be moved from protect to primary
 *		mode.
 */
void set_muxconf_regs(void)
{
	MUX_SNIPER();
}

#if defined(CONFIG_GENERIC_MMC) && !defined(CONFIG_SPL_BUILD)
int board_mmc_init(bd_t *bis)
{
	int ret;

	ret = omap_mmc_init(0, 0, 0, -1, -1);
	if (ret)
		return ret;

	ret = omap_mmc_init(1, 0, 0, SNIPER_GPIO_MICROSD_DET_N, -1);
	if (ret)
		return ret;

	return 0;
}
#endif

#if defined(CONFIG_GENERIC_MMC)
void board_mmc_power_init(void)
{
	/*
	 * In order to boot from MMC1 (microsd card), the LP8720 LDO1 (3.0V_MMC)
	 * regulator has to be enabled. The LP8720 is accessed through I2C3.
	 *
	 * Enabling TWL4030 VAUX2 (3.0V_MOTION) and TWL4030 VDAC
	 * (1.8V_MOTION_VIO) is required to power the sensors that are slaves
	 * on I2C3. When not powered, these sensors cause I2C3 SCK to stay low.
	 */

	i2c_set_bus_num(0);

	/* TWL4030 VAUX2 (3.0V_MOTION) to 2.8V */
	twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VAUX2_DEDICATED,
				TWL4030_PM_RECEIVER_VAUX2_VSEL_28,
				TWL4030_PM_RECEIVER_VAUX2_DEV_GRP,
				TWL4030_PM_RECEIVER_DEV_GRP_P1);

	/* TWL4030 VDAC (1.8V_MOTION_VIO) to 1.8V */
	twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VDAC_DEDICATED,
				TWL4030_PM_RECEIVER_VDAC_VSEL_18,
				TWL4030_PM_RECEIVER_VDAC_DEV_GRP,
				TWL4030_PM_RECEIVER_DEV_GRP_P1);

	mdelay(100);	/* ramp-up delay from Linux code */

	i2c_set_bus_num(2);

	lp8720_init(SNIPER_GPIO_CAM_SUBPM_EN, LP8720_CHIP_IDSEL_GND);

	/* LP8720 LDO1 (3.0V_MMC) to 3.0V */
	lp8720_ldo_voltage(LP8720_LDO1_SETTINGS, LP8720_LDO1235_V_30,
				LP8720_DELAY_0);
	lp8720_ldo_enable(LP8720_LDO1_EN);

	i2c_set_bus_num(0);

	/* TWL4030 VMMC2 to 3.2V */
	twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VMMC2_DEDICATED,
				TWL4030_PM_RECEIVER_VMMC2_VSEL_32,
				TWL4030_PM_RECEIVER_VMMC2_DEV_GRP,
				TWL4030_PM_RECEIVER_DEV_GRP_P1);

	mdelay(100);	/* ramp-up delay from Linux code */
}
#endif

#if defined(CONFIG_USB_ETHER) && defined(CONFIG_MUSB_GADGET)
int board_eth_init(bd_t *bis)
{
	return usb_eth_initialize(bis);
}
#endif