1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
|
// SPDX-License-Identifier: GPL-2.0+
/*
* max98090.c -- MAX98090 ALSA SoC Audio driver
*
* Copyright 2011 Maxim Integrated Products
*/
#include <common.h>
#include <audio_codec.h>
#include <div64.h>
#include <dm.h>
#include <i2c.h>
#include <i2s.h>
#include <log.h>
#include <sound.h>
#include <asm/gpio.h>
#include <linux/delay.h>
#include "maxim_codec.h"
#include "max98090.h"
/*
* Sets hw params for max98090
*
* @priv: max98090 information pointer
* @rate: Sampling rate
* @bits_per_sample: Bits per sample
*
* @return -EIO for error, 0 for success.
*/
int max98090_hw_params(struct maxim_priv *priv, unsigned int rate,
unsigned int bits_per_sample)
{
int error;
unsigned char value;
switch (bits_per_sample) {
case 16:
maxim_i2c_read(priv, M98090_REG_INTERFACE_FORMAT, &value);
error = maxim_bic_or(priv, M98090_REG_INTERFACE_FORMAT,
M98090_WS_MASK, 0);
maxim_i2c_read(priv, M98090_REG_INTERFACE_FORMAT, &value);
break;
default:
debug("%s: Illegal bits per sample %d.\n",
__func__, bits_per_sample);
return -1;
}
/* Update filter mode */
if (rate < 240000)
error |= maxim_bic_or(priv, M98090_REG_FILTER_CONFIG,
M98090_MODE_MASK, 0);
else
error |= maxim_bic_or(priv, M98090_REG_FILTER_CONFIG,
M98090_MODE_MASK, M98090_MODE_MASK);
/* Update sample rate mode */
if (rate < 50000)
error |= maxim_bic_or(priv, M98090_REG_FILTER_CONFIG,
M98090_DHF_MASK, 0);
else
error |= maxim_bic_or(priv, M98090_REG_FILTER_CONFIG,
M98090_DHF_MASK, M98090_DHF_MASK);
if (error < 0) {
debug("%s: Error setting hardware params.\n", __func__);
return -EIO;
}
priv->rate = rate;
return 0;
}
/*
* Configures Audio interface system clock for the given frequency
*
* @priv: max98090 information
* @freq: Sampling frequency in Hz
*
* @return -EIO for error, 0 for success.
*/
int max98090_set_sysclk(struct maxim_priv *priv, unsigned int freq)
{
int error = 0;
/* Requested clock frequency is already setup */
if (freq == priv->sysclk)
return 0;
/* Setup clocks for slave mode, and using the PLL
* PSCLK = 0x01 (when master clk is 10MHz to 20MHz)
* 0x02 (when master clk is 20MHz to 40MHz)..
* 0x03 (when master clk is 40MHz to 60MHz)..
*/
if (freq >= 10000000 && freq < 20000000) {
error = maxim_i2c_write(priv, M98090_REG_SYSTEM_CLOCK,
M98090_PSCLK_DIV1);
} else if (freq >= 20000000 && freq < 40000000) {
error = maxim_i2c_write(priv, M98090_REG_SYSTEM_CLOCK,
M98090_PSCLK_DIV2);
} else if (freq >= 40000000 && freq < 60000000) {
error = maxim_i2c_write(priv, M98090_REG_SYSTEM_CLOCK,
M98090_PSCLK_DIV4);
} else {
debug("%s: Invalid master clock frequency\n", __func__);
return -1;
}
debug("%s: Clock at %uHz\n", __func__, freq);
if (error < 0)
return -1;
priv->sysclk = freq;
return 0;
}
/*
* Sets Max98090 I2S format
*
* @priv: max98090 information
* @fmt: i2S format - supports a subset of the options defined in i2s.h.
*
* @return -EIO for error, 0 for success.
*/
int max98090_set_fmt(struct maxim_priv *priv, int fmt)
{
u8 regval = 0;
int error = 0;
if (fmt == priv->fmt)
return 0;
priv->fmt = fmt;
switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
case SND_SOC_DAIFMT_CBS_CFS:
/* Set to slave mode PLL - MAS mode off */
error |= maxim_i2c_write(priv, M98090_REG_CLOCK_RATIO_NI_MSB,
0x00);
error |= maxim_i2c_write(priv, M98090_REG_CLOCK_RATIO_NI_LSB,
0x00);
error |= maxim_bic_or(priv, M98090_REG_CLOCK_MODE,
M98090_USE_M1_MASK, 0);
break;
case SND_SOC_DAIFMT_CBM_CFM:
/* Set to master mode */
debug("Master mode not supported\n");
break;
case SND_SOC_DAIFMT_CBS_CFM:
case SND_SOC_DAIFMT_CBM_CFS:
default:
debug("%s: Clock mode unsupported\n", __func__);
return -EINVAL;
}
error |= maxim_i2c_write(priv, M98090_REG_MASTER_MODE, regval);
regval = 0;
switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
case SND_SOC_DAIFMT_I2S:
regval |= M98090_DLY_MASK;
break;
case SND_SOC_DAIFMT_LEFT_J:
break;
case SND_SOC_DAIFMT_RIGHT_J:
regval |= M98090_RJ_MASK;
break;
case SND_SOC_DAIFMT_DSP_A:
/* Not supported mode */
default:
debug("%s: Unrecognized format.\n", __func__);
return -EINVAL;
}
switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
case SND_SOC_DAIFMT_NB_NF:
break;
case SND_SOC_DAIFMT_NB_IF:
regval |= M98090_WCI_MASK;
break;
case SND_SOC_DAIFMT_IB_NF:
regval |= M98090_BCI_MASK;
break;
case SND_SOC_DAIFMT_IB_IF:
regval |= M98090_BCI_MASK | M98090_WCI_MASK;
break;
default:
debug("%s: Unrecognized inversion settings.\n", __func__);
return -EINVAL;
}
error |= maxim_i2c_write(priv, M98090_REG_INTERFACE_FORMAT, regval);
if (error < 0) {
debug("%s: Error setting i2s format.\n", __func__);
return -EIO;
}
return 0;
}
/*
* resets the audio codec
*
* @priv: max98090 information
* @return -EIO for error, 0 for success.
*/
static int max98090_reset(struct maxim_priv *priv)
{
int ret;
/*
* Gracefully reset the DSP core and the codec hardware in a proper
* sequence.
*/
ret = maxim_i2c_write(priv, M98090_REG_SOFTWARE_RESET,
M98090_SWRESET_MASK);
if (ret != 0) {
debug("%s: Failed to reset DSP: %d\n", __func__, ret);
return ret;
}
mdelay(20);
return 0;
}
/*
* Initialise max98090 codec device
*
* @priv: max98090 information
*
* @return -EIO for error, 0 for success.
*/
int max98090_device_init(struct maxim_priv *priv)
{
unsigned char id;
int error = 0;
/* reset the codec, the DSP core, and disable all interrupts */
error = max98090_reset(priv);
if (error != 0) {
debug("Reset\n");
return error;
}
/* initialize private data */
priv->sysclk = -1U;
priv->rate = -1U;
priv->fmt = -1U;
error = maxim_i2c_read(priv, M98090_REG_REVISION_ID, &id);
if (error < 0) {
debug("%s: Failure reading hardware revision: %d\n",
__func__, id);
return -EIO;
}
debug("%s: Hardware revision: %d\n", __func__, id);
return 0;
}
static int max98090_setup_interface(struct maxim_priv *priv)
{
unsigned char id;
int error;
/* Reading interrupt status to clear them */
error = maxim_i2c_read(priv, M98090_REG_DEVICE_STATUS, &id);
error |= maxim_i2c_write(priv, M98090_REG_DAC_CONTROL,
M98090_DACHP_MASK);
error |= maxim_i2c_write(priv, M98090_REG_BIAS_CONTROL,
M98090_VCM_MODE_MASK);
error |= maxim_i2c_write(priv, M98090_REG_LEFT_SPK_MIXER, 0x1);
error |= maxim_i2c_write(priv, M98090_REG_RIGHT_SPK_MIXER, 0x2);
error |= maxim_i2c_write(priv, M98090_REG_LEFT_SPK_VOLUME, 0x25);
error |= maxim_i2c_write(priv, M98090_REG_RIGHT_SPK_VOLUME, 0x25);
error |= maxim_i2c_write(priv, M98090_REG_CLOCK_RATIO_NI_MSB, 0x0);
error |= maxim_i2c_write(priv, M98090_REG_CLOCK_RATIO_NI_LSB, 0x0);
error |= maxim_i2c_write(priv, M98090_REG_MASTER_MODE, 0x0);
error |= maxim_i2c_write(priv, M98090_REG_INTERFACE_FORMAT, 0x0);
error |= maxim_i2c_write(priv, M98090_REG_IO_CONFIGURATION,
M98090_SDIEN_MASK);
error |= maxim_i2c_write(priv, M98090_REG_DEVICE_SHUTDOWN,
M98090_SHDNN_MASK);
error |= maxim_i2c_write(priv, M98090_REG_OUTPUT_ENABLE,
M98090_HPREN_MASK | M98090_HPLEN_MASK |
M98090_SPREN_MASK | M98090_SPLEN_MASK |
M98090_DAREN_MASK | M98090_DALEN_MASK);
error |= maxim_i2c_write(priv, M98090_REG_IO_CONFIGURATION,
M98090_SDOEN_MASK | M98090_SDIEN_MASK);
if (error < 0)
return -EIO;
return 0;
}
static int max98090_do_init(struct maxim_priv *priv, int sampling_rate,
int mclk_freq, int bits_per_sample)
{
int ret = 0;
ret = max98090_setup_interface(priv);
if (ret < 0) {
debug("%s: max98090 setup interface failed\n", __func__);
return ret;
}
ret = max98090_set_sysclk(priv, mclk_freq);
if (ret < 0) {
debug("%s: max98090 codec set sys clock failed\n", __func__);
return ret;
}
ret = max98090_hw_params(priv, sampling_rate, bits_per_sample);
if (ret == 0) {
ret = max98090_set_fmt(priv, SND_SOC_DAIFMT_I2S |
SND_SOC_DAIFMT_NB_NF |
SND_SOC_DAIFMT_CBS_CFS);
}
return ret;
}
static int max98090_set_params(struct udevice *dev, int interface, int rate,
int mclk_freq, int bits_per_sample,
uint channels)
{
struct maxim_priv *priv = dev_get_priv(dev);
return max98090_do_init(priv, rate, mclk_freq, bits_per_sample);
}
static int max98090_probe(struct udevice *dev)
{
struct maxim_priv *priv = dev_get_priv(dev);
int ret;
priv->dev = dev;
ret = max98090_device_init(priv);
if (ret < 0) {
debug("%s: max98090 codec chip init failed\n", __func__);
return ret;
}
return 0;
}
static const struct audio_codec_ops max98090_ops = {
.set_params = max98090_set_params,
};
static const struct udevice_id max98090_ids[] = {
{ .compatible = "maxim,max98090" },
{ }
};
U_BOOT_DRIVER(max98090) = {
.name = "max98090",
.id = UCLASS_AUDIO_CODEC,
.of_match = max98090_ids,
.probe = max98090_probe,
.ops = &max98090_ops,
.priv_auto = sizeof(struct maxim_priv),
};
|
