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/*
* Copyright (C) 2014 Paul Kocialkowski <contact@paulk.fr>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef LP8720_H
#define LP8720_H
#include <common.h>
/*
* Chip ID selection
*/
#define LP8720_CHIP_IDSEL_VBATT 0x7F
#define LP8720_CHIP_IDSEL_HI_Z 0x7C
#define LP8720_CHIP_IDSEL_GND 0x7D
/*
* Registers
*/
#define LP8720_GENERAL_SETTINGS 0x00
#define LP8720_LDO1_SETTINGS 0x01
#define LP8720_LDO2_SETTINGS 0x02
#define LP8720_LDO3_SETTINGS 0x03
#define LP8720_LDO4_SETTINGS 0x04
#define LP8720_LDO5_SETTINGS 0x05
#define LP8720_BUCK_SETTINGS1 0x06
#define LP8720_BUCK_SETTINGS2 0x07
#define LP8720_ENABLE_BITS 0x08
#define LP8720_PULLDOWN_BITS 0x09
#define LP8720_STATUS_BITS 0x0A
#define LP8720_INTERRUPT_BITS 0x0B
#define LP8720_INTERRUPT_MASK 0x0C
/*
* Values
*/
/* LP8720_GENERAL_SETTINGS */
#define LP8720_25_US_TIME_STEP (1 << 0)
#define LP8720_50_US_TIME_STEP (0 << 0)
/* LP8720_LDO*_SETTINGS */
#define LP8720_LDO1235_V_12 0x00
#define LP8720_LDO1235_V_18 0x0C
#define LP8720_LDO1235_V_30 0x1D
#define LP8720_LDO1235_V_33 0x1F
#define LP8720_LDO4_V_12 0x00
#define LP8720_LDO4_V_14 0x09
#define LP8720_LDO4_V_18 0x11
#define LP8720_LDO4_V_28 0x1E
#define LP8720_DELAY_0 0
#define LP8720_DELAY_1_TS 1
#define LP8720_DELAY_2_TS 2
#define LP8720_DELAY_3_TS 3
#define LP8720_DELAY_4_TS 4
#define LP8720_DELAY_5_TS 5
#define LP8720_DELAY_6_TS 6
#define LP8720_DELAY_NO_START 7
/* LP8720_ENABLE_BITS */
#define LP8720_LDO1_EN (1 << 0)
#define LP8720_LDO2_EN (1 << 1)
#define LP8720_LDO3_EN (1 << 2)
#define LP8720_LDO4_EN (1 << 3)
#define LP8720_LDO5_EN (1 << 4)
#define LP8720_BUCK_EN (1 << 5)
/*
* Driver info
*/
struct lp8720_info {
int enable_gpio;
int chip_idsel;
};
/*
* Declarations
*/
int lp8720_init(int enable_gpio, int chip_idsel);
int lp8720_enable(void);
int lp8720_is_enabled(void);
int lp8720_ldo_enable(u8 ldo_enable);
int lp8720_ldo_voltage(u8 ldo_reg, u8 voltage, u8 delay);
#endif
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