diff options
| author | leilk.liu | 2021-02-07 11:09:52 +0800 |
|---|---|---|
| committer | Mark Brown | 2021-02-08 11:41:22 +0000 |
| commit | 0486d9f91d373e7f47276f30898ee0cb12656a70 (patch) | |
| tree | 426f4e9eea532482fddac7a59b0c1c1cf70600ff /drivers/spi | |
| parent | 4cea6b8cc34ee61358d681bd2009b8bac1736ffe (diff) | |
spi: support CS timing for HW & SW mode
this patch supports the controller's HW CS and SW CS via use cs_gpio.
Signed-off-by: leilk.liu <leilk.liu@mediatek.com>
Link: https://lore.kernel.org/r/20210207030953.9297-3-leilk.liu@mediatek.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'drivers/spi')
| -rw-r--r-- | drivers/spi/spi.c | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c index 21ea3e8a00e2..a247fcac0dc7 100644 --- a/drivers/spi/spi.c +++ b/drivers/spi/spi.c @@ -810,7 +810,8 @@ static void spi_set_cs(struct spi_device *spi, bool enable) spi->controller->last_cs_enable = enable; spi->controller->last_cs_mode_high = spi->mode & SPI_CS_HIGH; - if (!spi->controller->set_cs_timing) { + if (spi->cs_gpiod || gpio_is_valid(spi->cs_gpio) || + !spi->controller->set_cs_timing) { if (enable1) spi_delay_exec(&spi->controller->cs_setup, NULL); else @@ -841,7 +842,8 @@ static void spi_set_cs(struct spi_device *spi, bool enable) spi->controller->set_cs(spi, !enable); } - if (!spi->controller->set_cs_timing) { + if (spi->cs_gpiod || gpio_is_valid(spi->cs_gpio) || + !spi->controller->set_cs_timing) { if (!enable1) spi_delay_exec(&spi->controller->cs_inactive, NULL); } @@ -3464,7 +3466,8 @@ int spi_set_cs_timing(struct spi_device *spi, struct spi_delay *setup, size_t len; int status; - if (spi->controller->set_cs_timing) { + if (spi->controller->set_cs_timing && + !(spi->cs_gpiod || gpio_is_valid(spi->cs_gpio))) { if (spi->controller->auto_runtime_pm) { status = pm_runtime_get_sync(parent); if (status < 0) { |