diff options
author | Tom Rini | 2017-09-23 17:32:53 -0400 |
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committer | Tom Rini | 2017-09-23 17:32:53 -0400 |
commit | 0929863aff433d1e87ad6cd03d72f2909fa25573 (patch) | |
tree | a2ede6a341486cb0eb52352e2538c6b39c75a6aa | |
parent | 6ef71c61f6aba20e8d24e7bff34cc9577305ecf1 (diff) | |
parent | a7d5b6c6686f6f51a750781ff12a360dc64d1076 (diff) |
Merge git://git.denx.de/u-boot-socfpga
-rw-r--r-- | arch/arm/mach-socfpga/misc_gen5.c | 2 | ||||
-rw-r--r-- | configs/socfpga_de0_nano_soc_defconfig | 3 | ||||
-rw-r--r-- | include/configs/socfpga_common.h | 2 |
3 files changed, 4 insertions, 3 deletions
diff --git a/arch/arm/mach-socfpga/misc_gen5.c b/arch/arm/mach-socfpga/misc_gen5.c index 2f1da740fbe..91ddb79f731 100644 --- a/arch/arm/mach-socfpga/misc_gen5.c +++ b/arch/arm/mach-socfpga/misc_gen5.c @@ -144,7 +144,7 @@ static const struct { const u16 pn; const char *name; const char *var; -} const socfpga_fpga_model[] = { +} socfpga_fpga_model[] = { /* Cyclone V E */ { 0x2b15, "Cyclone V, E/A2", "cv_e_a2" }, { 0x2b05, "Cyclone V, E/A4", "cv_e_a4" }, diff --git a/configs/socfpga_de0_nano_soc_defconfig b/configs/socfpga_de0_nano_soc_defconfig index 0bb9121c262..b4fd29d2073 100644 --- a/configs/socfpga_de0_nano_soc_defconfig +++ b/configs/socfpga_de0_nano_soc_defconfig @@ -12,6 +12,7 @@ CONFIG_DEFAULT_FDT_FILE="socfpga_cyclone5_de0_nano_soc.dtb" CONFIG_VERSION_VARIABLE=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SPL=y +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_STACK_R=y CONFIG_HUSH_PARSER=y @@ -24,6 +25,7 @@ CONFIG_CMD_DFU=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y +CONFIG_CMD_PART=y CONFIG_CMD_SF=y CONFIG_CMD_SPI=y CONFIG_CMD_USB=y @@ -38,6 +40,7 @@ CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_CMD_UBI=y CONFIG_ENV_IS_IN_MMC=y +CONFIG_EFI_PARTITION=y CONFIG_SPL_DM=y CONFIG_DFU_MMC=y CONFIG_FPGA_SOCFPGA=y diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index 9897e11b591..7b5417a75bc 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -142,12 +142,10 @@ */ #ifdef CONFIG_NAND_DENALI #define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define CONFIG_SYS_NAND_MAX_CHIPS 1 #define CONFIG_SYS_NAND_ONFI_DETECTION #define CONFIG_NAND_DENALI_ECC_SIZE 512 #define CONFIG_SYS_NAND_REGS_BASE SOCFPGA_NANDREGS_ADDRESS #define CONFIG_SYS_NAND_DATA_BASE SOCFPGA_NANDDATA_ADDRESS -#define CONFIG_SYS_NAND_BASE (CONFIG_SYS_NAND_DATA_BASE + 0x10) #endif /* |