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authorPeng Fan2016-08-11 14:02:50 +0800
committerStefano Babic2016-10-04 15:41:01 +0200
commit5b66482d44b4e9571c64285254a43bdfe9ed1262 (patch)
tree1d5071044b0bff227ffcfb6d81ef9ac6e8dd7883
parent2d4bbd01a1c2d74bef645296bf72aa33dc5eb7d3 (diff)
imx: imx6ull: adjust the ldo 1.2v bandgap voltage
Per to design team, on i.MX6UL, the LDO 1.2V bandgap voltage is 30mV higher, so we need to adjust the REFTOP_VBGADJ(anatop MISC0 bit[6:4]) setting to 2b'110. Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Bai Ping <ping.bai@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
-rw-r--r--arch/arm/cpu/armv7/mx6/soc.c6
-rw-r--r--arch/arm/include/asm/arch-mx6/crm_regs.h1
2 files changed, 7 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c
index ff1c4f4dcb3..bc3e634bb5d 100644
--- a/arch/arm/cpu/armv7/mx6/soc.c
+++ b/arch/arm/cpu/armv7/mx6/soc.c
@@ -314,6 +314,12 @@ static void init_bandgap(void)
* be set.
*/
writel(BM_ANADIG_ANA_MISC0_REFTOP_SELBIASOFF, &anatop->ana_misc0_set);
+ /*
+ * On i.MX6ULL, the LDO 1.2V bandgap voltage is 30mV higher. so set
+ * VBGADJ bits to 2b'110 to adjust it.
+ */
+ if (is_mx6ull())
+ writel(BM_ANADIG_ANA_MISC0_REFTOP_VBGADJ, &anatop->ana_misc0_set);
}
diff --git a/arch/arm/include/asm/arch-mx6/crm_regs.h b/arch/arm/include/asm/arch-mx6/crm_regs.h
index 7a55aecb7fd..f74737a68e6 100644
--- a/arch/arm/include/asm/arch-mx6/crm_regs.h
+++ b/arch/arm/include/asm/arch-mx6/crm_regs.h
@@ -1271,6 +1271,7 @@ struct mxc_ccm_reg {
(((v) << 0) & BM_ANADIG_PFD_528_PFD0_FRAC)
#define BM_ANADIG_ANA_MISC0_REFTOP_SELBIASOFF 0x00000008
+#define BM_ANADIG_ANA_MISC0_REFTOP_VBGADJ 0x60
#define BM_PMU_MISC2_AUDIO_DIV_MSB (1 << 23)
#define BP_PMU_MISC2_AUDIO_DIV_MSB 23