9 files changed, 0 insertions, 10 deletions
diff --git a/arch/arm/mach-davinci/da850_lowlevel.c b/arch/arm/mach-davinci/da850_lowlevel.c
index 936b5e11667..78d50d4e719 100644
--- a/arch/arm/mach-davinci/da850_lowlevel.c
+++ b/arch/arm/mach-davinci/da850_lowlevel.c
@@ -146,7 +146,6 @@ static int da850_pll_init(struct davinci_pllc_regs *reg, unsigned long pllmult)
 	 */
 	setbits_le32(&reg->pllctl, PLLCTL_PLLEN);
 
-
 	/*
 	 * clear EMIFA and EMIFB clock source settings, let them
 	 * run off SYSCLK
diff --git a/arch/arm/mach-keystone/include/mach/psc_defs.h b/arch/arm/mach-keystone/include/mach/psc_defs.h
index f164f95bf24..e5d70d2931e 100644
--- a/arch/arm/mach-keystone/include/mach/psc_defs.h
+++ b/arch/arm/mach-keystone/include/mach/psc_defs.h
@@ -26,7 +26,6 @@
 #define PSC_REG_MDSTAT(x)       (0x800 + (4 * (x)))
 #define PSC_REG_MDCTL(x)        (0xa00 + (4 * (x)))
 
-
 static inline u32 _boot_bit_mask(u32 x, u32 y)
 {
 	u32 val = (1 << (x - y + 1)) - 1;
diff --git a/arch/arm/mach-keystone/msmc.c b/arch/arm/mach-keystone/msmc.c
index a20e0c98865..51c994f972f 100644
--- a/arch/arm/mach-keystone/msmc.c
+++ b/arch/arm/mach-keystone/msmc.c
@@ -53,7 +53,6 @@ struct msms_regs {
 	struct mpax ses[16][8];
 };
 
-
 void msmc_share_all_segments(int priv_id)
 {
 	struct msms_regs *msmc = (struct msms_regs *)KS2_MSMC_CTRL_BASE;
diff --git a/arch/arm/mach-omap2/am33xx/chilisom.c b/arch/arm/mach-omap2/am33xx/chilisom.c
index 4765ce0adee..515b6f1b87c 100644
--- a/arch/arm/mach-omap2/am33xx/chilisom.c
+++ b/arch/arm/mach-omap2/am33xx/chilisom.c
@@ -102,7 +102,6 @@ void chilisom_spl_board_init(void)
 	/* Get the frequency */
 	dpll_mpu_opp100.m = am335x_get_efuse_mpu_max_freq(cdev);
 
-
 	if (i2c_probe(TPS65217_CHIP_PM))
 		return;
 
diff --git a/arch/arm/mach-omap2/am33xx/clock.c b/arch/arm/mach-omap2/am33xx/clock.c
index f07003c95bc..cc955345db9 100644
--- a/arch/arm/mach-omap2/am33xx/clock.c
+++ b/arch/arm/mach-omap2/am33xx/clock.c
@@ -213,7 +213,6 @@ void do_disable_clocks(u32 *const *clk_domains,
 {
 	u32 i, max = 100;
 
-
 	/* Clock modules that need to be put in SW_DISABLE */
 	for (i = 0; (i < max) && clk_modules_disable && clk_modules_disable[i];
 	     i++)
diff --git a/arch/arm/mach-omap2/am33xx/sys_info.c b/arch/arm/mach-omap2/am33xx/sys_info.c
index 87afc096602..7ac67cb4899 100644
--- a/arch/arm/mach-omap2/am33xx/sys_info.c
+++ b/arch/arm/mach-omap2/am33xx/sys_info.c
@@ -74,7 +74,6 @@ u32 get_sys_clk_index(void)
 			CTRL_SYSBOOT_15_14_SHIFT);
 }
 
-
 #ifdef CONFIG_DISPLAY_CPUINFO
 static char *cpu_revs[] = {
 		"1.0",
diff --git a/arch/arm/mach-omap2/clocks-common.c b/arch/arm/mach-omap2/clocks-common.c
index 2a0c22841d0..18d099145c5 100644
--- a/arch/arm/mach-omap2/clocks-common.c
+++ b/arch/arm/mach-omap2/clocks-common.c
@@ -896,7 +896,6 @@ void do_disable_clocks(u32 const *clk_domains,
 {
 	u32 i, max = 100;
 
-
 	/* Clock modules that need to be put in SW_DISABLE */
 	for (i = 0; (i < max) && clk_modules_disable[i]; i++)
 		disable_clock_module(clk_modules_disable[i],
diff --git a/arch/arm/mach-omap2/hwinit-common.c b/arch/arm/mach-omap2/hwinit-common.c
index 138501602c3..bb67e50fd56 100644
--- a/arch/arm/mach-omap2/hwinit-common.c
+++ b/arch/arm/mach-omap2/hwinit-common.c
@@ -268,7 +268,6 @@ void watchdog_init(void)
 	writel(WD_UNLOCK2, &wd2_base->wspr);
 }
 
-
 /*
  * This function finds the SDRAM size available in the system
  * based on DMM section configurations
@@ -315,7 +314,6 @@ u32 omap_sdram_size(void)
 	return total_size;
 }
 
-
 /*
  * Routine: dram_init
  * Description: sets uboots idea of sdram size
diff --git a/arch/arm/mach-omap2/omap3/board.c b/arch/arm/mach-omap2/omap3/board.c
index c5ada607f97..1de343ff48e 100644
--- a/arch/arm/mach-omap2/omap3/board.c
+++ b/arch/arm/mach-omap2/omap3/board.c
@@ -405,7 +405,6 @@ void v7_arch_cp15_set_acr(u32 acr, u32 cpu_midr, u32 cpu_rev_comb,
 	asm volatile ("mcr p15, 0, %0, c1, c0, 1" : : "r" (acr));
 }
 
-
 #ifndef CONFIG_SYS_L2CACHE_OFF
 static void omap3_update_aux_cr(u32 set_bits, u32 clear_bits)
 {