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authorJagan Teki2022-12-14 23:20:50 +0530
committerKever Yang2023-01-16 18:01:10 +0800
commit5ab30c3176bfda282d8e350c41d9731214eac582 (patch)
tree6b60b4d6d81ea36fec5c73fee6aa9dea80770104 /.readthedocs.yml
parent29c31489743a92d8be9446afa778dde0ba702111 (diff)
ram: rockchip: Update ddr pctl regs for px30
Add full ddr pctl registers and bit masks for px30. Signed-off-by: YouMin Chen <cym@rock-chips.com> Signed-off-by: Jagan Teki <jagan@edgeble.ai> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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