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| author | David Wu | 2019-12-03 19:26:50 +0800 |
|---|---|---|
| committer | Kever Yang | 2019-12-06 00:06:23 +0800 |
| commit | 41eee945ce2a9a2a0955d30ee03b5653fdd04cbc (patch) | |
| tree | f0a7130f9217ec8705ce9d116ac6fb705681500d /.travis.yml | |
| parent | e0e6c96a671b43117554e7f6a1b9190e422ae460 (diff) | |
pinctrl: rockchip: Add pinctrl support for rk3308
An iomux register contains 8 pins, each of which is represented
by 2 bits, but the register offset is 0x8.
For example, GRF_GPIO0A_IOMUX offset is 0x0, but GRF_GPIO0B_IOMUX
offset is 0x8, the offset 0x4 is reserved.
So add a type IOMUX_8WIDTH_2BIT to calculate offset.
Signed-off-by: David Wu <david.wu@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Diffstat (limited to '.travis.yml')
0 files changed, 0 insertions, 0 deletions