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authorSimon South2019-10-06 12:28:13 -0400
committerKever Yang2019-11-10 20:40:20 +0800
commit18c24c11778c0571b6b559c02d1d58d65a8e44c1 (patch)
treef9164d4e8a436799208ec99cdb012322243bcad8
parentb5500b20576e8e786d74d92549ca66d31c92b0d9 (diff)
ram: rk3328: Use correct frequency units in function
Fix a pair of tests in phy_dll_bypass_set() that used incorrect units for the DDR frequency, causing the DRAM controller to be misconfigured in most cases. Signed-off-by: Simon South <simon@simonsouth.net> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
-rw-r--r--drivers/ram/rockchip/sdram_rk3328.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/ram/rockchip/sdram_rk3328.c b/drivers/ram/rockchip/sdram_rk3328.c
index 656696ac3c5..0541bbadf07 100644
--- a/drivers/ram/rockchip/sdram_rk3328.c
+++ b/drivers/ram/rockchip/sdram_rk3328.c
@@ -311,12 +311,12 @@ static void phy_dll_bypass_set(struct dram_info *dram, u32 freq)
setbits_le32(PHY_REG(phy_base, 0x56), 1 << 4);
clrbits_le32(PHY_REG(phy_base, 0x57), 1 << 3);
- if (freq <= (400 * MHz))
+ if (freq <= 400)
/* DLL bypass */
setbits_le32(PHY_REG(phy_base, 0xa4), 0x1f);
else
clrbits_le32(PHY_REG(phy_base, 0xa4), 0x1f);
- if (freq <= (680 * MHz))
+ if (freq <= 680)
tmp = 2;
else
tmp = 1;