diff options
author | Heinrich Schuchardt | 2020-05-27 20:04:24 +0200 |
---|---|---|
committer | Tom Rini | 2020-07-07 18:23:48 -0400 |
commit | 22a4e006be52fbd5249f46c36c4d8016c15b9fa7 (patch) | |
tree | 4f37407e7661f1aaf7c52275efdb8be3f2c1fab2 | |
parent | b87d8d6a0e0c5c37b341c20284ef1c43601cc9c8 (diff) |
arm: use correct argument size of special registers
Compiling with clang on ARMv8 shows errors like:
./arch/arm/include/asm/system.h:162:32: note: use constraint modifier "w"
asm volatile("msr sctlr_el1, %0" : : "r" (val) : "cc");
^~
%w0
These errors are due to using an incorrect size for the variables used
for writing to and reading from special registers which have 64 bits on
ARMv8.
Mask off reserved bits when reading the exception level.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
-rw-r--r-- | arch/arm/include/asm/system.h | 10 |
1 files changed, 6 insertions, 4 deletions
diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h index 7a40b56acdc..b8c1b4ea741 100644 --- a/arch/arm/include/asm/system.h +++ b/arch/arm/include/asm/system.h @@ -133,14 +133,16 @@ enum dcache_option { static inline unsigned int current_el(void) { - unsigned int el; + unsigned long el; + asm volatile("mrs %0, CurrentEL" : "=r" (el) : : "cc"); - return el >> 2; + return 3 & (el >> 2); } static inline unsigned int get_sctlr(void) { - unsigned int el, val; + unsigned int el; + unsigned long val; el = current_el(); if (el == 1) @@ -153,7 +155,7 @@ static inline unsigned int get_sctlr(void) return val; } -static inline void set_sctlr(unsigned int val) +static inline void set_sctlr(unsigned long val) { unsigned int el; |