diff options
| author | Tom Rini | 2018-08-22 22:36:08 -0400 |
|---|---|---|
| committer | Tom Rini | 2018-08-22 22:36:08 -0400 |
| commit | 2418734ed429058b396d2aeb6b91f875cdc8e4ce (patch) | |
| tree | 34f5d0e4d89d51b825dcbb932dd167235d9097cf | |
| parent | 26699998e9f4adb8c0ac8b36a2c3089fa8f05283 (diff) | |
| parent | 3d186cf3f3ab5c18ede0f0a4ff85ffe99839bc7b (diff) | |
Merge branch 'master' of git://git.denx.de/u-boot-tegra
| -rw-r--r-- | arch/arm/dts/tegra20-u-boot.dtsi | 10 | ||||
| -rw-r--r-- | arch/arm/mach-tegra/ap.c | 9 | ||||
| -rw-r--r-- | arch/arm/mach-tegra/gpu.c | 18 |
3 files changed, 29 insertions, 8 deletions
diff --git a/arch/arm/dts/tegra20-u-boot.dtsi b/arch/arm/dts/tegra20-u-boot.dtsi index 7c119725528..f64667e5498 100644 --- a/arch/arm/dts/tegra20-u-boot.dtsi +++ b/arch/arm/dts/tegra20-u-boot.dtsi @@ -1,3 +1,13 @@ #include <config.h> #include "tegra-u-boot.dtsi" + + +/ { + host1x@50000000 { + u-boot,dm-pre-reloc; + dc@54200000 { + u-boot,dm-pre-reloc; + }; + }; +}; diff --git a/arch/arm/mach-tegra/ap.c b/arch/arm/mach-tegra/ap.c index bf8001d9db0..84c20a48ad4 100644 --- a/arch/arm/mach-tegra/ap.c +++ b/arch/arm/mach-tegra/ap.c @@ -155,8 +155,13 @@ static void init_pmc_scratch(void) int i; /* SCRATCH0 is initialized by the boot ROM and shouldn't be cleared */ - for (i = 0; i < 23; i++) - writel(0, &pmc->pmc_scratch1+i); +#if defined(CONFIG_TEGRA_SUPPORT_NON_SECURE) + if (!tegra_cpu_is_non_secure()) +#endif + { + for (i = 0; i < 23; i++) + writel(0, &pmc->pmc_scratch1 + i); + } /* ODMDATA is for kernel use to determine RAM size, LP config, etc. */ odmdata = get_odmdata(); diff --git a/arch/arm/mach-tegra/gpu.c b/arch/arm/mach-tegra/gpu.c index 2e203f735bf..e047f678211 100644 --- a/arch/arm/mach-tegra/gpu.c +++ b/arch/arm/mach-tegra/gpu.c @@ -9,6 +9,7 @@ #include <asm/io.h> #include <asm/arch/tegra.h> #include <asm/arch/mc.h> +#include <asm/arch-tegra/ap.h> #include <fdt_support.h> @@ -18,12 +19,17 @@ void tegra_gpu_config(void) { struct mc_ctlr *mc = (struct mc_ctlr *)NV_PA_MC_BASE; - /* Turn VPR off */ - writel(0, &mc->mc_video_protect_size_mb); - writel(TEGRA_MC_VIDEO_PROTECT_REG_WRITE_ACCESS_DISABLED, - &mc->mc_video_protect_reg_ctrl); - /* read back to ensure the write went through */ - readl(&mc->mc_video_protect_reg_ctrl); +#if defined(CONFIG_TEGRA_SUPPORT_NON_SECURE) + if (!tegra_cpu_is_non_secure()) +#endif + { + /* Turn VPR off */ + writel(0, &mc->mc_video_protect_size_mb); + writel(TEGRA_MC_VIDEO_PROTECT_REG_WRITE_ACCESS_DISABLED, + &mc->mc_video_protect_reg_ctrl); + /* read back to ensure the write went through */ + readl(&mc->mc_video_protect_reg_ctrl); + } debug("configured VPR\n"); |