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authorFilip Drazic2016-08-29 19:32:56 +0200
committerMichal Simek2016-11-15 15:30:39 +0100
commit2af3932fca0123939695a316fc62832bacb1d760 (patch)
tree8878600cbc2db3f7461513f0fc68af901aa430dd
parent7780a869d7e7dadb0c9b99002d36671aff22a9cd (diff)
ARM64: zynqmp: DT: Add PM domains for GPU and PCIE
Signed-off-by: Filip Drazic <filip.drazic@aggios.com> Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
-rw-r--r--arch/arm/dts/zynqmp.dtsi12
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi
index 6df8ee9fd1d..c2eb0c5d4e9 100644
--- a/arch/arm/dts/zynqmp.dtsi
+++ b/arch/arm/dts/zynqmp.dtsi
@@ -189,6 +189,16 @@
#power-domain-cells = <0x0>;
pd-id = <0x30>;
};
+
+ pd_pcie: pd-pcie {
+ #power-domain-cells = <0x0>;
+ pd-id = <0x3b>;
+ };
+
+ pd_gpu: pd-gpu {
+ #power-domain-cells = <0x0>;
+ pd-id = <0x3a>;
+ };
};
pmu {
@@ -392,6 +402,7 @@
interrupt-parent = <&gic>;
interrupts = <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>;
interrupt-names = "IRQGP", "IRQGPMMU", "IRQPP0", "IRQPPMMU0", "IRQPP1", "IRQPPMMU1";
+ power-domains = <&pd_gpu>;
};
/* ADMA */
@@ -611,6 +622,7 @@
<0x0 0x0 0x0 0x2 &pcie_intc 0x2>,
<0x0 0x0 0x0 0x3 &pcie_intc 0x3>,
<0x0 0x0 0x0 0x4 &pcie_intc 0x4>;
+ power-domains = <&pd_pcie>;
pcie_intc: legacy-interrupt-controller {
interrupt-controller;
#address-cells = <0>;