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authorEric Benard2013-04-22 05:55:00 +0000
committerTom Rini2013-05-10 08:25:56 -0400
commit34fa07063a7f5fc437bcaa71156182bb3bf2f516 (patch)
treeb4bf61cb0c60c79b5708b99c7b4cca6c0c45d73f
parent81ac7e51ccf2984e9c0964a883d6b7e8fe875aad (diff)
davinci: handle CONFIG_SYS_CLE_MASK and CONFIG_SYS_ALE_MASK
these variables are curently defined in several config files but the driver doesn't use them and defaults to hardcoded values in nand_defs.h It's interesting to be able to change this hardcoded valude when the hardware is not using the default adress signals to drive ALE and CLE and two configuration defines already exist for this purpose so use them. Signed-off-by: Eric BĂ©nard <eric@eukrea.com>
-rw-r--r--arch/arm/include/asm/arch-davinci/nand_defs.h9
-rw-r--r--include/configs/da830evm.h4
-rw-r--r--include/configs/da850evm.h4
-rw-r--r--include/configs/enbw_cmc.h4
-rw-r--r--include/configs/tnetv107x_evm.h4
5 files changed, 17 insertions, 8 deletions
diff --git a/arch/arm/include/asm/arch-davinci/nand_defs.h b/arch/arm/include/asm/arch-davinci/nand_defs.h
index 10f3a392aba..4a30813808a 100644
--- a/arch/arm/include/asm/arch-davinci/nand_defs.h
+++ b/arch/arm/include/asm/arch-davinci/nand_defs.h
@@ -36,6 +36,15 @@
#define MASK_ALE 0x08
#endif
+#ifdef CONFIG_SYS_NAND_MASK_CLE
+#undef MASK_CLE
+#define MASK_CLE CONFIG_SYS_NAND_MASK_CLE
+#endif
+#ifdef CONFIG_SYS_NAND_MASK_ALE
+#undef MASK_ALE
+#define MASK_ALE CONFIG_SYS_NAND_MASK_ALE
+#endif
+
#define NAND_READ_START 0x00
#define NAND_READ_END 0x30
#define NAND_STATUS 0x70
diff --git a/include/configs/da830evm.h b/include/configs/da830evm.h
index f7ac256a0fa..198892ba571 100644
--- a/include/configs/da830evm.h
+++ b/include/configs/da830evm.h
@@ -109,8 +109,8 @@
#define CONFIG_SYS_NAND_CS 3
#define CONFIG_SYS_NAND_BASE DAVINCI_ASYNC_EMIF_DATA_CE3_BASE
#define CONFIG_SYS_NAND_PAGE_2K
-#define CONFIG_SYS_CLE_MASK 0x10
-#define CONFIG_SYS_ALE_MASK 0x8
+#define CONFIG_SYS_NAND_MASK_CLE 0x10
+#define CONFIG_SYS_NAND_MASK_ALE 0x8
#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
#endif
diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h
index 583568d309a..c420967411d 100644
--- a/include/configs/da850evm.h
+++ b/include/configs/da850evm.h
@@ -199,8 +199,8 @@
#define CONFIG_SYS_NAND_PAGE_2K
#define CONFIG_SYS_NAND_CS 3
#define CONFIG_SYS_NAND_BASE DAVINCI_ASYNC_EMIF_DATA_CE3_BASE
-#define CONFIG_SYS_CLE_MASK 0x10
-#define CONFIG_SYS_ALE_MASK 0x8
+#define CONFIG_SYS_NAND_MASK_CLE 0x10
+#define CONFIG_SYS_NAND_MASK_ALE 0x8
#undef CONFIG_SYS_NAND_HW_ECC
#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
#define CONFIG_SYS_NAND_HW_ECC_OOBFIRST
diff --git a/include/configs/enbw_cmc.h b/include/configs/enbw_cmc.h
index 2d63b670cd7..97bc9729a1b 100644
--- a/include/configs/enbw_cmc.h
+++ b/include/configs/enbw_cmc.h
@@ -118,8 +118,8 @@
#define CONFIG_SYS_NAND_PAGE_2K
#define CONFIG_SYS_NAND_CS 3
#define CONFIG_SYS_NAND_BASE DAVINCI_ASYNC_EMIF_DATA_CE3_BASE
-#define CONFIG_SYS_CLE_MASK 0x10
-#define CONFIG_SYS_ALE_MASK 0x8
+#define CONFIG_SYS_NAND_MASK_CLE 0x10
+#define CONFIG_SYS_NAND_MASK_ALE 0x8
#undef CONFIG_SYS_NAND_HW_ECC
#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
diff --git a/include/configs/tnetv107x_evm.h b/include/configs/tnetv107x_evm.h
index d6371fce4d0..cabc06e5ba6 100644
--- a/include/configs/tnetv107x_evm.h
+++ b/include/configs/tnetv107x_evm.h
@@ -82,8 +82,8 @@
#define CONFIG_SYS_NAND_CS 2
#define CONFIG_SYS_NAND_USE_FLASH_BBT
#define CONFIG_SYS_NAND_BASE TNETV107X_ASYNC_EMIF_DATA_CE0_BASE
-#define CONFIG_SYS_CLE_MASK 0x10
-#define CONFIG_SYS_ALE_MASK 0x8
+#define CONFIG_SYS_NAND_MASK_CLE 0x10
+#define CONFIG_SYS_NAND_MASK_ALE 0x8
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_MTD_PARTITIONS
#define CONFIG_CMD_MTDPARTS