diff options
| author | Andre Przywara | 2020-07-06 01:40:46 +0100 |
|---|---|---|
| committer | Jagan Teki | 2020-10-21 23:45:50 +0530 |
| commit | 3940a471553a31cda4e19024a1bf5bbdc4ac9e46 (patch) | |
| tree | 6709e1c809c2cc89f6a1e3dd0cbf3f6b1f36121e | |
| parent | 4f0278dac56a658ef1e0967fec0bb95372a875bd (diff) | |
sunxi: Pine-H64: Explicitly enable PHY regulator
According to the devicetree and the schematic, the 3.3V power rail for
the PHY is enabled by GPIO PC16. It's wired as active-high, with a
pull-up resistor, so actually works already when the GPIO is in
High-Z state.
However we should not take any chances and explicitly set the GPIO pin
to high, to avoid accidentally losing the PHY power.
The existing MACPWR Kconfig allows to do this easily.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <mripard@kernel.org>
Tested-by: Amit Singh Tomar <amittomer25@gmail.com> # Pine64+
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
| -rw-r--r-- | configs/pine_h64_defconfig | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/configs/pine_h64_defconfig b/configs/pine_h64_defconfig index 328849d7243..07ad31e3a70 100644 --- a/configs/pine_h64_defconfig +++ b/configs/pine_h64_defconfig @@ -11,5 +11,6 @@ CONFIG_SPL_SPI_SUNXI=y CONFIG_DEFAULT_DEVICE_TREE="sun50i-h6-pine-h64" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SUN8I_EMAC=y +CONFIG_MACPWR="PC16" CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y |