diff options
author | York Sun | 2016-11-16 11:18:31 -0800 |
---|---|---|
committer | York Sun | 2016-11-23 23:42:05 -0800 |
commit | 3aff30825eba88ab57f6fc2182ceef288c8aaafc (patch) | |
tree | 3bf9e28eac170f2305aa2a96f8c3e7780635146b | |
parent | 1ac8e0709e8da3277b6c49bcaf7282422d1eac60 (diff) |
powerpc: mpc8541: Remove macro CONFIG_MPC8541
Replace CONFIG_MPC8541 with ARCH_MPC8541 in Kconfig and clean up existing
macros.
Signed-off-by: York Sun <york.sun@nxp.com>
-rw-r--r-- | arch/powerpc/cpu/mpc85xx/Kconfig | 4 | ||||
-rw-r--r-- | arch/powerpc/cpu/mpc85xx/cpu.c | 2 | ||||
-rw-r--r-- | arch/powerpc/cpu/mpc85xx/speed.c | 4 | ||||
-rw-r--r-- | arch/powerpc/include/asm/config_mpc85xx.h | 2 | ||||
-rw-r--r-- | arch/powerpc/include/asm/cpm_85xx.h | 2 | ||||
-rw-r--r-- | arch/powerpc/include/asm/fsl_lbc.h | 4 | ||||
-rw-r--r-- | arch/powerpc/include/asm/immap_85xx.h | 2 | ||||
-rw-r--r-- | drivers/ddr/fsl/ctrl_regs.c | 2 | ||||
-rw-r--r-- | drivers/ddr/fsl/mpc85xx_ddr_gen1.c | 2 | ||||
-rw-r--r-- | drivers/input/keyboard.c | 2 | ||||
-rw-r--r-- | include/configs/MPC8541CDS.h | 1 | ||||
-rw-r--r-- | include/keyboard.h | 2 | ||||
-rw-r--r-- | scripts/config_whitelist.txt | 1 |
13 files changed, 16 insertions, 14 deletions
diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig index 69567db5bb9..8b08ee2ad05 100644 --- a/arch/powerpc/cpu/mpc85xx/Kconfig +++ b/arch/powerpc/cpu/mpc85xx/Kconfig @@ -64,6 +64,7 @@ config TARGET_MPC8540ADS config TARGET_MPC8541CDS bool "Support MPC8541CDS" + select ARCH_MPC8541 config TARGET_MPC8544DS bool "Support MPC8544DS" @@ -197,6 +198,9 @@ config ARCH_MPC8536 config ARCH_MPC8540 bool +config ARCH_MPC8541 + bool + config ARCH_MPC8544 bool diff --git a/arch/powerpc/cpu/mpc85xx/cpu.c b/arch/powerpc/cpu/mpc85xx/cpu.c index 871935d0f33..c563744cd7d 100644 --- a/arch/powerpc/cpu/mpc85xx/cpu.c +++ b/arch/powerpc/cpu/mpc85xx/cpu.c @@ -293,7 +293,7 @@ int checkcpu (void) int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { /* Everything after the first generation of PQ3 parts has RSTCR */ -#if defined(CONFIG_ARCH_MPC8540) || defined(CONFIG_MPC8541) || \ +#if defined(CONFIG_ARCH_MPC8540) || defined(CONFIG_ARCH_MPC8541) || \ defined(CONFIG_MPC8555) || defined(CONFIG_MPC8560) unsigned long val, msr; diff --git a/arch/powerpc/cpu/mpc85xx/speed.c b/arch/powerpc/cpu/mpc85xx/speed.c index 55d143101f8..bd810d7b601 100644 --- a/arch/powerpc/cpu/mpc85xx/speed.c +++ b/arch/powerpc/cpu/mpc85xx/speed.c @@ -625,7 +625,7 @@ void get_sys_info(sys_info_t *sys_info) * for four times the clock divider values. */ lcrr_div *= 4; -#elif !defined(CONFIG_ARCH_MPC8540) && !defined(CONFIG_MPC8541) && \ +#elif !defined(CONFIG_ARCH_MPC8540) && !defined(CONFIG_ARCH_MPC8541) && \ !defined(CONFIG_MPC8555) && !defined(CONFIG_MPC8560) /* * Yes, the entire PQ38 family use the same @@ -681,7 +681,7 @@ int get_clocks (void) * for that SOC. This information is taken from application note * AN2919. */ -#if defined(CONFIG_ARCH_MPC8540) || defined(CONFIG_MPC8541) || \ +#if defined(CONFIG_ARCH_MPC8540) || defined(CONFIG_ARCH_MPC8541) || \ defined(CONFIG_MPC8560) || defined(CONFIG_MPC8555) || \ defined(CONFIG_P1022) gd->arch.i2c1_clk = sys_info.freq_systembus; diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h index 7f9b2d92d10..f16e32e97aa 100644 --- a/arch/powerpc/include/asm/config_mpc85xx.h +++ b/arch/powerpc/include/asm/config_mpc85xx.h @@ -50,7 +50,7 @@ #define CONFIG_SYS_FSL_DDRC_GEN1 #define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000 -#elif defined(CONFIG_MPC8541) +#elif defined(CONFIG_ARCH_MPC8541) #define CONFIG_MAX_CPUS 1 #define CONFIG_SYS_FSL_NUM_LAWS 8 #define CONFIG_SYS_FSL_DDRC_GEN1 diff --git a/arch/powerpc/include/asm/cpm_85xx.h b/arch/powerpc/include/asm/cpm_85xx.h index b137a71450d..e89e2f04bcd 100644 --- a/arch/powerpc/include/asm/cpm_85xx.h +++ b/arch/powerpc/include/asm/cpm_85xx.h @@ -77,7 +77,7 @@ */ #define CPM_DATAONLY_BASE ((uint)128) #define CPM_DP_NOSPACE ((uint)0x7FFFFFFF) -#if defined(CONFIG_MPC8541) || defined(CONFIG_MPC8555) +#if defined(CONFIG_ARCH_MPC8541) || defined(CONFIG_MPC8555) #define CPM_FCC_SPECIAL_BASE ((uint)0x00009000) #define CPM_DATAONLY_SIZE ((uint)(8 * 1024) - CPM_DATAONLY_BASE) #else /* MPC8540, MPC8560 */ diff --git a/arch/powerpc/include/asm/fsl_lbc.h b/arch/powerpc/include/asm/fsl_lbc.h index 6e4b087b6e8..c7805e90a19 100644 --- a/arch/powerpc/include/asm/fsl_lbc.h +++ b/arch/powerpc/include/asm/fsl_lbc.h @@ -326,8 +326,8 @@ void lbc_sdram_init(void); #define LCRR_CLKDIV 0x0000001F #define LCRR_CLKDIV_SHIFT 0 #if defined(CONFIG_MPC83xx) || defined(CONFIG_ARCH_MPC8540) || \ - defined(CONFIG_MPC8541) || defined (CONFIG_MPC8555) || \ - defined(CONFIG_MPC8560) + defined(CONFIG_ARCH_MPC8541) || defined(CONFIG_MPC8555) || \ + defined(CONFIG_MPC8560) #define LCRR_CLKDIV_2 0x00000002 #define LCRR_CLKDIV_4 0x00000004 #define LCRR_CLKDIV_8 0x00000008 diff --git a/arch/powerpc/include/asm/immap_85xx.h b/arch/powerpc/include/asm/immap_85xx.h index 2e959dd895e..4754aa86246 100644 --- a/arch/powerpc/include/asm/immap_85xx.h +++ b/arch/powerpc/include/asm/immap_85xx.h @@ -125,7 +125,7 @@ typedef struct ccsr_i2c { } ccsr_i2c_t; #if defined(CONFIG_ARCH_MPC8540) || \ - defined(CONFIG_MPC8541) || \ + defined(CONFIG_ARCH_MPC8541) || \ defined(CONFIG_ARCH_MPC8548) || \ defined(CONFIG_MPC8555) /* DUART Registers */ diff --git a/drivers/ddr/fsl/ctrl_regs.c b/drivers/ddr/fsl/ctrl_regs.c index 24fd36602d2..b2e92a0b449 100644 --- a/drivers/ddr/fsl/ctrl_regs.c +++ b/drivers/ddr/fsl/ctrl_regs.c @@ -1831,7 +1831,7 @@ static void set_ddr_sdram_clk_cntl(fsl_ddr_cfg_regs_t *ddr, unsigned int clk_adjust; /* Clock adjust */ unsigned int ss_en = 0; /* Source synchronous enable */ -#if defined(CONFIG_MPC8541) || defined(CONFIG_MPC8555) +#if defined(CONFIG_ARCH_MPC8541) || defined(CONFIG_MPC8555) /* Per FSL Application Note: AN2805 */ ss_en = 1; #endif diff --git a/drivers/ddr/fsl/mpc85xx_ddr_gen1.c b/drivers/ddr/fsl/mpc85xx_ddr_gen1.c index c27288dda21..67a9ad8bf81 100644 --- a/drivers/ddr/fsl/mpc85xx_ddr_gen1.c +++ b/drivers/ddr/fsl/mpc85xx_ddr_gen1.c @@ -47,7 +47,7 @@ void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs, out_be32(&ddr->timing_cfg_2, regs->timing_cfg_2); out_be32(&ddr->sdram_mode, regs->ddr_sdram_mode); out_be32(&ddr->sdram_interval, regs->ddr_sdram_interval); -#if defined(CONFIG_MPC8555) || defined(CONFIG_MPC8541) +#if defined(CONFIG_MPC8555) || defined(CONFIG_ARCH_MPC8541) out_be32(&ddr->sdram_clk_cntl, regs->ddr_sdram_clk_cntl); #endif diff --git a/drivers/input/keyboard.c b/drivers/input/keyboard.c index 522b02fa0a9..f53a07afcc6 100644 --- a/drivers/input/keyboard.c +++ b/drivers/input/keyboard.c @@ -21,7 +21,7 @@ static struct input_config config; static int kbd_read_keys(struct input_config *config) { #if defined(CONFIG_MPC5xxx) || defined(CONFIG_ARCH_MPC8540) || \ - defined(CONFIG_MPC8541) || defined(CONFIG_MPC8555) + defined(CONFIG_ARCH_MPC8541) || defined(CONFIG_MPC8555) /* no ISR is used, so received chars must be polled */ ps2ser_check(); #endif diff --git a/include/configs/MPC8541CDS.h b/include/configs/MPC8541CDS.h index 134add5a5d2..2bee0d0e369 100644 --- a/include/configs/MPC8541CDS.h +++ b/include/configs/MPC8541CDS.h @@ -17,7 +17,6 @@ #define CONFIG_BOOKE 1 /* BOOKE */ #define CONFIG_E500 1 /* BOOKE e500 family */ #define CONFIG_CPM2 1 /* has CPM2 */ -#define CONFIG_MPC8541 1 /* MPC8541 specific */ #define CONFIG_MPC8541CDS 1 /* MPC8541CDS board specific */ #define CONFIG_SYS_TEXT_BASE 0xfff80000 diff --git a/include/keyboard.h b/include/keyboard.h index e26f69e8cc6..a911ac8d468 100644 --- a/include/keyboard.h +++ b/include/keyboard.h @@ -99,7 +99,7 @@ extern void pckbd_leds(unsigned char leds); #endif /* !CONFIG_DM_KEYBOARD */ #if defined(CONFIG_MPC5xxx) || defined(CONFIG_ARCH_MPC8540) || \ - defined(CONFIG_MPC8541) || defined(CONFIG_MPC8555) + defined(CONFIG_ARCH_MPC8541) || defined(CONFIG_MPC8555) int ps2ser_check(void); #endif diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index 2fa1383a335..5fd297e4039 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -3140,7 +3140,6 @@ CONFIG_MPC83XX_GPIO_1_INIT_OPEN_DRAIN CONFIG_MPC83XX_GPIO_1_INIT_VALUE CONFIG_MPC83XX_PCI2 CONFIG_MPC850 -CONFIG_MPC8541 CONFIG_MPC8541CDS CONFIG_MPC855 CONFIG_MPC8555 |