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authorChee, Tien Fong2017-03-29 11:49:16 +0800
committerMarek Vasut2017-04-14 14:06:42 +0200
commit4c0f3e7f7b7fc29d0bdbef20e849e3360c432891 (patch)
treeeef8c2bf23e401f9a41b66030291fe67021f7c51
parent45fa6f1dd59bc6d213c6051d4ab45b0cb449eb5b (diff)
ARM: socfpga: boot0 hook: remove macro from boot0 header file
Commit ce62e57fc571 ("ARM: boot0 hook: remove macro, include whole header file") miss out cleaning macro in this header file, and this has broken implementation of a boot header capability in socfpga SPL. Remove the macro in this file, and recovering it back to proper functioning. Fixes: ce62e57fc571 ("ARM: boot0 hook: remove macro, include whole header file") Signed-off-by: Chee, Tien Fong <tien.fong.chee@intel.com>
-rw-r--r--arch/arm/mach-socfpga/include/mach/boot0.h24
1 files changed, 10 insertions, 14 deletions
diff --git a/arch/arm/mach-socfpga/include/mach/boot0.h b/arch/arm/mach-socfpga/include/mach/boot0.h
index aaada312860..22d9e7f7afb 100644
--- a/arch/arm/mach-socfpga/include/mach/boot0.h
+++ b/arch/arm/mach-socfpga/include/mach/boot0.h
@@ -8,21 +8,17 @@
#define __BOOT0_H
#ifdef CONFIG_SPL_BUILD
-#define ARM_SOC_BOOT0_HOOK \
- .balignl 64,0xf33db33f; \
- \
- .word 0x1337c0d3; /* SoCFPGA preloader validation word */ \
- .word 0xc01df00d; /* Version, flags, length */ \
- .word 0xcafec0d3; /* Checksum, zero-pad */ \
- nop; \
- \
- b reset; /* SoCFPGA jumps here */ \
- nop; \
- nop; \
+ .balignl 64,0xf33db33f;
+
+ .word 0x1337c0d3; /* SoCFPGA preloader validation word */
+ .word 0xc01df00d; /* Version, flags, length */
+ .word 0xcafec0d3; /* Checksum, zero-pad */
nop;
-#else
-#define ARM_SOC_BOOT0_HOOK
-#endif
+ b reset; /* SoCFPGA jumps here */
+ nop;
+ nop;
+ nop;
+#endif
#endif /* __BOOT0_H */