diff options
| author | Igor Opaniuk | 2020-10-22 11:21:42 +0300 |
|---|---|---|
| committer | Stefano Babic | 2020-12-06 15:31:37 +0100 |
| commit | 5d39967dcfcea5ff5d07c32b92e224c873f63155 (patch) | |
| tree | d7ea4450d62c23218692cfc040d682c0ac9e8f4f | |
| parent | 90311be09f653499a1f4bd8198955ae79e00b51c (diff) | |
apalis-imx8x: add implementation for board_mem_get_layout
Add implementation of board_mem_get_layout for overriding the memory
layout.
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
| -rw-r--r-- | board/toradex/apalis-imx8x/apalis-imx8x.c | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/board/toradex/apalis-imx8x/apalis-imx8x.c b/board/toradex/apalis-imx8x/apalis-imx8x.c index 9f00f26cfe6..739d2e51554 100644 --- a/board/toradex/apalis-imx8x/apalis-imx8x.c +++ b/board/toradex/apalis-imx8x/apalis-imx8x.c @@ -37,6 +37,29 @@ static void setup_iomux_uart(void) imx8_iomux_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads)); } +void board_mem_get_layout(u64 *phys_sdram_1_start, + u64 *phys_sdram_1_size, + u64 *phys_sdram_2_start, + u64 *phys_sdram_2_size) +{ + u32 is_dualx = 0, val = 0; + sc_err_t scierr = sc_misc_otp_fuse_read(-1, 6, &val); + + if (scierr == SC_ERR_NONE) { + /* DX has two A35 cores disabled */ + is_dualx = (val & 0xf) != 0x0; + } + + *phys_sdram_1_start = PHYS_SDRAM_1; + if (is_dualx) + /* Our DX based SKUs only have 1 GB RAM */ + *phys_sdram_1_size = SZ_1G; + else + *phys_sdram_1_size = PHYS_SDRAM_1_SIZE; + *phys_sdram_2_start = PHYS_SDRAM_2; + *phys_sdram_2_size = PHYS_SDRAM_2_SIZE; +} + int board_early_init_f(void) { sc_pm_clock_rate_t rate; |