Merge branch 'master' of git://www.denx.de/git/u-boot-microblaze

33 files changed, 346 insertions, 263 deletions

diff --git a/arch/arm/cpu/armv8/zynqmp/Kconfig b/arch/arm/cpu/armv8/zynqmp/Kconfig
index f354aae3fc2..e175e6eceb0 100644
--- a/arch/arm/cpu/armv8/zynqmp/Kconfig
+++ b/arch/arm/cpu/armv8/zynqmp/Kconfig
@@ -43,6 +43,7 @@ config SYS_CONFIG_NAME
 
 config BOOT_INIT_FILE
 	string "boot.bin init register filename"
+	depends on SPL
 	default ""
 	help
 	  Add register writes to boot.bin format (max 256 pairs).
diff --git a/arch/arm/dts/zynq-7000.dtsi b/arch/arm/dts/zynq-7000.dtsi
index 6df0329cfc9..668f54ec219 100644
--- a/arch/arm/dts/zynq-7000.dtsi
+++ b/arch/arm/dts/zynq-7000.dtsi
@@ -16,7 +16,7 @@
 		#address-cells = <1>;
 		#size-cells = <0>;
 
-		cpu@0 {
+		cpu0: cpu@0 {
 			compatible = "arm,cortex-a9";
 			device_type = "cpu";
 			reg = <0>;
@@ -30,7 +30,7 @@
 			>;
 		};
 
-		cpu@1 {
+		cpu1: cpu@1 {
 			compatible = "arm,cortex-a9";
 			device_type = "cpu";
 			reg = <1>;
diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi
index ab5c243c61d..de1f160308a 100644
--- a/arch/arm/dts/zynqmp.dtsi
+++ b/arch/arm/dts/zynqmp.dtsi
@@ -7,6 +7,7 @@
  *
  * SPDX-License-Identifier:	GPL-2.0+
  */
+
 / {
 	compatible = "xlnx,zynqmp";
 	#address-cells = <2>;
diff --git a/arch/arm/include/asm/arch-zynqmp/hardware.h b/arch/arm/include/asm/arch-zynqmp/hardware.h
index 5908c50d094..041b43cfe04 100644
--- a/arch/arm/include/asm/arch-zynqmp/hardware.h
+++ b/arch/arm/include/asm/arch-zynqmp/hardware.h
@@ -18,8 +18,6 @@
 
 #define ARASAN_NAND_BASEADDR	0xFF100000
 
-#define ZYNQMP_SATA_BASEADDR	0xFD0C0000
-
 #define ZYNQMP_USB0_XHCI_BASEADDR	0xFE200000
 #define ZYNQMP_USB1_XHCI_BASEADDR	0xFE300000
 
diff --git a/board/xilinx/zynq/board.c b/board/xilinx/zynq/board.c
index 2c86940957e..5cd9bbf711f 100644
--- a/board/xilinx/zynq/board.c
+++ b/board/xilinx/zynq/board.c
@@ -124,121 +124,15 @@ int zynq_board_read_rom_ethaddr(unsigned char *ethaddr)
 }
 
 #if !defined(CONFIG_SYS_SDRAM_BASE) && !defined(CONFIG_SYS_SDRAM_SIZE)
-/*
- * fdt_get_reg - Fill buffer by information from DT
- */
-static phys_size_t fdt_get_reg(const void *fdt, int nodeoffset, void *buf,
-			       const u32 *cell, int n)
-{
-	int i = 0, b, banks;
-	int parent_offset = fdt_parent_offset(fdt, nodeoffset);
-	int address_cells = fdt_address_cells(fdt, parent_offset);
-	int size_cells = fdt_size_cells(fdt, parent_offset);
-	char *p = buf;
-	u64 val;
-	u64 vals;
-
-	debug("%s: addr_cells=%x, size_cell=%x, buf=%p, cell=%p\n",
-	      __func__, address_cells, size_cells, buf, cell);
-
-	/* Check memory bank setup */
-	banks = n % (address_cells + size_cells);
-	if (banks)
-		panic("Incorrect memory setup cells=%d, ac=%d, sc=%d\n",
-		      n, address_cells, size_cells);
-
-	banks = n / (address_cells + size_cells);
-
-	for (b = 0; b < banks; b++) {
-		debug("%s: Bank #%d:\n", __func__, b);
-		if (address_cells == 2) {
-			val = cell[i + 1];
-			val <<= 32;
-			val |= cell[i];
-			val = fdt64_to_cpu(val);
-			debug("%s: addr64=%llx, ptr=%p, cell=%p\n",
-			      __func__, val, p, &cell[i]);
-			*(phys_addr_t *)p = val;
-		} else {
-			debug("%s: addr32=%x, ptr=%p\n",
-			      __func__, fdt32_to_cpu(cell[i]), p);
-			*(phys_addr_t *)p = fdt32_to_cpu(cell[i]);
-		}
-		p += sizeof(phys_addr_t);
-		i += address_cells;
-
-		debug("%s: pa=%p, i=%x, size=%zu\n", __func__, p, i,
-		      sizeof(phys_addr_t));
-
-		if (size_cells == 2) {
-			vals = cell[i + 1];
-			vals <<= 32;
-			vals |= cell[i];
-			vals = fdt64_to_cpu(vals);
-
-			debug("%s: size64=%llx, ptr=%p, cell=%p\n",
-			      __func__, vals, p, &cell[i]);
-			*(phys_size_t *)p = vals;
-		} else {
-			debug("%s: size32=%x, ptr=%p\n",
-			      __func__, fdt32_to_cpu(cell[i]), p);
-			*(phys_size_t *)p = fdt32_to_cpu(cell[i]);
-		}
-		p += sizeof(phys_size_t);
-		i += size_cells;
-
-		debug("%s: ps=%p, i=%x, size=%zu\n",
-		      __func__, p, i, sizeof(phys_size_t));
-	}
-
-	/* Return the first address size */
-	return *(phys_size_t *)((char *)buf + sizeof(phys_addr_t));
-}
-
-#define FDT_REG_SIZE  sizeof(u32)
-/* Temp location for sharing data for storing */
-/* Up to 64-bit address + 64-bit size */
-static u8 tmp[CONFIG_NR_DRAM_BANKS * 16];
-
 void dram_init_banksize(void)
 {
-	int bank;
-
-	memcpy(&gd->bd->bi_dram[0], &tmp, sizeof(tmp));
-
-	for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
-		debug("Bank #%d: start %llx\n", bank,
-		      (unsigned long long)gd->bd->bi_dram[bank].start);
-		debug("Bank #%d: size %llx\n", bank,
-		      (unsigned long long)gd->bd->bi_dram[bank].size);
-	}
+	fdtdec_setup_memory_banksize();
 }
 
 int dram_init(void)
 {
-	int node, len;
-	const void *blob = gd->fdt_blob;
-	const u32 *cell;
-
-	memset(&tmp, 0, sizeof(tmp));
-
-	/* find or create "/memory" node. */
-	node = fdt_subnode_offset(blob, 0, "memory");
-	if (node < 0) {
-		printf("%s: Can't get memory node\n", __func__);
-		return node;
-	}
-
-	/* Get pointer to cells and lenght of it */
-	cell = fdt_getprop(blob, node, "reg", &len);
-	if (!cell) {
-		printf("%s: Can't get reg property\n", __func__);
-		return -1;
-	}
-
-	gd->ram_size = fdt_get_reg(blob, node, &tmp, cell, len / FDT_REG_SIZE);
-
-	debug("%s: Initial DRAM size %llx\n", __func__, (u64)gd->ram_size);
+	if (fdtdec_setup_memory_size() != 0)
+		return -EINVAL;
 
 	zynq_ddrc_init();
 
diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c
index cef1f6a13ae..4e5871b76ab 100644
--- a/board/xilinx/zynqmp/zynqmp.c
+++ b/board/xilinx/zynqmp/zynqmp.c
@@ -180,121 +180,15 @@ int zynq_board_read_rom_ethaddr(unsigned char *ethaddr)
 }
 
 #if !defined(CONFIG_SYS_SDRAM_BASE) && !defined(CONFIG_SYS_SDRAM_SIZE)
-/*
- * fdt_get_reg - Fill buffer by information from DT
- */
-static phys_size_t fdt_get_reg(const void *fdt, int nodeoffset, void *buf,
-			       const u32 *cell, int n)
-{
-	int i = 0, b, banks;
-	int parent_offset = fdt_parent_offset(fdt, nodeoffset);
-	int address_cells = fdt_address_cells(fdt, parent_offset);
-	int size_cells = fdt_size_cells(fdt, parent_offset);
-	char *p = buf;
-	u64 val;
-	u64 vals;
-
-	debug("%s: addr_cells=%x, size_cell=%x, buf=%p, cell=%p\n",
-	      __func__, address_cells, size_cells, buf, cell);
-
-	/* Check memory bank setup */
-	banks = n % (address_cells + size_cells);
-	if (banks)
-		panic("Incorrect memory setup cells=%d, ac=%d, sc=%d\n",
-		      n, address_cells, size_cells);
-
-	banks = n / (address_cells + size_cells);
-
-	for (b = 0; b < banks; b++) {
-		debug("%s: Bank #%d:\n", __func__, b);
-		if (address_cells == 2) {
-			val = cell[i + 1];
-			val <<= 32;
-			val |= cell[i];
-			val = fdt64_to_cpu(val);
-			debug("%s: addr64=%llx, ptr=%p, cell=%p\n",
-			      __func__, val, p, &cell[i]);
-			*(phys_addr_t *)p = val;
-		} else {
-			debug("%s: addr32=%x, ptr=%p\n",
-			      __func__, fdt32_to_cpu(cell[i]), p);
-			*(phys_addr_t *)p = fdt32_to_cpu(cell[i]);
-		}
-		p += sizeof(phys_addr_t);
-		i += address_cells;
-
-		debug("%s: pa=%p, i=%x, size=%zu\n", __func__, p, i,
-		      sizeof(phys_addr_t));
-
-		if (size_cells == 2) {
-			vals = cell[i + 1];
-			vals <<= 32;
-			vals |= cell[i];
-			vals = fdt64_to_cpu(vals);
-
-			debug("%s: size64=%llx, ptr=%p, cell=%p\n",
-			      __func__, vals, p, &cell[i]);
-			*(phys_size_t *)p = vals;
-		} else {
-			debug("%s: size32=%x, ptr=%p\n",
-			      __func__, fdt32_to_cpu(cell[i]), p);
-			*(phys_size_t *)p = fdt32_to_cpu(cell[i]);
-		}
-		p += sizeof(phys_size_t);
-		i += size_cells;
-
-		debug("%s: ps=%p, i=%x, size=%zu\n",
-		      __func__, p, i, sizeof(phys_size_t));
-	}
-
-	/* Return the first address size */
-	return *(phys_size_t *)((char *)buf + sizeof(phys_addr_t));
-}
-
-#define FDT_REG_SIZE  sizeof(u32)
-/* Temp location for sharing data for storing */
-/* Up to 64-bit address + 64-bit size */
-static u8 tmp[CONFIG_NR_DRAM_BANKS * 16];
-
 void dram_init_banksize(void)
 {
-	int bank;
-
-	memcpy(&gd->bd->bi_dram[0], &tmp, sizeof(tmp));
-
-	for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
-		debug("Bank #%d: start %llx\n", bank,
-		      (unsigned long long)gd->bd->bi_dram[bank].start);
-		debug("Bank #%d: size %llx\n", bank,
-		      (unsigned long long)gd->bd->bi_dram[bank].size);
-	}
+	fdtdec_setup_memory_banksize();
 }
 
 int dram_init(void)
 {
-	int node, len;
-	const void *blob = gd->fdt_blob;
-	const u32 *cell;
-
-	memset(&tmp, 0, sizeof(tmp));
-
-	/* find or create "/memory" node. */
-	node = fdt_subnode_offset(blob, 0, "memory");
-	if (node < 0) {
-		printf("%s: Can't get memory node\n", __func__);
-		return node;
-	}
-
-	/* Get pointer to cells and lenght of it */
-	cell = fdt_getprop(blob, node, "reg", &len);
-	if (!cell) {
-		printf("%s: Can't get reg property\n", __func__);
-		return -1;
-	}
-
-	gd->ram_size = fdt_get_reg(blob, node, &tmp, cell, len / FDT_REG_SIZE);
-
-	debug("%s: Initial DRAM size %llx\n", __func__, (u64)gd->ram_size);
+	if (fdtdec_setup_memory_size() != 0)
+		return -EINVAL;
 
 	return 0;
 }
@@ -311,17 +205,6 @@ void reset_cpu(ulong addr)
 {
 }
 
-#ifdef CONFIG_SCSI_AHCI_PLAT
-void scsi_init(void)
-{
-#if defined(CONFIG_SATA_CEVA)
-	init_sata(0);
-#endif
-	ahci_init((void __iomem *)ZYNQMP_SATA_BASEADDR);
-	scsi_scan(1);
-}
-#endif
-
 int board_late_init(void)
 {
 	u32 reg = 0;
diff --git a/common/board_r.c b/common/board_r.c
index 5496f45cbd9..a3733526c69 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -620,7 +620,7 @@ static int initr_ambapp_print(void)
 }
 #endif
 
-#if defined(CONFIG_SCSI)
+#if defined(CONFIG_SCSI) && !defined(CONFIG_DM_SCSI)
 static int initr_scsi(void)
 {
 	puts("SCSI:  ");
@@ -923,7 +923,7 @@ init_fnc_t init_sequence_r[] = {
 	initr_ambapp_print,
 #endif
 #endif
-#ifdef CONFIG_SCSI
+#if defined(CONFIG_SCSI) && !defined(CONFIG_DM_SCSI)
 	INIT_FUNC_WATCHDOG_RESET
 	initr_scsi,
 #endif
diff --git a/common/image.c b/common/image.c
index bd07e86701a..909dbed1f20 100644
--- a/common/image.c
+++ b/common/image.c
@@ -1375,11 +1375,10 @@ int boot_get_fpga(int argc, char * const argv[], bootm_headers_t *images,
 						img_len, BIT_PARTIAL);
 		}
 
-		printf("   Programming %s bitstream... ", name);
 		if (err)
-			printf("failed\n");
-		else
-			printf("OK\n");
+			return err;
+
+		printf("   Programming %s bitstream... OK\n", name);
 		break;
 	default:
 		printf("The given image format is not supported (corrupt?)\n");
diff --git a/common/miiphyutil.c b/common/miiphyutil.c
index aca18db52a0..8eb0f761bb0 100644
--- a/common/miiphyutil.c
+++ b/common/miiphyutil.c
@@ -107,6 +107,18 @@ int mdio_register(struct mii_dev *bus)
 	return 0;
 }
 
+int mdio_register_seq(struct mii_dev *bus, int seq)
+{
+	int ret;
+
+	/* Setup a unique name for each mdio bus */
+	ret = snprintf(bus->name, MDIO_NAME_LEN, "eth%d", seq);
+	if (ret < 0)
+		return ret;
+
+	return mdio_register(bus);
+}
+
 int mdio_unregister(struct mii_dev *bus)
 {
 	if (!bus)
diff --git a/common/scsi.c b/common/scsi.c
index 04add624958..e7efa5ae797 100644
--- a/common/scsi.c
+++ b/common/scsi.c
@@ -10,7 +10,10 @@
 #include <inttypes.h>
 #include <pci.h>
 #include <scsi.h>
+#include <dm/device-internal.h>
+#include <dm/uclass-internal.h>
 
+#if !defined(CONFIG_DM_SCSI)
 #ifdef CONFIG_SCSI_DEV_LIST
 #define SCSI_DEV_LIST CONFIG_SCSI_DEV_LIST
 #else
@@ -31,6 +34,7 @@
 #endif
 #define SCSI_DEV_LIST {SCSI_VEND_ID, SCSI_DEV_ID}
 #endif
+#endif
 
 #if defined(CONFIG_PCI) && !defined(CONFIG_SCSI_AHCI_PLAT)
 const struct pci_device_id scsi_device_list[] = { SCSI_DEV_LIST };
@@ -39,11 +43,13 @@ static ccb tempccb;	/* temporary scsi command buffer */
 
 static unsigned char tempbuff[512]; /* temporary data buffer */
 
+#if !defined(CONFIG_DM_SCSI)
 static int scsi_max_devs; /* number of highest available scsi device */
 
 static int scsi_curr_dev; /* current device */
 
 static struct blk_desc scsi_dev_desc[CONFIG_SYS_SCSI_MAX_DEVICE];
+#endif
 
 /* almost the maximum amount of the scsi_ext command.. */
 #define SCSI_MAX_READ_BLK 0xFFFF
@@ -444,6 +450,7 @@ static void scsi_init_dev_desc_priv(struct blk_desc *dev_desc)
 #endif
 }
 
+#if !defined(CONFIG_DM_SCSI)
 /**
  * scsi_init_dev_desc - initialize all SCSI specific blk_desc properties
  *
@@ -460,6 +467,7 @@ static void scsi_init_dev_desc(struct blk_desc *dev_desc, int devnum)
 
 	scsi_init_dev_desc_priv(dev_desc);
 }
+#endif
 
 /**
  * scsi_detect_dev - Detect scsi device
@@ -540,6 +548,73 @@ removable:
  * (re)-scan the scsi bus and reports scsi device info
  * to the user if mode = 1
  */
+#if defined(CONFIG_DM_SCSI)
+int scsi_scan(int mode)
+{
+	unsigned char i, lun;
+	struct uclass *uc;
+	struct udevice *dev; /* SCSI controller */
+	int ret;
+
+	if (mode == 1)
+		printf("scanning bus for devices...\n");
+
+	ret = uclass_get(UCLASS_SCSI, &uc);
+	if (ret)
+		return ret;
+
+	uclass_foreach_dev(dev, uc) {
+		struct scsi_platdata *plat; /* scsi controller platdata */
+
+		/* probe SCSI controller driver */
+		ret = device_probe(dev);
+		if (ret)
+			return ret;
+
+		/* Get controller platdata */
+		plat = dev_get_platdata(dev);
+
+		for (i = 0; i < plat->max_id; i++) {
+			for (lun = 0; lun < plat->max_lun; lun++) {
+				struct udevice *bdev; /* block device */
+				/* block device description */
+				struct blk_desc *bdesc;
+				char str[10];
+
+				/*
+				 * Create only one block device and do detection
+				 * to make sure that there won't be a lot of
+				 * block devices created
+				 */
+				snprintf(str, sizeof(str), "id%dlun%d", i, lun);
+				ret = blk_create_devicef(dev, "scsi_blk",
+							  str, IF_TYPE_SCSI,
+							  -1, 0, 0, &bdev);
+				if (ret) {
+					debug("Can't create device\n");
+					return ret;
+				}
+				bdesc = dev_get_uclass_platdata(bdev);
+
+				scsi_init_dev_desc_priv(bdesc);
+				bdesc->lun = lun;
+				ret = scsi_detect_dev(i, bdesc);
+				if (ret) {
+					device_unbind(bdev);
+					continue;
+				}
+
+				if (mode == 1) {
+					printf("  Device %d: ", 0);
+					dev_print(bdesc);
+				} /* if mode */
+			} /* next LUN */
+		}
+	}
+
+	return 0;
+}
+#else
 int scsi_scan(int mode)
 {
 	unsigned char i, lun;
@@ -576,6 +651,7 @@ int scsi_scan(int mode)
 #endif
 	return 0;
 }
+#endif
 
 #ifdef CONFIG_BLK
 static const struct blk_ops scsi_blk_ops = {
diff --git a/configs/xilinx_zynqmp_ep_defconfig b/configs/xilinx_zynqmp_ep_defconfig
index f261e229d08..b223e110c86 100644
--- a/configs/xilinx_zynqmp_ep_defconfig
+++ b/configs/xilinx_zynqmp_ep_defconfig
@@ -42,6 +42,8 @@ CONFIG_OF_EMBED=y
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_SPL_DM=y
 CONFIG_SPL_DM_SEQ_ALIAS=y
+CONFIG_DM_SCSI=y
+CONFIG_SATA_CEVA=y
 CONFIG_DFU_RAM=y
 CONFIG_FPGA_XILINX=y
 CONFIG_FPGA_ZYNQMPPL=y
diff --git a/configs/xilinx_zynqmp_zcu102_defconfig b/configs/xilinx_zynqmp_zcu102_defconfig
index 021e0ff964d..9f2df491ec5 100644
--- a/configs/xilinx_zynqmp_zcu102_defconfig
+++ b/configs/xilinx_zynqmp_zcu102_defconfig
@@ -34,6 +34,8 @@ CONFIG_OF_EMBED=y
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_SPL_DM=y
 CONFIG_SPL_DM_SEQ_ALIAS=y
+CONFIG_DM_SCSI=y
+CONFIG_SATA_CEVA=y
 CONFIG_DFU_RAM=y
 CONFIG_FPGA_XILINX=y
 CONFIG_FPGA_ZYNQMPPL=y
diff --git a/configs/xilinx_zynqmp_zcu102_revB_defconfig b/configs/xilinx_zynqmp_zcu102_revB_defconfig
index 34062bd2445..b2b1720a03d 100644
--- a/configs/xilinx_zynqmp_zcu102_revB_defconfig
+++ b/configs/xilinx_zynqmp_zcu102_revB_defconfig
@@ -34,6 +34,8 @@ CONFIG_OF_EMBED=y
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_SPL_DM=y
 CONFIG_SPL_DM_SEQ_ALIAS=y
+CONFIG_DM_SCSI=y
+CONFIG_SATA_CEVA=y
 CONFIG_DFU_RAM=y
 CONFIG_FPGA_XILINX=y
 CONFIG_FPGA_ZYNQMPPL=y
diff --git a/drivers/block/Kconfig b/drivers/block/Kconfig
index fe5aa07f921..88e66e2377a 100644
--- a/drivers/block/Kconfig
+++ b/drivers/block/Kconfig
@@ -19,6 +19,15 @@ config AHCI
 	  operations at present. The block device interface has not been converted
 	  to driver model.
 
+config DM_SCSI
+	bool "Support SCSI controllers with driver model"
+	depends on BLK
+	help
+	  This option enables the SCSI (Small Computer System Interface) uclass
+	  which supports SCSI and SATA HDDs. For every device configuration
+	  (IDs/LUNs) a block device is created with RAW read/write and
+	  filesystem support.
+
 config BLOCK_CACHE
 	bool "Use block device cache"
 	default n
@@ -27,3 +36,16 @@ config BLOCK_CACHE
 	  This is most useful when accessing filesystems under U-Boot since
 	  it will prevent repeated reads from directory structures and other
 	  filesystem data structures.
+
+menu "SATA/SCSI device support"
+
+config SATA_CEVA
+	bool "Ceva Sata controller"
+	depends on AHCI
+	depends on DM_SCSI
+	help
+	  This option enables Ceva Sata controller hard IP available on Xilinx
+	  ZynqMP. Support up to 2 external devices. Complient with SATA 3.1 and
+	  AHCI 1.3 specifications with hot-plug detect feature.
+
+endmenu
diff --git a/drivers/block/Makefile b/drivers/block/Makefile
index 436b79f9816..a72feecd545 100644
--- a/drivers/block/Makefile
+++ b/drivers/block/Makefile
@@ -12,6 +12,7 @@ obj-y += blk_legacy.o
 endif
 
 obj-$(CONFIG_AHCI) += ahci-uclass.o
+obj-$(CONFIG_DM_SCSI) += scsi-uclass.o
 obj-$(CONFIG_SCSI_AHCI) += ahci.o
 obj-$(CONFIG_DWC_AHSATA) += dwc_ahsata.o
 obj-$(CONFIG_FSL_SATA) += fsl_sata.o
diff --git a/drivers/block/ahci.c b/drivers/block/ahci.c
index 5139989d0b5..3fa14a76b88 100644
--- a/drivers/block/ahci.c
+++ b/drivers/block/ahci.c
@@ -168,7 +168,7 @@ int ahci_reset(void __iomem *base)
 
 static int ahci_host_init(struct ahci_probe_ent *probe_ent)
 {
-#ifndef CONFIG_SCSI_AHCI_PLAT
+#if !defined(CONFIG_SCSI_AHCI_PLAT) && !defined(CONFIG_DM_SCSI)
 # ifdef CONFIG_DM_PCI
 	struct udevice *dev = probe_ent->dev;
 	struct pci_child_platdata *pplat = dev_get_parent_platdata(dev);
@@ -198,7 +198,7 @@ static int ahci_host_init(struct ahci_probe_ent *probe_ent)
 	writel(cap_save, mmio + HOST_CAP);
 	writel_with_flush(0xf, mmio + HOST_PORTS_IMPL);
 
-#ifndef CONFIG_SCSI_AHCI_PLAT
+#if !defined(CONFIG_SCSI_AHCI_PLAT) && !defined(CONFIG_DM_SCSI)
 # ifdef CONFIG_DM_PCI
 	if (pplat->vendor == PCI_VENDOR_ID_INTEL) {
 		u16 tmp16;
@@ -327,6 +327,7 @@ static int ahci_host_init(struct ahci_probe_ent *probe_ent)
 	writel(tmp | HOST_IRQ_EN, mmio + HOST_CTL);
 	tmp = readl(mmio + HOST_CTL);
 	debug("HOST_CTL 0x%x\n", tmp);
+#if !defined(CONFIG_DM_SCSI)
 #ifndef CONFIG_SCSI_AHCI_PLAT
 # ifdef CONFIG_DM_PCI
 	dm_pci_read_config16(dev, PCI_COMMAND, &tmp16);
@@ -338,14 +339,15 @@ static int ahci_host_init(struct ahci_probe_ent *probe_ent)
 	pci_write_config_word(pdev, PCI_COMMAND, tmp16);
 # endif
 #endif
+#endif
 	return 0;
 }
 
 
 static void ahci_print_info(struct ahci_probe_ent *probe_ent)
 {
-#ifndef CONFIG_SCSI_AHCI_PLAT
-# ifdef CONFIG_DM_PCI
+#if !defined(CONFIG_SCSI_AHCI_PLAT) && !defined(CONFIG_DM_SCSI)
+# if defined(CONFIG_DM_PCI)
 	struct udevice *dev = probe_ent->dev;
 # else
 	pci_dev_t pdev = probe_ent->dev;
@@ -372,7 +374,7 @@ static void ahci_print_info(struct ahci_probe_ent *probe_ent)
 	else
 		speed_s = "?";
 
-#ifdef CONFIG_SCSI_AHCI_PLAT
+#if defined(CONFIG_SCSI_AHCI_PLAT) || defined(CONFIG_DM_SCSI)
 	scc_s = "SATA";
 #else
 # ifdef CONFIG_DM_PCI
@@ -424,13 +426,15 @@ static void ahci_print_info(struct ahci_probe_ent *probe_ent)
 }
 
 #ifndef CONFIG_SCSI_AHCI_PLAT
-# ifdef CONFIG_DM_PCI
+# if defined(CONFIG_DM_PCI) || defined(CONFIG_DM_SCSI)
 static int ahci_init_one(struct udevice *dev)
 # else
 static int ahci_init_one(pci_dev_t dev)
 # endif
 {
+#if !defined(CONFIG_DM_SCSI)
 	u16 vendor;
+#endif
 	int rc;
 
 	probe_ent = malloc(sizeof(struct ahci_probe_ent));
@@ -450,6 +454,7 @@ static int ahci_init_one(pci_dev_t dev)
 	probe_ent->pio_mask = 0x1f;
 	probe_ent->udma_mask = 0x7f;	/*Fixme,assume to support UDMA6 */
 
+#if !defined(CONFIG_DM_SCSI)
 #ifdef CONFIG_DM_PCI
 	probe_ent->mmio_base = dm_pci_map_bar(dev, PCI_BASE_ADDRESS_5,
 					      PCI_REGION_MEM);
@@ -473,6 +478,10 @@ static int ahci_init_one(pci_dev_t dev)
 	if (vendor == 0x197b)
 		pci_write_config_byte(dev, 0x41, 0xa1);
 #endif
+#else
+	struct scsi_platdata *plat = dev_get_platdata(dev);
+	probe_ent->mmio_base = (void *)plat->base;
+#endif
 
 	debug("ahci mmio_base=0x%p\n", probe_ent->mmio_base);
 	/* initialize adapter */
@@ -954,14 +963,17 @@ int scsi_exec(ccb *pccb)
 
 }
 
-
+#if defined(CONFIG_DM_SCSI)
+void scsi_low_level_init(int busdevfunc, struct udevice *dev)
+#else
 void scsi_low_level_init(int busdevfunc)
+#endif
 {
 	int i;
 	u32 linkmap;
 
 #ifndef CONFIG_SCSI_AHCI_PLAT
-# ifdef CONFIG_DM_PCI
+# if defined(CONFIG_DM_PCI)
 	struct udevice *dev;
 	int ret;
 
@@ -969,6 +981,8 @@ void scsi_low_level_init(int busdevfunc)
 	if (ret)
 		return;
 	ahci_init_one(dev);
+# elif defined(CONFIG_DM_SCSI)
+	ahci_init_one(dev);
 # else
 	ahci_init_one(busdevfunc);
 # endif
diff --git a/drivers/block/blk-uclass.c b/drivers/block/blk-uclass.c
index 2e041c2b3dc..38cb9388da6 100644
--- a/drivers/block/blk-uclass.c
+++ b/drivers/block/blk-uclass.c
@@ -26,7 +26,7 @@ static const char *if_typename_str[IF_TYPE_COUNT] = {
 
 static enum uclass_id if_type_uclass_id[IF_TYPE_COUNT] = {
 	[IF_TYPE_IDE]		= UCLASS_INVALID,
-	[IF_TYPE_SCSI]		= UCLASS_INVALID,
+	[IF_TYPE_SCSI]		= UCLASS_SCSI,
 	[IF_TYPE_ATAPI]		= UCLASS_INVALID,
 	[IF_TYPE_USB]		= UCLASS_MASS_STORAGE,
 	[IF_TYPE_DOC]		= UCLASS_INVALID,
diff --git a/drivers/block/sata_ceva.c b/drivers/block/sata_ceva.c
index dcc3b90b17f..9b5466483aa 100644
--- a/drivers/block/sata_ceva.c
+++ b/drivers/block/sata_ceva.c
@@ -5,6 +5,7 @@
  * SPDX-License-Identifier:	GPL-2.0+
  */
 #include <common.h>
+#include <dm.h>
 #include <netdev.h>
 #include <ahci.h>
 #include <scsi.h>
@@ -73,10 +74,9 @@
 #define DRV_NAME	"ahci-ceva"
 #define CEVA_FLAG_BROKEN_GEN2	1
 
-int init_sata(int dev)
+static int ceva_init_sata(ulong mmio)
 {
 	ulong tmp;
-	ulong mmio = ZYNQMP_SATA_BASEADDR;
 	int i;
 
 	/*
@@ -111,3 +111,40 @@ int init_sata(int dev)
 	}
 	return 0;
 }
+
+static int sata_ceva_probe(struct udevice *dev)
+{
+	struct scsi_platdata *plat = dev_get_platdata(dev);
+
+	ceva_init_sata(plat->base);
+	return 0;
+}
+
+static const struct udevice_id sata_ceva_ids[] = {
+	{ .compatible = "ceva,ahci-1v84" },
+	{ }
+};
+
+static int sata_ceva_ofdata_to_platdata(struct udevice *dev)
+{
+	struct scsi_platdata *plat = dev_get_platdata(dev);
+
+	plat->base = dev_get_addr(dev);
+	if (plat->base == FDT_ADDR_T_NONE)
+		return -EINVAL;
+
+	/* Hardcode number for ceva sata controller */
+	plat->max_lun = 1; /* Actually two but untested */
+	plat->max_id = 2;
+
+	return 0;
+}
+
+U_BOOT_DRIVER(ceva_host_blk) = {
+	.name = "ceva_sata",
+	.id = UCLASS_SCSI,
+	.of_match = sata_ceva_ids,
+	.probe = sata_ceva_probe,
+	.ofdata_to_platdata = sata_ceva_ofdata_to_platdata,
+	.platdata_auto_alloc_size = sizeof(struct scsi_platdata),
+};
diff --git a/drivers/block/scsi-uclass.c b/drivers/block/scsi-uclass.c
new file mode 100644
index 00000000000..05da6cdeab8
--- /dev/null
+++ b/drivers/block/scsi-uclass.c
@@ -0,0 +1,27 @@
+/*
+ * Copyright (c) 2015 Google, Inc
+ * Written by Simon Glass <sjg@chromium.org>
+ * Copyright (c) 2016 Xilinx, Inc
+ * Written by Michal Simek
+ *
+ * Based on ahci-uclass.c
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <scsi.h>
+
+static int scsi_post_probe(struct udevice *dev)
+{
+	debug("%s: device %p\n", __func__, dev);
+	scsi_low_level_init(0, dev);
+	return 0;
+}
+
+UCLASS_DRIVER(scsi) = {
+	.id		= UCLASS_SCSI,
+	.name		= "scsi",
+	.post_probe	 = scsi_post_probe,
+};
diff --git a/drivers/gpio/zynq_gpio.c b/drivers/gpio/zynq_gpio.c
index 8a448c9a41c..64579a1b6c1 100644
--- a/drivers/gpio/zynq_gpio.c
+++ b/drivers/gpio/zynq_gpio.c
@@ -325,7 +325,6 @@ static const struct dm_gpio_ops gpio_zynq_ops = {
 	.get_value		= zynq_gpio_get_value,
 	.set_value		= zynq_gpio_set_value,
 	.get_function		= zynq_gpio_get_function,
-
 };
 
 static const struct udevice_id zynq_gpio_ids[] = {
diff --git a/drivers/net/xilinx_axi_emac.c b/drivers/net/xilinx_axi_emac.c
index 5de06ef01e8..51c74266637 100644
--- a/drivers/net/xilinx_axi_emac.c
+++ b/drivers/net/xilinx_axi_emac.c
@@ -648,9 +648,8 @@ static int axi_emac_probe(struct udevice *dev)
 	priv->bus->read = axiemac_miiphy_read;
 	priv->bus->write = axiemac_miiphy_write;
 	priv->bus->priv = priv;
-	strcpy(priv->bus->name, "axi_emac");
 
-	ret = mdio_register(priv->bus);
+	ret = mdio_register_seq(priv->bus, dev->seq);
 	if (ret)
 		return ret;
 
diff --git a/drivers/net/xilinx_emaclite.c b/drivers/net/xilinx_emaclite.c
index 78ff44c5619..ea93cf906ed 100644
--- a/drivers/net/xilinx_emaclite.c
+++ b/drivers/net/xilinx_emaclite.c
@@ -566,9 +566,8 @@ static int emaclite_probe(struct udevice *dev)
 	emaclite->bus->read = emaclite_miiphy_read;
 	emaclite->bus->write = emaclite_miiphy_write;
 	emaclite->bus->priv = emaclite;
-	strcpy(emaclite->bus->name, "emaclite");
 
-	ret = mdio_register(emaclite->bus);
+	ret = mdio_register_seq(emaclite->bus, dev->seq);
 	if (ret)
 		return ret;
 
diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c
index 526eac658ac..d2e5e7c7cd1 100644
--- a/drivers/net/zynq_gem.c
+++ b/drivers/net/zynq_gem.c
@@ -647,9 +647,8 @@ static int zynq_gem_probe(struct udevice *dev)
 	priv->bus->read = zynq_gem_miiphy_read;
 	priv->bus->write = zynq_gem_miiphy_write;
 	priv->bus->priv = priv;
-	strcpy(priv->bus->name, "gem");
 
-	ret = mdio_register(priv->bus);
+	ret = mdio_register_seq(priv->bus, dev->seq);
 	if (ret)
 		return ret;
 
diff --git a/include/ahci.h b/include/ahci.h
index a956c6ff5df..4876b41e901 100644
--- a/include/ahci.h
+++ b/include/ahci.h
@@ -145,7 +145,7 @@ struct ahci_ioports {
 };
 
 struct ahci_probe_ent {
-#ifdef CONFIG_DM_PCI
+#if defined(CONFIG_DM_PCI) || defined(CONFIG_DM_SCSI)
 	struct udevice *dev;
 #else
 	pci_dev_t	dev;
diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h
index d480990d2dd..fb4f6d68067 100644
--- a/include/configs/xilinx_zynqmp.h
+++ b/include/configs/xilinx_zynqmp.h
@@ -181,7 +181,6 @@
 #ifdef CONFIG_SATA_CEVA
 #define CONFIG_LIBATA
 #define CONFIG_SCSI_AHCI
-#define CONFIG_SCSI_AHCI_PLAT
 #define CONFIG_SYS_SCSI_MAX_SCSI_ID	2
 #define CONFIG_SYS_SCSI_MAX_LUN		1
 #define CONFIG_SYS_SCSI_MAX_DEVICE	(CONFIG_SYS_SCSI_MAX_SCSI_ID * \
diff --git a/include/configs/xilinx_zynqmp_ep.h b/include/configs/xilinx_zynqmp_ep.h
index d0ce768e6e1..3a572b7a6c2 100644
--- a/include/configs/xilinx_zynqmp_ep.h
+++ b/include/configs/xilinx_zynqmp_ep.h
@@ -16,7 +16,6 @@
 #define CONFIG_ZYNQ_SDHCI_MAX_FREQ	52000000
 #define CONFIG_ZYNQ_SDHCI_MIN_FREQ	(CONFIG_ZYNQ_SDHCI_MAX_FREQ >> 9)
 #define CONFIG_ZYNQ_EEPROM
-#define CONFIG_SATA_CEVA
 #define CONFIG_ZYNQMP_XHCI_LIST {ZYNQMP_USB0_XHCI_BASEADDR, \
 				 ZYNQMP_USB1_XHCI_BASEADDR}
 
diff --git a/include/configs/xilinx_zynqmp_zcu102.h b/include/configs/xilinx_zynqmp_zcu102.h
index adf2321c5d4..8d018da23e3 100644
--- a/include/configs/xilinx_zynqmp_zcu102.h
+++ b/include/configs/xilinx_zynqmp_zcu102.h
@@ -41,8 +41,6 @@
 #define CONFIG_CMD_PCA953X
 #define CONFIG_CMD_PCA953X_INFO
 
-#define CONFIG_SATA_CEVA
-
 #define CONFIG_ZYNQMP_XHCI_LIST {ZYNQMP_USB0_XHCI_BASEADDR}
 
 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	1
diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h
index eb78c4dac48..8c92d0b0308 100644
--- a/include/dm/uclass-id.h
+++ b/include/dm/uclass-id.h
@@ -66,6 +66,7 @@ enum uclass_id {
 	UCLASS_REMOTEPROC,	/* Remote Processor device */
 	UCLASS_RESET,		/* Reset controller device */
 	UCLASS_RTC,		/* Real time clock device */
+	UCLASS_SCSI,		/* SCSI device */
 	UCLASS_SERIAL,		/* Serial UART */
 	UCLASS_SPI,		/* SPI bus */
 	UCLASS_SPMI,		/* System Power Management Interface bus */
diff --git a/include/fdtdec.h b/include/fdtdec.h
index 27887c8c21a..d074478f141 100644
--- a/include/fdtdec.h
+++ b/include/fdtdec.h
@@ -976,6 +976,40 @@ struct display_timing {
  */
 int fdtdec_decode_display_timing(const void *blob, int node, int index,
 				 struct display_timing *config);
+
+/**
+ * fdtdec_setup_memory_size() - decode and setup gd->ram_size
+ *
+ * Decode the /memory 'reg' property to determine the size of the first memory
+ * bank, populate the global data with the size of the first bank of memory.
+ *
+ * This function should be called from a boards dram_init(). This helper
+ * function allows for boards to query the device tree for DRAM size instead of
+ * hard coding the value in the case where the memory size cannot be detected
+ * automatically.
+ *
+ * @return 0 if OK, -EINVAL if the /memory node or reg property is missing or
+ * invalid
+ */
+int fdtdec_setup_memory_size(void);
+
+/**
+ * fdtdec_setup_memory_banksize() - decode and populate gd->bd->bi_dram
+ *
+ * Decode the /memory 'reg' property to determine the address and size of the
+ * memory banks. Use this data to populate the global data board info with the
+ * phys address and size of memory banks.
+ *
+ * This function should be called from a boards dram_init_banksize(). This
+ * helper function allows for boards to query the device tree for memory bank
+ * information instead of hard coding the information in cases where it cannot
+ * be detected automatically.
+ *
+ * @return 0 if OK, -EINVAL if the /memory node or reg property is missing or
+ * invalid
+ */
+int fdtdec_setup_memory_banksize(void);
+
 /**
  * Set up the device tree ready for use
  */
diff --git a/include/miiphy.h b/include/miiphy.h
index 83141b4a6ae..fe8928a3a9d 100644
--- a/include/miiphy.h
+++ b/include/miiphy.h
@@ -48,6 +48,15 @@ void miiphy_listdev(void);
 struct mii_dev *mdio_alloc(void);
 void mdio_free(struct mii_dev *bus);
 int mdio_register(struct mii_dev *bus);
+
+/**
+ * mdio_register_seq - Register mdio bus with sequence number
+ * @bus: mii device structure
+ * @seq: sequence number
+ *
+ * Return: 0 if success, negative value if error
+ */
+int mdio_register_seq(struct mii_dev *bus, int seq);
 int mdio_unregister(struct mii_dev *bus);
 void mdio_list_devices(void);
 
diff --git a/include/sata.h b/include/sata.h
index b35359aa5a1..d18cc9aa875 100644
--- a/include/sata.h
+++ b/include/sata.h
@@ -2,6 +2,7 @@
 #define __SATA_H__
 #include <part.h>
 
+#if !defined(CONFIG_DM_SCSI)
 int init_sata(int dev);
 int reset_sata(int dev);
 int scan_sata(int dev);
@@ -15,5 +16,6 @@ int __sata_stop(void);
 int sata_port_status(int dev, int port);
 
 extern struct blk_desc sata_dev_desc[];
+#endif
 
 #endif
diff --git a/include/scsi.h b/include/scsi.h
index c8796785a46..190dacd0f2e 100644
--- a/include/scsi.h
+++ b/include/scsi.h
@@ -166,8 +166,11 @@ typedef struct SCSI_cmd_block{
 void scsi_print_error(ccb *pccb);
 int scsi_exec(ccb *pccb);
 void scsi_bus_reset(void);
+#if !defined(CONFIG_DM_SCSI)
 void scsi_low_level_init(int busdevfunc);
-
+#else
+void scsi_low_level_init(int busdevfunc, struct udevice *dev);
+#endif
 
 /***************************************************************************
  * functions residing inside cmd_scsi.c
@@ -175,6 +178,21 @@ void scsi_low_level_init(int busdevfunc);
 void scsi_init(void);
 int scsi_scan(int mode);
 
+#if defined(CONFIG_DM_SCSI)
+/**
+ * struct scsi_platdata - stores information about SCSI controller
+ *
+ * @base: Controller base address
+ * @max_lun: Maximum number of logical units
+ * @max_id: Maximum number of target ids
+ */
+struct scsi_platdata {
+	unsigned long base;
+	unsigned long max_lun;
+	unsigned long max_id;
+};
+#endif
+
 #define SCSI_IDENTIFY					0xC0  /* not used */
 
 /* Hardware errors  */
diff --git a/lib/fdtdec.c b/lib/fdtdec.c
index 4e619c49a2f..81f47ef2c7f 100644
--- a/lib/fdtdec.c
+++ b/lib/fdtdec.c
@@ -1174,6 +1174,62 @@ int fdtdec_decode_display_timing(const void *blob, int parent, int index,
 	return ret;
 }
 
+int fdtdec_setup_memory_size(void)
+{
+	int ret, mem;
+	struct fdt_resource res;
+
+	mem = fdt_path_offset(gd->fdt_blob, "/memory");
+	if (mem < 0) {
+		debug("%s: Missing /memory node\n", __func__);
+		return -EINVAL;
+	}
+
+	ret = fdt_get_resource(gd->fdt_blob, mem, "reg", 0, &res);
+	if (ret != 0) {
+		debug("%s: Unable to decode first memory bank\n", __func__);
+		return -EINVAL;
+	}
+
+	gd->ram_size = (phys_size_t)(res.end - res.start + 1);
+	debug("%s: Initial DRAM size %llx\n", __func__, (u64)gd->ram_size);
+
+	return 0;
+}
+
+#if defined(CONFIG_NR_DRAM_BANKS)
+int fdtdec_setup_memory_banksize(void)
+{
+	int bank, ret, mem;
+	struct fdt_resource res;
+
+	mem = fdt_path_offset(gd->fdt_blob, "/memory");
+	if (mem < 0) {
+		debug("%s: Missing /memory node\n", __func__);
+		return -EINVAL;
+	}
+
+	for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
+		ret = fdt_get_resource(gd->fdt_blob, mem, "reg", bank, &res);
+		if (ret == -FDT_ERR_NOTFOUND)
+			break;
+		if (ret != 0)
+			return -EINVAL;
+
+		gd->bd->bi_dram[bank].start = (phys_addr_t)res.start;
+		gd->bd->bi_dram[bank].size =
+			(phys_size_t)(res.end - res.start + 1);
+
+		debug("%s: DRAM Bank #%d: start = 0x%llx, size = 0x%llx\n",
+		      __func__, bank,
+		      (unsigned long long)gd->bd->bi_dram[bank].start,
+		      (unsigned long long)gd->bd->bi_dram[bank].size);
+	}
+
+	return 0;
+}
+#endif
+
 int fdtdec_setup(void)
 {
 #if CONFIG_IS_ENABLED(OF_CONTROL)