diff options
| author | Patrick Delaunay | 2021-01-22 15:34:25 +0100 |
|---|---|---|
| committer | Patrick Delaunay | 2021-02-09 10:34:27 +0100 |
| commit | 789d764b9eb9379081dafe2c02cd0b28eaedda02 (patch) | |
| tree | 653b6f445fcc93c624b45c95f5a55a590fbb3eb9 | |
| parent | 4363aac051fcccb8995b9afb5a4c4cd0a6153c10 (diff) | |
clk: stm32mp1: add support of I2C6_K
Add support of missing I2C6_K with bit 3 of RCC_MC_APB5ENSETR =
I2C6EN: I2C6 peripheral clocks enable.
This patch allows customer to use I2C6 in SPL or in U-Boot
as other I2C instance, already support in clk driver.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
| -rw-r--r-- | drivers/clk/clk_stm32mp1.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/clk/clk_stm32mp1.c b/drivers/clk/clk_stm32mp1.c index d4f10485919..8a5bdcb11d9 100644 --- a/drivers/clk/clk_stm32mp1.c +++ b/drivers/clk/clk_stm32mp1.c @@ -549,6 +549,7 @@ static const struct stm32mp1_clk_gate stm32mp1_clk_gate[] = { STM32MP1_CLK_SET_CLR(RCC_MP_APB4ENSETR, 16, USBPHY_K, _USBPHY_SEL), STM32MP1_CLK_SET_CLR(RCC_MP_APB5ENSETR, 2, I2C4_K, _I2C46_SEL), + STM32MP1_CLK_SET_CLR(RCC_MP_APB5ENSETR, 3, I2C6_K, _I2C46_SEL), STM32MP1_CLK_SET_CLR(RCC_MP_APB5ENSETR, 8, RTCAPB, _PCLK5), STM32MP1_CLK_SET_CLR(RCC_MP_APB5ENSETR, 20, STGEN_K, _STGEN_SEL), |