diff options
| author | Stephen Warren | 2014-02-06 13:13:06 -0700 |
|---|---|---|
| committer | Marek Vasut | 2014-03-10 18:53:36 +0100 |
| commit | 8165e34bf4f1b663ca37f7ead4bb029b4d9da74e (patch) | |
| tree | 645ab73d4a6fbdd83608dd8876f1c7cf9cefbbe0 | |
| parent | 2456b97f0c9411d0bc2637ba1033a910c8b4b971 (diff) | |
usb: ehci: fully align interrupt QHs/QTDs
These data structures are passed to cache-flushing routines, and hence
must be conform to both the USB the cache-flusing alignment requirements.
That means aligning to USB_DMA_MINALIGN. This is important on systems
where cache lines are >32 bytes.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
| -rw-r--r-- | drivers/usb/host/ehci-hcd.c | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c index 7068b762d8a..6017090ebee 100644 --- a/drivers/usb/host/ehci-hcd.c +++ b/drivers/usb/host/ehci-hcd.c @@ -1162,14 +1162,16 @@ create_int_queue(struct usb_device *dev, unsigned long pipe, int queuesize, debug("ehci intr queue: out of memory\n"); goto fail1; } - result->first = memalign(32, sizeof(struct QH) * queuesize); + result->first = memalign(USB_DMA_MINALIGN, + sizeof(struct QH) * queuesize); if (!result->first) { debug("ehci intr queue: out of memory\n"); goto fail2; } result->current = result->first; result->last = result->first + queuesize - 1; - result->tds = memalign(32, sizeof(struct qTD) * queuesize); + result->tds = memalign(USB_DMA_MINALIGN, + sizeof(struct qTD) * queuesize); if (!result->tds) { debug("ehci intr queue: out of memory\n"); goto fail3; |