diff options
author | York Sun | 2016-11-17 14:19:18 -0800 |
---|---|---|
committer | York Sun | 2016-11-23 23:42:09 -0800 |
commit | 8435aa777e35dedba79756194aa7bad8c549ea46 (patch) | |
tree | 2ddc4ae9de7079784b084207a7f9a23fa13f274a | |
parent | b0c98b4b9f2eb8180eb1c4cc4164294267d8ec27 (diff) |
powerpc: P2020RDB-PC: Separate from P1_P2_RDB_PC in Kconfig
Use TARGET_P2020RDB_PC instead of sharing with P1_P2_RDB_PC to
simplify Kconfig and config macros.
Remove macro CONFIG_P2020RDB.
Signed-off-by: York Sun <york.sun@nxp.com>
-rw-r--r-- | arch/powerpc/cpu/mpc85xx/Kconfig | 5 | ||||
-rw-r--r-- | board/freescale/p1_p2_rdb_pc/Kconfig | 3 | ||||
-rw-r--r-- | board/freescale/p1_p2_rdb_pc/ddr.c | 2 | ||||
-rw-r--r-- | configs/P2020RDB-PC_36BIT_NAND_defconfig | 4 | ||||
-rw-r--r-- | configs/P2020RDB-PC_36BIT_SDCARD_defconfig | 4 | ||||
-rw-r--r-- | configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig | 4 | ||||
-rw-r--r-- | configs/P2020RDB-PC_36BIT_defconfig | 3 | ||||
-rw-r--r-- | configs/P2020RDB-PC_NAND_defconfig | 4 | ||||
-rw-r--r-- | configs/P2020RDB-PC_SDCARD_defconfig | 4 | ||||
-rw-r--r-- | configs/P2020RDB-PC_SPIFLASH_defconfig | 4 | ||||
-rw-r--r-- | configs/P2020RDB-PC_defconfig | 3 | ||||
-rw-r--r-- | include/configs/p1_p2_rdb_pc.h | 10 | ||||
-rw-r--r-- | scripts/config_whitelist.txt | 1 |
13 files changed, 27 insertions, 24 deletions
diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig index 632e0f0c544..ea517dc1b5e 100644 --- a/arch/powerpc/cpu/mpc85xx/Kconfig +++ b/arch/powerpc/cpu/mpc85xx/Kconfig @@ -150,6 +150,11 @@ config TARGET_P1025RDB select SUPPORT_SPL select SUPPORT_TPL +config TARGET_P2020RDB + bool "Support P2020RDB-PC" + select SUPPORT_SPL + select SUPPORT_TPL + config TARGET_P1_P2_RDB_PC bool "Support p1_p2_rdb_pc" select SUPPORT_SPL diff --git a/board/freescale/p1_p2_rdb_pc/Kconfig b/board/freescale/p1_p2_rdb_pc/Kconfig index f02549ef185..fb506d4dde3 100644 --- a/board/freescale/p1_p2_rdb_pc/Kconfig +++ b/board/freescale/p1_p2_rdb_pc/Kconfig @@ -5,7 +5,8 @@ if TARGET_P1_P2_RDB_PC || \ TARGET_P1020UTM || \ TARGET_P1021RDB || \ TARGET_P1024RDB || \ - TARGET_P1025RDB + TARGET_P1025RDB || \ + TARGET_P2020RDB config SYS_BOARD default "p1_p2_rdb_pc" diff --git a/board/freescale/p1_p2_rdb_pc/ddr.c b/board/freescale/p1_p2_rdb_pc/ddr.c index 44ab123f790..fc383261380 100644 --- a/board/freescale/p1_p2_rdb_pc/ddr.c +++ b/board/freescale/p1_p2_rdb_pc/ddr.c @@ -47,7 +47,7 @@ dimm_params_t ddr_raw_timing = { .refresh_rate_ps = 7800000, .tfaw_ps = 37500, }; -#elif defined(CONFIG_P2020RDB) +#elif defined(CONFIG_TARGET_P2020RDB) /* Micron MT41J128M16_15E */ dimm_params_t ddr_raw_timing = { .n_ranks = 1, diff --git a/configs/P2020RDB-PC_36BIT_NAND_defconfig b/configs/P2020RDB-PC_36BIT_NAND_defconfig index 1661db21d21..d8f375bcf7d 100644 --- a/configs/P2020RDB-PC_36BIT_NAND_defconfig +++ b/configs/P2020RDB-PC_36BIT_NAND_defconfig @@ -2,13 +2,13 @@ CONFIG_PPC=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_MPC85xx=y -CONFIG_TARGET_P1_P2_RDB_PC=y +CONFIG_TARGET_P2020RDB=y CONFIG_PHYS_64BIT=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SYS_EXTRA_OPTIONS="P2020RDB,NAND" +CONFIG_SYS_EXTRA_OPTIONS="NAND" CONFIG_BOOTDELAY=10 CONFIG_SPL=y CONFIG_TPL=y diff --git a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig index 220bafc2b66..d5e44a0e1c4 100644 --- a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig +++ b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig @@ -6,13 +6,13 @@ CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_MPC85xx=y -CONFIG_TARGET_P1_P2_RDB_PC=y +CONFIG_TARGET_P2020RDB=y CONFIG_PHYS_64BIT=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SYS_EXTRA_OPTIONS="P2020RDB,SDCARD" +CONFIG_SYS_EXTRA_OPTIONS="SDCARD" CONFIG_BOOTDELAY=10 CONFIG_SPL=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y diff --git a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig index ebb89dde646..7112255aac1 100644 --- a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig +++ b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig @@ -7,13 +7,13 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_MPC85xx=y -CONFIG_TARGET_P1_P2_RDB_PC=y +CONFIG_TARGET_P2020RDB=y CONFIG_PHYS_64BIT=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SYS_EXTRA_OPTIONS="P2020RDB,SPIFLASH" +CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH" CONFIG_BOOTDELAY=10 CONFIG_SPL=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y diff --git a/configs/P2020RDB-PC_36BIT_defconfig b/configs/P2020RDB-PC_36BIT_defconfig index c422273e1d7..a2af2d7fbd0 100644 --- a/configs/P2020RDB-PC_36BIT_defconfig +++ b/configs/P2020RDB-PC_36BIT_defconfig @@ -1,12 +1,11 @@ CONFIG_PPC=y CONFIG_MPC85xx=y -CONFIG_TARGET_P1_P2_RDB_PC=y +CONFIG_TARGET_P2020RDB=y CONFIG_PHYS_64BIT=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SYS_EXTRA_OPTIONS="P2020RDB" CONFIG_BOOTDELAY=10 CONFIG_HUSH_PARSER=y CONFIG_CMD_MMC=y diff --git a/configs/P2020RDB-PC_NAND_defconfig b/configs/P2020RDB-PC_NAND_defconfig index 4af6039ac96..fd36351c1d4 100644 --- a/configs/P2020RDB-PC_NAND_defconfig +++ b/configs/P2020RDB-PC_NAND_defconfig @@ -2,12 +2,12 @@ CONFIG_PPC=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_MPC85xx=y -CONFIG_TARGET_P1_P2_RDB_PC=y +CONFIG_TARGET_P2020RDB=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SYS_EXTRA_OPTIONS="P2020RDB,NAND" +CONFIG_SYS_EXTRA_OPTIONS="NAND" CONFIG_BOOTDELAY=10 CONFIG_SPL=y CONFIG_TPL=y diff --git a/configs/P2020RDB-PC_SDCARD_defconfig b/configs/P2020RDB-PC_SDCARD_defconfig index fc8378b32ca..7330926c04b 100644 --- a/configs/P2020RDB-PC_SDCARD_defconfig +++ b/configs/P2020RDB-PC_SDCARD_defconfig @@ -6,12 +6,12 @@ CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_MPC85xx=y -CONFIG_TARGET_P1_P2_RDB_PC=y +CONFIG_TARGET_P2020RDB=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SYS_EXTRA_OPTIONS="P2020RDB,SDCARD" +CONFIG_SYS_EXTRA_OPTIONS="SDCARD" CONFIG_BOOTDELAY=10 CONFIG_SPL=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y diff --git a/configs/P2020RDB-PC_SPIFLASH_defconfig b/configs/P2020RDB-PC_SPIFLASH_defconfig index 754ef24c75d..2d380d5e931 100644 --- a/configs/P2020RDB-PC_SPIFLASH_defconfig +++ b/configs/P2020RDB-PC_SPIFLASH_defconfig @@ -7,12 +7,12 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_MPC85xx=y -CONFIG_TARGET_P1_P2_RDB_PC=y +CONFIG_TARGET_P2020RDB=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SYS_EXTRA_OPTIONS="P2020RDB,SPIFLASH" +CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH" CONFIG_BOOTDELAY=10 CONFIG_SPL=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y diff --git a/configs/P2020RDB-PC_defconfig b/configs/P2020RDB-PC_defconfig index 7c40cd645d4..7fc2dcd6487 100644 --- a/configs/P2020RDB-PC_defconfig +++ b/configs/P2020RDB-PC_defconfig @@ -1,11 +1,10 @@ CONFIG_PPC=y CONFIG_MPC85xx=y -CONFIG_TARGET_P1_P2_RDB_PC=y +CONFIG_TARGET_P2020RDB=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SYS_EXTRA_OPTIONS="P2020RDB" CONFIG_BOOTDELAY=10 CONFIG_HUSH_PARSER=y CONFIG_CMD_MMC=y diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index 6c2fdd1d79e..fa7d0591564 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -148,8 +148,8 @@ #define CONFIG_SYS_L2_SIZE (256 << 10) #endif -#if defined(CONFIG_P2020RDB) -#define CONFIG_BOARDNAME "P2020RDB-PCA" +#if defined(CONFIG_TARGET_P2020RDB) +#define CONFIG_BOARDNAME "P2020RDB-PC" #define CONFIG_NAND_FSL_ELBC #define CONFIG_P2020 #define CONFIG_VSC7385_ENET @@ -292,7 +292,7 @@ #define CONFIG_LIBATA #define CONFIG_LBA48 -#if defined(CONFIG_P2020RDB) +#if defined(CONFIG_TARGET_P2020RDB) #define CONFIG_SYS_CLK_FREQ 100000000 #else #define CONFIG_SYS_CLK_FREQ 66666666 @@ -351,7 +351,7 @@ #define CONFIG_DIMM_SLOTS_PER_CTLR 1 /* Default settings for DDR3 */ -#ifndef CONFIG_P2020RDB +#ifndef CONFIG_TARGET_P2020RDB #define CONFIG_SYS_DDR_CS0_BNDS 0x0000003f #define CONFIG_SYS_DDR_CS0_CONFIG 0x80014302 #define CONFIG_SYS_DDR_CS0_CONFIG_2 0x00000000 @@ -584,7 +584,7 @@ #define CONFIG_SPL_RELOC_STACK (CONFIG_SYS_INIT_L2_ADDR + 116 * 1024) #define CONFIG_SPL_RELOC_STACK_SIZE (32 << 10) #define CONFIG_SPL_RELOC_MALLOC_ADDR (CONFIG_SYS_INIT_L2_ADDR + 148 * 1024) -#if defined(CONFIG_P2020RDB) +#if defined(CONFIG_TARGET_P2020RDB) #define CONFIG_SPL_RELOC_MALLOC_SIZE (364 << 10) #else #define CONFIG_SPL_RELOC_MALLOC_SIZE (108 << 10) diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index c95daac7185..53b10f29110 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -3388,7 +3388,6 @@ CONFIG_P1021 CONFIG_P1024 CONFIG_P1025 CONFIG_P2020 -CONFIG_P2020RDB CONFIG_P2041RDB CONFIG_P3041DS CONFIG_P4080DS |