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authorSimon Glass2020-10-03 11:31:32 -0600
committerSimon Glass2020-10-29 14:42:18 -0600
commit88280529bddf0bd05c90db42b6c8e48de954cf66 (patch)
treea3b4296ebe6275b21447d98946dab195ca626cbd
parent36af37b9367677f16b09c7d57fb84674979a7a2b (diff)
dm: test: Add a test for of-platdata phandles
We have a test in dtoc for this feature, but not one in U-Boot itself. Add a simple test that checks that the information comes through correctly. Signed-off-by: Simon Glass <sjg@chromium.org>
-rw-r--r--arch/sandbox/dts/sandbox.dtsi26
-rw-r--r--configs/sandbox_spl_defconfig1
-rw-r--r--drivers/clk/clk_fixed_rate.c4
-rw-r--r--drivers/clk/clk_sandbox.c4
-rw-r--r--test/dm/of_platdata.c37
5 files changed, 68 insertions, 4 deletions
diff --git a/arch/sandbox/dts/sandbox.dtsi b/arch/sandbox/dts/sandbox.dtsi
index 0faad3f3195..6a0338b212b 100644
--- a/arch/sandbox/dts/sandbox.dtsi
+++ b/arch/sandbox/dts/sandbox.dtsi
@@ -29,6 +29,32 @@
};
};
+ clk_fixed: clk-fixed {
+ u-boot,dm-pre-reloc;
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <1234>;
+ };
+
+ clk_sandbox: clk-sbox {
+ u-boot,dm-pre-reloc;
+ compatible = "sandbox,clk";
+ #clock-cells = <1>;
+ assigned-clocks = <&clk_sandbox 3>;
+ assigned-clock-rates = <321>;
+ };
+
+ clk-test {
+ u-boot,dm-pre-reloc;
+ compatible = "sandbox,clk-test";
+ clocks = <&clk_fixed>,
+ <&clk_sandbox 1>,
+ <&clk_sandbox 0>,
+ <&clk_sandbox 3>,
+ <&clk_sandbox 2>;
+ clock-names = "fixed", "i2c", "spi", "uart2", "uart1";
+ };
+
gpio_a: gpios@0 {
u-boot,dm-pre-reloc;
gpio-controller;
diff --git a/configs/sandbox_spl_defconfig b/configs/sandbox_spl_defconfig
index f59e4f2e68c..db723cdf983 100644
--- a/configs/sandbox_spl_defconfig
+++ b/configs/sandbox_spl_defconfig
@@ -104,6 +104,7 @@ CONFIG_ADC_SANDBOX=y
CONFIG_AXI=y
CONFIG_AXI_SANDBOX=y
CONFIG_CLK=y
+CONFIG_SPL_CLK=y
CONFIG_CPU=y
CONFIG_DM_DEMO=y
CONFIG_DM_DEMO_SIMPLE=y
diff --git a/drivers/clk/clk_fixed_rate.c b/drivers/clk/clk_fixed_rate.c
index 55e1f8caa52..f86b4a0e924 100644
--- a/drivers/clk/clk_fixed_rate.c
+++ b/drivers/clk/clk_fixed_rate.c
@@ -46,8 +46,8 @@ static const struct udevice_id clk_fixed_rate_match[] = {
{ /* sentinel */ }
};
-U_BOOT_DRIVER(clk_fixed_rate) = {
- .name = "fixed_rate_clock",
+U_BOOT_DRIVER(fixed_clock) = {
+ .name = "fixed_clock",
.id = UCLASS_CLK,
.of_match = clk_fixed_rate_match,
.ofdata_to_platdata = clk_fixed_rate_ofdata_to_platdata,
diff --git a/drivers/clk/clk_sandbox.c b/drivers/clk/clk_sandbox.c
index 768fbb7c520..0ff1b496338 100644
--- a/drivers/clk/clk_sandbox.c
+++ b/drivers/clk/clk_sandbox.c
@@ -124,8 +124,8 @@ static const struct udevice_id sandbox_clk_ids[] = {
{ }
};
-U_BOOT_DRIVER(clk_sandbox) = {
- .name = "clk_sandbox",
+U_BOOT_DRIVER(sandbox_clk) = {
+ .name = "sandbox_clk",
.id = UCLASS_CLK,
.of_match = sandbox_clk_ids,
.ops = &sandbox_clk_ops,
diff --git a/test/dm/of_platdata.c b/test/dm/of_platdata.c
index 80900e416ba..57f903611a6 100644
--- a/test/dm/of_platdata.c
+++ b/test/dm/of_platdata.c
@@ -26,7 +26,11 @@ static int dm_test_of_platdata_props(struct unit_test_state *uts)
struct udevice *dev;
int i;
+ /* Skip the clock */
ut_assertok(uclass_first_device_err(UCLASS_MISC, &dev));
+ ut_asserteq_str("sandbox_clk_test", dev->name);
+
+ ut_assertok(uclass_next_device_err(&dev));
plat = dev_get_platdata(dev);
ut_assert(plat->boolval);
ut_asserteq(1, plat->intval);
@@ -167,3 +171,36 @@ static int dm_test_of_platdata_dev(struct unit_test_state *uts)
return 0;
}
DM_TEST(dm_test_of_platdata_dev, UT_TESTF_SCAN_PDATA);
+
+/* Test handling of phandles that point to other devices */
+static int dm_test_of_platdata_phandle(struct unit_test_state *uts)
+{
+ struct dtd_sandbox_clk_test *plat;
+ struct udevice *dev, *clk;
+
+ ut_assertok(uclass_first_device_err(UCLASS_MISC, &dev));
+ ut_asserteq_str("sandbox_clk_test", dev->name);
+ plat = dev_get_platdata(dev);
+
+ ut_assertok(device_get_by_driver_info(plat->clocks[0].node, &clk));
+ ut_asserteq_str("fixed_clock", clk->name);
+
+ ut_assertok(device_get_by_driver_info(plat->clocks[1].node, &clk));
+ ut_asserteq_str("sandbox_clk", clk->name);
+ ut_asserteq(1, plat->clocks[1].arg[0]);
+
+ ut_assertok(device_get_by_driver_info(plat->clocks[2].node, &clk));
+ ut_asserteq_str("sandbox_clk", clk->name);
+ ut_asserteq(0, plat->clocks[2].arg[0]);
+
+ ut_assertok(device_get_by_driver_info(plat->clocks[3].node, &clk));
+ ut_asserteq_str("sandbox_clk", clk->name);
+ ut_asserteq(3, plat->clocks[3].arg[0]);
+
+ ut_assertok(device_get_by_driver_info(plat->clocks[4].node, &clk));
+ ut_asserteq_str("sandbox_clk", clk->name);
+ ut_asserteq(2, plat->clocks[4].arg[0]);
+
+ return 0;
+}
+DM_TEST(dm_test_of_platdata_phandle, UT_TESTF_SCAN_PDATA);