diff options
author | Lukasz Majewski | 2019-02-13 22:46:50 +0100 |
---|---|---|
committer | Stefano Babic | 2019-04-13 20:30:08 +0200 |
commit | 9829b246d6995119e15ec4ac17882aaf443cd635 (patch) | |
tree | 9b0c975ea34ae71cb49d493202e5e5bcb5041266 | |
parent | 4c414ed361dc4f5601ba3d2fb2f2261dd053423e (diff) |
defconfig: bk4/pcm052: Update bk4r1|pcm052_defconfig to support DM/DT
This commit updates BK4's and PCM052's config files to support as much
as possible device tree and model in u-boot.
Moreover, remove CONFIG_* from pcm052.h (as those are now in
bk4|pcm052_defconfig)
Signed-off-by: Lukasz Majewski <lukma@denx.de>
-rw-r--r-- | configs/bk4r1_defconfig | 47 | ||||
-rw-r--r-- | configs/pcm052_defconfig | 34 | ||||
-rw-r--r-- | include/configs/pcm052.h | 34 |
3 files changed, 74 insertions, 41 deletions
diff --git a/configs/bk4r1_defconfig b/configs/bk4r1_defconfig index b67a3946acc..e3852f4856d 100644 --- a/configs/bk4r1_defconfig +++ b/configs/bk4r1_defconfig @@ -2,15 +2,18 @@ CONFIG_ARM=y CONFIG_SYS_THUMB_BUILD=y CONFIG_ARCH_VF610=y CONFIG_SYS_TEXT_BASE=0x3f401000 +CONFIG_SYS_MALLOC_F_LEN=0x800 CONFIG_TARGET_BK4R1=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_FIT=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/phytec/pcm052/imximage.cfg" CONFIG_BOOTDELAY=3 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y -CONFIG_CMD_BOOTZ=y -CONFIG_CMD_EEPROM=y +# CONFIG_CMD_ELF is not set CONFIG_CMD_MEMTEST=y +CONFIG_CMD_DM=y +CONFIG_CMD_FUSE=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y @@ -19,19 +22,45 @@ CONFIG_CMD_SF=y CONFIG_CMD_DHCP=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y -CONFIG_CMD_DATE=y +CONFIG_CMD_BOOTCOUNT=y CONFIG_CMD_FAT=y -CONFIG_MTDIDS_DEFAULT="nand0=NAND,nor0=NOR" -CONFIG_MTDPARTS_DEFAULT="mtdparts=NAND:640k(bootloader),128k(env1),128k(env2),128k(dtb),6144k(kernel),-(root);NOR:-(nor)" +CONFIG_MTDIDS_DEFAULT="nand0=vf610_nfc,nor0=NOR" +CONFIG_MTDPARTS_DEFAULT="mtdparts=vf610_nfc:2048k(bootloader),128k(env1),128k(env2),10240k(initrd),40960k(dtbkernel),-(system);NOR:-(nor)" CONFIG_CMD_UBI=y CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="vf610-bk4r1" CONFIG_ENV_IS_IN_NAND=y +CONFIG_NETCONSOLE=y CONFIG_DM=y +CONFIG_BOOTCOUNT_LIMIT=y +CONFIG_BOOTCOUNT_BOOTLIMIT=3 +CONFIG_SYS_BOOTCOUNT_SINGLEWORD=y +CONFIG_SYS_BOOTCOUNT_ADDR=0x4006e02c CONFIG_DM_GPIO=y CONFIG_VYBRID_GPIO=y +CONFIG_DM_I2C=y +CONFIG_I2C_SET_DEFAULT_BUS_NUM=y +CONFIG_I2C_DEFAULT_BUS_NUMBER=0x2 +CONFIG_SYS_I2C_MXC=y +CONFIG_SYS_I2C_MXC_I2C1=y +CONFIG_SYS_I2C_MXC_I2C2=y +CONFIG_SYS_I2C_MXC_I2C3=y +CONFIG_SYS_I2C_MXC_I2C4=y +CONFIG_LED=y +CONFIG_LED_GPIO=y +CONFIG_MISC=y +CONFIG_MXC_OCOTP=y +CONFIG_I2C_EEPROM=y +CONFIG_SYS_I2C_EEPROM_ADDR=0x50 +CONFIG_SYS_I2C_EEPROM_BUS=2 +CONFIG_SYS_EEPROM_SIZE=32768 +CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=6 +CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 +CONFIG_DM_MMC=y CONFIG_FSL_ESDHC=y +CONFIG_MTD=y CONFIG_NAND_VF610_NFC=y +CONFIG_NAND_VF610_NFC_DT=y CONFIG_SYS_NAND_BUSWIDTH_16BIT=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y @@ -39,10 +68,18 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_MTD=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y +CONFIG_DM_ETH=y +CONFIG_FEC_MXC=y CONFIG_MII=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_VYBRID=y +CONFIG_DM_RTC=y CONFIG_RTC_M41T62=y +# CONFIG_SPL_SERIAL_PRESENT is not set +# CONFIG_TPL_SERIAL_PRESENT is not set CONFIG_DM_SERIAL=y CONFIG_FSL_LPUART=y CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_QSPI=y +# CONFIG_EFI_LOADER is not set diff --git a/configs/pcm052_defconfig b/configs/pcm052_defconfig index 26ee823df34..906abbfd69c 100644 --- a/configs/pcm052_defconfig +++ b/configs/pcm052_defconfig @@ -9,7 +9,6 @@ CONFIG_BOOTDELAY=3 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -CONFIG_CMD_EEPROM=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y @@ -18,7 +17,6 @@ CONFIG_CMD_NAND_TRIMFFS=y CONFIG_CMD_DHCP=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y -CONFIG_CMD_DATE=y CONFIG_CMD_FAT=y CONFIG_MTDIDS_DEFAULT="nand0=NAND" CONFIG_MTDPARTS_DEFAULT="mtdparts=NAND:640k(bootloader),128k(env1),128k(env2),128k(dtb),6144k(kernel),-(root)" @@ -29,12 +27,44 @@ CONFIG_ENV_IS_IN_NAND=y CONFIG_DM=y CONFIG_DM_GPIO=y CONFIG_VYBRID_GPIO=y +CONFIG_DM_I2C=y +CONFIG_I2C_SET_DEFAULT_BUS_NUM=y +CONFIG_I2C_DEFAULT_BUS_NUMBER=0x2 +CONFIG_SYS_I2C_MXC=y +CONFIG_SYS_I2C_MXC_I2C1=y +CONFIG_SYS_I2C_MXC_I2C2=y +CONFIG_SYS_I2C_MXC_I2C3=y +CONFIG_SYS_I2C_MXC_I2C4=y +CONFIG_MISC=y +CONFIG_MXC_OCOTP=y +CONFIG_I2C_EEPROM=y +CONFIG_SYS_I2C_EEPROM_ADDR=0x50 +CONFIG_SYS_I2C_EEPROM_BUS=2 +CONFIG_SYS_EEPROM_SIZE=32768 +CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=6 +CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 +CONFIG_DM_MMC=y CONFIG_FSL_ESDHC=y +CONFIG_MTD=y CONFIG_NAND_VF610_NFC=y +CONFIG_NAND_VF610_NFC_DT=y CONFIG_SYS_NAND_BUSWIDTH_16BIT=y +CONFIG_DM_SPI_FLASH=y +CONFIG_SPI_FLASH=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_MTD=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y +CONFIG_DM_ETH=y +CONFIG_FEC_MXC=y CONFIG_MII=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_VYBRID=y +CONFIG_DM_RTC=y CONFIG_RTC_M41T62=y CONFIG_DM_SERIAL=y CONFIG_FSL_LPUART=y +CONFIG_SPI=y +CONFIG_DM_SPI=y +CONFIG_FSL_QSPI=y +# CONFIG_EFI_LOADER is not set diff --git a/include/configs/pcm052.h b/include/configs/pcm052.h index e125a38e7d4..c2ecb7ec184 100644 --- a/include/configs/pcm052.h +++ b/include/configs/pcm052.h @@ -24,48 +24,14 @@ /* NAND support */ #define CONFIG_SYS_NAND_ONFI_DETECTION -#ifdef CONFIG_CMD_NAND #define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR - -#define CONFIG_JFFS2_NAND - -/* Dynamic MTD partition support */ - -#endif - -#define CONFIG_SYS_FSL_ESDHC_ADDR 0 -#define CONFIG_SYS_FSL_ESDHC_NUM 1 - -/*#define CONFIG_ESDHC_DETECT_USE_EXTERN_IRQ1*/ - -#define CONFIG_FEC_MXC -#define IMX_FEC_BASE ENET_BASE_ADDR -#define CONFIG_FEC_XCV_TYPE RMII -#define CONFIG_FEC_MXC_PHYADDR 0 - /* QSPI Configs*/ - #ifdef CONFIG_FSL_QSPI #define FSL_QSPI_FLASH_SIZE (1 << 24) #define FSL_QSPI_FLASH_NUM 2 #define CONFIG_SYS_FSL_QSPI_LE #endif -/* I2C Configs */ -#define CONFIG_SYS_I2C -#define CONFIG_SYS_I2C_MXC_I2C3 -#define CONFIG_SYS_I2C_MXC - -/* RTC (actually an RV-4162 but M41T62-compatible) */ -#define CONFIG_SYS_I2C_RTC_ADDR 0x68 -#define CONFIG_SYS_RTC_BUS_NUM 2 - -/* EEPROM (24FC256) */ -#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 -#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 -#define CONFIG_SYS_I2C_EEPROM_BUS 2 - #define CONFIG_LOADADDR 0x82000000 |