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authorStefan Agner2016-07-13 00:25:37 -0700
committerStefano Babic2016-07-19 19:52:14 +0200
commit9a88180bfbb6ee7b2fba5516391ff0e611794de5 (patch)
treee5d80891945cf687fa276d29aa23d03b85ec1c0c
parent2deebe2481c4a193c3c02e0a56b0b43039bcecb7 (diff)
usb: ehci-mx6: configure power polarity in usb_power_config
USBNC_n_CTRL1 bit 9 actually controls the power pin polarity. Rename UCTRL_PM to align reference manual and set the bit in the appropriate callback usb_power_config. Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
-rw-r--r--drivers/usb/host/ehci-mx6.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/drivers/usb/host/ehci-mx6.c b/drivers/usb/host/ehci-mx6.c
index 069f116ed2d..277f4616464 100644
--- a/drivers/usb/host/ehci-mx6.c
+++ b/drivers/usb/host/ehci-mx6.c
@@ -49,7 +49,7 @@
#define USBNC_OFFSET 0x200
#define USBNC_PHYSTATUS_ID_DIG (1 << 4) /* otg_id status */
#define USBNC_PHYCFG2_ACAENB (1 << 4) /* otg_id detection enable */
-#define UCTRL_PM (1 << 9) /* OTG Power Mask */
+#define UCTRL_PWR_POL (1 << 9) /* OTG Polarity of Power Pin */
#define UCTRL_OVER_CUR_POL (1 << 8) /* OTG Polarity of Overcurrent */
#define UCTRL_OVER_CUR_DIS (1 << 7) /* Disable OTG Overcurrent Detection */
@@ -207,12 +207,16 @@ static void usb_power_config(int index)
struct usbnc_regs *usbnc = (struct usbnc_regs *)(USB_BASE_ADDR +
(0x10000 * index) + USBNC_OFFSET);
void __iomem *phy_cfg2 = (void __iomem *)(&usbnc->phy_cfg2);
+ void __iomem *ctrl = (void __iomem *)(&usbnc->ctrl1);
/*
* Clear the ACAENB to enable usb_otg_id detection,
* otherwise it is the ACA detection enabled.
*/
clrbits_le32(phy_cfg2, USBNC_PHYCFG2_ACAENB);
+
+ /* Set power polarity to high active */
+ setbits_le32(ctrl, UCTRL_PWR_POL);
}
int usb_phy_mode(int port)
@@ -250,11 +254,7 @@ static void usb_oc_config(int index)
setbits_le32(ctrl, UCTRL_OVER_CUR_POL);
#endif
-#if defined(CONFIG_MX6)
setbits_le32(ctrl, UCTRL_OVER_CUR_DIS);
-#elif defined(CONFIG_MX7)
- setbits_le32(ctrl, UCTRL_OVER_CUR_DIS | UCTRL_PM);
-#endif
}
/**