diff options
| author | Jonas Karlman | 2024-04-08 18:14:01 +0000 |
|---|---|---|
| committer | Kever Yang | 2024-04-26 15:47:03 +0800 |
| commit | 9ae4a86f1ebfac0fd8a901a615e3856e88ff0e72 (patch) | |
| tree | c1daf047685701adf39db4b03cbbf1db72060d82 | |
| parent | 12e07033c77d52a99682778e078ef63be619052d (diff) | |
rockchip: rk3308: Generate ethaddr based on cpu id
Like other Rockchip SoCs the RK3308 has cpu id programmed into OTP
memory. The rockchip_otp driver already support the RK3308 variant.
However, the device tree is missing a node to enable use of OTP.
Add the missing otp node to soc u-boot.dtsi, enable the rockchip_otp
driver and enable use of misc_init_r() to set ethaddr based on cpu id.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
| -rw-r--r-- | arch/arm/dts/rk3308-u-boot.dtsi | 16 | ||||
| -rw-r--r-- | arch/arm/mach-rockchip/Kconfig | 3 |
2 files changed, 19 insertions, 0 deletions
diff --git a/arch/arm/dts/rk3308-u-boot.dtsi b/arch/arm/dts/rk3308-u-boot.dtsi index db2c20a7055..436f66d1b87 100644 --- a/arch/arm/dts/rk3308-u-boot.dtsi +++ b/arch/arm/dts/rk3308-u-boot.dtsi @@ -10,6 +10,22 @@ mmc0 = &emmc; mmc1 = &sdmmc; }; + + otp: nvmem@ff210000 { + compatible = "rockchip,rk3308-otp"; + reg = <0x0 0xff210000 0x0 0x4000>; + clocks = <&cru SCLK_OTP_USR>, <&cru PCLK_OTP_NS>, + <&cru PCLK_OTP_PHY>; + clock-names = "otp", "apb_pclk", "phy"; + resets = <&cru SRST_OTP_PHY>; + reset-names = "phy"; + #address-cells = <1>; + #size-cells = <1>; + + cpu_id: id@7 { + reg = <0x07 0x10>; + }; + }; }; &cru { diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index 0902eb28545..2707d3fdfb3 100644 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -163,7 +163,10 @@ config ROCKCHIP_RK3308 imply ARMV8_CRYPTO imply ARMV8_SET_SMPEN imply LEGACY_IMAGE_FORMAT + imply MISC + imply MISC_INIT_R imply ROCKCHIP_COMMON_BOARD + imply ROCKCHIP_OTP imply SPL_CLK imply SPL_FIT_SIGNATURE imply SPL_RAM |