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authorPeng Fan2019-10-16 10:24:17 +0000
committerStefano Babic2019-11-03 17:04:16 +0100
commit9e094455495081979cd20ac730a42508717e37b5 (patch)
tree9c3cababa92f3a8ede22f0ee8672021b222364ad
parentcde421cfc8f378fef9bd9b90e20c9633fe63d709 (diff)
imx8m: imx8mq: get chip rev for B1 revision
The i.MX8MQ B1 uses OCOTP_HW_OCOTP_READ_FUSE_DATA register for chip id. It returns a magic number 0xff0055aa. update get_cpu_rev to support it, and enable ocotp clock to access ocotp. Signed-off-by: Peng Fan <peng.fan@nxp.com>
-rw-r--r--arch/arm/mach-imx/imx8m/clock_imx8mq.c1
-rw-r--r--arch/arm/mach-imx/imx8m/soc.c21
2 files changed, 15 insertions, 7 deletions
diff --git a/arch/arm/mach-imx/imx8m/clock_imx8mq.c b/arch/arm/mach-imx/imx8m/clock_imx8mq.c
index feecdb50f6c..5c3f780127b 100644
--- a/arch/arm/mach-imx/imx8m/clock_imx8mq.c
+++ b/arch/arm/mach-imx/imx8m/clock_imx8mq.c
@@ -804,6 +804,7 @@ int clock_init(void)
init_wdog_clk();
clock_enable(CCGR_TSENSOR, 1);
+ clock_enable(CCGR_OCOTP, 1);
return 0;
}
diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-imx/imx8m/soc.c
index aeca82cdbf4..a924af431c9 100644
--- a/arch/arm/mach-imx/imx8m/soc.c
+++ b/arch/arm/mach-imx/imx8m/soc.c
@@ -202,14 +202,21 @@ u32 get_cpu_rev(void)
} else {
if (reg == CHIP_REV_1_0) {
/*
- * For B0 chip, the DIGPROG is not updated, still TO1.0.
- * we have to check ROM version further
+ * For B0 chip, the DIGPROG is not updated,
+ * it is still TO1.0. we have to check ROM
+ * version or OCOTP_READ_FUSE_DATA.
+ * 0xff0055aa is magic number for B1.
*/
- rom_version = readl((void __iomem *)ROM_VERSION_A0);
- if (rom_version != CHIP_REV_1_0) {
- rom_version = readl((void __iomem *)ROM_VERSION_B0);
- if (rom_version >= CHIP_REV_2_0)
- reg = CHIP_REV_2_0;
+ if (readl((void __iomem *)(OCOTP_BASE_ADDR + 0x40)) == 0xff0055aa) {
+ reg = CHIP_REV_2_1;
+ } else {
+ rom_version =
+ readl((void __iomem *)ROM_VERSION_A0);
+ if (rom_version != CHIP_REV_1_0) {
+ rom_version = readl((void __iomem *)ROM_VERSION_B0);
+ if (rom_version == CHIP_REV_2_0)
+ reg = CHIP_REV_2_0;
+ }
}
}
}