diff options
| author | Marek Vasut | 2019-02-19 19:32:28 +0100 |
|---|---|---|
| committer | Marek Vasut | 2019-02-25 16:07:41 +0100 |
| commit | ba41c45ec3402178520ca59d5d847c1c94ae25c4 (patch) | |
| tree | 9c78886d07fe5a6f15257d4ad4f96bd39459cf1d | |
| parent | 5d6888418c1185a00eda01349b03b56b03cefda5 (diff) | |
mmc: renesas: Unconditionally set DTCNTL TAPNUM to 8
According to latest specification rev.0026 and after confirmation with
HW engineer, the DTCNTL register TAPNUM field must be set to 8 even on
H3 ES2.0 SoC. Make it so.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
| -rw-r--r-- | drivers/mmc/renesas-sdhi.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/mmc/renesas-sdhi.c b/drivers/mmc/renesas-sdhi.c index 923f846370f..6c51ccc294b 100644 --- a/drivers/mmc/renesas-sdhi.c +++ b/drivers/mmc/renesas-sdhi.c @@ -137,7 +137,7 @@ static int renesas_sdhi_hs400(struct udevice *dev) tmio_sd_writel(priv, reg, RENESAS_SDHI_SCC_TMPPORT2); - tmio_sd_writel(priv, (taps << RENESAS_SDHI_SCC_DTCNTL_TAPNUM_SHIFT) | + tmio_sd_writel(priv, (0x8 << RENESAS_SDHI_SCC_DTCNTL_TAPNUM_SHIFT) | RENESAS_SDHI_SCC_DTCNTL_TAPEN, RENESAS_SDHI_SCC_DTCNTL); |